diff options
| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/doc/README.imx31 | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/doc/README.imx31')
| -rw-r--r-- | qemu/roms/u-boot/doc/README.imx31 | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/doc/README.imx31 b/qemu/roms/u-boot/doc/README.imx31 new file mode 100644 index 000000000..91ef76688 --- /dev/null +++ b/qemu/roms/u-boot/doc/README.imx31 @@ -0,0 +1,29 @@ +U-Boot for Freescale i.MX31 + +This file contains information for the port of U-Boot to the Freescale +i.MX31 SoC. + +1. CONFIGURATION OPTIONS/SETTINGS +--------------------------------- + +1.1 Configuration of MC13783 SPI bus +------------------------------------ + The power management companion chip MC13783 is connected to the + i.MX31 via an SPI bus. Use the following configuration options + to setup the bus and chip select used for a particular board. + + CONFIG_MC13783_SPI_BUS -- defines the SPI bus the MC13783 is connected to. + Note that 0 is CSPI1, 1 is CSPI2 and 2 is CSPI3. + CONFIG_MC13783_SPI_CS -- define the chip select the MC13783 s connected to. + +1.2 Timer precision +------------------- + CONFIG_MX31_TIMER_HIGH_PRECISION + + Enable higher precision timer. The low-precision timer + (default) provides approximately 4% error, whereas the + high-precision timer is about 0.4% accurate. The extra + accuracy is achieved at the cost of higher computational + overhead, which, in places where time is measured, should + not be critical, so, it should be safe to enable this + option. |