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author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
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committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/doc/README.generic_usb_ohci | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/doc/README.generic_usb_ohci')
-rw-r--r-- | qemu/roms/u-boot/doc/README.generic_usb_ohci | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/doc/README.generic_usb_ohci b/qemu/roms/u-boot/doc/README.generic_usb_ohci new file mode 100644 index 000000000..ba7cea83c --- /dev/null +++ b/qemu/roms/u-boot/doc/README.generic_usb_ohci @@ -0,0 +1,63 @@ +Notes on the the generic USB-OHCI driver +======================================== + +This driver (drivers/usb/usb_ohci.[ch]) is the result of the merge of +various existing OHCI drivers that were basically identical beside +cpu/board dependant initalization. This initalization has been moved +into cpu/board directories and are called via the hooks below. + +Configuration options +---------------------- + + CONFIG_USB_OHCI_NEW: enable the new OHCI driver + + CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: + + - extern int usb_board_init(void); + - extern int usb_board_stop(void); + - extern int usb_cpu_init_fail(void); + + CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks: + + - extern int usb_cpu_init(void); + - extern int usb_cpu_stop(void); + - extern int usb_cpu_init_fail(void); + + CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI + registers + + CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name + + CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the + root hub. + + +Endianness issues +------------------ + +The USB bus operates in little endian, but unfortunately there are +OHCI controllers that operate in big endian such as ppc4xx and +mpc5xxx. For these the config option + + CONFIG_SYS_OHCI_BE_CONTROLLER + +needs to be defined. + + +PCI Controllers +---------------- + +You'll need to define + + CONFIG_PCI_OHCI + +If you have several USB PCI controllers, define + + CONFIG_PCI_OHCI_DEVNO: number of the OHCI device in PCI list + +If undefined, the first instance found in PCI space will be used. + +PCI Controllers need to do byte swapping on register accesses, so they +should to define: + + CONFIG_SYS_OHCI_SWAP_REG_ACCESS |