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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/doc/README.fec_mxc
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
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+U-boot config options used in fec_mxc.c
+
+CONFIG_FEC_MXC
+ Selects fec_mxc.c to be compiled into u-boot.
+
+CONFIG_MII
+ Must be defined if CONFIG_FEC_MXC is defined.
+
+CONFIG_FEC_XCV_TYPE
+ Defaults to MII100 for 100 Base-tx.
+ RGMII selects 1000 Base-tx reduced pin count interface.
+ RMII selects 100 Base-tx reduced pin count interface.
+
+CONFIG_FEC_MXC_SWAP_PACKET
+ Forced on iff MX28.
+ Swaps the bytes order of all words(4 byte units) in the packet.
+ This should not be specified by a board file. It is cpu specific.
+
+CONFIG_PHYLIB
+ fec_mxc supports PHYLIB and should be used for new boards.
+
+CONFIG_FEC_MXC_NO_ANEG
+ Relevant only if PHYLIB not used. Skips auto-negotiation restart.
+
+CONFIG_FEC_MXC_PHYADDR
+ Optional, selects the exact phy address that should be connected
+ and function fecmxc_initialize will try to initialize it.