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| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/doc/README.cfi | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/doc/README.cfi')
| -rw-r--r-- | qemu/roms/u-boot/doc/README.cfi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/doc/README.cfi b/qemu/roms/u-boot/doc/README.cfi new file mode 100644 index 000000000..d087ff0d6 --- /dev/null +++ b/qemu/roms/u-boot/doc/README.cfi @@ -0,0 +1,29 @@ +The common CFI driver provides this weak default implementation for +flash_cmd_reset(): + +void __flash_cmd_reset(flash_info_t *info) +{ + /* + * We do not yet know what kind of commandset to use, so we issue + * the reset command in both Intel and AMD variants, in the hope + * that AMD flash roms ignore the Intel command. + */ + flash_write_cmd(info, 0, 0, AMD_CMD_RESET); + flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); +} +void flash_cmd_reset(flash_info_t *info) + __attribute__((weak,alias("__flash_cmd_reset"))); + + +Some flash chips seems to have trouble with this reset sequence. In this case +the board specific code can override this weak default version with a board +specific function. For example the digsy_mtc board equipped with the M29W128GH +from Numonyx needs this version to function properly: + +void flash_cmd_reset(flash_info_t *info) +{ + flash_write_cmd(info, 0, 0, AMD_CMD_RESET); +} + +see also: +http://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html |