Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

5 files changed, 0 insertions, 260 deletions

diff --git a/qemu/roms/u-boot/board/xes/xpedite520x/Makefile b/qemu/roms/u-boot/board/xes/xpedite520x/Makefile
deleted file mode 100644
index 14841b9c8..000000000
--- a/qemu/roms/u-boot/board/xes/xpedite520x/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Copyright 2008 Extreme Engineering Solutions, Inc.
-# Copyright 2004 Freescale Semiconductor.
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	+= xpedite520x.o
-obj-y	+= ddr.o
-obj-y	+= law.o
-obj-y	+= tlb.o
diff --git a/qemu/roms/u-boot/board/xes/xpedite520x/ddr.c b/qemu/roms/u-boot/board/xes/xpedite520x/ddr.c
deleted file mode 100644
index 5c5eadc93..000000000
--- a/qemu/roms/u-boot/board/xes/xpedite520x/ddr.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright 2008 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
- */
-
-#include <common.h>
-#include <i2c.h>
-
-#include <fsl_ddr_sdram.h>
-#include <fsl_ddr_dimm_params.h>
-
-void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
-	i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-
-	/* We use soldered memory, but use an SPD EEPROM to describe it.
-	 * The SPD has an unspecified dimm type, but the DDR2 initialization
-	 * code requires a specific type to be specified. This sets the type
-	 * as a standard unregistered SO-DIMM. */
-	if (spd->dimm_type == 0) {
-		spd->dimm_type = 0x4;
-		((uchar *)spd)[63] += 0x4;
-	}
-}
-
-void fsl_ddr_board_options(memctl_options_t *popts,
-				dimm_params_t *pdimm,
-				unsigned int ctrl_num)
-{
-	/*
-	 * Factors to consider for clock adjust:
-	 *	- number of chips on bus
-	 *	- position of slot
-	 *	- DDR1 vs. DDR2?
-	 *	- ???
-	 *
-	 * This needs to be determined on a board-by-board basis.
-	 *	0110	3/4 cycle late
-	 *	0111	7/8 cycle late
-	 */
-	popts->clk_adjust = 7;
-
-	/*
-	 * Factors to consider for CPO:
-	 *	- frequency
-	 *	- ddr1 vs. ddr2
-	 */
-	popts->cpo_override = 9;
-
-	/*
-	 * Factors to consider for write data delay:
-	 *	- number of DIMMs
-	 *
-	 * 1 = 1/4 clock delay
-	 * 2 = 1/2 clock delay
-	 * 3 = 3/4 clock delay
-	 * 4 = 1   clock delay
-	 * 5 = 5/4 clock delay
-	 * 6 = 3/2 clock delay
-	 */
-	popts->write_data_delay = 3;
-
-	/*
-	 * Factors to consider for half-strength driver enable:
-	 *	- number of DIMMs installed
-	 */
-	popts->half_strength_driver_enable = 0;
-}
diff --git a/qemu/roms/u-boot/board/xes/xpedite520x/law.c b/qemu/roms/u-boot/board/xes/xpedite520x/law.c
deleted file mode 100644
index 05524077e..000000000
--- a/qemu/roms/u-boot/board/xes/xpedite520x/law.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright 2008 Extreme Engineering Solutions, Inc.
- * Copyright 2008 Freescale Semiconductor, Inc.
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/fsl_law.h>
-#include <asm/mmu.h>
-
-/*
- * Notes:
- *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- *    If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-struct law_entry law_table[] = {
-	/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
-	SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
-	SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
-};
-
-int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/qemu/roms/u-boot/board/xes/xpedite520x/tlb.c b/qemu/roms/u-boot/board/xes/xpedite520x/tlb.c
deleted file mode 100644
index a8e1f4800..000000000
--- a/qemu/roms/u-boot/board/xes/xpedite520x/tlb.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright 2008 Extreme Engineering Solutions, Inc.
- * Copyright 2008 Freescale Semiconductor, Inc.
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/mmu.h>
-
-struct fsl_e_tlb_entry tlb_table[] = {
-	/* TLB 0 - for temp stack in cache */
-	SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
-		MAS3_SX|MAS3_SW|MAS3_SR, 0,
-		0, 0, BOOKE_PAGESZ_4K, 0),
-	SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
-		CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
-		MAS3_SX|MAS3_SW|MAS3_SR, 0,
-		0, 0, BOOKE_PAGESZ_4K, 0),
-	SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
-		CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
-		MAS3_SX|MAS3_SW|MAS3_SR, 0,
-		0, 0, BOOKE_PAGESZ_4K, 0),
-	SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
-		CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
-		MAS3_SX|MAS3_SW|MAS3_SR, 0,
-		0, 0, BOOKE_PAGESZ_4K, 0),
-
-	/* W**G* - NOR flashes */
-	/* This will be changed to *I*G* after relocation to RAM. */
-	SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE2, CONFIG_SYS_FLASH_BASE2,
-		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
-		0, 0, BOOKE_PAGESZ_256M, 1),
-
-	SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
-		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		0, 1, BOOKE_PAGESZ_1M, 1),
-
-	/* *I*G* - NAND flash */
-	SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE,
-		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		0, 2, BOOKE_PAGESZ_1M, 1),
-
-#if CONFIG_PCI1
-	/* *I*G* - PCI MEM */
-	SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_PHYS,
-		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		0, 3, BOOKE_PAGESZ_1G, 1),
-#endif
-
-#if CONFIG_PCI2
-	/* *I*G* - PCI MEM */
-	SET_TLB_ENTRY(1, CONFIG_SYS_PCI2_MEM_PHYS, CONFIG_SYS_PCI2_MEM_PHYS,
-		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		0, 4, BOOKE_PAGESZ_256M, 1),
-#endif
-
-#if defined(CONFIG_PCI1) || defined(CONFIG_PCI2)
-	/* *I*G* - PCI IO */
-	SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_PHYS,
-		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		0, 5, BOOKE_PAGESZ_16M, 1),
-#endif
-};
-
-int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/qemu/roms/u-boot/board/xes/xpedite520x/xpedite520x.c b/qemu/roms/u-boot/board/xes/xpedite520x/xpedite520x.c
deleted file mode 100644
index aa9e99d10..000000000
--- a/qemu/roms/u-boot/board/xes/xpedite520x/xpedite520x.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright 2008 Extreme Engineering Solutions, Inc.
- * Copyright 2004, 2007 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <asm/fsl_pci.h>
-#include <asm/io.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <libfdt.h>
-#include <fdt_support.h>
-#include <pca953x.h>
-
-extern void ft_board_pci_setup(void *blob, bd_t *bd);
-
-static void flash_cs_fixup(void)
-{
-	int flash_sel;
-
-	/*
-	 * Print boot dev and swap flash flash chip selects if booted from 2nd
-	 * flash.  Swapping chip selects presents user with a common memory
-	 * map regardless of which flash was booted from.
-	 */
-	flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) &
-			CONFIG_SYS_PCA953X_FLASH_PASS_CS));
-	printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1);
-
-	if (flash_sel) {
-		set_lbc_br(0, CONFIG_SYS_BR1_PRELIM);
-		set_lbc_or(0, CONFIG_SYS_OR1_PRELIM);
-
-		set_lbc_br(1, CONFIG_SYS_BR0_PRELIM);
-		set_lbc_or(1, CONFIG_SYS_OR0_PRELIM);
-	}
-}
-
-int board_early_init_r(void)
-{
-	/* Initialize PCA9557 devices */
-	pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0);
-	pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0);
-
-	/*
-	 * Remap NOR flash region to caching-inhibited
-	 * so that flash can be erased/programmed properly.
-	 */
-
-	/* Flush d-cache and invalidate i-cache of any FLASH data */
-	flush_dcache();
-	invalidate_icache();
-
-	/* Invalidate existing TLB entry for NOR flash */
-	disable_tlb(0);
-	set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
-		(CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
-		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		0, 0, BOOKE_PAGESZ_256M, 1);
-
-	flash_cs_fixup();
-
-	return 0;
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-#ifdef CONFIG_PCI
-	ft_board_pci_setup(blob, bd);
-#endif
-	ft_cpu_setup(blob, bd);
-}
-#endif