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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/trizepsiv
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/trizepsiv')
-rw-r--r--qemu/roms/u-boot/board/trizepsiv/Makefile8
-rw-r--r--qemu/roms/u-boot/board/trizepsiv/conxs.c148
-rw-r--r--qemu/roms/u-boot/board/trizepsiv/eeprom.c62
3 files changed, 218 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/trizepsiv/Makefile b/qemu/roms/u-boot/board/trizepsiv/Makefile
new file mode 100644
index 000000000..c49686fc6
--- /dev/null
+++ b/qemu/roms/u-boot/board/trizepsiv/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := conxs.o eeprom.o
diff --git a/qemu/roms/u-boot/board/trizepsiv/conxs.c b/qemu/roms/u-boot/board/trizepsiv/conxs.c
new file mode 100644
index 000000000..1ddf05dcd
--- /dev/null
+++ b/qemu/roms/u-boot/board/trizepsiv/conxs.c
@@ -0,0 +1,148 @@
+/*
+ * (C) Copyright 2007
+ * Stefano Babic, DENX Gmbh, sbabic@denx.de
+ *
+ * (C) Copyright 2004
+ * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
+ *
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa.h>
+#include <asm/arch/regs-mmc.h>
+#include <netdev.h>
+#include <asm/io.h>
+#include <usb.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RH_A_PSM (1 << 8) /* power switching mode */
+#define RH_A_NPS (1 << 9) /* no power switching */
+
+extern struct serial_device serial_ffuart_device;
+extern struct serial_device serial_btuart_device;
+extern struct serial_device serial_stuart_device;
+
+#if CONFIG_MK_POLARIS
+#define BOOT_CONSOLE "serial_stuart"
+#else
+#define BOOT_CONSOLE "serial_ffuart"
+#endif
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
+ ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
+ UHCHR);
+
+ writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
+
+ while (readl(UHCHR) & UHCHR_FSBIR)
+ ;
+
+ writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
+ writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
+
+ /* Clear any OTG Pin Hold */
+ if (readl(PSSR) & PSSR_OTGPH)
+ writel(readl(PSSR) | PSSR_OTGPH, PSSR);
+
+ writel(readl(UHCRHDA) & ~(RH_A_NPS), UHCRHDA);
+ writel(readl(UHCRHDA) | RH_A_PSM, UHCRHDA);
+
+ /* Set port power control mask bits, only 3 ports. */
+ writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
+
+ return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ return 0;
+}
+
+void usb_board_stop(void)
+{
+ writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
+ udelay(11);
+ writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
+
+ writel(readl(UHCCOMS) | 1, UHCCOMS);
+ udelay(10);
+
+ writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
+
+ return;
+}
+
+int board_init (void)
+{
+ /* We have RAM, disable cache */
+ dcache_disable();
+ icache_disable();
+
+ /* arch number of ConXS Board */
+ gd->bd->bi_arch_number = 776;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0xa000003c;
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ char *console=getenv("boot_console");
+
+ if ((console == NULL) || (strcmp(console,"serial_btuart") &&
+ strcmp(console,"serial_stuart") &&
+ strcmp(console,"serial_ffuart"))) {
+ console = BOOT_CONSOLE;
+ }
+ setenv("stdout",console);
+ setenv("stdin", console);
+ setenv("stderr",console);
+ return 0;
+}
+
+int dram_init(void)
+{
+ pxa2xx_dram_init();
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+#ifdef CONFIG_DRIVER_DM9000
+int board_eth_init(bd_t *bis)
+{
+ return dm9000_initialize(bis);
+}
+#endif
+
+#ifdef CONFIG_CMD_MMC
+int board_mmc_init(bd_t *bis)
+{
+ pxa_mmc_register(0);
+ return 0;
+}
+#endif
diff --git a/qemu/roms/u-boot/board/trizepsiv/eeprom.c b/qemu/roms/u-boot/board/trizepsiv/eeprom.c
new file mode 100644
index 000000000..1318edc5d
--- /dev/null
+++ b/qemu/roms/u-boot/board/trizepsiv/eeprom.c
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright 2007
+ * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm9000.h>
+
+static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
+ unsigned int i;
+ u8 data[2];
+
+ for (i=0; i < 0x40; i++) {
+ if (!(i % 0x10))
+ printf("\n%08x:", i);
+ dm9000_read_srom_word(i, data);
+ printf(" %02x%02x", data[1], data[0]);
+ }
+ printf ("\n");
+ return (0);
+}
+
+static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
+ int offset,value;
+
+ if (argc < 4)
+ return cmd_usage(cmdtp);
+
+ offset=simple_strtoul(argv[2],NULL,16);
+ value=simple_strtoul(argv[3],NULL,16);
+ if (offset > 0x40) {
+ printf("Wrong offset : 0x%x\n",offset);
+ return cmd_usage(cmdtp);
+ }
+ dm9000_write_srom_word(offset, value);
+ return (0);
+}
+
+int do_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
+ if (strcmp (argv[1],"read") == 0)
+ return (do_read_dm9000_eeprom(cmdtp,flag,argc,argv));
+ else if (strcmp (argv[1],"write") == 0)
+ return (do_write_dm9000_eeprom(cmdtp,flag,argc,argv));
+ else
+ return cmd_usage(cmdtp);
+}
+
+U_BOOT_CMD(
+ dm9000ee,4,1,do_dm9000_eeprom,
+ "Read/Write eeprom connected to Ethernet Controller",
+ "\ndm9000ee write <word offset> <value> \n"
+ "\tdm9000ee read \n"
+ "\tword:\t\t00-02 : MAC Address\n"
+ "\t\t\t03-07 : DM9000 Configuration\n"
+ "\t\t\t08-63 : User data"
+);