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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/spear/spear600
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/spear/spear600')
-rw-r--r--qemu/roms/u-boot/board/spear/spear600/Makefile10
-rw-r--r--qemu/roms/u-boot/board/spear/spear600/spear600.c58
2 files changed, 68 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/spear/spear600/Makefile b/qemu/roms/u-boot/board/spear/spear600/Makefile
new file mode 100644
index 000000000..7abfb9ad5
--- /dev/null
+++ b/qemu/roms/u-boot/board/spear/spear600/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifndef CONFIG_SPL_BUILD
+obj-y := spear600.o
+endif
diff --git a/qemu/roms/u-boot/board/spear/spear600/spear600.c b/qemu/roms/u-boot/board/spear/spear600/spear600.c
new file mode 100644
index 000000000..8472002f7
--- /dev/null
+++ b/qemu/roms/u-boot/board/spear/spear600/spear600.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <nand.h>
+#include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spr_defs.h>
+#include <asm/arch/spr_misc.h>
+
+static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
+
+int board_init(void)
+{
+ return spear_board_init(MACH_TYPE_SPEAR600);
+}
+
+/*
+ * board_nand_init - Board specific NAND initialization
+ * @nand: mtd private chip structure
+ *
+ * Called by nand_init_chip to initialize the board specific functions
+ */
+
+void board_nand_init()
+{
+ struct misc_regs *const misc_regs_p =
+ (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+ struct nand_chip *nand = &nand_chip[0];
+
+#if defined(CONFIG_NAND_FSMC)
+ if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS))
+ fsmc_nand_init(nand);
+#endif
+ return;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int ret = 0;
+
+#if defined(CONFIG_DESIGNWARE_ETH)
+ u32 interface = PHY_INTERFACE_MODE_MII;
+#if defined(CONFIG_DW_AUTONEG)
+ interface = PHY_INTERFACE_MODE_GMII;
+#endif
+ if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
+ ret++;
+#endif
+ return ret;
+}