Add qemu 2.4.0

Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>

6 files changed, 1344 insertions, 0 deletions

diff --git a/qemu/roms/u-boot/board/sandpoint/Makefile b/qemu/roms/u-boot/board/sandpoint/Makefile
new file mode 100644
index 000000000..58f5a8905
--- /dev/null
+++ b/qemu/roms/u-boot/board/sandpoint/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	= sandpoint.o flash.o
diff --git a/qemu/roms/u-boot/board/sandpoint/README b/qemu/roms/u-boot/board/sandpoint/README
new file mode 100644
index 000000000..c9996a8c0
--- /dev/null
+++ b/qemu/roms/u-boot/board/sandpoint/README
@@ -0,0 +1,411 @@
+This port of U-Boot will run on a Motorola Sandpoint 3 development
+system equipped with a Unity X4 PPMC card (MPC8240 CPU) only. It is a
+snapshot of work in progress and far from being completed. In order
+to run it on the target system, it has to be downloaded using the
+DINK32 monitor program that came with your Sandpoint system. Please
+note that DINK32 does not accept the S-Record file created by the
+U-Boot build process unmodified, because it contains CR/LF line
+terminators. You have to strip the CR characters first. There is a
+tiny script named 'dinkdl' I created for this purpose.
+
+The Sandpoint port is based on the work of Rob Taylor, who does not
+seem to maintain it any more. I can be reached by mail as
+tkoeller@gmx.net.
+
+Thomas Koeller
+
+
+The port was tested on a Sandpoint 8240 X3 board, with U-Boot
+installed in the flash memory of the CPU card. Please use the
+following DIP switch settings:
+
+Motherboard:
+
+SW1.1: on	SW1.2: on	SW1.3: on	SW1.4: on
+SW1.5: on	SW1.6: on	SW1.7: on	SW1.8: on
+
+SW2.1: on	SW2.2: on	SW2.3: on	SW2.4: on
+SW2.5: on	SW2.6: on	SW2.7: on	SW2.8: on
+
+
+CPU Card:
+
+SW2.1: OFF	SW2.2: OFF	SW2.3: on	SW2.4: on
+SW2.5: OFF	SW2.6: OFF	SW2.7: OFF	SW2.8: OFF
+
+SW3.1: OFF	SW3.2: on	SW3.3: OFF	SW3.4: OFF
+SW3.5: on	SW3.6: OFF	SW3.7: OFF	SW3.8: on
+
+
+The followind detailed description of installation and initial steps
+with U-Boot and QNX was provided by Jim Sandoz <sandoz@lucent.com>:
+
+
+Directions for installing U-Boot on Sandpoint+Unity8240
+using the Abatron BDI2000 BDM/JTAG debugger ...
+
+Background and Reference info:
+http://u-boot.sourceforge.net/
+http://www.abatron.ch/
+http://www.abatron.ch/BDI/bdihw.html
+http://www.abatron.ch/DataSheets/BDI2000.pdf
+http://www.abatron.ch/Manuals/ManGdbCOP-2000C.pdf
+http://e-www.motorola.com/collateral/SPX3UM.pdf
+http://e-www.motorola.com/collateral/UNITYX4CONFIG.pdf
+
+
+Connection Diagram:
+					    ===========
+ ===                     =====             |-----      |
+|   | <---------------> |     |            |     |     |
+|PC |       rs232       | BDI |=============[]   |     |
+|   |                   |2000 |  BDM probe |     |     |
+|   | <---------------> |     |            |-----      |
+ ===       ethernet      =====             |           |
+					   |           |
+					    ===========
+					 Sandpoint X3 with
+					  Unity 8240 proc
+
+
+PART 1)
+  DIP Switch Settings:
+
+Sandpoint X3 8240 processor board DIP switch settings, with
+U-Boot to be installed in the flash memory of the CPU card:
+
+Motorola Sandpoint X3 Motherboard:
+SW1.1: on	SW1.2: on	SW1.3: on	SW1.4: on
+SW1.5: on	SW1.6: on	SW1.7: on	SW1.8: on
+SW2.1: on	SW2.2: on	SW2.3: on	SW2.4: on
+SW2.5: on	SW2.6: on	SW2.7: on	SW2.8: on
+
+Motorola Unity 8240 CPU Card:
+SW2.1: OFF	SW2.2: OFF	SW2.3: on	SW2.4: on
+SW2.5: OFF	SW2.6: OFF	SW2.7: OFF	SW2.8: OFF
+SW3.1: OFF	SW3.2: on	SW3.3: OFF	SW3.4: OFF
+SW3.5: on	SW3.6: OFF	SW3.7: OFF	SW3.8: on
+
+
+PART 2)
+  Connect the BDI2000 Cable to the Sandpoint/Unity 8240:
+
+BDM Pin 1 on the Unity 8240 processor board is towards the
+PCI PMC connectors, or away from the socketed SDRAM, i.e.:
+
+  ====================
+  | ---------------- |
+  | |    SDRAM     | |
+  | |              | |
+  | ---------------- |
+  | |~|              |
+  | |B|       ++++++ |
+  | |D|       + uP + |
+  | |M|       +8240+ |
+  |  ~ 1      ++++++ |
+  |                  |
+  |                  |
+  |                  |
+  | PMC conn ======  |
+  |   =====  ======  |
+  |                  |
+  ====================
+
+
+PART 3)
+  Setting up the BDI2000, and preparing for TCP/IP network comms:
+
+Connect the BDI2000 to the PC using the supplied serial cable.
+Download the BDI2000 software and install it using setup.exe.
+
+[Note: of course you  can  also  use  the  Linux  command  line  tool
+"bdisetup"  to  configure  your BDI2000 - the sources are included on
+the floppy disk that comes with your BDI2000. Just in case you  don't
+have any Windows PC's - like me :-)   -- wd ]
+
+Power up the BDI2000; then follow directions to assign the IP
+address and related network information.  Note that U-Boot
+will be loaded to the Sandpoint via tftp.  You need to either
+use the Abatron-provided tftp application or provide a tftp
+server (e.g. Linux/Solaris/*BSD) somewhere on your network.
+Once the IP address etc are assigned via the RS232 port,
+further communication with the BDI2000 will happen via the
+ethernet connection.
+
+PART 4)
+  Making a TCP/IP network connection to the Abatron BDI2000:
+
+Telnet to the Abatron BDI2000.  Assuming that all of the
+networking info was loaded via RS232 correctly, you will see
+the following (scrolling):
+
+- TARGET: waiting for target Vcc
+- TARGET: waiting for target Vcc
+
+
+PART 5)
+  Power up the target Sandpoint:
+If the BDM connections are correct, the following will now appear:
+
+- TARGET: waiting for target Vcc
+- TARGET: waiting for target Vcc
+- TARGET: processing power-up delay
+- TARGET: processing user reset request
+- BDI asserts HRESET
+- Reset JTAG controller passed
+- Bypass check: 0x55 => 0xAA
+- Bypass check: 0x55 => 0xAA
+- JTAG exists check passed
+- Target PVR is 0x00810101
+- COP status is 0x01
+- Check running state passed
+- BDI scans COP freeze command
+- BDI removes HRESET
+- COP status is 0x05
+- Check stopped state passed
+- Check LSRL length passed
+- BDI sets breakpoint at 0xFFF00100
+- BDI resumes program execution
+- Waiting for target stop passed
+- TARGET: Target PVR is 0x00810101
+- TARGET: reseting target passed
+- TARGET: processing target startup ....
+- TARGET: processing target startup passed
+BDI>
+
+
+PART 6)
+  Erase the current contents of the flash memory:
+
+BDI>era 0xFFF00000
+    Erasing flash at 0xfff00000
+    Erasing flash passed
+BDI>era 0xFFF04000
+    Erasing flash at 0xfff04000
+    Erasing flash passed
+BDI>era 0xFFF06000
+    Erasing flash at 0xfff06000
+    Erasing flash passed
+BDI>era 0xFFF08000
+    Erasing flash at 0xfff08000
+    Erasing flash passed
+BDI>era 0xFFF10000
+    Erasing flash at 0xfff10000
+    Erasing flash passed
+BDI>era 0xFFF20000
+    Erasing flash at 0xfff20000
+    Erasing flash passed
+
+
+PART 7)
+  Program the flash memory with the U-Boot image:
+
+BDI>prog 0xFFF00000 u-boot.bin bin
+    Programming u-boot.bin , please wait ....
+    Programming flash passed
+
+
+PART 8)
+  Connect PC to Sandpoint:
+Using a crossover serial cable, attach the PC serial port to the
+Sandpoint's COM1.  Set communications parameters to 8N1 / 9600 baud.
+
+
+PART 9)
+  Reset the Unity and begin U-Boot execution:
+
+BDI>reset
+- TARGET: processing user reset request
+- TARGET: Target PVR is 0x00810101
+- TARGET: reseting target passed
+- TARGET: processing target init list ....
+- TARGET: processing target init list passed
+
+BDI>go
+
+Now see output from U-Boot running, sent via serial port:
+
+U-Boot 1.1.4 (Jan 23 2002 - 18:29:19)
+
+CPU:   MPC8240 Revision 1.1 at 264 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: Sandpoint 8240 Unity
+DRAM:  64 MB
+FLASH:  2 MB
+PCI:    scanning bus0 ...
+  bus dev fn venID devID class  rev MBAR0    MBAR1    IPIN ILINE
+  00  00  00 1057  0003  060000 13  00000008 00000000 01   00
+  00  0b  00 10ad  0565  060100 10  00000000 00000000 00   00
+  00  0f  00 8086  1229  020000 08  80000000 80000001 01   00
+In:    serial
+Out:   serial
+Err:   serial
+=>
+
+
+PART 10)
+  Set and save any required environmental variables, examples of some:
+
+=> setenv ethaddr 00:03:47:97:D0:79
+=> setenv bootfile your_qnx_image_here
+=> setenv hostname sandpointX
+=> setenv netmask 255.255.255.0
+=> setenv ipaddr 192.168.0.11
+=> setenv serverip 192.168.0.10
+=> setenv gatewayip=192.168.0.1
+=> saveenv
+Saving Environment to Flash...
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Writing to Flash... done
+Protected 1 sectors
+=>
+
+**** Example environment: ****
+
+=> printenv
+baudrate=9600
+bootfile=telemetry
+hostname=sp1
+ethaddr=00:03:47:97:E4:6B
+load=tftp 100000 u-boot.bin
+update=protect off all;era FFF00000 FFF3FFFF;cp.b 100000 FFF00000 ${filesize};saveenv
+filesize=1f304
+gatewayip=145.17.228.1
+netmask=255.255.255.0
+ipaddr=145.17.228.42
+serverip=145.17.242.46
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 332/8188 bytes
+=>
+
+here's some text useful stuff for cut-n-paste:
+setenv hostname sandpoint1
+setenv netmask 255.255.255.0
+setenv ipaddr 145.17.228.81
+setenv serverip 145.17.242.46
+setenv gatewayip 145.17.228.1
+saveenv
+
+PART 11)
+  Test U-Boot by tftp'ing new U-Boot, overwriting current:
+
+=> protect off all
+Un-Protect Flash Bank # 1
+=> tftp 100000 u-boot.bin
+eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
+ARP broadcast 1
+TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
+ gateway 145.17.228.1
+Filename 'u-boot.bin'.
+Load address: 0x100000
+Loading: #########################
+done
+Bytes transferred = 127628 (1f28c hex)
+=> era all
+Erase Flash Bank # 1
+ done
+Erase Flash Bank # 2 - missing
+=> cp.b 0x100000 FFF00000 1f28c
+Copy to Flash... done
+=> saveenv
+Saving Environment to Flash...
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Writing to Flash... done
+Protected 1 sectors
+=> reset
+
+You can put these commands into some environment variables;
+
+=> setenv load tftp 100000 u-boot.bin
+=> setenv update protect off all\;era FFF00000 FFF3FFFF\;cp.b 100000 FFF00000 \${filesize}\;saveenv
+=> saveenv
+
+Then you just have to type "run load" then "run update"
+
+=> run load
+eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
+ARP broadcast 1
+TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
+ gateway 145.17.228.1
+Filename 'u-boot.bin'.
+Load address: 0x100000
+Loading: #########################
+done
+Bytes transferred = 127748 (1f304 hex)
+=> run update
+Un-Protect Flash Bank # 1
+Un-Protect Flash Bank # 2
+Erase Flash from 0xfff00000 to 0xfff3ffff
+ done
+Erased 7 sectors
+Copy to Flash... done
+Saving Environment to Flash...
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Writing to Flash... done
+Protected 1 sectors
+=>
+
+
+PART 12)
+  Load OS image (ELF format) via U-Boot using tftp
+
+
+=> tftp 800000 sandpoint-simple.elf
+eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
+ARP broadcast 1
+TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
+ gateway 145.17.228.1
+Filename 'sandpoint-simple.elf'.
+Load address: 0x800000
+Loading: #################################################################
+	 #################################################################
+	 #################################################################
+	 ########################
+done
+Bytes transferred = 1120284 (11181c hex)
+==>
+
+PART 13)
+  Begin OS image execution: (note that unless you have the
+serial parameters of your OS image set to 9600 (i.e. same as
+the U-Boot binary) you will get garbage here until you change
+the serial communications speed.
+
+=> bootelf 800000
+Loading  @ 0x001f0100 (1120028 bytes)
+## Starting application at 0x001f1d28 ...
+Replace init_hwinfo() with a board specific version
+
+Loading QNX6....
+
+Header size=0x0000009c, Total Size=0x000005c0, #Cpu=1, Type=1
+<...loader and kernel messages snipped...>
+
+Welcome to Neutrino on the Sandpoint
+#
+
+
+other information:
+
+CVS Retrieval Notes:
+
+U-Boot's SourceForge CVS repository can be checked out
+through anonymous (pserver) CVS with the following
+instruction set. The module you wish to check out must
+be specified as the modulename. When prompted for a
+password for anonymous, simply press the Enter key.
+
+cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
+
+cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
diff --git a/qemu/roms/u-boot/board/sandpoint/dinkdl b/qemu/roms/u-boot/board/sandpoint/dinkdl
new file mode 100644
index 000000000..f281452eb
--- /dev/null
+++ b/qemu/roms/u-boot/board/sandpoint/dinkdl
@@ -0,0 +1,2 @@
+#! /bin/bash
+tr -d "\r" <$1 >/dev/tts/1
diff --git a/qemu/roms/u-boot/board/sandpoint/flash.c b/qemu/roms/u-boot/board/sandpoint/flash.c
new file mode 100644
index 000000000..1ab668ce8
--- /dev/null
+++ b/qemu/roms/u-boot/board/sandpoint/flash.c
@@ -0,0 +1,748 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <asm/processor.h>
+#include <asm/pci_io.h>
+#include <w83c553f.h>
+
+#define ROM_CS0_START	0xFF800000
+#define ROM_CS1_START	0xFF000000
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips    */
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+# ifndef  CONFIG_ENV_ADDR
+#  define CONFIG_ENV_ADDR  (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+# endif
+# ifndef  CONFIG_ENV_SIZE
+#  define CONFIG_ENV_SIZE  CONFIG_ENV_SECT_SIZE
+# endif
+# ifndef  CONFIG_ENV_SECT_SIZE
+#  define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
+# endif
+#endif
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+#if 0
+static void flash_get_offsets (ulong base, flash_info_t *info);
+#endif /* 0 */
+
+/*flash command address offsets*/
+
+#if 0
+#define ADDR0           (0x555)
+#define ADDR1           (0x2AA)
+#define ADDR3           (0x001)
+#else
+#define ADDR0		(0xAAA)
+#define ADDR1		(0x555)
+#define ADDR3		(0x001)
+#endif
+
+#define FLASH_WORD_SIZE unsigned char
+
+/*-----------------------------------------------------------------------
+ */
+
+#if 0
+static int byte_parity_odd(unsigned char x) __attribute__ ((const));
+#endif /* 0 */
+static unsigned long flash_id(unsigned char mfct, unsigned char chip) __attribute__ ((const));
+
+typedef struct
+{
+  FLASH_WORD_SIZE extval;
+  unsigned short intval;
+} map_entry;
+
+#if 0
+static int
+byte_parity_odd(unsigned char x)
+{
+  x ^= x >> 4;
+  x ^= x >> 2;
+  x ^= x >> 1;
+  return (x & 0x1) != 0;
+}
+#endif /* 0 */
+
+
+static unsigned long
+flash_id(unsigned char mfct, unsigned char chip)
+{
+  static const map_entry mfct_map[] =
+    {
+      {(FLASH_WORD_SIZE) AMD_MANUFACT,	(unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
+      {(FLASH_WORD_SIZE) FUJ_MANUFACT,	(unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
+      {(FLASH_WORD_SIZE) STM_MANUFACT,	(unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
+      {(FLASH_WORD_SIZE) MT_MANUFACT,	(unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
+      {(FLASH_WORD_SIZE) INTEL_MANUFACT,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
+      {(FLASH_WORD_SIZE) INTEL_ALT_MANU,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
+    };
+
+  static const map_entry chip_map[] =
+  {
+    {AMD_ID_F040B,	FLASH_AM040},
+    {(FLASH_WORD_SIZE) STM_ID_x800AB,	FLASH_STM800AB}
+  };
+
+  const map_entry *p;
+  unsigned long result = FLASH_UNKNOWN;
+
+  /* find chip id */
+  for(p = &chip_map[0]; p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++)
+    if(p->extval == chip)
+    {
+      result = FLASH_VENDMASK | p->intval;
+      break;
+    }
+
+  /* find vendor id */
+  for(p = &mfct_map[0]; p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++)
+    if(p->extval == mfct)
+    {
+      result &= ~FLASH_VENDMASK;
+      result |= (unsigned long) p->intval << 16;
+      break;
+    }
+
+  return result;
+}
+
+
+unsigned long
+flash_init(void)
+{
+  unsigned long i;
+  unsigned char j;
+  static const ulong flash_banks[] = CONFIG_SYS_FLASH_BANKS;
+
+  /* Init: no FLASHes known */
+  for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
+  {
+    flash_info_t * const pflinfo = &flash_info[i];
+    pflinfo->flash_id = FLASH_UNKNOWN;
+    pflinfo->size = 0;
+    pflinfo->sector_count = 0;
+  }
+
+  /* Enable writes to Sandpoint flash */
+  {
+    register unsigned char temp;
+    CONFIG_READ_BYTE(CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
+    temp &= ~0x20; /* clear BIOSWP bit */
+    CONFIG_WRITE_BYTE(CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
+  }
+
+  for(i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++)
+  {
+    flash_info_t * const pflinfo = &flash_info[i];
+    const unsigned long base_address = flash_banks[i];
+    volatile FLASH_WORD_SIZE * const flash = (FLASH_WORD_SIZE *) base_address;
+#if 0
+    volatile FLASH_WORD_SIZE * addr2;
+#endif
+#if 0
+    /* write autoselect sequence */
+    flash[0x5555] = 0xaa;
+    flash[0x2aaa] = 0x55;
+    flash[0x5555] = 0x90;
+#else
+    flash[0xAAA << (3 * i)] = 0xaa;
+    flash[0x555 << (3 * i)] = 0x55;
+    flash[0xAAA << (3 * i)] = 0x90;
+#endif
+    __asm__ __volatile__("sync");
+
+#if 0
+    pflinfo->flash_id = flash_id(flash[0x0], flash[0x1]);
+#else
+    pflinfo->flash_id = flash_id(flash[0x0], flash[0x2 + 14 * i]);
+#endif
+
+    switch(pflinfo->flash_id & FLASH_TYPEMASK)
+    {
+      case FLASH_AM040:
+	pflinfo->size = 0x00080000;
+	pflinfo->sector_count = 8;
+	for(j = 0; j < 8; j++)
+	{
+	  pflinfo->start[j] = base_address + 0x00010000 * j;
+	  pflinfo->protect[j] = flash[(j << 16) | 0x2];
+	}
+	break;
+      case FLASH_STM800AB:
+	pflinfo->size = 0x00100000;
+	pflinfo->sector_count = 19;
+	pflinfo->start[0] = base_address;
+	pflinfo->start[1] = base_address + 0x4000;
+	pflinfo->start[2] = base_address + 0x6000;
+	pflinfo->start[3] = base_address + 0x8000;
+	for(j = 1; j < 16; j++)
+	{
+	  pflinfo->start[j+3] = base_address + 0x00010000 * j;
+	}
+#if 0
+	/* check for protected sectors */
+	for (j = 0; j < pflinfo->sector_count; j++) {
+	  /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+	  /* D0 = 1 if protected */
+	  addr2 = (volatile FLASH_WORD_SIZE *)(pflinfo->start[j]);
+	    if (pflinfo->flash_id & FLASH_MAN_SST)
+	      pflinfo->protect[j] = 0;
+	    else
+	      pflinfo->protect[j] = addr2[2] & 1;
+	}
+#endif
+	break;
+    }
+    /* Protect monitor and environment sectors
+     */
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
+    flash_protect(FLAG_PROTECT_SET,
+		CONFIG_SYS_MONITOR_BASE,
+		CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
+		&flash_info[0]);
+#endif
+
+#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
+    flash_protect(FLAG_PROTECT_SET,
+		CONFIG_ENV_ADDR,
+		CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
+		&flash_info[0]);
+#endif
+
+    /* reset device to read mode */
+    flash[0x0000] = 0xf0;
+    __asm__ __volatile__("sync");
+  }
+
+    return flash_info[0].size + flash_info[1].size;
+}
+
+#if 0
+static void
+flash_get_offsets (ulong base, flash_info_t *info)
+{
+    int i;
+
+    /* set up sector start address table */
+	if (info->flash_id & FLASH_MAN_SST)
+	  {
+	    for (i = 0; i < info->sector_count; i++)
+	      info->start[i] = base + (i * 0x00010000);
+	  }
+	else
+    if (info->flash_id & FLASH_BTYPE) {
+	/* set sector offsets for bottom boot block type    */
+	info->start[0] = base + 0x00000000;
+	info->start[1] = base + 0x00004000;
+	info->start[2] = base + 0x00006000;
+	info->start[3] = base + 0x00008000;
+	for (i = 4; i < info->sector_count; i++) {
+	    info->start[i] = base + (i * 0x00010000) - 0x00030000;
+	}
+    } else {
+	/* set sector offsets for top boot block type       */
+	i = info->sector_count - 1;
+	info->start[i--] = base + info->size - 0x00004000;
+	info->start[i--] = base + info->size - 0x00006000;
+	info->start[i--] = base + info->size - 0x00008000;
+	for (; i >= 0; i--) {
+	    info->start[i] = base + i * 0x00010000;
+	}
+    }
+
+}
+#endif /* 0 */
+
+/*-----------------------------------------------------------------------
+ */
+void
+flash_print_info(flash_info_t *info)
+{
+  static const char unk[] = "Unknown";
+  const char *mfct = unk, *type = unk;
+  unsigned int i;
+
+  if(info->flash_id != FLASH_UNKNOWN)
+  {
+    switch(info->flash_id & FLASH_VENDMASK)
+    {
+      case FLASH_MAN_AMD:	mfct = "AMD";				break;
+      case FLASH_MAN_FUJ:	mfct = "FUJITSU";			break;
+      case FLASH_MAN_STM:	mfct = "STM";				break;
+      case FLASH_MAN_SST:	mfct = "SST";				break;
+      case FLASH_MAN_BM:	mfct = "Bright Microelectonics";	break;
+      case FLASH_MAN_INTEL:	mfct = "Intel";				break;
+    }
+
+    switch(info->flash_id & FLASH_TYPEMASK)
+    {
+      case FLASH_AM040:		type = "AM29F040B (512K * 8, uniform sector size)";	break;
+      case FLASH_AM400B:	type = "AM29LV400B (4 Mbit, bottom boot sect)";		break;
+      case FLASH_AM400T:	type = "AM29LV400T (4 Mbit, top boot sector)";		break;
+      case FLASH_AM800B:	type = "AM29LV800B (8 Mbit, bottom boot sect)";		break;
+      case FLASH_AM800T:	type = "AM29LV800T (8 Mbit, top boot sector)";		break;
+      case FLASH_AM160T:	type = "AM29LV160T (16 Mbit, top boot sector)";		break;
+      case FLASH_AM320B:	type = "AM29LV320B (32 Mbit, bottom boot sect)";	break;
+      case FLASH_AM320T:	type = "AM29LV320T (32 Mbit, top boot sector)";		break;
+      case FLASH_STM800AB:	type = "M29W800AB (8 Mbit, bottom boot sect)";		break;
+      case FLASH_SST800A:	type = "SST39LF/VF800 (8 Mbit, uniform sector size)";	break;
+      case FLASH_SST160A:	type = "SST39LF/VF160 (16 Mbit, uniform sector size)";	break;
+    }
+  }
+
+  printf(
+    "\n  Brand: %s Type: %s\n"
+    "  Size: %lu KB in %d Sectors\n",
+    mfct,
+    type,
+    info->size >> 10,
+    info->sector_count
+  );
+
+  printf ("  Sector Start Addresses:");
+
+  for (i = 0; i < info->sector_count; i++)
+  {
+    unsigned long size;
+    unsigned int erased;
+    unsigned long * flash = (unsigned long *) info->start[i];
+
+    /*
+     * Check if whole sector is erased
+     */
+    size =
+      (i != (info->sector_count - 1)) ?
+      (info->start[i + 1] - info->start[i]) >> 2 :
+      (info->start[0] + info->size - info->start[i]) >> 2;
+
+    for(
+      flash = (unsigned long *) info->start[i], erased = 1;
+      (flash != (unsigned long *) info->start[i] + size) && erased;
+      flash++
+    )
+      erased = *flash == ~0x0UL;
+
+    printf(
+      "%s %08lX %s %s",
+      (i % 5) ? "" : "\n   ",
+      info->start[i],
+      erased ? "E" : " ",
+      info->protect[i] ? "RO" : "  "
+    );
+  }
+
+  puts("\n");
+  return;
+}
+
+#if 0
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+ulong
+flash_get_size (vu_long *addr, flash_info_t *info)
+{
+   short i;
+    FLASH_WORD_SIZE value;
+    ulong base = (ulong)addr;
+	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
+
+    printf("flash_get_size: \n");
+    /* Write auto select command: read Manufacturer ID */
+    eieio();
+    addr2[ADDR0] = (FLASH_WORD_SIZE)0xAA;
+    addr2[ADDR1] = (FLASH_WORD_SIZE)0x55;
+    addr2[ADDR0] = (FLASH_WORD_SIZE)0x90;
+    value = addr2[0];
+
+    switch (value) {
+    case (FLASH_WORD_SIZE)AMD_MANUFACT:
+	info->flash_id = FLASH_MAN_AMD;
+	break;
+    case (FLASH_WORD_SIZE)FUJ_MANUFACT:
+	info->flash_id = FLASH_MAN_FUJ;
+	break;
+    case (FLASH_WORD_SIZE)SST_MANUFACT:
+	info->flash_id = FLASH_MAN_SST;
+	break;
+    default:
+	info->flash_id = FLASH_UNKNOWN;
+	info->sector_count = 0;
+	info->size = 0;
+	return (0);         /* no or unknown flash  */
+    }
+    printf("recognised manufacturer");
+
+    value = addr2[ADDR3];          /* device ID        */
+	debug ("\ndev_code=%x\n", value);
+
+    switch (value) {
+    case (FLASH_WORD_SIZE)AMD_ID_LV400T:
+	info->flash_id += FLASH_AM400T;
+	info->sector_count = 11;
+	info->size = 0x00080000;
+	break;              /* => 0.5 MB        */
+
+    case (FLASH_WORD_SIZE)AMD_ID_LV400B:
+	info->flash_id += FLASH_AM400B;
+	info->sector_count = 11;
+	info->size = 0x00080000;
+	break;              /* => 0.5 MB        */
+
+    case (FLASH_WORD_SIZE)AMD_ID_LV800T:
+	info->flash_id += FLASH_AM800T;
+	info->sector_count = 19;
+	info->size = 0x00100000;
+	break;              /* => 1 MB      */
+
+    case (FLASH_WORD_SIZE)AMD_ID_LV800B:
+	info->flash_id += FLASH_AM800B;
+	info->sector_count = 19;
+	info->size = 0x00100000;
+	break;              /* => 1 MB      */
+
+    case (FLASH_WORD_SIZE)AMD_ID_LV160T:
+	info->flash_id += FLASH_AM160T;
+	info->sector_count = 35;
+	info->size = 0x00200000;
+	break;              /* => 2 MB      */
+
+    case (FLASH_WORD_SIZE)AMD_ID_LV160B:
+	info->flash_id += FLASH_AM160B;
+	info->sector_count = 35;
+	info->size = 0x00200000;
+	break;              /* => 2 MB      */
+
+    case (FLASH_WORD_SIZE)SST_ID_xF800A:
+	info->flash_id += FLASH_SST800A;
+	info->sector_count = 16;
+	info->size = 0x00100000;
+	break;              /* => 1 MB      */
+
+    case (FLASH_WORD_SIZE)SST_ID_xF160A:
+	info->flash_id += FLASH_SST160A;
+	info->sector_count = 32;
+	info->size = 0x00200000;
+	break;              /* => 2 MB      */
+
+    case (FLASH_WORD_SIZE)AMD_ID_F040B:
+	info->flash_id += FLASH_AM040;
+	info->sector_count = 8;
+	info->size = 0x00080000;
+	break;              /* => 0.5 MB      */
+
+    default:
+	info->flash_id = FLASH_UNKNOWN;
+	return (0);         /* => no or unknown flash */
+
+    }
+
+    printf("flash id %lx; sector count %x, size %lx\n", info->flash_id,info->sector_count,info->size);
+    /* set up sector start address table */
+	if (info->flash_id & FLASH_MAN_SST)
+	  {
+	    for (i = 0; i < info->sector_count; i++)
+	      info->start[i] = base + (i * 0x00010000);
+	  }
+	else
+    if (info->flash_id & FLASH_BTYPE) {
+	/* set sector offsets for bottom boot block type    */
+	info->start[0] = base + 0x00000000;
+	info->start[1] = base + 0x00004000;
+	info->start[2] = base + 0x00006000;
+	info->start[3] = base + 0x00008000;
+	for (i = 4; i < info->sector_count; i++) {
+	    info->start[i] = base + (i * 0x00010000) - 0x00030000;
+	}
+    } else {
+	/* set sector offsets for top boot block type       */
+	i = info->sector_count - 1;
+	info->start[i--] = base + info->size - 0x00004000;
+	info->start[i--] = base + info->size - 0x00006000;
+	info->start[i--] = base + info->size - 0x00008000;
+	for (; i >= 0; i--) {
+	    info->start[i] = base + i * 0x00010000;
+	}
+    }
+
+    /* check for protected sectors */
+    for (i = 0; i < info->sector_count; i++) {
+	/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+	/* D0 = 1 if protected */
+	addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
+		if (info->flash_id & FLASH_MAN_SST)
+		  info->protect[i] = 0;
+		else
+		  info->protect[i] = addr2[2] & 1;
+    }
+
+    /*
+     * Prevent writes to uninitialized FLASH.
+     */
+    if (info->flash_id != FLASH_UNKNOWN) {
+       addr2 = (FLASH_WORD_SIZE *)info->start[0];
+	*addr2 = (FLASH_WORD_SIZE)0x00F000F0;   /* reset bank */
+    }
+
+    return (info->size);
+}
+
+#endif
+
+
+int
+flash_erase(flash_info_t *info, int s_first, int s_last)
+{
+    volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
+    int flag, prot, sect, l_sect;
+    ulong start, now, last;
+    unsigned char sh8b;
+
+    if ((s_first < 0) || (s_first > s_last)) {
+	if (info->flash_id == FLASH_UNKNOWN) {
+	    printf ("- missing\n");
+	} else {
+	    printf ("- no sectors to erase\n");
+	}
+	return 1;
+    }
+
+    if ((info->flash_id == FLASH_UNKNOWN) ||
+	(info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
+	printf ("Can't erase unknown flash type - aborted\n");
+	return 1;
+    }
+
+    prot = 0;
+    for (sect=s_first; sect<=s_last; ++sect) {
+	if (info->protect[sect]) {
+	    prot++;
+	}
+    }
+
+    if (prot) {
+	printf ("- Warning: %d protected sectors will not be erased!\n",
+	    prot);
+    } else {
+	printf ("\n");
+    }
+
+    l_sect = -1;
+
+    /* Check the ROM CS */
+    if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START))
+      sh8b = 3;
+    else
+      sh8b = 0;
+
+    /* Disable interrupts which might cause a timeout here */
+    flag = disable_interrupts();
+
+    addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
+    addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
+    addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
+    addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
+    addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
+
+    /* Start erase on unprotected sectors */
+    for (sect = s_first; sect<=s_last; sect++) {
+	if (info->protect[sect] == 0) { /* not protected */
+	    addr = (FLASH_WORD_SIZE *)(info->start[0] + (
+				(info->start[sect] - info->start[0]) << sh8b));
+			if (info->flash_id & FLASH_MAN_SST)
+			  {
+			    addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
+			    addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
+			    addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
+			    addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
+			    addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
+			    addr[0] = (FLASH_WORD_SIZE)0x00500050;  /* block erase */
+			    udelay(30000);  /* wait 30 ms */
+			  }
+			else
+			  addr[0] = (FLASH_WORD_SIZE)0x00300030;  /* sector erase */
+	    l_sect = sect;
+	}
+    }
+
+    /* re-enable interrupts if necessary */
+    if (flag)
+	enable_interrupts();
+
+    /* wait at least 80us - let's wait 1 ms */
+    udelay (1000);
+
+    /*
+     * We wait for the last triggered sector
+     */
+    if (l_sect < 0)
+	goto DONE;
+
+    start = get_timer (0);
+    last  = start;
+    addr = (FLASH_WORD_SIZE *)(info->start[0] + (
+			(info->start[l_sect] - info->start[0]) << sh8b));
+    while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
+	if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+	    printf ("Timeout\n");
+	    return 1;
+	}
+	/* show that we're waiting */
+	if ((now - last) > 1000) {  /* every second */
+	    serial_putc ('.');
+	    last = now;
+	}
+    }
+
+DONE:
+    /* reset to read mode */
+    addr = (FLASH_WORD_SIZE *)info->start[0];
+    addr[0] = (FLASH_WORD_SIZE)0x00F000F0;  /* reset bank */
+
+    printf (" done\n");
+    return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+    ulong cp, wp, data;
+    int i, l, rc;
+
+    wp = (addr & ~3);   /* get lower word aligned address */
+
+    /*
+     * handle unaligned start bytes
+     */
+    if ((l = addr - wp) != 0) {
+	data = 0;
+	for (i=0, cp=wp; i<l; ++i, ++cp) {
+	    data = (data << 8) | (*(uchar *)cp);
+	}
+	for (; i<4 && cnt>0; ++i) {
+	    data = (data << 8) | *src++;
+	    --cnt;
+	    ++cp;
+	}
+	for (; cnt==0 && i<4; ++i, ++cp) {
+	    data = (data << 8) | (*(uchar *)cp);
+	}
+
+	if ((rc = write_word(info, wp, data)) != 0) {
+	    return (rc);
+	}
+	wp += 4;
+    }
+
+    /*
+     * handle word aligned part
+     */
+    while (cnt >= 4) {
+	data = 0;
+	for (i=0; i<4; ++i) {
+	    data = (data << 8) | *src++;
+	}
+	if ((rc = write_word(info, wp, data)) != 0) {
+	    return (rc);
+	}
+	wp  += 4;
+	cnt -= 4;
+    }
+
+    if (cnt == 0) {
+	return (0);
+    }
+
+    /*
+     * handle unaligned tail bytes
+     */
+    data = 0;
+    for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+	data = (data << 8) | *src++;
+	--cnt;
+    }
+    for (; i<4; ++i, ++cp) {
+	data = (data << 8) | (*(uchar *)cp);
+    }
+
+    return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0];
+	volatile FLASH_WORD_SIZE *dest2;
+	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
+    ulong start;
+    int flag;
+	int i;
+    unsigned char sh8b;
+
+    /* Check the ROM CS */
+    if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START))
+      sh8b = 3;
+    else
+      sh8b = 0;
+
+    dest2 = (FLASH_WORD_SIZE *)(((dest - info->start[0]) << sh8b) +
+				info->start[0]);
+
+    /* Check if Flash is (sufficiently) erased */
+    if ((*dest2 & (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
+	return (2);
+    }
+    /* Disable interrupts which might cause a timeout here */
+    flag = disable_interrupts();
+
+	for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
+	  {
+	    addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
+	    addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
+	    addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0;
+
+	    dest2[i << sh8b] = data2[i];
+
+	    /* re-enable interrupts if necessary */
+	    if (flag)
+	      enable_interrupts();
+
+	    /* data polling for D7 */
+	    start = get_timer (0);
+	    while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) !=
+		   (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
+	      if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+		return (1);
+	      }
+	    }
+	  }
+
+    return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
diff --git a/qemu/roms/u-boot/board/sandpoint/sandpoint.c b/qemu/roms/u-boot/board/sandpoint/sandpoint.c
new file mode 100644
index 000000000..16237bd52
--- /dev/null
+++ b/qemu/roms/u-boot/board/sandpoint/sandpoint.c
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2000
+ * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <pci.h>
+#include <netdev.h>
+
+int checkboard (void)
+{
+	/*TODO: Check processor type */
+
+	puts (	"Board: Sandpoint "
+#ifdef CONFIG_MPC8240
+		"8240"
+#endif
+#ifdef CONFIG_MPC8245
+		"8245"
+#endif
+		" Unity ##Test not implemented yet##\n");
+	return 0;
+}
+
+#if 0	/* NOT USED */
+int checkflash (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("## Test not implemented yet ##\n");
+
+	return (0);
+}
+#endif
+
+phys_size_t initdram (int board_type)
+{
+	long size;
+	long new_bank0_end;
+	long mear1;
+	long emear1;
+
+	size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
+
+	new_bank0_end = size - 1;
+	mear1 = mpc824x_mpc107_getreg(MEAR1);
+	emear1 = mpc824x_mpc107_getreg(EMEAR1);
+	mear1 = (mear1  & 0xFFFFFF00) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+	emear1 = (emear1 & 0xFFFFFF00) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+	mpc824x_mpc107_setreg(MEAR1, mear1);
+	mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+	return (size);
+}
+
+/*
+ * Initialize PCI Devices, report devices found.
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_sandpoint_config_table[] = {
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
+				       PCI_ENET1_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ }
+};
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+	config_table: pci_sandpoint_config_table,
+#endif
+};
+
+void pci_init_board(void)
+{
+	pci_mpc824x_init(&hose);
+}
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}
diff --git a/qemu/roms/u-boot/board/sandpoint/u-boot.lds b/qemu/roms/u-boot/board/sandpoint/u-boot.lds
new file mode 100644
index 000000000..cd9f07c51
--- /dev/null
+++ b/qemu/roms/u-boot/board/sandpoint/u-boot.lds
@@ -0,0 +1,84 @@
+/*
+ * (C) Copyright 2001-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+OUTPUT_ARCH(powerpc)
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    arch/powerpc/cpu/mpc824x/start.o	(.text*)
+    *(.text.v*printf)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/env_embedded.o	(.ppcenv*)
+
+    *(.text*)
+    . = ALIGN(16);
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+  }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    _GOT2_TABLE_ = .;
+    KEEP(*(.got2))
+    KEEP(*(.got))
+    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
+    _FIXUP_TABLE_ = .;
+    KEEP(*(.fixup))
+  }
+  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data*)
+    *(.sdata*)
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+
+  . = ALIGN(4);
+  .u_boot_list : {
+	KEEP(*(SORT(.u_boot_list*)));
+  }
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   *(.bss*)
+   *(.sbss*)
+   *(COMMON)
+   . = ALIGN(4);
+  }
+  __bss_end = . ;
+  PROVIDE (end = .);
+}