Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

3 files changed, 0 insertions, 315 deletions

diff --git a/qemu/roms/u-boot/board/renesas/ecovec/Makefile b/qemu/roms/u-boot/board/renesas/ecovec/Makefile
deleted file mode 100644
index 943fa4760..000000000
--- a/qemu/roms/u-boot/board/renesas/ecovec/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Copyright (C) 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-# Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-
-obj-y := ecovec.o
-obj-y += lowlevel_init.o
diff --git a/qemu/roms/u-boot/board/renesas/ecovec/ecovec.c b/qemu/roms/u-boot/board/renesas/ecovec/ecovec.c
deleted file mode 100644
index 2804d9133..000000000
--- a/qemu/roms/u-boot/board/renesas/ecovec/ecovec.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (C) 2009, 2011 Renesas Solutions Corp.
- * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
- * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <i2c.h>
-#include <netdev.h>
-
-/* USB power management register */
-#define UPONCR0 0xA40501D4
-
-int checkboard(void)
-{
-	puts("BOARD: ecovec\n");
-	return 0;
-}
-
-int dram_init(void)
-{
-	DECLARE_GLOBAL_DATA_PTR;
-
-	gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
-	printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
-	return 0;
-}
-
-static void debug_led(u8 led)
-{
-	/* PDGR[0-4] is debug LED */
-	outb((inb(PGDR) & ~0x0F) | (led & 0x0F), PGDR);
-}
-
-int board_late_init(void)
-{
-	u8 mac[6];
-	char env_mac[17];
-
-	udelay(1000);
-
-	/* SH-Eth (PLCR, PNCR, PXCR, PSELx )*/
-	outw(inw(PLCR) & ~0xFFF0, PLCR);
-	outw(inw(PNCR) & ~0x000F, PNCR);
-	outw(inw(PXCR) & ~0x0FC0, PXCR);
-	outw((inw(PSELB) & ~0x030F) | 0x020A, PSELB);
-	outw((inw(PSELC) & ~0x0307) | 0x0207, PSELC);
-	outw((inw(PSELE) & ~0x00c0) | 0x0080, PSELE);
-
-	debug_led(1 << 3);
-
-	outl(inl(MSTPCR2) & ~0x10000000, MSTPCR2);
-
-	i2c_set_bus_num(1); /* Use I2C 1 */
-
-	/* Read MAC address */
-	i2c_read(0x50, 0x10, 0, mac, 6);
-
-	/* Set MAC address */
-	sprintf(env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
-		mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
-	setenv("ethaddr", env_mac);
-
-	debug_led(0x0F);
-
-	return 0;
-}
-
-int board_init(void)
-{
-
-	/* LED (PTG) */
-	outw((inw(PGCR) & ~0xFF) | 0x55, PGCR);
-	outw((inw(HIZCRA) & ~0x02), HIZCRA);
-
-	debug_led(1 << 0);
-
-	/* SCIF0 (PTF, PTM) */
-	outw(inw(PFCR) & ~0x30, PFCR);
-	outw(inw(PMCR) & ~0x0C, PMCR);
-	outw((inw(PSELA) & ~0x40) | 0x40, PSELA);
-
-	debug_led(1 << 1);
-
-	/* RMII (PTA) */
-	outw((inw(PACR) & ~0x0C) | 0x04, PACR);
-	outb((inb(PADR) & ~0x02) | 0x02, PADR);
-
-	debug_led(1 << 2);
-
-	/* USB host */
-	outw((inw(PBCR) & ~0x300) | 0x100, PBCR);
-	outb((inb(PBDR) & ~0x10) | 0x10, PBDR);
-	outl(inl(MSTPCR2) & ~0x100000, MSTPCR2);
-	outw(0x0600, UPONCR0);
-
-	debug_led(1 << 3);
-
-	/* debug switch */
-	outw((inw(PVCR) & ~0x03) | 0x02 , PVCR);
-
-	return 0;
-}
diff --git a/qemu/roms/u-boot/board/renesas/ecovec/lowlevel_init.S b/qemu/roms/u-boot/board/renesas/ecovec/lowlevel_init.S
deleted file mode 100644
index e4c40c861..000000000
--- a/qemu/roms/u-boot/board/renesas/ecovec/lowlevel_init.S
+++ /dev/null
@@ -1,198 +0,0 @@
-/*
- * Copyright (C) 2011 Renesas Solutions Corp.
- * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj@renesas.com>
- *
- * board/renesas/ecovec/lowlevel_init.S
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/processor.h>
-#include <asm/macro.h>
-#include <configs/ecovec.h>
-
-	.global	lowlevel_init
-
-	.text
-	.align	2
-
-lowlevel_init:
-
-	/* jump to CONFIG_ECOVEC_ROMIMAGE_ADDR if bit 1 of PVDR_A */
-	mov.l	PVDR_A, r1
-	mov.l	PVDR_D, r2
-	mov.b	@r1, r0
-	tst	r0, r2
-	bt	1f
-	mov.l	JUMP_A, r1
-	jmp	@r1
-	nop
-
-1:
-	/* Disable watchdog */
-	write16 RWTCSR_A, RWTCSR_D
-
-	/* MMU Disable */
-	write32 MMUCR_A, MMUCR_D
-
-	/* Setup clocks */
-	write32 PLLCR_A, PLLCR_D
-	write32 FRQCRA_A, FRQCRA_D
-	write32 FRQCRB_A, FRQCRB_D
-
-	wait_timer TIMER_D
-
-	write32 MMSELR_A, MMSELR_D
-
-	/* Srtup BSC */
-	write32 CMNCR_A, CMNCR_D
-	write32 CS0BCR_A, CS0BCR_D
-	write32 CS0WCR_A, CS0WCR_D
-
-	wait_timer TIMER_D
-
-	/* Setup SDRAM */
-	write32 DBPDCNT0_A,	DBPDCNT0_D0
-	write32 DBCONF_A,	DBCONF_D
-	write32 DBTR0_A,	DBTR0_D
-	write32 DBTR1_A,	DBTR1_D
-	write32 DBTR2_A,	DBTR2_D
-	write32 DBTR3_A,	DBTR3_D
-	write32 DBKIND_A,	DBKIND_D
-	write32 DBCKECNT_A,	DBCKECNT_D
-
-	wait_timer TIMER_D
-
-	write32 DBCMDCNT_A,	DBCMDCNT_D0
-	write32 DBMRCNT_A, DBMRCNT_D0
-	write32 DBMRCNT_A, DBMRCNT_D1
-	write32 DBMRCNT_A, DBMRCNT_D2
-	write32 DBMRCNT_A, DBMRCNT_D3
-	write32 DBCMDCNT_A, DBCMDCNT_D0
-	write32 DBCMDCNT_A, DBCMDCNT_D1
-	write32 DBCMDCNT_A, DBCMDCNT_D1
-	write32 DBMRCNT_A, DBMRCNT_D4
-	write32 DBMRCNT_A, DBMRCNT_D5
-	write32 DBMRCNT_A, DBMRCNT_D6
-
-	wait_timer TIMER_D
-
-	write32 DBEN_A, DBEN_D
-	write32 DBRFPDN1_A, DBRFPDN1_D
-	write32 DBRFPDN2_A, DBRFPDN2_D
-	write32 DBCMDCNT_A, DBCMDCNT_D0
-
-
-	/* Dummy read */
-	mov.l DUMMY_A ,r1
-	synco
-	mov.l @r1, r0
-	synco
-
-	mov.l SDRAM_A ,r1
-	synco
-	mov.l @r1, r0
-	synco
-	wait_timer TIMER_D
-
-	add #4, r1
-	synco
-	mov.l @r1, r0
-	synco
-	wait_timer TIMER_D
-
-	add #4, r1
-	synco
-	mov.l @r1, r0
-	synco
-	wait_timer TIMER_D
-
-	add #4, r1
-	synco
-	mov.l @r1, r0
-	synco
-	wait_timer TIMER_D
-
-	write32 DBCMDCNT_A, DBCMDCNT_D0
-	write32 DBCMDCNT_A, DBCMDCNT_D1
-	write32 DBPDCNT0_A, DBPDCNT0_D1
-	write32 DBRFPDN0_A, DBRFPDN0_D
-
-	wait_timer TIMER_D
-
-	write32 CCR_A, CCR_D
-
-	stc	sr, r0
-	mov.l	SR_MASK_D, r1
-	and	r1, r0
-	ldc	r0, sr
-
-	rts
-
-	.align	2
-
-PVDR_A:		.long	PVDR
-PVDR_D:		.long	0x00000001
-JUMP_A:		.long	CONFIG_ECOVEC_ROMIMAGE_ADDR
-TIMER_D:	.long	64
-RWTCSR_A:	.long	RWTCSR
-RWTCSR_D:	.long	0x0000A507
-MMUCR_A:	.long	MMUCR
-MMUCR_D:	.long	0x00000004
-PLLCR_A:	.long	PLLCR
-PLLCR_D:	.long	0x00004000
-FRQCRA_A:	.long	FRQCRA
-FRQCRA_D:	.long	0x8E003508
-FRQCRB_A:	.long	FRQCRB
-FRQCRB_D:	.long	0x0
-MMSELR_A:	.long	MMSELR
-MMSELR_D:	.long	0xA5A50000
-CMNCR_A:	.long	CMNCR
-CMNCR_D:	.long	0x00000013
-CS0BCR_A:	.long	CS0BCR
-CS0BCR_D:	.long	0x11110400
-CS0WCR_A:	.long	CS0WCR
-CS0WCR_D:	.long	0x00000440
-DBPDCNT0_A:	.long	DBPDCNT0
-DBPDCNT0_D0: .long	0x00000181
-DBPDCNT0_D1: .long	0x00000080
-DBCONF_A:	.long	DBCONF
-DBCONF_D:	.long	0x015B0002
-DBTR0_A:	.long 	DBTR0
-DBTR0_D:	.long 	0x03061502
-DBTR1_A:	.long	DBTR1
-DBTR1_D:	.long	0x02020102
-DBTR2_A:	.long	DBTR2
-DBTR2_D:	.long	0x01090305
-DBTR3_A:	.long	DBTR3
-DBTR3_D:	.long	0x00000002
-DBKIND_A:	.long	DBKIND
-DBKIND_D:	.long	0x00000005
-DBCKECNT_A:	.long	DBCKECNT
-DBCKECNT_D:	.long	0x00000001
-DBCMDCNT_A:	.long	DBCMDCNT
-DBCMDCNT_D0:.long	0x2
-DBCMDCNT_D1:.long	0x4
-DBMRCNT_A:	.long	DBMRCNT
-DBMRCNT_D0:	.long	0x00020000
-DBMRCNT_D1:	.long	0x00030000
-DBMRCNT_D2:	.long	0x00010040
-DBMRCNT_D3:	.long	0x00000532
-DBMRCNT_D4:	.long	0x00000432
-DBMRCNT_D5:	.long	0x000103C0
-DBMRCNT_D6:	.long	0x00010040
-DBEN_A:		.long	DBEN
-DBEN_D:		.long	0x01
-DBRFPDN0_A:	.long	DBRFPDN0
-DBRFPDN1_A:	.long	DBRFPDN1
-DBRFPDN2_A:	.long	DBRFPDN2
-DBRFPDN0_D:	.long	0x00010000
-DBRFPDN1_D:	.long	0x00000613
-DBRFPDN2_D:	.long	0x238C003A
-SDRAM_A:	.long	0xa8000000
-DUMMY_A:	.long	0x0c400000
-CCR_A:		.long	CCR
-CCR_D:		.long	0x0000090B
-SR_MASK_D:	.long	0xEFFFFF0F