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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/palmtc/palmtc.c
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/palmtc/palmtc.c')
-rw-r--r--qemu/roms/u-boot/board/palmtc/palmtc.c61
1 files changed, 61 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/palmtc/palmtc.c b/qemu/roms/u-boot/board/palmtc/palmtc.c
new file mode 100644
index 000000000..a6207b44e
--- /dev/null
+++ b/qemu/roms/u-boot/board/palmtc/palmtc.c
@@ -0,0 +1,61 @@
+/*
+ * Palm Tungsten|C Support
+ *
+ * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <serial.h>
+#include <asm/io.h>
+#include <asm/arch/pxa.h>
+#include <asm/arch/regs-mmc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init(void)
+{
+ /* We have RAM, disable cache */
+ dcache_disable();
+ icache_disable();
+
+ /* Arch number of Palm Tungsten|C */
+ gd->bd->bi_arch_number = MACH_TYPE_PALMTC;
+
+ /* Adress of boot parameters */
+ gd->bd->bi_boot_params = 0xa0000100;
+
+ /* Set PWM for LCD */
+ writel(0x5f, PWM_CTRL1);
+ writel(0x3ff, PWM_PERVAL1);
+ writel(892, PWM_PWDUTY1);
+
+ return 0;
+}
+
+#ifdef CONFIG_CMD_MMC
+int board_mmc_init(bd_t *bis)
+{
+ pxa_mmc_register(0);
+ return 0;
+}
+#endif
+
+int dram_init(void)
+{
+ pxa2xx_dram_init();
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}