diff options
author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
---|---|---|
committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/nvidia/harmony | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/nvidia/harmony')
-rw-r--r-- | qemu/roms/u-boot/board/nvidia/harmony/Makefile | 8 | ||||
-rw-r--r-- | qemu/roms/u-boot/board/nvidia/harmony/harmony.c | 52 |
2 files changed, 60 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/nvidia/harmony/Makefile b/qemu/roms/u-boot/board/nvidia/harmony/Makefile new file mode 100644 index 000000000..222b025e9 --- /dev/null +++ b/qemu/roms/u-boot/board/nvidia/harmony/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation <www.nvidia.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := harmony.o diff --git a/qemu/roms/u-boot/board/nvidia/harmony/harmony.c b/qemu/roms/u-boot/board/nvidia/harmony/harmony.c new file mode 100644 index 000000000..c892a2575 --- /dev/null +++ b/qemu/roms/u-boot/board/nvidia/harmony/harmony.c @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <lcd.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/funcmux.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/tegra.h> +#include <asm/gpio.h> + +#ifdef CONFIG_TEGRA_MMC +/* + * Routine: pin_mux_mmc + * Description: setup the pin muxes/tristate values for the SDMMC(s) + */ +void pin_mux_mmc(void) +{ + funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); + funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT); + + /* For power GPIO PI6 */ + pinmux_tristate_disable(PMUX_PINGRP_ATA); + /* For CD GPIO PH2 */ + pinmux_tristate_disable(PMUX_PINGRP_ATD); + + /* For power GPIO PT3 */ + pinmux_tristate_disable(PMUX_PINGRP_DTB); + /* For CD GPIO PI5 */ + pinmux_tristate_disable(PMUX_PINGRP_ATC); +} +#endif + +void pin_mux_usb(void) +{ + funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); + pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); + pinmux_tristate_disable(PMUX_PINGRP_CDEV2); + /* USB2 PHY reset GPIO */ + pinmux_tristate_disable(PMUX_PINGRP_UAC); +} + +void pin_mux_display(void) +{ + pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM); + pinmux_tristate_disable(PMUX_PINGRP_SDC); +} |