diff options
| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/mcc200/mt48lc16m32s2-75.h | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/mcc200/mt48lc16m32s2-75.h')
| -rw-r--r-- | qemu/roms/u-boot/board/mcc200/mt48lc16m32s2-75.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/mcc200/mt48lc16m32s2-75.h b/qemu/roms/u-boot/board/mcc200/mt48lc16m32s2-75.h new file mode 100644 index 000000000..0133eaa2c --- /dev/null +++ b/qemu/roms/u-boot/board/mcc200/mt48lc16m32s2-75.h @@ -0,0 +1,14 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#define SDRAM_DDR 0 /* is SDR */ + +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x00CD0000 +#define SDRAM_CONTROL 0x504F0000 +#define SDRAM_CONFIG1 0xD2322800 +#define SDRAM_CONFIG2 0x8AD70000 |