diff options
author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
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committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/freescale/p2020come/law.c | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/freescale/p2020come/law.c')
-rw-r--r-- | qemu/roms/u-boot/board/freescale/p2020come/law.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/freescale/p2020come/law.c b/qemu/roms/u-boot/board/freescale/p2020come/law.c new file mode 100644 index 000000000..7048a0823 --- /dev/null +++ b/qemu/roms/u-boot/board/freescale/p2020come/law.c @@ -0,0 +1,23 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +/* + * Create a dummy LAW entry for the DDR SDRAM which will be replaced when + * the DDR SPD setup code runs. + * + * This table would be empty, except that it is used before the BSS section is + * initialized, and therefore must have at least one entry to push it into + * the DATA section. + */ +struct law_entry law_table[] = { + SET_LAW(CONFIG_SYS_SDRAM_BASE, LAW_SIZE_4K, LAW_TRGT_IF_DDR), +}; + +int num_law_entries = ARRAY_SIZE(law_table); |