Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

3 files changed, 0 insertions, 299 deletions

diff --git a/qemu/roms/u-boot/board/freescale/mpc8323erdb/Makefile b/qemu/roms/u-boot/board/freescale/mpc8323erdb/Makefile
deleted file mode 100644
index f2e749721..000000000
--- a/qemu/roms/u-boot/board/freescale/mpc8323erdb/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= mpc8323erdb.o
diff --git a/qemu/roms/u-boot/board/freescale/mpc8323erdb/README b/qemu/roms/u-boot/board/freescale/mpc8323erdb/README
deleted file mode 100644
index 6f8982937..000000000
--- a/qemu/roms/u-boot/board/freescale/mpc8323erdb/README
+++ /dev/null
@@ -1,71 +0,0 @@
-Freescale MPC8323ERDB Board
------------------------------------------
-
-1.	Memory Map
-	The memory map looks like this:
-
-	0x0000_0000	0x03ff_ffff	DDR		 64M
-	0x8000_0000	0x8fff_ffff	PCI MEM		 256M
-	0x9000_0000	0x9fff_ffff	PCI_MMIO	 256M
-	0xe000_0000	0xe00f_ffff	IMMR		 1M
-	0xd000_0000	0xd3ff_ffff	PCI IO		 64M
-	0xfe00_0000	0xfeff_ffff	NOR FLASH (CS0)	 16M
-
-2.	Compilation
-
-	Assuming you're using BASH (or similar) as your shell:
-
-	export CROSS_COMPILE=your-cross-compiler-prefix-
-	make distclean
-	make MPC8323ERDB_config
-	make
-
-3.	Downloading and Flashing Images
-
-3.1	Reflash U-boot Image using U-boot
-
-	N.b, have an alternate means of programming
-	the flash available if the new u-boot doesn't boot.
-
-	First try a:
-
-	tftpboot $loadaddr $uboot
-
-	to make sure that the TFTP load will succeed before
-	an erase goes ahead and wipes out your current firmware.
-	Then do a:
-
-	run tftpflash
-
-	which is a shorter version of the manual sequence:
-
-	tftp $loadaddr u-boot.bin
-	protect off fe000000 +$filesize
-	erase fe000000 +$filesize
-	cp.b $loadaddr fe000000 $filesize
-
-	To keep your old u-boot's environment variables, do a:
-
-	saveenv
-
-	prior to resetting the board.
-
-3.2	Downloading and Booting Linux Kernel
-
-	Ensure that all networking-related environment variables are set
-	properly (including ipaddr, serverip, gatewayip (if needed),
-	netmask, ethaddr, eth1addr, rootpath (if using NFS root),
-	fdtfile, and bootfile).
-
-	Then, do one of the following, depending on whether you
-	want an NFS root or a ramdisk root:
-
-	run nfsboot
-
-	or
-
-	run ramboot
-
-4	Notes
-
-	The console baudrate for MPC8323ERDB is 115200bps.
diff --git a/qemu/roms/u-boot/board/freescale/mpc8323erdb/mpc8323erdb.c b/qemu/roms/u-boot/board/freescale/mpc8323erdb/mpc8323erdb.c
deleted file mode 100644
index 3dce3623a..000000000
--- a/qemu/roms/u-boot/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc.
- *
- * Michael Barkowski <michael.barkowski@freescale.com>
- * Based on mpc832xmds file by Dave Liu <daveliu@freescale.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <command.h>
-#include <libfdt.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
-#include <asm/mmu.h>
-
-const qe_iop_conf_t qe_iop_conf_tab[] = {
-	/* UCC3 */
-	{1,  0, 1, 0, 1}, /* TxD0 */
-	{1,  1, 1, 0, 1}, /* TxD1 */
-	{1,  2, 1, 0, 1}, /* TxD2 */
-	{1,  3, 1, 0, 1}, /* TxD3 */
-	{1,  9, 1, 0, 1}, /* TxER */
-	{1, 12, 1, 0, 1}, /* TxEN */
-	{3, 24, 2, 0, 1}, /* TxCLK->CLK10 */
-
-	{1,  4, 2, 0, 1}, /* RxD0 */
-	{1,  5, 2, 0, 1}, /* RxD1 */
-	{1,  6, 2, 0, 1}, /* RxD2 */
-	{1,  7, 2, 0, 1}, /* RxD3 */
-	{1,  8, 2, 0, 1}, /* RxER */
-	{1, 10, 2, 0, 1}, /* RxDV */
-	{0, 13, 2, 0, 1}, /* RxCLK->CLK9 */
-	{1, 11, 2, 0, 1}, /* COL */
-	{1, 13, 2, 0, 1}, /* CRS */
-
-	/* UCC2 */
-	{0, 18, 1, 0, 1}, /* TxD0 */
-	{0, 19, 1, 0, 1}, /* TxD1 */
-	{0, 20, 1, 0, 1}, /* TxD2 */
-	{0, 21, 1, 0, 1}, /* TxD3 */
-	{0, 27, 1, 0, 1}, /* TxER */
-	{0, 30, 1, 0, 1}, /* TxEN */
-	{3, 23, 2, 0, 1}, /* TxCLK->CLK3 */
-
-	{0, 22, 2, 0, 1}, /* RxD0 */
-	{0, 23, 2, 0, 1}, /* RxD1 */
-	{0, 24, 2, 0, 1}, /* RxD2 */
-	{0, 25, 2, 0, 1}, /* RxD3 */
-	{0, 26, 1, 0, 1}, /* RxER */
-	{0, 28, 2, 0, 1}, /* Rx_DV */
-	{3, 21, 2, 0, 1}, /* RxCLK->CLK16 */
-	{0, 29, 2, 0, 1}, /* COL */
-	{0, 31, 2, 0, 1}, /* CRS */
-
-	{3,  4, 3, 0, 2}, /* MDIO */
-	{3,  5, 1, 0, 2}, /* MDC */
-
-	{0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
-};
-
-int fixed_sdram(void);
-
-phys_size_t initdram(int board_type)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 msize = 0;
-
-	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
-		return -1;
-
-	/* DDR SDRAM - Main SODIMM */
-	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
-
-	msize = fixed_sdram();
-
-	/* return total bus SDRAM size(bytes)  -- DDR */
-	return (msize * 1024 * 1024);
-}
-
-/*************************************************************************
- *  fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 msize = 0;
-	u32 ddr_size;
-	u32 ddr_size_log2;
-
-	msize = CONFIG_SYS_DDR_SIZE;
-	for (ddr_size = msize << 20, ddr_size_log2 = 0;
-	     (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
-		if (ddr_size & 1) {
-			return -1;
-		}
-	}
-	im->sysconf.ddrlaw[0].ar =
-	    LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-	im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
-	im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS;
-	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
-	im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
-	im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
-	im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
-	im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
-	im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
-	im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
-	im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
-	im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
-	im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
-	__asm__ __volatile__ ("sync");
-	udelay(200);
-
-	im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
-	__asm__ __volatile__ ("sync");
-	return msize;
-}
-
-int checkboard(void)
-{
-	puts("Board: Freescale MPC8323ERDB\n");
-	return 0;
-}
-
-static struct pci_region pci_regions[] = {
-	{
-		bus_start: CONFIG_SYS_PCI1_MEM_BASE,
-		phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
-		size: CONFIG_SYS_PCI1_MEM_SIZE,
-		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
-		phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
-		size: CONFIG_SYS_PCI1_MMIO_SIZE,
-		flags: PCI_REGION_MEM
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_IO_BASE,
-		phys_start: CONFIG_SYS_PCI1_IO_PHYS,
-		size: CONFIG_SYS_PCI1_IO_SIZE,
-		flags: PCI_REGION_IO
-	}
-};
-
-void pci_init_board(void)
-{
-	volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
-	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
-	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
-	struct pci_region *reg[] = { pci_regions };
-
-	/* Enable all 3 PCI_CLK_OUTPUTs. */
-	clk->occr |= 0xe0000000;
-
-	/* Configure PCI Local Access Windows */
-	pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
-	pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
-
-	pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
-	pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
-
-	mpc83xx_pci_init(1, reg);
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI
-	ft_pci_setup(blob, bd);
-#endif
-}
-#endif
-
-#if defined(CONFIG_SYS_I2C_MAC_OFFSET)
-int mac_read_from_eeprom(void)
-{
-	uchar buf[28];
-	char str[18];
-	int i = 0;
-	unsigned int crc = 0;
-	unsigned char enetvar[32];
-
-	/* Read MAC addresses from EEPROM */
-	if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_MAC_OFFSET, buf, 28)) {
-		printf("\nEEPROM @ 0x%02x read FAILED!!!\n",
-		       CONFIG_SYS_I2C_EEPROM_ADDR);
-	} else {
-		uint32_t crc_buf;
-
-		memcpy(&crc_buf, &buf[24], sizeof(uint32_t));
-
-		if (crc32(crc, buf, 24) == crc_buf) {
-			printf("Reading MAC from EEPROM\n");
-			for (i = 0; i < 4; i++) {
-				if (memcmp(&buf[i * 6], "\0\0\0\0\0\0", 6)) {
-					sprintf(str,
-						"%02X:%02X:%02X:%02X:%02X:%02X",
-						buf[i * 6], buf[i * 6 + 1],
-						buf[i * 6 + 2], buf[i * 6 + 3],
-						buf[i * 6 + 4], buf[i * 6 + 5]);
-					sprintf((char *)enetvar,
-						i ? "eth%daddr" : "ethaddr", i);
-					setenv((char *)enetvar, str);
-				}
-			}
-		}
-	}
-	return 0;
-}
-#endif				/* CONFIG_I2C_MAC_OFFSET */