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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/freescale/m5329evb
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/freescale/m5329evb')
-rw-r--r--qemu/roms/u-boot/board/freescale/m5329evb/Makefile8
-rw-r--r--qemu/roms/u-boot/board/freescale/m5329evb/config.mk9
-rw-r--r--qemu/roms/u-boot/board/freescale/m5329evb/m5329evb.c74
-rw-r--r--qemu/roms/u-boot/board/freescale/m5329evb/nand.c73
-rw-r--r--qemu/roms/u-boot/board/freescale/m5329evb/u-boot.lds86
5 files changed, 250 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/freescale/m5329evb/Makefile b/qemu/roms/u-boot/board/freescale/m5329evb/Makefile
new file mode 100644
index 000000000..d8dbafaa8
--- /dev/null
+++ b/qemu/roms/u-boot/board/freescale/m5329evb/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = m5329evb.o nand.o
diff --git a/qemu/roms/u-boot/board/freescale/m5329evb/config.mk b/qemu/roms/u-boot/board/freescale/m5329evb/config.mk
new file mode 100644
index 000000000..c15a9cfba
--- /dev/null
+++ b/qemu/roms/u-boot/board/freescale/m5329evb/config.mk
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+CONFIG_SYS_TEXT_BASE = 0
diff --git a/qemu/roms/u-boot/board/freescale/m5329evb/m5329evb.c b/qemu/roms/u-boot/board/freescale/m5329evb/m5329evb.c
new file mode 100644
index 000000000..1f77adf4c
--- /dev/null
+++ b/qemu/roms/u-boot/board/freescale/m5329evb/m5329evb.c
@@ -0,0 +1,74 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/immap.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ puts("Board: ");
+ puts("Freescale FireEngine 5329 EVB\n");
+ return 0;
+};
+
+phys_size_t initdram(int board_type)
+{
+ sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
+ u32 dramsize, i;
+
+ dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+
+ for (i = 0x13; i < 0x20; i++) {
+ if (dramsize == (1 << i))
+ break;
+ }
+ i--;
+
+ out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
+ out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
+ out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
+
+ /* Issue PALL */
+ out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+
+ /* Issue LEMR */
+ out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
+ out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
+
+ udelay(500);
+
+ /* Issue PALL */
+ out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+
+ /* Perform two refresh cycles */
+ out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
+ out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
+
+ out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
+
+ out_be32(&sdram->ctrl,
+ (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
+
+ udelay(100);
+
+ return dramsize;
+};
+
+int testdram(void)
+{
+ /* TODO: XXX XXX XXX */
+ printf("DRAM test not implemented!\n");
+
+ return (0);
+}
diff --git a/qemu/roms/u-boot/board/freescale/m5329evb/nand.c b/qemu/roms/u-boot/board/freescale/m5329evb/nand.c
new file mode 100644
index 000000000..8d88bc03c
--- /dev/null
+++ b/qemu/roms/u-boot/board/freescale/m5329evb/nand.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NAND)
+#include <nand.h>
+#include <linux/mtd/mtd.h>
+
+#define SET_CLE 0x10
+#define SET_ALE 0x08
+
+static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
+{
+ struct nand_chip *this = mtdinfo->priv;
+ volatile u16 *nCE = (u16 *) CONFIG_SYS_LATCH_ADDR;
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+ IO_ADDR_W &= ~(SET_ALE | SET_CLE);
+
+ if (ctrl & NAND_NCE)
+ *nCE &= 0xFFFB;
+ else
+ *nCE |= 0x0004;
+
+ if (ctrl & NAND_CLE)
+ IO_ADDR_W |= SET_CLE;
+ if (ctrl & NAND_ALE)
+ IO_ADDR_W |= SET_ALE;
+
+ this->IO_ADDR_W = (void *)IO_ADDR_W;
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this->IO_ADDR_W);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ /*
+ * set up pin configuration - enabled 2nd output buffer's signals
+ * (nand_ngpio - nCE USB1/2_PWR_EN, LATCH_GPIOs, LCD_VEEEN, etc)
+ * to use nCE signal
+ */
+ clrbits_8(&gpio->par_timer, GPIO_PAR_TIN3_TIN3);
+ setbits_8(&gpio->pddr_timer, 0x08);
+ setbits_8(&gpio->ppd_timer, 0x08);
+ out_8(&gpio->pclrr_timer, 0);
+ out_8(&gpio->podr_timer, 0);
+
+ nand->chip_delay = 60;
+ nand->ecc.mode = NAND_ECC_SOFT;
+ nand->cmd_ctrl = nand_hwcontrol;
+
+ return 0;
+}
+#endif
diff --git a/qemu/roms/u-boot/board/freescale/m5329evb/u-boot.lds b/qemu/roms/u-boot/board/freescale/m5329evb/u-boot.lds
new file mode 100644
index 000000000..097ac2e8f
--- /dev/null
+++ b/qemu/roms/u-boot/board/freescale/m5329evb/u-boot.lds
@@ -0,0 +1,86 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+OUTPUT_ARCH(m68k)
+
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ .text :
+ {
+ arch/m68k/cpu/mcf532x/start.o (.text*)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/env_embedded.o (.text*)
+
+ *(.text*)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ KEEP(*(.got))
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ KEEP(*(.got2))
+ _FIXUP_TABLE_ = .;
+ KEEP(*(.fixup))
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data*)
+ *(.sdata*)
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ }
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss (NOLOAD) :
+ {
+ _sbss = .;
+ *(.sbss*)
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ __bss_end = . ;
+ PROVIDE (end = .);
+}