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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/freescale/m52277evb/m52277evb.c
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/freescale/m52277evb/m52277evb.c')
-rw-r--r--qemu/roms/u-boot/board/freescale/m52277evb/m52277evb.c90
1 files changed, 90 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/freescale/m52277evb/m52277evb.c b/qemu/roms/u-boot/board/freescale/m52277evb/m52277evb.c
new file mode 100644
index 000000000..a1127e52a
--- /dev/null
+++ b/qemu/roms/u-boot/board/freescale/m52277evb/m52277evb.c
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ puts("Board: ");
+ puts("Freescale M52277 EVB\n");
+ return 0;
+};
+
+phys_size_t initdram(int board_type)
+{
+ u32 dramsize;
+
+#ifdef CONFIG_CF_SBF
+ /*
+ * Serial Boot: The dram is already initialized in start.S
+ * only require to return DRAM size
+ */
+ dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+#else
+ sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
+ gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
+ u32 i;
+
+ dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+
+ for (i = 0x13; i < 0x20; i++) {
+ if (dramsize == (1 << i))
+ break;
+ }
+ i--;
+
+ out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
+
+ out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
+
+ out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
+ out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
+
+ /* Issue PALL */
+ out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
+ __asm__("nop");
+
+ /* Issue LEMR */
+ out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
+ __asm__("nop");
+ out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD);
+ __asm__("nop");
+
+ udelay(1000);
+
+ /* Issue PALL */
+ out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
+ __asm__("nop");
+
+ /* Perform two refresh cycles */
+ out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
+ __asm__("nop");
+ out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
+ __asm__("nop");
+
+ out_be32(&sdram->sdcr,
+ (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
+
+ udelay(100);
+#endif
+ return (dramsize);
+};
+
+int testdram(void)
+{
+ /* TODO: XXX XXX XXX */
+ printf("DRAM test not implemented!\n");
+
+ return (0);
+}