diff options
| author |   RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
|---|---|---|
| committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
| commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
| tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/board/davinci | |
| parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) | |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/davinci')
39 files changed, 0 insertions, 2738 deletions
diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/Makefile b/qemu/roms/u-boot/board/davinci/da8xxevm/Makefile deleted file mode 100644 index d3acacc33..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o -obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o -obj-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/README.da850 b/qemu/roms/u-boot/board/davinci/da8xxevm/README.da850 deleted file mode 100644 index 313a1ef43..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/README.da850 +++ /dev/null @@ -1,68 +0,0 @@ -Summary -======= -The README is for the boot procedure used for various DA850 (or compatible -parts such as the AM1808) based boards. - -In the context of U-Boot, the board is booted in three stages. The initial -bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits -in the internal ROM. The RBL initializes the internal memory and then -depending on the exact board and pin configurations will initialize another -controller (such as SPI or NAND) to continue the boot process by loading -the secondary program loader (SPL). The SPL will initialize the system -further (some clocks, SDRAM) and then load the full u-boot from a -predefined location in persistent storage to DDR and jumps to the u-boot -entry point. - -AIS is an image format defined by TI for the images that are to be loaded -to memory by the RBL. The image is divided into a series of sections and -the image's entry point is specified. Each section comes with meta data -like the target address the section is to be copied to and the size of the -section, which is used by the RBL to load the image. At the end of the -image the RBL jumps to the image entry point. The AIS format allows for -other things such as programming the clocks and SDRAM if the header is -programmed for it. We do not take advantage of this and instead use SPL as -it allows for additional flexibility (run-time detect of board revision, -loading the next image from a different media, etc). - - -Compilation -=========== -The exact build target you need will depend on the board you have. For -Logic PD boards, or other boards which store the ethernet MAC address at -the end of SPI flash, run 'make da850evm'. For boards which store the -ethernet MAC address in the i2c EEPROM located at 0x50, run -'make da850_am18xxevm'. Once this build completes you will have a -u-boot.ais file that needs to be written to the correct persistent -storage. - - -Flashing the images to SPI -========================== -The AIS image can be written to SPI flash using the following commands. -Assuming that the network is configured and enabled and the u-boot.ais file -is tftp'able. - -U-Boot > sf probe 0 -U-Boot > sf erase 0 +320000 -U-Boot > tftp u-boot.ais -U-Boot > sf write c0700000 0 $filesize - - -Recovery -======== - -In the case of a "bricked" board, you need to use the TI tools found -here[1] to write the u-boot.ais file. An example of recovering to the SPI -flash of an AM1808 would be: - -$ mono sfh_OMAP-L138.exe -targetType AM1808 -p /dev/ttyUSB0 \ - -flash_noubl /path/to/u-boot.ais - -For other target types and flash locations: - -$ mono sfh_OMAP-L138.exe -h - -Links -===== -[1] - http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138 diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/README.hawkboard b/qemu/roms/u-boot/board/davinci/da8xxevm/README.hawkboard deleted file mode 100644 index d6ae02ec0..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/README.hawkboard +++ /dev/null @@ -1,92 +0,0 @@ -Summary -======= -The README is for the boot procedure used for TI's OMAP-L138 based -hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB -DDR SDRAM along with a host of other controllers. - -The hawkboard is booted in three stages. The initial bootloader which -executes upon reset is the Rom Boot Loader(RBL) which sits in the -internal ROM of the omap. The RBL initialises the memory and the nand -controller, and copies the image stored at a predefined location(block -1) of the nand flash. The image loaded by the RBL to the memory is the -AIS signed spl image. This, in turns copies the u-boot binary from the -nand flash to the memory and jumps to the u-boot entry point. - -AIS is an image format defined by TI for the images that are to be -loaded to memory by the RBL. The image is divided into a series of -sections and the image's entry point is specified. Each section comes -with meta data like the target address the section is to be copied to -and the size of the section, which is used by the RBL to load the -image. At the end of the image the RBL jumps to the image entry -point. - -The secondary stage bootloader(spl) which is loaded by the RBL then -loads the u-boot from a predefined location in the nand to the memory -and jumps to the u-boot entry point. - -The reason a secondary stage bootloader is used is because the ECC -layout expected by the RBL is not the same as that used by -u-boot/linux. This also implies that for flashing the spl image,we -need to use the u-boot which uses the ECC layout expected by the -RBL[1]. Booting u-boot over UART(UART boot) is explained here[2]. - - -Compilation -=========== -Three images might be needed - -* spl - This is the secondary bootloader which boots the u-boot - binary. - -* u-boot binary - This is the image flashed to the nand and copied to - the memory by the spl. - - Both the images get compiled with hawkboard_config, with the TOPDIR - containing the u-boot images, and the spl image under the spl - directory. - - The spl image needs to be processed with the AISGen tool for - generating the AIS signed image to be flashed. Steps for generating - the AIS image are explained here[3]. - -* u-boot for uart boot - This is same as the u-boot binary generated - above, with the sole difference of the CONFIG_SYS_TEXT_BASE being - 0xc1080000, as expected by the RBL. - - hawkboard_uart_config - - -Flashing the images to Nand -=========================== -The spl AIS image needs to be flashed to the block 1 of the Nand -flash, as that is the location the RBL expects the image[4]. For -flashing the spl, boot over the u-boot specified in [1], and flash the -image - -=> tftpboot 0xc0700000 <nand_spl_ais.bin> -=> nand erase 0x20000 0x20000 -=> nand write.e 0xc0700000 0x20000 <nand_spl_size> - -The u-boot binary is flashed at location 0xe0000(block 6) of the nand -flash. The spl loader expects the u-boot at this location. For -flashing the u-boot binary - -=> tftpboot 0xc0700000 u-boot.bin -=> nand erase 0xe0000 0x40000 -=> nand write.e 0xc0700000 0xe0000 <u-boot-size> - - -Links -===== - -[1] - http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1.bin - -[2] - http://elinux.org/Hawkboard#Booting_u-boot_over_UART - -[3] - http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot - -[4] - http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_booting_from_NAND_and_ECC.2FBad_blocks diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/da830evm.c b/qemu/roms/u-boot/board/davinci/da8xxevm/da830evm.c deleted file mode 100644 index 4f5c780e5..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/da830evm.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> - * - * Base on code from TI. Original Notices follow: - * - * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/ - * - * Modified for DA8xx EVM. - * - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <i2c.h> -#include <net.h> -#include <netdev.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> -#include <asm/arch/emac_defs.h> -#include <asm/arch/pinmux_defs.h> -#include <asm/io.h> -#include <nand.h> -#include <asm/arch/nand_defs.h> -#include <asm/arch/davinci_misc.h> - -#ifdef CONFIG_DAVINCI_MMC -#include <mmc.h> -#include <asm/arch/sdmmc_defs.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -static const struct pinmux_resource pinmuxes[] = { -#ifdef CONFIG_SPI_FLASH - PINMUX_ITEM(spi0_pins_base), - PINMUX_ITEM(spi0_pins_scs0), - PINMUX_ITEM(spi0_pins_ena), -#endif - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(i2c0_pins), -#ifdef CONFIG_USB_DA8XX - PINMUX_ITEM(usb_pins), -#endif -#ifdef CONFIG_USE_NAND - PINMUX_ITEM(emifa_pins), - PINMUX_ITEM(emifa_pins_cs0), - PINMUX_ITEM(emifa_pins_cs2), - PINMUX_ITEM(emifa_pins_cs3), -#endif -#if defined(CONFIG_DRIVER_TI_EMAC) - PINMUX_ITEM(emac_pins_rmii), - PINMUX_ITEM(emac_pins_mdio), - PINMUX_ITEM(emac_pins_rmii_clk_source), -#endif -#ifdef CONFIG_DAVINCI_MMC - PINMUX_ITEM(mmc0_pins_8bit) -#endif -}; - -static const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI0 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -#ifdef CONFIG_DAVINCI_MMC - { DAVINCI_LPSC_MMC_SD }, -#endif - -}; - -#ifdef CONFIG_DAVINCI_MMC -static struct davinci_mmc mmc_sd0 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, - .host_caps = MMC_MODE_8BIT, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_2, -}; - -int board_mmc_init(bd_t *bis) -{ - mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); - - printf("%x\n", mmc_sd0.input_clk); - - /* Add slot-0 to mmc subsystem */ - return davinci_mmc_init(bis, &mmc_sd0); -} -#endif - -int board_init(void) -{ -#ifndef CONFIG_USE_IRQ - irq_init(); -#endif - -#ifdef CONFIG_NAND_DAVINCI - /* EMIFA 100MHz clock select */ - writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2, - &davinci_syscfg_regs->cfgchip3); - /* NAND CS setup */ - writel((DAVINCI_ABCR_WSETUP(0) | - DAVINCI_ABCR_WSTROBE(2) | - DAVINCI_ABCR_WHOLD(0) | - DAVINCI_ABCR_RSETUP(0) | - DAVINCI_ABCR_RSTROBE(2) | - DAVINCI_ABCR_RHOLD(0) | - DAVINCI_ABCR_TA(2) | - DAVINCI_ABCR_ASIZE_8BIT), - &davinci_emif_regs->ab2cr); -#endif - - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* - * Power on required peripherals - * ARM does not have access by default to PSC0 and PSC1 - * assuming here that the DSP bootloader has set the IOPU - * such that PSC access is available to ARM - */ - if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) - return 1; - - /* setup the SUSPSRC for ARM to control emulation suspend */ - writel(readl(&davinci_syscfg_regs->suspsrc) & - ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | - DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | - DAVINCI_SYSCFG_SUSPSRC_UART2), - &davinci_syscfg_regs->suspsrc); - - /* configure pinmux settings */ - if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) - return 1; - - /* enable the console UART */ - writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | - DAVINCI_UART_PWREMU_MGMT_UTRST), - &davinci_uart2_ctrl_regs->pwremu_mgmt); - - return(0); -} - - -#ifdef CONFIG_NAND_DAVINCI -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - - return 0; -} -#endif - -#if defined(CONFIG_DRIVER_TI_EMAC) - -#define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */ - -/* - * Initializes on-board ethernet controllers. - */ -int board_eth_init(bd_t *bis) -{ - u_int8_t mac_addr[6]; - u_int8_t switch_start_cmd[2] = { 0x01, 0x23 }; - struct eth_device *dev; - - /* Read Ethernet MAC address from EEPROM */ - if (dvevm_read_mac_address(mac_addr)) - /* set address env if not already set */ - davinci_sync_env_enetaddr(mac_addr); - - /* read the address back from env */ - if (!eth_getenv_enetaddr("ethaddr", mac_addr)) - return -1; - - /* enable the Ethernet switch in the 3 port PHY */ - if (i2c_write(PHY_SW_I2C_ADDR, 0, 0, - switch_start_cmd, sizeof(switch_start_cmd))) { - printf("Ethernet switch start failed!\n"); - return -1; - } - - /* finally, initialise the driver */ - if (!davinci_emac_initialize()) { - printf("Error: Ethernet init failed!\n"); - return -1; - } - - dev = eth_get_dev(); - - /* provide the resulting addr to the driver */ - memcpy(dev->enetaddr, mac_addr, 6); - dev->write_hwaddr(dev); - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC */ diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/da850evm.c b/qemu/roms/u-boot/board/davinci/da8xxevm/da850evm.c deleted file mode 100644 index 85b483096..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/da850evm.c +++ /dev/null @@ -1,494 +0,0 @@ -/* - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Based on da830evm.c. Original Copyrights follow: - * - * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <i2c.h> -#include <net.h> -#include <netdev.h> -#include <spi.h> -#include <spi_flash.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> -#include <asm/arch/emac_defs.h> -#include <asm/arch/pinmux_defs.h> -#include <asm/io.h> -#include <asm/arch/davinci_misc.h> -#include <asm/errno.h> -#include <hwconfig.h> - -#ifdef CONFIG_DAVINCI_MMC -#include <mmc.h> -#include <asm/arch/sdmmc_defs.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_DRIVER_TI_EMAC -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII -#define HAS_RMII 1 -#else -#define HAS_RMII 0 -#endif -#endif /* CONFIG_DRIVER_TI_EMAC */ - -#define CFG_MAC_ADDR_SPI_BUS 0 -#define CFG_MAC_ADDR_SPI_CS 0 -#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3 - -#define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) - -#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH -static int get_mac_addr(u8 *addr) -{ - struct spi_flash *flash; - int ret; - - flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS, - CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE); - if (!flash) { - printf("Error - unable to probe SPI flash.\n"); - return -1; - } - - ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr); - if (ret) { - printf("Error - unable to read MAC address from SPI flash.\n"); - return -1; - } - - return ret; -} -#endif - -void dsp_lpsc_on(unsigned domain, unsigned int id) -{ - dv_reg_p mdstat, mdctl, ptstat, ptcmd; - struct davinci_psc_regs *psc_regs; - - psc_regs = davinci_psc0_regs; - mdstat = &psc_regs->psc0.mdstat[id]; - mdctl = &psc_regs->psc0.mdctl[id]; - ptstat = &psc_regs->ptstat; - ptcmd = &psc_regs->ptcmd; - - while (*ptstat & (0x1 << domain)) - ; - - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ - - *mdctl |= 0x03; - - *ptcmd = 0x1 << domain; - - while (*ptstat & (0x1 << domain)) - ; - while ((*mdstat & 0x1f) != 0x03) - ; /* Probably an overkill... */ -} - -static void dspwake(void) -{ - unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; - u32 val; - - /* if the device is ARM only, return */ - if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10) - return; - - if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL)) - return; - - *resetvect++ = 0x1E000; /* DSP Idle */ - /* clear out the next 10 words as NOP */ - memset(resetvect, 0, sizeof(unsigned) *10); - - /* setup the DSP reset vector */ - writel(DAVINCI_L3CBARAM_BASE, HOST1CFG); - - dsp_lpsc_on(1, DAVINCI_LPSC_GEM); - val = readl(PSC0_MDCTL + (15 * 4)); - val |= 0x100; - writel(val, (PSC0_MDCTL + (15 * 4))); -} - -int misc_init_r(void) -{ - dspwake(); - -#if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM) - - uchar env_enetaddr[6]; - int enetaddr_found; - - enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr); - -#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH - int spi_mac_read; - uchar buff[6]; - - spi_mac_read = get_mac_addr(buff); - - /* - * MAC address not present in the environment - * try and read the MAC address from SPI flash - * and set it. - */ - if (!enetaddr_found) { - if (!spi_mac_read) { - if (is_valid_ether_addr(buff)) { - if (eth_setenv_enetaddr("ethaddr", buff)) { - printf("Warning: Failed to " - "set MAC address from SPI flash\n"); - } - } else { - printf("Warning: Invalid " - "MAC address read from SPI flash\n"); - } - } - } else { - /* - * MAC address present in environment compare it with - * the MAC address in SPI flash and warn on mismatch - */ - if (!spi_mac_read && is_valid_ether_addr(buff) && - memcmp(env_enetaddr, buff, 6)) - printf("Warning: MAC address in SPI flash don't match " - "with the MAC address in the environment\n"); - printf("Default using MAC address from environment\n"); - } -#endif - uint8_t enetaddr[8]; - int eeprom_mac_read; - - /* Read Ethernet MAC address from EEPROM */ - eeprom_mac_read = dvevm_read_mac_address(enetaddr); - - /* - * MAC address not present in the environment - * try and read the MAC address from EEPROM flash - * and set it. - */ - if (!enetaddr_found) { - if (eeprom_mac_read) - /* Set Ethernet MAC address from EEPROM */ - davinci_sync_env_enetaddr(enetaddr); - } else { - /* - * MAC address present in environment compare it with - * the MAC address in EEPROM and warn on mismatch - */ - if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6)) - printf("Warning: MAC address in EEPROM don't match " - "with the MAC address in the environment\n"); - printf("Default using MAC address from environment\n"); - } - -#endif - return 0; -} - -#ifdef CONFIG_DAVINCI_MMC -static struct davinci_mmc mmc_sd0 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, - .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_2, -}; - -int board_mmc_init(bd_t *bis) -{ - mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); - - /* Add slot-0 to mmc subsystem */ - return davinci_mmc_init(bis, &mmc_sd0); -} -#endif - -static const struct pinmux_config gpio_pins[] = { -#ifdef CONFIG_USE_NOR - /* GP0[11] is required for NOR to work on Rev 3 EVMs */ - { pinmux(0), 8, 4 }, /* GP0[11] */ -#endif -#ifdef CONFIG_DAVINCI_MMC - /* GP0[11] is required for SD to work on Rev 3 EVMs */ - { pinmux(0), 8, 4 }, /* GP0[11] */ -#endif -}; - -const struct pinmux_resource pinmuxes[] = { -#ifdef CONFIG_DRIVER_TI_EMAC - PINMUX_ITEM(emac_pins_mdio), -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII - PINMUX_ITEM(emac_pins_rmii), -#else - PINMUX_ITEM(emac_pins_mii), -#endif -#endif -#ifdef CONFIG_SPI_FLASH - PINMUX_ITEM(spi1_pins_base), - PINMUX_ITEM(spi1_pins_scs0), -#endif - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(uart2_pins_rtscts), - PINMUX_ITEM(i2c0_pins), -#ifdef CONFIG_NAND_DAVINCI - PINMUX_ITEM(emifa_pins_cs3), - PINMUX_ITEM(emifa_pins_cs4), - PINMUX_ITEM(emifa_pins_nand), -#elif defined(CONFIG_USE_NOR) - PINMUX_ITEM(emifa_pins_cs2), - PINMUX_ITEM(emifa_pins_nor), -#endif - PINMUX_ITEM(gpio_pins), -#ifdef CONFIG_DAVINCI_MMC - PINMUX_ITEM(mmc0_pins), -#endif -}; - -const int pinmuxes_size = ARRAY_SIZE(pinmuxes); - -const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -#ifdef CONFIG_DAVINCI_MMC - { DAVINCI_LPSC_MMC_SD }, -#endif -}; - -const int lpsc_size = ARRAY_SIZE(lpsc); - -#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK -#define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 -#endif - -#define REV_AM18X_EVM 0x100 - -/* - * get_board_rev() - setup to pass kernel board revision information - * Returns: - * bit[0-3] Maximum cpu clock rate supported by onboard SoC - * 0000b - 300 MHz - * 0001b - 372 MHz - * 0010b - 408 MHz - * 0011b - 456 MHz - */ -u32 get_board_rev(void) -{ - char *s; - u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; - u32 rev = 0; - - s = getenv("maxcpuclk"); - if (s) - maxcpuclk = simple_strtoul(s, NULL, 10); - - if (maxcpuclk >= 456000000) - rev = 3; - else if (maxcpuclk >= 408000000) - rev = 2; - else if (maxcpuclk >= 372000000) - rev = 1; -#ifdef CONFIG_DA850_AM18X_EVM - rev |= REV_AM18X_EVM; -#endif - return rev; -} - -int board_early_init_f(void) -{ - /* - * Power on required peripherals - * ARM does not have access by default to PSC0 and PSC1 - * assuming here that the DSP bootloader has set the IOPU - * such that PSC access is available to ARM - */ - if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) - return 1; - - return 0; -} - -int board_init(void) -{ -#ifndef CONFIG_USE_IRQ - irq_init(); -#endif - -#ifdef CONFIG_NAND_DAVINCI - /* - * NAND CS setup - cycle counts based on da850evm NAND timings in the - * Linux kernel @ 25MHz EMIFA - */ - writel((DAVINCI_ABCR_WSETUP(2) | - DAVINCI_ABCR_WSTROBE(2) | - DAVINCI_ABCR_WHOLD(1) | - DAVINCI_ABCR_RSETUP(1) | - DAVINCI_ABCR_RSTROBE(4) | - DAVINCI_ABCR_RHOLD(0) | - DAVINCI_ABCR_TA(1) | - DAVINCI_ABCR_ASIZE_8BIT), - &davinci_emif_regs->ab2cr); /* CS3 */ -#endif - - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* setup the SUSPSRC for ARM to control emulation suspend */ - writel(readl(&davinci_syscfg_regs->suspsrc) & - ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | - DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | - DAVINCI_SYSCFG_SUSPSRC_UART2), - &davinci_syscfg_regs->suspsrc); - - /* configure pinmux settings */ - if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) - return 1; - -#ifdef CONFIG_USE_NOR - /* Set the GPIO direction as output */ - clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); - - /* Set the output as low */ - writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); -#endif - -#ifdef CONFIG_DAVINCI_MMC - /* Set the GPIO direction as output */ - clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); - - /* Set the output as high */ - writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR); -#endif - -#ifdef CONFIG_DRIVER_TI_EMAC - davinci_emac_mii_mode_sel(HAS_RMII); -#endif /* CONFIG_DRIVER_TI_EMAC */ - - /* enable the console UART */ - writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | - DAVINCI_UART_PWREMU_MGMT_UTRST), - &davinci_uart2_ctrl_regs->pwremu_mgmt); - - return 0; -} - -#ifdef CONFIG_DRIVER_TI_EMAC - -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII -/** - * rmii_hw_init - * - * DA850/OMAP-L138 EVM can interface to a daughter card for - * additional features. This card has an I2C GPIO Expander TCA6416 - * to select the required functions like camera, RMII Ethernet, - * character LCD, video. - * - * Initialization of the expander involves configuring the - * polarity and direction of the ports. P07-P05 are used here. - * These ports are connected to a Mux chip which enables only one - * functionality at a time. - * - * For RMII phy to respond, the MII MDIO clock has to be disabled - * since both the PHY devices have address as zero. The MII MDIO - * clock is controlled via GPIO2[6]. - * - * This code is valid for Beta version of the hardware - */ -int rmii_hw_init(void) -{ - const struct pinmux_config gpio_pins[] = { - { pinmux(6), 8, 1 } - }; - u_int8_t buf[2]; - unsigned int temp; - int ret; - - /* PinMux for GPIO */ - if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) - return 1; - - /* I2C Exapnder configuration */ - /* Set polarity to non-inverted */ - buf[0] = 0x0; - buf[1] = 0x0; - ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2); - if (ret) { - printf("\nExpander @ 0x%02x write FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - return ret; - } - - /* Configure P07-P05 as outputs */ - buf[0] = 0x1f; - buf[1] = 0xff; - ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2); - if (ret) { - printf("\nExpander @ 0x%02x write FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - } - - /* For Ethernet RMII selection - * P07(SelA)=0 - * P06(SelB)=1 - * P05(SelC)=1 - */ - if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { - printf("\nExpander @ 0x%02x read FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - } - - buf[0] &= 0x1f; - buf[0] |= (0 << 7) | (1 << 6) | (1 << 5); - if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { - printf("\nExpander @ 0x%02x write FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - } - - /* Set the output as high */ - temp = REG(GPIO_BANK2_REG_SET_ADDR); - temp |= (0x01 << 6); - REG(GPIO_BANK2_REG_SET_ADDR) = temp; - - /* Set the GPIO direction as output */ - temp = REG(GPIO_BANK2_REG_DIR_ADDR); - temp &= ~(0x01 << 6); - REG(GPIO_BANK2_REG_DIR_ADDR) = temp; - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ - -/* - * Initializes on-board ethernet controllers. - */ -int board_eth_init(bd_t *bis) -{ -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII - /* Select RMII fucntion through the expander */ - if (rmii_hw_init()) - printf("RMII hardware init failed!!!\n"); -#endif - if (!davinci_emac_initialize()) { - printf("Error: Ethernet init failed!\n"); - return -1; - } - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC */ diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard-ais-nand.cfg b/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard-ais-nand.cfg deleted file mode 100644 index 2b12b6c08..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard-ais-nand.cfg +++ /dev/null @@ -1,4 +0,0 @@ -# PLL0CFG0 PLL0CFG1 -PLL0 0x00180001 0x00000205 -# PLL1CFG0 PLL1CFG1 DRPYC1R SDCR SDTIMR1 SDTIMR2 SDRCR CLK2XSRC -DDR2 0x15010001 0x00000002 0x00000043 0x00134632 0x26492a09 0x7d13c722 0x00000249 0x00000000 diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard.c b/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard.c deleted file mode 100644 index d5992a556..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org> - * - * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com> - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * Copyright (C) 2004 Texas Instruments. - * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>. - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <asm/errno.h> -#include <asm/arch/hardware.h> -#include <asm/io.h> -#include <asm/arch/davinci_misc.h> -#include <asm/arch/pinmux_defs.h> -#include <asm/arch/da8xx-usb.h> -#include <ns16550.h> - -DECLARE_GLOBAL_DATA_PTR; - -const struct pinmux_resource pinmuxes[] = { - PINMUX_ITEM(emac_pins_mii), - PINMUX_ITEM(emac_pins_mdio), - PINMUX_ITEM(emifa_pins_cs3), - PINMUX_ITEM(emifa_pins_cs4), - PINMUX_ITEM(emifa_pins_nand), - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(uart2_pins_rtscts), -}; - -const int pinmuxes_size = ARRAY_SIZE(pinmuxes); - -const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -}; - -const int lpsc_size = ARRAY_SIZE(lpsc); - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - return 0; -} - -int board_early_init_f(void) -{ - /* - * Kick Registers need to be set to allow access to Pin Mux registers - */ - writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); - writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); - - /* set cfgchip3 to select mii */ - writel(readl(&davinci_syscfg_regs->cfgchip3) & - ~(1 << 8), &davinci_syscfg_regs->cfgchip3); - - return 0; -} - -int misc_init_r(void) -{ - char buf[32]; - - printf("ARM Clock : %s MHz\n", - strmhz(buf, clk_get(DAVINCI_ARM_CLKID))); - - return 0; -} - -int usb_phy_on(void) -{ - u32 timeout; - u32 cfgchip2; - - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); - - cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | - CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ | - CFGCHIP2_USB1PHYCLKMUX); - cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | - CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX | - CFGCHIP2_USB1SUSPENDM; - - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); - - /* wait until the usb phy pll locks */ - timeout = DA8XX_USB_OTG_TIMEOUT; - while (timeout--) - if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) - return 1; - - /* USB phy was not turned on */ - return 0; -} - -void usb_phy_off(void) -{ - u32 cfgchip2; - - /* - * Power down the on-chip PHY. - */ - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); - cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM); - cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET; - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); -} diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-da850evm.lds deleted file mode 100644 index de21a132b..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-da850evm.lds +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ - LENGTH = CONFIG_SPL_MAX_FOOTPRINT } - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - __start = .; - arch/arm/cpu/arm926ejs/start.o (.text*) - *(.text*) - } >.sram - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram - - . = ALIGN(4); - .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram - - . = ALIGN(4); - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } >.sram - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end = .; - } >.sram - - __image_copy_end = .; - - .end : - { - *(.__end) - } -} diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-hawk.lds deleted file mode 100644 index 299226b95..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-hawk.lds +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0xc1080000; - - . = ALIGN(4); - .text : - { - arch/arm/cpu/arm926ejs/start.o (.text*) - arch/arm/cpu/arm926ejs/davinci/built-in.o (.text*) - drivers/mtd/nand/built-in.o (.text*) - - *(.text*) - } - - . = ALIGN(4); - .rodata : { *(.rodata*) } - - . = ALIGN(4); - .data : { - *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) - } - - . = ALIGN(4); - __image_copy_end = .; - __rel_dyn_start = .; - __rel_dyn_end = .; - - __got_start = .; - . = ALIGN(4); - .got : { *(.got) } - - __got_end = .; - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end = .; - } - - .end : - { - *(.__end) - } -} diff --git a/qemu/roms/u-boot/board/davinci/dm355evm/Makefile b/qemu/roms/u-boot/board/davinci/dm355evm/Makefile deleted file mode 100644 index bcb7e6fed..000000000 --- a/qemu/roms/u-boot/board/davinci/dm355evm/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := dm355evm.o diff --git a/qemu/roms/u-boot/board/davinci/dm355evm/config.mk b/qemu/roms/u-boot/board/davinci/dm355evm/config.mk deleted file mode 100644 index 9a063000c..000000000 --- a/qemu/roms/u-boot/board/davinci/dm355evm/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Spectrum Digital DM355 EVM board -# dm355evm board has 1 bank of 128 MB DDR RAM -# Physical Address: 8000'0000 to 8800'0000 -# -# Linux Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) -# - -#Provide at least 16MB spacing between us and the Linux Kernel image -CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/dm355evm/dm355evm.c b/qemu/roms/u-boot/board/davinci/dm355evm/dm355evm.c deleted file mode 100644 index 10422b226..000000000 --- a/qemu/roms/u-boot/board/davinci/dm355evm/dm355evm.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * Copyright (C) 2009 David Brownell - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <nand.h> -#include <asm/io.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> -#include <asm/arch/nand_defs.h> -#include <asm/arch/davinci_misc.h> -#include <net.h> -#include <netdev.h> -#ifdef CONFIG_DAVINCI_MMC -#include <mmc.h> -#include <asm/arch/sdmmc_defs.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -/* - * With the DM355 EVM, u-boot is *always* a third stage loader, - * unless a JTAG debugger handles the first two stages: - * - * - 1st stage is ROM Boot Loader (RBL), which searches for a - * second stage loader in one of three places based on SW7: - * NAND (with MMC/SD fallback), MMC/SD, or UART. - * - * - 2nd stage is User Boot Loader (UBL), using at most 30KB - * of on-chip SRAM, responsible for lowlevel init, and for - * loading the third stage loader into DRAM. - * - * - 3rd stage, that's us! - */ - -int board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM; - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - /* We expect the UBL to have handled "lowlevel init", which - * involves setting up at least: - * - clocks - * + PLL1 (for ARM and peripherals) and PLL2 (for DDR) - * + clock divisors for those PLLs - * + LPSC_DDR module enabled - * + LPSC_TIMER0 module (still) enabled - * - EMIF - * + DDR init and timings - * + AEMIF timings (for NAND and DM9000) - * - pinmux - * - * Some of that is repeated here, mostly as a precaution. - */ - - /* AEMIF: Some "address" lines are available as GPIOs. A3..A13 - * could be too if we used A12 as a GPIO during NAND chipselect - * (and Linux did too), letting us control the LED on A7/GPIO61. - */ - REG(PINMUX2) = 0x0c08; - - /* UART0 may still be in SyncReset if we didn't boot from UART */ - davinci_enable_uart0(); - - /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */ - lpsc_on(DAVINCI_LPSC_TPCC); - lpsc_on(DAVINCI_LPSC_TPTC0); - lpsc_on(DAVINCI_LPSC_TPTC1); - - return 0; -} - -#ifdef CONFIG_DRIVER_DM9000 -int board_eth_init(bd_t *bis) -{ - return dm9000_initialize(bis); -} -#endif - -#ifdef CONFIG_NAND_DAVINCI - -static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip) -{ - struct nand_chip *this = mtd->priv; - unsigned long wbase = (unsigned long) this->IO_ADDR_W; - unsigned long rbase = (unsigned long) this->IO_ADDR_R; - - if (chip == 1) { - __set_bit(14, &wbase); - __set_bit(14, &rbase); - } else { - __clear_bit(14, &wbase); - __clear_bit(14, &rbase); - } - this->IO_ADDR_W = (void *)wbase; - this->IO_ADDR_R = (void *)rbase; -} - -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - nand->select_chip = nand_dm355evm_select_chip; - return 0; -} - -#endif - -#ifdef CONFIG_DAVINCI_MMC -static struct davinci_mmc mmc_sd0 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, - .input_clk = 108000000, - .host_caps = MMC_MODE_4BIT, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_1, -}; - -#ifdef CONFIG_DAVINCI_MMC_SD1 -static struct davinci_mmc mmc_sd1 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE, - .input_clk = 108000000, - .host_caps = MMC_MODE_4BIT, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_1, -}; -#endif - -int board_mmc_init(bd_t *bis) -{ - int err; - - /* Add slot-0 to mmc subsystem */ - err = davinci_mmc_init(bis, &mmc_sd0); - if (err) - return err; - -#ifdef CONFIG_DAVINCI_MMC_SD1 - /* Add slot-1 to mmc subsystem */ - err = davinci_mmc_init(bis, &mmc_sd1); -#endif - - return err; -} -#endif diff --git a/qemu/roms/u-boot/board/davinci/dm355leopard/Makefile b/qemu/roms/u-boot/board/davinci/dm355leopard/Makefile deleted file mode 100644 index 7035429c9..000000000 --- a/qemu/roms/u-boot/board/davinci/dm355leopard/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := dm355leopard.o diff --git a/qemu/roms/u-boot/board/davinci/dm355leopard/config.mk b/qemu/roms/u-boot/board/davinci/dm355leopard/config.mk deleted file mode 100644 index 28ff3f3d9..000000000 --- a/qemu/roms/u-boot/board/davinci/dm355leopard/config.mk +++ /dev/null @@ -1,6 +0,0 @@ -# Linux Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) -# - -#Provide at least 16MB spacing between us and the Linux Kernel image -CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/dm355leopard/dm355leopard.c b/qemu/roms/u-boot/board/davinci/dm355leopard/dm355leopard.c deleted file mode 100644 index 534184329..000000000 --- a/qemu/roms/u-boot/board/davinci/dm355leopard/dm355leopard.c +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (C) 2009 Texas Instruments Incorporated - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <nand.h> -#include <asm/io.h> -#include <asm/arch/hardware.h> -#include <asm/arch/gpio.h> -#include <asm/arch/nand_defs.h> -#include <asm/arch/davinci_misc.h> -#include <net.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - struct davinci_gpio *gpio01_base = - (struct davinci_gpio *)DAVINCI_GPIO_BANK01; - struct davinci_gpio *gpio23_base = - (struct davinci_gpio *)DAVINCI_GPIO_BANK23; - struct davinci_gpio *gpio67_base = - (struct davinci_gpio *)DAVINCI_GPIO_BANK67; - - gd->bd->bi_arch_number = MACH_TYPE_DM355_LEOPARD; - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - /* GIO 9 & 10 are used for IO */ - writel((readl(PINMUX3) & 0XF8FFFFFF), PINMUX3); - - /* Interrupt set GIO 9 */ - writel((readl(DAVINCI_GPIO_BINTEN) | 0x1), DAVINCI_GPIO_BINTEN); - - /* set GIO 9 input */ - writel((readl(&gpio01_base->dir) | (1 << 9)), &gpio01_base->dir); - - /* Both edge trigger GIO 9 */ - writel((readl(&gpio01_base->set_rising) | (1 << 9)), - &gpio01_base->set_rising); - writel((readl(&gpio01_base->dir) & ~(1 << 5)), &gpio01_base->dir); - - /* output low */ - writel((readl(&gpio01_base->set_data) & ~(1 << 5)), - &gpio01_base->set_data); - - /* set GIO 10 output */ - writel((readl(&gpio01_base->dir) & ~(1 << 10)), &gpio01_base->dir); - - /* output high */ - writel((readl(&gpio01_base->set_data) | (1 << 10)), - &gpio01_base->set_data); - - /* set GIO 32 output */ - writel((readl(&gpio23_base->dir) & ~(1 << 0)), &gpio23_base->dir); - - /* output High */ - writel((readl(&gpio23_base->set_data) | (1 << 0)), - &gpio23_base->set_data); - - /* Enable UART1 MUX Lines */ - writel((readl(PINMUX0) & ~3), PINMUX0); - writel((readl(&gpio67_base->dir) & ~(1 << 6)), &gpio67_base->dir); - writel((readl(&gpio67_base->set_data) | (1 << 6)), - &gpio67_base->set_data); - - return 0; -} - -#ifdef CONFIG_DRIVER_DM9000 -int board_eth_init(bd_t *bis) -{ - return dm9000_initialize(bis); -} -#endif - -#ifdef CONFIG_NAND_DAVINCI -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - - return 0; -} -#endif diff --git a/qemu/roms/u-boot/board/davinci/dm365evm/Makefile b/qemu/roms/u-boot/board/davinci/dm365evm/Makefile deleted file mode 100644 index d35d81c2b..000000000 --- a/qemu/roms/u-boot/board/davinci/dm365evm/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := dm365evm.o diff --git a/qemu/roms/u-boot/board/davinci/dm365evm/config.mk b/qemu/roms/u-boot/board/davinci/dm365evm/config.mk deleted file mode 100644 index 7b1e900e8..000000000 --- a/qemu/roms/u-boot/board/davinci/dm365evm/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Spectrum Digital DM365 EVM board -# DM365 EVM board has 1 bank of 128 MB DDR RAM -# Physical Address: 8000'0000 to 8800'0000 -# -# Linux Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) -# - -#Provide at least 16MB spacing between us and the Linux Kernel image -CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/dm365evm/dm365evm.c b/qemu/roms/u-boot/board/davinci/dm365evm/dm365evm.c deleted file mode 100644 index ceffd4d60..000000000 --- a/qemu/roms/u-boot/board/davinci/dm365evm/dm365evm.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Copyright (C) 2009 Texas Instruments Incorporated - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <nand.h> -#include <asm/io.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> -#include <asm/arch/nand_defs.h> -#include <asm/arch/gpio.h> -#include <netdev.h> -#include <asm/arch/davinci_misc.h> -#ifdef CONFIG_DAVINCI_MMC -#include <mmc.h> -#include <asm/arch/sdmmc_defs.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM365_EVM; - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - return 0; -} - -#ifdef CONFIG_DRIVER_TI_EMAC -int board_eth_init(bd_t *bis) -{ - uint8_t eeprom_enetaddr[6]; - int i; - struct davinci_gpio *gpio1_base = - (struct davinci_gpio *)DAVINCI_GPIO_BANK01; - - /* Configure PINMUX 3 to enable EMAC pins */ - writel((readl(PINMUX3) | 0x1affff), PINMUX3); - - /* Configure GPIO20 as output */ - writel((readl(&gpio1_base->dir) & ~(1 << 20)), &gpio1_base->dir); - - /* Toggle GPIO 20 */ - for (i = 0; i < 20; i++) { - /* GPIO 20 low */ - writel((readl(&gpio1_base->out_data) & ~(1 << 20)), - &gpio1_base->out_data); - - udelay(1000); - - /* GPIO 20 high */ - writel((readl(&gpio1_base->out_data) | (1 << 20)), - &gpio1_base->out_data); - } - - /* Configure I2C pins so that EEPROM can be read */ - writel((readl(PINMUX3) | 0x01400000), PINMUX3); - - /* Read Ethernet MAC address from EEPROM */ - if (dvevm_read_mac_address(eeprom_enetaddr)) - davinci_sync_env_enetaddr(eeprom_enetaddr); - - davinci_emac_initialize(); - - return 0; -} -#endif - -#ifdef CONFIG_NAND_DAVINCI -static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip) -{ - struct nand_chip *this = mtd->priv; - unsigned long wbase = (unsigned long) this->IO_ADDR_W; - unsigned long rbase = (unsigned long) this->IO_ADDR_R; - - if (chip == 1) { - __set_bit(14, &wbase); - __set_bit(14, &rbase); - } else { - __clear_bit(14, &wbase); - __clear_bit(14, &rbase); - } - this->IO_ADDR_W = (void *)wbase; - this->IO_ADDR_R = (void *)rbase; -} - -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - nand->select_chip = nand_dm365evm_select_chip; - return 0; -} -#endif - -#ifdef CONFIG_DAVINCI_MMC -static struct davinci_mmc mmc_sd0 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, - .input_clk = 121500000, - .host_caps = MMC_MODE_4BIT, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_2, -}; - -#ifdef CONFIG_DAVINCI_MMC_SD1 -static struct davinci_mmc mmc_sd1 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE, - .input_clk = 121500000, - .host_caps = MMC_MODE_4BIT, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_2, -}; -#endif - -int board_mmc_init(bd_t *bis) -{ - int err; - - /* Add slot-0 to mmc subsystem */ - err = davinci_mmc_init(bis, &mmc_sd0); - if (err) - return err; - -#ifdef CONFIG_DAVINCI_MMC_SD1 -#define PUPDCTL1 0x01c4007c - /* PINMUX(4)-DAT0-3/CMD; PINMUX(0)-CLK */ - writel((readl(PINMUX4) | 0x55400000), PINMUX4); - writel((readl(PINMUX0) | 0x00010000), PINMUX0); - - /* Configure MMC/SD pins as pullup */ - writel((readl(PUPDCTL1) & ~0x07c0), PUPDCTL1); - - /* Add slot-1 to mmc subsystem */ - err = davinci_mmc_init(bis, &mmc_sd1); -#endif - - return err; -} -#endif diff --git a/qemu/roms/u-boot/board/davinci/dm6467evm/Makefile b/qemu/roms/u-boot/board/davinci/dm6467evm/Makefile deleted file mode 100644 index acbbdd503..000000000 --- a/qemu/roms/u-boot/board/davinci/dm6467evm/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := dm6467evm.o diff --git a/qemu/roms/u-boot/board/davinci/dm6467evm/config.mk b/qemu/roms/u-boot/board/davinci/dm6467evm/config.mk deleted file mode 100644 index 375104389..000000000 --- a/qemu/roms/u-boot/board/davinci/dm6467evm/config.mk +++ /dev/null @@ -1,2 +0,0 @@ -#Provide at least 16MB spacing between us and the Linux Kernel image -CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/dm6467evm/dm6467evm.c b/qemu/roms/u-boot/board/davinci/dm6467evm/dm6467evm.c deleted file mode 100644 index 469c9bac4..000000000 --- a/qemu/roms/u-boot/board/davinci/dm6467evm/dm6467evm.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2009 Texas Instruments Incorporated - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> -#include <asm/io.h> -#include <nand.h> -#include <asm/arch/nand_defs.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define REV_DM6467EVM 0 -#define REV_DM6467TEVM 1 -/* - * get_board_rev() - setup to pass kernel board revision information - * Returns: - * bit[0-3] System clock frequency - * 0000b - 27 MHz - * 0001b - 33 MHz - */ -u32 get_board_rev(void) -{ - -#ifdef CONFIG_DAVINCI_DM6467TEVM - return REV_DM6467TEVM; -#else - return REV_DM6467EVM; -#endif - -} - -int board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM6467_EVM; - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - lpsc_on(DAVINCI_DM646X_LPSC_TIMER0); - lpsc_on(DAVINCI_DM646X_LPSC_UART0); - lpsc_on(DAVINCI_DM646X_LPSC_I2C); - lpsc_on(DAVINCI_DM646X_LPSC_EMAC); - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0x80000c0; - - /* Select UART function on UART0 */ - REG(PINMUX0) &= ~(0x0000003f << 18); - REG(PINMUX1) &= ~(0x00000003); - - return 0; -} - -#if defined(CONFIG_DRIVER_TI_EMAC) - -int board_eth_init(bd_t *bis) -{ - if (!davinci_emac_initialize()) { - printf("Error: Ethernet init failed!\n"); - return -1; - } - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC */ - -#ifdef CONFIG_NAND_DAVINCI -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - - return 0; -} -#endif diff --git a/qemu/roms/u-boot/board/davinci/dvevm/Makefile b/qemu/roms/u-boot/board/davinci/dvevm/Makefile deleted file mode 100644 index 7ade32596..000000000 --- a/qemu/roms/u-boot/board/davinci/dvevm/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := dvevm.o -obj-y += board_init.o diff --git a/qemu/roms/u-boot/board/davinci/dvevm/board_init.S b/qemu/roms/u-boot/board/davinci/dvevm/board_init.S deleted file mode 100644 index ded059008..000000000 --- a/qemu/roms/u-boot/board/davinci/dvevm/board_init.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Board-specific low level initialization code. Called at the very end - * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no - * initialization required. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> - -.globl dv_board_init -dv_board_init: - - mov pc, lr diff --git a/qemu/roms/u-boot/board/davinci/dvevm/config.mk b/qemu/roms/u-boot/board/davinci/dvevm/config.mk deleted file mode 100644 index ed8070723..000000000 --- a/qemu/roms/u-boot/board/davinci/dvevm/config.mk +++ /dev/null @@ -1,39 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> -# -# (C) Copyright 2003 -# Texas Instruments, <www.ti.com> -# Swaminathan <swami.iyer@ti.com> -# -# Davinci EVM board (ARM925EJS) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# Davinci EVM has 1 bank of 256 MB DDR RAM -# Physical Address: -# 8000'0000 to 9000'0000 -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# Visioneering Corp. Sonata board (ARM926EJS) cpu -# -# Sonata board has 1 bank of 128 MB DDR RAM -# Physical Address: -# 8000'0000 to 8800'0000 -# -# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu -# -# Schmoogie board has 1 bank of 128 MB DDR RAM -# Physical Address: -# 8000'0000 to 8800'0000 -# -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) -# -# we load ourself to 8108 '0000 -# -# - -#Provide at least 16MB spacing between us and the Linux Kernel image -CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/dvevm/dvevm.c b/qemu/roms/u-boot/board/davinci/dvevm/dvevm.c deleted file mode 100644 index c34bde4fa..000000000 --- a/qemu/roms/u-boot/board/davinci/dvevm/dvevm.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <i2c.h> -#include <asm/arch/hardware.h> -#include <asm/arch/davinci_misc.h> - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* Configure AEMIF pins (although this should be configured at boot time - * with pull-up/pull-down resistors) */ - REG(PINMUX0) = 0x00000c1f; - - davinci_errata_workarounds(); - - /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_GPIO); - lpsc_on(DAVINCI_LPSC_USB); - -#if !defined(CONFIG_SYS_USE_DSPLINK) - /* Powerup the DSP */ - dsp_on(); -#endif /* CONFIG_SYS_USE_DSPLINK */ - - davinci_enable_uart0(); - davinci_enable_emac(); - davinci_enable_i2c(); - - lpsc_on(DAVINCI_LPSC_TIMER1); - timer_init(); - - return(0); -} - -int misc_init_r(void) -{ - uint8_t video_mode; - uint8_t eeprom_enetaddr[6]; - - /* Read Ethernet MAC address from EEPROM if available. */ - if (dvevm_read_mac_address(eeprom_enetaddr)) - davinci_sync_env_enetaddr(eeprom_enetaddr); - - i2c_read(0x39, 0x00, 1, &video_mode, 1); - - setenv("videostd", ((video_mode & 0x80) ? "pal" : "ntsc")); - - return(0); -} - -#ifdef CONFIG_USB_DAVINCI - -/* IO Expander I2C address and USB VBUS enable mask */ -#define IOEXP_I2C_ADDR 0x3A -#define IOEXP_VBUSEN_MASK 1 - -/* - * This function enables USB VBUS by writting to IO expander using I2C. - * Note that the I2C is already initialized at this stage. This - * function is used by davinci specific USB wrapper code. - */ -void enable_vbus(void) -{ - uchar data; /* IO Expander data to enable VBUS */ - - /* Write to IO expander to enable VBUS */ - i2c_read(IOEXP_I2C_ADDR, 0, 0, &data, 1); - data &= ~IOEXP_VBUSEN_MASK; - i2c_write(IOEXP_I2C_ADDR, 0, 0, &data, 1); -} -#endif diff --git a/qemu/roms/u-boot/board/davinci/ea20/Makefile b/qemu/roms/u-boot/board/davinci/ea20/Makefile deleted file mode 100644 index a5311c40a..000000000 --- a/qemu/roms/u-boot/board/davinci/ea20/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += ea20.o diff --git a/qemu/roms/u-boot/board/davinci/ea20/ea20.c b/qemu/roms/u-boot/board/davinci/ea20/ea20.c deleted file mode 100644 index c4444c7c7..000000000 --- a/qemu/roms/u-boot/board/davinci/ea20/ea20.c +++ /dev/null @@ -1,339 +0,0 @@ -/* - * (C) Copyright 2010 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de - * - * Based on da850evm.c, original Copyrights follow: - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Based on da830evm.c. Original Copyrights follow: - * - * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <i2c.h> -#include <net.h> -#include <netdev.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> -#include <asm/arch/emac_defs.h> -#include <asm/io.h> -#include <asm/arch/davinci_misc.h> -#include <asm/gpio.h> -#include "../../../drivers/video/da8xx-fb.h" - -DECLARE_GLOBAL_DATA_PTR; - -static const struct da8xx_panel lcd_panel = { - /* Casio COM57H531x */ - .name = "Casio_COM57H531x", - .width = 640, - .height = 480, - .hfp = 12, - .hbp = 144, - .hsw = 30, - .vfp = 10, - .vbp = 35, - .vsw = 3, - .pxl_clk = 25000000, - .invert_pxl_clk = 0, -}; - -static const struct display_panel disp_panel = { - QVGA, - 16, - 16, - COLOR_ACTIVE, -}; - -static const struct lcd_ctrl_config lcd_cfg = { - &disp_panel, - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 16, - .fdd = 255, - .tft_alt_mode = 0, - .stn_565_mode = 0, - .mono_8bit_mode = 0, - .invert_line_clock = 1, - .invert_frm_clock = 1, - .sync_edge = 0, - .sync_ctrl = 1, - .raster_order = 0, -}; - -/* SPI0 pin muxer settings */ -static const struct pinmux_config spi1_pins[] = { - { pinmux(5), 1, 1 }, - { pinmux(5), 1, 2 }, - { pinmux(5), 1, 4 }, - { pinmux(5), 1, 5 } -}; - -/* I2C pin muxer settings */ -static const struct pinmux_config i2c_pins[] = { - { pinmux(4), 2, 2 }, - { pinmux(4), 2, 3 } -}; - -/* UART0 pin muxer settings */ -static const struct pinmux_config uart_pins[] = { - { pinmux(3), 2, 7 }, - { pinmux(3), 2, 6 }, - { pinmux(3), 2, 4 }, - { pinmux(3), 2, 5 } -}; - -#ifdef CONFIG_DRIVER_TI_EMAC -#define HAS_RMII 1 -static const struct pinmux_config emac_pins[] = { - { pinmux(14), 8, 2 }, - { pinmux(14), 8, 3 }, - { pinmux(14), 8, 4 }, - { pinmux(14), 8, 5 }, - { pinmux(14), 8, 6 }, - { pinmux(14), 8, 7 }, - { pinmux(15), 8, 1 }, - { pinmux(4), 8, 0 }, - { pinmux(4), 8, 1 } -}; -#endif - -#ifdef CONFIG_NAND_DAVINCI -const struct pinmux_config nand_pins[] = { - { pinmux(7), 1, 0}, /* CS2 */ - { pinmux(7), 0, 1}, /* CS3 in three state*/ - { pinmux(7), 1, 4 }, /* EMA_WE */ - { pinmux(7), 1, 5 }, /* EMA_OE */ - { pinmux(9), 1, 0 }, /* EMA_D[7] */ - { pinmux(9), 1, 1 }, /* EMA_D[6] */ - { pinmux(9), 1, 2 }, /* EMA_D[5] */ - { pinmux(9), 1, 3 }, /* EMA_D[4] */ - { pinmux(9), 1, 4 }, /* EMA_D[3] */ - { pinmux(9), 1, 5 }, /* EMA_D[2] */ - { pinmux(9), 1, 6 }, /* EMA_D[1] */ - { pinmux(9), 1, 7 }, /* EMA_D[0] */ - { pinmux(12), 1, 5 }, /* EMA_A[2] */ - { pinmux(12), 1, 6 }, /* EMA_A[1] */ - { pinmux(6), 1, 0 } /* EMA_CLK */ -}; -#endif - -const struct pinmux_config gpio_pins[] = { - { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/ - { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/ - { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/ - { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */ - { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/ -}; - -const struct pinmux_config lcd_pins[] = { - { pinmux(17), 2, 1 }, /* LCD_D_0 */ - { pinmux(17), 2, 0 }, /* LCD_D_1 */ - { pinmux(16), 2, 7 }, /* LCD_D_2 */ - { pinmux(16), 2, 6 }, /* LCD_D_3 */ - { pinmux(16), 2, 5 }, /* LCD_D_4 */ - { pinmux(16), 2, 4 }, /* LCD_D_5 */ - { pinmux(16), 2, 3 }, /* LCD_D_6 */ - { pinmux(16), 2, 2 }, /* LCD_D_7 */ - { pinmux(18), 2, 1 }, /* LCD_D_8 */ - { pinmux(18), 2, 0 }, /* LCD_D_9 */ - { pinmux(17), 2, 7 }, /* LCD_D_10 */ - { pinmux(17), 2, 6 }, /* LCD_D_11 */ - { pinmux(17), 2, 5 }, /* LCD_D_12 */ - { pinmux(17), 2, 4 }, /* LCD_D_13 */ - { pinmux(17), 2, 3 }, /* LCD_D_14 */ - { pinmux(17), 2, 2 }, /* LCD_D_15 */ - { pinmux(18), 2, 6 }, /* LCD_PCLK */ - { pinmux(19), 2, 0 }, /* LCD_HSYNC */ - { pinmux(19), 2, 1 }, /* LCD_VSYNC */ - { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */ -}; - -const struct pinmux_config halten_pin[] = { - { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */ -}; - -static const struct pinmux_resource pinmuxes[] = { -#ifdef CONFIG_SPI_FLASH - PINMUX_ITEM(spi1_pins), -#endif - PINMUX_ITEM(uart_pins), - PINMUX_ITEM(i2c_pins), -#ifdef CONFIG_NAND_DAVINCI - PINMUX_ITEM(nand_pins), -#endif -#ifdef CONFIG_VIDEO - PINMUX_ITEM(lcd_pins), -#endif -}; - -static const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART0 }, /* console */ - { DAVINCI_LPSC_GPIO }, - { DAVINCI_LPSC_LCDC }, /* LCD */ -}; - -int board_early_init_f(void) -{ - /* PinMux for GPIO */ - if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) - return 1; - - /* Set DISP_ON high to enable LCD output*/ - gpio_direction_output(97, 1); - - /* Set the RESETOUTn low */ - gpio_direction_output(111, 0); - - /* Set U0_SW0 low for UART0 as console*/ - gpio_direction_output(106, 0); - - /* Set U0_SW1 low for UART0 as console*/ - gpio_direction_output(108, 0); - - /* Set LCD_B_PWR low to power down LCD Backlight*/ - gpio_direction_output(102, 0); - -#ifndef CONFIG_USE_IRQ - irq_init(); -#endif - - /* - * NAND CS setup - cycle counts based on da850evm NAND timings in the - * Linux kernel @ 25MHz EMIFA - */ -#ifdef CONFIG_NAND_DAVINCI - writel((DAVINCI_ABCR_WSETUP(0) | - DAVINCI_ABCR_WSTROBE(1) | - DAVINCI_ABCR_WHOLD(0) | - DAVINCI_ABCR_RSETUP(0) | - DAVINCI_ABCR_RSTROBE(1) | - DAVINCI_ABCR_RHOLD(0) | - DAVINCI_ABCR_TA(0) | - DAVINCI_ABCR_ASIZE_8BIT), - &davinci_emif_regs->ab1cr); /* CS2 */ -#endif - - /* - * Power on required peripherals - * ARM does not have access by default to PSC0 and PSC1 - * assuming here that the DSP bootloader has set the IOPU - * such that PSC access is available to ARM - */ - if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) - return 1; - - /* setup the SUSPSRC for ARM to control emulation suspend */ - writel(readl(&davinci_syscfg_regs->suspsrc) & - ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | - DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | - DAVINCI_SYSCFG_SUSPSRC_UART0), - &davinci_syscfg_regs->suspsrc); - - /* configure pinmux settings */ - if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) - return 1; - -#ifdef CONFIG_DRIVER_TI_EMAC - if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) - return 1; - - davinci_emac_mii_mode_sel(HAS_RMII); -#endif /* CONFIG_DRIVER_TI_EMAC */ - - /* enable the console UART */ - writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | - DAVINCI_UART_PWREMU_MGMT_UTRST), - &davinci_uart0_ctrl_regs->pwremu_mgmt); - - /* - * Reconfigure the LCDC priority to the highest to ensure that - * the throughput/latency requirements for the LCDC are met. - */ - writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff, - &davinci_syscfg_regs->mstpri[2]); - - - return 0; -} - -/* - * Do not overwrite the console - * Use always serial for U-Boot console - */ -int overwrite_console(void) -{ - return 1; -} - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_EA20; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - da8xx_video_init(&lcd_panel, &lcd_cfg, 16); - - return 0; -} - -#ifdef CONFIG_BOARD_LATE_INIT - -int board_late_init(void) -{ - unsigned char buf[2]; - int ret; - - /* PinMux for HALTEN */ - if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0) - return 1; - - /* Set HALTEN to high */ - gpio_direction_output(134, 1); - - /* Set fixed contrast settings for LCD via I2C potentiometer */ - buf[0] = 0x00; - buf[1] = 0xd7; - ret = i2c_write(0x2e, 6, 1, buf, 2); - if (ret) - puts("\nContrast Settings FAILED\n"); - - /* Set LCD_B_PWR high to power up LCD Backlight*/ - gpio_set_value(102, 1); - return 0; -} -#endif /* CONFIG_BOARD_LATE_INIT */ - -#ifdef CONFIG_DRIVER_TI_EMAC - -/* - * Initializes on-board ethernet controllers. - */ -int board_eth_init(bd_t *bis) -{ - if (!davinci_emac_initialize()) { - printf("Error: Ethernet init failed!\n"); - return -1; - } - - /* - * This board has a RMII PHY. However, the MDC line on the SOM - * must not be disabled (there is no MII PHY on the - * baseboard) via the GPIO2[6], because this pin - * disables at the same time the SPI flash. - */ - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC */ diff --git a/qemu/roms/u-boot/board/davinci/schmoogie/Makefile b/qemu/roms/u-boot/board/davinci/schmoogie/Makefile deleted file mode 100644 index e170d551f..000000000 --- a/qemu/roms/u-boot/board/davinci/schmoogie/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := schmoogie.o -obj-y += board_init.o diff --git a/qemu/roms/u-boot/board/davinci/schmoogie/board_init.S b/qemu/roms/u-boot/board/davinci/schmoogie/board_init.S deleted file mode 100644 index ded059008..000000000 --- a/qemu/roms/u-boot/board/davinci/schmoogie/board_init.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Board-specific low level initialization code. Called at the very end - * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no - * initialization required. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> - -.globl dv_board_init -dv_board_init: - - mov pc, lr diff --git a/qemu/roms/u-boot/board/davinci/schmoogie/config.mk b/qemu/roms/u-boot/board/davinci/schmoogie/config.mk deleted file mode 100644 index ed8070723..000000000 --- a/qemu/roms/u-boot/board/davinci/schmoogie/config.mk +++ /dev/null @@ -1,39 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> -# -# (C) Copyright 2003 -# Texas Instruments, <www.ti.com> -# Swaminathan <swami.iyer@ti.com> -# -# Davinci EVM board (ARM925EJS) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# Davinci EVM has 1 bank of 256 MB DDR RAM -# Physical Address: -# 8000'0000 to 9000'0000 -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# Visioneering Corp. Sonata board (ARM926EJS) cpu -# -# Sonata board has 1 bank of 128 MB DDR RAM -# Physical Address: -# 8000'0000 to 8800'0000 -# -# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu -# -# Schmoogie board has 1 bank of 128 MB DDR RAM -# Physical Address: -# 8000'0000 to 8800'0000 -# -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) -# -# we load ourself to 8108 '0000 -# -# - -#Provide at least 16MB spacing between us and the Linux Kernel image -CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/schmoogie/schmoogie.c b/qemu/roms/u-boot/board/davinci/schmoogie/schmoogie.c deleted file mode 100644 index 741afc4df..000000000 --- a/qemu/roms/u-boot/board/davinci/schmoogie/schmoogie.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <i2c.h> -#include <asm/arch/hardware.h> -#include <asm/arch/davinci_misc.h> - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* Configure AEMIF pins (although this should be configured at boot time - * with pull-up/pull-down resistors) */ - REG(PINMUX0) = 0x00000c1f; - - davinci_errata_workarounds(); - - /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_GPIO); - -#if !defined(CONFIG_SYS_USE_DSPLINK) - /* Powerup the DSP */ - dsp_on(); -#endif /* CONFIG_SYS_USE_DSPLINK */ - - davinci_enable_uart0(); - davinci_enable_emac(); - davinci_enable_i2c(); - - lpsc_on(DAVINCI_LPSC_TIMER1); - timer_init(); - - return(0); -} - -int misc_init_r(void) -{ - u_int8_t tmp[20], buf[10]; - int i = 0; - - /* Set serial number from UID chip */ - const u_int8_t crc_tbl[256] = { - 0x00, 0x5e, 0xbc, 0xe2, 0x61, 0x3f, 0xdd, 0x83, - 0xc2, 0x9c, 0x7e, 0x20, 0xa3, 0xfd, 0x1f, 0x41, - 0x9d, 0xc3, 0x21, 0x7f, 0xfc, 0xa2, 0x40, 0x1e, - 0x5f, 0x01, 0xe3, 0xbd, 0x3e, 0x60, 0x82, 0xdc, - 0x23, 0x7d, 0x9f, 0xc1, 0x42, 0x1c, 0xfe, 0xa0, - 0xe1, 0xbf, 0x5d, 0x03, 0x80, 0xde, 0x3c, 0x62, - 0xbe, 0xe0, 0x02, 0x5c, 0xdf, 0x81, 0x63, 0x3d, - 0x7c, 0x22, 0xc0, 0x9e, 0x1d, 0x43, 0xa1, 0xff, - 0x46, 0x18, 0xfa, 0xa4, 0x27, 0x79, 0x9b, 0xc5, - 0x84, 0xda, 0x38, 0x66, 0xe5, 0xbb, 0x59, 0x07, - 0xdb, 0x85, 0x67, 0x39, 0xba, 0xe4, 0x06, 0x58, - 0x19, 0x47, 0xa5, 0xfb, 0x78, 0x26, 0xc4, 0x9a, - 0x65, 0x3b, 0xd9, 0x87, 0x04, 0x5a, 0xb8, 0xe6, - 0xa7, 0xf9, 0x1b, 0x45, 0xc6, 0x98, 0x7a, 0x24, - 0xf8, 0xa6, 0x44, 0x1a, 0x99, 0xc7, 0x25, 0x7b, - 0x3a, 0x64, 0x86, 0xd8, 0x5b, 0x05, 0xe7, 0xb9, - 0x8c, 0xd2, 0x30, 0x6e, 0xed, 0xb3, 0x51, 0x0f, - 0x4e, 0x10, 0xf2, 0xac, 0x2f, 0x71, 0x93, 0xcd, - 0x11, 0x4f, 0xad, 0xf3, 0x70, 0x2e, 0xcc, 0x92, - 0xd3, 0x8d, 0x6f, 0x31, 0xb2, 0xec, 0x0e, 0x50, - 0xaf, 0xf1, 0x13, 0x4d, 0xce, 0x90, 0x72, 0x2c, - 0x6d, 0x33, 0xd1, 0x8f, 0x0c, 0x52, 0xb0, 0xee, - 0x32, 0x6c, 0x8e, 0xd0, 0x53, 0x0d, 0xef, 0xb1, - 0xf0, 0xae, 0x4c, 0x12, 0x91, 0xcf, 0x2d, 0x73, - 0xca, 0x94, 0x76, 0x28, 0xab, 0xf5, 0x17, 0x49, - 0x08, 0x56, 0xb4, 0xea, 0x69, 0x37, 0xd5, 0x8b, - 0x57, 0x09, 0xeb, 0xb5, 0x36, 0x68, 0x8a, 0xd4, - 0x95, 0xcb, 0x29, 0x77, 0xf4, 0xaa, 0x48, 0x16, - 0xe9, 0xb7, 0x55, 0x0b, 0x88, 0xd6, 0x34, 0x6a, - 0x2b, 0x75, 0x97, 0xc9, 0x4a, 0x14, 0xf6, 0xa8, - 0x74, 0x2a, 0xc8, 0x96, 0x15, 0x4b, 0xa9, 0xf7, - 0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35 - }; - - /* Set serial number from UID chip */ - if (i2c_read(CONFIG_SYS_UID_ADDR, 0, 1, buf, 8)) { - printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR); - setenv("serial#", "FAILED"); - } else { - if (buf[0] != 0x70) { - /* Device Family Code */ - printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR); - setenv("serial#", "FAILED"); - } - } - /* Now check CRC */ - tmp[0] = 0; - for (i = 0; i < 8; i++) - tmp[0] = crc_tbl[tmp[0] ^ buf[i]]; - - if (tmp[0] != 0) { - printf("\nUID @ 0x%02x - BAD CRC!!!\n", CONFIG_SYS_UID_ADDR); - setenv("serial#", "FAILED"); - } else { - /* CRC OK, set "serial" env variable */ - sprintf((char *)&tmp[0], "%02x%02x%02x%02x%02x%02x", - buf[6], buf[5], buf[4], buf[3], buf[2], buf[1]); - setenv("serial#", (char *)&tmp[0]); - } - - return(0); -} diff --git a/qemu/roms/u-boot/board/davinci/sffsdr/Makefile b/qemu/roms/u-boot/board/davinci/sffsdr/Makefile deleted file mode 100644 index 4ab30a406..000000000 --- a/qemu/roms/u-boot/board/davinci/sffsdr/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := sffsdr.o -obj-y += board_init.o diff --git a/qemu/roms/u-boot/board/davinci/sffsdr/board_init.S b/qemu/roms/u-boot/board/davinci/sffsdr/board_init.S deleted file mode 100644 index ded059008..000000000 --- a/qemu/roms/u-boot/board/davinci/sffsdr/board_init.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Board-specific low level initialization code. Called at the very end - * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no - * initialization required. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> - -.globl dv_board_init -dv_board_init: - - mov pc, lr diff --git a/qemu/roms/u-boot/board/davinci/sffsdr/config.mk b/qemu/roms/u-boot/board/davinci/sffsdr/config.mk deleted file mode 100644 index 4fe900799..000000000 --- a/qemu/roms/u-boot/board/davinci/sffsdr/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> -# -# Copyright (C) 2008 Lyrtech <www.lyrtech.com> -# Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com> -# -# Lyrtech SFF SDR board (ARM926EJS) cpu -# -# SFF SDR board has 1 bank of 128 MB DDR RAM -# Physical Address: -# 8000'0000 to 87FF'FFFF -# -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) -# -# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0, -# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc). -# -# we load ourself to 8400'0000 to provide at least 32MB spacing -# between us and the Integrity kernel image -CONFIG_SYS_TEXT_BASE = 0x84000000 diff --git a/qemu/roms/u-boot/board/davinci/sffsdr/sffsdr.c b/qemu/roms/u-boot/board/davinci/sffsdr/sffsdr.c deleted file mode 100644 index f6ab91e6f..000000000 --- a/qemu/roms/u-boot/board/davinci/sffsdr/sffsdr.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Copyright (C) 2008 Lyrtech <www.lyrtech.com> - * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * - * Copyright (C) 2004 Texas Instruments. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <i2c.h> -#include <asm/arch/hardware.h> -#include <asm/arch/davinci_misc.h> - -#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ -#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */ - -#define INTEGRITY_SYSCFG_OFFSET 0x7E8 -#define INTEGRITY_CHECKWORD_OFFSET 0x7F8 -#define INTEGRITY_CHECKWORD_VALUE 0x10ADBEEF - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_SFFSDR; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - davinci_errata_workarounds(); - - /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_GPIO); - -#if !defined(CONFIG_SYS_USE_DSPLINK) - /* Powerup the DSP */ - dsp_on(); -#endif /* CONFIG_SYS_USE_DSPLINK */ - - davinci_enable_uart0(); - davinci_enable_emac(); - davinci_enable_i2c(); - - lpsc_on(DAVINCI_LPSC_TIMER1); - timer_init(); - - return(0); -} - -/* Read ethernet MAC address from Integrity data structure inside EEPROM. - * Returns 1 if found, 0 otherwise. - */ -static int sffsdr_read_mac_address(uint8_t *buf) -{ - u_int32_t value, mac[2], address; - - /* Read Integrity data structure checkword. */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET, - CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) - goto err; - if (value != INTEGRITY_CHECKWORD_VALUE) - return 0; - - /* Read SYSCFG structure offset. */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET, - CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) - goto err; - address = 0x800 + (int) value; /* Address of SYSCFG structure. */ - - /* Read NET CONFIG structure offset. */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, address, - CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) - goto err; - address = 0x800 + (int) value; /* Address of NET CONFIG structure. */ - address += 12; /* Address of NET INTERFACE CONFIG structure. */ - - /* Read NET INTERFACE CONFIG 2 structure offset. */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, address, - CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) - goto err; - address = 0x800 + 16 + (int) value; /* Address of NET INTERFACE - * CONFIG 2 structure. */ - - /* Read MAC address. */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, address, - CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8)) - goto err; - - buf[0] = mac[0] >> 24; - buf[1] = mac[0] >> 16; - buf[2] = mac[0] >> 8; - buf[3] = mac[0]; - buf[4] = mac[1] >> 24; - buf[5] = mac[1] >> 16; - - return 1; /* Found */ - -err: - printf("Read from EEPROM @ 0x%02x failed\n", CONFIG_SYS_I2C_EEPROM_ADDR); - return 0; -} - -/* Platform dependent initialisation. */ -int misc_init_r(void) -{ - uint8_t i2cbuf; - uint8_t eeprom_enetaddr[6]; - - /* EMIF-A CS3 configuration for FPGA. */ - REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; - - /* Configure I2C switch (PCA9543) to enable channel 0. */ - i2cbuf = CONFIG_SYS_I2C_PCA9543_ENABLE_CH0; - if (i2c_write(CONFIG_SYS_I2C_PCA9543_ADDR, 0, - CONFIG_SYS_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) { - printf("Write to MUX @ 0x%02x failed\n", CONFIG_SYS_I2C_PCA9543_ADDR); - return 1; - } - - /* Read Ethernet MAC address from EEPROM if available. */ - if (sffsdr_read_mac_address(eeprom_enetaddr)) - davinci_sync_env_enetaddr(eeprom_enetaddr); - - return(0); -} diff --git a/qemu/roms/u-boot/board/davinci/sonata/Makefile b/qemu/roms/u-boot/board/davinci/sonata/Makefile deleted file mode 100644 index 92e1a180c..000000000 --- a/qemu/roms/u-boot/board/davinci/sonata/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := sonata.o -obj-y += board_init.o diff --git a/qemu/roms/u-boot/board/davinci/sonata/board_init.S b/qemu/roms/u-boot/board/davinci/sonata/board_init.S deleted file mode 100644 index 0a47ad5eb..000000000 --- a/qemu/roms/u-boot/board/davinci/sonata/board_init.S +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Board-specific low level initialization code. Called at the very end - * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no - * initialization required. - * - * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer - * Sonata boards, AFAIK, don't use this so it's just return by default. Ask - * Visioneering if they reinvented the wheel once again to make sure :) - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> - -.globl dv_board_init -dv_board_init: -#ifdef SONATA_BOARD_GPIOWP - /* Set PINMUX0 to enable GPIO4 */ - ldr r0, _PINMUX0 - ldr r1, GPIO4_EN_MASK - ldr r2, [r0] - and r2, r2, r1 - str r2, [r0] - - /* Enable GPIO LPSC module */ - ldr r0, PTSTAT - -gpio_ptstat_loop1: - ldr r2, [r0] - tst r2, $0x00000001 - bne gpio_ptstat_loop1 - - ldr r1, MDCTL_GPIO - ldr r2, [r1] - and r2, r2, $0xfffffff8 - orr r2, r2, $0x00000003 - str r2, [r1] - - orr r2, r2, $0x00000200 - str r2, [r1] - - ldr r1, PTCMD - mov r2, $0x00000001 - str r2, [r1] - -gpio_ptstat_loop2: - ldr r2, [r0] - tst r2, $0x00000001 - bne gpio_ptstat_loop2 - - ldr r0, MDSTAT_GPIO -gpio_mdstat_loop: - ldr r2, [r0] - and r2, r2, $0x0000001f - teq r2, $0x00000003 - bne gpio_mdstat_loop - - /* GPIO4 -> output */ - ldr r0, GPIO_DIR01 - mov r1, $0x10 - ldr r2, [r0] - bic r2, r2, r0 - str r2, [r0] - - /* Set it to 0 (Write Protect) */ - ldr r0, GPIO_CLR_DATA01 - str r1, [r0] -#endif - - mov pc, lr - -#ifdef SONATA_BOARD_GPIOWP -.ltorg - -GPIO4_EN_MASK: - .word 0xf77fffff -MDCTL_GPIO: - .word 0x01c41a68 -MDSTAT_GPIO: - .word 0x01c41868 -GPIO_DIR01: - .word 0x01c67010 -GPIO_CLR_DATA01: - .word 0x01c6701c -#endif diff --git a/qemu/roms/u-boot/board/davinci/sonata/config.mk b/qemu/roms/u-boot/board/davinci/sonata/config.mk deleted file mode 100644 index ed8070723..000000000 --- a/qemu/roms/u-boot/board/davinci/sonata/config.mk +++ /dev/null @@ -1,39 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> -# -# (C) Copyright 2003 -# Texas Instruments, <www.ti.com> -# Swaminathan <swami.iyer@ti.com> -# -# Davinci EVM board (ARM925EJS) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# Davinci EVM has 1 bank of 256 MB DDR RAM -# Physical Address: -# 8000'0000 to 9000'0000 -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# Visioneering Corp. Sonata board (ARM926EJS) cpu -# -# Sonata board has 1 bank of 128 MB DDR RAM -# Physical Address: -# 8000'0000 to 8800'0000 -# -# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu -# -# Schmoogie board has 1 bank of 128 MB DDR RAM -# Physical Address: -# 8000'0000 to 8800'0000 -# -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) -# -# we load ourself to 8108 '0000 -# -# - -#Provide at least 16MB spacing between us and the Linux Kernel image -CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/sonata/sonata.c b/qemu/roms/u-boot/board/davinci/sonata/sonata.c deleted file mode 100644 index aa0404124..000000000 --- a/qemu/roms/u-boot/board/davinci/sonata/sonata.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <nand.h> -#include <asm/arch/nand_defs.h> -#include <asm/arch/hardware.h> -#include <asm/arch/davinci_misc.h> - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* Configure AEMIF pins (although this should be configured at boot time - * with pull-up/pull-down resistors) */ - REG(PINMUX0) = 0x00000c1f; - - davinci_errata_workarounds(); - - /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_GPIO); - -#if !defined(CONFIG_SYS_USE_DSPLINK) - /* Powerup the DSP */ - dsp_on(); -#endif /* CONFIG_SYS_USE_DSPLINK */ - - davinci_enable_uart0(); - davinci_enable_emac(); - davinci_enable_i2c(); - - lpsc_on(DAVINCI_LPSC_TIMER1); - timer_init(); - - return(0); -} - -int misc_init_r(void) -{ - uint8_t eeprom_enetaddr[6]; - - /* Read Ethernet MAC address from EEPROM if available. */ - if (dvevm_read_mac_address(eeprom_enetaddr)) - davinci_sync_env_enetaddr(eeprom_enetaddr); - - return(0); -} - -#ifdef CONFIG_NAND_DAVINCI - -/* Set WP on deselect, write enable on select */ -static void nand_sonata_select_chip(struct mtd_info *mtd, int chip) -{ -#define GPIO_SET_DATA01 0x01c67018 -#define GPIO_CLR_DATA01 0x01c6701c -#define GPIO_NAND_WP (1 << 4) -#ifdef SONATA_BOARD_GPIOWP - if (chip < 0) { - REG(GPIO_CLR_DATA01) |= GPIO_NAND_WP; - } else { - REG(GPIO_SET_DATA01) |= GPIO_NAND_WP; - } -#endif -} - -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - nand->select_chip = nand_sonata_select_chip; - return 0; -} - -#endif /* CONFIG_NAND_DAVINCI */ |