diff options
author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
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committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/cu824/cu824.c | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/cu824/cu824.c')
-rw-r--r-- | qemu/roms/u-boot/board/cu824/cu824.c | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/cu824/cu824.c b/qemu/roms/u-boot/board/cu824/cu824.c new file mode 100644 index 000000000..6b23c5378 --- /dev/null +++ b/qemu/roms/u-boot/board/cu824/cu824.c @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2001 + * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. + * + * (C) Copyright 2001-2006 + * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> + + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <mpc824x.h> +#include <asm/processor.h> +#include <pci.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define BOARD_REV_REG 0xFE80002B + +int checkboard (void) +{ + char revision = *(volatile char *)(BOARD_REV_REG); + char buf[32]; + + puts ("Board: CU824 "); + printf("Revision %d ", revision); + printf("Local Bus at %s MHz\n", strmhz(buf, gd->bus_clk)); + + return 0; +} + +phys_size_t initdram(int board_type) +{ + long size; + long new_bank0_end; + long mear1; + long emear1; + + size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE); + + new_bank0_end = size - 1; + mear1 = mpc824x_mpc107_getreg(MEAR1); + emear1 = mpc824x_mpc107_getreg(EMEAR1); + mear1 = (mear1 & 0xFFFFFF00) | + ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT); + emear1 = (emear1 & 0xFFFFFF00) | + ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT); + mpc824x_mpc107_setreg(MEAR1, mear1); + mpc824x_mpc107_setreg(EMEAR1, emear1); + + return (size); +} + +/* + * Initialize PCI Devices, report devices found. + */ +#ifndef CONFIG_PCI_PNP +static struct pci_config_table pci_sandpoint_config_table[] = { + { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID, + pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, + PCI_ENET0_MEMADDR, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, + + { } +}; +#endif + +struct pci_controller hose = { +#ifndef CONFIG_PCI_PNP + config_table: pci_sandpoint_config_table, +#endif +}; + +void pci_init_board(void) +{ + pci_mpc824x_init(&hose); +} + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} |