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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/compal
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/compal')
-rw-r--r--qemu/roms/u-boot/board/compal/paz00/Makefile19
-rw-r--r--qemu/roms/u-boot/board/compal/paz00/paz00.c60
2 files changed, 79 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/compal/paz00/Makefile b/qemu/roms/u-boot/board/compal/paz00/Makefile
new file mode 100644
index 000000000..e6a0b2999
--- /dev/null
+++ b/qemu/roms/u-boot/board/compal/paz00/Makefile
@@ -0,0 +1,19 @@
+#
+# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms and conditions of the GNU General Public License,
+# version 2, as published by the Free Software Foundation.
+#
+# This program is distributed in the hope it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+
+obj-y := paz00.o
+
+include $(srctree)/board/nvidia/common/common.mk
diff --git a/qemu/roms/u-boot/board/compal/paz00/paz00.c b/qemu/roms/u-boot/board/compal/paz00/paz00.c
new file mode 100644
index 000000000..462ab0555
--- /dev/null
+++ b/qemu/roms/u-boot/board/compal/paz00/paz00.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch/pinmux.h>
+#include <asm/gpio.h>
+
+#ifdef CONFIG_TEGRA_MMC
+/*
+ * Routine: pin_mux_mmc
+ * Description: setup the pin muxes/tristate values for the SDMMC(s)
+ */
+void pin_mux_mmc(void)
+{
+ /* SDMMC4: config 3, x8 on 2nd set of pins */
+ pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
+
+ pinmux_tristate_disable(PMUX_PINGRP_ATB);
+ pinmux_tristate_disable(PMUX_PINGRP_GMA);
+ pinmux_tristate_disable(PMUX_PINGRP_GME);
+
+ /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
+ pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
+
+ pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
+
+ /* For power GPIO PV1 */
+ pinmux_tristate_disable(PMUX_PINGRP_UAC);
+ /* For CD GPIO PV5 */
+ pinmux_tristate_disable(PMUX_PINGRP_GPV);
+}
+#endif
+
+#ifdef CONFIG_LCD
+/* this is a weak define that we are overriding */
+void pin_mux_display(void)
+{
+ debug("init display pinmux\n");
+
+ /* EN_VDD_PANEL GPIO A4 */
+ pinmux_tristate_disable(PMUX_PINGRP_DAP2);
+}
+#endif