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authorRajithaY <rajithax.yerrumsetty@intel.com>2017-04-25 03:31:15 -0700
committerRajitha Yerrumchetty <rajithax.yerrumsetty@intel.com>2017-05-22 06:48:08 +0000
commitbb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch)
treeca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/board/atmel
parenta14b48d18a9ed03ec191cf16b162206998a895ce (diff)
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to kvmfornfv repo and make use of the updated latest qemu for the execution of all testcase Change-Id: I1280af507a857675c7f81d30c95255635667bdd7 Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/atmel')
-rw-r--r--qemu/roms/u-boot/board/atmel/at91rm9200ek/Makefile9
-rw-r--r--qemu/roms/u-boot/board/atmel/at91rm9200ek/at91rm9200ek.c61
-rw-r--r--qemu/roms/u-boot/board/atmel/at91rm9200ek/led.c73
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9260ek/Makefile14
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9260ek/at91sam9260ek.c175
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9260ek/led.c21
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9260ek/partition.c26
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9261ek/Makefile14
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9261ek/at91sam9261ek.c281
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9261ek/led.c30
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9261ek/partition.c26
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9263ek/Makefile14
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9263ek/at91sam9263ek.c287
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9263ek/led.c30
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9263ek/partition.c25
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/Makefile13
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c315
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/led.c27
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9n12ek/Makefile16
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9n12ek/at91sam9n12ek.c259
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9rlek/Makefile14
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9rlek/at91sam9rlek.c203
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9rlek/led.c29
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9rlek/partition.c25
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9x5ek/Makefile16
-rw-r--r--qemu/roms/u-boot/board/atmel/at91sam9x5ek/at91sam9x5ek.c295
-rw-r--r--qemu/roms/u-boot/board/atmel/atngw100/Makefile6
-rw-r--r--qemu/roms/u-boot/board/atmel/atngw100/atngw100.c125
-rw-r--r--qemu/roms/u-boot/board/atmel/atngw100mkii/Makefile6
-rw-r--r--qemu/roms/u-boot/board/atmel/atngw100mkii/atngw100mkii.c140
-rw-r--r--qemu/roms/u-boot/board/atmel/atstk1000/Makefile9
-rw-r--r--qemu/roms/u-boot/board/atmel/atstk1000/atstk1000.c125
-rw-r--r--qemu/roms/u-boot/board/atmel/sama5d3_xplained/Makefile15
-rw-r--r--qemu/roms/u-boot/board/atmel/sama5d3_xplained/sama5d3_xplained.c130
-rw-r--r--qemu/roms/u-boot/board/atmel/sama5d3xek/Makefile15
-rw-r--r--qemu/roms/u-boot/board/atmel/sama5d3xek/sama5d3xek.c388
36 files changed, 0 insertions, 3257 deletions
diff --git a/qemu/roms/u-boot/board/atmel/at91rm9200ek/Makefile b/qemu/roms/u-boot/board/atmel/at91rm9200ek/Makefile
deleted file mode 100644
index 0530830b9..000000000
--- a/qemu/roms/u-boot/board/atmel/at91rm9200ek/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91rm9200ek.o
-obj-y += led.o
diff --git a/qemu/roms/u-boot/board/atmel/at91rm9200ek/at91rm9200ek.c b/qemu/roms/u-boot/board/atmel/at91rm9200ek/at91rm9200ek.c
deleted file mode 100644
index 64ab57261..000000000
--- a/qemu/roms/u-boot/board/atmel/at91rm9200ek/at91rm9200ek.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * (C) Copyright 2010 Andreas Bießmann <andreas.devel@gmail.com>
- *
- * derived from previous work
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-int board_init(void)
-{
- at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE;
-
- /*
- * Correct IRDA resistor problem
- * Set PA23_TXD in Output
- */
- writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer);
-
- /* arch number of AT91RM9200EK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200EK;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
- return 0;
-}
-
-int board_early_init_f(void)
-{
- at91_seriald_hw_init();
- return 0;
-}
-
-int dram_init (void)
-{
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_AT91EMAC
-int board_eth_init(bd_t *bis)
-{
- return at91emac_register(bis, (u32) ATMEL_BASE_EMAC);
-}
-#endif
diff --git a/qemu/roms/u-boot/board/atmel/at91rm9200ek/led.c b/qemu/roms/u-boot/board/atmel/at91rm9200ek/led.c
deleted file mode 100644
index 2298e3619..000000000
--- a/qemu/roms/u-boot/board/atmel/at91rm9200ek/led.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * (C) Copyright 2006
- * Atmel Nordic AB <www.atmel.com>
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * (C) Copyright 2010
- * Andreas Bießmann <andreas.devel@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_pio.h>
-
-/* bit mask in PIO port B */
-#define GREEN_LED (1<<0)
-#define YELLOW_LED (1<<1)
-#define RED_LED (1<<2)
-
-void green_led_on(void)
-{
- at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
- writel(GREEN_LED, &pio->piob.codr);
-}
-
-void yellow_led_on(void)
-{
- at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
- writel(YELLOW_LED, &pio->piob.codr);
-}
-
-void red_led_on(void)
-{
- at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
- writel(RED_LED, &pio->piob.codr);
-}
-
-void green_led_off(void)
-{
- at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
- writel(GREEN_LED, &pio->piob.sodr);
-}
-
-void yellow_led_off(void)
-{
- at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
- writel(YELLOW_LED, &pio->piob.sodr);
-}
-
-void red_led_off(void)
-{
- at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
- writel(RED_LED, &pio->piob.sodr);
-}
-
-void coloured_LED_init (void)
-{
- at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
- at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
-
- /* Enable PIOB clock */
- writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
-
- /* Disable peripherals on LEDs */
- writel(GREEN_LED | YELLOW_LED | RED_LED, &pio->piob.per);
- /* Enable pins as outputs */
- writel(GREEN_LED | YELLOW_LED | RED_LED, &pio->piob.oer);
- /* Turn all LEDs OFF */
- writel(GREEN_LED | YELLOW_LED | RED_LED, &pio->piob.sodr);
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9260ek/Makefile b/qemu/roms/u-boot/board/atmel/at91sam9260ek/Makefile
deleted file mode 100644
index c6edbeee2..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9260ek/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91sam9260ek.o
-obj-y += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9260ek/at91sam9260ek.c b/qemu/roms/u-boot/board/atmel/at91sam9260ek/at91sam9260ek.c
deleted file mode 100644
index 7f14af101..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/at91sam9260_matrix.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/gpio.h>
-#include <atmel_mci.h>
-
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-# include <net.h>
-#endif
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-#ifdef CONFIG_CMD_NAND
-static void at91sam9260ek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
- unsigned long csa;
-
- /* Assign CS3 to NAND/SmartMedia Interface */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
- writel(csa, &matrix->ebicsa);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
- &smc->cs[3].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(2),
- &smc->cs[3].mode);
-
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
-
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
-
-}
-#endif
-
-#ifdef CONFIG_MACB
-static void at91sam9260ek_macb_hw_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
-
- /* Enable EMAC clock */
- writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
-
- /*
- * Disable pull-up on:
- * RXDV (PA17) => PHY normal mode (not Test mode)
- * ERX0 (PA14) => PHY ADDR0
- * ERX1 (PA15) => PHY ADDR1
- * ERX2 (PA25) => PHY ADDR2
- * ERX3 (PA26) => PHY ADDR3
- * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
- *
- * PHY has internal pull-down
- */
- writel(pin_to_mask(AT91_PIN_PA14) |
- pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA17) |
- pin_to_mask(AT91_PIN_PA25) |
- pin_to_mask(AT91_PIN_PA26) |
- pin_to_mask(AT91_PIN_PA28),
- &pioa->pudr);
-
- at91_phy_reset();
-
- /* Re-enable pull-up */
- writel(pin_to_mask(AT91_PIN_PA14) |
- pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA17) |
- pin_to_mask(AT91_PIN_PA25) |
- pin_to_mask(AT91_PIN_PA26) |
- pin_to_mask(AT91_PIN_PA28),
- &pioa->puer);
-
- /* Initialize EMAC=MACB hardware */
- at91_macb_hw_init();
-}
-#endif
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bd)
-{
- at91_mci_hw_init();
-
- return atmel_mci_init((void *)ATMEL_BASE_MCI);
-}
-#endif
-
-int board_early_init_f(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- /* Enable clocks for all PIOs */
- writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
- (1 << ATMEL_ID_PIOC),
- &pmc->pcer);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
- at91_seriald_hw_init();
-#ifdef CONFIG_CMD_NAND
- at91sam9260ek_nand_hw_init();
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init((1 << 0) | (1 << 1));
-#endif
-#ifdef CONFIG_MACB
- at91sam9260ek_macb_hw_init();
-#endif
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(
- (void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
-}
-#endif
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
-#endif
- return rc;
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9260ek/led.c b/qemu/roms/u-boot/board/atmel/at91sam9260ek/led.c
deleted file mode 100644
index 56d811ca4..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9260ek/led.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/gpio.h>
-
-void coloured_LED_init(void)
-{
- /* Clock is enabled in board_early_init_f() */
- at91_set_gpio_output(CONFIG_RED_LED, 1);
- at91_set_gpio_output(CONFIG_GREEN_LED, 1);
-
- at91_set_gpio_value(CONFIG_RED_LED, 0);
- at91_set_gpio_value(CONFIG_GREEN_LED, 1);
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9260ek/partition.c b/qemu/roms/u-boot/board/atmel/at91sam9260ek/partition.c
deleted file mode 100644
index e41eefe46..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9260ek/partition.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1}
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
- {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
- {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
- {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
- {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
- {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
-};
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9261ek/Makefile b/qemu/roms/u-boot/board/atmel/at91sam9261ek/Makefile
deleted file mode 100644
index c547fed42..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9261ek/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91sam9261ek.o
-obj-y += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9261ek/at91sam9261ek.c b/qemu/roms/u-boot/board/atmel/at91sam9261ek/at91sam9261ek.c
deleted file mode 100644
index 3e8f062f8..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9261ek/at91sam9261ek.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/at91sam9261.h>
-#include <asm/arch/at91sam9261_matrix.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/gpio.h>
-#include <lcd.h>
-#include <atmel_lcdc.h>
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
-#include <net.h>
-#include <netdev.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-#ifdef CONFIG_CMD_NAND
-static void at91sam9261ek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- unsigned long csa;
-
- /* Enable CS3 */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
-
- writel(csa, &matrix->ebicsa);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
-#ifdef CONFIG_AT91SAM9G10EK
- writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(7) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(7),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
- &smc->cs[3].cycle);
-#else
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
- &smc->cs[3].cycle);
-#endif
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(2),
- &smc->cs[3].mode);
-
- writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
-
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
-
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
-
- at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
- at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
-}
-#endif
-
-#ifdef CONFIG_DRIVER_DM9000
-static void at91sam9261ek_dm9000_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
-
- /* Configure SMC CS2 for DM9000 */
-#ifdef CONFIG_AT91SAM9G10EK
- writel(AT91_SMC_SETUP_NWE(3) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(3) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[2].setup);
- writel(AT91_SMC_PULSE_NWE(6) | AT91_SMC_PULSE_NCS_WR(8) |
- AT91_SMC_PULSE_NRD(6) | AT91_SMC_PULSE_NCS_RD(8),
- &smc->cs[2].pulse);
- writel(AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20),
- &smc->cs[2].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
- AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
- AT91_SMC_MODE_TDF_CYCLE(1),
- &smc->cs[2].mode);
-#else
- writel(AT91_SMC_SETUP_NWE(3) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[2].setup);
- writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) |
- AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8),
- &smc->cs[2].pulse);
- writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16),
- &smc->cs[2].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
- AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
- AT91_SMC_MODE_TDF_CYCLE(1),
- &smc->cs[2].mode);
-#endif
-
- /* Configure Reset signal as output */
- at91_set_gpio_output(AT91_PIN_PC10, 0);
-
- /* Configure Interrupt pin as input, no pull-up */
- at91_set_gpio_input(AT91_PIN_PC11, 0);
-}
-#endif
-
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- vl_col: 240,
- vl_row: 320,
- vl_clk: 4965000,
- vl_sync: ATMEL_LCDC_INVLINE_INVERTED |
- ATMEL_LCDC_INVFRAME_INVERTED,
- vl_bpix: 3,
- vl_tft: 1,
- vl_hsync_len: 5,
- vl_left_margin: 1,
- vl_right_margin:33,
- vl_vsync_len: 1,
- vl_upper_margin:1,
- vl_lower_margin:0,
- mmio: ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
-}
-
-static void at91sam9261ek_lcd_hw_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
- at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
- at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
- at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
- at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
- at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
- at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
- at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
- at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
- at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
- at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
- at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
- at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
- at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
- at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
- at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
- at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
- at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
- at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
- at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
- at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
- at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
-
- writel(AT91_PMC_HCK1, &pmc->scer);
-
- /* For 9G10EK, let U-Boot allocate the framebuffer in SDRAM */
-#ifdef CONFIG_AT91SAM9261EK
- gd->fb_base = ATMEL_BASE_SRAM;
-#endif
-}
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-
-void lcd_show_board_info(void)
-{
- ulong dram_size, nand_size;
- int i;
- char temp[32];
-
- lcd_printf ("%s\n", U_BOOT_VERSION);
- lcd_printf ("(C) 2008 ATMEL Corp\n");
- lcd_printf ("at91support@atmel.com\n");
- lcd_printf ("%s CPU at %s MHz\n",
- ATMEL_CPU_NAME,
- strmhz(temp, get_cpu_clk_rate()));
-
- dram_size = 0;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
- dram_size += gd->bd->bi_dram[i].size;
- nand_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
- nand_size += nand_info[i].size;
- lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
- dram_size >> 20,
- nand_size >> 20 );
-}
-#endif /* CONFIG_LCD_INFO */
-#endif
-
-int board_init(void)
-{
-#ifdef CONFIG_AT91SAM9G10EK
- /* arch number of AT91SAM9G10EK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G10EK;
-#else
- /* arch number of AT91SAM9261EK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK;
-#endif
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
- at91_seriald_hw_init();
-#ifdef CONFIG_CMD_NAND
- at91sam9261ek_nand_hw_init();
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
-#ifdef CONFIG_DRIVER_DM9000
- at91sam9261ek_dm9000_hw_init();
-#endif
-#ifdef CONFIG_LCD
- at91sam9261ek_lcd_hw_init();
-#endif
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
-{
- return dm9000_initialize(bis);
-}
-#endif
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
-
- return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
-#ifdef CONFIG_DRIVER_DM9000
- /*
- * Initialize ethernet HW addr prior to starting Linux,
- * needed for nfsroot
- */
- eth_init(gd->bd);
-#endif
-}
-#endif
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9261ek/led.c b/qemu/roms/u-boot/board/atmel/at91sam9261ek/led.c
deleted file mode 100644
index 18a68d8c5..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9261ek/led.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/at91sam9261.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/io.h>
-
-void coloured_LED_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- /* Enable clock */
- writel(ATMEL_ID_PIOA, &pmc->pcer);
-
- at91_set_gpio_output(CONFIG_RED_LED, 1);
- at91_set_gpio_output(CONFIG_GREEN_LED, 1);
- at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
-
- at91_set_gpio_value(CONFIG_RED_LED, 0);
- at91_set_gpio_value(CONFIG_GREEN_LED, 1);
- at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9261ek/partition.c b/qemu/roms/u-boot/board/atmel/at91sam9261ek/partition.c
deleted file mode 100644
index ed9760929..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9261ek/partition.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3}
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
- {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
- {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
- {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
- {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
- {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
-};
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9263ek/Makefile b/qemu/roms/u-boot/board/atmel/at91sam9263ek/Makefile
deleted file mode 100644
index 7b31f18e4..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9263ek/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91sam9263ek.o
-obj-y += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9263ek/at91sam9263ek.c b/qemu/roms/u-boot/board/atmel/at91sam9263ek/at91sam9263ek.c
deleted file mode 100644
index db2987980..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/sizes.h>
-#include <asm/arch/at91sam9263.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_matrix.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/clk.h>
-#include <asm/io.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/hardware.h>
-#include <lcd.h>
-#include <atmel_lcdc.h>
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-#include <net.h>
-#endif
-#include <netdev.h>
-#include <atmel_mci.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-#ifdef CONFIG_CMD_NAND
-static void at91sam9263ek_nand_hw_init(void)
-{
- unsigned long csa;
- at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0;
- at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
- /* Enable CS3 */
- csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
- writel(csa, &matrix->csa[0]);
-
- /* Enable CS3 */
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
-
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
- &smc->cs[3].pulse);
-
- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
- &smc->cs[3].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(2),
- &smc->cs[3].mode);
-
- writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE,
- &pmc->pcer);
-
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
-
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
-}
-#endif
-
-#ifdef CONFIG_MACB
-static void at91sam9263ek_macb_hw_init(void)
-{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-
- /* Enable clock */
- writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
-
- /*
- * Disable pull-up on:
- * RXDV (PC25) => PHY normal mode (not Test mode)
- * ERX0 (PE25) => PHY ADDR0
- * ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
- *
- * PHY has internal pull-down
- */
- writel(1 << 25, &pio->pioc.pudr);
- writel((1 << 25) | (1 <<26), &pio->pioe.pudr);
-
- at91_phy_reset();
-
- /* Re-enable pull-up */
- writel(1 << 25, &pio->pioc.puer);
- writel((1 << 25) | (1 <<26), &pio->pioe.puer);
-
- at91_macb_hw_init();
-}
-#endif
-
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- vl_col: 240,
- vl_row: 320,
- vl_clk: 4965000,
- vl_sync: ATMEL_LCDC_INVLINE_INVERTED |
- ATMEL_LCDC_INVFRAME_INVERTED,
- vl_bpix: 3,
- vl_tft: 1,
- vl_hsync_len: 5,
- vl_left_margin: 1,
- vl_right_margin:33,
- vl_vsync_len: 1,
- vl_upper_margin:1,
- vl_lower_margin:0,
- mmio: ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_pio_value(AT91_PIO_PORTA, 30, 1); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_pio_value(AT91_PIO_PORTA, 30, 0); /* power down */
-}
-
-static void at91sam9263ek_lcd_hw_init(void)
-{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
- at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
- at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */
- at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */
- at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */
- at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */
- at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */
- at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */
- at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */
- at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */
- at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */
- at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */
- at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */
- at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */
- at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */
- at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */
- at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */
- at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */
- at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */
- at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */
- at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */
- at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
- at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
-
- writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
- gd->fb_base = ATMEL_BASE_SRAM0;
-}
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-
-#ifndef CONFIG_SYS_NO_FLASH
-extern flash_info_t flash_info[];
-#endif
-
-void lcd_show_board_info(void)
-{
- ulong dram_size, nand_size;
-#ifndef CONFIG_SYS_NO_FLASH
- ulong flash_size;
-#endif
- int i;
- char temp[32];
-
- lcd_printf ("%s\n", U_BOOT_VERSION);
- lcd_printf ("(C) 2008 ATMEL Corp\n");
- lcd_printf ("at91support@atmel.com\n");
- lcd_printf ("%s CPU at %s MHz\n",
- ATMEL_CPU_NAME,
- strmhz(temp, get_cpu_clk_rate()));
-
- dram_size = 0;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
- dram_size += gd->bd->bi_dram[i].size;
- nand_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
- nand_size += nand_info[i].size;
-#ifndef CONFIG_SYS_NO_FLASH
- flash_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
- flash_size += flash_info[i].size;
-#endif
- lcd_printf (" %ld MB SDRAM, %ld MB NAND",
- dram_size >> 20,
- nand_size >> 20 );
-#ifndef CONFIG_SYS_NO_FLASH
- lcd_printf (",\n %ld MB NOR",
- flash_size >> 20);
-#endif
- lcd_puts ("\n");
-}
-#endif /* CONFIG_LCD_INFO */
-#endif
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bd)
-{
- at91_mci_hw_init();
-
- return atmel_mci_init((void *)ATMEL_BASE_MCI1);
-}
-#endif
-
-int board_early_init_f(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- /* Enable clocks for all PIOs */
- writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
- (1 << ATMEL_ID_PIOCDE),
- &pmc->pcer);
-
- at91_seriald_hw_init();
- return 0;
-}
-
-int board_init(void)
-{
- /* arch number of AT91SAM9263EK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_CMD_NAND
- at91sam9263ek_nand_hw_init();
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_set_pio_output(AT91_PIO_PORTE, 20, 1); /* select spi0 clock */
- at91_spi0_hw_init(1 << 0);
-#endif
-#ifdef CONFIG_MACB
- at91sam9263ek_macb_hw_init();
-#endif
-#ifdef CONFIG_USB_OHCI_NEW
- at91_uhp_hw_init();
-#endif
-#ifdef CONFIG_LCD
- at91sam9263ek_lcd_hw_init();
-#endif
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
-
- return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
-}
-#endif
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x00);
-#endif
- return rc;
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9263ek/led.c b/qemu/roms/u-boot/board/atmel/at91sam9263ek/led.c
deleted file mode 100644
index e317d9983..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9263ek/led.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91sam9263.h>
-
-void coloured_LED_init(void)
-{
- /* Enable clock */
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
- writel(1 << ATMEL_ID_PIOB | 1 << ATMEL_ID_PIOCDE,
- &pmc->pcer);
-
- at91_set_gpio_output(CONFIG_RED_LED, 1);
- at91_set_gpio_output(CONFIG_GREEN_LED, 1);
- at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
-
- at91_set_gpio_value(CONFIG_RED_LED, 0);
- at91_set_gpio_value(CONFIG_GREEN_LED, 1);
- at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9263ek/partition.c b/qemu/roms/u-boot/board/atmel/at91sam9263ek/partition.c
deleted file mode 100644
index 8617f4899..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9263ek/partition.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
- {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
- {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
- {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
- {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
- {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
-};
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/Makefile b/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/Makefile
deleted file mode 100644
index e5448ecc6..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91sam9m10g45ek.o
-obj-y += led.o
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
deleted file mode 100644
index b7e2efd2f..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ /dev/null
@@ -1,315 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/at91sam9g45_matrix.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/clk.h>
-#include <lcd.h>
-#include <atmel_lcdc.h>
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-#include <net.h>
-#endif
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-#ifdef CONFIG_CMD_NAND
-void at91sam9m10g45ek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- unsigned long csa;
-
- /* Enable CS3 */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
- writel(csa, &matrix->ebicsa);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
- &smc->cs[3].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(3),
- &smc->cs[3].mode);
-
- writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
-
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
-
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
-}
-#endif
-
-#ifdef CONFIG_CMD_USB
-static void at91sam9m10g45ek_usb_hw_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
-
- at91_set_gpio_output(AT91_PIN_PD1, 0);
- at91_set_gpio_output(AT91_PIN_PD3, 0);
-}
-#endif
-
-#ifdef CONFIG_MACB
-static void at91sam9m10g45ek_macb_hw_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
-
- /* Enable clock */
- writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
-
- /*
- * Disable pull-up on:
- * RXDV (PA15) => PHY normal mode (not Test mode)
- * ERX0 (PA12) => PHY ADDR0
- * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
- *
- * PHY has internal pull-down
- */
- writel(pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA12) |
- pin_to_mask(AT91_PIN_PA13),
- &pioa->pudr);
-
- at91_phy_reset();
-
- /* Re-enable pull-up */
- writel(pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA12) |
- pin_to_mask(AT91_PIN_PA13),
- &pioa->puer);
-
- /* And the pins. */
- at91_macb_hw_init();
-}
-#endif
-
-#ifdef CONFIG_LCD
-
-vidinfo_t panel_info = {
- vl_col: 480,
- vl_row: 272,
- vl_clk: 9000000,
- vl_sync: ATMEL_LCDC_INVLINE_NORMAL |
- ATMEL_LCDC_INVFRAME_NORMAL,
- vl_bpix: 3,
- vl_tft: 1,
- vl_hsync_len: 45,
- vl_left_margin: 1,
- vl_right_margin:1,
- vl_vsync_len: 1,
- vl_upper_margin:40,
- vl_lower_margin:1,
- mmio : ATMEL_BASE_LCDC,
-};
-
-
-void lcd_enable(void)
-{
- at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_A_periph(AT91_PIN_PE6, 0); /* power down */
-}
-
-static void at91sam9m10g45ek_lcd_hw_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
- at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
- at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
- at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
- at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
-
- at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
- at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
- at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
- at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
- at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
- at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
- at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
- at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
- at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
- at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
- at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
- at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
- at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
- at91_set_B_periph(AT91_PIN_PE20, 0); /* LCDD13 */
- at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
- at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
- at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
- at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
- at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
- at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
- at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
- at91_set_B_periph(AT91_PIN_PE28, 0); /* LCDD21 */
- at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
- at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
-
- writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
-
- gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE;
-}
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-
-void lcd_show_board_info(void)
-{
- ulong dram_size, nand_size;
- int i;
- char temp[32];
-
- lcd_printf ("%s\n", U_BOOT_VERSION);
- lcd_printf ("(C) 2008 ATMEL Corp\n");
- lcd_printf ("at91support@atmel.com\n");
- lcd_printf ("%s CPU at %s MHz\n",
- ATMEL_CPU_NAME,
- strmhz(temp, get_cpu_clk_rate()));
-
- dram_size = 0;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
- dram_size += gd->bd->bi_dram[i].size;
- nand_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
- nand_size += nand_info[i].size;
- lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
- dram_size >> 20,
- nand_size >> 20 );
-}
-#endif /* CONFIG_LCD_INFO */
-#endif
-
-int board_early_init_f(void)
-{
- at91_seriald_hw_init();
- return 0;
-}
-
-int board_init(void)
-{
- /* arch number of AT91SAM9M10G45EK-Board */
-#ifdef CONFIG_AT91SAM9M10G45EK
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9M10G45EK;
-#elif defined CONFIG_AT91SAM9G45EKES
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES;
-#endif
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_CMD_NAND
- at91sam9m10g45ek_nand_hw_init();
-#endif
-#ifdef CONFIG_CMD_USB
- at91sam9m10g45ek_usb_hw_init();
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
-#ifdef CONFIG_ATMEL_SPI
- at91_spi0_hw_init(1 << 4);
-#endif
-#ifdef CONFIG_MACB
- at91sam9m10g45ek_macb_hw_init();
-#endif
-#ifdef CONFIG_LCD
- at91sam9m10g45ek_lcd_hw_init();
-#endif
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
-}
-#endif
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
-#endif
- return rc;
-}
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-#include <spi.h>
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs < 2;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- switch(slave->cs) {
- case 1:
- at91_set_gpio_output(AT91_PIN_PB18, 0);
- break;
- case 0:
- default:
- at91_set_gpio_output(AT91_PIN_PB3, 0);
- break;
- }
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- switch(slave->cs) {
- case 1:
- at91_set_gpio_output(AT91_PIN_PB18, 1);
- break;
- case 0:
- default:
- at91_set_gpio_output(AT91_PIN_PB3, 1);
- break;
- }
-}
-#endif /* CONFIG_ATMEL_SPI */
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/led.c b/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/led.c
deleted file mode 100644
index fe9872396..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9m10g45ek/led.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/at91sam9g45.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/gpio.h>
-
-void coloured_LED_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- /* Enable clock */
- writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
-
- at91_set_gpio_output(CONFIG_RED_LED, 1);
- at91_set_gpio_output(CONFIG_GREEN_LED, 1);
-
- at91_set_gpio_value(CONFIG_RED_LED, 0);
- at91_set_gpio_value(CONFIG_GREEN_LED, 1);
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9n12ek/Makefile b/qemu/roms/u-boot/board/atmel/at91sam9n12ek/Makefile
deleted file mode 100644
index 9f069ca74..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9n12ek/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian.pop@leadtechdesign.com>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# (C) Copyright 2013
-# Josh Wu <josh.wu@atmel.com>
-# Atmel corporation <www.atmel.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91sam9n12ek.o
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/qemu/roms/u-boot/board/atmel/at91sam9n12ek/at91sam9n12ek.c
deleted file mode 100644
index 9adc9920b..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9n12ek/at91sam9n12ek.c
+++ /dev/null
@@ -1,259 +0,0 @@
-/*
- * (C) Copyright 2013 Atmel Corporation
- * Josh Wu <josh.wu@atmel.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/at91sam9x5_matrix.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/clk.h>
-#include <lcd.h>
-#include <atmel_hlcdc.h>
-#include <atmel_mci.h>
-#include <netdev.h>
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-#ifdef CONFIG_NAND_ATMEL
-static void at91sam9n12ek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
- unsigned long csa;
-
- /* Assign CS3 to NAND/SmartMedia Interface */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
- /* Configure databus */
- csa &= ~AT91_MATRIX_NFD0_ON_D16; /* nandflash connect to D0~D15 */
- /* Configure IO drive */
- csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
-
- writel(csa, &matrix->ebicsa);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
- AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(6),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(7),
- &smc->cs[3].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(1),
- &smc->cs[3].mode);
-
- /* Configure RDY/BSY pin */
- at91_set_pio_input(AT91_PIO_PORTD, 5, 1);
-
- /* Configure ENABLE pin for NandFlash */
- at91_set_pio_output(AT91_PIO_PORTD, 4, 1);
-
- at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */
- at91_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */
- at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* ALE */
- at91_set_a_periph(AT91_PIO_PORTD, 3, 1); /* CLE */
-}
-#endif
-
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- .vl_col = 480,
- .vl_row = 272,
- .vl_clk = 9000000,
- .vl_bpix = LCD_BPP,
- .vl_sync = 0,
- .vl_tft = 1,
- .vl_hsync_len = 5,
- .vl_left_margin = 8,
- .vl_right_margin = 43,
- .vl_vsync_len = 10,
- .vl_upper_margin = 4,
- .vl_lower_margin = 12,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_pio_output(AT91_PIO_PORTC, 25, 0); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_pio_output(AT91_PIO_PORTC, 25, 1); /* power down */
-}
-
-#ifdef CONFIG_LCD_INFO
-void lcd_show_board_info(void)
-{
- ulong dram_size, nand_size;
- int i;
- char temp[32];
-
- lcd_printf("%s\n", U_BOOT_VERSION);
- lcd_printf("ATMEL Corp\n");
- lcd_printf("at91@atmel.com\n");
- lcd_printf("%s CPU at %s MHz\n",
- ATMEL_CPU_NAME,
- strmhz(temp, get_cpu_clk_rate()));
-
- dram_size = 0;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
- dram_size += gd->bd->bi_dram[i].size;
- nand_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
- nand_size += nand_info[i].size;
- lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
- dram_size >> 20,
- nand_size >> 20);
-}
-#endif /* CONFIG_LCD_INFO */
-#endif /* CONFIG_LCD */
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-#include <spi.h>
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs < 2;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 0:
- at91_set_pio_output(AT91_PIO_PORTA, 14, 0);
- break;
- case 1:
- at91_set_pio_output(AT91_PIO_PORTA, 7, 0);
- break;
- }
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 0:
- at91_set_pio_output(AT91_PIO_PORTA, 14, 1);
- break;
- case 1:
- at91_set_pio_output(AT91_PIO_PORTA, 7, 1);
- break;
- }
-}
-#endif /* CONFIG_ATMEL_SPI */
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bd)
-{
- at91_mci_hw_init();
-
- return atmel_mci_init((void *)ATMEL_BASE_HSMCI0);
-}
-#endif
-
-#ifdef CONFIG_KS8851_MLL
-void at91sam9n12ek_ks8851_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
-
- writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[2].setup);
- writel(AT91_SMC_PULSE_NWE(7) | AT91_SMC_PULSE_NCS_WR(7) |
- AT91_SMC_PULSE_NRD(7) | AT91_SMC_PULSE_NCS_RD(7),
- &smc->cs[2].pulse);
- writel(AT91_SMC_CYCLE_NWE(9) | AT91_SMC_CYCLE_NRD(9),
- &smc->cs[2].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
- AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
- AT91_SMC_MODE_TDF_CYCLE(1),
- &smc->cs[2].mode);
-
- /* Configure NCS2 PIN */
- at91_set_b_periph(AT91_PIO_PORTD, 19, 0);
-}
-#endif
-
-#ifdef CONFIG_USB_ATMEL
-void at91sam9n12ek_usb_hw_init(void)
-{
- at91_set_pio_output(AT91_PIO_PORTB, 7, 0);
-}
-#endif
-
-int board_early_init_f(void)
-{
- /* Enable clocks for all PIOs */
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- writel((1 << ATMEL_ID_PIOAB) | (1 << ATMEL_ID_PIOCD), &pmc->pcer);
-
- at91_seriald_hw_init();
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_NAND_ATMEL
- at91sam9n12ek_nand_hw_init();
-#endif
-
-#ifdef CONFIG_ATMEL_SPI
- at91_spi0_hw_init(1 << 0);
-#endif
-
-#ifdef CONFIG_LCD
- at91_lcd_hw_init();
-#endif
-
-#ifdef CONFIG_KS8851_MLL
- at91sam9n12ek_ks8851_hw_init();
-#endif
-
-#ifdef CONFIG_USB_ATMEL
- at91sam9n12ek_usb_hw_init();
-#endif
-
- return 0;
-}
-
-#ifdef CONFIG_KS8851_MLL
-int board_eth_init(bd_t *bis)
-{
- return ks8851_mll_initialize(0, CONFIG_KS8851_MLL_BASEADDR);
-}
-#endif
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9rlek/Makefile b/qemu/roms/u-boot/board/atmel/at91sam9rlek/Makefile
deleted file mode 100644
index 51daf8d30..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9rlek/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91sam9rlek.o
-obj-y += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9rlek/at91sam9rlek.c b/qemu/roms/u-boot/board/atmel/at91sam9rlek/at91sam9rlek.c
deleted file mode 100644
index c700a9076..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9rlek/at91sam9rlek.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/at91sam9rl.h>
-#include <asm/arch/at91sam9rl_matrix.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/gpio.h>
-
-#include <lcd.h>
-#include <atmel_lcdc.h>
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-#include <net.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-#ifdef CONFIG_CMD_NAND
-static void at91sam9rlek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- unsigned long csa;
-
- /* Enable CS3 */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
-
- writel(csa, &matrix->ebicsa);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
- &smc->cs[3].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(2),
- &smc->cs[3].mode);
-
- writel(1 << ATMEL_ID_PIOD, &pmc->pcer);
-
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
-
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
-
- at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
- at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
-}
-#endif
-
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- vl_col: 240,
- vl_row: 320,
- vl_clk: 4965000,
- vl_sync: ATMEL_LCDC_INVLINE_INVERTED |
- ATMEL_LCDC_INVFRAME_INVERTED,
- vl_bpix: 3,
- vl_tft: 1,
- vl_hsync_len: 5,
- vl_left_margin: 1,
- vl_right_margin:33,
- vl_vsync_len: 1,
- vl_upper_margin:1,
- vl_lower_margin:0,
- mmio: ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
-}
-
-void lcd_disable(void)
-{
- at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
-}
-static void at91sam9rlek_lcd_hw_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */
- at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */
- at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */
- at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDDEN */
- at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDCC */
- at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */
- at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */
- at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */
- at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */
- at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */
- at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */
- at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */
- at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */
- at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */
- at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */
- at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */
- at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */
- at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */
- at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */
- at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
- at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
-
- writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
-}
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-
-void lcd_show_board_info(void)
-{
- ulong dram_size, nand_size;
- int i;
- char temp[32];
-
- lcd_printf ("%s\n", U_BOOT_VERSION);
- lcd_printf ("(C) 2008 ATMEL Corp\n");
- lcd_printf ("at91support@atmel.com\n");
- lcd_printf ("%s CPU at %s MHz\n",
- ATMEL_CPU_NAME,
- strmhz(temp, get_cpu_clk_rate()));
-
- dram_size = 0;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
- dram_size += gd->bd->bi_dram[i].size;
- nand_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
- nand_size += nand_info[i].size;
- lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
- dram_size >> 20,
- nand_size >> 20 );
-}
-#endif /* CONFIG_LCD_INFO */
-#endif
-
-int board_early_init_f(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- /* Enable clocks for all PIOs */
- writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
- (1 << ATMEL_ID_PIOC) | (1 << ATMEL_ID_PIOD),
- &pmc->pcer);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* arch number of AT91SAM9RLEK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
- at91_seriald_hw_init();
-#ifdef CONFIG_CMD_NAND
- at91sam9rlek_nand_hw_init();
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
-#ifdef CONFIG_LCD
- at91sam9rlek_lcd_hw_init();
-#endif
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(
- (void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9rlek/led.c b/qemu/roms/u-boot/board/atmel/at91sam9rlek/led.c
deleted file mode 100644
index fede59cd3..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9rlek/led.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian@popies.net>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/at91sam9rl.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/gpio.h>
-#include <asm/io.h>
-
-void coloured_LED_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- /* Enable clock */
- writel(ATMEL_ID_PIOD, &pmc->pcer);
-
- at91_set_gpio_output(CONFIG_RED_LED, 1);
- at91_set_gpio_output(CONFIG_GREEN_LED, 1);
- at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
-
- at91_set_gpio_value(CONFIG_RED_LED, 0);
- at91_set_gpio_value(CONFIG_GREEN_LED, 1);
- at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
-}
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9rlek/partition.c b/qemu/roms/u-boot/board/atmel/at91sam9rlek/partition.c
deleted file mode 100644
index 8617f4899..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9rlek/partition.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
- {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
- {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
- {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
- {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
- {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
-};
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9x5ek/Makefile b/qemu/roms/u-boot/board/atmel/at91sam9x5ek/Makefile
deleted file mode 100644
index 5c42b6fe8..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9x5ek/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# (C) Copyright 2012
-# Bo Shen <voice.shen@atmel.com>
-# Atmel corporation <www.atmel.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += at91sam9x5ek.o
diff --git a/qemu/roms/u-boot/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/qemu/roms/u-boot/board/atmel/at91sam9x5ek/at91sam9x5ek.c
deleted file mode 100644
index 17a2a40b4..000000000
--- a/qemu/roms/u-boot/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * Copyright (C) 2012 Atmel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/at91sam9x5_matrix.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/clk.h>
-#include <lcd.h>
-#include <atmel_hlcdc.h>
-#include <atmel_mci.h>
-#ifdef CONFIG_MACB
-#include <net.h>
-#endif
-#include <netdev.h>
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-#endif
-#ifdef CONFIG_ATMEL_SPI
-#include <spi.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-#ifdef CONFIG_CMD_NAND
-static void at91sam9x5ek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- unsigned long csa;
-
- /* Enable CS3 */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
- /* NAND flash on D16 */
- csa |= AT91_MATRIX_NFD0_ON_D16;
-
- /* Configure IO drive */
- csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
-
- writel(csa, &matrix->ebicsa);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
- AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
- AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(6),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(6),
- &smc->cs[3].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(1),
- &smc->cs[3].mode);
-
- writel(1 << ATMEL_ID_PIOCD, &pmc->pcer);
-
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
-
- at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */
- at91_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */
- at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* NAND ALE */
- at91_set_a_periph(AT91_PIO_PORTD, 3, 1); /* NAND CLE */
- at91_set_a_periph(AT91_PIO_PORTD, 6, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 7, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 8, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 9, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 10, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 11, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 12, 1);
- at91_set_a_periph(AT91_PIO_PORTD, 13, 1);
-}
-#endif
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-
-#ifdef CONFIG_MACB
- if (has_emac0())
- rc = macb_eth_initialize(0,
- (void *)ATMEL_BASE_EMAC0, 0x00);
- if (has_emac1())
- rc = macb_eth_initialize(1,
- (void *)ATMEL_BASE_EMAC1, 0x00);
-#endif
- return rc;
-}
-
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- .vl_col = 800,
- .vl_row = 480,
- .vl_clk = 24000000,
- .vl_sync = LCDC_LCDCFG5_HSPOL | LCDC_LCDCFG5_VSPOL,
- .vl_bpix = LCD_BPP,
- .vl_tft = 1,
- .vl_clk_pol = 1,
- .vl_hsync_len = 128,
- .vl_left_margin = 64,
- .vl_right_margin = 64,
- .vl_vsync_len = 2,
- .vl_upper_margin = 22,
- .vl_lower_margin = 21,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
- if (has_lcdc())
- at91_set_a_periph(AT91_PIO_PORTC, 29, 1); /* power up */
-}
-
-void lcd_disable(void)
-{
- if (has_lcdc())
- at91_set_a_periph(AT91_PIO_PORTC, 29, 0); /* power down */
-}
-
-static void at91sam9x5ek_lcd_hw_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
- if (has_lcdc()) {
- at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDPWM */
- at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDVSYNC */
- at91_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDHSYNC */
- at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDISP */
- at91_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */
- at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDPCK */
-
- at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */
- at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */
- at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */
- at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */
- at91_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */
- at91_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */
- at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */
- at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */
- at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */
- at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */
- at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */
- at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */
- at91_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */
- at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */
- at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */
- at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */
- at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */
- at91_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */
- at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */
- at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */
- at91_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */
- at91_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */
- at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */
- at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */
-
- writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
- }
-}
-
-#ifdef CONFIG_LCD_INFO
-void lcd_show_board_info(void)
-{
- ulong dram_size, nand_size;
- int i;
- char temp[32];
-
- if (has_lcdc()) {
- lcd_printf("%s\n", U_BOOT_VERSION);
- lcd_printf("(C) 2012 ATMEL Corp\n");
- lcd_printf("at91support@atmel.com\n");
- lcd_printf("%s CPU at %s MHz\n",
- get_cpu_name(),
- strmhz(temp, get_cpu_clk_rate()));
-
- dram_size = 0;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
- dram_size += gd->bd->bi_dram[i].size;
- nand_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
- nand_size += nand_info[i].size;
- lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
- dram_size >> 20,
- nand_size >> 20);
- }
-}
-#endif /* CONFIG_LCD_INFO */
-#endif /* CONFIG_LCD */
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs < 2;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 1:
- at91_set_pio_output(AT91_PIO_PORTA, 7, 0);
- break;
- case 0:
- default:
- at91_set_pio_output(AT91_PIO_PORTA, 14, 0);
- break;
- }
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 1:
- at91_set_pio_output(AT91_PIO_PORTA, 7, 1);
- break;
- case 0:
- default:
- at91_set_pio_output(AT91_PIO_PORTA, 14, 1);
- break;
- }
-}
-#endif /* CONFIG_ATMEL_SPI */
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bd)
-{
- at91_mci_hw_init();
-
- return atmel_mci_init((void *)ATMEL_BASE_HSMCI0);
-}
-#endif
-
-int board_early_init_f(void)
-{
- at91_seriald_hw_init();
- return 0;
-}
-
-int board_init(void)
-{
- /* arch number of AT91SAM9X5EK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_CMD_NAND
- at91sam9x5ek_nand_hw_init();
-#endif
-
-#ifdef CONFIG_ATMEL_SPI
- at91_spi0_hw_init(1 << 4);
-#endif
-
-#ifdef CONFIG_MACB
- at91_macb_hw_init();
-#endif
-
-#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI)
- at91_uhp_hw_init();
-#endif
-#ifdef CONFIG_LCD
- at91sam9x5ek_lcd_hw_init();
-#endif
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
diff --git a/qemu/roms/u-boot/board/atmel/atngw100/Makefile b/qemu/roms/u-boot/board/atmel/atngw100/Makefile
deleted file mode 100644
index f9b93c973..000000000
--- a/qemu/roms/u-boot/board/atmel/atngw100/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Copyright (C) 2005-2006 Atmel Corporation
-#
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y := atngw100.o
diff --git a/qemu/roms/u-boot/board/atmel/atngw100/atngw100.c b/qemu/roms/u-boot/board/atmel/atngw100/atngw100.c
deleted file mode 100644
index 03d767a4a..000000000
--- a/qemu/roms/u-boot/board/atmel/atngw100/atngw100.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright (C) 2006 Atmel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-
-#include <asm/io.h>
-#include <asm/sdram.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/hmatrix.h>
-#include <asm/arch/mmu.h>
-#include <asm/arch/portmux.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
- {
- .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
- .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
- .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
- | MMU_VMR_CACHE_NONE,
- }, {
- .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
- .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
- .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
- | MMU_VMR_CACHE_WRBACK,
- },
-};
-
-static const struct sdram_config sdram_config = {
- .data_bits = SDRAM_DATA_16BIT,
- .row_bits = 13,
- .col_bits = 9,
- .bank_bits = 2,
- .cas = 3,
- .twr = 2,
- .trc = 7,
- .trp = 2,
- .trcd = 2,
- .tras = 5,
- .txsr = 5,
- /* 7.81 us */
- .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
-};
-
-int board_early_init_f(void)
-{
- /* Enable SDRAM in the EBI mux */
- hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
-
- portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
- portmux_enable_usart1(PORTMUX_DRIVE_MIN);
-
-#if defined(CONFIG_MACB)
- portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
- portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
-#endif
-#if defined(CONFIG_MMC)
- portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
-#endif
-#if defined(CONFIG_ATMEL_SPI)
- portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
-#endif
-
- return 0;
-}
-
-phys_size_t initdram(int board_type)
-{
- unsigned long expected_size;
- unsigned long actual_size;
- void *sdram_base;
-
- sdram_base = uncached(EBI_SDRAM_BASE);
-
- expected_size = sdram_init(sdram_base, &sdram_config);
- actual_size = get_ram_size(sdram_base, expected_size);
-
- if (expected_size != actual_size)
- printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
- actual_size >> 20, expected_size >> 20);
-
- return actual_size;
-}
-
-int board_early_init_r(void)
-{
- gd->bd->bi_phy_id[0] = 0x01;
- gd->bd->bi_phy_id[1] = 0x03;
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bi)
-{
- macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
- macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
- return 0;
-}
-#endif
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-#include <spi.h>
-
-#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs == 0;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
-}
-#endif /* CONFIG_ATMEL_SPI */
diff --git a/qemu/roms/u-boot/board/atmel/atngw100mkii/Makefile b/qemu/roms/u-boot/board/atmel/atngw100mkii/Makefile
deleted file mode 100644
index 90bf5bc84..000000000
--- a/qemu/roms/u-boot/board/atmel/atngw100mkii/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Copyright (C) 2005-2006 Atmel Corporation
-#
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y := atngw100mkii.o
diff --git a/qemu/roms/u-boot/board/atmel/atngw100mkii/atngw100mkii.c b/qemu/roms/u-boot/board/atmel/atngw100mkii/atngw100mkii.c
deleted file mode 100644
index 72d19e430..000000000
--- a/qemu/roms/u-boot/board/atmel/atngw100mkii/atngw100mkii.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * Copyright (C) 2010 Atmel Corporation
- *
- * Copyright (C) 2012 Andreas Bießmann <andreas.devel@googlemail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-
-#include <spi.h>
-#include <netdev.h>
-
-#include <asm/io.h>
-#include <asm/sdram.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/hmatrix.h>
-#include <asm/arch/mmu.h>
-#include <asm/arch/portmux.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
- {
- /* Atmel AT49BV640D 8 MiB x16 NOR flash on NCS0 */
- .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
- .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
- .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
- | MMU_VMR_CACHE_NONE,
- }, {
- /* Micron MT29F2G16AAD 256 MiB x16 NAND flash on NCS3 */
- .virt_pgno = EBI_SRAM_CS3_BASE >> PAGE_SHIFT,
- .nr_pages = EBI_SRAM_CS3_SIZE >> PAGE_SHIFT,
- .phys = (EBI_SRAM_CS3_BASE >> PAGE_SHIFT)
- | MMU_VMR_CACHE_NONE,
- }, {
- /* 2x16-bit ISSI IS42S16320B 64 MiB SDRAM (128 MiB total) */
- .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
- .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
- .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
- | MMU_VMR_CACHE_WRBACK,
- },
-};
-
-static const struct sdram_config sdram_config = {
- .data_bits = SDRAM_DATA_32BIT,
- .row_bits = 13,
- .col_bits = 10,
- .bank_bits = 2,
- .cas = 3,
- .twr = 2,
- .trc = 7,
- .trp = 2,
- .trcd = 2,
- .tras = 5,
- .txsr = 6,
- /* 7.81 us */
- .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
-};
-
-int board_early_init_f(void)
-{
- /* Enable SDRAM in the EBI mux */
- hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)
- | HMATRIX_BIT(EBI_NAND_ENABLE));
-
- portmux_enable_ebi(32, 23, PORTMUX_EBI_NAND,
- PORTMUX_DRIVE_HIGH);
- portmux_select_gpio(PORTMUX_PORT_E, 1 << 23,
- PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH
- | PORTMUX_DRIVE_MIN);
- portmux_enable_usart1(PORTMUX_DRIVE_MIN);
-
-#if defined(CONFIG_MACB)
- portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
- portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
-#endif
-#if defined(CONFIG_MMC)
- portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
-#endif
-#if defined(CONFIG_ATMEL_SPI)
- portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
-#endif
-
- return 0;
-}
-
-phys_size_t initdram(int board_type)
-{
- unsigned long expected_size;
- unsigned long actual_size;
- void *sdram_base;
-
- sdram_base = uncached(EBI_SDRAM_BASE);
-
- expected_size = sdram_init(sdram_base, &sdram_config);
- actual_size = get_ram_size(sdram_base, expected_size);
-
- if (expected_size != actual_size)
- printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
- actual_size >> 20, expected_size >> 20);
-
- return actual_size;
-}
-
-int board_early_init_r(void)
-{
- gd->bd->bi_phy_id[0] = 0x01;
- gd->bd->bi_phy_id[1] = 0x03;
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bi)
-{
- macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
- macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
- return 0;
-}
-#endif
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs == 0;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
-}
-#endif /* CONFIG_ATMEL_SPI */
diff --git a/qemu/roms/u-boot/board/atmel/atstk1000/Makefile b/qemu/roms/u-boot/board/atmel/atstk1000/Makefile
deleted file mode 100644
index ad76631b9..000000000
--- a/qemu/roms/u-boot/board/atmel/atstk1000/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Copyright (C) 2005-2006 Atmel Corporation
-#
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y += atstk1000.o
diff --git a/qemu/roms/u-boot/board/atmel/atstk1000/atstk1000.c b/qemu/roms/u-boot/board/atmel/atstk1000/atstk1000.c
deleted file mode 100644
index 4b6b90f68..000000000
--- a/qemu/roms/u-boot/board/atmel/atstk1000/atstk1000.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright (C) 2005-2006 Atmel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-
-#include <asm/io.h>
-#include <asm/sdram.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/hmatrix.h>
-#include <asm/arch/mmu.h>
-#include <asm/arch/portmux.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
- {
- .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
- .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
- .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
- | MMU_VMR_CACHE_NONE,
- }, {
- .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
- .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
- .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
- | MMU_VMR_CACHE_WRBACK,
- },
-};
-
-static const struct sdram_config sdram_config = {
-#if defined(CONFIG_ATSTK1006)
- /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */
- .data_bits = SDRAM_DATA_32BIT,
- .row_bits = 13,
- .col_bits = 9,
- .bank_bits = 2,
- .cas = 2,
- .twr = 2,
- .trc = 7,
- .trp = 2,
- .trcd = 2,
- .tras = 4,
- .txsr = 7,
- /* 7.81 us */
- .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
-#else
- /* MT48LC2M32B2P-5 (8 MB) on motherboard */
-#ifdef CONFIG_ATSTK1004
- .data_bits = SDRAM_DATA_16BIT,
-#else
- .data_bits = SDRAM_DATA_32BIT,
-#endif
-#ifdef CONFIG_ATSTK1000_16MB_SDRAM
- /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
- .row_bits = 12,
-#else
- .row_bits = 11,
-#endif
- .col_bits = 8,
- .bank_bits = 2,
- .cas = 3,
- .twr = 2,
- .trc = 7,
- .trp = 2,
- .trcd = 2,
- .tras = 5,
- .txsr = 5,
- /* 15.6 us */
- .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
-#endif
-};
-
-int board_early_init_f(void)
-{
- /* Enable SDRAM in the EBI mux */
- hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
-
- portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH);
- portmux_enable_usart1(PORTMUX_DRIVE_MIN);
-#if defined(CONFIG_MACB)
- portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
- portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
-#endif
-#if defined(CONFIG_MMC)
- portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
-#endif
-
- return 0;
-}
-
-phys_size_t initdram(int board_type)
-{
- unsigned long expected_size;
- unsigned long actual_size;
- void *sdram_base;
-
- sdram_base = uncached(EBI_SDRAM_BASE);
-
- expected_size = sdram_init(sdram_base, &sdram_config);
- actual_size = get_ram_size(sdram_base, expected_size);
-
- if (expected_size != actual_size)
- printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
- actual_size >> 20, expected_size >> 20);
-
- return actual_size;
-}
-
-int board_early_init_r(void)
-{
- gd->bd->bi_phy_id[0] = 0x10;
- gd->bd->bi_phy_id[1] = 0x11;
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bi)
-{
- macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
- macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
- return 0;
-}
-#endif
diff --git a/qemu/roms/u-boot/board/atmel/sama5d3_xplained/Makefile b/qemu/roms/u-boot/board/atmel/sama5d3_xplained/Makefile
deleted file mode 100644
index ec82b0699..000000000
--- a/qemu/roms/u-boot/board/atmel/sama5d3_xplained/Makefile
+++ /dev/null
@@ -1,15 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# (C) Copyright 2014
-# Bo Shen <voice.shen@atmel.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += sama5d3_xplained.o
diff --git a/qemu/roms/u-boot/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/qemu/roms/u-boot/board/atmel/sama5d3_xplained/sama5d3_xplained.c
deleted file mode 100644
index 39f2dc647..000000000
--- a/qemu/roms/u-boot/board/atmel/sama5d3_xplained/sama5d3_xplained.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright (C) 2014 Atmel Corporation
- * Bo Shen <voice.shen@atmel.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mmc.h>
-#include <asm/io.h>
-#include <asm/arch/sama5d3_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/clk.h>
-#include <atmel_mci.h>
-#include <net.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_NAND_ATMEL
-void sama5d3_xplained_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
-
- at91_periph_clk_enable(ATMEL_ID_SMC);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(1) |
- AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(1),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(5),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(8) | AT91_SMC_CYCLE_NRD(8),
- &smc->cs[3].cycle);
- writel(AT91_SMC_TIMINGS_TCLR(3) | AT91_SMC_TIMINGS_TADL(10) |
- AT91_SMC_TIMINGS_TAR(3) | AT91_SMC_TIMINGS_TRR(4) |
- AT91_SMC_TIMINGS_TWB(5) | AT91_SMC_TIMINGS_RBNSEL(3)|
- AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(3),
- &smc->cs[3].mode);
-}
-#endif
-
-#ifdef CONFIG_CMD_USB
-static void sama5d3_xplained_usb_hw_init(void)
-{
- at91_set_pio_output(AT91_PIO_PORTE, 3, 0);
- at91_set_pio_output(AT91_PIO_PORTE, 4, 0);
-}
-#endif
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-static void sama5d3_xplained_mci0_hw_init(void)
-{
- at91_mci_hw_init();
-
- at91_set_pio_output(AT91_PIO_PORTE, 2, 0); /* MCI0 Power */
-}
-#endif
-
-int board_early_init_f(void)
-{
- at91_periph_clk_enable(ATMEL_ID_PIOA);
- at91_periph_clk_enable(ATMEL_ID_PIOB);
- at91_periph_clk_enable(ATMEL_ID_PIOC);
- at91_periph_clk_enable(ATMEL_ID_PIOD);
- at91_periph_clk_enable(ATMEL_ID_PIOE);
-
- at91_seriald_hw_init();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_NAND_ATMEL
- sama5d3_xplained_nand_hw_init();
-#endif
-#ifdef CONFIG_CMD_USB
- sama5d3_xplained_usb_hw_init();
-#endif
-#ifdef CONFIG_GENERIC_ATMEL_MCI
- sama5d3_xplained_mci0_hw_init();
-#endif
-#ifdef CONFIG_MACB
- at91_gmac_hw_init();
- at91_macb_hw_init();
-#endif
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
-
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
-#ifdef CONFIG_MACB
- macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
- macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
-#endif
- return 0;
-}
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bis)
-{
- atmel_mci_init((void *)ATMEL_BASE_MCI0);
-
- return 0;
-}
-#endif
diff --git a/qemu/roms/u-boot/board/atmel/sama5d3xek/Makefile b/qemu/roms/u-boot/board/atmel/sama5d3xek/Makefile
deleted file mode 100644
index 7ff74810c..000000000
--- a/qemu/roms/u-boot/board/atmel/sama5d3xek/Makefile
+++ /dev/null
@@ -1,15 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# (C) Copyright 2013
-# Bo Shen <voice.shen@atmel.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += sama5d3xek.o
diff --git a/qemu/roms/u-boot/board/atmel/sama5d3xek/sama5d3xek.c b/qemu/roms/u-boot/board/atmel/sama5d3xek/sama5d3xek.c
deleted file mode 100644
index c835c12d0..000000000
--- a/qemu/roms/u-boot/board/atmel/sama5d3xek/sama5d3xek.c
+++ /dev/null
@@ -1,388 +0,0 @@
-/*
- * Copyright (C) 2012 - 2013 Atmel Corporation
- * Bo Shen <voice.shen@atmel.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mmc.h>
-#include <asm/io.h>
-#include <asm/arch/sama5d3_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/clk.h>
-#include <lcd.h>
-#include <atmel_lcdc.h>
-#include <atmel_mci.h>
-#include <micrel.h>
-#include <net.h>
-#include <netdev.h>
-#include <spl.h>
-#include <asm/arch/atmel_mpddrc.h>
-#include <asm/arch/at91_wdt.h>
-
-#ifdef CONFIG_USB_GADGET_ATMEL_USBA
-#include <asm/arch/atmel_usba_udc.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-#ifdef CONFIG_NAND_ATMEL
-void sama5d3xek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
-
- at91_periph_clk_enable(ATMEL_ID_SMC);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(1) |
- AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(1),
- &smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
- AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(5),
- &smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(8) | AT91_SMC_CYCLE_NRD(8),
- &smc->cs[3].cycle);
- writel(AT91_SMC_TIMINGS_TCLR(3) | AT91_SMC_TIMINGS_TADL(10) |
- AT91_SMC_TIMINGS_TAR(3) | AT91_SMC_TIMINGS_TRR(4) |
- AT91_SMC_TIMINGS_TWB(5) | AT91_SMC_TIMINGS_RBNSEL(3)|
- AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
- AT91_SMC_MODE_EXNW_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF_CYCLE(3),
- &smc->cs[3].mode);
-}
-#endif
-
-#ifdef CONFIG_CMD_USB
-static void sama5d3xek_usb_hw_init(void)
-{
- at91_set_pio_output(AT91_PIO_PORTD, 25, 0);
- at91_set_pio_output(AT91_PIO_PORTD, 26, 0);
- at91_set_pio_output(AT91_PIO_PORTD, 27, 0);
-}
-#endif
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-static void sama5d3xek_mci_hw_init(void)
-{
- at91_mci_hw_init();
-
- at91_set_pio_output(AT91_PIO_PORTB, 10, 0); /* MCI0 Power */
-}
-#endif
-
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
- .vl_col = 800,
- .vl_row = 480,
- .vl_clk = 24000000,
- .vl_sync = ATMEL_LCDC_INVLINE_NORMAL | ATMEL_LCDC_INVFRAME_NORMAL,
- .vl_bpix = LCD_BPP,
- .vl_tft = 1,
- .vl_hsync_len = 128,
- .vl_left_margin = 64,
- .vl_right_margin = 64,
- .vl_vsync_len = 2,
- .vl_upper_margin = 22,
- .vl_lower_margin = 21,
- .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
-}
-
-void lcd_disable(void)
-{
-}
-
-static void sama5d3xek_lcd_hw_init(void)
-{
- gd->fb_base = CONFIG_SAMA5D3_LCD_BASE;
-
- /* The higher 8 bit of LCD is board related */
- at91_set_c_periph(AT91_PIO_PORTC, 14, 0); /* LCDD16 */
- at91_set_c_periph(AT91_PIO_PORTC, 13, 0); /* LCDD17 */
- at91_set_c_periph(AT91_PIO_PORTC, 12, 0); /* LCDD18 */
- at91_set_c_periph(AT91_PIO_PORTC, 11, 0); /* LCDD19 */
- at91_set_c_periph(AT91_PIO_PORTC, 10, 0); /* LCDD20 */
- at91_set_c_periph(AT91_PIO_PORTC, 15, 0); /* LCDD21 */
- at91_set_c_periph(AT91_PIO_PORTE, 27, 0); /* LCDD22 */
- at91_set_c_periph(AT91_PIO_PORTE, 28, 0); /* LCDD23 */
-
- /* Configure lower 16 bit of LCD and enable clock */
- at91_lcd_hw_init();
-}
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-
-void lcd_show_board_info(void)
-{
- ulong dram_size;
- uint64_t nand_size;
- int i;
- char temp[32];
-
- lcd_printf("%s\n", U_BOOT_VERSION);
- lcd_printf("(C) 2013 ATMEL Corp\n");
- lcd_printf("at91@atmel.com\n");
- lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
- strmhz(temp, get_cpu_clk_rate()));
-
- dram_size = 0;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
- dram_size += gd->bd->bi_dram[i].size;
-
- nand_size = 0;
-#ifdef CONFIG_NAND_ATMEL
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
- nand_size += nand_info[i].size;
-#endif
- lcd_printf("%ld MB SDRAM, %lld MB NAND\n",
- dram_size >> 20, nand_size >> 20);
-}
-#endif /* CONFIG_LCD_INFO */
-#endif /* CONFIG_LCD */
-
-int board_early_init_f(void)
-{
- at91_periph_clk_enable(ATMEL_ID_PIOA);
- at91_periph_clk_enable(ATMEL_ID_PIOB);
- at91_periph_clk_enable(ATMEL_ID_PIOC);
- at91_periph_clk_enable(ATMEL_ID_PIOD);
- at91_periph_clk_enable(ATMEL_ID_PIOE);
-
- at91_seriald_hw_init();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_NAND_ATMEL
- sama5d3xek_nand_hw_init();
-#endif
-#ifdef CONFIG_CMD_USB
- sama5d3xek_usb_hw_init();
-#endif
-#ifdef CONFIG_USB_GADGET_ATMEL_USBA
- at91_udp_hw_init();
-#endif
-#ifdef CONFIG_GENERIC_ATMEL_MCI
- sama5d3xek_mci_hw_init();
-#endif
-#ifdef CONFIG_ATMEL_SPI
- at91_spi0_hw_init(1 << 0);
-#endif
-#ifdef CONFIG_MACB
- if (has_emac())
- at91_macb_hw_init();
- if (has_gmac())
- at91_gmac_hw_init();
-#endif
-#ifdef CONFIG_LCD
- if (has_lcdc())
- sama5d3xek_lcd_hw_init();
-#endif
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
- /* rx data delay */
- ksz9021_phy_extended_write(phydev,
- MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x2222);
- /* tx data delay */
- ksz9021_phy_extended_write(phydev,
- MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x2222);
- /* rx/tx clock delay */
- ksz9021_phy_extended_write(phydev,
- MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf2f4);
-
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-
-#ifdef CONFIG_MACB
- if (has_emac())
- rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
- if (has_gmac())
- rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
-#endif
-#ifdef CONFIG_USB_GADGET_ATMEL_USBA
- usba_udc_probe(&pdata);
-#ifdef CONFIG_USB_ETH_RNDIS
- usb_eth_initialize(bis);
-#endif
-#endif
-
- return rc;
-}
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bis)
-{
- int rc = 0;
-
- rc = atmel_mci_init((void *)ATMEL_BASE_MCI0);
-
- return rc;
-}
-#endif
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-#include <spi.h>
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs < 4;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 0:
- at91_set_pio_output(AT91_PIO_PORTD, 13, 0);
- case 1:
- at91_set_pio_output(AT91_PIO_PORTD, 14, 0);
- case 2:
- at91_set_pio_output(AT91_PIO_PORTD, 15, 0);
- case 3:
- at91_set_pio_output(AT91_PIO_PORTD, 16, 0);
- default:
- break;
- }
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 0:
- at91_set_pio_output(AT91_PIO_PORTD, 13, 1);
- case 1:
- at91_set_pio_output(AT91_PIO_PORTD, 14, 1);
- case 2:
- at91_set_pio_output(AT91_PIO_PORTD, 15, 1);
- case 3:
- at91_set_pio_output(AT91_PIO_PORTD, 16, 1);
- default:
- break;
- }
-}
-#endif /* CONFIG_ATMEL_SPI */
-
-/* SPL */
-#ifdef CONFIG_SPL_BUILD
-void spl_board_init(void)
-{
-#ifdef CONFIG_SYS_USE_MMC
- sama5d3xek_mci_hw_init();
-#elif CONFIG_SYS_USE_NANDFLASH
- sama5d3xek_nand_hw_init();
-#elif CONFIG_SYS_USE_SERIALFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
-}
-
-static void ddr2_conf(struct atmel_mpddr *ddr2)
-{
- ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
-
- ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
- ATMEL_MPDDRC_CR_NR_ROW_14 |
- ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
- ATMEL_MPDDRC_CR_ENRDM_ON |
- ATMEL_MPDDRC_CR_NB_8BANKS |
- ATMEL_MPDDRC_CR_NDQS_DISABLED |
- ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
- ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
- /*
- * As the DDR2-SDRAm device requires a refresh time is 7.8125us
- * when DDR run at 133MHz, so it needs (7.8125us * 133MHz / 10^9) clocks
- */
- ddr2->rtr = 0x411;
-
- ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
- 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
- 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
- 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
- 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
- 2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
- 2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
- 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
-
- ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET |
- 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
- 28 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
- 26 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
-
- ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET |
- 2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
- 2 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
- 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
- 8 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
-}
-
-void mem_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- struct atmel_mpddr ddr2;
-
- ddr2_conf(&ddr2);
-
- /* enable MPDDR clock */
- at91_periph_clk_enable(ATMEL_ID_MPDDRC);
- writel(0x4, &pmc->scer);
-
- /* DDRAM2 Controller initialize */
- ddr2_init(ATMEL_BASE_DDRCS, &ddr2);
-}
-
-void at91_pmc_init(void)
-{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- u32 tmp;
-
- tmp = AT91_PMC_PLLAR_29 |
- AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
- AT91_PMC_PLLXR_MUL(43) |
- AT91_PMC_PLLXR_DIV(1);
- at91_plla_init(tmp);
-
- writel(0x3 << 8, &pmc->pllicpr);
-
- tmp = AT91_PMC_MCKR_MDIV_4 |
- AT91_PMC_MCKR_CSS_PLLA;
- at91_mck_init(tmp);
-}
-#endif