Add qemu 2.4.0

Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>

3 files changed, 260 insertions, 0 deletions

diff --git a/qemu/roms/u-boot/board/amcc/bubinga/Makefile b/qemu/roms/u-boot/board/amcc/bubinga/Makefile
new file mode 100644
index 000000000..0e7ebcaed
--- /dev/null
+++ b/qemu/roms/u-boot/board/amcc/bubinga/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	= bubinga.o flash.o
diff --git a/qemu/roms/u-boot/board/amcc/bubinga/bubinga.c b/qemu/roms/u-boot/board/amcc/bubinga/bubinga.c
new file mode 100644
index 000000000..5c1e0717a
--- /dev/null
+++ b/qemu/roms/u-boot/board/amcc/bubinga/bubinga.c
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2000-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+
+long int spd_sdram(void);
+
+int board_early_init_f(void)
+{
+	mtdcr(UIC0SR, 0xFFFFFFFF);	/* clear all ints */
+	mtdcr(UIC0ER, 0x00000000);	/* disable all ints */
+	mtdcr(UIC0CR, 0x00000010);
+	mtdcr(UIC0PR, 0xFFFF7FF0);	/* set int polarities */
+	mtdcr(UIC0TR, 0x00000010);	/* set int trigger levels */
+	mtdcr(UIC0SR, 0xFFFFFFFF);	/* clear all ints */
+
+	/*
+	 * Configure CPC0_PCI to enable PerWE as output
+	 * and enable the internal PCI arbiter if selected
+	 */
+	if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB)
+		mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
+	else
+		mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN);
+
+	return 0;
+}
+
+/*
+ * Check Board Identity:
+ */
+int checkboard(void)
+{
+	char buf[64];
+	int i = getenv_f("serial#", buf, sizeof(buf));
+
+	puts("Board: Bubinga - AMCC PPC405EP Evaluation Board");
+
+	if (i > 0) {
+		puts(", serial# ");
+		puts(buf);
+	}
+	putc('\n');
+
+	return (0);
+}
+
+/* -------------------------------------------------------------------------
+  initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
+  the necessary info for SDRAM controller configuration
+   ------------------------------------------------------------------------- */
+phys_size_t initdram(int board_type)
+{
+	long int ret;
+
+	ret = spd_sdram();
+	return ret;
+}
diff --git a/qemu/roms/u-boot/board/amcc/bubinga/flash.c b/qemu/roms/u-boot/board/amcc/bubinga/flash.c
new file mode 100644
index 000000000..a9d0ed8d1
--- /dev/null
+++ b/qemu/roms/u-boot/board/amcc/bubinga/flash.c
@@ -0,0 +1,188 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/*
+ * Modified 4/5/2001
+ * Wait for completion of each sector erase command issued
+ * 4/5/2001
+ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
+ */
+
+#include <common.h>
+#include <asm/ppc4xx.h>
+#include <asm/processor.h>
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips        */
+
+#undef DEBUG
+#ifdef DEBUG
+#define DEBUGF(x...) printf(x)
+#else
+#define DEBUGF(x...)
+#endif				/* DEBUG */
+
+/*
+ * include common flash code (for amcc boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size(vu_long * addr, flash_info_t * info);
+static void flash_get_offsets(ulong base, flash_info_t * info);
+
+unsigned long flash_init(void)
+{
+	unsigned long size_b0, size_b1;
+	int i;
+	uint pbcr;
+	unsigned long base_b0, base_b1;
+
+	/* Init: no FLASHes known */
+	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 =
+	    flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+		       size_b0, size_b0 << 20);
+	}
+
+	/* Only one bank */
+	if (CONFIG_SYS_MAX_FLASH_BANKS == 1) {
+		/* Setup offsets */
+		flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]);
+
+		/* Monitor protection ON by default */
+		(void)flash_protect(FLAG_PROTECT_SET,
+				    CONFIG_SYS_MONITOR_BASE,
+				    CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
+				    &flash_info[0]);
+#ifdef CONFIG_ENV_IS_IN_FLASH
+		(void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR,
+				    CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
+				    &flash_info[0]);
+		(void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND,
+				    CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
+				    &flash_info[0]);
+#endif
+
+		size_b1 = 0;
+		flash_info[0].size = size_b0;
+	}
+
+	/* 2 banks */
+	else {
+		size_b1 =
+		    flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
+				   &flash_info[1]);
+
+		/* Re-do sizing to get full correct info */
+
+		if (size_b1) {
+			mtdcr(EBC0_CFGADDR, PB0CR);
+			pbcr = mfdcr(EBC0_CFGDATA);
+			mtdcr(EBC0_CFGADDR, PB0CR);
+			base_b1 = -size_b1;
+			pbcr = (pbcr & 0x0001ffff) | base_b1 |
+			    (((size_b1 / 1024 / 1024) - 1) << 17);
+			mtdcr(EBC0_CFGDATA, pbcr);
+			/*          printf("PB1CR = %x\n", pbcr); */
+		}
+
+		if (size_b0) {
+			mtdcr(EBC0_CFGADDR, PB1CR);
+			pbcr = mfdcr(EBC0_CFGDATA);
+			mtdcr(EBC0_CFGADDR, PB1CR);
+			base_b0 = base_b1 - size_b0;
+			pbcr = (pbcr & 0x0001ffff) | base_b0 |
+			    (((size_b0 / 1024 / 1024) - 1) << 17);
+			mtdcr(EBC0_CFGDATA, pbcr);
+			/*            printf("PB0CR = %x\n", pbcr); */
+		}
+
+		size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]);
+
+		flash_get_offsets(base_b0, &flash_info[0]);
+
+		/* monitor protection ON by default */
+		(void)flash_protect(FLAG_PROTECT_SET,
+				    base_b0 + size_b0 - CONFIG_SYS_MONITOR_LEN,
+				    base_b0 + size_b0 - 1, &flash_info[0]);
+		/* Also protect sector containing initial power-up instruction */
+		/* (flash_protect() checks address range - other call ignored) */
+		(void)flash_protect(FLAG_PROTECT_SET,
+				    0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]);
+		(void)flash_protect(FLAG_PROTECT_SET,
+				    0xFFFFFFFC, 0xFFFFFFFF, &flash_info[1]);
+
+		if (size_b1) {
+			/* Re-do sizing to get full correct info */
+			size_b1 =
+			    flash_get_size((vu_long *) base_b1, &flash_info[1]);
+
+			flash_get_offsets(base_b1, &flash_info[1]);
+
+			/* monitor protection ON by default */
+			(void)flash_protect(FLAG_PROTECT_SET,
+					    base_b1 + size_b1 - CONFIG_SYS_MONITOR_LEN,
+					    base_b1 + size_b1 - 1,
+					    &flash_info[1]);
+			/* monitor protection OFF by default (one is enough) */
+			(void)flash_protect(FLAG_PROTECT_CLEAR,
+					    base_b0 + size_b0 - CONFIG_SYS_MONITOR_LEN,
+					    base_b0 + size_b0 - 1,
+					    &flash_info[0]);
+		} else {
+			flash_info[1].flash_id = FLASH_UNKNOWN;
+			flash_info[1].sector_count = -1;
+		}
+
+		flash_info[0].size = size_b0;
+		flash_info[1].size = size_b1;
+	}			/* else 2 banks */
+	return (size_b0 + size_b1);
+}
+
+static void flash_get_offsets(ulong base, flash_info_t * info)
+{
+	int i;
+
+	/* set up sector start address table */
+	if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    (info->flash_id == FLASH_AM040)) {
+		for (i = 0; i < info->sector_count; i++)
+			info->start[i] = base + (i * 0x00010000);
+	} else {
+		if (info->flash_id & FLASH_BTYPE) {
+			/* set sector offsets for bottom boot block type        */
+			info->start[0] = base + 0x00000000;
+			info->start[1] = base + 0x00004000;
+			info->start[2] = base + 0x00006000;
+			info->start[3] = base + 0x00008000;
+			for (i = 4; i < info->sector_count; i++) {
+				info->start[i] =
+				    base + (i * 0x00010000) - 0x00030000;
+			}
+		} else {
+			/* set sector offsets for top boot block type           */
+			i = info->sector_count - 1;
+			info->start[i--] = base + info->size - 0x00004000;
+			info->start[i--] = base + info->size - 0x00006000;
+			info->start[i--] = base + info->size - 0x00008000;
+			for (; i >= 0; i--) {
+				info->start[i] = base + i * 0x00010000;
+			}
+		}
+	}
+}