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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/arch/x86/dts
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/arch/x86/dts')
-rw-r--r--qemu/roms/u-boot/arch/x86/dts/.gitignore1
-rw-r--r--qemu/roms/u-boot/arch/x86/dts/Makefile12
-rw-r--r--qemu/roms/u-boot/arch/x86/dts/alex.dts24
-rw-r--r--qemu/roms/u-boot/arch/x86/dts/coreboot.dtsi16
-rw-r--r--qemu/roms/u-boot/arch/x86/dts/link.dts35
-rw-r--r--qemu/roms/u-boot/arch/x86/dts/skeleton.dtsi13
6 files changed, 101 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/arch/x86/dts/.gitignore b/qemu/roms/u-boot/arch/x86/dts/.gitignore
new file mode 100644
index 000000000..b60ed208c
--- /dev/null
+++ b/qemu/roms/u-boot/arch/x86/dts/.gitignore
@@ -0,0 +1 @@
+*.dtb
diff --git a/qemu/roms/u-boot/arch/x86/dts/Makefile b/qemu/roms/u-boot/arch/x86/dts/Makefile
new file mode 100644
index 000000000..48265ef6d
--- /dev/null
+++ b/qemu/roms/u-boot/arch/x86/dts/Makefile
@@ -0,0 +1,12 @@
+dtb-y += link.dtb \
+ alex.dtb
+
+targets += $(dtb-y)
+
+DTC_FLAGS += -R 4 -p 0x1000
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+ @:
+
+clean-files := *.dtb
diff --git a/qemu/roms/u-boot/arch/x86/dts/alex.dts b/qemu/roms/u-boot/arch/x86/dts/alex.dts
new file mode 100644
index 000000000..2f1354461
--- /dev/null
+++ b/qemu/roms/u-boot/arch/x86/dts/alex.dts
@@ -0,0 +1,24 @@
+/dts-v1/;
+
+/include/ "coreboot.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Google Alex";
+ compatible = "google,alex", "intel,atom-pineview";
+
+ config {
+ silent_console = <0>;
+ };
+
+ gpio: gpio {};
+
+ serial {
+ reg = <0x3f8 8>;
+ clock-frequency = <115200>;
+ };
+
+ chosen { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};
diff --git a/qemu/roms/u-boot/arch/x86/dts/coreboot.dtsi b/qemu/roms/u-boot/arch/x86/dts/coreboot.dtsi
new file mode 100644
index 000000000..4862a5970
--- /dev/null
+++ b/qemu/roms/u-boot/arch/x86/dts/coreboot.dtsi
@@ -0,0 +1,16 @@
+/include/ "skeleton.dtsi"
+
+/ {
+ aliases {
+ console = "/serial";
+ };
+
+ serial {
+ compatible = "ns16550";
+ reg-shift = <1>;
+ io-mapped = <1>;
+ multiplier = <1>;
+ baudrate = <115200>;
+ status = "disabled";
+ };
+};
diff --git a/qemu/roms/u-boot/arch/x86/dts/link.dts b/qemu/roms/u-boot/arch/x86/dts/link.dts
new file mode 100644
index 000000000..4a37dac4e
--- /dev/null
+++ b/qemu/roms/u-boot/arch/x86/dts/link.dts
@@ -0,0 +1,35 @@
+/dts-v1/;
+
+/include/ "coreboot.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Google Link";
+ compatible = "google,link", "intel,celeron-ivybridge";
+
+ config {
+ silent_console = <0>;
+ };
+
+ gpio: gpio {};
+
+ serial {
+ reg = <0x3f8 8>;
+ clock-frequency = <115200>;
+ };
+
+ chosen { };
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ich9";
+ spi-flash@0 {
+ reg = <0>;
+ compatible = "winbond,w25q64", "spi-flash";
+ memory-map = <0xff800000 0x00800000>;
+ };
+ };
+};
diff --git a/qemu/roms/u-boot/arch/x86/dts/skeleton.dtsi b/qemu/roms/u-boot/arch/x86/dts/skeleton.dtsi
new file mode 100644
index 000000000..b41d241de
--- /dev/null
+++ b/qemu/roms/u-boot/arch/x86/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value. The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};