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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/arch/avr32/cpu/cache.c
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/arch/avr32/cpu/cache.c')
-rw-r--r--qemu/roms/u-boot/arch/avr32/cpu/cache.c81
1 files changed, 81 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/arch/avr32/cpu/cache.c b/qemu/roms/u-boot/arch/avr32/cpu/cache.c
new file mode 100644
index 000000000..ab0374e58
--- /dev/null
+++ b/qemu/roms/u-boot/arch/avr32/cpu/cache.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <asm/arch/cacheflush.h>
+
+void dcache_clean_range(volatile void *start, size_t size)
+{
+ unsigned long v, begin, end, linesz;
+
+ linesz = CONFIG_SYS_DCACHE_LINESZ;
+
+ /* You asked for it, you got it */
+ begin = (unsigned long)start & ~(linesz - 1);
+ end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
+
+ for (v = begin; v < end; v += linesz)
+ dcache_clean_line((void *)v);
+
+ sync_write_buffer();
+}
+
+void dcache_invalidate_range(volatile void *start, size_t size)
+{
+ unsigned long v, begin, end, linesz;
+
+ linesz = CONFIG_SYS_DCACHE_LINESZ;
+
+ /* You asked for it, you got it */
+ begin = (unsigned long)start & ~(linesz - 1);
+ end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
+
+ for (v = begin; v < end; v += linesz)
+ dcache_invalidate_line((void *)v);
+}
+
+void dcache_flush_range(volatile void *start, size_t size)
+{
+ unsigned long v, begin, end, linesz;
+
+ linesz = CONFIG_SYS_DCACHE_LINESZ;
+
+ /* You asked for it, you got it */
+ begin = (unsigned long)start & ~(linesz - 1);
+ end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
+
+ for (v = begin; v < end; v += linesz)
+ dcache_flush_line((void *)v);
+
+ sync_write_buffer();
+}
+
+void icache_invalidate_range(volatile void *start, size_t size)
+{
+ unsigned long v, begin, end, linesz;
+
+ linesz = CONFIG_SYS_ICACHE_LINESZ;
+
+ /* You asked for it, you got it */
+ begin = (unsigned long)start & ~(linesz - 1);
+ end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
+
+ for (v = begin; v < end; v += linesz)
+ icache_invalidate_line((void *)v);
+}
+
+/*
+ * This is called after loading something into memory. We need to
+ * make sure that everything that was loaded is actually written to
+ * RAM, and that the icache will look for it. Cleaning the dcache and
+ * invalidating the icache will do the trick.
+ */
+void flush_cache (unsigned long start_addr, unsigned long size)
+{
+ dcache_clean_range((void *)start_addr, size);
+ icache_invalidate_range((void *)start_addr, size);
+}