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authorRajithaY <rajithax.yerrumsetty@intel.com>2017-04-25 03:31:15 -0700
committerRajitha Yerrumchetty <rajithax.yerrumsetty@intel.com>2017-05-22 06:48:08 +0000
commitbb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch)
treeca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/seabios/src/hw/dma.c
parenta14b48d18a9ed03ec191cf16b162206998a895ce (diff)
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to kvmfornfv repo and make use of the updated latest qemu for the execution of all testcase Change-Id: I1280af507a857675c7f81d30c95255635667bdd7 Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/seabios/src/hw/dma.c')
-rw-r--r--qemu/roms/seabios/src/hw/dma.c67
1 files changed, 0 insertions, 67 deletions
diff --git a/qemu/roms/seabios/src/hw/dma.c b/qemu/roms/seabios/src/hw/dma.c
deleted file mode 100644
index 20c9fbb76..000000000
--- a/qemu/roms/seabios/src/hw/dma.c
+++ /dev/null
@@ -1,67 +0,0 @@
-// Code to support legacy Intel 8237 DMA chip.
-//
-// Copyright (C) 2008,2009 Kevin O'Connor <kevin@koconnor.net>
-// Copyright (C) 2002 MandrakeSoft S.A.
-//
-// This file may be distributed under the terms of the GNU LGPLv3 license.
-
-#include "util.h" // dma_setup
-#include "x86.h" // outb
-
-#define PORT_DMA_ADDR_2 0x0004
-#define PORT_DMA_CNT_2 0x0005
-#define PORT_DMA1_MASK_REG 0x000a
-#define PORT_DMA1_MODE_REG 0x000b
-#define PORT_DMA1_CLEAR_FF_REG 0x000c
-#define PORT_DMA1_MASTER_CLEAR 0x000d
-#define PORT_DMA_PAGE_2 0x0081
-#define PORT_DMA2_MASK_REG 0x00d4
-#define PORT_DMA2_MODE_REG 0x00d6
-#define PORT_DMA2_MASTER_CLEAR 0x00da
-
-// Setup the DMA controller for a floppy transfer.
-int
-dma_floppy(u32 addr, int count, int isWrite)
-{
- // check for 64K boundary overrun
- u16 end = count - 1;
- u32 last_addr = addr + end;
- if ((addr >> 16) != (last_addr >> 16))
- return -1;
-
- u8 mode_register = 0x46; // single mode, increment, autoinit disable,
- if (isWrite)
- mode_register = 0x4a;
-
- outb(0x06, PORT_DMA1_MASK_REG);
- outb(0x00, PORT_DMA1_CLEAR_FF_REG); // clear flip-flop
- outb(addr, PORT_DMA_ADDR_2);
- outb(addr>>8, PORT_DMA_ADDR_2);
- outb(0x00, PORT_DMA1_CLEAR_FF_REG); // clear flip-flop
- outb(end, PORT_DMA_CNT_2);
- outb(end>>8, PORT_DMA_CNT_2);
-
- // port 0b: DMA-1 Mode Register
- // transfer type=write, channel 2
- outb(mode_register, PORT_DMA1_MODE_REG);
-
- // port 81: DMA-1 Page Register, channel 2
- outb(addr>>16, PORT_DMA_PAGE_2);
-
- outb(0x02, PORT_DMA1_MASK_REG); // unmask channel 2
-
- return 0;
-}
-
-// Reset DMA controller
-void
-dma_setup(void)
-{
- // first reset the DMA controllers
- outb(0, PORT_DMA1_MASTER_CLEAR);
- outb(0, PORT_DMA2_MASTER_CLEAR);
-
- // then initialize the DMA controllers
- outb(0xc0, PORT_DMA2_MODE_REG);
- outb(0x00, PORT_DMA2_MASK_REG);
-}