diff options
| author |   RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
|---|---|---|
| committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
| commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
| tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/openbios/include/arch | |
| parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) | |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/openbios/include/arch')
40 files changed, 0 insertions, 3867 deletions
diff --git a/qemu/roms/openbios/include/arch/amd64/elf.h b/qemu/roms/openbios/include/arch/amd64/elf.h deleted file mode 100644 index e391c62b6..000000000 --- a/qemu/roms/openbios/include/arch/amd64/elf.h +++ /dev/null @@ -1,6 +0,0 @@ -/* for now we're a 32bit architecture */ -#define ARCH_ELF_CLASS ELFCLASS32 -#define ARCH_ELF_DATA ELFDATA2LSB -#define ARCH_ELF_MACHINE_OK(x) ((x)==EM_386 || (x)==EM_486) -typedef Elf32_Ehdr Elf_ehdr; -typedef Elf32_Phdr Elf_phdr; diff --git a/qemu/roms/openbios/include/arch/amd64/io.h b/qemu/roms/openbios/include/arch/amd64/io.h deleted file mode 100644 index 9be1cb857..000000000 --- a/qemu/roms/openbios/include/arch/amd64/io.h +++ /dev/null @@ -1,71 +0,0 @@ -#ifndef _ASM_IO_H -#define _ASM_IO_H - -extern char _start, _end; -extern unsigned long virt_offset; - -#define phys_to_virt(phys) ((void *) ((unsigned long) (phys) - virt_offset)) -#define virt_to_phys(virt) ((unsigned long) (virt) + virt_offset) - -#ifndef BOOTSTRAP - -#define __SLOW_DOWN_IO "outb %%al,$0x80;" -static inline void slow_down_io(void) -{ - __asm__ __volatile__( - __SLOW_DOWN_IO -#ifdef REALLY_SLOW_IO - __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO -#endif - : : ); -} - -#define BUILDIO(bwl,bw,type) \ -static inline void out##bwl(unsigned type value, int port) { \ - __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \ -} \ -static inline unsigned type in##bwl(int port) { \ - unsigned type value; \ - __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \ - return value; \ -} \ -static inline void out##bwl##_p(unsigned type value, int port) { \ - out##bwl(value, port); \ - slow_down_io(); \ -} \ -static inline unsigned type in##bwl##_p(int port) { \ - unsigned type value = in##bwl(port); \ - slow_down_io(); \ - return value; \ -} \ -static inline void outs##bwl(int port, const void *addr, unsigned long count) { \ - __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \ -} \ -static inline void ins##bwl(int port, void *addr, unsigned long count) { \ - __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \ -} - -BUILDIO(b,b,char) -BUILDIO(w,w,short) -BUILDIO(l,,int) - -#else /* BOOTSTRAP */ -#ifdef FCOMPILER -#define inb(reg) ((u8)0xff) -#define inw(reg) ((u16)0xffff) -#define inl(reg) ((u32)0xffffffff) -#define outb(reg, val) do{} while(0) -#define outw(reg, val) do{} while(0) -#define outl(reg, val) do{} while(0) -#else -extern u8 inb(u32 reg); -extern u16 inw(u32 reg); -extern u32 inl(u32 reg); -extern void insw(u32 reg, void *addr, unsigned long count); -extern void outb(u32 reg, u8 val); -extern void outw(u32 reg, u16 val); -extern void outl(u32 reg, u32 val); -extern void outsw(u32 reg, const void *addr, unsigned long count); -#endif -#endif -#endif diff --git a/qemu/roms/openbios/include/arch/amd64/pci.h b/qemu/roms/openbios/include/arch/amd64/pci.h deleted file mode 100644 index 3e88e150b..000000000 --- a/qemu/roms/openbios/include/arch/amd64/pci.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef AMD64_PCI_H -#define AMD64_PCI_H - -#include "asm/io.h" - -#if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2)) -#define PCI_CONFIG_1 1 /* default */ -#endif - -#ifdef PCI_CONFIG_1 - -/* PCI Configuration Mechanism #1 */ - -/* Have pci_addr in the same format as the values written to 0xcf8 - * so register accesses can be made easy. */ -#define PCI_ADDR(bus, dev, fn) \ - ((pci_addr) (0x80000000u \ - | (uint32_t) (bus) << 16 \ - | (uint32_t) (dev) << 11 \ - | (uint32_t) (fn) << 8)) - -#define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16)) -#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f) -#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7) - -static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg) -{ - outl(dev | (reg & ~3), 0xcf8); - return inb(0xcfc | (reg & 3)); -} - -static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg) -{ - outl(dev | (reg & ~3), 0xcf8); - return inw(0xcfc | (reg & 2)); -} - -static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg) -{ - outl(dev | reg, 0xcf8); - return inl(0xcfc | reg); -} - -static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val) -{ - outl(dev | (reg & ~3), 0xcf8); - outb(val, 0xcfc | (reg & 3)); -} - -static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val) -{ - outl(dev | (reg & ~3), 0xcf8); - outw(val, 0xcfc | (reg & 2)); -} - -static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val) -{ - outl(dev | reg, 0xcf8); - outl(val, 0xcfc); -} - -#else /* !PCI_CONFIG_1 */ -#error PCI Configuration Mechanism is not specified or implemented -#endif - -#endif /* AMD64_PCI_H */ diff --git a/qemu/roms/openbios/include/arch/amd64/types.h b/qemu/roms/openbios/include/arch/amd64/types.h deleted file mode 100644 index 5b146cada..000000000 --- a/qemu/roms/openbios/include/arch/amd64/types.h +++ /dev/null @@ -1,67 +0,0 @@ -/* tag: data types for forth engine - * - * This file is autogenerated by types.sh. Do not edit! - * - * Copyright (C) 2003 Patrick Mauritz, Stefan Reinauer - * - * See the file "COPYING" for further information about - * the copyright and warranty status of this work. - */ - -#ifndef __TYPES_H -#define __TYPES_H - -#include <inttypes.h> - -/* endianess */ -#include "autoconf.h" - -/* physical address */ - -typedef uint64_t phys_addr_t; - -#define FMT_plx "%016" PRIx64 - -/* cell based types */ - -typedef int64_t cell; -typedef uint64_t ucell; -typedef __int128_t dcell; -typedef __uint128_t ducell; - -#define FMT_cell "%" PRId64 -#define FMT_ucellx "%016" PRIx64 -#define FMT_ucell "%" PRIu64 - -typedef int64_t prom_arg_t; -typedef uint64_t prom_uarg_t; - -#define PRIdPROMARG PRId64 -#define PRIuPROMARG PRIu64 -#define PRIxPROMARG PRIx64 -#define FMT_prom_arg "%" PRIdPROMARG -#define FMT_prom_uarg "%" PRIuPROMARG -#define FMT_prom_uargx "%016" PRIxPROMARG - -#define FMT_elf "%#x" - -#define bitspercell (sizeof(cell)<<3) -#define bitsperdcell (sizeof(dcell)<<3) - -#define BITS 64 - -#define PAGE_SHIFT 12 - -/* size named types */ - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned int u32; -typedef unsigned long u64; - -typedef char s8; -typedef short s16; -typedef int s32; -typedef long s64; - -#endif diff --git a/qemu/roms/openbios/include/arch/common/a.out.h b/qemu/roms/openbios/include/arch/common/a.out.h deleted file mode 100644 index 350babd75..000000000 --- a/qemu/roms/openbios/include/arch/common/a.out.h +++ /dev/null @@ -1,271 +0,0 @@ -#ifndef __A_OUT_GNU_H__ -#define __A_OUT_GNU_H__ - -#define __GNU_EXEC_MACROS__ - -#ifndef __STRUCT_EXEC_OVERRIDE__ - -#include "asm/a.out.h" - -#endif /* __STRUCT_EXEC_OVERRIDE__ */ - -/* these go in the N_MACHTYPE field */ -enum machine_type { -#if defined (M_OLDSUN2) - M__OLDSUN2 = M_OLDSUN2, -#else - M_OLDSUN2 = 0, -#endif -#if defined (M_68010) - M__68010 = M_68010, -#else - M_68010 = 1, -#endif -#if defined (M_68020) - M__68020 = M_68020, -#else - M_68020 = 2, -#endif -#if defined (M_SPARC) - M__SPARC = M_SPARC, -#else - M_SPARC = 3, -#endif - /* skip a bunch so we don't run into any of sun's numbers */ - M_386 = 100, - M_MIPS1 = 151, /* MIPS R3000/R3000 binary */ - M_MIPS2 = 152 /* MIPS R6000/R4000 binary */ -}; - -#if !defined (N_MAGIC) -#define N_MAGIC(exec) ((exec).a_info & 0xffff) -#endif -#define N_MACHTYPE(exec) ((enum machine_type)(((exec).a_info >> 16) & 0xff)) -#define N_FLAGS(exec) (((exec).a_info >> 24) & 0xff) -#define N_SET_INFO(exec, magic, type, flags) \ - ((exec).a_info = ((magic) & 0xffff) \ - | (((int)(type) & 0xff) << 16) \ - | (((flags) & 0xff) << 24)) -#define N_SET_MAGIC(exec, magic) \ - ((exec).a_info = (((exec).a_info & 0xffff0000) | ((magic) & 0xffff))) - -#define N_SET_MACHTYPE(exec, machtype) \ - ((exec).a_info = \ - ((exec).a_info&0xff00ffff) | ((((int)(machtype))&0xff) << 16)) - -#define N_SET_FLAGS(exec, flags) \ - ((exec).a_info = \ - ((exec).a_info&0x00ffffff) | (((flags) & 0xff) << 24)) - -/* Code indicating object file or impure executable. */ -#define OMAGIC 0407 -/* Code indicating pure executable. */ -#define NMAGIC 0410 -/* Code indicating demand-paged executable. */ -#define ZMAGIC 0413 -/* This indicates a demand-paged executable with the header in the text. - The first page is unmapped to help trap NULL pointer references */ -#define QMAGIC 0314 - -/* Code indicating core file. */ -#define CMAGIC 0421 - -#if !defined (N_BADMAG) -#define N_BADMAG(x) (N_MAGIC(x) != OMAGIC \ - && N_MAGIC(x) != NMAGIC \ - && N_MAGIC(x) != ZMAGIC \ - && N_MAGIC(x) != QMAGIC) -#endif - -#define _N_HDROFF(x) (1024 - sizeof (struct exec)) - -#if !defined (N_TXTOFF) -#define N_TXTOFF(x) \ - (N_MAGIC(x) == ZMAGIC ? _N_HDROFF((x)) + sizeof (struct exec) : \ - (N_MAGIC(x) == QMAGIC ? 0 : sizeof (struct exec))) -#endif - -#if !defined (N_DATOFF) -#define N_DATOFF(x) (N_TXTOFF(x) + (x).a_text) -#endif - -#if !defined (N_TRELOFF) -#define N_TRELOFF(x) (N_DATOFF(x) + (x).a_data) -#endif - -#if !defined (N_DRELOFF) -#define N_DRELOFF(x) (N_TRELOFF(x) + N_TRSIZE(x)) -#endif - -#if !defined (N_SYMOFF) -#define N_SYMOFF(x) (N_DRELOFF(x) + N_DRSIZE(x)) -#endif - -#if !defined (N_STROFF) -#define N_STROFF(x) (N_SYMOFF(x) + N_SYMSIZE(x)) -#endif - -/* Address of text segment in memory after it is loaded. */ -#if !defined (N_TXTADDR) -#define N_TXTADDR(x) (N_MAGIC(x) == QMAGIC ? PAGE_SIZE : 0) -#endif - -/* Address of data segment in memory after it is loaded. - Note that it is up to you to define SEGMENT_SIZE - on machines not listed here. */ -#if defined(vax) || defined(hp300) || defined(pyr) -#define SEGMENT_SIZE page_size -#endif -#ifdef sony -#define SEGMENT_SIZE 0x2000 -#endif /* Sony. */ -#ifdef is68k -#define SEGMENT_SIZE 0x20000 -#endif -#if defined(m68k) && defined(PORTAR) -#define PAGE_SIZE 0x400 -#define SEGMENT_SIZE PAGE_SIZE -#endif - -#if !defined(SEGMENT_SIZE) -#ifdef linux -#if defined(__i386__) || defined(__mc68000__) -#define SEGMENT_SIZE 1024 -#elif defined(__sparc__) -#define SEGMENT_SIZE 0x2000 -#else -#if defined(PAGE_SIZE) -#define SEGMENT_SIZE PAGE_SIZE -#endif -#endif -#endif -#endif - -#define _N_SEGMENT_ROUND(x) (((x) + SEGMENT_SIZE - 1) & ~(SEGMENT_SIZE - 1)) - -#define _N_TXTENDADDR(x) (N_TXTADDR(x)+(x).a_text) - -#ifndef N_DATADDR -#define N_DATADDR(x) \ - (N_MAGIC(x)==OMAGIC? (_N_TXTENDADDR(x)) \ - : (_N_SEGMENT_ROUND (_N_TXTENDADDR(x)))) -#endif - -/* Address of bss segment in memory after it is loaded. */ -#if !defined (N_BSSADDR) -#define N_BSSADDR(x) (N_DATADDR(x) + (x).a_data) -#endif - -#if !defined (N_NLIST_DECLARED) -struct nlist { - union { - char *n_name; - struct nlist *n_next; - long n_strx; - } n_un; - unsigned char n_type; - char n_other; - short n_desc; - unsigned long n_value; -}; -#endif /* no N_NLIST_DECLARED. */ - -#if !defined (N_UNDF) -#define N_UNDF 0 -#endif -#if !defined (N_ABS) -#define N_ABS 2 -#endif -#if !defined (N_TEXT) -#define N_TEXT 4 -#endif -#if !defined (N_DATA) -#define N_DATA 6 -#endif -#if !defined (N_BSS) -#define N_BSS 8 -#endif -#if !defined (N_FN) -#define N_FN 15 -#endif - -#if !defined (N_EXT) -#define N_EXT 1 -#endif -#if !defined (N_TYPE) -#define N_TYPE 036 -#endif -#if !defined (N_STAB) -#define N_STAB 0340 -#endif - -/* The following type indicates the definition of a symbol as being - an indirect reference to another symbol. The other symbol - appears as an undefined reference, immediately following this symbol. - - Indirection is asymmetrical. The other symbol's value will be used - to satisfy requests for the indirect symbol, but not vice versa. - If the other symbol does not have a definition, libraries will - be searched to find a definition. */ -#define N_INDR 0xa - -/* The following symbols refer to set elements. - All the N_SET[ATDB] symbols with the same name form one set. - Space is allocated for the set in the text section, and each set - element's value is stored into one word of the space. - The first word of the space is the length of the set (number of elements). - - The address of the set is made into an N_SETV symbol - whose name is the same as the name of the set. - This symbol acts like a N_DATA global symbol - in that it can satisfy undefined external references. */ - -/* These appear as input to LD, in a .o file. */ -#define N_SETA 0x14 /* Absolute set element symbol */ -#define N_SETT 0x16 /* Text set element symbol */ -#define N_SETD 0x18 /* Data set element symbol */ -#define N_SETB 0x1A /* Bss set element symbol */ - -/* This is output from LD. */ -#define N_SETV 0x1C /* Pointer to set vector in data area. */ - -#if !defined (N_RELOCATION_INFO_DECLARED) -/* This structure describes a single relocation to be performed. - The text-relocation section of the file is a vector of these structures, - all of which apply to the text section. - Likewise, the data-relocation section applies to the data section. */ - -struct relocation_info -{ - /* Address (within segment) to be relocated. */ - int r_address; - /* The meaning of r_symbolnum depends on r_extern. */ - unsigned int r_symbolnum:24; - /* Nonzero means value is a pc-relative offset - and it should be relocated for changes in its own address - as well as for changes in the symbol or section specified. */ - unsigned int r_pcrel:1; - /* Length (as exponent of 2) of the field to be relocated. - Thus, a value of 2 indicates 1<<2 bytes. */ - unsigned int r_length:2; - /* 1 => relocate with value of symbol. - r_symbolnum is the index of the symbol - in file's the symbol table. - 0 => relocate with the address of a segment. - r_symbolnum is N_TEXT, N_DATA, N_BSS or N_ABS - (the N_EXT bit may be set also, but signifies nothing). */ - unsigned int r_extern:1; - /* Four bits that aren't used, but when writing an object file - it is desirable to clear them. */ -#ifdef NS32K - unsigned r_bsr:1; - unsigned r_disp:1; - unsigned r_pad:2; -#else - unsigned int r_pad:4; -#endif -}; -#endif /* no N_RELOCATION_INFO_DECLARED. */ - - -#endif /* __A_OUT_GNU_H__ */ diff --git a/qemu/roms/openbios/include/arch/common/elf.h b/qemu/roms/openbios/include/arch/common/elf.h deleted file mode 100644 index f2cca558a..000000000 --- a/qemu/roms/openbios/include/arch/common/elf.h +++ /dev/null @@ -1,227 +0,0 @@ -#ifndef ELF_H -#define ELF_H - -#define EI_NIDENT 16 /* Size of e_ident array. */ - -/* Values for e_type. */ -#define ET_NONE 0 /* No file type */ -#define ET_REL 1 /* Relocatable file */ -#define ET_EXEC 2 /* Executable file */ -#define ET_DYN 3 /* Shared object file */ -#define ET_CORE 4 /* Core file */ - -/* Values for e_machine (architecute). */ -#define EM_NONE 0 /* No machine */ -#define EM_M32 1 /* AT&T WE 32100 */ -#define EM_SPARC 2 /* SUN SPARC */ -#define EM_386 3 /* Intel 80386+ */ -#define EM_68K 4 /* Motorola m68k family */ -#define EM_88K 5 /* Motorola m88k family */ -#define EM_486 6 /* Perhaps disused */ -#define EM_860 7 /* Intel 80860 */ -#define EM_MIPS 8 /* MIPS R3000 big-endian */ -#define EM_S370 9 /* IBM System/370 */ -#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */ - -#define EM_PARISC 15 /* HPPA */ -#define EM_VPP500 17 /* Fujitsu VPP500 */ -#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ -#define EM_960 19 /* Intel 80960 */ -#define EM_PPC 20 /* PowerPC */ -#define EM_PPC64 21 /* PowerPC 64-bit */ -#define EM_S390 22 /* IBM S390 */ - -#define EM_V800 36 /* NEC V800 series */ -#define EM_FR20 37 /* Fujitsu FR20 */ -#define EM_RH32 38 /* TRW RH-32 */ -#define EM_RCE 39 /* Motorola RCE */ -#define EM_ARM 40 /* ARM */ -#define EM_FAKE_ALPHA 41 /* Digital Alpha */ -#define EM_SH 42 /* Hitachi SH */ -#define EM_SPARCV9 43 /* SPARC v9 64-bit */ -#define EM_TRICORE 44 /* Siemens Tricore */ -#define EM_ARC 45 /* Argonaut RISC Core */ -#define EM_H8_300 46 /* Hitachi H8/300 */ -#define EM_H8_300H 47 /* Hitachi H8/300H */ -#define EM_H8S 48 /* Hitachi H8S */ -#define EM_H8_500 49 /* Hitachi H8/500 */ -#define EM_IA_64 50 /* Intel Merced */ -#define EM_MIPS_X 51 /* Stanford MIPS-X */ -#define EM_COLDFIRE 52 /* Motorola Coldfire */ -#define EM_68HC12 53 /* Motorola M68HC12 */ -#define EM_MMA 54 /* Fujitsu MMA Multimedia Accelerator*/ -#define EM_PCP 55 /* Siemens PCP */ -#define EM_NCPU 56 /* Sony nCPU embeeded RISC */ -#define EM_NDR1 57 /* Denso NDR1 microprocessor */ -#define EM_STARCORE 58 /* Motorola Start*Core processor */ -#define EM_ME16 59 /* Toyota ME16 processor */ -#define EM_ST100 60 /* STMicroelectronic ST100 processor */ -#define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/ -#define EM_X86_64 62 /* AMD x86-64 architecture */ -#define EM_PDSP 63 /* Sony DSP Processor */ - -#define EM_FX66 66 /* Siemens FX66 microcontroller */ -#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */ -#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */ -#define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */ -#define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */ -#define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */ -#define EM_68HC05 72 /* Motorola MC68HC05 microcontroller */ -#define EM_SVX 73 /* Silicon Graphics SVx */ -#define EM_AT19 74 /* STMicroelectronics ST19 8 bit mc */ -#define EM_VAX 75 /* Digital VAX */ -#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ -#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded processor */ -#define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */ -#define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */ -#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */ -#define EM_HUANY 81 /* Harvard University machine-independent object files */ -#define EM_PRISM 82 /* SiTera Prism */ -#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */ -#define EM_FR30 84 /* Fujitsu FR30 */ -#define EM_D10V 85 /* Mitsubishi D10V */ -#define EM_D30V 86 /* Mitsubishi D30V */ -#define EM_V850 87 /* NEC v850 */ -#define EM_M32R 88 /* Mitsubishi M32R */ -#define EM_MN10300 89 /* Matsushita MN10300 */ -#define EM_MN10200 90 /* Matsushita MN10200 */ -#define EM_PJ 91 /* picoJava */ -#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */ -#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ -#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ -#define EM_NUM 95 - -/* Values for p_type. */ -#define PT_NULL 0 /* Unused entry. */ -#define PT_LOAD 1 /* Loadable segment. */ -#define PT_DYNAMIC 2 /* Dynamic linking information segment. */ -#define PT_INTERP 3 /* Pathname of interpreter. */ -#define PT_NOTE 4 /* Auxiliary information. */ -#define PT_SHLIB 5 /* Reserved (not used). */ -#define PT_PHDR 6 /* Location of program header itself. */ - -/* Values for p_flags. */ -#define PF_X 0x1 /* Executable. */ -#define PF_W 0x2 /* Writable. */ -#define PF_R 0x4 /* Readable. */ - - -#define ELF_PROGRAM_RETURNS_BIT 0x8000000 /* e_flags bit 31 */ - -#define EI_MAG0 0 -#define ELFMAG0 0x7f - -#define EI_MAG1 1 -#define ELFMAG1 'E' - -#define EI_MAG2 2 -#define ELFMAG2 'L' - -#define EI_MAG3 3 -#define ELFMAG3 'F' - -#define ELFMAG "\177ELF" - -#define EI_CLASS 4 /* File class byte index */ -#define ELFCLASSNONE 0 /* Invalid class */ -#define ELFCLASS32 1 /* 32-bit objects */ -#define ELFCLASS64 2 /* 64-bit objects */ - -#define EI_DATA 5 /* Data encodeing byte index */ -#define ELFDATANONE 0 /* Invalid data encoding */ -#define ELFDATA2LSB 1 /* 2's complement little endian */ -#define ELFDATA2MSB 2 /* 2's complement big endian */ - -#define EI_VERSION 6 /* File version byte index */ - /* Value must be EV_CURRENT */ - -#define EV_NONE 0 /* Invalid ELF Version */ -#define EV_CURRENT 1 /* Current version */ - -#define ELF32_PHDR_SIZE (8*4) /* Size of an elf program header */ - -#ifndef __ASSEMBLY__ -#include "asm/types.h" -/* - * ELF definitions common to all 32-bit architectures. - */ - -typedef uint32_t Elf32_Addr; -typedef uint16_t Elf32_Half; -typedef uint32_t Elf32_Off; -typedef int32_t Elf32_Sword; -typedef uint32_t Elf32_Word; -typedef uint32_t Elf32_Size; - -typedef uint64_t Elf64_Addr; -typedef uint16_t Elf64_Half; -typedef uint64_t Elf64_Off; -typedef int32_t Elf64_Sword; -typedef uint32_t Elf64_Word; -typedef uint64_t Elf64_Size; - -/* - * ELF header. - */ -typedef struct { - unsigned char e_ident[EI_NIDENT]; /* File identification. */ - Elf32_Half e_type; /* File type. */ - Elf32_Half e_machine; /* Machine architecture. */ - Elf32_Word e_version; /* ELF format version. */ - Elf32_Addr e_entry; /* Entry point. */ - Elf32_Off e_phoff; /* Program header file offset. */ - Elf32_Off e_shoff; /* Section header file offset. */ - Elf32_Word e_flags; /* Architecture-specific flags. */ - Elf32_Half e_ehsize; /* Size of ELF header in bytes. */ - Elf32_Half e_phentsize; /* Size of program header entry. */ - Elf32_Half e_phnum; /* Number of program header entries. */ - Elf32_Half e_shentsize; /* Size of section header entry. */ - Elf32_Half e_shnum; /* Number of section header entries. */ - Elf32_Half e_shstrndx; /* Section name strings section. */ -} Elf32_Ehdr; - -typedef struct { - unsigned char e_ident[EI_NIDENT]; /* File identification. */ - Elf64_Half e_type; /* File type. */ - Elf64_Half e_machine; /* Machine architecture. */ - Elf64_Word e_version; /* ELF format version. */ - Elf64_Addr e_entry; /* Entry point. */ - Elf64_Off e_phoff; /* Program header file offset. */ - Elf64_Off e_shoff; /* Section header file offset. */ - Elf64_Word e_flags; /* Architecture-specific flags. */ - Elf64_Half e_ehsize; /* Size of ELF header in bytes. */ - Elf64_Half e_phentsize; /* Size of program header entry. */ - Elf64_Half e_phnum; /* Number of program header entries. */ - Elf64_Half e_shentsize; /* Size of section header entry. */ - Elf64_Half e_shnum; /* Number of section header entries. */ - Elf64_Half e_shstrndx; /* Section name strings section. */ -} Elf64_Ehdr; - -/* - * Program header. - */ -typedef struct { - Elf32_Word p_type; /* Entry type. */ - Elf32_Off p_offset; /* File offset of contents. */ - Elf32_Addr p_vaddr; /* Virtual address (not used). */ - Elf32_Addr p_paddr; /* Physical address. */ - Elf32_Size p_filesz; /* Size of contents in file. */ - Elf32_Size p_memsz; /* Size of contents in memory. */ - Elf32_Word p_flags; /* Access permission flags. */ - Elf32_Size p_align; /* Alignment in memory and file. */ -} Elf32_Phdr; - -typedef struct { - Elf64_Word p_type; /* Entry type. */ - Elf64_Word p_flags; /* Access permission flags. */ - Elf64_Off p_offset; /* File offset of contents. */ - Elf64_Addr p_vaddr; /* Virtual address (not used). */ - Elf64_Addr p_paddr; /* Physical address. */ - Elf64_Size p_filesz; /* Size of contents in file. */ - Elf64_Size p_memsz; /* Size of contents in memory. */ - Elf64_Size p_align; /* Alignment in memory and file. */ -} Elf64_Phdr; - -#endif /* __ASSEMBLY__ */ - -#endif /* ELF_H */ diff --git a/qemu/roms/openbios/include/arch/common/elf_boot.h b/qemu/roms/openbios/include/arch/common/elf_boot.h deleted file mode 100644 index 18487f6b0..000000000 --- a/qemu/roms/openbios/include/arch/common/elf_boot.h +++ /dev/null @@ -1,105 +0,0 @@ -#ifndef ELF_BOOT_H -#define ELF_BOOT_H - - -/* This defines the structure of a table of parameters useful for ELF - * bootable images. These parameters are all passed and generated - * by the bootloader to the booted image. For simplicity and - * consistency the Elf Note format is reused. - * - * All of the information must be Position Independent Data. - * That is it must be safe to relocate the whole ELF boot parameter - * block without changing the meaning or correctnes of the data. - * Additionally it must be safe to permute the order of the ELF notes - * to any possible permutation without changing the meaning or correctness - * of the data. - * - */ - -#define ELF_BHDR_MAGIC 0x0E1FB007 - -#ifndef __ASSEMBLY__ -typedef uint16_t Elf_Half; -typedef uint32_t Elf_Word; - -/* - * Elf boot notes... - */ - -typedef struct Elf_Bhdr -{ - Elf_Word b_signature; /* "0x0E1FB007" */ - Elf_Word b_size; - Elf_Half b_checksum; - Elf_Half b_records; -} Elf_Bhdr; - -/* - * ELF Notes. - */ - -typedef struct Elf_Nhdr -{ - Elf_Word n_namesz; /* Length of the note's name. */ - Elf_Word n_descsz; /* Length of the note's descriptor. */ - Elf_Word n_type; /* Type of the note. */ -} Elf_Nhdr; - -#endif /* __ASSEMBLY__ */ - -/* Standardized Elf image notes for booting... The name for all of these is ELFBoot */ -#define ELF_NOTE_BOOT "ELFBoot" - -#define EIN_PROGRAM_NAME 0x00000001 -/* The program in this ELF file */ -#define EIN_PROGRAM_VERSION 0x00000002 -/* The version of the program in this ELF file */ -#define EIN_PROGRAM_CHECKSUM 0x00000003 -/* ip style checksum of the memory image. */ - - -/* Linux image notes for booting... The name for all of these is Linux */ - -#define LIN_COMMAND_LINE 0x00000001 -/* The command line to pass to the loaded kernel. */ -#define LIN_ROOT_DEV 0x00000002 -/* The root dev to pass to the loaded kernel. */ -#define LIN_RAMDISK_FLAGS 0x00000003 -/* Various old ramdisk flags */ -#define LIN_INITRD_START 0x00000004 -/* Start of the ramdisk in bytes */ -#define LIN_INITRD_SIZE 0x00000005 -/* Size of the ramdisk in bytes */ - -/* Notes that are passed to a loaded image */ -/* For the standard elf boot notes n_namesz must be zero */ -#define EBN_FIRMWARE_TYPE 0x00000001 -/* ASCIZ name of the platform firmware. */ -#define EBN_BOOTLOADER_NAME 0x00000002 -/* This specifies just the ASCIZ name of the bootloader */ -#define EBN_BOOTLOADER_VERSION 0x00000003 -/* This specifies the version of the bootloader as an ASCIZ string */ -#define EBN_COMMAND_LINE 0x00000004 -/* This specifies a command line that can be set by user interaction, - * and is provided as a free form ASCIZ string to the loaded image. - */ -#define EBN_NOP 0x00000005 -/* A note nop note has no meaning, useful for inserting explicit padding */ -#define EBN_LOADED_IMAGE 0x00000006 -/* An ASCIZ string naming the loaded image */ - - -/* Etherboot specific notes */ -#define EB_PARAM_NOTE "Etherboot" -#define EB_IA64_SYSTAB 0x00000001 -#define EB_IA64_MEMMAP 0x00000002 -#define EB_IA64_FPSWA 0x00000003 -#define EB_IA64_CONINFO 0x00000004 -#define EB_BOOTP_DATA 0x00000005 -#define EB_HEADER 0x00000006 -#define EB_IA64_IMAGE_HANDLE 0x00000007 -#define EB_I386_MEMMAP 0x00000008 - -extern const struct elf_image_note elf_image_notes; - -#endif /* ELF_BOOT_H */ diff --git a/qemu/roms/openbios/include/arch/common/fw_cfg.h b/qemu/roms/openbios/include/arch/common/fw_cfg.h deleted file mode 100644 index df44c2e89..000000000 --- a/qemu/roms/openbios/include/arch/common/fw_cfg.h +++ /dev/null @@ -1,90 +0,0 @@ -#ifndef FW_CFG_H -#define FW_CFG_H - -#define FW_CFG_SIGNATURE 0x00 -#define FW_CFG_ID 0x01 -#define FW_CFG_UUID 0x02 -#define FW_CFG_RAM_SIZE 0x03 -#define FW_CFG_NOGRAPHIC 0x04 -#define FW_CFG_NB_CPUS 0x05 -#define FW_CFG_MACHINE_ID 0x06 -#define FW_CFG_KERNEL_ADDR 0x07 -#define FW_CFG_KERNEL_SIZE 0x08 -#define FW_CFG_KERNEL_CMDLINE 0x09 -#define FW_CFG_INITRD_ADDR 0x0a -#define FW_CFG_INITRD_SIZE 0x0b -#define FW_CFG_BOOT_DEVICE 0x0c -#define FW_CFG_NUMA 0x0d -#define FW_CFG_BOOT_MENU 0x0e -#define FW_CFG_MAX_CPUS 0x0f -#define FW_CFG_KERNEL_ENTRY 0x10 -#define FW_CFG_KERNEL_DATA 0x11 -#define FW_CFG_INITRD_DATA 0x12 -#define FW_CFG_CMDLINE_ADDR 0x13 -#define FW_CFG_CMDLINE_SIZE 0x14 -#define FW_CFG_CMDLINE_DATA 0x15 -#define FW_CFG_SETUP_ADDR 0x16 -#define FW_CFG_SETUP_SIZE 0x17 -#define FW_CFG_SETUP_DATA 0x18 -#define FW_CFG_FILE_DIR 0x19 - -#define FW_CFG_FILE_FIRST 0x20 -#define FW_CFG_FILE_SLOTS 0x10 -#define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST+FW_CFG_FILE_SLOTS) - -#define FW_CFG_WRITE_CHANNEL 0x4000 -#define FW_CFG_ARCH_LOCAL 0x8000 -#define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL) - -#define FW_CFG_PPC_WIDTH (FW_CFG_ARCH_LOCAL + 0x00) -#define FW_CFG_PPC_HEIGHT (FW_CFG_ARCH_LOCAL + 0x01) -#define FW_CFG_PPC_DEPTH (FW_CFG_ARCH_LOCAL + 0x02) -#define FW_CFG_PPC_TBFREQ (FW_CFG_ARCH_LOCAL + 0x03) -#define FW_CFG_PPC_CLOCKFREQ (FW_CFG_ARCH_LOCAL + 0x04) -#define FW_CFG_PPC_IS_KVM (FW_CFG_ARCH_LOCAL + 0x05) -#define FW_CFG_PPC_KVM_HC (FW_CFG_ARCH_LOCAL + 0x06) -#define FW_CFG_PPC_KVM_PID (FW_CFG_ARCH_LOCAL + 0x07) -#define FW_CFG_PPC_NVRAM_ADDR (FW_CFG_ARCH_LOCAL + 0x08) -#define FW_CFG_PPC_BUSFREQ (FW_CFG_ARCH_LOCAL + 0x09) -#define FW_CFG_PPC_NVRAM_FLAT (FW_CFG_ARCH_LOCAL + 0x0a) - -#define FW_CFG_INVALID 0xffff - -#ifndef NO_QEMU_PROTOS -typedef struct FWCfgFile { - uint32_t size; /* file size */ - uint16_t select; /* write this to 0x510 to read it */ - uint16_t reserved; - char name[56]; -} FWCfgFile; - -typedef struct FWCfgFiles { - uint32_t count; - FWCfgFile f[]; -} FWCfgFiles; - -typedef void (*FWCfgCallback)(void *opaque, uint8_t *data); - -typedef struct _FWCfgState FWCfgState; -int fw_cfg_add_bytes(FWCfgState *s, uint16_t key, uint8_t *data, uint32_t len); -int fw_cfg_add_i16(FWCfgState *s, uint16_t key, uint16_t value); -int fw_cfg_add_i32(FWCfgState *s, uint16_t key, uint32_t value); -int fw_cfg_add_i64(FWCfgState *s, uint16_t key, uint64_t value); -int fw_cfg_add_callback(FWCfgState *s, uint16_t key, FWCfgCallback callback, - void *callback_opaque, uint8_t *data, size_t len); -int fw_cfg_add_file(FWCfgState *s, const char *dir, const char *filename, - uint8_t *data, uint32_t len); -FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port, - target_phys_addr_t crl_addr, target_phys_addr_t data_addr); - -#endif /* NO_QEMU_PROTOS */ - -#ifndef NO_OPENBIOS_PROTOS -void fw_cfg_read(uint16_t cmd, char *buf, unsigned int nbytes); -uint64_t fw_cfg_read_i64(uint16_t cmd); -uint32_t fw_cfg_read_i32(uint16_t cmd); -uint16_t fw_cfg_read_i16(uint16_t cmd); -void fw_cfg_init(void); -#endif /* NO_OPENBIOS_PROTOS */ - -#endif diff --git a/qemu/roms/openbios/include/arch/common/nvram.h b/qemu/roms/openbios/include/arch/common/nvram.h deleted file mode 100644 index 41b31ca78..000000000 --- a/qemu/roms/openbios/include/arch/common/nvram.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Creation Date: <2003/12/20 01:04:25 samuel> - * Time-stamp: <2004/01/07 19:59:11 samuel> - * - * <nvram.h> - * - * arch NVRAM interface - * - * Copyright (C) 2003, 2004 Samuel Rydh (samuel@ibrium.se) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 - * - */ - -#ifndef _H_NVRAM -#define _H_NVRAM - -extern int arch_nvram_size( void ); -extern void arch_nvram_get( char *buf ); -extern void arch_nvram_put( char *buf ); - -#endif /* _H_NVRAM */ diff --git a/qemu/roms/openbios/include/arch/common/xcoff.h b/qemu/roms/openbios/include/arch/common/xcoff.h deleted file mode 100644 index 99106fe81..000000000 --- a/qemu/roms/openbios/include/arch/common/xcoff.h +++ /dev/null @@ -1,98 +0,0 @@ -#ifndef XCOFF_H -#define XCOFF_H - -/* XCOFF executable loader */ - -typedef struct COFF_filehdr_t { - uint16_t f_magic; /* magic number */ - uint16_t f_nscns; /* number of sections */ - uint32_t f_timdat; /* time & date stamp */ - uint32_t f_symptr; /* file pointer to symtab */ - uint32_t f_nsyms; /* number of symtab entries */ - uint16_t f_opthdr; /* sizeof(optional hdr) */ - uint16_t f_flags; /* flags */ -} COFF_filehdr_t; - -/* IBM RS/6000 */ - -#define U802WRMAGIC 0x02DA /* writeable text segments **chh** */ -#define U802ROMAGIC 0x02DF /* readonly sharable text segments */ -#define U802TOCMAGIC 0x02E1 /* readonly text segments and TOC */ -#define U802TOMAGIC 0x01DF - -/* - * Bits for f_flags: - * - * F_RELFLG relocation info stripped from file - * F_EXEC file is executable (i.e. no unresolved external - * references) - * F_LNNO line numbers stripped from file - * F_LSYMS local symbols stripped from file - * F_MINMAL this is a minimal object file (".m") output of fextract - * F_UPDATE this is a fully bound update file, output of ogen - * F_SWABD this file has had its bytes swabbed (in names) - * F_AR16WR this file has the byte ordering of an AR16WR - * (e.g. 11/70) machine - * F_AR32WR this file has the byte ordering of an AR32WR machine - * (e.g. vax and iNTEL 386) - * F_AR32W this file has the byte ordering of an AR32W machine - * (e.g. 3b,maxi) - * F_PATCH file contains "patch" list in optional header - * F_NODF (minimal file only) no decision functions for - * replaced functions - */ - -#define COFF_F_RELFLG 0000001 -#define COFF_F_EXEC 0000002 -#define COFF_F_LNNO 0000004 -#define COFF_F_LSYMS 0000010 -#define COFF_F_MINMAL 0000020 -#define COFF_F_UPDATE 0000040 -#define COFF_F_SWABD 0000100 -#define COFF_F_AR16WR 0000200 -#define COFF_F_AR32WR 0000400 -#define COFF_F_AR32W 0001000 -#define COFF_F_PATCH 0002000 -#define COFF_F_NODF 0002000 - -typedef struct COFF_aouthdr_t { - uint16_t magic; /* type of file */ - uint16_t vstamp; /* version stamp */ - uint32_t tsize; /* text size in bytes, padded to FW bdry */ - uint32_t dsize; /* initialized data " " */ - uint32_t bsize; /* uninitialized data " " */ - uint32_t entry; /* entry pt. */ - uint32_t text_start; /* base of text used for this file */ - uint32_t data_start; /* base of data used for this file */ - uint32_t o_toc; /* address of TOC */ - uint16_t o_snentry; /* section number of entry point */ - uint16_t o_sntext; /* section number of .text section */ - uint16_t o_sndata; /* section number of .data section */ - uint16_t o_sntoc; /* section number of TOC */ - uint16_t o_snloader; /* section number of .loader section */ - uint16_t o_snbss; /* section number of .bss section */ - uint16_t o_algntext; /* .text alignment */ - uint16_t o_algndata; /* .data alignment */ - uint16_t o_modtype; /* module type (??) */ - uint16_t o_cputype; /* cpu type */ - uint32_t o_maxstack; /* max stack size (??) */ - uint32_t o_maxdata; /* max data size (??) */ - char o_resv2[12]; /* reserved */ -} COFF_aouthdr_t; - -#define AOUT_MAGIC 0x010b - -typedef struct COFF_scnhdr_t { - char s_name[8]; /* section name */ - uint32_t s_paddr; /* physical address, aliased s_nlib */ - uint32_t s_vaddr; /* virtual address */ - uint32_t s_size; /* section size */ - uint32_t s_scnptr; /* file ptr to raw data for section */ - uint32_t s_relptr; /* file ptr to relocation */ - uint32_t s_lnnoptr; /* file ptr to line numbers */ - uint16_t s_nreloc; /* number of relocation entries */ - uint16_t s_nlnno; /* number of line number entries */ - uint32_t s_flags; /* flags */ -} COFF_scnhdr_t; - -#endif /* XCOFF_H */ diff --git a/qemu/roms/openbios/include/arch/ia64/elf.h b/qemu/roms/openbios/include/arch/ia64/elf.h deleted file mode 100644 index 782ddc727..000000000 --- a/qemu/roms/openbios/include/arch/ia64/elf.h +++ /dev/null @@ -1,5 +0,0 @@ -#define ARCH_ELF_CLASS ELFCLASS64 -#define ARCH_ELF_DATA ELFDATA2LSB -#define ARCH_ELF_MACHINE_OK(x) ((x)==EM_IA64) -typedef Elf64_Ehdr Elf_ehdr; -typedef Elf64_Phdr Elf_phdr; diff --git a/qemu/roms/openbios/include/arch/ia64/io.h b/qemu/roms/openbios/include/arch/ia64/io.h deleted file mode 100644 index 8f06dcdaf..000000000 --- a/qemu/roms/openbios/include/arch/ia64/io.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef _ASM_IO_H -#define _ASM_IO_H - -extern unsigned long virt_offset; - -#define phys_to_virt(phys) ((void *) ((unsigned long) (phys) - virt_offset)) -#define virt_to_phys(virt) ((unsigned long) (virt) + virt_offset) - -#define __SLOW_DOWN_IO "outb %%al,$0x80;" -static inline void slow_down_io(void) -{ - __asm__ __volatile__( - __SLOW_DOWN_IO -#ifdef REALLY_SLOW_IO - __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO -#endif - : : ); -} - -#define BUILDIO(bwl,bw,type) \ -static inline void out##bwl(unsigned type value, int port) { \ - __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \ -} \ -static inline unsigned type in##bwl(int port) { \ - unsigned type value; \ - __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \ - return value; \ -} \ -static inline void out##bwl##_p(unsigned type value, int port) { \ - out##bwl(value, port); \ - slow_down_io(); \ -} \ -static inline unsigned type in##bwl##_p(int port) { \ - unsigned type value = in##bwl(port); \ - slow_down_io(); \ - return value; \ -} \ -static inline void outs##bwl(int port, const void *addr, unsigned long count) { \ - __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \ -} \ -static inline void ins##bwl(int port, void *addr, unsigned long count) { \ - __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \ -} - -#ifndef BOOTSTRAP -BUILDIO(b,b,char) -BUILDIO(w,w,short) -BUILDIO(l,,int) -#else -extern u8 inb( u32 reg ); -extern u16 inw( u32 reg ); -extern u32 inl( u32 reg ); -extern void insw( u32 reg, void *addr, unsigned long count ); -extern void outb( u32 reg, u8 val ); -extern void outw( u32 reg, u16 val ); -extern void outl( u32 reg, u32 val ); -extern void outsw( u32 reg, const void *addr, unsigned long count); -#endif -#endif diff --git a/qemu/roms/openbios/include/arch/ia64/types.h b/qemu/roms/openbios/include/arch/ia64/types.h deleted file mode 100644 index cb09cda5b..000000000 --- a/qemu/roms/openbios/include/arch/ia64/types.h +++ /dev/null @@ -1,60 +0,0 @@ -/* tag: data types for forth engine - * - * This file is autogenerated by types.sh. Do not edit! - * - * Copyright (C) 2003 Patrick Mauritz, Stefan Reinauer - * - * See the file "COPYING" for further information about - * the copyright and warranty status of this work. - */ - -#ifndef __TYPES_H -#define __TYPES_H - -#include <inttypes.h> - -/* endianess */ - -#include <endian.h> - -/* physical address */ - -typedef uint64_t phys_addr_t; - -#define FMT_plx "%016" PRIx64 - -/* cell based types */ - -typedef int64_t cell; -typedef uint64_t ucell; -typedef __int128_t dcell; -typedef __uint128_t ducell; - -typedef int64_t prom_arg_t; -typedef uint64_t prom_uarg_t; - -#define PRIdPROMARG PRId64 -#define PRIuPROMARG PRIu64 -#define PRIxPROMARG PRIx64 -#define FMT_prom_arg "%" PRIdPROMARG -#define FMT_prom_uarg "%" PRIuPROMARG -#define FMT_prom_uargx "%016" PRIxPROMARG - -#define bitspercell (sizeof(cell)<<3) -#define bitsperdcell (sizeof(dcell)<<3) - -#define BITS 64 - -/* size named types */ - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned int u32; -typedef unsigned long u64; - -typedef char s8; -typedef short s16; -typedef int s32; -typedef long s64; - -#endif diff --git a/qemu/roms/openbios/include/arch/ppc/asmdefs.h b/qemu/roms/openbios/include/arch/ppc/asmdefs.h deleted file mode 100644 index 3b3cad434..000000000 --- a/qemu/roms/openbios/include/arch/ppc/asmdefs.h +++ /dev/null @@ -1,151 +0,0 @@ -/* -*- asm -*- - * - * Creation Date: <2001/02/03 19:38:07 samuel> - * Time-stamp: <2003/07/08 18:55:50 samuel> - * - * <asmdefs.h> - * - * Common assembly definitions - * - * Copyright (C) 2001, 2002, 2003 Samuel Rydh (samuel@ibrium.se) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation - * - */ - -#ifndef _H_ASMDEFS -#define _H_ASMDEFS - -/************************************************************************/ -/* High/low halfword compatibility macros */ -/************************************************************************/ - -#ifndef __darwin__ -#define ha16( v ) (v)##@ha -#define hi16( v ) (v)##@h -#define lo16( v ) (v)##@l -#endif -#define HA(v) ha16(v) -#define HI(v) hi16(v) -#define LO(v) lo16(v) - -/* from Linux: include/asm-powerpc/ppc_asm.h */ -/* - * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. - */ - -/* General Purpose Registers (GPRs) */ - -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 - -/************************************************************************/ -/* MISC */ -/************************************************************************/ - -#ifdef __powerpc64__ - -#define LOAD_REG_IMMEDIATE(D, x) \ - lis (D), (x)@highest ; \ - ori (D), (D), (x)@higher ; \ - sldi (D), (D), 32 ; \ - oris (D), (D), (x)@h ; \ - ori (D), (D), (x)@l - -#define LOAD_REG_FUNC(D, x) \ - LOAD_REG_IMMEDIATE((D), (x)) ; \ - ld (D), 0(D) - -#else - -#define LOAD_REG_IMMEDIATE(D, x) \ - lis (D), HA(x) ; \ - addi (D), (D), LO(x) - -#define LOAD_REG_FUNC(D, x) \ - LOAD_REG_IMMEDIATE((D), (x)) - -#endif - -#ifdef __powerpc64__ -#define PPC_LL ld -#define PPC_STL std -#define PPC_STLU stdu -#define RFI rfid -#define MTMSRD(r) mtmsrd r -#define DATA_LONG(x) .quad x -#define BRANCH_LABEL(name) . ## name -#define PPC_LR_STKOFF 16 -#else -#define PPC_LL lwz -#define PPC_STL stw -#define PPC_STLU stwu -#define RFI rfi -#define MTMSRD(r) mtmsr r -#define DATA_LONG(x) .long x -#define BRANCH_LABEL(name) name -#define PPC_LR_STKOFF 4 -#endif - -#ifndef __darwin__ -#define GLOBL( name ) .globl name ; name -#define EXTERN( name ) name -#else -/* an underscore is needed on Darwin */ -#define GLOBL( name ) .globl _##name ; name: ; _##name -#define EXTERN( name ) _##name -#endif - -#if defined(__powerpc64__) && !defined(__darwin__) -#define _GLOBAL(name) \ - .align 2 ; \ - .section ".opd", "aw" ; \ - .globl name ; \ - .globl .##name ; \ - name: \ - .quad .##name ; \ - .quad .TOC.@tocbase ; \ - .quad 0 ; \ - .previous ; \ - .type .##name, @function ; \ - .##name -#else -#define _GLOBAL(name) \ - GLOBL(name) -#endif - -#define BIT(n) (1<<(31-(n))) - -#endif /* _H_ASMDEFS */ diff --git a/qemu/roms/openbios/include/arch/ppc/elf.h b/qemu/roms/openbios/include/arch/ppc/elf.h deleted file mode 100644 index fd2a3f9eb..000000000 --- a/qemu/roms/openbios/include/arch/ppc/elf.h +++ /dev/null @@ -1,5 +0,0 @@ -#define ARCH_ELF_CLASS ELFCLASS32 -#define ARCH_ELF_DATA ELFDATA2MSB -#define ARCH_ELF_MACHINE_OK(x) ((x)==EM_PPC) -typedef Elf32_Ehdr Elf_ehdr; -typedef Elf32_Phdr Elf_phdr; diff --git a/qemu/roms/openbios/include/arch/ppc/io.h b/qemu/roms/openbios/include/arch/ppc/io.h deleted file mode 100644 index 3449c5bf0..000000000 --- a/qemu/roms/openbios/include/arch/ppc/io.h +++ /dev/null @@ -1,208 +0,0 @@ -#ifndef _ASM_IO_H -#define _ASM_IO_H - -#include "asm/types.h" - -#define NO_QEMU_PROTOS -#include "arch/common/fw_cfg.h" - -extern char _start, _end; -extern unsigned long virt_offset; - -#define phys_to_virt(phys) ((void *) ((unsigned long) (phys) - virt_offset)) -#define virt_to_phys(virt) ((unsigned long) (virt) + virt_offset) - -#ifndef BOOTSTRAP - -extern unsigned long isa_io_base; - -/* - * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. - */ -static inline uint8_t in_8(volatile uint8_t *addr) -{ - uint8_t ret; - - __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr)); - return ret; -} - -static inline void out_8(volatile uint8_t *addr, uint8_t val) -{ - __asm__ __volatile__("stb%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val)); -} - -static inline uint16_t in_le16(volatile uint16_t *addr) -{ - uint16_t ret; - - __asm__ __volatile__("lhbrx %0,0,%1; eieio":"=r"(ret): - "r"(addr), "m"(*addr)); - return ret; -} - -static inline uint16_t in_be16(volatile uint16_t *addr) -{ - uint16_t ret; - - __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr)); - return ret; -} - -static inline void out_le16(volatile uint16_t *addr, uint16_t val) -{ - __asm__ __volatile__("sthbrx %1,0,%2; eieio":"=m"(*addr):"r"(val), - "r"(addr)); -} - -static inline void out_be16(volatile uint16_t *addr, uint16_t val) -{ - __asm__ __volatile__("sth%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val)); -} - -static inline uint32_t in_le32(volatile uint32_t *addr) -{ - uint32_t ret; - - __asm__ __volatile__("lwbrx %0,0,%1; eieio":"=r"(ret): - "r"(addr), "m"(*addr)); - return ret; -} - -static inline uint32_t in_be32(volatile uint32_t *addr) -{ - uint32_t ret; - - __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr)); - return ret; -} - -static inline void out_le32(volatile uint32_t *addr, uint32_t val) -{ - __asm__ __volatile__("stwbrx %1,0,%2; eieio":"=m"(*addr):"r"(val), - "r"(addr)); -} - -static inline void out_be32(volatile unsigned *addr, uint32_t val) -{ - __asm__ __volatile__("stw%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val)); -} - -static inline void _insw_ns(volatile uint16_t * port, void *buf, int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - *b++ = in_le16(port); - ns--; - } -} - -static inline void _outsw_ns(volatile uint16_t * port, const void *buf, - int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - out_le16(port, *b++); - ns--; - } -} - -static inline void _insw(volatile uint16_t * port, void *buf, int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - *b++ = in_be16(port); - ns--; - } -} - -static inline void _outsw(volatile uint16_t * port, const void *buf, - int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - out_be16(port, *b++); - ns--; - } -} - - -/* - * The insw/outsw/insl/outsl functions don't do byte-swapping. - * They are only used in practice for transferring buffers which - * are arrays of bytes, and byte-swapping is not appropriate in - * that case. - paulus - */ - -static inline void insw(uint16_t port, void *buf, int ns) -{ - _insw((uint16_t *)(port + isa_io_base), buf, ns); -} - -static inline void outsw(uint16_t port, void *buf, int ns) -{ - _outsw((uint16_t *)(port + isa_io_base), buf, ns); -} - - -static inline uint8_t inb(uint16_t port) -{ - return in_8((uint8_t *)(port + isa_io_base)); -} - -static inline void outb(uint8_t val, uint16_t port) -{ - out_8((uint8_t *)(port + isa_io_base), val); -} - -static inline uint16_t inw(uint16_t port) -{ - return in_le16((uint16_t *)(port + isa_io_base)); -} - -static inline void outw(uint16_t val, uint16_t port) -{ - out_le16((uint16_t *)(port + isa_io_base), val); -} - -static inline uint32_t inl(uint16_t port) -{ - return in_le32((uint32_t *)(port + isa_io_base)); -} - -static inline void outl(uint32_t val, uint16_t port) -{ - out_le32((uint32_t *)(port + isa_io_base), val); -} - -#else /* BOOTSTRAP */ -#ifdef FCOMPILER -#define inb(reg) ((u8)0xff) -#define inw(reg) ((u16)0xffff) -#define inl(reg) ((u32)0xffffffff) -#define outb(reg, val) do{} while(0) -#define outw(reg, val) do{} while(0) -#define outl(reg, val) do{} while(0) -#else -extern u8 inb(u32 reg); -extern u16 inw(u32 reg); -extern u32 inl(u32 reg); -extern void insw(u32 reg, void *addr, unsigned long count); -extern void outb(u32 reg, u8 val); -extern void outw(u32 reg, u16 val); -extern void outl(u32 reg, u32 val); -extern void outsw(u32 reg, const void *addr, unsigned long count); -#endif -#endif - -#if defined(CONFIG_QEMU) -#define FW_CFG_ARCH_WIDTH (FW_CFG_ARCH_LOCAL + 0x00) -#define FW_CFG_ARCH_HEIGHT (FW_CFG_ARCH_LOCAL + 0x01) -#define FW_CFG_ARCH_DEPTH (FW_CFG_ARCH_LOCAL + 0x02) -#endif - -#endif /* _ASM_IO_H */ diff --git a/qemu/roms/openbios/include/arch/ppc/pci.h b/qemu/roms/openbios/include/arch/ppc/pci.h deleted file mode 100644 index d96bd7ee4..000000000 --- a/qemu/roms/openbios/include/arch/ppc/pci.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef PPC_PCI_H -#define PPC_PCI_H - -#include "asm/io.h" - -#if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2)) -#define PCI_CONFIG_1 1 /* default */ -#endif - -#ifdef PCI_CONFIG_1 - -/* PCI Configuration Mechanism #1 */ - -#define PCI_ADDR(bus, dev, fn) \ - ((pci_addr) (0x80000000u \ - | (uint32_t) (bus) << 16 \ - | (uint32_t) (dev) << 11 \ - | (uint32_t) (fn) << 8)) - -#define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16)) -#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f) -#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7) - -static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg) -{ - uint8_t res; - out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3)); - res = in_8((unsigned char*)(arch->cfg_data + (reg & 3))); - return res; -} - -static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg) -{ - uint16_t res; - out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3)); - res = in_le16((unsigned short*)(arch->cfg_data + (reg & 2))); - return res; -} - -static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg) -{ - uint32_t res; - out_le32((unsigned *)arch->cfg_addr, dev | reg); - res = in_le32((unsigned *)(arch->cfg_data)); - return res; -} - -static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val) -{ - out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3)); - out_8((unsigned char*)(arch->cfg_data + (reg & 3)), val); -} - -static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val) -{ - out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3)); - out_le16((unsigned short *)(arch->cfg_data + (reg & 2)), val); -} - -static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val) -{ - out_le32((unsigned *)arch->cfg_addr, dev | reg); - out_le32((unsigned *)(arch->cfg_data), val); -} -#else /* !PCI_CONFIG_1 */ -#error PCI Configuration Mechanism is not specified or implemented -#endif - -#endif /* PPC_PCI_H */ diff --git a/qemu/roms/openbios/include/arch/ppc/processor.h b/qemu/roms/openbios/include/arch/ppc/processor.h deleted file mode 100644 index bb03bb164..000000000 --- a/qemu/roms/openbios/include/arch/ppc/processor.h +++ /dev/null @@ -1,467 +0,0 @@ -/* - * Creation Date: <2000/10/29 01:43:29 samuel> - * Time-stamp: <2003/07/27 22:37:49 samuel> - * - * <processor.h> - * - * Extract from <asm/processor.h> - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation - * - */ - -#ifndef _H_PROCESSOR -#define _H_PROCESSOR - - -#define PTE0_VSID(s) (((s)>>7) & 0xffffff) -#define PTE0_V BIT(0) -#define PTE0_H BIT(25) -#define PTE0_API 0x3f - -#define PTE1_R BIT(23) -#define PTE1_C BIT(24) -#define PTE1_W BIT(25) -#define PTE1_I BIT(26) -#define PTE1_M BIT(27) -#define PTE1_G BIT(28) -#define PTE1_WIMG (PTE1_W | PTE1_I | PTE1_M | PTE1_G) -#define PTE1_PP 0x3 -#define PTE1_RPN (~0xfffUL) - -#define VSID_Ks BIT(1) -#define VSID_Kp BIT(2) -#define VSID_N BIT(3) - - - -#ifndef MSR_VEC - -#define MSR_SF (1 << 63) /* Sixty-Four Bit Mode */ - -#define MSR_VEC (1<<25) /* 6: Enable AltiVec */ -#define MSR_POW (1<<18) /* 13: Enable Power Management */ -#define MSR_TGPR (1<<17) /* 14: TLB Update registers in use */ -#define MSR_ILE (1<<16) /* 15: Interrupt Little Endian */ -#define MSR_EE (1<<15) /* 16: External Interrupt Enable */ -#define MSR_PR (1<<14) /* 17: Privilege Level */ -#define MSR_FP (1<<13) /* 18: Floating Point enable */ -#define MSR_ME (1<<12) /* 19: Machine Check Enable */ -#define MSR_FE0 (1<<11) /* 20: Floating Exception mode 0 */ -#define MSR_SE (1<<10) /* 21: Single Step */ -#define MSR_BE (1<<9) /* 22: Branch Trace */ -#define MSR_FE1 (1<<8) /* 23: Floating Exception mode 1 */ -#define MSR_IP (1<<6) /* 25: Exception prefix 0x000/0xFFF */ -#define MSR_IR (1<<5) /* 26: Instruction Relocate */ -#define MSR_DR (1<<4) /* 27: Data Relocate */ -#define MSR_PE (1<<2) /* 29: Performance Monitor Flag */ -#define MSR_RI (1<<1) /* 30: Recoverable Exception */ -#define MSR_LE (1<<0) /* 31: Little Endian */ - -#endif /* MSR_VEC */ - -#ifndef S_SPRG0 - -#define NUM_SPRS 1024 -//#define S_XER 1 -#define S_RTCU_R 4 /* 601 RTC Upper/Lower (Reading) */ -#define S_RTCL_R 5 -//#define S_LR 8 -//#define S_CTR 9 -#define S_DSISR 18 /* Source Instruction Service Register */ -#define S_DAR 19 /* Data Address Register */ -#define S_RTCU_W 20 /* 601 RTC Upper/Lower (Writing) */ -#define S_RTCL_W 21 -#define S_DEC 22 /* Decrementer Register */ -#define S_SDR1 25 /* Table Search Description Register */ -#define S_SRR0 26 /* Save and Restore Register 0 */ -#define S_SRR1 27 /* Save and Restore Register 1 */ -#define S_VRSAVE 256 /* (AltiVec) Vector Register Save Register */ -#define S_TBRL 268 /* Time base Upper/Lower (Reading) */ -#define S_TBRU 269 -#define S_SPRG0 272 /* SPR General 0-3 */ -#define S_SPRG1 273 -#define S_SPRG2 274 -#define S_SPRG3 275 -#define S_SPRG4 276 /* SPR General 4-7 (7445/7455) */ -#define S_SPRG5 277 -#define S_SPRG6 278 -#define S_SPRG7 279 -#define S_EAR 282 /* External Access Register */ -#define S_TBWL 284 /* Time base Upper/Lower (Writing) */ -#define S_TBWU 285 -#define S_PVR 287 /* Processor Version Register */ -#define S_HIOR 311 /* Hardware Interrupt Offset Register */ -#define S_IBAT0U 528 -#define S_IBAT0L 529 -#define S_IBAT1U 530 -#define S_IBAT1L 531 -#define S_IBAT2U 532 -#define S_IBAT2L 533 -#define S_IBAT3U 534 -#define S_IBAT3L 535 -#define S_DBAT0U 536 -#define S_DBAT0L 537 -#define S_DBAT1U 538 -#define S_DBAT1L 539 -#define S_DBAT2U 540 -#define S_DBAT2L 541 -#define S_DBAT3U 542 -#define S_DBAT3L 543 -#define S_UMMCR2 928 -#define S_UPMC5 929 /* User Performance Monitor Counter Register */ -#define S_UPMC6 930 -#define S_UBAMR 935 -#define S_UMMCR0 936 /* User Monitor Mode Control Register */ -#define S_UPMC1 937 -#define S_UPMC2 938 -#define S_USIAR 939 /* User Sampled Instruction Address Register */ -#define S_UMMCR1 940 -#define S_UPMC3 941 -#define S_UPMC4 942 /* User Performance Monitor Counter Register 4 */ -#define S_USDAR 943 /* User Sampled Data Address Register */ -#define S_MMCR2 944 /* Monitor Mode Control Register */ -#define S_PMC5 945 -#define S_PMC6 946 -#define S_BAMR 951 /* Breakpoint Address Mask Register (74xx) */ -#define S_MMCR0 952 /* Monitor Mode Control Register 0 */ -#define S_PMC1 953 /* Performance Counter Register */ -#define S_PMC2 954 -#define S_SIAR 955 /* Sampled Instruction Address Register */ -#define S_MMCR1 956 -#define S_PMC3 957 -#define S_PMC4 958 -#define S_SDAR 959 /* Sampled Data Address Register */ -#define S_DMISS 976 /* 603 */ -#define S_DCMP 977 /* 603 */ -#define S_HASH1 978 /* 603 */ -#define S_HASH2 979 /* 603 */ -#define S_IMISS 980 /* 603 */ -#define S_TLBMISS 980 /* 7445/7455 */ -#define S_ICMP 981 /* 603 */ -#define S_PTEHI 981 /* 7445/7455 */ -#define S_RPA 982 /* 603 */ -#define S_PTELO 982 /* 7445/7455 */ -#define S_L3PM 983 /* L3 Private Memory Address Control Register */ -#define S_L3ITCR0 984 /* ??? */ -#define S_L3OHCR 1000 /* ??? */ -#define S_L3ITCR1 1001 /* ??? */ -#define S_L3ITCR2 1002 /* ??? */ -#define S_L3ITCR3 1003 /* ??? */ -#define S_HID0 1008 /* Hardware Implementation Registers */ -#define S_HID1 1009 -#define S_HID2 1010 -#define S_IABR S_HID2 /* HID2 - Instruction Address Breakpoint Register */ -#define S_ICTRL 1011 /* HID3 - Instruction Cache & Interrupt control reg */ -#define S_HID4 1012 /* HID4 - Instruction Address Compare 1 (?) */ -#define S_HID5 1013 -#define S_DABR S_HID5 /* HID5 - Data Address Breakpoint */ -#define S_MSSCR0 1014 /* HID6 - Memory Subsystem Control Register 0 */ -#define S_MSSCR1 1015 /* HID7 - Memory Subsystem Control Register 1 */ -#define S_LDSTCR 1016 /* HID8 - Load/Store Control Register */ -#define S_L2CR 1017 /* HID9 - Level 2 Cache Control Regsiter */ -#define S_L3CR 1018 /* HID10 - Level 3 Cache Control Regsiter (7450) */ -#define S_HID11 1019 -#define S_ICTC S_HID11 /* HID11 - Instruction Cache Throttling Control Reg */ -#define S_ICCR S_HID11 /* Instruction Cache Cacheability Reigster */ -#define S_THRM1 1020 /* HID12 - Thermal Management Register 1 */ -#define S_THRM2 1021 /* HID13 - Thermal Management Register 2 */ -#define S_THRM3 1022 /* HID14 - Thermal Management Register 3 */ -#define S_HID15 1023 -#define S_PIR S_HID15 /* HID15 - Processor Identification Register */ - -#endif /* S_SPRG0 */ - -/* the kernel might define these too... */ -#if !defined(__KERNEL__) || defined(__ASSEMBLY__) - -/* Floating Point Status and Control Register (FPSCR) Fields */ -#define FPSCR_FX 0x80000000 /* FPU exception summary */ -#define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ -#define FPSCR_VX 0x20000000 /* Invalid operation summary */ -#define FPSCR_OX 0x10000000 /* Overflow exception summary */ -#define FPSCR_UX 0x08000000 /* Underflow exception summary */ -#define FPSCR_ZX 0x04000000 /* Zero-devide exception summary */ -#define FPSCR_XX 0x02000000 /* Inexact exception summary */ -#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */ -#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */ -#define FPSCR_VXIDI 0x00400000 /* Invalid op for Inv / Inv */ -#define FPSCR_VXZDZ 0x00200000 /* Invalid op for Zero / Zero */ -#define FPSCR_VXIMZ 0x00100000 /* Invalid op for Inv * Zero */ -#define FPSCR_VXVC 0x00080000 /* Invalid op for Compare */ -#define FPSCR_FR 0x00040000 /* Fraction rounded */ -#define FPSCR_FI 0x00020000 /* Fraction inexact */ -#define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */ -#define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */ -#define FPSCR_VXSOFT 0x00000400 /* Invalid op for software request */ -#define FPSCR_VXSQRT 0x00000200 /* Invalid op for square root */ -#define FPSCR_VXCVI 0x00000100 /* Invalid op for integer convert */ -#define FPSCR_VE 0x00000080 /* Invalid op exception enable */ -#define FPSCR_OE 0x00000040 /* IEEE overflow exception enable */ -#define FPSCR_UE 0x00000020 /* IEEE underflow exception enable */ -#define FPSCR_ZE 0x00000010 /* IEEE zero divide exception enable */ -#define FPSCR_XE 0x00000008 /* FP inexact exception enable */ -#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */ -#define FPSCR_RN 0x00000003 /* FPU rounding control */ - -/* SPR_HID0 */ -#define HID0_EMCP (1<<31) /* Enable Machine Check pin */ -#define HID0_EBA (1<<29) /* Enable Bus Address Parity */ -#define HID0_EBD (1<<28) /* Enable Bus Data Parity */ -#define HID0_SBCLK (1<<27) -#define HID0_EICE (1<<26) -#define HID0_ECLK (1<<25) -#define HID0_PAR (1<<24) -#define HID0_DOZE (1<<23) -#define HID0_NAP (1<<22) -#define HID0_SLEEP (1<<21) -#define HID0_DPM (1<<20) -#define HID0_NHR (1<<16) /* Not Hard Reset */ -#define HID0_ICE (1<<15) /* Instruction Cache Enable */ -#define HID0_DCE (1<<14) /* Data Cache Enable */ -#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */ -#define HID0_DLOCK (1<<12) /* Data Cache Lock */ -#define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */ -#define HID0_DCFI (1<<10) /* Data Cache Flash Invalidate */ -#define HID0_SPD (1<<9) /* Speculative disable */ -#define HID0_SGE (1<<7) /* Store Gathering Enable */ -#define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */ -#define HID0_BTIC (1<<5) /* Branch Target Instruction Cache Enable */ -#define HID0_ABE (1<<3) /* Address Broadcast Enable */ -#define HID0_BHT (1<<2) /* Branch History Table Enable */ -#define HID0_BTCD (1<<1) /* Branch target cache disable */ - -#define L2CR_L2E BIT(0) /* L2 enable */ -#define L2CR_L2PE BIT(1) /* L2 data parity generation and checking */ -#define L2CR_L2SIZ_512K BIT(2) -#define L2CR_L2SIZ_256K BIT(3) -#define L2CR_L2SIZ_1MB (BIT(2)|BIT(3)) -#define L2CR_L2CLK_1 BIT(6) /* L2 clock ration */ -#define L2CR_L2CLK_15 (BIT(6)*2) -#define L2CR_L2CLK_2 (BIT(6)*4) -#define L2CR_L2CLK_25 (BIT(6)*5) -#define L2CR_L2CLK_3 (BIT(6)*6) -#define L2CR_L2RAM_FT 0 /* flow-through (reg-buf) synchronous SRAM */ -#define L2CR_L2RAM_PB BIT(7) /* Piplined (reg-reg) synchronous burst SRAM */ -#define L2CR_L2RAM_PLW (BIT(7)|BIT(8)) /* Piplined (reg-reg) synchronous late-write */ -#define L2CR_L2DO BIT(9) /* L2 data-only */ -#define L2CR_L2I BIT(10) /* L2 global invalidate */ -#define L2CR_L2CTL BIT(11) /* L2 RAM control (ZZ enable, low-power mode) */ -#define L2CR_L2WT BIT(12) /* L2 write-through */ -#define L2CR_L2TS BIT(13) /* L2 test support */ -#define L2CR_L2OH_05 0 /* L2 output hold 0.5 nS */ -#define L2CR_L2OH_10 BIT(15) /* L2 output hold 1.0 nS */ -#define L2CR_L2SL BIT(16) /* L2 DLL slow (use if bus freq < 150 MHz) */ -#define L2CR_L2DF BIT(17) /* L2 differential clock */ -#define L2CR_L2BYP BIT(18) /* L2 DLL bypass */ -#define L2CR_L2IP BIT(31) /* L2 global invalidate in progress */ - -/* SPR_THRM1 */ -#define THRM1_TIN (1 << 31) -#define THRM1_TIV (1 << 30) -#define THRM1_THRES(x) ((x&0x7f)<<23) -#define THRM3_SITV(x) ((x&0x3fff)<<1) -#define THRM1_TID (1<<2) -#define THRM1_TIE (1<<1) -#define THRM1_V (1<<0) - -/* SPR_THRM3 */ -#define THRM3_E (1<<0) - -/* Processor Version Numbers */ - -#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ -#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ - -#define PVR_403GA 0x00200000 -#define PVR_403GB 0x00200100 -#define PVR_403GC 0x00200200 -#define PVR_403GCX 0x00201400 -#define PVR_405GP 0x40110000 -#define PVR_601 0x00010000 -#define PVR_602 0x00050000 -#define PVR_603 0x00030000 -#define PVR_603e 0x00060000 -#define PVR_603ev 0x00070000 -#define PVR_603r 0x00071000 -#define PVR_604 0x00040000 -#define PVR_604e 0x00090000 -#define PVR_604r 0x000A0000 -#define PVR_620 0x00140000 -#define PVR_740 0x00080000 -#define PVR_750 PVR_740 -#define PVR_740P 0x10080000 -#define PVR_750P PVR_740P -#define PVR_821 0x00500000 -#define PVR_823 PVR_821 -#define PVR_850 PVR_821 -#define PVR_860 PVR_821 -#define PVR_7400 0x000C0000 -#define PVR_8240 0x00810100 -#define PVR_8260 PVR_8240 - -/* Vector VSCR register */ -#define VSCR_NJ 0x10000 -#define VSCR_SAT 0x1 - -#endif /* __KERNEL__ */ - - -#ifdef __ASSEMBLY__ - -#define CTR S_CTR /* Counter Register */ -#define DAR S_DAR /* Data Address Register */ -#define DABR S_DABR /* Data Address Breakpoint Register */ -#define DBAT0L S_DBAT0L /* Data BAT 0 Lower Register */ -#define DBAT0U S_DBAT0U /* Data BAT 0 Upper Register */ -#define DBAT1L S_DBAT1L /* Data BAT 1 Lower Register */ -#define DBAT1U S_DBAT1U /* Data BAT 1 Upper Register */ -#define DBAT2L S_DBAT2L /* Data BAT 2 Lower Register */ -#define DBAT2U S_DBAT2U /* Data BAT 2 Upper Register */ -#define DBAT3L S_DBAT3L /* Data BAT 3 Lower Register */ -#define DBAT3U S_DBAT3U /* Data BAT 3 Upper Register */ -#define DCMP S_DCMP /* Data TLB Compare Register */ -#define DEC S_DEC /* Decrement Register */ -#define DMISS S_DMISS /* Data TLB Miss Register */ -#define DSISR S_DSISR /* Data Storage Interrupt Status Register */ -#define EAR S_EAR /* External Address Register */ -#define HASH1 S_HASH1 /* Primary Hash Address Register */ -#define HASH2 S_HASH2 /* Secondary Hash Address Register */ -#define HID0 S_HID0 /* Hardware Implementation Register 0 */ -#define HID1 S_HID1 /* Hardware Implementation Register 1 */ -#define IABR S_IABR /* Instruction Address Breakpoint Register */ -#define IBAT0L S_IBAT0L /* Instruction BAT 0 Lower Register */ -#define IBAT0U S_IBAT0U /* Instruction BAT 0 Upper Register */ -#define IBAT1L S_IBAT1L /* Instruction BAT 1 Lower Register */ -#define IBAT1U S_IBAT1U /* Instruction BAT 1 Upper Register */ -#define IBAT2L S_IBAT2L /* Instruction BAT 2 Lower Register */ -#define IBAT2U S_IBAT2U /* Instruction BAT 2 Upper Register */ -#define IBAT3L S_IBAT3L /* Instruction BAT 3 Lower Register */ -#define IBAT3U S_IBAT3U /* Instruction BAT 3 Upper Register */ -#define ICMP S_ICMP /* Instruction TLB Compare Register */ -#define IMISS S_IMISS /* Instruction TLB Miss Register */ -#define IMMR S_IMMR /* PPC 860/821 Internal Memory Map Register */ -#define L2CR S_L2CR /* PPC 750 L2 control register */ -#define PVR S_PVR /* Processor Version */ -#define RPA S_RPA /* Required Physical Address Register */ -#define SDR1 S_SDR1 /* MMU hash base register */ -#define SPR0 S_SPRG0 /* Supervisor Private Registers */ -#define SPR1 S_SPRG1 -#define SPR2 S_SPRG2 -#define SPR3 S_SPRG3 -#define SPRG0 S_SPRG0 -#define SPRG1 S_SPRG1 -#define SPRG2 S_SPRG2 -#define SPRG3 S_SPRG3 -#define SRR0 S_SRR0 /* Save and Restore Register 0 */ -#define SRR1 S_SRR1 /* Save and Restore Register 1 */ -#define TBRL S_STBRL /* Time Base Read Lower Register */ -#define TBRU S_TBRU /* Time Base Read Upper Register */ -#define TBWL S_TBWL /* Time Base Write Lower Register */ -#define TBWU S_TBWU /* Time Base Write Upper Register */ -#define ICTC S_ICTC -#define THRM1 S_THRM1 /* Thermal Management Register 1 */ -#define THRM2 S_THRM2 /* Thermal Management Register 2 */ -#define THRM3 S_THRM3 /* Thermal Management Register 3 */ -#define SIAR S_SIAR -#define SDAR S_SDAR -#define XER 1 - -#define SR0 0 /* Segment registers */ -#define SR1 1 -#define SR2 2 -#define SR3 3 -#define SR4 4 -#define SR5 5 -#define SR6 6 -#define SR7 7 -#define SR8 8 -#define SR9 9 -#define SR10 10 -#define SR11 11 -#define SR12 12 -#define SR13 13 -#define SR14 14 -#define SR15 15 - -#endif /* __ASSEMBLY__ */ - -/* opcode macros */ - -#define OPCODE_PRIM(n) ( ((unsigned long)(n)) >> 26 ) -#define OPCODE_EXT(n) ( (((unsigned long)(n)) >> 1) & 0x3ff ) -#define OPCODE(op,op_ext) ( ((op)<<10) + op_ext ) - -#define B1(n) ( (((unsigned long)(n)) >> 21) & 0x1f ) -#define B2(n) ( (((unsigned long)(n)) >> 16) & 0x1f ) -#define B3(n) ( (((unsigned long)(n)) >> 11) & 0x1f ) - -#define BD(n) ((unsigned long)((n) & 0x7fff) + (((n) & 0x8000) ? (unsigned long)0xffff8000 : 0)) - -#define SPRNUM_FLIP( v ) ( (((v)>>5) & 0x1f) | (((v)<<5) & 0x3e0) ) - -/* C helpers */ - -#ifndef __ASSEMBLER__ - -#define __stringify_1(x) #x -#define __stringify(x) __stringify_1(x) -#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) - -static inline unsigned long mfmsr(void) -{ - unsigned long msr; - asm volatile("mfmsr %0" : "=r" (msr)); - return msr; -} - -static inline void mtmsr(unsigned long msr) -{ -#ifdef __powerpc64__ - asm volatile("mtmsrd %0" :: "r" (msr)); -#else - asm volatile("mtmsr %0" :: "r" (msr)); -#endif -} - -#ifdef __powerpc64__ -#define SDR1_HTABORG_MASK 0x3FFFFFFFFFFC0000UL -#else -#define SDR1_HTABORG_MASK 0xffff0000 -#endif - -static inline unsigned long mfsdr1(void) -{ - unsigned long sdr1; - asm volatile("mfsdr1 %0" : "=r" (sdr1)); - return sdr1; -} - -static inline void mtsdr1(unsigned long sdr1) -{ - asm volatile("mtsdr1 %0" :: "r" (sdr1)); -} - -static inline unsigned int mfpvr(void) -{ - unsigned int pvr; - asm volatile("mfspr %0, 0x11f" : "=r" (pvr) ); - return pvr; -} - -static inline void slbia(void) -{ - asm volatile("slbia" ::: "memory"); -} - -static inline void slbmte(unsigned long rs, unsigned long rb) -{ - asm volatile("slbmte %0,%1 ; isync" :: "r" (rs), "r" (rb) : "memory"); -} - -#endif /* !__ASSEMBLER__ */ - -#endif /* _H_PROCESSOR */ diff --git a/qemu/roms/openbios/include/arch/ppc/types.h b/qemu/roms/openbios/include/arch/ppc/types.h deleted file mode 100644 index b2246d060..000000000 --- a/qemu/roms/openbios/include/arch/ppc/types.h +++ /dev/null @@ -1,96 +0,0 @@ -/* tag: data types for forth engine - * - * Copyright (C) 2003-2005 Patrick Mauritz, Stefan Reinauer - * - * See the file "COPYING" for further information about - * the copyright and warranty status of this work. - */ - -#ifndef __TYPES_H -#define __TYPES_H - -#include "mconfig.h" - -#ifdef BOOTSTRAP -#include <inttypes.h> -#else -typedef unsigned char uint8_t; -typedef unsigned short uint16_t; -typedef unsigned int uint32_t; -typedef unsigned long long uint64_t; -typedef unsigned long uintptr_t; - -typedef signed char int8_t; -typedef short int16_t; -typedef int int32_t; -typedef long long int64_t; -typedef long intptr_t; - -#define PRId32 "d" -#define PRIu32 "u" -#define PRIx32 "x" -#define PRIX32 "X" -#define PRId64 "lld" -#define PRIu64 "llu" -#define PRIx64 "llx" -#define PRIX64 "llX" -#endif - -/* endianess */ -#include "autoconf.h" - -/* physical address */ -#if defined(__powerpc64__) -typedef uint64_t phys_addr_t; -#define FMT_plx "%016" PRIx64 -#else -typedef uint32_t phys_addr_t; -#define FMT_plx "%08" PRIx32 -#endif - -/* cell based types */ - -typedef int32_t cell; -typedef uint32_t ucell; -typedef int64_t dcell; -typedef uint64_t ducell; - -#define FMT_cell "%" PRId32 -#define FMT_ucell "%" PRIu32 -#define FMT_ucellx "%08" PRIx32 -#define FMT_ucellX "%08" PRIX32 - -typedef int32_t prom_arg_t; -typedef uint32_t prom_uarg_t; - -#define PRIdPROMARG PRId32 -#define PRIuPROMARG PRIu32 -#define PRIxPROMARG PRIx32 -#define FMT_prom_arg "%" PRIdPROMARG -#define FMT_prom_uarg "%" PRIuPROMARG -#define FMT_prom_uargx "%08" PRIxPROMARG - -#define FMT_elf "%#x" -#define FMT_sizet "%lx" -#define FMT_aout_ehdr "%lx" - -#define bitspercell (sizeof(cell)<<3) -#define bitsperdcell (sizeof(dcell)<<3) - -#define BITS 32 - -#define PAGE_SHIFT 12 - -/* size named types */ - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned int u32; -typedef unsigned long long u64; - -typedef signed char s8; -typedef short s16; -typedef int s32; -typedef long long s64; - -#endif diff --git a/qemu/roms/openbios/include/arch/sparc32/a.out.h b/qemu/roms/openbios/include/arch/sparc32/a.out.h deleted file mode 100644 index e4e83eb01..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/a.out.h +++ /dev/null @@ -1,98 +0,0 @@ -/* $Id: a.out.h,v 1.13 2000/01/09 10:46:53 anton Exp $ */ -#ifndef __SPARC_A_OUT_H__ -#define __SPARC_A_OUT_H__ - -#define SPARC_PGSIZE 0x2000 /* Thanks to the sun4 architecture... */ -#define SEGMENT_SIZE SPARC_PGSIZE /* whee... */ - -struct exec { - unsigned char a_dynamic:1; /* A __DYNAMIC is in this image */ - unsigned char a_toolversion:7; - unsigned char a_machtype; - unsigned short a_info; - unsigned long a_text; /* length of text, in bytes */ - unsigned long a_data; /* length of data, in bytes */ - unsigned long a_bss; /* length of bss, in bytes */ - unsigned long a_syms; /* length of symbol table, in bytes */ - unsigned long a_entry; /* where program begins */ - unsigned long a_trsize; - unsigned long a_drsize; -}; - -/* Where in the file does the text information begin? */ -#define N_TXTOFF(x) (N_MAGIC(x) == ZMAGIC ? 0 : sizeof (struct exec)) - -/* Where do the Symbols start? */ -#define N_SYMOFF(x) (N_TXTOFF(x) + (x).a_text + \ - (x).a_data + (x).a_trsize + \ - (x).a_drsize) - -/* Where does text segment go in memory after being loaded? */ -#define N_TXTADDR(x) (((N_MAGIC(x) == ZMAGIC) && \ - ((x).a_entry < SPARC_PGSIZE)) ? \ - 0 : SPARC_PGSIZE) - -/* And same for the data segment.. */ -#define N_DATADDR(x) (N_MAGIC(x)==OMAGIC ? \ - (N_TXTADDR(x) + (x).a_text) \ - : (_N_SEGMENT_ROUND (_N_TXTENDADDR(x)))) - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -/* - * Sparc relocation types - */ -enum reloc_type -{ - RELOC_8, - RELOC_16, - RELOC_32, /* simplest relocs */ - RELOC_DISP8, - RELOC_DISP16, - RELOC_DISP32, /* Disp's (pc-rel) */ - RELOC_WDISP30, - RELOC_WDISP22, /* SR word disp's */ - RELOC_HI22, - RELOC_22, /* SR 22-bit relocs */ - RELOC_13, - RELOC_LO10, /* SR 13&10-bit relocs */ - RELOC_SFA_BASE, - RELOC_SFA_OFF13, /* SR S.F.A. relocs */ - RELOC_BASE10, - RELOC_BASE13, - RELOC_BASE22, /* base_relative pic */ - RELOC_PC10, - RELOC_PC22, /* special pc-rel pic */ - RELOC_JMP_TBL, /* jmp_tbl_rel in pic */ - RELOC_SEGOFF16, /* ShLib offset-in-seg */ - RELOC_GLOB_DAT, - RELOC_JMP_SLOT, - RELOC_RELATIVE /* rtld relocs */ -}; - -/* - * Format of a relocation datum. - */ -struct relocation_info /* used when header.a_machtype == M_SPARC */ -{ - unsigned long r_address; /* relocation addr */ - unsigned int r_index:24; /* segment index or symbol index */ - unsigned int r_extern:1; /* if F, r_index==SEG#; if T, SYM idx */ - int r_pad:2; /* <unused> */ - enum reloc_type r_type:5; /* type of relocation to perform */ - long r_addend; /* addend for relocation value */ -}; - -#define N_RELOCATION_INFO_DECLARED 1 - -#ifdef __KERNEL__ - -#include <asm/page.h> - -#define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) - -#endif /* __KERNEL__ */ - -#endif /* __SPARC_A_OUT_H__ */ diff --git a/qemu/roms/openbios/include/arch/sparc32/asi.h b/qemu/roms/openbios/include/arch/sparc32/asi.h deleted file mode 100644 index af3d69c13..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/asi.h +++ /dev/null @@ -1,111 +0,0 @@ -/* $Id: asi.h,v 1.1 2002/07/12 17:06:36 zaitcev Exp $ */ -#ifndef _SPARC_ASI_H -#define _SPARC_ASI_H - -/* asi.h: Address Space Identifier values for the sparc. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * - * Pioneer work for sun4m: Paul Hatchman (paul@sfe.com.au) - * Joint edition for sun4c+sun4m: Pete A. Zaitcev <zaitcev@ipmce.su> - */ - -/* The first batch are for the sun4c. */ - -#define ASI_NULL1 0x00 -#define ASI_NULL2 0x01 - -/* sun4c and sun4 control registers and mmu/vac ops */ -#define ASI_CONTROL 0x02 -#define ASI_SEGMAP 0x03 -#define ASI_PTE 0x04 -#define ASI_HWFLUSHSEG 0x05 -#define ASI_HWFLUSHPAGE 0x06 -#define ASI_REGMAP 0x06 -#define ASI_HWFLUSHCONTEXT 0x07 - -#define ASI_USERTXT 0x08 -#define ASI_KERNELTXT 0x09 -#define ASI_USERDATA 0x0a -#define ASI_KERNELDATA 0x0b - -/* VAC Cache flushing on sun4c and sun4 */ -#define ASI_FLUSHSEG 0x0c -#define ASI_FLUSHPG 0x0d -#define ASI_FLUSHCTX 0x0e - -/* SPARCstation-5: only 6 bits are decoded. */ -/* wo = Write Only, rw = Read Write; */ -/* ss = Single Size, as = All Sizes; */ -#define ASI_M_RES00 0x00 /* Don't touch... */ -#define ASI_M_UNA01 0x01 /* Same here... */ -#define ASI_M_MXCC 0x02 /* Access to TI VIKING MXCC registers */ -#define ASI_M_FLUSH_PROBE 0x03 /* Reference MMU Flush/Probe; rw, ss */ -#define ASI_M_MMUREGS 0x04 /* MMU Registers; rw, ss */ -#define ASI_M_TLBDIAG 0x05 /* MMU TLB only Diagnostics */ -#define ASI_M_DIAGS 0x06 /* Reference MMU Diagnostics */ -#define ASI_M_IODIAG 0x07 /* MMU I/O TLB only Diagnostics */ -#define ASI_M_USERTXT 0x08 /* Same as ASI_USERTXT; rw, as */ -#define ASI_M_KERNELTXT 0x09 /* Same as ASI_KERNELTXT; rw, as */ -#define ASI_M_USERDATA 0x0A /* Same as ASI_USERDATA; rw, as */ -#define ASI_M_KERNELDATA 0x0B /* Same as ASI_KERNELDATA; rw, as */ -#define ASI_M_TXTC_TAG 0x0C /* Instruction Cache Tag; rw, ss */ -#define ASI_M_TXTC_DATA 0x0D /* Instruction Cache Data; rw, ss */ -#define ASI_M_DATAC_TAG 0x0E /* Data Cache Tag; rw, ss */ -#define ASI_M_DATAC_DATA 0x0F /* Data Cache Data; rw, ss */ - -/* The following cache flushing ASIs work only with the 'sta' - * instruction. Results are unpredictable for 'swap' and 'ldstuba', - * so don't do it. - */ - -/* These ASI flushes affect external caches too. */ -#define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */ -#define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */ -#define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */ -#define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */ -#define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */ - -/* Block-copy operations are available only on certain V8 cpus. */ -#define ASI_M_BCOPY 0x17 /* Block copy */ - -/* These affect only the ICACHE and are Ross HyperSparc and TurboSparc specific. */ -#define ASI_M_IFLUSH_PAGE 0x18 /* Flush I Cache Line (page); wo, ss */ -#define ASI_M_IFLUSH_SEG 0x19 /* Flush I Cache Line (seg); wo, ss */ -#define ASI_M_IFLUSH_REGION 0x1A /* Flush I Cache Line (region); wo, ss */ -#define ASI_M_IFLUSH_CTX 0x1B /* Flush I Cache Line (context); wo, ss */ -#define ASI_M_IFLUSH_USER 0x1C /* Flush I Cache Line (user); wo, ss */ - -/* Block-fill operations are available on certain V8 cpus */ -#define ASI_M_BFILL 0x1F - -/* This allows direct access to main memory, actually 0x20 to 0x2f are - * the available ASI's for physical ram pass-through, but I don't have - * any idea what the other ones do.... - */ - -#define ASI_M_BYPASS 0x20 /* Reference MMU bypass; rw, as */ -#define ASI_M_FBMEM 0x29 /* Graphics card frame buffer access */ -#define ASI_M_VMEUS 0x2A /* VME user 16-bit access */ -#define ASI_M_VMEPS 0x2B /* VME priv 16-bit access */ -#define ASI_M_VMEUT 0x2C /* VME user 32-bit access */ -#define ASI_M_VMEPT 0x2D /* VME priv 32-bit access */ -#define ASI_M_SBUS 0x2E /* Direct SBus access */ -#define ASI_M_CTL 0x2F /* Control Space (ECC and MXCC are here) */ - - -/* This is ROSS HyperSparc only. */ -#define ASI_M_FLUSH_IWHOLE 0x31 /* Flush entire ICACHE; wo, ss */ - -/* Tsunami/Viking/TurboSparc i/d cache flash clear. */ -#define ASI_M_IC_FLCLEAR 0x36 -#define ASI_M_DC_FLCLEAR 0x37 - -#define ASI_M_DCDR 0x39 /* Data Cache Diagnostics Register rw, ss */ - -#define ASI_M_VIKING_TMP1 0x40 /* Emulation temporary 1 on Viking */ -#define ASI_M_VIKING_TMP2 0x41 /* Emulation temporary 2 on Viking */ - -#define ASI_M_ACTION 0x4c /* Breakpoint Action Register (GNU/Viking) */ - -#endif /* _SPARC_ASI_H */ diff --git a/qemu/roms/openbios/include/arch/sparc32/crs.h b/qemu/roms/openbios/include/arch/sparc32/crs.h deleted file mode 100644 index 7b4559372..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/crs.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Parts of asm-sparc/contregs.h - * - * contregs.h: Addresses of registers in the ASI_CONTROL alternate address - * space. These are for the mmu's context register, etc. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -/* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */ -#define AC_M_PCR 0x0000 /* shv Processor Control Reg */ -#define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */ -#define AC_M_CXR 0x0200 /* shv Context Register */ -#define AC_M_SFSR 0x0300 /* shv Synchronous Fault Status Reg */ -#define AC_M_SFAR 0x0400 /* shv Synchronous Fault Address Reg */ diff --git a/qemu/roms/openbios/include/arch/sparc32/dma.h b/qemu/roms/openbios/include/arch/sparc32/dma.h deleted file mode 100644 index e1310557b..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/dma.h +++ /dev/null @@ -1,213 +0,0 @@ -/* - * Local copy of include/asm-sparc/dma.h - * - * Copyright 1995 (C) David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _ASM_SPARC_DMA_H -#define _ASM_SPARC_DMA_H - -/* #include <linux/kernel.h> */ -/* #include <linux/types.h> */ -typedef unsigned int __u32; - -/* These are irrelevant for Sparc DMA, but we leave it in so that - * things can compile. - */ -#define MAX_DMA_CHANNELS 8 -#define MAX_DMA_ADDRESS (~0UL) -#define DMA_MODE_READ 1 -#define DMA_MODE_WRITE 2 - -/* Useful constants */ -#define SIZE_16MB (16*1024*1024) -#define SIZE_64K (64*1024) - -/* Structure to describe the current status of DMA registers on the Sparc */ -struct sparc_dma_registers { - __volatile__ __u32 cond_reg; /* DMA condition register */ - __volatile__ __u32 st_addr; /* Start address of this transfer */ - __volatile__ __u32 cnt; /* How many bytes to transfer */ - __volatile__ __u32 dma_test; /* DMA test register */ -}; - -/* DVMA chip revisions */ -enum dvma_rev { - dvmarev0, - dvmaesc1, - dvmarev1, - dvmarev2, - dvmarev3, - dvmarevplus, - dvmahme -}; - -#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) - -#if 0 -/* Linux DMA information structure, filled during probe. */ -struct Linux_SBus_DMA { - struct Linux_SBus_DMA *next; - struct linux_sbus_device *SBus_dev; - struct sparc_dma_registers *regs; - - /* Status, misc info */ - int node; /* Prom node for this DMA device */ - int running; /* Are we doing DMA now? */ - int allocated; /* Are we "owned" by anyone yet? */ - - /* Transfer information. */ - unsigned long addr; /* Start address of current transfer */ - int nbytes; /* Size of current transfer */ - int realbytes; /* For splitting up large transfers, etc. */ - - /* DMA revision */ - enum dvma_rev revision; -}; - -extern struct Linux_SBus_DMA *dma_chain; -#endif - -/* Broken hardware... */ -/* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? - * Or is rev0 present only on sun4 boxes? -jj */ -#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) -#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) - -/* Fields in the cond_reg register */ -/* First, the version identification bits */ -#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ -#define DMA_VERS0 0x00000000 /* Sunray DMA version */ -#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ -#define DMA_VERS1 0x80000000 /* DMA rev 1 */ -#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ -#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ -#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ - -#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ -#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ -#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ -#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ -#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ -#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ -#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ -#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ -#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ -#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ -#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ -#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ -#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ -#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ -#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ -#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ -#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ -#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ -#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ -#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ -#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ -#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ -#define DMA_E_BURST8 0x00040000 /* ENET: SBUS r/w burst size */ -#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ -#define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ -#define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ -#define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ -#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ -#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ -#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ -#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ -#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ -#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ -#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ -#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ -#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ -#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ -#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ -#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ - -/* Values describing the burst-size property from the PROM */ -#define DMA_BURST1 0x01 -#define DMA_BURST2 0x02 -#define DMA_BURST4 0x04 -#define DMA_BURST8 0x08 -#define DMA_BURST16 0x10 -#define DMA_BURST32 0x20 -#define DMA_BURST64 0x40 -#define DMA_BURSTBITS 0x7f - -/* Determine highest possible final transfer address given a base */ -#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) - -/* Yes, I hack a lot of elisp in my spare time... */ -#define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) -#define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) -#define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) -#define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) -#define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) -#define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) -#define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) -#define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) -#define DMA_BEGINDMA_W(regs) \ - ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) -#define DMA_BEGINDMA_R(regs) \ - ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) - -#if 0 - -/* For certain DMA chips, we need to disable ints upon irq entry - * and turn them back on when we are done. So in any ESP interrupt - * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT - * when leaving the handler. You have been warned... - */ -#define DMA_IRQ_ENTRY(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ - } while (0) - -#define DMA_IRQ_EXIT(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ - } while(0) - - -/* Pause until counter runs out or BIT isn't set in the DMA condition - * register. - */ -extern __inline__ void sparc_dma_pause(struct sparc_dma_registers *regs, - unsigned long bit) -{ - int ctr = 50000; /* Let's find some bugs ;) */ - - /* Busy wait until the bit is not set any more */ - while((regs->cond_reg&bit) && (ctr>0)) { - ctr--; - __delay(5); - } - - /* Check for bogus outcome. */ - if(!ctr) - panic("DMA timeout"); -} - -/* Reset the friggin' thing... */ -#define DMA_RESET(dma) do { \ - struct sparc_dma_registers *regs = dma->regs; \ - /* Let the current FIFO drain itself */ \ - sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ - /* Reset the logic */ \ - regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ - __delay(400); /* let the bits set ;) */ \ - regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ - sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ - /* Enable FAST transfers if available */ \ - if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ - dma->running = 0; \ -} while(0) - -#define for_each_dvma(dma) \ - for((dma) = dma_chain; (dma); (dma) = (dma)->next) - -extern int get_dma_list(char *); -extern int request_dma(unsigned int, __const__ char *); -extern void free_dma(unsigned int); - -#endif - -#endif /* !(_ASM_SPARC_DMA_H) */ diff --git a/qemu/roms/openbios/include/arch/sparc32/elf.h b/qemu/roms/openbios/include/arch/sparc32/elf.h deleted file mode 100644 index 8d429d7aa..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/elf.h +++ /dev/null @@ -1,5 +0,0 @@ -#define ARCH_ELF_CLASS ELFCLASS32 -#define ARCH_ELF_DATA ELFDATA2MSB -#define ARCH_ELF_MACHINE_OK(x) ((x)==EM_SPARC || (x)==EM_SPARC32PLUS) -typedef Elf32_Ehdr Elf_ehdr; -typedef Elf32_Phdr Elf_phdr; diff --git a/qemu/roms/openbios/include/arch/sparc32/io.h b/qemu/roms/openbios/include/arch/sparc32/io.h deleted file mode 100644 index 011770ad1..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/io.h +++ /dev/null @@ -1,201 +0,0 @@ -#ifndef _ASM_IO_H -#define _ASM_IO_H - -#include "asm/types.h" - -extern unsigned int va_shift; // Set in entry.S - -// Defined in ldscript -extern char _start, _data, _stack, _estack, _end, _vmem, _evmem, _iomem; - -// XXX check use and merge -#define phys_to_virt(phys) ((void *) ((unsigned long) (phys))) -#define virt_to_phys(virt) ((unsigned long) (virt)) - -#ifndef BOOTSTRAP - -#ifndef _IO_BASE -#define _IO_BASE 0 -#endif - -/* - * The insw/outsw/insl/outsl macros don't do byte-swapping. - * They are only used in practice for transferring buffers which - * are arrays of bytes, and byte-swapping is not appropriate in - * that case. - paulus - */ -#define insw(port, buf, ns) _insw_ns((uint16_t *)((port)+_IO_BASE), (buf), (ns)) -#define outsw(port, buf, ns) _outsw_ns((uint16_t *)((port)+_IO_BASE), (buf), (ns)) - -#define inb(port) in_8((uint8_t *)((port)+_IO_BASE)) -#define outb(val, port) out_8((uint8_t *)((port)+_IO_BASE), (val)) -#define inw(port) in_le16((uint16_t *)((port)+_IO_BASE)) -#define outw(val, port) out_le16((uint16_t *)((port)+_IO_BASE), (val)) -#define inl(port) in_le32((uint32_t *)((port)+_IO_BASE)) -#define outl(val, port) out_le32((uint32_t *)((port)+_IO_BASE), (val)) - -/* - * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. - */ -static inline int in_8(volatile unsigned char *addr) -{ - int ret; - - __asm__ __volatile__("ldub [%1], %0\n\t" - "stbar\n\t" - :"=r"(ret):"r"(addr):"memory"); - - return ret; -} - -static inline void out_8(volatile unsigned char *addr, int val) -{ - __asm__ __volatile__("stb %0, [%1]\n\t" - "stbar\n\t" - : : "r"(val), "r"(addr):"memory"); -} - -static inline int in_le16(volatile unsigned short *addr) -{ - int ret; - - // XXX - __asm__ __volatile__("lduh [%1], %0\n\t" - "stbar\n\t" - :"=r"(ret):"r"(addr):"memory"); - - return ret; -} - -static inline int in_be16(volatile unsigned short *addr) -{ - int ret; - - __asm__ __volatile__("lduh [%1], %0\n\t" - "stbar\n\t" - :"=r"(ret):"r"(addr):"memory"); - - return ret; -} - -static inline void out_le16(volatile unsigned short *addr, int val) -{ - // XXX - __asm__ __volatile__("sth %0, [%1]\n\t" - "stbar\n\t" - : : "r"(val), "r"(addr):"memory"); -} - -static inline void out_be16(volatile unsigned short *addr, int val) -{ - __asm__ __volatile__("sth %0, [%1]\n\t" - "stbar\n\t" - : : "r"(val), "r"(addr):"memory"); -} - -static inline unsigned in_le32(volatile unsigned *addr) -{ - unsigned ret; - - // XXX - __asm__ __volatile__("ld [%1], %0\n\t" - "stbar\n\t" - :"=r"(ret):"r"(addr):"memory"); - - return ret; -} - -static inline unsigned in_be32(volatile unsigned *addr) -{ - unsigned ret; - - __asm__ __volatile__("ld [%1], %0\n\t" - "stbar\n\t" - :"=r"(ret):"r"(addr):"memory"); - - return ret; -} - -static inline void out_le32(volatile unsigned *addr, int val) -{ - // XXX - __asm__ __volatile__("st %0, [%1]\n\t" - "stbar\n\t" - : : "r"(val), "r"(addr):"memory"); -} - -static inline void out_be32(volatile unsigned *addr, int val) -{ - __asm__ __volatile__("st %0, [%1]\n\t" - "stbar\n\t" - : : "r"(val), "r"(addr):"memory"); -} - -static inline void _insw_ns(volatile uint16_t * port, void *buf, int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - *b++ = in_le16(port); - ns--; - } -} - -static inline void _outsw_ns(volatile uint16_t * port, const void *buf, - int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - out_le16(port, *b++); - ns--; - } -} - -static inline void _insw(volatile uint16_t * port, void *buf, int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - *b++ = in_be16(port); - ns--; - } -} - -static inline void _outsw(volatile uint16_t * port, const void *buf, - int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - out_be16(port, *b++); - ns--; - } -} -#else /* BOOTSTRAP */ -#ifdef FCOMPILER -#define inb(reg) ((u8)0xff) -#define inw(reg) ((u16)0xffff) -#define inl(reg) ((u32)0xffffffff) -#define outb(reg, val) do{} while(0) -#define outw(reg, val) do{} while(0) -#define outl(reg, val) do{} while(0) -#else -extern u8 inb(u32 reg); -extern u16 inw(u32 reg); -extern u32 inl(u32 reg); -extern void insw(u32 reg, void *addr, unsigned long count); -extern void outb(u32 reg, u8 val); -extern void outw(u32 reg, u16 val); -extern void outl(u32 reg, u32 val); -extern void outsw(u32 reg, const void *addr, unsigned long count); -#endif -#endif - -#if defined(CONFIG_QEMU) -#define FW_CFG_ARCH_DEPTH (FW_CFG_ARCH_LOCAL + 0x00) -#define FW_CFG_ARCH_WIDTH (FW_CFG_ARCH_LOCAL + 0x01) -#define FW_CFG_ARCH_HEIGHT (FW_CFG_ARCH_LOCAL + 0x02) -#endif - -#endif /* _ASM_IO_H */ diff --git a/qemu/roms/openbios/include/arch/sparc32/ofmem_sparc32.h b/qemu/roms/openbios/include/arch/sparc32/ofmem_sparc32.h deleted file mode 100644 index efc21b498..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/ofmem_sparc32.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * <ofmem_sparc32.h> - * - * OF Memory manager - * - * Copyright (C) 1999, 2002 Samuel Rydh (samuel@ibrium.se) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation - * - */ - -#ifndef _H_OFMEM_SPARC32 -#define _H_OFMEM_SPARC32 - -#include "libopenbios/ofmem.h" - -#define OF_CODE_START 0xffd00000 -#define OFMEM_VIRT_TOP 0xfe000000 - -struct mem; -extern struct mem cdvmem; - -extern unsigned long *l1; -extern unsigned long find_pte(unsigned long va, int alloc); - -void mem_init(struct mem *t, char *begin, char *limit); -void *mem_alloc(struct mem *t, int size, int align); - -#endif /* _H_OFMEM_SPARC32 */
\ No newline at end of file diff --git a/qemu/roms/openbios/include/arch/sparc32/types.h b/qemu/roms/openbios/include/arch/sparc32/types.h deleted file mode 100644 index 3f37d4e03..000000000 --- a/qemu/roms/openbios/include/arch/sparc32/types.h +++ /dev/null @@ -1,93 +0,0 @@ -/* tag: data types for forth engine - * - * Copyright (C) 2003-2005 Patrick Mauritz, Stefan Reinauer - * - * See the file "COPYING" for further information about - * the copyright and warranty status of this work. - */ - -#ifndef __TYPES_H -#define __TYPES_H - -#include "mconfig.h" - -#ifdef BOOTSTRAP -#include <inttypes.h> -#else -typedef unsigned char uint8_t; -typedef unsigned short uint16_t; -typedef unsigned int uint32_t; -typedef unsigned long long uint64_t; -typedef unsigned long uintptr_t; - -typedef signed char int8_t; -typedef short int16_t; -typedef int int32_t; -typedef long long int64_t; -typedef long intptr_t; - -#define PRId32 "d" -#define PRIu32 "u" -#define PRIx32 "x" -#define PRIX32 "X" -#define PRId64 "lld" -#define PRIu64 "llu" -#define PRIx64 "llx" -#define PRIX64 "llX" -#endif - -/* endianess */ -#include "autoconf.h" - -/* physical address: 36 bits */ - -typedef uint64_t phys_addr_t; - -#define FMT_plx "%09" PRIx64 - -/* cell based types */ - -typedef int32_t cell; -typedef uint32_t ucell; -typedef long long dcell; -typedef unsigned long long ducell; - -#define FMT_cell "%" PRId32 -#define FMT_ucell "%" PRIu32 -#define FMT_ucellx "%08" PRIx32 -#define FMT_ucellX "%08" PRIX32 - -typedef int32_t prom_arg_t; -typedef uint32_t prom_uarg_t; - -#define PRIdPROMARG PRId32 -#define PRIuPROMARG PRIu32 -#define PRIxPROMARG PRIx32 -#define FMT_prom_arg "%" PRIdPROMARG -#define FMT_prom_uarg "%" PRIuPROMARG -#define FMT_prom_uargx "%08" PRIxPROMARG - -#define FMT_elf "%#x" -#define FMT_sizet "%lx" -#define FMT_aout_ehdr "%lx" - -#define bitspercell (sizeof(cell)<<3) -#define bitsperdcell (sizeof(dcell)<<3) - -#define BITS 32 - -#define PAGE_SHIFT 12 - -/* size named types */ - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned int u32; -typedef unsigned long long u64; - -typedef signed char s8; -typedef short s16; -typedef int s32; -typedef long long s64; - -#endif diff --git a/qemu/roms/openbios/include/arch/sparc64/a.out.h b/qemu/roms/openbios/include/arch/sparc64/a.out.h deleted file mode 100644 index 35cb5c9e0..000000000 --- a/qemu/roms/openbios/include/arch/sparc64/a.out.h +++ /dev/null @@ -1,108 +0,0 @@ -/* $Id: a.out.h,v 1.8 2002/02/09 19:49:31 davem Exp $ */ -#ifndef __SPARC64_A_OUT_H__ -#define __SPARC64_A_OUT_H__ - -#define SPARC_PGSIZE 0x2000 /* Thanks to the sun4 architecture... */ -#define SEGMENT_SIZE SPARC_PGSIZE /* whee... */ - -#ifndef __ASSEMBLY__ - -struct exec { - unsigned char a_dynamic:1; /* A __DYNAMIC is in this image */ - unsigned char a_toolversion:7; - unsigned char a_machtype; - unsigned short a_info; - unsigned int a_text; /* length of text, in bytes */ - unsigned int a_data; /* length of data, in bytes */ - unsigned int a_bss; /* length of bss, in bytes */ - unsigned int a_syms; /* length of symbol table, in bytes */ - unsigned int a_entry; /* where program begins */ - unsigned int a_trsize; - unsigned int a_drsize; -}; - -#endif /* !__ASSEMBLY__ */ - -/* Where in the file does the text information begin? */ -#define N_TXTOFF(x) (N_MAGIC(x) == ZMAGIC ? 0 : sizeof (struct exec)) - -/* Where do the Symbols start? */ -#define N_SYMOFF(x) (N_TXTOFF(x) + (x).a_text + \ - (x).a_data + (x).a_trsize + \ - (x).a_drsize) - -/* Where does text segment go in memory after being loaded? */ -#define N_TXTADDR(x) (unsigned long)(((N_MAGIC(x) == ZMAGIC) && \ - ((x).a_entry < SPARC_PGSIZE)) ? \ - 0 : SPARC_PGSIZE) - -/* And same for the data segment.. */ -#define N_DATADDR(x) (N_MAGIC(x)==OMAGIC ? \ - (N_TXTADDR(x) + (x).a_text) \ - : (unsigned long)(_N_SEGMENT_ROUND (_N_TXTENDADDR(x)))) - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -#ifndef __ASSEMBLY__ - -/* - * Sparc relocation types - */ -enum reloc_type -{ - RELOC_8, - RELOC_16, - RELOC_32, /* simplest relocs */ - RELOC_DISP8, - RELOC_DISP16, - RELOC_DISP32, /* Disp's (pc-rel) */ - RELOC_WDISP30, - RELOC_WDISP22, /* SR word disp's */ - RELOC_HI22, - RELOC_22, /* SR 22-bit relocs */ - RELOC_13, - RELOC_LO10, /* SR 13&10-bit relocs */ - RELOC_SFA_BASE, - RELOC_SFA_OFF13, /* SR S.F.A. relocs */ - RELOC_BASE10, - RELOC_BASE13, - RELOC_BASE22, /* base_relative pic */ - RELOC_PC10, - RELOC_PC22, /* special pc-rel pic */ - RELOC_JMP_TBL, /* jmp_tbl_rel in pic */ - RELOC_SEGOFF16, /* ShLib offset-in-seg */ - RELOC_GLOB_DAT, - RELOC_JMP_SLOT, - RELOC_RELATIVE /* rtld relocs */ -}; - -/* - * Format of a relocation datum. - */ -struct relocation_info /* used when header.a_machtype == M_SPARC */ -{ - unsigned int r_address; /* relocation addr */ - unsigned int r_index:24; /* segment index or symbol index */ - unsigned int r_extern:1; /* if F, r_index==SEG#; if T, SYM idx */ - int r_pad:2; /* <unused> */ - enum reloc_type r_type:5; /* type of relocation to perform */ - int r_addend; /* addend for relocation value */ -}; - -#define N_RELOCATION_INFO_DECLARED 1 - -#ifdef __KERNEL__ - -#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) -#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) - -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ - STACK_TOP32 : STACK_TOP64) - -#endif - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_A_OUT_H__) */ diff --git a/qemu/roms/openbios/include/arch/sparc64/asi.h b/qemu/roms/openbios/include/arch/sparc64/asi.h deleted file mode 100644 index 534855660..000000000 --- a/qemu/roms/openbios/include/arch/sparc64/asi.h +++ /dev/null @@ -1,145 +0,0 @@ -/* $Id: asi.h,v 1.5 2001/03/29 11:47:47 davem Exp $ */ -#ifndef _SPARC64_ASI_H -#define _SPARC64_ASI_H - -/* asi.h: Address Space Identifier values for the V9. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -/* V9 Architecture mandary ASIs. */ -#define ASI_N 0x04 /* Nucleus */ -#define ASI_NL 0x0c /* Nucleus, little endian */ -#define ASI_AIUP 0x10 /* Primary, user */ -#define ASI_AIUS 0x11 /* Secondary, user */ -#define ASI_AIUPL 0x18 /* Primary, user, little endian */ -#define ASI_AIUSL 0x19 /* Secondary, user, little endian */ -#define ASI_P 0x80 /* Primary, implicit */ -#define ASI_S 0x81 /* Secondary, implicit */ -#define ASI_PNF 0x82 /* Primary, no fault */ -#define ASI_SNF 0x83 /* Secondary, no fault */ -#define ASI_PL 0x88 /* Primary, implicit, l-endian */ -#define ASI_SL 0x89 /* Secondary, implicit, l-endian */ -#define ASI_PNFL 0x8a /* Primary, no fault, l-endian */ -#define ASI_SNFL 0x8b /* Secondary, no fault, l-endian */ - -/* SpitFire and later extended ASIs. The "(III)" marker designates - * UltraSparc-III and later specific ASIs. The "(CMT)" marker designates - * Chip Multi Threading specific ASIs. - */ -#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ -#define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ -#define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cachable, little endian*/ -#define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-bit, little endian */ -#define ASI_NUCLEUS_QUAD_LDD 0x24 /* Cachable, qword load */ -#define ASI_NUCLEUS_QUAD_LDD_L 0x2c /* Cachable, qword load, l-endian */ -#define ASI_PCACHE_DATA_STATUS 0x30 /* (III) PCache data stat RAM diag */ -#define ASI_PCACHE_DATA 0x31 /* (III) PCache data RAM diag */ -#define ASI_PCACHE_TAG 0x32 /* (III) PCache tag RAM diag */ -#define ASI_PCACHE_SNOOP_TAG 0x33 /* (III) PCache snoop tag RAM diag */ -#define ASI_QUAD_LDD_PHYS 0x34 /* (III+) PADDR, qword load */ -#define ASI_WCACHE_VALID_BITS 0x38 /* (III) WCache Valid Bits diag */ -#define ASI_WCACHE_DATA 0x39 /* (III) WCache data RAM diag */ -#define ASI_WCACHE_TAG 0x3a /* (III) WCache tag RAM diag */ -#define ASI_WCACHE_SNOOP_TAG 0x3b /* (III) WCache snoop tag RAM diag */ -#define ASI_QUAD_LDD_PHYS_L 0x3c /* (III+) PADDR, qw-load, l-endian */ -#define ASI_SRAM_FAST_INIT 0x40 /* (III+) Fast SRAM init */ -#define ASI_CORE_AVAILABLE 0x41 /* (CMT) LP Available */ -#define ASI_CORE_ENABLE_STAT 0x41 /* (CMT) LP Enable Status */ -#define ASI_CORE_ENABLE 0x41 /* (CMT) LP Enable RW */ -#define ASI_XIR_STEERING 0x41 /* (CMT) XIR Steering RW */ -#define ASI_CORE_RUNNING_RW 0x41 /* (CMT) LP Running RW */ -#define ASI_CORE_RUNNING_W1S 0x41 /* (CMT) LP Running Write-One Set */ -#define ASI_CORE_RUNNING_W1C 0x41 /* (CMT) LP Running Write-One Clr */ -#define ASI_CORE_RUNNING_STAT 0x41 /* (CMT) LP Running Status */ -#define ASI_CMT_ERROR_STEERING 0x41 /* (CMT) Error Steering RW */ -#define ASI_DCACHE_INVALIDATE 0x42 /* (III) DCache Invalidate diag */ -#define ASI_DCACHE_UTAG 0x43 /* (III) DCache uTag diag */ -#define ASI_DCACHE_SNOOP_TAG 0x44 /* (III) DCache snoop tag RAM diag */ -#define ASI_LSU_CONTROL 0x45 /* Load-store control unit */ -#define ASI_DCU_CONTROL_REG 0x45 /* (III) DCache Unit Control reg */ -#define ASI_DCACHE_DATA 0x46 /* DCache data-ram diag access */ -#define ASI_DCACHE_TAG 0x47 /* Dcache tag/valid ram diag access*/ -#define ASI_INTR_DISPATCH_STAT 0x48 /* IRQ vector dispatch status */ -#define ASI_INTR_RECEIVE 0x49 /* IRQ vector receive status */ -#define ASI_UPA_CONFIG 0x4a /* UPA config space */ -#define ASI_JBUS_CONFIG 0x4a /* (IIIi) JBUS Config Register */ -#define ASI_SAFARI_CONFIG 0x4a /* (III) Safari Config Register */ -#define ASI_SAFARI_ADDRESS 0x4a /* (III) Safari Address Register */ -#define ASI_ESTATE_ERROR_EN 0x4b /* E-cache error enable space */ -#define ASI_AFSR 0x4c /* Async fault status register */ -#define ASI_AFAR 0x4d /* Async fault address register */ -#define ASI_EC_TAG_DATA 0x4e /* E-cache tag/valid ram diag acc */ -#define ASI_IMMU 0x50 /* Insn-MMU main register space */ -#define ASI_IMMU_TSB_8KB_PTR 0x51 /* Insn-MMU 8KB TSB pointer reg */ -#define ASI_IMMU_TSB_64KB_PTR 0x52 /* Insn-MMU 64KB TSB pointer reg */ -#define ASI_ITLB_DATA_IN 0x54 /* Insn-MMU TLB data in reg */ -#define ASI_ITLB_DATA_ACCESS 0x55 /* Insn-MMU TLB data access reg */ -#define ASI_ITLB_TAG_READ 0x56 /* Insn-MMU TLB tag read reg */ -#define ASI_IMMU_DEMAP 0x57 /* Insn-MMU TLB demap */ -#define ASI_DMMU 0x58 /* Data-MMU main register space */ -#define ASI_DMMU_TSB_8KB_PTR 0x59 /* Data-MMU 8KB TSB pointer reg */ -#define ASI_DMMU_TSB_64KB_PTR 0x5a /* Data-MMU 16KB TSB pointer reg */ -#define ASI_DMMU_TSB_DIRECT_PTR 0x5b /* Data-MMU TSB direct pointer reg */ -#define ASI_DTLB_DATA_IN 0x5c /* Data-MMU TLB data in reg */ -#define ASI_DTLB_DATA_ACCESS 0x5d /* Data-MMU TLB data access reg */ -#define ASI_DTLB_TAG_READ 0x5e /* Data-MMU TLB tag read reg */ -#define ASI_DMMU_DEMAP 0x5f /* Data-MMU TLB demap */ -#define ASI_IIU_INST_TRAP 0x60 /* (III) Instruction Breakpoint */ -#define ASI_INTR_ID 0x63 /* (CMT) Interrupt ID register */ -#define ASI_CORE_ID 0x63 /* (CMT) LP ID register */ -#define ASI_CESR_ID 0x63 /* (CMT) CESR ID register */ -#define ASI_IC_INSTR 0x66 /* Insn cache instrucion ram diag */ -#define ASI_IC_TAG 0x67 /* Insn cache tag/valid ram diag */ -#define ASI_IC_STAG 0x68 /* (III) Insn cache snoop tag ram */ -#define ASI_IC_PRE_DECODE 0x6e /* Insn cache pre-decode ram diag */ -#define ASI_IC_NEXT_FIELD 0x6f /* Insn cache next-field ram diag */ -#define ASI_BRPRED_ARRAY 0x6f /* (III) Branch Prediction RAM diag*/ -#define ASI_BLK_AIUP 0x70 /* Primary, user, block load/store */ -#define ASI_BLK_AIUS 0x71 /* Secondary, user, block ld/st */ -#define ASI_MCU_CTRL_REG 0x72 /* (III) Memory controller regs */ -#define ASI_EC_DATA 0x74 /* (III) E-cache data staging reg */ -#define ASI_EC_CTRL 0x75 /* (III) E-cache control reg */ -#define ASI_EC_W 0x76 /* E-cache diag write access */ -#define ASI_UDB_ERROR_W 0x77 /* External UDB error regs W */ -#define ASI_UDB_CONTROL_W 0x77 /* External UDB control regs W */ -#define ASI_INTR_W 0x77 /* IRQ vector dispatch write */ -#define ASI_INTR_DATAN_W 0x77 /* (III) Out irq vector data reg N */ -#define ASI_INTR_DISPATCH_W 0x77 /* (III) Interrupt vector dispatch */ -#define ASI_BLK_AIUPL 0x78 /* Primary, user, little, blk ld/st*/ -#define ASI_BLK_AIUSL 0x79 /* Secondary, user, little, blk ld/st*/ -#define ASI_EC_R 0x7e /* E-cache diag read access */ -#define ASI_UDBH_ERROR_R 0x7f /* External UDB error regs rd hi */ -#define ASI_UDBL_ERROR_R 0x7f /* External UDB error regs rd low */ -#define ASI_UDBH_CONTROL_R 0x7f /* External UDB control regs rd hi */ -#define ASI_UDBL_CONTROL_R 0x7f /* External UDB control regs rd low*/ -#define ASI_INTR_R 0x7f /* IRQ vector dispatch read */ -#define ASI_INTR_DATAN_R 0x7f /* (III) In irq vector data reg N */ -#define ASI_PST8_P 0xc0 /* Primary, 8 8-bit, partial */ -#define ASI_PST8_S 0xc1 /* Secondary, 8 8-bit, partial */ -#define ASI_PST16_P 0xc2 /* Primary, 4 16-bit, partial */ -#define ASI_PST16_S 0xc3 /* Secondary, 4 16-bit, partial */ -#define ASI_PST32_P 0xc4 /* Primary, 2 32-bit, partial */ -#define ASI_PST32_S 0xc5 /* Secondary, 2 32-bit, partial */ -#define ASI_PST8_PL 0xc8 /* Primary, 8 8-bit, partial, L */ -#define ASI_PST8_SL 0xc9 /* Secondary, 8 8-bit, partial, L */ -#define ASI_PST16_PL 0xca /* Primary, 4 16-bit, partial, L */ -#define ASI_PST16_SL 0xcb /* Secondary, 4 16-bit, partial, L */ -#define ASI_PST32_PL 0xcc /* Primary, 2 32-bit, partial, L */ -#define ASI_PST32_SL 0xcd /* Secondary, 2 32-bit, partial, L */ -#define ASI_FL8_P 0xd0 /* Primary, 1 8-bit, fpu ld/st */ -#define ASI_FL8_S 0xd1 /* Secondary, 1 8-bit, fpu ld/st */ -#define ASI_FL16_P 0xd2 /* Primary, 1 16-bit, fpu ld/st */ -#define ASI_FL16_S 0xd3 /* Secondary, 1 16-bit, fpu ld/st */ -#define ASI_FL8_PL 0xd8 /* Primary, 1 8-bit, fpu ld/st, L */ -#define ASI_FL8_SL 0xd9 /* Secondary, 1 8-bit, fpu ld/st, L*/ -#define ASI_FL16_PL 0xda /* Primary, 1 16-bit, fpu ld/st, L */ -#define ASI_FL16_SL 0xdb /* Secondary, 1 16-bit, fpu ld/st,L*/ -#define ASI_BLK_COMMIT_P 0xe0 /* Primary, blk store commit */ -#define ASI_BLK_COMMIT_S 0xe1 /* Secondary, blk store commit */ -#define ASI_BLK_P 0xf0 /* Primary, blk ld/st */ -#define ASI_BLK_S 0xf1 /* Secondary, blk ld/st */ -#define ASI_BLK_PL 0xf8 /* Primary, blk ld/st, little */ -#define ASI_BLK_SL 0xf9 /* Secondary, blk ld/st, little */ - -#endif /* _SPARC64_ASI_H */ diff --git a/qemu/roms/openbios/include/arch/sparc64/elf.h b/qemu/roms/openbios/include/arch/sparc64/elf.h deleted file mode 100644 index 8acad1a47..000000000 --- a/qemu/roms/openbios/include/arch/sparc64/elf.h +++ /dev/null @@ -1,5 +0,0 @@ -#define ARCH_ELF_CLASS ELFCLASS64 -#define ARCH_ELF_DATA ELFDATA2MSB -#define ARCH_ELF_MACHINE_OK(x) ((x)==EM_SPARCV9) -typedef Elf64_Ehdr Elf_ehdr; -typedef Elf64_Phdr Elf_phdr; diff --git a/qemu/roms/openbios/include/arch/sparc64/io.h b/qemu/roms/openbios/include/arch/sparc64/io.h deleted file mode 100644 index 0f1a73284..000000000 --- a/qemu/roms/openbios/include/arch/sparc64/io.h +++ /dev/null @@ -1,209 +0,0 @@ -#ifndef _ASM_IO_H -#define _ASM_IO_H - -#include "asm/types.h" -#include "asi.h" - -#define NO_QEMU_PROTOS -#include "arch/common/fw_cfg.h" - -extern unsigned long va_shift; // Set in entry.S -// Defined in ldscript -extern char _start, _data, _stack, _estack, _fcstack, _efcstack, _end, _iomem; - -// XXX check use and merge -#define phys_to_virt(phys) ((void *) ((unsigned long) (phys))) -#define virt_to_phys(virt) ((unsigned long) (virt)) - -#ifndef BOOTSTRAP - -extern unsigned long isa_io_base; - -/* - * The insw/outsw/insl/outsl macros don't do byte-swapping. - * They are only used in practice for transferring buffers which - * are arrays of bytes, and byte-swapping is not appropriate in - * that case. - paulus - */ -#define insw(port, buf, ns) _insw_ns((uint16_t *)((port)+isa_io_base), (buf), (ns)) -#define outsw(port, buf, ns) _outsw_ns((uint16_t *)((port)+isa_io_base), (buf), (ns)) - -#define inb(port) in_8((uint8_t *)((port)+isa_io_base)) -#define outb(val, port) out_8((uint8_t *)((port)+isa_io_base), (val)) -#define inw(port) in_be16((uint16_t *)((port)+isa_io_base)) -#define outw(val, port) out_be16((uint16_t *)((port)+isa_io_base), (val)) -#define inl(port) in_be32((uint32_t *)((port)+isa_io_base)) -#define outl(val, port) out_be32((uint32_t *)((port)+isa_io_base), (val)) - -/* - * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. - * On Sparc64, BE versions must swap bytes using LE access ASI. - */ -static inline int in_8(volatile unsigned char *addr) -{ - int ret; - - __asm__ __volatile__("lduba [%1] %2, %0\n\t" - : "=r"(ret) - : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline void out_8(volatile unsigned char *addr, int val) -{ - __asm__ __volatile__("stba %0, [%1] %2\n\t" - : - : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline int in_le16(volatile unsigned short *addr) -{ - int ret; - - __asm__ __volatile__("lduha [%1] %2, %0\n\t" - : "=r"(ret) - : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline int in_be16(volatile unsigned short *addr) -{ - int ret; - - __asm__ __volatile__("lduha [%1] %2, %0\n\t" - : "=r"(ret) - : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline void out_le16(volatile unsigned short *addr, int val) -{ - - __asm__ __volatile__("stha %0, [%1] %2\n\t" - : - : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void out_be16(volatile unsigned short *addr, int val) -{ - __asm__ __volatile__("stha %0, [%1] %2\n\t" - : - : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline unsigned in_le32(volatile unsigned *addr) -{ - unsigned ret; - - __asm__ __volatile__("lduwa [%1] %2, %0\n\t" - : "=r"(ret) - : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline unsigned in_be32(volatile unsigned *addr) -{ - unsigned ret; - - __asm__ __volatile__("lduwa [%1] %2, %0\n\t" - : "=r"(ret) - : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - return ret; -} - -static inline void out_le32(volatile unsigned *addr, int val) -{ - __asm__ __volatile__("stwa %0, [%1] %2\n\t" - : - : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void out_be32(volatile unsigned *addr, int val) -{ - __asm__ __volatile__("stwa %0, [%1] %2\n\t" - : - : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _insw_ns(volatile uint16_t * port, void *buf, int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - *b++ = in_le16(port); - ns--; - } -} - -static inline void _outsw_ns(volatile uint16_t * port, const void *buf, - int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - out_le16(port, *b++); - ns--; - } -} - -static inline void _insw(volatile uint16_t * port, void *buf, int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - *b++ = in_be16(port); - ns--; - } -} - -static inline void _outsw(volatile uint16_t * port, const void *buf, - int ns) -{ - uint16_t *b = (uint16_t *) buf; - - while (ns > 0) { - out_be16(port, *b++); - ns--; - } -} -#else /* BOOTSTRAP */ -#ifdef FCOMPILER -#define inb(reg) ((u8)0xff) -#define inw(reg) ((u16)0xffff) -#define inl(reg) ((u32)0xffffffff) -#define outb(reg, val) do{} while(0) -#define outw(reg, val) do{} while(0) -#define outl(reg, val) do{} while(0) -#else -extern u8 inb(u32 reg); -extern u16 inw(u32 reg); -extern u32 inl(u32 reg); -extern void insw(u32 reg, void *addr, unsigned long count); -extern void outb(u32 reg, u8 val); -extern void outw(u32 reg, u16 val); -extern void outl(u32 reg, u32 val); -extern void outsw(u32 reg, const void *addr, unsigned long count); -#endif -#endif - -#if defined(CONFIG_QEMU) -#define FW_CFG_ARCH_WIDTH (FW_CFG_ARCH_LOCAL + 0x00) -#define FW_CFG_ARCH_HEIGHT (FW_CFG_ARCH_LOCAL + 0x01) -#define FW_CFG_ARCH_DEPTH (FW_CFG_ARCH_LOCAL + 0x02) -#endif - -#endif /* _ASM_IO_H */ diff --git a/qemu/roms/openbios/include/arch/sparc64/ofmem_sparc64.h b/qemu/roms/openbios/include/arch/sparc64/ofmem_sparc64.h deleted file mode 100644 index 7ff24ae3d..000000000 --- a/qemu/roms/openbios/include/arch/sparc64/ofmem_sparc64.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * <ofmem_sparc64.h> - * - * OF Memory manager - * - * Copyright (C) 1999, 2002 Samuel Rydh (samuel@ibrium.se) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation - * - */ - -#ifndef _H_OFMEM_SPARC64 -#define _H_OFMEM_SPARC64 - -#include "libopenbios/ofmem.h" - -#define PAGE_SIZE_4M (4 * 1024 * 1024) -#define PAGE_SIZE_512K (512 * 1024) -#define PAGE_SIZE_64K (64 * 1024) -#define PAGE_SIZE_8K (8 * 1024) -#define PAGE_MASK_4M (4 * 1024 * 1024 - 1) -#define PAGE_MASK_512K (512 * 1024 - 1) -#define PAGE_MASK_64K (64 * 1024 - 1) -#define PAGE_MASK_8K (8 * 1024 - 1) - -extern ucell *va2ttedata; -extern unsigned long find_tte(unsigned long va); - -void itlb_load2(unsigned long vaddr, unsigned long tte_data); -void itlb_load3(unsigned long vaddr, unsigned long tte_data, unsigned long tte_index); -unsigned long itlb_faultva(void); -void itlb_demap(unsigned long vaddr); -void dtlb_load2(unsigned long vaddr, unsigned long tte_data); -void dtlb_load3(unsigned long vaddr, unsigned long tte_data, unsigned long tte_index); -unsigned long dtlb_faultva(void); -void dtlb_demap(unsigned long vaddr); - -typedef int (*translation_entry_cb)(ucell phys, ucell virt, ucell size, ucell mode); - -extern void ofmem_walk_boot_map(translation_entry_cb cb); - -extern translation_t **g_ofmem_translations; - -extern void dtlb_miss_handler(void); -extern void itlb_miss_handler(void); -extern void bug(void); - -#endif /* _H_OFMEM_SPARC64 */ diff --git a/qemu/roms/openbios/include/arch/sparc64/pci.h b/qemu/roms/openbios/include/arch/sparc64/pci.h deleted file mode 100644 index c7509afe5..000000000 --- a/qemu/roms/openbios/include/arch/sparc64/pci.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef SPARC64_PCI_H -#define SPARC64_PCI_H - -#include "asm/io.h" - -#if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2)) -#define PCI_CONFIG_1 1 /* default */ -#endif - -#ifdef PCI_CONFIG_1 - -/* PCI Configuration Mechanism #1 */ - -#define PCI_ADDR(bus, dev, fn) \ - (((pci_addr) (uint32_t) (bus) << 16 \ - | (uint32_t) (dev) << 11 \ - | (uint32_t) (fn) << 8)) - -#define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16) & 0xff) -#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f) -#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7) - -#define PCI_CONFIG(dev) (arch->cfg_addr \ - + (unsigned long)PCI_ADDR(PCI_BUS(dev), \ - PCI_DEV(dev), \ - PCI_FN(dev))) - -static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg) -{ - uint8_t res; - res = in_8((unsigned char*)(PCI_CONFIG(dev) + reg)); - return res; -} - -static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg) -{ - uint16_t res; - res = in_be16((uint16_t *)(PCI_CONFIG(dev) + reg)); - return res; -} - -static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg) -{ - uint32_t res; - res = in_be32((uint32_t *)(PCI_CONFIG(dev) + reg)); - return res; -} - -static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val) -{ - out_8((unsigned char*)(PCI_CONFIG(dev) + reg), val); -} - -static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val) -{ - out_be16((uint16_t *)(PCI_CONFIG(dev) + reg), val); -} - -static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val) -{ - out_be32((uint32_t *)(PCI_CONFIG(dev) + reg), val); -} -#else /* !PCI_CONFIG_1 */ -#error PCI Configuration Mechanism is not specified or implemented -#endif - -#endif /* SPARC64_PCI_H */ diff --git a/qemu/roms/openbios/include/arch/sparc64/types.h b/qemu/roms/openbios/include/arch/sparc64/types.h deleted file mode 100644 index a26fccb2c..000000000 --- a/qemu/roms/openbios/include/arch/sparc64/types.h +++ /dev/null @@ -1,102 +0,0 @@ -/* tag: data types for forth engine - * - * Copyright (C) 2003-2005 Patrick Mauritz, Stefan Reinauer - * - * See the file "COPYING" for further information about - * the copyright and warranty status of this work. - */ - -#ifndef __TYPES_H -#define __TYPES_H - -#include "mconfig.h" - -#ifdef BOOTSTRAP -#include <inttypes.h> -#else -typedef unsigned char uint8_t; -typedef unsigned short uint16_t; -typedef unsigned int uint32_t; -typedef unsigned long long uint64_t; -typedef unsigned long uintptr_t; - -typedef signed char int8_t; -typedef short int16_t; -typedef int int32_t; -typedef long long int64_t; -typedef long intptr_t; - -#define PRId32 "d" -#define PRIu32 "u" -#define PRIx32 "x" -#define PRIX32 "X" -#define PRId64 "lld" -#define PRIu64 "llu" -#define PRIx64 "llx" -#define PRIX64 "llX" -#endif - -/* endianess */ -#include "autoconf.h" - -/* physical address */ -typedef uint64_t phys_addr_t; - -#define FMT_plx "%016" PRIx64 - -/* cell based types */ -typedef int64_t cell; -typedef uint64_t ucell; - -#define FMT_cell "%" PRId64 -#define FMT_ucell "%" PRIu64 -#define FMT_ucellx "%016" PRIx64 -#define FMT_ucellX "%016" PRIX64 - -typedef int64_t prom_arg_t; -typedef uint64_t prom_uarg_t; - -#define PRIdPROMARG PRId64 -#define PRIuPROMARG PRIu64 -#define PRIxPROMARG PRIx64 -#define FMT_prom_arg "%" PRIdPROMARG -#define FMT_prom_uarg "%" PRIuPROMARG -#define FMT_prom_uargx "%016" PRIxPROMARG - -#define FMT_elf "%#llx" -#define FMT_sizet "%lx" -#define FMT_aout_ehdr "%x" - -#ifdef NEED_FAKE_INT128_T -typedef struct { - uint64_t hi; - uint64_t lo; -} blob_128_t; - -typedef blob_128_t dcell; -typedef blob_128_t ducell; -#else -typedef __int128_t dcell; -typedef __uint128_t ducell; -#endif - -#define bitspercell (sizeof(cell)<<3) -#define bitsperdcell (sizeof(dcell)<<3) - -#define BITS 64 - -#define PAGE_SHIFT 13 - -/* size named types */ - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned int u32; -typedef unsigned long long u64; - -typedef signed char s8; -typedef short s16; -typedef int s32; -typedef long long s64; - -#endif diff --git a/qemu/roms/openbios/include/arch/unix/plugin_pci.h b/qemu/roms/openbios/include/arch/unix/plugin_pci.h deleted file mode 100644 index 513db6337..000000000 --- a/qemu/roms/openbios/include/arch/unix/plugin_pci.h +++ /dev/null @@ -1,25 +0,0 @@ -/* tag: openbios pci plugin headers - * - * Copyright (C) 2003 Stefan Reinauer - * - * See the file "COPYING" for further information about - * the copyright and warranty status of this work. - */ - -#ifndef __PLUGINS_PCI_H -#define __PLUGINS_PCI_H - -typedef struct pci_dev pci_dev_t; - -struct pci_dev { - unsigned bus; - unsigned dev; - unsigned fn; - - u8 *config; - pci_dev_t *next; -}; - -int pci_register_device(unsigned bus, unsigned dev, unsigned fn, u8 *config); - -#endif diff --git a/qemu/roms/openbios/include/arch/unix/plugins.h b/qemu/roms/openbios/include/arch/unix/plugins.h deleted file mode 100644 index 305b3da9b..000000000 --- a/qemu/roms/openbios/include/arch/unix/plugins.h +++ /dev/null @@ -1,31 +0,0 @@ - -#ifndef __PLUGINS_H -#define __PLUGINS_H - -#include "asm/types.h" - -struct io_ops { - u8 (*inb)(u32 reg); - u16 (*inw)(u32 reg); - u32 (*inl)(u32 reg); - void (*outb)(u32 reg, u8 val); - void (*outw)(u32 reg, u16 val); - void (*outl)(u32 reg, u32 val); -}; -typedef struct io_ops io_ops_t; - -extern unsigned char *plugindir; - -#define PLUGIN_DEPENDENCIES(x...) const char *plugin_deps[]={ x, NULL }; -#define PLUGIN_AUTHOR(author) const char *plugin_author=author; -#define PLUGIN_LICENSE(license) const char *plugin_license=license; -#define PLUGIN_DESCRIPTION(desc) const char *plugin_description=desc; - -int register_iorange(const char *name, io_ops_t *ops, - unsigned int rstart, unsigned int rend); -io_ops_t *find_iorange(u32 reg); - -int load_plugin(const char *plugin_name); -int is_loaded(const char *plugin_name); - -#endif diff --git a/qemu/roms/openbios/include/arch/x86/elf.h b/qemu/roms/openbios/include/arch/x86/elf.h deleted file mode 100644 index 86c672508..000000000 --- a/qemu/roms/openbios/include/arch/x86/elf.h +++ /dev/null @@ -1,5 +0,0 @@ -#define ARCH_ELF_CLASS ELFCLASS32 -#define ARCH_ELF_DATA ELFDATA2LSB -#define ARCH_ELF_MACHINE_OK(x) ((x)==EM_386 || (x)==EM_486) -typedef Elf32_Ehdr Elf_ehdr; -typedef Elf32_Phdr Elf_phdr; diff --git a/qemu/roms/openbios/include/arch/x86/io.h b/qemu/roms/openbios/include/arch/x86/io.h deleted file mode 100644 index 76fa4f23a..000000000 --- a/qemu/roms/openbios/include/arch/x86/io.h +++ /dev/null @@ -1,74 +0,0 @@ -#ifndef _ASM_IO_H -#define _ASM_IO_H - -#include "asm/types.h" - -extern char _start, _end; -extern unsigned long virt_offset; - -#define phys_to_virt(phys) ((void *) ((unsigned long) (phys) - virt_offset)) -#define virt_to_phys(virt) ((unsigned long) (virt) + virt_offset) - -#ifndef BOOTSTRAP -#define __SLOW_DOWN_IO "outb %%al,$0x80;" -static inline void slow_down_io(void) -{ - __asm__ __volatile__( - __SLOW_DOWN_IO -#ifdef REALLY_SLOW_IO - __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO -#endif - : : ); -} - -#define BUILDIO(bwl,bw,type) \ -static inline void out##bwl(unsigned type value, int port) { \ - __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \ -} \ -static inline unsigned type in##bwl(int port) { \ - unsigned type value; \ - __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \ - return value; \ -} \ -static inline void out##bwl##_p(unsigned type value, int port) { \ - out##bwl(value, port); \ - slow_down_io(); \ -} \ -static inline unsigned type in##bwl##_p(int port) { \ - unsigned type value = in##bwl(port); \ - slow_down_io(); \ - return value; \ -} \ -static inline void outs##bwl(int port, const void *addr, unsigned long count) { \ - __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \ -} \ -static inline void ins##bwl(int port, void *addr, unsigned long count) { \ - __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \ -} - -#ifndef BOOTSTRAP -BUILDIO(b,b,char) -BUILDIO(w,w,short) -BUILDIO(l,,int) -#endif - -#else /* BOOTSTRAP */ -#ifdef FCOMPILER -#define inb(reg) ((u8)0xff) -#define inw(reg) ((u16)0xffff) -#define inl(reg) ((u32)0xffffffff) -#define outb(reg, val) do{} while(0) -#define outw(reg, val) do{} while(0) -#define outl(reg, val) do{} while(0) -#else -extern u8 inb(u32 reg); -extern u16 inw(u32 reg); -extern u32 inl(u32 reg); -extern void insw(u32 reg, void *addr, unsigned long count); -extern void outb(u32 reg, u8 val); -extern void outw(u32 reg, u16 val); -extern void outl(u32 reg, u32 val); -extern void outsw(u32 reg, const void *addr, unsigned long count); -#endif -#endif -#endif diff --git a/qemu/roms/openbios/include/arch/x86/pci.h b/qemu/roms/openbios/include/arch/x86/pci.h deleted file mode 100644 index 49247d97c..000000000 --- a/qemu/roms/openbios/include/arch/x86/pci.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef i386_PCI_H -#define i386_PCI_H - -#include "asm/io.h" - -#if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2)) -#define PCI_CONFIG_1 1 /* default */ -#endif - -#ifdef PCI_CONFIG_1 - -/* PCI Configuration Mechanism #1 */ - -/* Have pci_addr in the same format as the values written to 0xcf8 - * so register accesses can be made easy. */ -#define PCI_ADDR(bus, dev, fn) \ - ((pci_addr) (0x80000000u \ - | (uint32_t) (bus) << 16 \ - | (uint32_t) (dev) << 11 \ - | (uint32_t) (fn) << 8)) - -#define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16)) -#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f) -#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7) - -static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg) -{ - outl(dev | (reg & ~3), 0xcf8); - return inb(0xcfc | (reg & 3)); -} - -static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg) -{ - outl(dev | (reg & ~3), 0xcf8); - return inw(0xcfc | (reg & 2)); -} - -static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg) -{ - outl(dev | reg, 0xcf8); - return inl(0xcfc | reg); -} - -static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val) -{ - outl(dev | (reg & ~3), 0xcf8); - outb(val, 0xcfc | (reg & 3)); -} - -static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val) -{ - outl(dev | (reg & ~3), 0xcf8); - outw(val, 0xcfc | (reg & 2)); -} - -static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val) -{ - outl(dev | reg, 0xcf8); - outl(val, 0xcfc); -} - -#else /* !PCI_CONFIG_1 */ -#error PCI Configuration Mechanism is not specified or implemented -#endif - -#endif /* i386_PCI_H */ diff --git a/qemu/roms/openbios/include/arch/x86/types.h b/qemu/roms/openbios/include/arch/x86/types.h deleted file mode 100644 index d7261f2a9..000000000 --- a/qemu/roms/openbios/include/arch/x86/types.h +++ /dev/null @@ -1,69 +0,0 @@ -/* tag: data types for forth engine - * - * This file is autogenerated by types.sh. Do not edit! - * - * Copyright (C) 2003-2005 Stefan Reinauer, Patrick Mauritz - * - * See the file "COPYING" for further information about - * the copyright and warranty status of this work. - */ - -#ifndef __TYPES_H -#define __TYPES_H - -#include <inttypes.h> - -/* endianess */ - -#include "autoconf.h" - -/* physical address: XXX theoretically 36 bits for PAE */ - -typedef uint32_t phys_addr_t; - -#define FMT_plx "%08" PRIx32 - -/* cell based types */ - -typedef int32_t cell; -typedef uint32_t ucell; -typedef int64_t dcell; -typedef uint64_t ducell; - -#define FMT_cell "%" PRId32 -#define FMT_ucell "%" PRIu32 -#define FMT_ucellx "%08" PRIx32 -#define FMT_ucellX "%08" PRIX32 - -typedef int32_t prom_arg_t; -typedef uint32_t prom_uarg_t; - -#define PRIdPROMARG PRId32 -#define PRIuPROMARG PRIu32 -#define PRIxPROMARG PRIx32 -#define FMT_prom_arg "%" PRIdPROMARG -#define FMT_prom_uarg "%" PRIuPROMARG -#define FMT_prom_uargx "%08" PRIxPROMARG - -#define FMT_elf "%#x" - -#define bitspercell (sizeof(cell)<<3) -#define bitsperdcell (sizeof(dcell)<<3) - -#define BITS 32 - -#define PAGE_SHIFT 12 - -/* size named types */ - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned int u32; -typedef unsigned long long u64; - -typedef char s8; -typedef short s16; -typedef int s32; -typedef long long s64; - -#endif |