diff options
| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/ipxe/src/include | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/ipxe/src/include')
395 files changed, 82588 insertions, 0 deletions
diff --git a/qemu/roms/ipxe/src/include/.gitignore b/qemu/roms/ipxe/src/include/.gitignore new file mode 100644 index 000000000..de1598ef3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/.gitignore @@ -0,0 +1 @@ +.buildserial.h diff --git a/qemu/roms/ipxe/src/include/alloca.h b/qemu/roms/ipxe/src/include/alloca.h new file mode 100644 index 000000000..08398fb3b --- /dev/null +++ b/qemu/roms/ipxe/src/include/alloca.h @@ -0,0 +1,25 @@ +#ifndef _ALLOCA_H +#define _ALLOCA_H + +/** + * @file + * + * Temporary memory allocation + * + */ + +#include <stdint.h> + +/** + * Allocate temporary memory from the stack + * + * @v size Size to allocate + * @ret ptr Allocated memory + * + * This memory will be freed automatically when the containing + * function returns. There are several caveats regarding use of + * alloca(); use it only if you already know what they are. + */ +#define alloca(size) __builtin_alloca ( size ) + +#endif /* _ALLOCA_H */ diff --git a/qemu/roms/ipxe/src/include/assert.h b/qemu/roms/ipxe/src/include/assert.h new file mode 100644 index 000000000..a33f6017c --- /dev/null +++ b/qemu/roms/ipxe/src/include/assert.h @@ -0,0 +1,72 @@ +#ifndef _ASSERT_H +#define _ASSERT_H + +/** @file + * + * Assertions + * + * This file provides two assertion macros: assert() (for run-time + * assertions) and linker_assert() (for link-time assertions). + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef NDEBUG +#define ASSERTING 0 +#else +#define ASSERTING 1 +#endif + +extern unsigned int assertion_failures; + +#define ASSERTED ( ASSERTING && ( assertion_failures != 0 ) ) + +/** printf() for assertions + * + * This function exists so that the assert() macro can expand to + * printf() calls without dragging the printf() prototype into scope. + * + * As far as the compiler is concerned, assert_printf() and printf() are + * completely unrelated calls; it's only at the assembly stage that + * references to the assert_printf symbol are collapsed into references + * to the printf symbol. + */ +extern int __attribute__ (( format ( printf, 1, 2 ) )) +assert_printf ( const char *fmt, ... ) asm ( "printf" ); + +/** + * Assert a condition at run-time. + * + * If the condition is not true, a debug message will be printed. + * Assertions only take effect in debug-enabled builds (see DBG()). + * + * @todo Make an assertion failure abort the program + * + */ +#define assert( condition ) \ + do { \ + if ( ASSERTING && ! (condition) ) { \ + assertion_failures++; \ + assert_printf ( "assert(%s) failed at %s line %d\n", \ + #condition, __FILE__, __LINE__ ); \ + } \ + } while ( 0 ) + +/** + * Assert a condition at link-time. + * + * If the condition is not true, the link will fail with an unresolved + * symbol (error_symbol). + * + * This macro is iPXE-specific. Do not use this macro in code + * intended to be portable. + * + */ +#define linker_assert( condition, error_symbol ) \ + if ( ! (condition) ) { \ + extern void error_symbol ( void ); \ + error_symbol(); \ + } + +#endif /* _ASSERT_H */ diff --git a/qemu/roms/ipxe/src/include/big_bswap.h b/qemu/roms/ipxe/src/include/big_bswap.h new file mode 100644 index 000000000..6c375a573 --- /dev/null +++ b/qemu/roms/ipxe/src/include/big_bswap.h @@ -0,0 +1,35 @@ +#ifndef ETHERBOOT_BIG_BSWAP_H +#define ETHERBOOT_BIG_BSWAP_H + +#define htonll(x) (x) +#define ntohll(x) (x) +#define ntohl(x) (x) +#define htonl(x) (x) +#define ntohs(x) (x) +#define htons(x) (x) +#define cpu_to_le64(x) __bswap_64(x) +#define cpu_to_le32(x) __bswap_32(x) +#define cpu_to_le16(x) __bswap_16(x) +#define cpu_to_be64(x) (x) +#define cpu_to_be32(x) (x) +#define cpu_to_be16(x) (x) +#define le64_to_cpu(x) __bswap_64(x) +#define le32_to_cpu(x) __bswap_32(x) +#define le16_to_cpu(x) __bswap_16(x) +#define be64_to_cpu(x) (x) +#define be32_to_cpu(x) (x) +#define be16_to_cpu(x) (x) +#define cpu_to_le64s(x) __bswap_64s(x) +#define cpu_to_le32s(x) __bswap_32s(x) +#define cpu_to_le16s(x) __bswap_16s(x) +#define cpu_to_be64s(x) do {} while (0) +#define cpu_to_be32s(x) do {} while (0) +#define cpu_to_be16s(x) do {} while (0) +#define le64_to_cpus(x) __bswap_64s(x) +#define le32_to_cpus(x) __bswap_32s(x) +#define le16_to_cpus(x) __bswap_16s(x) +#define be64_to_cpus(x) do {} while (0) +#define be32_to_cpus(x) do {} while (0) +#define be16_to_cpus(x) do {} while (0) + +#endif /* ETHERBOOT_BIG_BSWAP_H */ diff --git a/qemu/roms/ipxe/src/include/byteswap.h b/qemu/roms/ipxe/src/include/byteswap.h new file mode 100644 index 000000000..466759cf8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/byteswap.h @@ -0,0 +1,59 @@ +#ifndef ETHERBOOT_BYTESWAP_H +#define ETHERBOOT_BYTESWAP_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include "endian.h" +#include "bits/byteswap.h" + +#define __bswap_constant_16(x) \ + ((uint16_t)((((uint16_t)(x) & 0x00ff) << 8) | \ + (((uint16_t)(x) & 0xff00) >> 8))) + +#define __bswap_constant_32(x) \ + ((uint32_t)((((uint32_t)(x) & 0x000000ffU) << 24) | \ + (((uint32_t)(x) & 0x0000ff00U) << 8) | \ + (((uint32_t)(x) & 0x00ff0000U) >> 8) | \ + (((uint32_t)(x) & 0xff000000U) >> 24))) + +#define __bswap_constant_64(x) \ + ((uint64_t)((((uint64_t)(x) & 0x00000000000000ffULL) << 56) | \ + (((uint64_t)(x) & 0x000000000000ff00ULL) << 40) | \ + (((uint64_t)(x) & 0x0000000000ff0000ULL) << 24) | \ + (((uint64_t)(x) & 0x00000000ff000000ULL) << 8) | \ + (((uint64_t)(x) & 0x000000ff00000000ULL) >> 8) | \ + (((uint64_t)(x) & 0x0000ff0000000000ULL) >> 24) | \ + (((uint64_t)(x) & 0x00ff000000000000ULL) >> 40) | \ + (((uint64_t)(x) & 0xff00000000000000ULL) >> 56))) + +#define __bswap_16(x) \ + ((uint16_t)(__builtin_constant_p(x) ? \ + __bswap_constant_16(x) : \ + __bswap_variable_16(x))) + +#define __bswap_32(x) \ + ((uint32_t)(__builtin_constant_p(x) ? \ + __bswap_constant_32(x) : \ + __bswap_variable_32(x))) + +#define __bswap_64(x) \ + ((uint64_t)(__builtin_constant_p(x) ? \ + __bswap_constant_64(x) : \ + __bswap_variable_64(x))) + +#if __BYTE_ORDER == __LITTLE_ENDIAN +#include "little_bswap.h" +#endif +#if __BYTE_ORDER == __BIG_ENDIAN +#include "big_bswap.h" +#endif + +/* Make routines available to all */ +#define swap64(x) __bswap_64(x) +#define swap32(x) __bswap_32(x) +#define swap16(x) __bswap_16(x) +#define bswap_64(x) __bswap_64(x) +#define bswap_32(x) __bswap_32(x) +#define bswap_16(x) __bswap_16(x) + +#endif /* ETHERBOOT_BYTESWAP_H */ diff --git a/qemu/roms/ipxe/src/include/coff.h b/qemu/roms/ipxe/src/include/coff.h new file mode 100644 index 000000000..a73fda527 --- /dev/null +++ b/qemu/roms/ipxe/src/include/coff.h @@ -0,0 +1,73 @@ +#ifndef COFF_H +#define COFF_H +/* Based on the elf.h file + * Changed accordingly to support COFF file support + */ + + +/* Values for f_flags. */ +#define F_RELFLG 0x0001 /* If set, not reloc. info. Clear for executables */ +#define F_EXEC 0x0002 /* No unresolved symbols. Executable file ! */ +#define F_LNNO 0x0004 /* If set, line information numbers removed */ +#define F_LSYMS 0x0008 /* If set, local symbols removed */ +#define F_AR32WR 0x0100 /* Indicates little endian file */ + +/* Values for e_machine (architecute). */ +#define EM_E1 0x17a /* Magic number for Hyperstone. Big endian format */ + +/* Values for f_flags. */ +#define O_MAGIC 0x017c /* Optional's header magic number for Hyperstone */ + +/* Values for s_flags. */ +#define S_TYPE_TEXT 0x0020 /* If set, the section contains only executable */ +#define S_TYPE_DATA 0x0040 /* If set, the section contains only initialized data */ +#define S_TYPE_BSS 0x0080 /* If set, the section is BSS no data stored */ + + +typedef struct +{ + unsigned short f_magic; /* magic number */ + unsigned short f_nscns; /* number of sections */ + unsigned long f_timdat; /* time & date stamp */ + unsigned long f_symptr; /* file pointer to symtab */ + unsigned long f_nsyms; /* number of symtab entries */ + unsigned short f_opthdr; /* sizeof(optional hdr) */ + unsigned short f_flags; /* flags */ +} +COFF_filehdr; + +/* + * Optional header. + */ +typedef struct +{ + unsigned short magic; /* type of file */ + unsigned short vstamp; /* version stamp */ + unsigned long tsize; /* text size in bytes, padded to FW bdry*/ + unsigned long dsize; /* initialized data " " */ + unsigned long bsize; /* uninitialized data " " */ + unsigned long entry; /* entry pt. */ + unsigned long text_start; /* base of text used for this file */ + unsigned long data_start; /* base of data used for this file */ +} +COFF_opthdr; + +/* + * Section header. + */ +typedef struct +{ + char s_name[8]; /* section name */ + unsigned long s_paddr; /* physical address, aliased s_nlib */ + unsigned long s_vaddr; /* virtual address */ + unsigned long s_size; /* section size */ + unsigned long s_scnptr; /* file ptr to raw data for section */ + unsigned long s_relptr; /* file ptr to relocation */ + unsigned long s_lnnoptr; /* file ptr to line numbers */ + unsigned short s_nreloc; /* number of relocation entries */ + unsigned short s_nlnno; /* number of line number entries*/ + unsigned long s_flags; /* flags */ +} +COFF_scnhdr; + +#endif /* COFF_H */ diff --git a/qemu/roms/ipxe/src/include/compiler.h b/qemu/roms/ipxe/src/include/compiler.h new file mode 100644 index 000000000..3f5c913a0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/compiler.h @@ -0,0 +1,743 @@ +#ifndef COMPILER_H +#define COMPILER_H + +/* + * Doxygen can't cope with some of the more esoteric areas of C, so we + * make its life simpler. + * + */ +#ifdef DOXYGEN +#define __attribute__(x) +#endif + +/** @file + * + * Global compiler definitions. + * + * This file is implicitly included by every @c .c file in Etherboot. + * It defines global macros such as DBG(). + * + * We arrange for each object to export the symbol @c obj_OBJECT + * (where @c OBJECT is the object name, e.g. @c rtl8139) as a global + * symbol, so that the linker can drag in selected object files from + * the library using <tt> -u obj_OBJECT </tt>. + * + */ + +/* Force visibility of all symbols to "hidden", i.e. inform gcc that + * all symbol references resolve strictly within our final binary. + * This avoids unnecessary PLT/GOT entries on x86_64. + * + * This is a stronger claim than specifying "-fvisibility=hidden", + * since it also affects symbols marked with "extern". + */ +#ifndef ASSEMBLY +#if __GNUC__ >= 4 +#pragma GCC visibility push(hidden) +#endif +#endif /* ASSEMBLY */ + +#undef _S1 +#undef _S2 +#undef _C1 +#undef _C2 + +/** Concatenate non-expanded arguments */ +#define _C1( x, y ) x ## y +/** Concatenate expanded arguments */ +#define _C2( x, y ) _C1 ( x, y ) + +/** Stringify non-expanded argument */ +#define _S1( x ) #x +/** Stringify expanded argument */ +#define _S2( x ) _S1 ( x ) + +/** + * @defgroup symmacros Macros to provide or require explicit symbols + * @{ + */ + +/** Provide a symbol within this object file */ +#ifdef ASSEMBLY +#define PROVIDE_SYMBOL( _sym ) \ + .section ".provided", "a", @nobits ; \ + .hidden _sym ; \ + .globl _sym ; \ + _sym: ; \ + .previous +#else /* ASSEMBLY */ +#define PROVIDE_SYMBOL( _sym ) \ + char _sym[0] \ + __attribute__ (( section ( ".provided" ) )) +#endif /* ASSEMBLY */ + +/** Require a symbol within this object file + * + * The symbol is referenced by a relocation in a discarded section, so + * if it is not available at link time the link will fail. + */ +#ifdef ASSEMBLY +#define REQUIRE_SYMBOL( _sym ) \ + .section ".discard", "a", @progbits ; \ + .extern _sym ; \ + .long _sym ; \ + .previous +#else /* ASSEMBLY */ +#define REQUIRE_SYMBOL( _sym ) \ + extern char _sym; \ + static char * _C2 ( _C2 ( __require_, _sym ), _C2 ( _, __LINE__ ) ) \ + __attribute__ (( section ( ".discard" ), used )) \ + = &_sym +#endif + +/** Request that a symbol be available at runtime + * + * The requested symbol is entered as undefined into the symbol table + * for this object, so the linker will pull in other object files as + * necessary to satisfy the reference. However, the undefined symbol + * is not referenced in any relocations, so the link can still succeed + * if no file contains it. + * + * A symbol passed to this macro may not be referenced anywhere + * else in the file. If you want to do that, see IMPORT_SYMBOL(). + */ +#ifdef ASSEMBLY +#define REQUEST_SYMBOL( _sym ) \ + .equ __need_ ## _sym, _sym +#else /* ASSEMBLY */ +#define REQUEST_SYMBOL( _sym ) \ + __asm__ ( ".equ\t__need_" #_sym ", " #_sym ) +#endif /* ASSEMBLY */ + +/** Set up a symbol to be usable in another file by IMPORT_SYMBOL() + * + * The symbol must already be marked as global. + */ +#define EXPORT_SYMBOL( _sym ) PROVIDE_SYMBOL ( __export_ ## _sym ) + +/** Make a symbol usable to this file if available at link time + * + * If no file passed to the linker contains the symbol, it will have + * @c NULL value to future uses. Keep in mind that the symbol value is + * really the @e address of a variable or function; see the code + * snippet below. + * + * In C using IMPORT_SYMBOL, you must specify the declaration as the + * second argument, for instance + * + * @code + * IMPORT_SYMBOL ( my_func, int my_func ( int arg ) ); + * IMPORT_SYMBOL ( my_var, int my_var ); + * + * void use_imports ( void ) { + * if ( my_func && &my_var ) + * my_var = my_func ( my_var ); + * } + * @endcode + * + * GCC considers a weak declaration to override a strong one no matter + * which comes first, so it is safe to include a header file declaring + * the imported symbol normally, but providing the declaration to + * IMPORT_SYMBOL is still required. + * + * If no EXPORT_SYMBOL declaration exists for the imported symbol in + * another file, the behavior will be most likely be identical to that + * for an unavailable symbol. + */ +#ifdef ASSEMBLY +#define IMPORT_SYMBOL( _sym ) \ + REQUEST_SYMBOL ( __export_ ## _sym ) ; \ + .weak _sym +#else /* ASSEMBLY */ +#define IMPORT_SYMBOL( _sym, _decl ) \ + REQUEST_SYMBOL ( __export_ ## _sym ) ; \ + extern _decl __attribute__ (( weak )) +#endif + +/** @} */ + +/** + * @defgroup objmacros Macros to provide or require explicit objects + * @{ + */ + +#define PREFIX_OBJECT( _prefix ) _C2 ( _prefix, OBJECT ) +#define OBJECT_SYMBOL PREFIX_OBJECT ( obj_ ) +#define REQUEST_EXPANDED( _sym ) REQUEST_SYMBOL ( _sym ) +#define CONFIG_SYMBOL PREFIX_OBJECT ( obj_config_ ) + +/** Always provide the symbol for the current object (defined by -DOBJECT) */ +PROVIDE_SYMBOL ( OBJECT_SYMBOL ); + +/** Pull in an object-specific configuration file if available */ +REQUEST_EXPANDED ( CONFIG_SYMBOL ); + +/** Explicitly require another object */ +#define REQUIRE_OBJECT( _obj ) REQUIRE_SYMBOL ( obj_ ## _obj ) + +/** Pull in another object if it exists */ +#define REQUEST_OBJECT( _obj ) REQUEST_SYMBOL ( obj_ ## _obj ) + +/** @} */ + +/** Select file identifier for errno.h (if used) */ +#define ERRFILE PREFIX_OBJECT ( ERRFILE_ ) + +#ifndef ASSEMBLY + +/** Declare a function as weak (use *before* the definition) + * + * Due to a bug in at least GCC 4.4.4 and earlier, weak symbols may be + * inlined if they have hidden visibility (see above for why hidden + * visibility is used). This results in the non-weak symbol never + * being used, so explicitly mark the function as noinline to prevent + * inlining. + */ +#define __weak __attribute__ (( weak, noinline )) + +/** Prevent a function from being optimized away without inlining + * + * Calls to functions with void return type that contain no code in their body + * may be removed by gcc's optimizer even when inlining is inhibited. Placing + * this macro in the body of the function prevents that from occurring. + */ +#define __keepme asm(""); + +#endif + +/** @defgroup dbg Debugging infrastructure + * @{ + */ + +/** @def DBG + * + * Print a debugging message. + * + * The debug level is set at build time by specifying the @c DEBUG= + * parameter on the @c make command line. For example, to enable + * debugging for the PCI bus functions (in pci.c) in a @c .dsk image + * for the @c rtl8139 card, you could use the command line + * + * @code + * + * make bin/rtl8139.dsk DEBUG=pci + * + * @endcode + * + * This will enable the debugging statements (DBG()) in pci.c. If + * debugging is not enabled, DBG() statements will be ignored. + * + * You can enable debugging in several objects simultaneously by + * separating them with commas, as in + * + * @code + * + * make bin/rtl8139.dsk DEBUG=pci,buffer,heap + * + * @endcode + * + * You can increase the debugging level for an object by specifying it + * with @c :N, where @c N is the level, as in + * + * @code + * + * make bin/rtl8139.dsk DEBUG=pci,buffer:2,heap + * + * @endcode + * + * which would enable debugging for the PCI, buffer-handling and + * heap-allocation code, with the buffer-handling code at level 2. + * + */ + +#ifndef DBGLVL_MAX +#define NDEBUG +#define DBGLVL_MAX 0 +#endif + +#ifndef ASSEMBLY + +/** printf() for debugging */ +extern void __attribute__ (( format ( printf, 1, 2 ) )) +dbg_printf ( const char *fmt, ... ); +extern void dbg_autocolourise ( unsigned long id ); +extern void dbg_decolourise ( void ); +extern void dbg_hex_dump_da ( unsigned long dispaddr, + const void *data, unsigned long len ); +extern void dbg_md5_da ( unsigned long dispaddr, + const void *data, unsigned long len ); +extern void dbg_pause ( void ); +extern void dbg_more ( void ); + +/* Allow for selective disabling of enabled debug levels */ +#if DBGLVL_MAX +int __debug_disable; +#define DBGLVL ( DBGLVL_MAX & ~__debug_disable ) +#define DBG_DISABLE( level ) do { \ + __debug_disable |= (level); \ + } while ( 0 ) +#define DBG_ENABLE( level ) do { \ + __debug_disable &= ~(level); \ + } while ( 0 ) +#else +#define DBGLVL 0 +#define DBG_DISABLE( level ) do { } while ( 0 ) +#define DBG_ENABLE( level ) do { } while ( 0 ) +#endif + +#define DBGLVL_LOG 1 +#define DBG_LOG ( DBGLVL & DBGLVL_LOG ) +#define DBGLVL_EXTRA 2 +#define DBG_EXTRA ( DBGLVL & DBGLVL_EXTRA ) +#define DBGLVL_PROFILE 4 +#define DBG_PROFILE ( DBGLVL & DBGLVL_PROFILE ) +#define DBGLVL_IO 8 +#define DBG_IO ( DBGLVL & DBGLVL_IO ) + +/** + * Print debugging message if we are at a certain debug level + * + * @v level Debug level + * @v ... printf() argument list + */ +#define DBG_IF( level, ... ) do { \ + if ( DBG_ ## level ) { \ + dbg_printf ( __VA_ARGS__ ); \ + } \ + } while ( 0 ) + +/** + * Print a hex dump if we are at a certain debug level + * + * @v level Debug level + * @v dispaddr Display address + * @v data Data to print + * @v len Length of data + */ +#define DBG_HDA_IF( level, dispaddr, data, len ) do { \ + if ( DBG_ ## level ) { \ + union { \ + unsigned long ul; \ + typeof ( dispaddr ) raw; \ + } da; \ + da.ul = 0; \ + da.raw = dispaddr; \ + dbg_hex_dump_da ( da.ul, data, len ); \ + } \ + } while ( 0 ) + +/** + * Print a hex dump if we are at a certain debug level + * + * @v level Debug level + * @v data Data to print + * @v len Length of data + */ +#define DBG_HD_IF( level, data, len ) do { \ + const void *_data = data; \ + DBG_HDA_IF ( level, _data, _data, len ); \ + } while ( 0 ) + +/** + * Print an MD5 checksum if we are at a certain debug level + * + * @v level Debug level + * @v dispaddr Display address + * @v data Data to print + * @v len Length of data + */ +#define DBG_MD5A_IF( level, dispaddr, data, len ) do { \ + if ( DBG_ ## level ) { \ + union { \ + unsigned long ul; \ + typeof ( dispaddr ) raw; \ + } da; \ + da.ul = 0; \ + da.raw = dispaddr; \ + dbg_md5_da ( da.ul, data, len ); \ + } \ + } while ( 0 ) + +/** + * Print an MD5 checksum if we are at a certain debug level + * + * @v level Debug level + * @v data Data to print + * @v len Length of data + */ +#define DBG_MD5_IF( level, data, len ) do { \ + const void *_data = data; \ + DBG_MD5A_IF ( level, _data, _data, len ); \ + } while ( 0 ) + +/** + * Prompt for key press if we are at a certain debug level + * + * @v level Debug level + */ +#define DBG_PAUSE_IF( level ) do { \ + if ( DBG_ ## level ) { \ + dbg_pause(); \ + } \ + } while ( 0 ) + +/** + * Prompt for more output data if we are at a certain debug level + * + * @v level Debug level + */ +#define DBG_MORE_IF( level ) do { \ + if ( DBG_ ## level ) { \ + dbg_more(); \ + } \ + } while ( 0 ) + +/** + * Select colour for debug messages if we are at a certain debug level + * + * @v level Debug level + * @v id Message stream ID + */ +#define DBG_AC_IF( level, id ) do { \ + if ( DBG_ ## level ) { \ + union { \ + unsigned long ul; \ + typeof ( id ) raw; \ + } dbg_stream; \ + dbg_stream.ul = 0; \ + dbg_stream.raw = id; \ + dbg_autocolourise ( dbg_stream.ul ); \ + } \ + } while ( 0 ) + +/** + * Revert colour for debug messages if we are at a certain debug level + * + * @v level Debug level + */ +#define DBG_DC_IF( level ) do { \ + if ( DBG_ ## level ) { \ + dbg_decolourise(); \ + } \ + } while ( 0 ) + +/* Autocolourising versions of the DBGxxx_IF() macros */ + +#define DBGC_IF( level, id, ... ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_IF ( level, __VA_ARGS__ ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_HDA_IF( level, id, ... ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_HDA_IF ( level, __VA_ARGS__ ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_HD_IF( level, id, ... ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_HD_IF ( level, __VA_ARGS__ ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_MD5A_IF( level, id, ... ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_MD5A_IF ( level, __VA_ARGS__ ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_MD5_IF( level, id, ... ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_MD5_IF ( level, __VA_ARGS__ ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_PAUSE_IF( level, id ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_PAUSE_IF ( level ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_MORE_IF( level, id ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_MORE_IF ( level ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +/* Versions of the DBGxxx_IF() macros that imply DBGxxx_IF( LOG, ... )*/ + +#define DBG( ... ) DBG_IF ( LOG, ##__VA_ARGS__ ) +#define DBG_HDA( ... ) DBG_HDA_IF ( LOG, ##__VA_ARGS__ ) +#define DBG_HD( ... ) DBG_HD_IF ( LOG, ##__VA_ARGS__ ) +#define DBG_MD5A( ... ) DBG_MD5A_IF ( LOG, ##__VA_ARGS__ ) +#define DBG_MD5( ... ) DBG_MD5_IF ( LOG, ##__VA_ARGS__ ) +#define DBG_PAUSE( ... ) DBG_PAUSE_IF ( LOG, ##__VA_ARGS__ ) +#define DBG_MORE( ... ) DBG_MORE_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC( ... ) DBGC_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC_HDA( ... ) DBGC_HDA_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC_HD( ... ) DBGC_HD_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC_MD5A( ... ) DBGC_MD5A_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC_MD5( ... ) DBGC_MD5_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC_PAUSE( ... ) DBGC_PAUSE_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC_MORE( ... ) DBGC_MORE_IF ( LOG, ##__VA_ARGS__ ) + +/* Versions of the DBGxxx_IF() macros that imply DBGxxx_IF( EXTRA, ... )*/ + +#define DBG2( ... ) DBG_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBG2_HDA( ... ) DBG_HDA_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBG2_HD( ... ) DBG_HD_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBG2_MD5A( ... ) DBG_MD5A_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBG2_MD5( ... ) DBG_MD5_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBG2_PAUSE( ... ) DBG_PAUSE_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBG2_MORE( ... ) DBG_MORE_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2( ... ) DBGC_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2_HDA( ... ) DBGC_HDA_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2_HD( ... ) DBGC_HD_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2_MD5A( ... ) DBGC_MD5A_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2_MD5( ... ) DBGC_MD5_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2_PAUSE( ... ) DBGC_PAUSE_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2_MORE( ... ) DBGC_MORE_IF ( EXTRA, ##__VA_ARGS__ ) + +/* Versions of the DBGxxx_IF() macros that imply DBGxxx_IF( PROFILE, ... )*/ + +#define DBGP( ... ) DBG_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGP_HDA( ... ) DBG_HDA_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGP_HD( ... ) DBG_HD_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGP_MD5A( ... ) DBG_MD5A_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGP_MD5( ... ) DBG_MD5_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGP_PAUSE( ... ) DBG_PAUSE_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGP_MORE( ... ) DBG_MORE_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP( ... ) DBGC_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP_HDA( ... ) DBGC_HDA_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP_HD( ... ) DBGC_HD_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP_MD5A( ... ) DBGC_MD5A_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP_MD5( ... ) DBGC_MD5_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP_PAUSE( ... ) DBGC_PAUSE_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP_MORE( ... ) DBGC_MORE_IF ( PROFILE, ##__VA_ARGS__ ) + +/* Versions of the DBGxxx_IF() macros that imply DBGxxx_IF( IO, ... )*/ + +#define DBGIO( ... ) DBG_IF ( IO, ##__VA_ARGS__ ) +#define DBGIO_HDA( ... ) DBG_HDA_IF ( IO, ##__VA_ARGS__ ) +#define DBGIO_HD( ... ) DBG_HD_IF ( IO, ##__VA_ARGS__ ) +#define DBGIO_MD5A( ... ) DBG_MD5A_IF ( IO, ##__VA_ARGS__ ) +#define DBGIO_MD5( ... ) DBG_MD5_IF ( IO, ##__VA_ARGS__ ) +#define DBGIO_PAUSE( ... ) DBG_PAUSE_IF ( IO, ##__VA_ARGS__ ) +#define DBGIO_MORE( ... ) DBG_MORE_IF ( IO, ##__VA_ARGS__ ) +#define DBGCIO( ... ) DBGC_IF ( IO, ##__VA_ARGS__ ) +#define DBGCIO_HDA( ... ) DBGC_HDA_IF ( IO, ##__VA_ARGS__ ) +#define DBGCIO_HD( ... ) DBGC_HD_IF ( IO, ##__VA_ARGS__ ) +#define DBGCIO_MD5A( ... ) DBGC_MD5A_IF ( IO, ##__VA_ARGS__ ) +#define DBGCIO_MD5( ... ) DBGC_MD5_IF ( IO, ##__VA_ARGS__ ) +#define DBGCIO_PAUSE( ... ) DBGC_PAUSE_IF ( IO, ##__VA_ARGS__ ) +#define DBGCIO_MORE( ... ) DBGC_MORE_IF ( IO, ##__VA_ARGS__ ) + +#endif /* ASSEMBLY */ +/** @} */ + +/** @defgroup attrs Miscellaneous attributes + * @{ + */ +#ifndef ASSEMBLY + +/** Declare a variable or data structure as unused. */ +#define __unused __attribute__ (( unused )) + +/** + * Declare a function as pure - i.e. without side effects + */ +#define __pure __attribute__ (( pure )) + +/** + * Declare a function as const - i.e. it does not access global memory + * (including dereferencing pointers passed to it) at all. + * Must also not call any non-const functions. + */ +#define __const __attribute__ (( const )) + +/** + * Declare a function's pointer parameters as non-null - i.e. force + * compiler to check pointers at compile time and enable possible + * optimizations based on that fact + */ +#define __nonnull __attribute__ (( nonnull )) + +/** + * Declare a pointer returned by a function as a unique memory address + * as returned by malloc-type functions. + */ +#define __malloc __attribute__ (( malloc )) + +/** + * Declare a function as used. + * + * Necessary only if the function is called only from assembler code. + */ +#define __used __attribute__ (( used )) + +/** Declare a data structure to be aligned with 16-byte alignment */ +#define __aligned __attribute__ (( aligned ( 16 ) )) + +/** Declare a function to be always inline */ +#define __always_inline __attribute__ (( always_inline )) + +/* Force all inline functions to not be instrumented + * + * This is required to cope with what seems to be a long-standing gcc + * bug, in which -finstrument-functions will cause instances of + * inlined functions to be reported as further calls to the + * *containing* function. This makes instrumentation very difficult + * to use. + * + * Work around this problem by adding the no_instrument_function + * attribute to all inlined functions. + */ +#define inline inline __attribute__ (( no_instrument_function )) + +/** + * Shared data. + * + * To save space in the binary when multiple-driver images are + * compiled, uninitialised data areas can be shared between drivers. + * This will typically be used to share statically-allocated receive + * and transmit buffers between drivers. + * + * Use as e.g. + * + * @code + * + * struct { + * char rx_buf[NUM_RX_BUF][RX_BUF_SIZE]; + * char tx_buf[TX_BUF_SIZE]; + * } my_static_data __shared; + * + * @endcode + * + */ +#define __shared __asm__ ( "_shared_bss" ) __aligned + +#endif /* ASSEMBLY */ +/** @} */ + +/** + * Optimisation barrier + */ +#ifndef ASSEMBLY +#define barrier() __asm__ __volatile__ ( "" : : : "memory" ) +#endif /* ASSEMBLY */ + +/** + * @defgroup licences Licence declarations + * + * For reasons that are partly historical, various different files + * within the iPXE codebase have differing licences. + * + * @{ + */ + +/** Declare a file as being in the public domain + * + * This licence declaration is applicable when a file states itself to + * be in the public domain. + */ +#define FILE_LICENCE_PUBLIC_DOMAIN \ + PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__public_domain__ ) ) + +/** Declare a file as being under version 2 (or later) of the GNU GPL + * + * This licence declaration is applicable when a file states itself to + * be licensed under the GNU GPL; "either version 2 of the License, or + * (at your option) any later version". + */ +#define FILE_LICENCE_GPL2_OR_LATER \ + PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__gpl2_or_later__ ) ) + +/** Declare a file as being under version 2 of the GNU GPL + * + * This licence declaration is applicable when a file states itself to + * be licensed under version 2 of the GPL, and does not include the + * "or, at your option, any later version" clause. + */ +#define FILE_LICENCE_GPL2_ONLY \ + PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__gpl2_only__ ) ) + +/** Declare a file as being under any version of the GNU GPL + * + * This licence declaration is applicable when a file states itself to + * be licensed under the GPL, but does not specify a version. + * + * According to section 9 of the GPLv2, "If the Program does not + * specify a version number of this License, you may choose any + * version ever published by the Free Software Foundation". + */ +#define FILE_LICENCE_GPL_ANY \ + PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__gpl_any__ ) ) + +/** Declare a file as being under the three-clause BSD licence + * + * This licence declaration is applicable when a file states itself to + * be licensed under terms allowing redistribution in source and + * binary forms (with or without modification) provided that: + * + * redistributions of source code retain the copyright notice, + * list of conditions and any attached disclaimers + * + * redistributions in binary form reproduce the copyright notice, + * list of conditions and any attached disclaimers in the + * documentation and/or other materials provided with the + * distribution + * + * the name of the author is not used to endorse or promote + * products derived from the software without specific prior + * written permission + * + * It is not necessary for the file to explicitly state that it is + * under a "BSD" licence; only that the licensing terms be + * functionally equivalent to the standard three-clause BSD licence. + */ +#define FILE_LICENCE_BSD3 \ + PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__bsd3__ ) ) + +/** Declare a file as being under the two-clause BSD licence + * + * This licence declaration is applicable when a file states itself to + * be licensed under terms allowing redistribution in source and + * binary forms (with or without modification) provided that: + * + * redistributions of source code retain the copyright notice, + * list of conditions and any attached disclaimers + * + * redistributions in binary form reproduce the copyright notice, + * list of conditions and any attached disclaimers in the + * documentation and/or other materials provided with the + * distribution + * + * It is not necessary for the file to explicitly state that it is + * under a "BSD" licence; only that the licensing terms be + * functionally equivalent to the standard two-clause BSD licence. + */ +#define FILE_LICENCE_BSD2 \ + PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__bsd2__ ) ) + +/** Declare a file as being under the one-clause MIT-style licence + * + * This licence declaration is applicable when a file states itself to + * be licensed under terms allowing redistribution for any purpose + * with or without fee, provided that the copyright notice and + * permission notice appear in all copies. + */ +#define FILE_LICENCE_MIT \ + PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__mit__ ) ) + +/** Declare a particular licence as applying to a file */ +#define FILE_LICENCE( _licence ) FILE_LICENCE_ ## _licence + +/** @} */ + +/* This file itself is under GPLv2-or-later */ +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <bits/compiler.h> + +#endif /* COMPILER_H */ diff --git a/qemu/roms/ipxe/src/include/cpu.h b/qemu/roms/ipxe/src/include/cpu.h new file mode 100644 index 000000000..b2c428f77 --- /dev/null +++ b/qemu/roms/ipxe/src/include/cpu.h @@ -0,0 +1,6 @@ +#ifndef CPU_H +#define CPU_H + +#include "bits/cpu.h" + +#endif /* CPU_H */ diff --git a/qemu/roms/ipxe/src/include/ctype.h b/qemu/roms/ipxe/src/include/ctype.h new file mode 100644 index 000000000..e92ecb1c0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ctype.h @@ -0,0 +1,33 @@ +#ifndef _CTYPE_H +#define _CTYPE_H + +/** @file + * + * Character types + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#define isdigit(c) ((c) >= '0' && (c) <= '9') +#define islower(c) ((c) >= 'a' && (c) <= 'z') +#define isupper(c) ((c) >= 'A' && (c) <= 'Z') +#define isxdigit(c) (isdigit(c) || ((c) >= 'A' && (c) <= 'F') || ((c) >= 'a' && (c) <= 'f')) +#define isprint(c) ((c) >= ' ' && (c) <= '~' ) + +static inline unsigned char tolower(unsigned char c) +{ + if (isupper(c)) + c -= 'A'-'a'; + return c; +} + +static inline unsigned char toupper(unsigned char c) +{ + if (islower(c)) + c -= 'a'-'A'; + return c; +} + +extern int isspace ( int c ); + +#endif /* _CTYPE_H */ diff --git a/qemu/roms/ipxe/src/include/curses.h b/qemu/roms/ipxe/src/include/curses.h new file mode 100644 index 000000000..f16f9d7d0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/curses.h @@ -0,0 +1,764 @@ +#ifndef CURSES_H +#define CURSES_H + +#include <stdint.h> +#include <stdarg.h> +#include <ipxe/console.h> + +/** @file + * + * MuCurses header file + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#undef ERR +#define ERR (-1) + +#undef FALSE +#define FALSE (0) + +#undef OK +#define OK (0) + +#undef TRUE +#define TRUE (1) + +typedef int bool; +typedef uint32_t chtype; +typedef uint32_t attr_t; + +/** Curses SCREEN object */ +typedef struct _curses_screen { + /** Current cursor position */ + unsigned int curs_x, curs_y; + /** Current attribute */ + attr_t attrs; + + void ( *init ) ( struct _curses_screen *scr ); + void ( *exit ) ( struct _curses_screen *scr ); + /** + * Erase screen + * + * @v scr screen on which to operate + * @v attrs attributes + */ + void ( * erase ) ( struct _curses_screen *scr, attr_t attrs ); + /** + * Move cursor to position specified by x,y coords + * + * @v scr screen on which to operate + * @v y Y position + * @v x X position + */ + void ( * movetoyx ) ( struct _curses_screen *scr, + unsigned int y, unsigned int x ); + /** + * Write character to current cursor position + * + * @v scr screen on which to operate + * @v c character to be written + */ + void ( * putc ) ( struct _curses_screen *scr, chtype c ); + /** + * Pop a character from the keyboard input stream + * + * @v scr screen on which to operate + * @ret c popped character + */ + int ( * getc ) ( struct _curses_screen *scr ); + /** + * Checks to see whether a character is waiting in the input stream + * + * @v scr screen on which to operate + * @ret TRUE character waiting in stream + * @ret FALSE no character waiting in stream + */ + bool ( *peek ) ( struct _curses_screen *scr ); + /** + * Set cursor visibility + * + * @v scr screen on which to operate + * @v visibility cursor visibility + */ + void ( * cursor ) ( struct _curses_screen *scr, int visibility ); +} SCREEN; + +/** Curses Window struct */ +typedef struct _curses_window { + /** screen with which window associates */ + SCREEN *scr; + /** window attributes */ + attr_t attrs; + /** window origin coordinates */ + unsigned int ori_x, ori_y; + /** window cursor position */ + unsigned int curs_x, curs_y; + /** window dimensions */ + unsigned int width, height; + /** parent window */ + struct _curses_window *parent; + /** windows that share the same parent as this one */ + //struct list_head siblings; + /** windows der'd or sub'd from this one */ + //struct list_head children; +} WINDOW; + +extern WINDOW _stdscr; + +#define stdscr ( &_stdscr ) +#define COLS console_width +#define LINES console_height + +#define MUCURSES_BITS( mask, shift ) (( mask ) << (shift)) +#define CPAIR_SHIFT 8 +#define ATTRS_SHIFT 16 + +#define WA_DEFAULT ( 0x0000 << ATTRS_SHIFT ) +#define WA_ALTCHARSET ( 0x0001 << ATTRS_SHIFT ) +#define WA_BLINK ( 0x0002 << ATTRS_SHIFT ) +#define WA_BOLD ( 0x0004 << ATTRS_SHIFT ) +#define WA_DIM ( 0x0008 << ATTRS_SHIFT ) +#define WA_INVIS ( 0x0010 << ATTRS_SHIFT ) +#define WA_PROTECT ( 0x0020 << ATTRS_SHIFT ) +#define WA_REVERSE ( 0x0040 << ATTRS_SHIFT ) +#define WA_STANDOUT ( 0x0080 << ATTRS_SHIFT ) +#define WA_UNDERLINE ( 0x0100 << ATTRS_SHIFT ) +#define WA_HORIZONTAL ( 0x0200 << ATTRS_SHIFT ) +#define WA_VERTICAL ( 0x0400 << ATTRS_SHIFT ) +#define WA_LEFT ( 0x0800 << ATTRS_SHIFT ) +#define WA_RIGHT ( 0x1000 << ATTRS_SHIFT ) +#define WA_LOW ( 0x2000 << ATTRS_SHIFT ) +#define WA_TOP ( 0x4000 << ATTRS_SHIFT ) + +#define A_DEFAULT WA_DEFAULT +#define A_ALTCHARSET WA_ALTCHARSET +#define A_BLINK WA_BLINK +#define A_BOLD WA_BOLD +#define A_DIM WA_DIM +#define A_INVIS WA_INVIS +#define A_PROTECT WA_PROTECT +#define A_REVERSE WA_REVERSE +#define A_STANDOUT WA_STANDOUT +#define A_UNDERLINE WA_UNDERLINE + +#define A_ATTRIBUTES ( 0xffff << ATTRS_SHIFT ) +#define A_CHARTEXT ( 0xff ) +#define A_COLOUR ( 0xff << CPAIR_SHIFT ) +#define A_COLOR A_COLOUR + +#define COLOUR_PAIR(n) ( (n) << CPAIR_SHIFT ) +#define COLOR_PAIR(n) COLOUR_PAIR(n) +#define PAIR_NUMBER(attrs) ( ( (attrs) & A_COLOUR ) >> CPAIR_SHIFT ) + +#define COLOUR_PAIRS 8 /* Arbitrary limit */ +#define COLOR_PAIRS COLOUR_PAIRS + +#define ACS_ULCORNER '+' +#define ACS_LLCORNER '+' +#define ACS_URCORNER '+' +#define ACS_LRCORNER '+' +#define ACS_RTEE '+' +#define ACS_LTEE '+' +#define ACS_BTEE '+' +#define ACS_TTEE '+' +#define ACS_HLINE '-' +#define ACS_VLINE '|' +#define ACS_PLUS '+' +#define ACS_S1 '-' +#define ACS_S9 '_' +#define ACS_DIAMOND '+' +#define ACS_CKBOARD ':' +#define ACS_DEGREE '\'' +#define ACS_PLMINUS '#' +#define ACS_BULLET 'o' +#define ACS_LARROW '<' +#define ACS_RARROW '>' +#define ACS_DARROW 'v' +#define ACS_UARROW '^' +#define ACS_BOARD '#' +#define ACS_LANTERN '#' +#define ACS_BLOCK '#' + +#define COLOUR_BLACK 0 +#define COLOUR_RED 1 +#define COLOUR_GREEN 2 +#define COLOUR_YELLOW 3 +#define COLOUR_BLUE 4 +#define COLOUR_MAGENTA 5 +#define COLOUR_CYAN 6 +#define COLOUR_WHITE 7 +#define COLOURS 7 + +#define COLOUR_FG 30 +#define COLOUR_BG 40 +#define COLOR_FG COLOUR_FG +#define COLOR_BG COLOUR_BG + +#define COLOR_BLACK COLOUR_BLACK +#define COLOR_BLUE COLOUR_BLUE +#define COLOR_GREEN COLOUR_GREEN +#define COLOR_CYAN COLOUR_CYAN +#define COLOR_RED COLOUR_RED +#define COLOR_MAGENTA COLOUR_MAGENTA +#define COLOR_YELLOW COLOUR_YELLOW +#define COLOR_WHITE COLOUR_WHITE +#define COLORS COLOURS + +/* + * KEY code constants are define in ipxe/keys.h + */ +#include <ipxe/keys.h> + +//extern int addch ( const chtype * ); +//extern int addchnstr ( const chtype *, int ); +//extern int addchstr ( const chtype * ); +//extern int addnstr ( const char *, int ); +//extern int addstr ( const char * ); +//extern int attroff ( int ); +//extern int attron ( int ); +//extern int attrset ( int ); +//extern int attr_get ( attr_t *, short *, void * ); +//extern int attr_off ( attr_t, void * ); +//extern int attr_on ( attr_t, void * ); +//extern int attr_set ( attr_t, short, void * ); +extern int baudrate ( void ); +extern int beep ( void ); +//extern void bkgdset ( chtype ); +/*extern int border ( chtype, chtype, chtype, chtype, chtype, chtype, chtype, + chtype );*/ +extern int box ( WINDOW *, chtype, chtype ) __nonnull; +//extern bool can_change_colour ( void ); +#define can_change_color() can_change_colour() +extern int cbreak ( void ); +//extern int clrtobot ( void ); +//extern int clrtoeol ( void ); +extern int colour_content ( short, short *, short *, short * ) __nonnull; +#define color_content( c, r, g, b ) colour_content( (c), (r), (g), (b) ) +//extern int colour_set ( short, void * ); +#define color_set( cpno, opts ) colour_set( (cpno), (opts) ) +extern int copywin ( const WINDOW *, WINDOW *, int, int, int, + int, int, int, int ); +extern int curs_set ( int ); +extern int def_prog_mode ( void ); +extern int def_shell_mode ( void ); +extern int delay_output ( int ); +//extern int delch ( void ); +//extern int deleteln ( void ); +extern void delscreen ( SCREEN * ); +extern int delwin ( WINDOW * ) __nonnull; +extern WINDOW *derwin ( WINDOW *, int, int, int, int ) __nonnull; +//extern int doupdate ( void ); +extern WINDOW *dupwin ( WINDOW * ) __nonnull; +extern int echo ( void ); +extern int echochar ( const chtype ); +extern int endwin ( void ); +extern char erasechar ( void ); +extern int erase ( void ); +extern void filter ( void ); +extern int flash ( void ); +extern int flushinp ( void ); +extern __pure chtype getbkgd ( WINDOW * ) __nonnull; +//extern int getch ( void ); +//extern int getnstr ( char *, int ); +//extern int getstr ( char * ); +extern int halfdelay ( int ); +//extern bool has_colors ( void ); +extern bool has_ic ( void ); +extern bool has_il ( void ); +//extern int hline ( chtype, int ); +extern void idcok ( WINDOW *, bool ); +extern int idlok ( WINDOW *, bool ); +//extern void immedok ( WINDOW *, bool ); +//extern chtype inch ( void ); +//extern int inchnstr ( chtype *, int ); +//extern int inchstr ( chtype * ); +extern WINDOW *initscr ( void ); +extern int init_colour ( short, short, short, short ); +#define init_color ( c, r, g, b ) init_colour ( (c), (r), (g), (b) ) +extern int init_pair ( short, short, short ); +//extern int innstr ( char *, int ); +//extern int insch ( chtype ); +//extern int insnstr ( const char *, int ); +//extern int insstr ( const char * ); +//extern int instr ( char * ); +extern int intrflush ( WINDOW *, bool ); +extern bool isendwin ( void ); +//extern bool is_linetouched ( WINDOW *, int ); +//extern bool is_wintouched ( WINDOW * ); +extern char *keyname ( int ); +extern int keypad ( WINDOW *, bool ); +extern char killchar ( void ); +extern int leaveok ( WINDOW *, bool ); +extern char *longname ( void ); +extern int meta ( WINDOW *, bool ); +//extern int move ( int, int ); +//extern int mvaddch ( int, int, const chtype ); +//extern int mvaddchnstr ( int, int, const chtype *, int ); +//extern int mvaddchstr ( int, int, const chtype * ); +//extern int mvaddnstr ( int, int, const char *, int ); +//extern int mvaddstr ( int, int, const char * ); +extern int mvcur ( int, int, int, int ); +//extern int mvdelch ( int, int ); +extern int mvderwin ( WINDOW *, int, int ); +//extern int mvgetch ( int, int ); +//extern int mvgetnstr ( int, int, char *, int ); +//extern int mvgetstr ( int, int, char * ); +//extern int mvhline ( int, int, chtype, int ); +//extern chtype mvinch ( int, int ); +//extern int mvinchnstr ( int, int, chtype *, int ); +//extern int mvinchstr ( int, int, chtype * ); +//extern int mvinnstr ( int, int, char *, int ); +//extern int mvinsch ( int, int, chtype ); +//extern int mvinsnstr ( int, int, const char *, int ); +//extern int mvinsstr ( int, int, const char * ); +//extern int mvinstr ( int, int, char * ); +//extern int mvprintw ( int, int, char *, ... ); +//extern int mvscanw ( int, int, char *, ... ); +//extern int mvvline ( int, int, chtype, int ); +//extern int mvwaddch ( WINDOW *, int, int, const chtype ); +//extern int mvwaddchnstr ( WINDOW *, int, int, const chtype *, int ); +//extern int mvwaddchstr ( WINDOW *, int, int, const chtype * ); +//extern int mvwaddnstr ( WINDOW *, int, int, const char *, int ); +//extern int mvwaddstr ( WINDOW *, int, int, const char * ); +//extern int mvwdelch ( WINDOW *, int, int ); +//extern int mvwgetch ( WINDOW *, int, int ); +//extern int mvwgetnstr ( WINDOW *, int, int, char *, int ); +//extern int mvwgetstr ( WINDOW *, int, int, char * ); +//extern int mvwhline ( WINDOW *, int, int, chtype, int ); +extern int mvwin ( WINDOW *, int, int ) __nonnull; +//extern chtype mvwinch ( WINDOW *, int, int ); +//extern int mvwinchnstr ( WINDOW *, int, int, chtype *, int ); +//extern int mvwinchstr ( WINDOW *, int, int, chtype * ); +//extern int mvwinnstr ( WINDOW *, int, int, char *, int ); +//extern int mvwinsch ( WINDOW *, int, int, chtype ); +//extern int mvwinsnstr ( WINDOW *, int, int, const char *, int ); +//extern int mvwinsstr ( WINDOW *, int, int, const char * ); +//extern int mvwinstr ( WINDOW *, int, int, char * ); +//extern int mvwprintw ( WINDOW *, int, int, char *, ... ); +//extern int mvwscanw ( WINDOW *, int, int, char *, ... ); +//extern int mvwvline ( WINDOW *, int, int, chtype, int ); +extern int napms ( int ); +//extern WINDOW *newpad ( int, int ); +extern WINDOW *newwin ( int, int, int, int ); +extern int nl ( void ); +extern int nocbreak ( void ); +extern int nodelay ( WINDOW *, bool ); +extern int noecho ( void ); +extern int nonl ( void ); +extern void noqiflush ( void ); +extern int noraw ( void ); +extern int notimeout ( WINDOW *, bool ); +extern int overlay ( const WINDOW *, WINDOW * ); +extern int overwrite ( const WINDOW *, WINDOW * ); +extern int pair_content ( short, short *, short * ) __nonnull; +//extern int pechochar ( WINDOW *, chtype ); +//extern int pnoutrefresh ( WINDOW *, int, int, int, int, int, int ); +//extern int prefresh ( WINDOW *, int, int, int, int, int, int ); +extern int printw ( char *, ... ); +extern int putp ( const char * ); +extern void qiflush ( void ); +extern int raw ( void ); +//extern int redrawwin ( WINDOW * ); +//extern int refresh ( void ); +extern int reset_prog_mode ( void ); +extern int reset_shell_mode ( void ); +extern int resetty ( void ); +extern int ripoffline ( int, int (*) ( WINDOW *, int) ); +extern int savetty ( void ); +//extern int scanw ( char *, ... ); +//extern int scrl ( int ); +//extern int scroll ( WINDOW * ); +//extern int scrollok ( WINDOW *, bool ); +//extern int setscrreg ( int, int ); +extern SCREEN *set_term ( SCREEN * ); +extern int setupterm ( char *, int, int * ); +extern int slk_attr_off ( const attr_t, void * ); +extern int slk_attroff ( const chtype ); +extern int slk_attr_on ( const attr_t, void * ); +extern int slk_attron ( const chtype ); +extern int slk_attr_set ( const attr_t, short, void * ); +extern int slk_attrset ( const chtype ); +extern int slk_clear ( void ); +extern int slk_colour ( short ); +#define slk_color( c ) slk_colour( (c) ) +extern int slk_init ( int ); +extern char *slk_label ( int ); +extern int slk_noutrefresh ( void ); +//extern int slk_refresh ( void ); +extern int slk_restore ( void ); +extern int slk_set ( int, const char *, int ) __nonnull; +extern int slk_touch ( void ); +extern int standend ( void ); +extern int standout ( void ); +//extern int start_colour ( void ); +#define start_color() start_colour() +//extern WINDOW *subpad ( WINDOW *, int, int, int, int ); +extern WINDOW *subwin ( WINDOW *, int, int, int, int ) __nonnull; +extern int syncok ( WINDOW *, bool ); +extern chtype termattrs ( void ); +extern attr_t term_attrs ( void ); +extern char *termname ( void ); +extern int tigetflag ( char * ); +extern int tigetnum ( char * ); +extern char *tigetstr ( char * ); +extern void timeout ( int ); +//extern int touchline ( WINDOW *, int, int ); +//extern int touchwin ( WINDOW * ); +extern char *tparm ( char *, long, long, long, long, long, long, long, long, + long ); +extern int typeahead ( int ); +//extern int ungetch ( int ); +//extern int untouchwin ( WINDOW * ); +extern void use_env ( bool ); +extern int vid_attr ( attr_t, short, void * ); +extern int vidattr ( chtype ); +extern int vid_puts ( attr_t, short, void *, int ( *) ( int) ); +extern int vidputs ( chtype, int ( *) ( int) ); +//extern int vline ( chtype, int ); +//extern int vwprintw ( WINDOW *, const char *, va_list ); +extern int vw_printw ( WINDOW *, const char *, va_list ) __nonnull; +//extern int vwscanw ( WINDOW *, char *, va_list ); +//extern int vw_scanw ( WINDOW *, char *, va_list ); +extern int waddch ( WINDOW *, const chtype ) __nonnull; +extern int waddchnstr ( WINDOW *, const chtype *, int ) __nonnull; +//extern int waddchstr ( WINDOW *, const chtype * ); +extern int waddnstr ( WINDOW *, const char *, int ) __nonnull; +//extern int waddstr ( WINDOW *, const char * ); +extern int wattroff ( WINDOW *, int ) __nonnull; +extern int wattron ( WINDOW *, int ) __nonnull; +extern int wattrset ( WINDOW *, int ) __nonnull; +extern int wattr_get ( WINDOW *, attr_t *, short *, void * ) + __attribute__ (( nonnull (1, 2, 3))); +extern int wattr_off ( WINDOW *, attr_t, void * ) + __attribute__ (( nonnull (1))); +extern int wattr_on ( WINDOW *, attr_t, void * ) + __attribute__ (( nonnull (1))); +extern int wattr_set ( WINDOW *, attr_t, short, void * ) + __attribute__ (( nonnull (1))); +//extern void wbkgdset ( WINDOW *, chtype ); +extern int wborder ( WINDOW *, chtype, chtype, chtype, chtype, chtype, chtype, + chtype, chtype ) __nonnull; +extern int wclrtobot ( WINDOW * ) __nonnull; +extern int wclrtoeol ( WINDOW * ) __nonnull; +extern void wcursyncup ( WINDOW * ); +extern int wcolour_set ( WINDOW *, short, void * ) __nonnull; +#define wcolor_set(w,s,v) wcolour_set((w),(s),(v)) +extern int wdelch ( WINDOW * ) __nonnull; +extern int wdeleteln ( WINDOW * ) __nonnull; +extern int wechochar ( WINDOW *, const chtype ); +extern int werase ( WINDOW * ) __nonnull; +extern int wgetch ( WINDOW * ); +extern int wgetnstr ( WINDOW *, char *, int ); +//extern int wgetstr ( WINDOW *, char * ); +extern int whline ( WINDOW *, chtype, int ) __nonnull; +//extern chtype winch ( WINDOW * ); +//extern int winchnstr ( WINDOW *, chtype *, int ); +//extern int winchstr ( WINDOW *, chtype * ); +//extern int winnstr ( WINDOW *, char *, int ); +//extern int winsch ( WINDOW *, chtype ); +//extern int winsnstr ( WINDOW *, const char *, int ); +//extern int winsstr ( WINDOW *, const char * ); +//extern int winstr ( WINDOW *, char * ); +extern int wmove ( WINDOW *, int, int ); +//extern int wnoutrefresh ( WINDOW * ); +extern int wprintw ( WINDOW *, const char *, ... ) __nonnull; +//extern int wredrawln ( WINDOW *, int, int ); +//extern int wrefresh ( WINDOW * ); +//extern int wscanw ( WINDOW *, char *, ... ); +//extern int wscrl ( WINDOW *, int ); +//extern int wsetscrreg ( WINDOW *, int, int ); +//extern int wstandend ( WINDOW * ); +//extern int wstandout ( WINDOW * ); +extern void wsyncup ( WINDOW * ); +extern void wsyncdown ( WINDOW * ); +extern void wtimeout ( WINDOW *, int ); +//extern int wtouchln ( WINDOW *, int, int, int ); +extern int wvline ( WINDOW *, chtype, int ) __nonnull; + +/* + * There is frankly a ridiculous amount of redundancy within the + * curses API - ncurses decided to get around this by using #define + * macros, but I've decided to be type-safe and implement them all as + * static inlines instead... + */ + +static inline int addch ( const chtype ch ) { + return waddch( stdscr, ch ); +} + +static inline int addchnstr ( const chtype *chstr, int n ) { + return waddchnstr ( stdscr, chstr, n ); +} + +static inline int addchstr ( const chtype *chstr ) { + return waddchnstr ( stdscr, chstr, -1 ); +} + +static inline int addnstr ( const char *str, int n ) { + return waddnstr ( stdscr, str, n ); +} + +static inline int addstr ( const char *str ) { + return waddnstr ( stdscr, str, -1 ); +} + +static inline int attroff ( int attrs ) { + return wattroff ( stdscr, attrs ); +} + +static inline int attron ( int attrs ) { + return wattron ( stdscr, attrs ); +} + +static inline int attrset ( int attrs ) { + return wattrset ( stdscr, attrs ); +} + +static inline int attr_get ( attr_t *attrs, short *pair, void *opts ) { + return wattr_get ( stdscr, attrs, pair, opts ); +} + +static inline int attr_off ( attr_t attrs, void *opts ) { + return wattr_off ( stdscr, attrs, opts ); +} + +static inline int attr_on ( attr_t attrs, void *opts ) { + return wattr_on ( stdscr, attrs, opts ); +} + +static inline int attr_set ( attr_t attrs, short cpair, void *opts ) { + return wattr_set ( stdscr, attrs, cpair, opts ); +} + +static inline void bkgdset ( chtype ch ) { + wattrset ( stdscr, ch ); +} + +static inline int border ( chtype ls, chtype rs, chtype ts, chtype bs, + chtype tl, chtype tr, chtype bl, chtype br ) { + return wborder ( stdscr, ls, rs, ts, bs, tl, tr, bl, br ); +} + +static inline bool can_change_colour ( void ) { + return FALSE; +} + +static inline int clrtobot ( void ) { + return wclrtobot( stdscr ); +} + +static inline int clrtoeol ( void ) { + return wclrtoeol( stdscr ); +} + +static inline int colour_set ( short colour_pair_number, void *opts ) { + return wcolour_set ( stdscr, colour_pair_number, opts ); +} + +static inline int delch ( void ) { + return wdelch ( stdscr ); +} + +static inline int deleteln ( void ) { + return wdeleteln( stdscr ); +} + +static inline int getch ( void ) { + return wgetch ( stdscr ); +} + +static inline int getnstr ( char *str, int n ) { + return wgetnstr ( stdscr, str, n ); +} + +static inline int getstr ( char *str ) { + return wgetnstr ( stdscr, str, -1 ); +} + +static inline bool has_colors ( void ) { + return TRUE; +} + +static inline int has_key ( int kc __unused ) { + return TRUE; +} + +static inline int hline ( chtype ch, int n ) { + return whline ( stdscr, ch, n ); +} + +static inline int move ( int y, int x ) { + return wmove ( stdscr, y, x ); +} + +static inline int mvaddch ( int y, int x, const chtype ch ) { + return ( wmove ( stdscr, y, x ) == OK + ? waddch( stdscr, ch ) : ERR ); +} + +static inline int mvaddchnstr ( int y, int x, const chtype *chstr, int n ) { + return ( wmove ( stdscr, y, x ) == OK + ? waddchnstr ( stdscr, chstr, n ) : ERR ); +} + +static inline int mvaddchstr ( int y, int x, const chtype *chstr ) { + return ( wmove ( stdscr, y, x ) == OK + ? waddchnstr ( stdscr, chstr, -1 ) : ERR ); +} + +static inline int mvaddnstr ( int y, int x, const char *str, int n ) { + return ( wmove ( stdscr, y, x ) == OK + ? waddnstr ( stdscr, str, n ) : ERR ); +} + +static inline int mvaddstr ( int y, int x, const char *str ) { + return ( wmove ( stdscr, y, x ) == OK + ? waddnstr ( stdscr, str, -1 ) : ERR ); +} + +static inline int mvdelch ( int y, int x ) { + return ( wmove ( stdscr, y, x ) == OK + ? wdelch ( stdscr ) : ERR ); +} + +static inline int mvgetch ( int y, int x ) { + return ( wmove ( stdscr, y, x ) == OK + ? wgetch ( stdscr ) : ERR ); +} + +static inline int mvgetnstr ( int y, int x, char *str, int n ) { + return ( wmove ( stdscr, y, x ) == OK + ? wgetnstr ( stdscr, str, n ) : ERR ); +} + +static inline int mvgetstr ( int y, int x, char *str ) { + return ( wmove ( stdscr, y, x ) == OK + ? wgetnstr ( stdscr, str, -1 ) : ERR ); +} + +static inline int mvhline ( int y, int x, chtype ch, int n ) { + return ( wmove ( stdscr, y, x ) == OK + ? whline ( stdscr, ch, n ) : ERR ); +} + +// OK, so maybe a few I did with macros... +#define mvprintw( y, x, fmt, ... ) \ + ( wmove(stdscr,(y),(x)) == OK \ + ? wprintw( stdscr,(fmt), ## __VA_ARGS__ ) : ERR ) + +static inline int mvvline ( int y, int x, chtype ch, int n ) { + return ( wmove ( stdscr, y, x ) == OK + ? wvline ( stdscr, ch, n ) : ERR ); +} + +static inline int mvwaddch ( WINDOW *win, int y, int x, const chtype ch ) { + return ( wmove( win, y, x ) == OK + ? waddch ( win, ch ) : ERR ); +} + +static inline int mvwaddchnstr ( WINDOW *win, int y, int x, const chtype *chstr, int n ) { + return ( wmove ( win, y, x ) == OK + ? waddchnstr ( win, chstr, n ) : ERR ); +} + +static inline int mvwaddchstr ( WINDOW *win, int y, int x, const chtype *chstr ) { + return ( wmove ( win, y, x ) == OK + ? waddchnstr ( win, chstr, -1 ) : ERR ); +} + +static inline int mvwaddnstr ( WINDOW *win, int y, int x, const char *str, int n ) { + return ( wmove ( win, y, x ) == OK + ? waddnstr ( win, str, n ) : ERR ); +} + +static inline int mvwaddstr ( WINDOW *win, int y, int x, const char *str ) { + return ( wmove ( win, y, x ) == OK + ? waddnstr ( win, str, -1 ) : ERR ); +} + +static inline int mvwdelch ( WINDOW *win, int y, int x ) { + return ( wmove ( win, y, x ) == OK + ? wdelch ( win ) : ERR ); +} + +static inline int mvwgetch ( WINDOW *win, int y, int x ) { + return ( wmove ( win, y, x ) == OK + ? wgetch ( win ) : ERR ); +} + +static inline int mvwgetnstr ( WINDOW *win, int y, int x, char *str, int n ) { + return ( wmove ( win, y, x ) == OK + ? wgetnstr ( win, str, n ) : ERR ); +} + +static inline int mvwgetstr ( WINDOW *win, int y, int x, char *str ) { + return ( wmove ( win, y, x ) == OK + ? wgetnstr ( win, str, -1 ) : ERR ); +} + +static inline int mvwhline ( WINDOW *win, int y, int x, chtype ch, int n ) { + return ( wmove ( win, y, x ) == OK + ? whline ( win, ch, n ) : ERR ); +} + +#define mvwprintw( win, y, x, fmt, ... ) \ + ( wmove((win),(y),(x)) == OK \ + ? wprintw((win),(fmt), ## __VA_ARGS__) : ERR ) + +static inline int mvwvline ( WINDOW *win, int y, int x, chtype ch, int n ) { + return ( wmove ( win, y, x ) == OK + ? wvline ( win, ch, n ) : ERR ); +} + +#define printw( fmt, ... ) wprintw(stdscr,(fmt), ## __VA_ARGS__ ) + +static inline int slk_refresh ( void ) { + if ( slk_clear() == OK ) + return slk_restore(); + else + return ERR; +} + +#define standend() wstandend( stdscr ) +#define standout() wstandout( stdscr ) + +static inline int start_colour ( void ) { + return OK; +} + +static inline int vline ( chtype ch, int n ) { + return wvline ( stdscr, ch, n ); +} + +// marked for removal +static inline int vwprintw ( WINDOW *win, const char *fmt, va_list varglist ) { + return vw_printw ( win, fmt, varglist ); +} + +static inline int waddchstr ( WINDOW *win, const chtype *chstr ) { + return waddchnstr ( win, chstr, -1 ); +} + +static inline int waddstr ( WINDOW *win, const char *str ) { + return waddnstr ( win, str, -1 ); +} + +static inline int wbkgdset ( WINDOW *win, chtype ch ) { + return wattrset( win, ch ); +} + +static inline int wgetstr ( WINDOW *win, char *str ) { + return wgetnstr ( win, str, -1 ); +} + +static inline int wstandend ( WINDOW *win ) { + return wattrset ( win, A_DEFAULT ); +} + +static inline int wstandout ( WINDOW *win ) { + return wattrset ( win, A_STANDOUT ); +} + +#endif /* CURSES_H */ diff --git a/qemu/roms/ipxe/src/include/elf.h b/qemu/roms/ipxe/src/include/elf.h new file mode 100644 index 000000000..04022b687 --- /dev/null +++ b/qemu/roms/ipxe/src/include/elf.h @@ -0,0 +1,234 @@ +#ifndef ELF_H +#define ELF_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#define EI_NIDENT 16 /* Size of e_ident array. */ + +/* Values for e_type. */ +#define ET_NONE 0 /* No file type */ +#define ET_REL 1 /* Relocatable file */ +#define ET_EXEC 2 /* Executable file */ +#define ET_DYN 3 /* Shared object file */ +#define ET_CORE 4 /* Core file */ + +/* Values for e_machine (architecute). */ +#define EM_NONE 0 /* No machine */ +#define EM_M32 1 /* AT&T WE 32100 */ +#define EM_SPARC 2 /* SUN SPARC */ +#define EM_386 3 /* Intel 80386+ */ +#define EM_68K 4 /* Motorola m68k family */ +#define EM_88K 5 /* Motorola m88k family */ +#define EM_486 6 /* Perhaps disused */ +#define EM_860 7 /* Intel 80860 */ +#define EM_MIPS 8 /* MIPS R3000 big-endian */ +#define EM_S370 9 /* IBM System/370 */ +#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */ + +#define EM_PARISC 15 /* HPPA */ +#define EM_VPP500 17 /* Fujitsu VPP500 */ +#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ +#define EM_960 19 /* Intel 80960 */ +#define EM_PPC 20 /* PowerPC */ +#define EM_PPC64 21 /* PowerPC 64-bit */ +#define EM_S390 22 /* IBM S390 */ + +#define EM_V800 36 /* NEC V800 series */ +#define EM_FR20 37 /* Fujitsu FR20 */ +#define EM_RH32 38 /* TRW RH-32 */ +#define EM_RCE 39 /* Motorola RCE */ +#define EM_ARM 40 /* ARM */ +#define EM_FAKE_ALPHA 41 /* Digital Alpha */ +#define EM_SH 42 /* Hitachi SH */ +#define EM_SPARCV9 43 /* SPARC v9 64-bit */ +#define EM_TRICORE 44 /* Siemens Tricore */ +#define EM_ARC 45 /* Argonaut RISC Core */ +#define EM_H8_300 46 /* Hitachi H8/300 */ +#define EM_H8_300H 47 /* Hitachi H8/300H */ +#define EM_H8S 48 /* Hitachi H8S */ +#define EM_H8_500 49 /* Hitachi H8/500 */ +#define EM_IA_64 50 /* Intel Merced */ +#define EM_MIPS_X 51 /* Stanford MIPS-X */ +#define EM_COLDFIRE 52 /* Motorola Coldfire */ +#define EM_68HC12 53 /* Motorola M68HC12 */ +#define EM_MMA 54 /* Fujitsu MMA Multimedia Accelerator*/ +#define EM_PCP 55 /* Siemens PCP */ +#define EM_NCPU 56 /* Sony nCPU embeeded RISC */ +#define EM_NDR1 57 /* Denso NDR1 microprocessor */ +#define EM_STARCORE 58 /* Motorola Start*Core processor */ +#define EM_ME16 59 /* Toyota ME16 processor */ +#define EM_ST100 60 /* STMicroelectronic ST100 processor */ +#define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/ +#define EM_X86_64 62 /* AMD x86-64 architecture */ +#define EM_PDSP 63 /* Sony DSP Processor */ + +#define EM_FX66 66 /* Siemens FX66 microcontroller */ +#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */ +#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */ +#define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */ +#define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */ +#define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */ +#define EM_68HC05 72 /* Motorola MC68HC05 microcontroller */ +#define EM_SVX 73 /* Silicon Graphics SVx */ +#define EM_AT19 74 /* STMicroelectronics ST19 8 bit mc */ +#define EM_VAX 75 /* Digital VAX */ +#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ +#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded processor */ +#define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */ +#define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */ +#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */ +#define EM_HUANY 81 /* Harvard University machine-independent object files */ +#define EM_PRISM 82 /* SiTera Prism */ +#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */ +#define EM_FR30 84 /* Fujitsu FR30 */ +#define EM_D10V 85 /* Mitsubishi D10V */ +#define EM_D30V 86 /* Mitsubishi D30V */ +#define EM_V850 87 /* NEC v850 */ +#define EM_M32R 88 /* Mitsubishi M32R */ +#define EM_MN10300 89 /* Matsushita MN10300 */ +#define EM_MN10200 90 /* Matsushita MN10200 */ +#define EM_PJ 91 /* picoJava */ +#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */ +#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ +#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ +#define EM_NUM 95 + +/* Values for p_type. */ +#define PT_NULL 0 /* Unused entry. */ +#define PT_LOAD 1 /* Loadable segment. */ +#define PT_DYNAMIC 2 /* Dynamic linking information segment. */ +#define PT_INTERP 3 /* Pathname of interpreter. */ +#define PT_NOTE 4 /* Auxiliary information. */ +#define PT_SHLIB 5 /* Reserved (not used). */ +#define PT_PHDR 6 /* Location of program header itself. */ + +/* Values for p_flags. */ +#define PF_X 0x1 /* Executable. */ +#define PF_W 0x2 /* Writable. */ +#define PF_R 0x4 /* Readable. */ + + +#define ELF_PROGRAM_RETURNS_BIT 0x8000000 /* e_flags bit 31 */ + +#define EI_MAG0 0 +#define ELFMAG0 0x7f + +#define EI_MAG1 1 +#define ELFMAG1 'E' + +#define EI_MAG2 2 +#define ELFMAG2 'L' + +#define EI_MAG3 3 +#define ELFMAG3 'F' + +#define ELFMAG "\177ELF" +#define SELFMAG 4 + +#define EI_CLASS 4 /* File class byte index */ +#define ELFCLASSNONE 0 /* Invalid class */ +#define ELFCLASS32 1 /* 32-bit objects */ +#define ELFCLASS64 2 /* 64-bit objects */ + +#define EI_DATA 5 /* Data encodeing byte index */ +#define ELFDATANONE 0 /* Invalid data encoding */ +#define ELFDATA2LSB 1 /* 2's complement little endian */ +#define ELFDATA2MSB 2 /* 2's complement big endian */ + +#define EI_VERSION 6 /* File version byte index */ + /* Value must be EV_CURRENT */ + +#define EV_NONE 0 /* Invalid ELF Version */ +#define EV_CURRENT 1 /* Current version */ + +#define ELF32_PHDR_SIZE (8*4) /* Size of an elf program header */ + +#ifndef ASSEMBLY + +#include <stdint.h> + +/* + * ELF definitions common to all 32-bit architectures. + */ + +typedef uint32_t Elf32_Addr; +typedef uint16_t Elf32_Half; +typedef uint32_t Elf32_Off; +typedef int32_t Elf32_Sword; +typedef uint32_t Elf32_Word; +typedef uint32_t Elf32_Size; + +typedef uint64_t Elf64_Addr; +typedef uint16_t Elf64_Half; +typedef uint64_t Elf64_Off; +typedef int32_t Elf64_Sword; +typedef uint32_t Elf64_Word; +typedef uint64_t Elf64_Size; + +/* + * ELF header. + */ +typedef struct { + unsigned char e_ident[EI_NIDENT]; /* File identification. */ + Elf32_Half e_type; /* File type. */ + Elf32_Half e_machine; /* Machine architecture. */ + Elf32_Word e_version; /* ELF format version. */ + Elf32_Addr e_entry; /* Entry point. */ + Elf32_Off e_phoff; /* Program header file offset. */ + Elf32_Off e_shoff; /* Section header file offset. */ + Elf32_Word e_flags; /* Architecture-specific flags. */ + Elf32_Half e_ehsize; /* Size of ELF header in bytes. */ + Elf32_Half e_phentsize; /* Size of program header entry. */ + Elf32_Half e_phnum; /* Number of program header entries. */ + Elf32_Half e_shentsize; /* Size of section header entry. */ + Elf32_Half e_shnum; /* Number of section header entries. */ + Elf32_Half e_shstrndx; /* Section name strings section. */ +} Elf32_Ehdr; + +typedef struct { + unsigned char e_ident[EI_NIDENT]; /* File identification. */ + Elf64_Half e_type; /* File type. */ + Elf64_Half e_machine; /* Machine architecture. */ + Elf64_Word e_version; /* ELF format version. */ + Elf64_Addr e_entry; /* Entry point. */ + Elf64_Off e_phoff; /* Program header file offset. */ + Elf64_Off e_shoff; /* Section header file offset. */ + Elf64_Word e_flags; /* Architecture-specific flags. */ + Elf64_Half e_ehsize; /* Size of ELF header in bytes. */ + Elf64_Half e_phentsize; /* Size of program header entry. */ + Elf64_Half e_phnum; /* Number of program header entries. */ + Elf64_Half e_shentsize; /* Size of section header entry. */ + Elf64_Half e_shnum; /* Number of section header entries. */ + Elf64_Half e_shstrndx; /* Section name strings section. */ +} Elf64_Ehdr; + +/* + * Program header. + */ +typedef struct { + Elf32_Word p_type; /* Entry type. */ + Elf32_Off p_offset; /* File offset of contents. */ + Elf32_Addr p_vaddr; /* Virtual address (not used). */ + Elf32_Addr p_paddr; /* Physical address. */ + Elf32_Size p_filesz; /* Size of contents in file. */ + Elf32_Size p_memsz; /* Size of contents in memory. */ + Elf32_Word p_flags; /* Access permission flags. */ + Elf32_Size p_align; /* Alignment in memory and file. */ +} Elf32_Phdr; + +typedef struct { + Elf64_Word p_type; /* Entry type. */ + Elf64_Word p_flags; /* Access permission flags. */ + Elf64_Off p_offset; /* File offset of contents. */ + Elf64_Addr p_vaddr; /* Virtual address (not used). */ + Elf64_Addr p_paddr; /* Physical address. */ + Elf64_Size p_filesz; /* Size of contents in file. */ + Elf64_Size p_memsz; /* Size of contents in memory. */ + Elf64_Size p_align; /* Alignment in memory and file. */ +} Elf64_Phdr; + +/* Standardized Elf image notes for booting... The name for all of these is ELFBoot */ + +#endif /* ASSEMBLY */ + +#endif /* ELF_H */ diff --git a/qemu/roms/ipxe/src/include/endian.h b/qemu/roms/ipxe/src/include/endian.h new file mode 100644 index 000000000..9682cf9b4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/endian.h @@ -0,0 +1,21 @@ +#ifndef ETHERBOOT_ENDIAN_H +#define ETHERBOOT_ENDIAN_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* Definitions for byte order, according to significance of bytes, + from low addresses to high addresses. The value is what you get by + putting '4' in the most significant byte, '3' in the second most + significant byte, '2' in the second least significant byte, and '1' + in the least significant byte, and then writing down one digit for + each byte, starting with the byte at the lowest address at the left, + and proceeding to the byte with the highest address at the right. */ + +#define __LITTLE_ENDIAN 1234 +#define __BIG_ENDIAN 4321 +#define __PDP_ENDIAN 3412 + +#include "bits/endian.h" + + +#endif /* ETHERBOOT_ENDIAN_H */ diff --git a/qemu/roms/ipxe/src/include/errno.h b/qemu/roms/ipxe/src/include/errno.h new file mode 100644 index 000000000..bcc4a8816 --- /dev/null +++ b/qemu/roms/ipxe/src/include/errno.h @@ -0,0 +1,691 @@ +/* + * Copyright (C) 2010 Michael Brown <mbrown@fensystems.co.uk>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef ERRNO_H +#define ERRNO_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** @file + * + * Error codes + * + * Return status codes as used within iPXE are designed to allow for + * maximum visibility into the source of an error even in an end-user + * build with no debugging. They are constructed as follows: + * + * Bits 7-0 : Platform-specific error code + * + * This is a losslessly compressed representation of the closest + * equivalent error code defined by the platform (e.g. BIOS/PXE or + * EFI). It is used to generate errors to be returned to external + * code. + * + * Bits 12-8 : Per-file disambiguator + * + * When the same error code can be generated from multiple points + * within a file, this field can be used to identify the unique + * instance. + * + * Bits 23-13 : File identifier + * + * This is a unique identifier for the file generating the error + * (e.g. ERRFILE_tcp for tcp.c). + * + * Bits 30-24 : POSIX error code + * + * This is the closest equivalent POSIX error code (e.g. ENOMEM). + * + * Bit 31 : Reserved + * + * Errors are usually return as negative error codes (e.g. -EINVAL); + * bit 31 is therefore unusable. + * + * + * The convention within the code is that errors are negative and + * expressed using the POSIX error, e.g. + * + * return -EINVAL; + * + * By various bits of preprocessor magic, the platform-specific error + * code and file identifier are already incorporated into the + * definition of the POSIX error macro, which keeps the code + * relatively clean. + * + * + * Functions that wish to return failures should be declared as + * returning an integer @c rc "Return status code". A return value of + * zero indicates success, a non-zero value indicates failure. The + * return value can be passed directly to strerror() in order to + * generate a human-readable error message, e.g. + * + * if ( ( rc = some_function ( ... ) ) != 0 ) { + * DBG ( "Whatever I was trying to do failed: %s\n", strerror ( rc ) ); + * return rc; + * } + * + * As illustrated in the above example, error returns should generally + * be directly propagated upward to the calling function. + * + * + * Individual files may declare localised errors using + * __einfo_uniqify(). For example, iscsi.c declares a localised + * version of EACCES for the error of "access denied due to incorrect + * target username": + * + * #define EACCES_INCORRECT_TARGET_USERNAME \ + * __einfo_error ( EINFO_EACCES_INCORRECT_TARGET_USERNAME ) + * #define EINFO_EACCES_INCORRECT_TARGET_USERNAME \ + * __einfo_uniqify ( EINFO_EACCESS, 0x01, "Incorrect target username" ) + * + * which can then be used as: + * + * return -EACCES_INCORRECT_TARGET_USERNAME; + * + */ + +/* Get definitions for platform-specific error codes */ +#define PLATFORM_ERRNO(_platform) <ipxe/errno/_platform.h> +#include PLATFORM_ERRNO(PLATFORM) + +/* Get definitions for file identifiers */ +#include <ipxe/errfile.h> + +/* If we do not have a valid file identifier, generate a compiler + * warning upon usage of any error codes. (Don't just use a #warning, + * because some files include errno.h but don't ever actually use any + * error codes.) + */ +#if ! ERRFILE +extern char missing_errfile_declaration[] __attribute__ (( deprecated )); +#undef ERRFILE +#define ERRFILE ( ( int ) ( 0 * ( ( intptr_t ) missing_errfile_declaration ) ) ) +#endif + +/** + * Declare error information + * + * @v platform Platform error code (uncompressed) + * @v posix POSIX error code (0x00-0x7f) + * @v uniq Error disambiguator (0x00-0x1f) + * @v desc Error description + * @ret einfo Error information + */ +#define __einfo( platform, posix, uniq, desc ) ( platform, posix, uniq, desc ) + +/** + * Get platform error code + * + * @v einfo Error information + * @ret platform Platform error code (uncompressed) + */ +#define __einfo_platform( einfo ) __einfo_extract_platform einfo +#define __einfo_extract_platform( platform, posix, uniq, desc ) platform + +/** + * Get POSIX error code + * + * @v einfo Error information + * @ret posix POSIX error code + */ +#define __einfo_posix( einfo ) __einfo_extract_posix einfo +#define __einfo_extract_posix( platform, posix, uniq, desc ) posix + +/** + * Get error disambiguator + * + * @v einfo Error information + * @ret uniq Error disambiguator + */ +#define __einfo_uniq( einfo ) __einfo_extract_uniq einfo +#define __einfo_extract_uniq( platform, posix, uniq, desc ) uniq + +/** + * Get error description + * + * @v einfo Error information + * @ret desc Error description + */ +#define __einfo_desc( einfo ) __einfo_extract_desc einfo +#define __einfo_extract_desc( platform, posix, uniq, desc ) desc + +/** + * Declare disambiguated error + * + * @v einfo_base Base error information + * @v uniq Error disambiguator (0x00-0x1f) + * @v desc Error description + * @ret einfo Error information + */ +#define __einfo_uniqify( einfo_base, uniq, desc ) \ + __einfo ( __einfo_platform ( einfo_base ), \ + __einfo_posix ( einfo_base ), \ + uniq, desc ) + +/** + * Declare platform-generated error + * + * @v einfo_base Base error information + * @v platform Platform error code (uncompressed) + * @v desc Error description + * @ret einfo Error information + */ +#define __einfo_platformify( einfo_base, platform, desc ) \ + __einfo ( platform, __einfo_posix ( einfo_base ), \ + __einfo_uniq ( einfo_base ), desc ) + +/** + * Get error code + * + * @v einfo Error information + * @ret errno Error code + */ +#define __einfo_errno( einfo ) \ + ( ( int ) \ + ( ( __einfo_posix ( einfo ) << 24 ) | ( ERRFILE ) | \ + ( __einfo_uniq ( einfo ) << 8 ) | \ + ( PLATFORM_TO_ERRNO ( __einfo_platform ( einfo ) ) << 0 ) ) ) + +/** + * Disambiguate a base error based on non-constant information + * + * @v einfo_base Base error information + * @v uniq Error disambiguator (0x00-0x1f) + * @v ... List of expected possible disambiguated errors + * @ret error Error + * + * EUNIQ() should be used when information from an external source is + * being incorporated into an error. For example, the 802.11 stack + * uses EUNIQ() to incorporate 802.11 status codes returned by an + * access point into an error. + * + * EUNIQ() should not be used for constant error disambiguators; use + * __einfo_uniqify() instead. + */ +#define EUNIQ( einfo_base, uniq, ... ) ( { \ + euniq_discard ( 0, ##__VA_ARGS__ ); \ + ( ( int ) ( __einfo_error ( einfo_base ) | \ + ( (uniq) << 8 ) ) ); } ) +static inline void euniq_discard ( int dummy __unused, ... ) {} + +/** + * Generate an error based on an external platform error code + * + * @v einfo_base Base error information + * @v platform Platform error code (uncompressed) + * @v ... List of expected possible platform-generated errors + * @ret error Error + * + * EPLATFORM() should be used when a platform error code resulting + * from an external platform API call is being incorporated into an + * error. For example, EFI code uses EPLATFORM() to generate errors + * resulting from calls to EFI APIs such as + * InstallMultipleProtocolInterfaces(). + * + * EPLATFORM() should not be used for constant platform-generated + * errors; use __einfo_platformify() instead. + */ +#define EPLATFORM( einfo_base, platform, ... ) ( { \ + eplatform_discard ( 0, ##__VA_ARGS__ ); \ + ( ( int ) ( __einfo_error ( einfo_base ) | \ + PLATFORM_TO_ERRNO ( platform ) ) ); } ) +static inline void eplatform_discard ( int dummy __unused, ... ) {} + +/** + * Declare error + * + * @v einfo Error information + * @ret error Error + */ +#define __einfo_error( einfo ) ( { \ + __asm__ ( ".section \".einfo\", \"\", @progbits\n\t" \ + ".align 8\n\t" \ + "\n1:\n\t" \ + ".long ( 4f - 1b )\n\t" \ + ".long %c0\n\t" \ + ".long ( 2f - 1b )\n\t" \ + ".long ( 3f - 1b )\n\t" \ + ".long %c1\n\t" \ + "\n2:\t.asciz \"" __einfo_desc ( einfo ) "\"\n\t" \ + "\n3:\t.asciz \"" __FILE__ "\"\n\t" \ + ".align 8\n\t" \ + "\n4:\n\t" \ + ".previous\n\t" : : \ + "i" ( __einfo_errno ( einfo ) ), \ + "i" ( __LINE__ ) ); \ + __einfo_errno ( einfo ); } ) + +/** + * @defgroup posixerrors POSIX error codes + * + * The names and meanings (but not the values) of these error codes + * are defined by POSIX. + * + * @{ + */ + +/** Operation completed successfully */ +#define ENOERR __einfo_error ( EINFO_ENOERR ) +#define EINFO_ENOERR __einfo ( PLATFORM_ENOERR, 0x00, 0, \ + "Operation completed successfully" ) + +/** Argument list too long */ +#define E2BIG __einfo_error ( EINFO_E2BIG ) +#define EINFO_E2BIG __einfo ( PLATFORM_E2BIG, 0x01, 0, \ + "Argument list too long" ) + +/** Permission denied */ +#define EACCES __einfo_error ( EINFO_EACCES ) +#define EINFO_EACCES __einfo ( PLATFORM_EACCES, 0x02, 0, \ + "Permission denied" ) + +/** Address already in use */ +#define EADDRINUSE __einfo_error ( EINFO_EADDRINUSE ) +#define EINFO_EADDRINUSE __einfo ( PLATFORM_EADDRINUSE, 0x03, 0, \ + "Address already in use" ) + +/** Address not available */ +#define EADDRNOTAVAIL __einfo_error ( EINFO_EADDRNOTAVAIL ) +#define EINFO_EADDRNOTAVAIL __einfo ( PLATFORM_EADDRNOTAVAIL, 0x04, 0, \ + "Address not available" ) + +/** Address family not supported */ +#define EAFNOSUPPORT __einfo_error ( EINFO_EAFNOSUPPORT ) +#define EINFO_EAFNOSUPPORT __einfo ( PLATFORM_EAFNOSUPPORT, 0x05, 0, \ + "Address family not supported" ) + +/** Resource temporarily unavailable */ +#define EAGAIN __einfo_error ( EINFO_EAGAIN ) +#define EINFO_EAGAIN __einfo ( PLATFORM_EAGAIN, 0x06, 0, \ + "Resource temporarily unavailable" ) + +/** Connection already in progress */ +#define EALREADY __einfo_error ( EINFO_EALREADY ) +#define EINFO_EALREADY __einfo ( PLATFORM_EALREADY, 0x07, 0, \ + "Connection already in progress" ) + +/** Bad file descriptor */ +#define EBADF __einfo_error ( EINFO_EBADF ) +#define EINFO_EBADF __einfo ( PLATFORM_EBADF, 0x08, 0, \ + "Bad file descriptor" ) + +/** Bad message */ +#define EBADMSG __einfo_error ( EINFO_EBADMSG ) +#define EINFO_EBADMSG __einfo ( PLATFORM_EBADMSG, 0x09, 0, \ + "Bad message" ) + +/** Device or resource busy */ +#define EBUSY __einfo_error ( EINFO_EBUSY ) +#define EINFO_EBUSY __einfo ( PLATFORM_EBUSY, 0x0a, 0, \ + "Device or resource busy" ) + +/** Operation canceled */ +#define ECANCELED __einfo_error ( EINFO_ECANCELED ) +#define EINFO_ECANCELED __einfo ( PLATFORM_ECANCELED, 0x0b, 0, \ + "Operation canceled" ) + +/** No child processes */ +#define ECHILD __einfo_error ( EINFO_ECHILD ) +#define EINFO_ECHILD __einfo ( PLATFORM_ECHILD, 0x0c, 0, \ + "No child processes" ) + +/** Connection aborted */ +#define ECONNABORTED __einfo_error ( EINFO_ECONNABORTED ) +#define EINFO_ECONNABORTED __einfo ( PLATFORM_ECONNABORTED, 0x0d, 0, \ + "Connection aborted" ) + +/** Connection refused */ +#define ECONNREFUSED __einfo_error ( EINFO_ECONNREFUSED ) +#define EINFO_ECONNREFUSED __einfo ( PLATFORM_ECONNREFUSED, 0x0e, 0, \ + "Connection refused" ) + +/** Connection reset */ +#define ECONNRESET __einfo_error ( EINFO_ECONNRESET ) +#define EINFO_ECONNRESET __einfo ( PLATFORM_ECONNRESET, 0x0f, 0, \ + "Connection reset" ) + +/** Resource deadlock avoided */ +#define EDEADLK __einfo_error ( EINFO_EDEADLK ) +#define EINFO_EDEADLK __einfo ( PLATFORM_EDEADLK, 0x10, 0, \ + "Resource deadlock avoided" ) + +/** Destination address required */ +#define EDESTADDRREQ __einfo_error ( EINFO_EDESTADDRREQ ) +#define EINFO_EDESTADDRREQ __einfo ( PLATFORM_EDESTADDRREQ, 0x11, 0, \ + "Destination address required" ) + +/** Mathematics argument out of domain of function */ +#define EDOM __einfo_error ( EINFO_EDOM ) +#define EINFO_EDOM __einfo ( PLATFORM_EDOM, 0x12, 0, \ + "Mathematics argument out of domain of function" ) + +/** Disk quota exceeded */ +#define EDQUOT __einfo_error ( EINFO_EDQUOT ) +#define EINFO_EDQUOT __einfo ( PLATFORM_EDQUOT, 0x13, 0, \ + "Disk quote exceeded" ) + +/** File exists */ +#define EEXIST __einfo_error ( EINFO_EEXIST ) +#define EINFO_EEXIST __einfo ( PLATFORM_EEXIST, 0x14, 0, \ + "File exists" ) + +/** Bad address */ +#define EFAULT __einfo_error ( EINFO_EFAULT ) +#define EINFO_EFAULT __einfo ( PLATFORM_EFAULT, 0x15, 0, \ + "Bad address" ) + +/** File too large */ +#define EFBIG __einfo_error ( EINFO_EFBIG ) +#define EINFO_EFBIG __einfo ( PLATFORM_EFBIG, 0x16, 0, \ + "File too large" ) + +/** Host is unreachable */ +#define EHOSTUNREACH __einfo_error ( EINFO_EHOSTUNREACH ) +#define EINFO_EHOSTUNREACH __einfo ( PLATFORM_EHOSTUNREACH, 0x17, 0, \ + "Host is unreachable" ) + +/** Identifier removed */ +#define EIDRM __einfo_error ( EINFO_EIDRM ) +#define EINFO_EIDRM __einfo ( PLATFORM_EIDRM, 0x18, 0, \ + "Identifier removed" ) + +/** Illegal byte sequence */ +#define EILSEQ __einfo_error ( EINFO_EILSEQ ) +#define EINFO_EILSEQ __einfo ( PLATFORM_EILSEQ, 0x19, 0, \ + "Illegal byte sequence" ) + +/** Operation in progress */ +#define EINPROGRESS __einfo_error ( EINFO_EINPROGRESS ) +#define EINFO_EINPROGRESS __einfo ( PLATFORM_EINPROGRESS, 0x1a, 0, \ + "Operation in progress" ) + +/** Interrupted function call */ +#define EINTR __einfo_error ( EINFO_EINTR ) +#define EINFO_EINTR __einfo ( PLATFORM_EINTR, 0x1b, 0, \ + "Interrupted function call" ) + +/** Invalid argument */ +#define EINVAL __einfo_error ( EINFO_EINVAL ) +#define EINFO_EINVAL __einfo ( PLATFORM_EINVAL, 0x1c, 0, \ + "Invalid argument" ) + +/** Input/output error */ +#define EIO __einfo_error ( EINFO_EIO ) +#define EINFO_EIO __einfo ( PLATFORM_EIO, 0x1d, 0, \ + "Input/output error" ) + +/** Socket is connected */ +#define EISCONN __einfo_error ( EINFO_EISCONN ) +#define EINFO_EISCONN __einfo ( PLATFORM_EISCONN, 0x1e, 0, \ + "Socket is connected" ) + +/** Is a directory */ +#define EISDIR __einfo_error ( EINFO_EISDIR ) +#define EINFO_EISDIR __einfo ( PLATFORM_EISDIR, 0x1f, 0, \ + "Is a directory" ) + +/** Too many levels of symbolic links */ +#define ELOOP __einfo_error ( EINFO_ELOOP ) +#define EINFO_ELOOP __einfo ( PLATFORM_ELOOP, 0x20, 0, \ + "Too many levels of symbolic links" ) + +/** Too many open files */ +#define EMFILE __einfo_error ( EINFO_EMFILE ) +#define EINFO_EMFILE __einfo ( PLATFORM_EMFILE, 0x21, 0, \ + "Too many open files" ) + +/** Too many links */ +#define EMLINK __einfo_error ( EINFO_EMLINK ) +#define EINFO_EMLINK __einfo ( PLATFORM_EMLINK, 0x22, 0, \ + "Too many links" ) + +/** Message too long */ +#define EMSGSIZE __einfo_error ( EINFO_EMSGSIZE ) +#define EINFO_EMSGSIZE __einfo ( PLATFORM_EMSGSIZE, 0x23, 0, \ + "Message too long" ) + +/** Multihop attempted */ +#define EMULTIHOP __einfo_error ( EINFO_EMULTIHOP ) +#define EINFO_EMULTIHOP __einfo ( PLATFORM_EMULTIHOP, 0x24, 0, \ + "Multihop attempted" ) + +/** Filename too long */ +#define ENAMETOOLONG __einfo_error ( EINFO_ENAMETOOLONG ) +#define EINFO_ENAMETOOLONG __einfo ( PLATFORM_ENAMETOOLONG, 0x25, 0, \ + "Filename too long" ) + +/** Network is down */ +#define ENETDOWN __einfo_error ( EINFO_ENETDOWN ) +#define EINFO_ENETDOWN __einfo ( PLATFORM_ENETDOWN, 0x26, 0, \ + "Network is down" ) + +/** Connection aborted by network */ +#define ENETRESET __einfo_error ( EINFO_ENETRESET ) +#define EINFO_ENETRESET __einfo ( PLATFORM_ENETRESET, 0x27, 0, \ + "Connection aborted by network" ) + +/** Network unreachable */ +#define ENETUNREACH __einfo_error ( EINFO_ENETUNREACH ) +#define EINFO_ENETUNREACH __einfo ( PLATFORM_ENETUNREACH, 0x28, 0, \ + "Network unreachable" ) + +/** Too many open files in system */ +#define ENFILE __einfo_error ( EINFO_ENFILE ) +#define EINFO_ENFILE __einfo ( PLATFORM_ENFILE, 0x29, 0, \ + "Too many open files in system" ) + +/** No buffer space available */ +#define ENOBUFS __einfo_error ( EINFO_ENOBUFS ) +#define EINFO_ENOBUFS __einfo ( PLATFORM_ENOBUFS, 0x2a, 0, \ + "No buffer space available" ) + +/** No message is available on the STREAM head read queue */ +#define ENODATA __einfo_error ( EINFO_ENODATA ) +#define EINFO_ENODATA __einfo ( PLATFORM_ENODATA, 0x2b, 0, \ + "No message is available on the STREAM " \ + "head read queue" ) + +/** No such device */ +#define ENODEV __einfo_error ( EINFO_ENODEV ) +#define EINFO_ENODEV __einfo ( PLATFORM_ENODEV, 0x2c, 0, \ + "No such device" ) + +/** No such file or directory */ +#define ENOENT __einfo_error ( EINFO_ENOENT ) +#define EINFO_ENOENT __einfo ( PLATFORM_ENOENT, 0x2d, 0, \ + "No such file or directory" ) + +/** Exec format error */ +#define ENOEXEC __einfo_error ( EINFO_ENOEXEC ) +#define EINFO_ENOEXEC __einfo ( PLATFORM_ENOEXEC, 0x2e, 0, \ + "Exec format error" ) + +/** No locks available */ +#define ENOLCK __einfo_error ( EINFO_ENOLCK ) +#define EINFO_ENOLCK __einfo ( PLATFORM_ENOLCK, 0x2f, 0, \ + "No locks available" ) + +/** Link has been severed */ +#define ENOLINK __einfo_error ( EINFO_ENOLINK ) +#define EINFO_ENOLINK __einfo ( PLATFORM_ENOLINK, 0x30, 0, \ + "Link has been severed" ) + +/** Not enough space */ +#define ENOMEM __einfo_error ( EINFO_ENOMEM ) +#define EINFO_ENOMEM __einfo ( PLATFORM_ENOMEM, 0x31, 0, \ + "Not enough space" ) + +/** No message of the desired type */ +#define ENOMSG __einfo_error ( EINFO_ENOMSG ) +#define EINFO_ENOMSG __einfo ( PLATFORM_ENOMSG, 0x32, 0, \ + "No message of the desired type" ) + +/** Protocol not available */ +#define ENOPROTOOPT __einfo_error ( EINFO_ENOPROTOOPT ) +#define EINFO_ENOPROTOOPT __einfo ( PLATFORM_ENOPROTOOPT, 0x33, 0, \ + "Protocol not available" ) + +/** No space left on device */ +#define ENOSPC __einfo_error ( EINFO_ENOSPC ) +#define EINFO_ENOSPC __einfo ( PLATFORM_ENOSPC, 0x34, 0, \ + "No space left on device" ) + +/** No STREAM resources */ +#define ENOSR __einfo_error ( EINFO_ENOSR ) +#define EINFO_ENOSR __einfo ( PLATFORM_ENOSR, 0x35, 0, \ + "No STREAM resources" ) + +/** Not a STREAM */ +#define ENOSTR __einfo_error ( EINFO_ENOSTR ) +#define EINFO_ENOSTR __einfo ( PLATFORM_ENOSTR, 0x36, 0, \ + "Not a STREAM" ) + +/** Function not implemented */ +#define ENOSYS __einfo_error ( EINFO_ENOSYS ) +#define EINFO_ENOSYS __einfo ( PLATFORM_ENOSYS, 0x37, 0, \ + "Function not implemented" ) + +/** The socket is not connected */ +#define ENOTCONN __einfo_error ( EINFO_ENOTCONN ) +#define EINFO_ENOTCONN __einfo ( PLATFORM_ENOTCONN, 0x38, 0, \ + "The socket is not connected" ) + +/** Not a directory */ +#define ENOTDIR __einfo_error ( EINFO_ENOTDIR ) +#define EINFO_ENOTDIR __einfo ( PLATFORM_ENOTDIR, 0x39, 0, \ + "Not a directory" ) + +/** Directory not empty */ +#define ENOTEMPTY __einfo_error ( EINFO_ENOTEMPTY ) +#define EINFO_ENOTEMPTY __einfo ( PLATFORM_ENOTEMPTY, 0x3a, 0, \ + "Directory not empty" ) + +/** Not a socket */ +#define ENOTSOCK __einfo_error ( EINFO_ENOTSOCK ) +#define EINFO_ENOTSOCK __einfo ( PLATFORM_ENOTSOCK, 0x3b, 0, \ + "Not a socket" ) + +/** Operation not supported */ +#define ENOTSUP __einfo_error ( EINFO_ENOTSUP ) +#define EINFO_ENOTSUP __einfo ( PLATFORM_ENOTSUP, 0x3c, 0, \ + "Operation not supported" ) + +/** Inappropriate I/O control operation */ +#define ENOTTY __einfo_error ( EINFO_ENOTTY ) +#define EINFO_ENOTTY __einfo ( PLATFORM_ENOTTY, 0x3d, 0, \ + "Inappropriate I/O control operation" ) + +/** No such device or address */ +#define ENXIO __einfo_error ( EINFO_ENXIO ) +#define EINFO_ENXIO __einfo ( PLATFORM_ENXIO, 0x3e, 0, \ + "No such device or address" ) + +/** Operation not supported on socket */ +#define EOPNOTSUPP __einfo_error ( EINFO_EOPNOTSUPP ) +#define EINFO_EOPNOTSUPP __einfo ( PLATFORM_EOPNOTSUPP, 0x3f, 0, \ + "Operation not supported on socket" ) + +/** Value too large to be stored in data type */ +#define EOVERFLOW __einfo_error ( EINFO_EOVERFLOW ) +#define EINFO_EOVERFLOW __einfo ( PLATFORM_EOVERFLOW, 0x40, 0, \ + "Value too large to be stored in data type" ) + +/** Operation not permitted */ +#define EPERM __einfo_error ( EINFO_EPERM ) +#define EINFO_EPERM __einfo ( PLATFORM_EPERM, 0x41, 0, \ + "Operation not permitted" ) + +/** Broken pipe */ +#define EPIPE __einfo_error ( EINFO_EPIPE ) +#define EINFO_EPIPE __einfo ( PLATFORM_EPIPE, 0x42, 0, \ + "Broken pipe" ) + +/** Protocol error */ +#define EPROTO __einfo_error ( EINFO_EPROTO ) +#define EINFO_EPROTO __einfo ( PLATFORM_EPROTO, 0x43, 0, \ + "Protocol error" ) + +/** Protocol not supported */ +#define EPROTONOSUPPORT __einfo_error ( EINFO_EPROTONOSUPPORT ) +#define EINFO_EPROTONOSUPPORT __einfo ( PLATFORM_EPROTONOSUPPORT, 0x44, 0, \ + "Protocol not supported" ) + +/** Protocol wrong type for socket */ +#define EPROTOTYPE __einfo_error ( EINFO_EPROTOTYPE ) +#define EINFO_EPROTOTYPE __einfo ( PLATFORM_EPROTOTYPE, 0x45, 0, \ + "Protocol wrong type for socket" ) + +/** Result too large */ +#define ERANGE __einfo_error ( EINFO_ERANGE ) +#define EINFO_ERANGE __einfo ( PLATFORM_ERANGE, 0x46, 0, \ + "Result too large" ) + +/** Read-only file system */ +#define EROFS __einfo_error ( EINFO_EROFS ) +#define EINFO_EROFS __einfo ( PLATFORM_EROFS, 0x47, 0, \ + "Read-only file system" ) + +/** Invalid seek */ +#define ESPIPE __einfo_error ( EINFO_ESPIPE ) +#define EINFO_ESPIPE __einfo ( PLATFORM_ESPIPE, 0x48, 0, \ + "Invalid seek" ) + +/** No such process */ +#define ESRCH __einfo_error ( EINFO_ESRCH ) +#define EINFO_ESRCH __einfo ( PLATFORM_ESRCH, 0x49, 0, \ + "No such process" ) + +/** Stale file handle */ +#define ESTALE __einfo_error ( EINFO_ESTALE ) +#define EINFO_ESTALE __einfo ( PLATFORM_ESTALE, 0x4a, 0, \ + "Stale file handle" ) + +/** Timer expired */ +#define ETIME __einfo_error ( EINFO_ETIME ) +#define EINFO_ETIME __einfo ( PLATFORM_ETIME, 0x4b, 0, \ + "Timer expired" ) + +/** Connection timed out */ +#define ETIMEDOUT __einfo_error ( EINFO_ETIMEDOUT ) +#define EINFO_ETIMEDOUT __einfo ( PLATFORM_ETIMEDOUT, 0x4c, 0, \ + "Connection timed out" ) + +/** Text file busy */ +#define ETXTBSY __einfo_error ( EINFO_ETXTBSY ) +#define EINFO_ETXTBSY __einfo ( PLATFORM_ETXTBSY, 0x4d, 0, \ + "Text file busy" ) + +/** Operation would block */ +#define EWOULDBLOCK __einfo_error ( EINFO_EWOULDBLOCK ) +#define EINFO_EWOULDBLOCK __einfo ( PLATFORM_EWOULDBLOCK, 0x4e, 0, \ + "Operation would block" ) + +/** Improper link */ +#define EXDEV __einfo_error ( EINFO_EXDEV ) +#define EINFO_EXDEV __einfo ( PLATFORM_EXDEV, 0x4f, 0, \ + "Improper link" ) + +/** @} */ + +/** Platform-generated base error */ +#define EINFO_EPLATFORM __einfo ( 0, 0x7f, 0, "Platform-generated error" ) + +extern int errno; + +#endif /* ERRNO_H */ diff --git a/qemu/roms/ipxe/src/include/etherboot.h b/qemu/roms/ipxe/src/include/etherboot.h new file mode 100644 index 000000000..ba79cb16a --- /dev/null +++ b/qemu/roms/ipxe/src/include/etherboot.h @@ -0,0 +1,43 @@ +#ifndef ETHERBOOT_H +#define ETHERBOOT_H + +/* + * Standard includes that we always want + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <stdint.h> +#include <stdlib.h> +#include <stdio.h> +#include <unistd.h> +#include <strings.h> +#include <ipxe/timer.h> +#include <ipxe/if_arp.h> +#include <ipxe/if_ether.h> + +typedef unsigned long Address; + +/* + * IMPORTANT!!!!!!!!!!!!!! + * + * Everything below this point is cruft left over from older versions + * of Etherboot. Do not add *anything* below this point. Things are + * gradually being moved to individual header files. + * + */ + +/* Link configuration time in tenths of a second */ +#ifndef VALID_LINK_TIMEOUT +#define VALID_LINK_TIMEOUT 100 /* 10.0 seconds */ +#endif + +/* + * Local variables: + * c-basic-offset: 8 + * End: + */ + +#endif /* ETHERBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/fs.h b/qemu/roms/ipxe/src/include/fs.h new file mode 100644 index 000000000..1dfe8fd9e --- /dev/null +++ b/qemu/roms/ipxe/src/include/fs.h @@ -0,0 +1,41 @@ +#ifndef FS_H +#define FS_H + +#include <stdint.h> + +//typedef uint64_t sector_t; + +#ifdef IDE_DISK +int ide_probe(int drive); +int ide_read(int drive, sector_t sector, void *buffer); +#endif + +#ifdef USB_DISK +int usb_probe(int drive); +int usb_read(int drive, sector_t sector, void *buffer); +#endif + +#define DISK_IDE 1 +#define DISK_MEM 2 +#define DISK_USB 3 + +int devopen(const char *name, int *reopen); +int devread(unsigned long sector, unsigned long byte_offset, + unsigned long byte_len, void *buf); + +int file_open(const char *filename); +int file_read(void *buf, unsigned long len); +int file_seek(unsigned long offset); +unsigned long file_size(void); + +#define PARTITION_UNKNOWN 0xbad6a7 + +#ifdef ELTORITO +int open_eltorito_image(int part, unsigned long *start, unsigned long *length); +#else +# define open_eltorito_image(x,y,z) PARTITION_UNKNOWN +#endif + +extern int using_devsize; + +#endif /* FS_H */ diff --git a/qemu/roms/ipxe/src/include/getopt.h b/qemu/roms/ipxe/src/include/getopt.h new file mode 100644 index 000000000..0fe43567e --- /dev/null +++ b/qemu/roms/ipxe/src/include/getopt.h @@ -0,0 +1,94 @@ +#ifndef _GETOPT_H +#define _GETOPT_H + +/** @file + * + * Parse command-line options + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> + +enum getopt_argument_requirement { + /** Option does not take an argument */ + no_argument = 0, + /** Option requires an argument */ + required_argument = 1, + /** Option may have an argument */ + optional_argument = 2, +}; + +/** A long option, as used for getopt_long() */ +struct option { + /** Long name of this option */ + const char *name; + /** Option takes an argument + * + * Must be one of @c no_argument, @c required_argument, or @c + * optional_argument. + */ + int has_arg; + /** Location into which to store @c val, or NULL. + * + * See the description for @c val for more details. + */ + int *flag; + /** Value to return + * + * If @c flag is NULL, then this is the value that will be + * returned by getopt_long() when this option is found, and + * should therefore be set to the equivalent short option + * character. + * + * If @c flag is non-NULL, then this value will be written to + * the location pointed to by @flag, and getopt_long() will + * return 0. + */ + int val; +}; + +extern char *optarg; +extern int optind; +extern int nextchar; +extern int optopt; + +extern int getopt_long ( int argc, char * const argv[], const char *optstring, + const struct option *longopts, int *longindex ); + +/** + * Parse command-line options + * + * @v argv Argument count + * @v argv Argument list + * @v optstring Option specification string + * @ret option Option found, or -1 for no more options + * + * See getopt_long() for full details. + */ +static inline int getopt ( int argc, char * const argv[], + const char *optstring ) { + static const struct option no_options[] = { + { NULL, 0, NULL, 0 } + }; + return getopt_long ( argc, argv, optstring, no_options, NULL ); +} + +/** + * Reset getopt() internal state + * + * Due to a limitation of the POSIX getopt() API, it is necessary to + * add a call to reset_getopt() before each set of calls to getopt() + * or getopt_long(). This arises because POSIX assumes that each + * process will parse command line arguments no more than once; this + * assumption is not valid within Etherboot. We work around the + * limitation by arranging for execv() to call reset_getopt() before + * executing the command. + */ +static inline void reset_getopt ( void ) { + optind = 1; + nextchar = 0; +} + +#endif /* _GETOPT_H */ diff --git a/qemu/roms/ipxe/src/include/hci/ifmgmt_cmd.h b/qemu/roms/ipxe/src/include/hci/ifmgmt_cmd.h new file mode 100644 index 000000000..913b911d8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/hci/ifmgmt_cmd.h @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _IFMGMT_CMD_H +#define _IFMGMT_CMD_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/parseopt.h> + +struct net_device; + +/** An "if<xxx>" command descriptor */ +struct ifcommon_command_descriptor { + /** Command descriptor */ + struct command_descriptor cmd; + /** Payload + * + * @v netdev Network device + * @v opts Command options + * @ret rc Return status code + */ + int ( * payload ) ( struct net_device *netdev, void *opts ); + /** Stop on first success */ + int stop_on_first_success; +}; + +/** + * Construct "if<xxx>" command descriptor + * + * @v _struct Options structure type + * @v _options Option descriptor array + * @v _check_args Remaining argument checker + * @v _usage Command usage + * @ret _command Command descriptor + */ +#define IFCOMMON_COMMAND_DESC( _struct, _options, _min_args, \ + _max_args, _usage, _payload, \ + _stop_on_first_success ) \ + { \ + .cmd = COMMAND_DESC ( _struct, _options, _min_args, \ + _max_args, _usage ), \ + .payload = ( ( int ( * ) ( struct net_device *netdev, \ + void *opts ) ) \ + ( ( ( ( int ( * ) ( struct net_device *, \ + _struct * ) ) NULL ) \ + == ( typeof ( _payload ) * ) NULL ) \ + ? _payload : _payload ) ), \ + .stop_on_first_success = _stop_on_first_success, \ + } + +extern int ifcommon_exec ( int argc, char **argv, + struct ifcommon_command_descriptor *cmd ); +extern int ifconf_exec ( int argc, char **argv ); + +#endif /* _IFMGMT_CMD_H */ diff --git a/qemu/roms/ipxe/src/include/hci/linux_args.h b/qemu/roms/ipxe/src/include/hci/linux_args.h new file mode 100644 index 000000000..ae1ed0526 --- /dev/null +++ b/qemu/roms/ipxe/src/include/hci/linux_args.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2010 Piotr Jaroszyński <p.jaroszynski@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef _HCI_LINUX_ARGS_H +#define _HCI_LINUX_ARGS_H + +FILE_LICENCE(GPL2_OR_LATER); + +/** + * Save argc and argv for later access. + * + * To be called by linuxprefix + */ +extern __asmcall void save_args(int argc, char **argv); + +#endif /* _HCI_LINUX_ARGS_H */ diff --git a/qemu/roms/ipxe/src/include/i82365.h b/qemu/roms/ipxe/src/include/i82365.h new file mode 100644 index 000000000..a6f2b17bc --- /dev/null +++ b/qemu/roms/ipxe/src/include/i82365.h @@ -0,0 +1,452 @@ +/* + * i82365.h 1.15 1999/10/25 20:03:34 + * + * The contents of this file may be used under the + * terms of the GNU General Public License version 2 (the "GPL"). + * + * Software distributed under the License is distributed on an "AS IS" + * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See + * the License for the specific language governing rights and + * limitations under the License. + * + * The initial developer of the original code is David A. Hinds + * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds + * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. + */ + +FILE_LICENCE ( GPL2_ONLY ); + +#ifndef _LINUX_I82365_H +#define _LINUX_I82365_H + +/* register definitions for the Intel 82365SL PCMCIA controller */ + +/* Offsets for PCIC registers */ +#define I365_IDENT 0x00 /* Identification and revision */ +#define I365_STATUS 0x01 /* Interface status */ +#define I365_POWER 0x02 /* Power and RESETDRV control */ +#define I365_INTCTL 0x03 /* Interrupt and general control */ +#define I365_CSC 0x04 /* Card status change */ +#define I365_CSCINT 0x05 /* Card status change interrupt control */ +#define I365_ADDRWIN 0x06 /* Address window enable */ +#define I365_IOCTL 0x07 /* I/O control */ +#define I365_GENCTL 0x16 /* Card detect and general control */ +#define I365_GBLCTL 0x1E /* Global control register */ + +/* Offsets for I/O and memory window registers */ +#define I365_IO(map) (0x08+((map)<<2)) +#define I365_MEM(map) (0x10+((map)<<3)) +#define I365_W_START 0 +#define I365_W_STOP 2 +#define I365_W_OFF 4 + +/* Flags for I365_STATUS */ +#define I365_CS_BVD1 0x01 +#define I365_CS_STSCHG 0x01 +#define I365_CS_BVD2 0x02 +#define I365_CS_SPKR 0x02 +#define I365_CS_DETECT 0x0C +#define I365_CS_WRPROT 0x10 +#define I365_CS_READY 0x20 /* Inverted */ +#define I365_CS_POWERON 0x40 +#define I365_CS_GPI 0x80 + +/* Flags for I365_POWER */ +#define I365_PWR_OFF 0x00 /* Turn off the socket */ +#define I365_PWR_OUT 0x80 /* Output enable */ +#define I365_PWR_NORESET 0x40 /* Disable RESETDRV on resume */ +#define I365_PWR_AUTO 0x20 /* Auto pwr switch enable */ +#define I365_VCC_MASK 0x18 /* Mask for turning off Vcc */ +/* There are different layouts for B-step and DF-step chips: the B + step has independent Vpp1/Vpp2 control, and the DF step has only + Vpp1 control, plus 3V control */ +#define I365_VCC_5V 0x10 /* Vcc = 5.0v */ +#define I365_VCC_3V 0x18 /* Vcc = 3.3v */ +#define I365_VPP2_MASK 0x0c /* Mask for turning off Vpp2 */ +#define I365_VPP2_5V 0x04 /* Vpp2 = 5.0v */ +#define I365_VPP2_12V 0x08 /* Vpp2 = 12.0v */ +#define I365_VPP1_MASK 0x03 /* Mask for turning off Vpp1 */ +#define I365_VPP1_5V 0x01 /* Vpp2 = 5.0v */ +#define I365_VPP1_12V 0x02 /* Vpp2 = 12.0v */ + +/* Flags for I365_INTCTL */ +#define I365_RING_ENA 0x80 +#define I365_PC_RESET 0x40 +#define I365_PC_IOCARD 0x20 +#define I365_INTR_ENA 0x10 +#define I365_IRQ_MASK 0x0F + +/* Flags for I365_CSC and I365_CSCINT*/ +#define I365_CSC_BVD1 0x01 +#define I365_CSC_STSCHG 0x01 +#define I365_CSC_BVD2 0x02 +#define I365_CSC_READY 0x04 +#define I365_CSC_DETECT 0x08 +#define I365_CSC_ANY 0x0F +#define I365_CSC_GPI 0x10 + +/* Flags for I365_ADDRWIN */ +#define I365_ENA_IO(map) (0x40 << (map)) +#define I365_ENA_MEM(map) (0x01 << (map)) + +/* Flags for I365_IOCTL */ +#define I365_IOCTL_MASK(map) (0x0F << (map<<2)) +#define I365_IOCTL_WAIT(map) (0x08 << (map<<2)) +#define I365_IOCTL_0WS(map) (0x04 << (map<<2)) +#define I365_IOCTL_IOCS16(map) (0x02 << (map<<2)) +#define I365_IOCTL_16BIT(map) (0x01 << (map<<2)) + +/* Flags for I365_GENCTL */ +#define I365_CTL_16DELAY 0x01 +#define I365_CTL_RESET 0x02 +#define I365_CTL_GPI_ENA 0x04 +#define I365_CTL_GPI_CTL 0x08 +#define I365_CTL_RESUME 0x10 +#define I365_CTL_SW_IRQ 0x20 + +/* Flags for I365_GBLCTL */ +#define I365_GBL_PWRDOWN 0x01 +#define I365_GBL_CSC_LEV 0x02 +#define I365_GBL_WRBACK 0x04 +#define I365_GBL_IRQ_0_LEV 0x08 +#define I365_GBL_IRQ_1_LEV 0x10 + +/* Flags for memory window registers */ +#define I365_MEM_16BIT 0x8000 /* In memory start high byte */ +#define I365_MEM_0WS 0x4000 +#define I365_MEM_WS1 0x8000 /* In memory stop high byte */ +#define I365_MEM_WS0 0x4000 +#define I365_MEM_WRPROT 0x8000 /* In offset high byte */ +#define I365_MEM_REG 0x4000 + +#define I365_REG(slot, reg) (((slot) << 6) + reg) + +#endif /* _LINUX_I82365_H */ + +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +// Beginning vg468.h (for VADEM chipset) + +#ifndef _LINUX_VG468_H +#define _LINUX_VG468_H + +/* Special bit in I365_IDENT used for Vadem chip detection */ +#define I365_IDENT_VADEM 0x08 + +/* Special definitions in I365_POWER */ +#define VG468_VPP2_MASK 0x0c +#define VG468_VPP2_5V 0x04 +#define VG468_VPP2_12V 0x08 + +/* Unique Vadem registers */ +#define VG469_VSENSE 0x1f /* Card voltage sense */ +#define VG469_VSELECT 0x2f /* Card voltage select */ +#define VG468_CTL 0x38 /* Control register */ +#define VG468_TIMER 0x39 /* Timer control */ +#define VG468_MISC 0x3a /* Miscellaneous */ +#define VG468_GPIO_CFG 0x3b /* GPIO configuration */ +#define VG469_EXT_MODE 0x3c /* Extended mode register */ +#define VG468_SELECT 0x3d /* Programmable chip select */ +#define VG468_SELECT_CFG 0x3e /* Chip select configuration */ +#define VG468_ATA 0x3f /* ATA control */ + +/* Flags for VG469_VSENSE */ +#define VG469_VSENSE_A_VS1 0x01 +#define VG469_VSENSE_A_VS2 0x02 +#define VG469_VSENSE_B_VS1 0x04 +#define VG469_VSENSE_B_VS2 0x08 + +/* Flags for VG469_VSELECT */ +#define VG469_VSEL_VCC 0x03 +#define VG469_VSEL_5V 0x00 +#define VG469_VSEL_3V 0x03 +#define VG469_VSEL_MAX 0x0c +#define VG469_VSEL_EXT_STAT 0x10 +#define VG469_VSEL_EXT_BUS 0x20 +#define VG469_VSEL_MIXED 0x40 +#define VG469_VSEL_ISA 0x80 + +/* Flags for VG468_CTL */ +#define VG468_CTL_SLOW 0x01 /* 600ns memory timing */ +#define VG468_CTL_ASYNC 0x02 /* Asynchronous bus clocking */ +#define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */ +#define VG468_CTL_DELAY 0x10 /* Card detect debounce */ +#define VG468_CTL_INPACK 0x20 /* Obey INPACK signal? */ +#define VG468_CTL_POLARITY 0x40 /* VCCEN polarity */ +#define VG468_CTL_COMPAT 0x80 /* Compatibility stuff */ + +#define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */ +#define VG469_CTL_STRETCH 0x10 /* LED stretch */ + +/* Flags for VG468_TIMER */ +#define VG468_TIMER_ZEROPWR 0x10 /* Zero power control */ +#define VG468_TIMER_SIGEN 0x20 /* Power up */ +#define VG468_TIMER_STATUS 0x40 /* Activity timer status */ +#define VG468_TIMER_RES 0x80 /* Timer resolution */ +#define VG468_TIMER_MASK 0x0f /* Activity timer timeout */ + +/* Flags for VG468_MISC */ +#define VG468_MISC_GPIO 0x04 /* General-purpose IO */ +#define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */ +#define VG469_MISC_LEDENA 0x10 /* LED enable */ +#define VG468_MISC_VADEMREV 0x40 /* Vadem revision control */ +#define VG468_MISC_UNLOCK 0x80 /* Unique register lock */ + +/* Flags for VG469_EXT_MODE_A */ +#define VG469_MODE_VPPST 0x03 /* Vpp steering control */ +#define VG469_MODE_INT_SENSE 0x04 /* Internal voltage sense */ +#define VG469_MODE_CABLE 0x08 +#define VG469_MODE_COMPAT 0x10 /* i82365sl B or DF step */ +#define VG469_MODE_TEST 0x20 +#define VG469_MODE_RIO 0x40 /* Steer RIO to INTR? */ + +/* Flags for VG469_EXT_MODE_B */ +#define VG469_MODE_B_3V 0x01 /* 3.3v for socket B */ + +#endif /* _LINUX_VG468_H */ + + +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +// Beginning ricoh.h (RICOH chipsets) + +#ifndef _LINUX_RICOH_H +#define _LINUX_RICOH_H + + +#define RF5C_MODE_CTL 0x1f /* Mode control */ +#define RF5C_PWR_CTL 0x2f /* Mixed voltage control */ +#define RF5C_CHIP_ID 0x3a /* Chip identification */ +#define RF5C_MODE_CTL_3 0x3b /* Mode control 3 */ + +/* I/O window address offset */ +#define RF5C_IO_OFF(w) (0x36+((w)<<1)) + +/* Flags for RF5C_MODE_CTL */ +#define RF5C_MODE_ATA 0x01 /* ATA mode */ +#define RF5C_MODE_LED_ENA 0x02 /* IRQ 12 is LED */ +#define RF5C_MODE_CA21 0x04 +#define RF5C_MODE_CA22 0x08 +#define RF5C_MODE_CA23 0x10 +#define RF5C_MODE_CA24 0x20 +#define RF5C_MODE_CA25 0x40 +#define RF5C_MODE_3STATE_BIT7 0x80 + +/* Flags for RF5C_PWR_CTL */ +#define RF5C_PWR_VCC_3V 0x01 +#define RF5C_PWR_IREQ_HIGH 0x02 +#define RF5C_PWR_INPACK_ENA 0x04 +#define RF5C_PWR_5V_DET 0x08 +#define RF5C_PWR_TC_SEL 0x10 /* Terminal Count: irq 11 or 15 */ +#define RF5C_PWR_DREQ_LOW 0x20 +#define RF5C_PWR_DREQ_OFF 0x00 /* DREQ steering control */ +#define RF5C_PWR_DREQ_INPACK 0x40 +#define RF5C_PWR_DREQ_SPKR 0x80 +#define RF5C_PWR_DREQ_IOIS16 0xc0 + +/* Values for RF5C_CHIP_ID */ +#define RF5C_CHIP_RF5C296 0x32 +#define RF5C_CHIP_RF5C396 0xb2 + +/* Flags for RF5C_MODE_CTL_3 */ +#define RF5C_MCTL3_DISABLE 0x01 /* Disable PCMCIA interface */ +#define RF5C_MCTL3_DMA_ENA 0x02 + +/* Register definitions for Ricoh PCI-to-CardBus bridges */ + +/* Extra bits in CB_BRIDGE_CONTROL */ +#define RL5C46X_BCR_3E0_ENA 0x0800 +#define RL5C46X_BCR_3E2_ENA 0x1000 + +/* Bridge Configuration Register */ +#define RL5C4XX_CONFIG 0x80 /* 16 bit */ +#define RL5C4XX_CONFIG_IO_1_MODE 0x0200 +#define RL5C4XX_CONFIG_IO_0_MODE 0x0100 +#define RL5C4XX_CONFIG_PREFETCH 0x0001 + + +/* Misc Control Register */ +#define RL5C4XX_MISC 0x0082 /* 16 bit */ +#define RL5C4XX_MISC_HW_SUSPEND_ENA 0x0002 +#define RL5C4XX_MISC_VCCEN_POL 0x0100 +#define RL5C4XX_MISC_VPPEN_POL 0x0200 +#define RL5C46X_MISC_SUSPEND 0x0001 +#define RL5C46X_MISC_PWR_SAVE_2 0x0004 +#define RL5C46X_MISC_IFACE_BUSY 0x0008 +#define RL5C46X_MISC_B_LOCK 0x0010 +#define RL5C46X_MISC_A_LOCK 0x0020 +#define RL5C46X_MISC_PCI_LOCK 0x0040 +#define RL5C47X_MISC_IFACE_BUSY 0x0004 +#define RL5C47X_MISC_PCI_INT_MASK 0x0018 +#define RL5C47X_MISC_PCI_INT_DIS 0x0020 +#define RL5C47X_MISC_SUBSYS_WR 0x0040 +#define RL5C47X_MISC_SRIRQ_ENA 0x0080 +#define RL5C47X_MISC_5V_DISABLE 0x0400 +#define RL5C47X_MISC_LED_POL 0x0800 + +/* 16-bit Interface Control Register */ +#define RL5C4XX_16BIT_CTL 0x0084 /* 16 bit */ +#define RL5C4XX_16CTL_IO_TIMING 0x0100 +#define RL5C4XX_16CTL_MEM_TIMING 0x0200 +#define RL5C46X_16CTL_LEVEL_1 0x0010 +#define RL5C46X_16CTL_LEVEL_2 0x0020 + +/* 16-bit IO and memory timing registers */ +#define RL5C4XX_16BIT_IO_0 0x0088 /* 16 bit */ +#define RL5C4XX_16BIT_MEM_0 0x0088 /* 16 bit */ +#define RL5C4XX_SETUP_MASK 0x0007 +#define RL5C4XX_SETUP_SHIFT 0 +#define RL5C4XX_CMD_MASK 0x01f0 +#define RL5C4XX_CMD_SHIFT 4 +#define RL5C4XX_HOLD_MASK 0x1c00 +#define RL5C4XX_HOLD_SHIFT 10 +#define RL5C4XX_MISC_CONTROL 0x2F /* 8 bit */ +#define RL5C4XX_ZV_ENABLE 0x08 + +#endif /* _LINUX_RICOH_H */ + + +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +//***************************************************************************** +// Beginning cirrus.h (CIRRUS chipsets) + +#ifndef _LINUX_CIRRUS_H +#define _LINUX_CIRRUS_H + +#ifndef PCI_VENDOR_ID_CIRRUS +#define PCI_VENDOR_ID_CIRRUS 0x1013 +#endif +#ifndef PCI_DEVICE_ID_CIRRUS_6729 +#define PCI_DEVICE_ID_CIRRUS_6729 0x1100 +#endif +#ifndef PCI_DEVICE_ID_CIRRUS_6832 +#define PCI_DEVICE_ID_CIRRUS_6832 0x1110 +#endif + +#define PD67_MISC_CTL_1 0x16 /* Misc control 1 */ +#define PD67_FIFO_CTL 0x17 /* FIFO control */ +#define PD67_MISC_CTL_2 0x1E /* Misc control 2 */ +#define PD67_CHIP_INFO 0x1f /* Chip information */ +#define PD67_ATA_CTL 0x026 /* 6730: ATA control */ +#define PD67_EXT_INDEX 0x2e /* Extension index */ +#define PD67_EXT_DATA 0x2f /* Extension data */ + +/* PD6722 extension registers -- indexed in PD67_EXT_INDEX */ +#define PD67_DATA_MASK0 0x01 /* Data mask 0 */ +#define PD67_DATA_MASK1 0x02 /* Data mask 1 */ +#define PD67_DMA_CTL 0x03 /* DMA control */ + +/* PD6730 extension registers -- indexed in PD67_EXT_INDEX */ +#define PD67_EXT_CTL_1 0x03 /* Extension control 1 */ +#define PD67_MEM_PAGE(n) ((n)+5) /* PCI window bits 31:24 */ +#define PD67_EXTERN_DATA 0x0a +#define PD67_MISC_CTL_3 0x25 +#define PD67_SMB_PWR_CTL 0x26 + +/* I/O window address offset */ +#define PD67_IO_OFF(w) (0x36+((w)<<1)) + +/* Timing register sets */ +#define PD67_TIME_SETUP(n) (0x3a + 3*(n)) +#define PD67_TIME_CMD(n) (0x3b + 3*(n)) +#define PD67_TIME_RECOV(n) (0x3c + 3*(n)) + +/* Flags for PD67_MISC_CTL_1 */ +#define PD67_MC1_5V_DET 0x01 /* 5v detect */ +#define PD67_MC1_MEDIA_ENA 0x01 /* 6730: Multimedia enable */ +#define PD67_MC1_VCC_3V 0x02 /* 3.3v Vcc */ +#define PD67_MC1_PULSE_MGMT 0x04 +#define PD67_MC1_PULSE_IRQ 0x08 +#define PD67_MC1_SPKR_ENA 0x10 +#define PD67_MC1_INPACK_ENA 0x80 + +/* Flags for PD67_FIFO_CTL */ +#define PD67_FIFO_EMPTY 0x80 + +/* Flags for PD67_MISC_CTL_2 */ +#define PD67_MC2_FREQ_BYPASS 0x01 +#define PD67_MC2_DYNAMIC_MODE 0x02 +#define PD67_MC2_SUSPEND 0x04 +#define PD67_MC2_5V_CORE 0x08 +#define PD67_MC2_LED_ENA 0x10 /* IRQ 12 is LED enable */ +#define PD67_MC2_FAST_PCI 0x10 /* 6729: PCI bus > 25 MHz */ +#define PD67_MC2_3STATE_BIT7 0x20 /* Floppy change bit */ +#define PD67_MC2_DMA_MODE 0x40 +#define PD67_MC2_IRQ15_RI 0x80 /* IRQ 15 is ring enable */ + +/* Flags for PD67_CHIP_INFO */ +#define PD67_INFO_SLOTS 0x20 /* 0 = 1 slot, 1 = 2 slots */ +#define PD67_INFO_CHIP_ID 0xc0 +#define PD67_INFO_REV 0x1c + +/* Fields in PD67_TIME_* registers */ +#define PD67_TIME_SCALE 0xc0 +#define PD67_TIME_SCALE_1 0x00 +#define PD67_TIME_SCALE_16 0x40 +#define PD67_TIME_SCALE_256 0x80 +#define PD67_TIME_SCALE_4096 0xc0 +#define PD67_TIME_MULT 0x3f + +/* Fields in PD67_DMA_CTL */ +#define PD67_DMA_MODE 0xc0 +#define PD67_DMA_OFF 0x00 +#define PD67_DMA_DREQ_INPACK 0x40 +#define PD67_DMA_DREQ_WP 0x80 +#define PD67_DMA_DREQ_BVD2 0xc0 +#define PD67_DMA_PULLUP 0x20 /* Disable socket pullups? */ + +/* Fields in PD67_EXT_CTL_1 */ +#define PD67_EC1_VCC_PWR_LOCK 0x01 +#define PD67_EC1_AUTO_PWR_CLEAR 0x02 +#define PD67_EC1_LED_ENA 0x04 +#define PD67_EC1_INV_CARD_IRQ 0x08 +#define PD67_EC1_INV_MGMT_IRQ 0x10 +#define PD67_EC1_PULLUP_CTL 0x20 + +/* Fields in PD67_MISC_CTL_3 */ +#define PD67_MC3_IRQ_MASK 0x03 +#define PD67_MC3_IRQ_PCPCI 0x00 +#define PD67_MC3_IRQ_EXTERN 0x01 +#define PD67_MC3_IRQ_PCIWAY 0x02 +#define PD67_MC3_IRQ_PCI 0x03 +#define PD67_MC3_PWR_MASK 0x0c +#define PD67_MC3_PWR_SERIAL 0x00 +#define PD67_MC3_PWR_TI2202 0x08 +#define PD67_MC3_PWR_SMB 0x0c + +/* Register definitions for Cirrus PD6832 PCI-to-CardBus bridge */ + +/* PD6832 extension registers -- indexed in PD67_EXT_INDEX */ +#define PD68_EXT_CTL_2 0x0b +#define PD68_PCI_SPACE 0x22 +#define PD68_PCCARD_SPACE 0x23 +#define PD68_WINDOW_TYPE 0x24 +#define PD68_EXT_CSC 0x2e +#define PD68_MISC_CTL_4 0x2f +#define PD68_MISC_CTL_5 0x30 +#define PD68_MISC_CTL_6 0x31 + +/* Extra flags in PD67_MISC_CTL_3 */ +#define PD68_MC3_HW_SUSP 0x10 +#define PD68_MC3_MM_EXPAND 0x40 +#define PD68_MC3_MM_ARM 0x80 + +/* Bridge Control Register */ +#define PD6832_BCR_MGMT_IRQ_ENA 0x0800 + +/* Socket Number Register */ +#define PD6832_SOCKET_NUMBER 0x004c /* 8 bit */ + +#endif /* _LINUX_CIRRUS_H */ + + + diff --git a/qemu/roms/ipxe/src/include/ipxe/acpi.h b/qemu/roms/ipxe/src/include/ipxe/acpi.h new file mode 100644 index 000000000..282b6d92d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/acpi.h @@ -0,0 +1,63 @@ +#ifndef _IPXE_ACPI_H +#define _IPXE_ACPI_H + +/** @file + * + * ACPI data structures + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/interface.h> + +/** + * An ACPI description header + * + * This is the structure common to the start of all ACPI system + * description tables. + */ +struct acpi_description_header { + /** ACPI signature (4 ASCII characters) */ + uint32_t signature; + /** Length of table, in bytes, including header */ + uint32_t length; + /** ACPI Specification minor version number */ + uint8_t revision; + /** To make sum of entire table == 0 */ + uint8_t checksum; + /** OEM identification */ + char oem_id[6]; + /** OEM table identification */ + char oem_table_id[8]; + /** OEM revision number */ + uint32_t oem_revision; + /** ASL compiler vendor ID */ + char asl_compiler_id[4]; + /** ASL compiler revision number */ + uint32_t asl_compiler_revision; +} __attribute__ (( packed )); + +/** + * Build ACPI signature + * + * @v a First character of ACPI signature + * @v b Second character of ACPI signature + * @v c Third character of ACPI signature + * @v d Fourth character of ACPI signature + * @ret signature ACPI signature + */ +#define ACPI_SIGNATURE( a, b, c, d ) \ + ( ( (a) << 0 ) | ( (b) << 8 ) | ( (c) << 16 ) | ( (d) << 24 ) ) + +extern int acpi_describe ( struct interface *interface, + struct acpi_description_header *acpi, size_t len ); +#define acpi_describe_TYPE( object_type ) \ + typeof ( int ( object_type, \ + struct acpi_description_header *acpi, \ + size_t len ) ) + +extern void acpi_fix_checksum ( struct acpi_description_header *acpi ); + +#endif /* _IPXE_ACPI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/aes.h b/qemu/roms/ipxe/src/include/ipxe/aes.h new file mode 100644 index 000000000..4e44f9853 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/aes.h @@ -0,0 +1,34 @@ +#ifndef _IPXE_AES_H +#define _IPXE_AES_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct cipher_algorithm; + +/** Basic AES blocksize */ +#define AES_BLOCKSIZE 16 + +#include "crypto/axtls/crypto.h" + +/** AES context */ +struct aes_context { + /** AES context for AXTLS */ + AES_CTX axtls_ctx; + /** Cipher is being used for decrypting */ + int decrypting; +}; + +/** AES context size */ +#define AES_CTX_SIZE sizeof ( struct aes_context ) + +/* AXTLS functions */ +extern void axtls_aes_encrypt ( const AES_CTX *ctx, uint32_t *data ); +extern void axtls_aes_decrypt ( const AES_CTX *ctx, uint32_t *data ); + +extern struct cipher_algorithm aes_algorithm; +extern struct cipher_algorithm aes_cbc_algorithm; + +int aes_wrap ( const void *kek, const void *src, void *dest, int nblk ); +int aes_unwrap ( const void *kek, const void *src, void *dest, int nblk ); + +#endif /* _IPXE_AES_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ansicol.h b/qemu/roms/ipxe/src/include/ipxe/ansicol.h new file mode 100644 index 000000000..707d1599d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ansicol.h @@ -0,0 +1,84 @@ +#ifndef _IPXE_ANSICOL_H +#define _IPXE_ANSICOL_H + +/** @file + * + * ANSI colours + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <curses.h> /* For COLOR_RED etc. */ + +/** Default colour (usually white foreground, black background) */ +#define COLOUR_DEFAULT 9 +#define COLOR_DEFAULT COLOUR_DEFAULT + +/** Magic colour + * + * The magic basic colour is automatically remapped to the colour + * stored in @c ansicol_magic. This is used to allow the UI + * background to automatically become transparent when a background + * picture is used. + */ +#define ANSICOL_MAGIC 15 + +/** RGB value for "not defined" */ +#define ANSICOL_NO_RGB 0x01000000 + +/** + * @defgroup ansicolpairs ANSI colour pairs + * @{ + */ + +/** Default colour pair */ +#define CPAIR_DEFAULT 0 + +/** Normal text */ +#define CPAIR_NORMAL 1 + +/** Highlighted text */ +#define CPAIR_SELECT 2 + +/** Unselectable text (e.g. continuation ellipses, menu separators) */ +#define CPAIR_SEPARATOR 3 + +/** Editable text */ +#define CPAIR_EDIT 4 + +/** Error text */ +#define CPAIR_ALERT 5 + +/** URL text */ +#define CPAIR_URL 6 + +/** PXE selected menu entry */ +#define CPAIR_PXE 7 + +/** @} */ + +/** An ANSI colour pair definition */ +struct ansicol_pair { + /** Foreground colour index */ + uint8_t foreground; + /** Background colour index */ + uint8_t background; +} __attribute__ (( packed )); + +/* ansicol.c */ +extern void ansicol_set_pair ( unsigned int cpair ); +extern int ansicol_define_pair ( unsigned int cpair, unsigned int foreground, + unsigned int background ); + +/* ansicoldef.c */ +extern int ansicol_define ( unsigned int colour, unsigned int ansi, + uint32_t rgb ); +extern void ansicol_reset_magic ( void ); +extern void ansicol_set_magic_transparent ( void ); + +/* Function provided by ansicol.c but overridden by ansicoldef.c, if present */ +extern void ansicol_set ( unsigned int colour, unsigned int which ); + +#endif /* _IPXE_ANSICOL_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ansiesc.h b/qemu/roms/ipxe/src/include/ipxe/ansiesc.h new file mode 100644 index 000000000..c1c74481d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ansiesc.h @@ -0,0 +1,137 @@ +#ifndef _IPXE_ANSIESC_H +#define _IPXE_ANSIESC_H + +/** @file + * + * ANSI escape sequences + * + * ANSI X3.64 (aka ECMA-48 or ISO/IEC 6429, available from + * http://www.ecma-international.org/publications/files/ECMA-ST/Ecma-048.pdf) + * defines escape sequences consisting of: + * + * A Control Sequence Introducer (CSI) + * + * Zero or more Parameter Bytes (P) + * + * Zero or more Intermediate Bytes (I) + * + * A Final Byte (F) + * + * The CSI consists of ESC (0x1b) followed by "[" (0x5b). The + * Parameter Bytes, for a standardised (i.e. not private or + * experimental) sequence, consist of a list of ASCII decimal integers + * separated by semicolons. The Intermediate Bytes (in the range 0x20 + * to 0x2f) and the Final Byte (in the range 0x40 to 0x4f) determine + * the control function. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct ansiesc_context; + +/** A handler for an escape sequence */ +struct ansiesc_handler { + /** The control function identifier + * + * The control function identifier consists of the + * Intermediate Bytes (if any) and the Final Byte. In + * practice, no more than one immediate byte is ever used, so + * the byte combination can be efficiently expressed as a + * single integer, in the obvious way (with the Final Byte + * being the least significant byte). + */ + unsigned int function; + /** Handle escape sequence + * + * @v ctx ANSI escape context + * @v count Parameter count + * @v params Parameter list + * + * A negative parameter value indicates that the parameter was + * omitted and that the default value for this control + * function should be used. + * + * Since all parameters are optional, there is no way to + * distinguish between "zero parameters" and "single parameter + * omitted". Consequently, the parameter list will always + * contain at least one item. + */ + void ( * handle ) ( struct ansiesc_context *ctx, unsigned int count, + int params[] ); +}; + +/** Maximum number of parameters within a single escape sequence */ +#define ANSIESC_MAX_PARAMS 5 + +/** + * ANSI escape sequence context + * + * This provides temporary storage for processing escape sequences, + * and points to the list of escape sequence handlers. + */ +struct ansiesc_context { + /** Array of handlers + * + * Must be terminated by a handler with @c function set to + * zero. + */ + struct ansiesc_handler *handlers; + /** Parameter count + * + * Will be zero when not currently in an escape sequence. + */ + unsigned int count; + /** Parameter list */ + int params[ANSIESC_MAX_PARAMS]; + /** Control function identifier */ + unsigned int function; +}; + +/** Escape character */ +#define ESC 0x1b + +/** Control Sequence Introducer */ +#define CSI "\033[" + +/** + * @defgroup ansifuncs ANSI escape sequence function identifiers + * @{ + */ + +/** Cursor position */ +#define ANSIESC_CUP 'H' + +/** Erase in page */ +#define ANSIESC_ED 'J' + +/** Erase from cursor to end of page */ +#define ANSIESC_ED_TO_END 0 + +/** Erase from start of page to cursor */ +#define ANSIESC_ED_FROM_START 1 + +/** Erase whole page */ +#define ANSIESC_ED_ALL 2 + +/** Select graphic rendition */ +#define ANSIESC_SGR 'm' + +/** Explicit log message priority + * + * This is an iPXE private sequence identifier. (The range 'p' to '~' + * is reserved for private sequences.) + */ +#define ANSIESC_LOG_PRIORITY 'p' + +/** Show cursor */ +#define ANSIESC_DECTCEM_SET ( ( '?' << 8 ) | 'h' ) + +/** Hide cursor */ +#define ANSIESC_DECTCEM_RESET ( ( '?' << 8 ) | 'l' ) + +/** @} */ + +extern int ansiesc_process ( struct ansiesc_context *ctx, int c ); + +#endif /* _IPXE_ANSIESC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/aoe.h b/qemu/roms/ipxe/src/include/ipxe/aoe.h new file mode 100644 index 000000000..60f3bd959 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/aoe.h @@ -0,0 +1,131 @@ +#ifndef _IPXE_AOE_H +#define _IPXE_AOE_H + +/** @file + * + * AoE protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/list.h> +#include <ipxe/if_ether.h> +#include <ipxe/retry.h> +#include <ipxe/ata.h> +#include <ipxe/acpi.h> + +/** An AoE config command */ +struct aoecfg { + /** AoE queue depth */ + uint16_t bufcnt; + /** ATA target firmware version */ + uint16_t fwver; + /** ATA target sector count */ + uint8_t scnt; + /** AoE config string subcommand */ + uint8_t aoeccmd; + /** AoE config string length */ + uint16_t cfglen; + /** AoE config string */ + uint8_t data[0]; +} __attribute__ (( packed )); + +/** An AoE ATA command */ +struct aoeata { + /** AoE command flags */ + uint8_t aflags; + /** ATA error/feature register */ + uint8_t err_feat; + /** ATA sector count register */ + uint8_t count; + /** ATA command/status register */ + uint8_t cmd_stat; + /** Logical block address, in little-endian order */ + union { + uint64_t u64; + uint8_t bytes[6]; + } lba; + /** Data payload */ + uint8_t data[0]; +} __attribute__ (( packed )); + +#define AOE_FL_EXTENDED 0x40 /**< LBA48 extended addressing */ +#define AOE_FL_DEV_HEAD 0x10 /**< Device/head flag */ +#define AOE_FL_ASYNC 0x02 /**< Asynchronous write */ +#define AOE_FL_WRITE 0x01 /**< Write command */ + +/** An AoE command */ +union aoecmd { + /** Config command */ + struct aoecfg cfg; + /** ATA command */ + struct aoeata ata; +}; + +/** An AoE header */ +struct aoehdr { + /** Protocol version number and flags */ + uint8_t ver_flags; + /** Error code */ + uint8_t error; + /** Major device number, in network byte order */ + uint16_t major; + /** Minor device number */ + uint8_t minor; + /** Command number */ + uint8_t command; + /** Tag, in network byte order */ + uint32_t tag; + /** Payload */ + union aoecmd payload[0]; +} __attribute__ (( packed )); + +#define AOE_VERSION 0x10 /**< Version 1 */ +#define AOE_VERSION_MASK 0xf0 /**< Version part of ver_flags field */ + +#define AOE_FL_RESPONSE 0x08 /**< Message is a response */ +#define AOE_FL_ERROR 0x04 /**< Command generated an error */ + +#define AOE_MAJOR_BROADCAST 0xffff +#define AOE_MINOR_BROADCAST 0xff + +#define AOE_CMD_ATA 0x00 /**< Issue ATA command */ +#define AOE_CMD_CONFIG 0x01 /**< Query Config Information */ + +#define AOE_ERR_BAD_COMMAND 1 /**< Unrecognised command code */ +#define AOE_ERR_BAD_PARAMETER 2 /**< Bad argument parameter */ +#define AOE_ERR_UNAVAILABLE 3 /**< Device unavailable */ +#define AOE_ERR_CONFIG_EXISTS 4 /**< Config string present */ +#define AOE_ERR_BAD_VERSION 5 /**< Unsupported version */ + +#define AOE_STATUS_ERR_MASK 0x0f /**< Error portion of status code */ +#define AOE_STATUS_PENDING 0x80 /**< Command pending */ + +/** AoE tag magic marker */ +#define AOE_TAG_MAGIC 0x18ae0000 + +/** Maximum number of sectors per packet */ +#define AOE_MAX_COUNT 2 + +/** AoE boot firmware table signature */ +#define ABFT_SIG ACPI_SIGNATURE ( 'a', 'B', 'F', 'T' ) + +/** + * AoE Boot Firmware Table (aBFT) + */ +struct abft_table { + /** ACPI header */ + struct acpi_description_header acpi; + /** AoE shelf */ + uint16_t shelf; + /** AoE slot */ + uint8_t slot; + /** Reserved */ + uint8_t reserved_a; + /** MAC address */ + uint8_t mac[ETH_ALEN]; +} __attribute__ (( packed )); + +#endif /* _IPXE_AOE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/api.h b/qemu/roms/ipxe/src/include/ipxe/api.h new file mode 100644 index 000000000..838b8936e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/api.h @@ -0,0 +1,84 @@ +#ifndef _IPXE_API_H +#define _IPXE_API_H + +/** @file + * + * iPXE internal APIs + * + * There are various formally-defined APIs internal to iPXE, with + * several differing implementations specific to particular execution + * environments (e.g. PC BIOS, EFI, LinuxBIOS). + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** @defgroup Single-implementation APIs + * + * These are APIs for which only a single implementation may be + * compiled in at any given time. + * + * @{ + */ + +/** + * Calculate function implementation name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + * + * The subsystem prefix should be an empty string for the currently + * selected subsystem, and should be a subsystem-unique string for all + * other subsystems. + */ +#define SINGLE_API_NAME( _prefix, _api_func ) _prefix ## _api_func + +/** + * Calculate static inline function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define SINGLE_API_INLINE( _prefix, _api_func ) \ + SINGLE_API_NAME ( _prefix, _api_func ) + +/** + * Provide an API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_SINGLE_API( _prefix, _api_func, _func ) \ + /* Ensure that _api_func exists */ \ + typeof ( _api_func ) _api_func; \ + /* Ensure that _func exists */ \ + typeof ( _func ) _func; \ + /* Ensure that _func is type-compatible with _api_func */ \ + typeof ( _api_func ) _func; \ + /* Ensure that _subsys_func is non-static */ \ + extern typeof ( _api_func ) SINGLE_API_NAME ( _prefix, _api_func ); \ + /* Provide symbol alias from _subsys_func to _func */ \ + typeof ( _api_func ) SINGLE_API_NAME ( _prefix, _api_func ) \ + __attribute__ (( alias ( #_func ) )); + +/** + * Provide a static inline API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_SINGLE_API_INLINE( _prefix, _api_func ) \ + /* Ensure that _api_func exists */ \ + typeof ( _api_func ) _api_func; \ + /* Ensure that _subsys_func exists and is static */ \ + static typeof ( SINGLE_API_INLINE ( _prefix, _api_func ) ) \ + SINGLE_API_INLINE ( _prefix, _api_func ); \ + /* Ensure that _subsys_func is type-compatible with _api_func */ \ + typeof ( _api_func ) SINGLE_API_INLINE ( _prefix, _api_func ); + +/** @} */ + +#endif /* _IPXE_API_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/arc4.h b/qemu/roms/ipxe/src/include/ipxe/arc4.h new file mode 100644 index 000000000..9da972b69 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/arc4.h @@ -0,0 +1,22 @@ +#ifndef _IPXE_ARC4_H +#define _IPXE_ARC4_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct cipher_algorithm; + +#include <stdint.h> + +struct arc4_ctx { + int i, j; + u8 state[256]; +}; + +#define ARC4_CTX_SIZE sizeof ( struct arc4_ctx ) + +extern struct cipher_algorithm arc4_algorithm; + +void arc4_skip ( const void *key, size_t keylen, size_t skip, + const void *src, void *dst, size_t msglen ); + +#endif /* _IPXE_ARC4_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/arp.h b/qemu/roms/ipxe/src/include/ipxe/arp.h new file mode 100644 index 000000000..e30ae6b76 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/arp.h @@ -0,0 +1,60 @@ +#ifndef _IPXE_ARP_H +#define _IPXE_ARP_H + +/** @file + * + * Address Resolution Protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tables.h> +#include <ipxe/netdevice.h> +#include <ipxe/neighbour.h> + +/** A network-layer protocol that relies upon ARP */ +struct arp_net_protocol { + /** Network-layer protocol */ + struct net_protocol *net_protocol; + /** Check existence of address + * + * @v netdev Network device + * @v net_addr Network-layer address + * @ret rc Return status code + */ + int ( * check ) ( struct net_device *netdev, + const void *net_addr ); +}; + +/** ARP protocol table */ +#define ARP_NET_PROTOCOLS \ + __table ( struct arp_net_protocol, "arp_net_protocols" ) + +/** Declare an ARP protocol */ +#define __arp_net_protocol __table_entry ( ARP_NET_PROTOCOLS, 01 ) + +extern struct net_protocol arp_protocol __net_protocol; +extern struct neighbour_discovery arp_discovery; + +/** + * Transmit packet, determining link-layer address via ARP + * + * @v iobuf I/O buffer + * @v netdev Network device + * @v net_protocol Network-layer protocol + * @v net_dest Destination network-layer address + * @v net_source Source network-layer address + * @v ll_source Source link-layer address + * @ret rc Return status code + */ +static inline int arp_tx ( struct io_buffer *iobuf, struct net_device *netdev, + struct net_protocol *net_protocol, + const void *net_dest, const void *net_source, + const void *ll_source ) { + + return neighbour_tx ( iobuf, netdev, net_protocol, net_dest, + &arp_discovery, net_source, ll_source ); +} + +#endif /* _IPXE_ARP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/asn1.h b/qemu/roms/ipxe/src/include/ipxe/asn1.h new file mode 100644 index 000000000..d12524ddb --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/asn1.h @@ -0,0 +1,308 @@ +#ifndef _IPXE_ASN1_H +#define _IPXE_ASN1_H + +/** @file + * + * ASN.1 encoding + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <time.h> +#include <ipxe/tables.h> + +/** An ASN.1 object cursor */ +struct asn1_cursor { + /** Start of data */ + const void *data; + /** Length of data */ + size_t len; +}; + +/** An ASN.1 object builder */ +struct asn1_builder { + /** Data + * + * This is always dynamically allocated. If @c data is NULL + * while @len is non-zero, this indicates that a memory + * allocation error has occurred during the building process. + */ + void *data; + /** Length of data */ + size_t len; +}; + +/** Maximum (viable) length of ASN.1 length + * + * While in theory unlimited, this length is sufficient to contain a + * size_t. + */ +#define ASN1_MAX_LEN_LEN ( 1 + sizeof ( size_t ) ) + +/** An ASN.1 header */ +struct asn1_builder_header { + /** Type */ + uint8_t type; + /** Length (encoded) */ + uint8_t length[ASN1_MAX_LEN_LEN]; +} __attribute__ (( packed )); + +/** ASN.1 end */ +#define ASN1_END 0x00 + +/** ASN.1 boolean */ +#define ASN1_BOOLEAN 0x01 + +/** ASN.1 integer */ +#define ASN1_INTEGER 0x02 + +/** ASN.1 bit string */ +#define ASN1_BIT_STRING 0x03 + +/** ASN.1 octet string */ +#define ASN1_OCTET_STRING 0x04 + +/** ASN.1 null */ +#define ASN1_NULL 0x05 + +/** ASN.1 object identifier */ +#define ASN1_OID 0x06 + +/** ASN.1 enumeration */ +#define ASN1_ENUMERATED 0x0a + +/** ASN.1 UTC time */ +#define ASN1_UTC_TIME 0x17 + +/** ASN.1 generalized time */ +#define ASN1_GENERALIZED_TIME 0x18 + +/** ASN.1 sequence */ +#define ASN1_SEQUENCE 0x30 + +/** ASN.1 set */ +#define ASN1_SET 0x31 + +/** ASN.1 implicit tag */ +#define ASN1_IMPLICIT_TAG( number) ( 0x80 | (number) ) + +/** ASN.1 explicit tag */ +#define ASN1_EXPLICIT_TAG( number) ( 0xa0 | (number) ) + +/** ASN.1 "any tag" magic value */ +#define ASN1_ANY -1U + +/** Initial OID byte */ +#define ASN1_OID_INITIAL( first, second ) ( ( (first) * 40 ) + (second) ) + +/** Single-byte OID value + * + * Valid for values up to 127 + */ +#define ASN1_OID_SINGLE( value ) ( (value) & 0x7f ) + +/** Double-byte OID value + * + * Valid for values up to 16383 + */ +#define ASN1_OID_DOUBLE( value ) \ + ( 0x80 | ( ( (value) >> 7 ) & 0x7f ) ), ASN1_OID_SINGLE ( (value) ) + +/** Double-byte OID value + * + * Valid for values up to 2097151 + */ +#define ASN1_OID_TRIPLE( value ) \ + ( 0x80 | ( ( (value) >> 14 ) & 0x7f ) ), ASN1_OID_DOUBLE ( (value) ) + +/** ASN.1 OID for rsaEncryption (1.2.840.113549.1.1.1) */ +#define ASN1_OID_RSAENCRYPTION \ + ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ), \ + ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 1 ) + +/** ASN.1 OID for md5WithRSAEncryption (1.2.840.113549.1.1.4) */ +#define ASN1_OID_MD5WITHRSAENCRYPTION \ + ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ), \ + ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 4 ) + +/** ASN.1 OID for sha1WithRSAEncryption (1.2.840.113549.1.1.5) */ +#define ASN1_OID_SHA1WITHRSAENCRYPTION \ + ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ), \ + ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ) + +/** ASN.1 OID for sha256WithRSAEncryption (1.2.840.113549.1.1.11) */ +#define ASN1_OID_SHA256WITHRSAENCRYPTION \ + ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ), \ + ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 11 ) + +/** ASN.1 OID for id-md5 (1.2.840.113549.2.5) */ +#define ASN1_OID_MD5 \ + ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ), \ + ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 2 ), \ + ASN1_OID_SINGLE ( 5 ) + +/** ASN.1 OID for id-sha1 (1.3.14.3.2.26) */ +#define ASN1_OID_SHA1 \ + ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 14 ), \ + ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 2 ), \ + ASN1_OID_SINGLE ( 26 ) + +/** ASN.1 OID for id-sha256 (2.16.840.1.101.3.4.2.1) */ +#define ASN1_OID_SHA256 \ + ASN1_OID_INITIAL ( 2, 16 ), ASN1_OID_DOUBLE ( 840 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 101 ), \ + ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 4 ), \ + ASN1_OID_SINGLE ( 2 ), ASN1_OID_SINGLE ( 1 ) + +/** ASN.1 OID for commonName (2.5.4.3) */ +#define ASN1_OID_COMMON_NAME \ + ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 4 ), \ + ASN1_OID_SINGLE ( 3 ) + +/** ASN.1 OID for id-ce-keyUsage (2.5.29.15) */ +#define ASN1_OID_KEYUSAGE \ + ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 29 ), \ + ASN1_OID_SINGLE ( 15 ) + +/** ASN.1 OID for id-ce-basicConstraints (2.5.29.19) */ +#define ASN1_OID_BASICCONSTRAINTS \ + ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 29 ), \ + ASN1_OID_SINGLE ( 19 ) + +/** ASN.1 OID for id-ce-extKeyUsage (2.5.29.37) */ +#define ASN1_OID_EXTKEYUSAGE \ + ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 29 ), \ + ASN1_OID_SINGLE ( 37 ) + +/** ASN.1 OID for id-kp-codeSigning (1.3.6.1.5.5.7.3.3) */ +#define ASN1_OID_CODESIGNING \ + ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ), \ + ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ), \ + ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 3 ) + +/** ASN.1 OID for pkcs-signedData (1.2.840.113549.1.7.2) */ +#define ASN1_OID_SIGNEDDATA \ + ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ), \ + ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ), \ + ASN1_OID_SINGLE ( 7 ), ASN1_OID_SINGLE ( 2 ) + +/** ASN.1 OID for id-pe-authorityInfoAccess (1.3.6.1.5.5.7.1.1) */ +#define ASN1_OID_AUTHORITYINFOACCESS \ + ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ), \ + ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 1 ) + +/** ASN.1 OID for id-ad-ocsp (1.3.6.1.5.5.7.48.1) */ +#define ASN1_OID_OCSP \ + ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ), \ + ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ), \ + ASN1_OID_SINGLE ( 48 ), ASN1_OID_SINGLE ( 1 ) + +/** ASN.1 OID for id-pkix-ocsp-basic ( 1.3.6.1.5.5.7.48.1.1) */ +#define ASN1_OID_OCSP_BASIC \ + ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ), \ + ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ), \ + ASN1_OID_SINGLE ( 48 ), ASN1_OID_SINGLE ( 1 ), \ + ASN1_OID_SINGLE ( 1 ) + +/** ASN.1 OID for id-kp-OCSPSigning (1.3.6.1.5.5.7.3.9) */ +#define ASN1_OID_OCSPSIGNING \ + ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ), \ + ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ), \ + ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ), \ + ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 9 ) + +/** ASN.1 OID for id-ce-subjectAltName (2.5.29.17) */ +#define ASN1_OID_SUBJECTALTNAME \ + ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 29 ), \ + ASN1_OID_SINGLE ( 17 ) + +/** Define an ASN.1 cursor containing an OID */ +#define ASN1_OID_CURSOR( oid_value ) { \ + .data = oid_value, \ + .len = sizeof ( oid_value ), \ + } + +/** An ASN.1 OID-identified algorithm */ +struct asn1_algorithm { + /** Name */ + const char *name; + /** Object identifier */ + struct asn1_cursor oid; + /** Public-key algorithm (if applicable) */ + struct pubkey_algorithm *pubkey; + /** Digest algorithm (if applicable) */ + struct digest_algorithm *digest; +}; + +/** ASN.1 OID-identified algorithms */ +#define ASN1_ALGORITHMS __table ( struct asn1_algorithm, "asn1_algorithms" ) + +/** Declare an ASN.1 OID-identified algorithm */ +#define __asn1_algorithm __table_entry ( ASN1_ALGORITHMS, 01 ) + +/** An ASN.1 bit string */ +struct asn1_bit_string { + /** Data */ + const void *data; + /** Length */ + size_t len; + /** Unused bits at end of data */ + unsigned int unused; +} __attribute__ (( packed )); + +/** + * Extract ASN.1 type + * + * @v cursor ASN.1 object cursor + * @ret type Type + */ +static inline __attribute__ (( always_inline )) unsigned int +asn1_type ( const struct asn1_cursor *cursor ) { + return ( *( ( const uint8_t * ) cursor->data ) ); +} + +extern void asn1_invalidate_cursor ( struct asn1_cursor *cursor ); +extern int asn1_enter ( struct asn1_cursor *cursor, unsigned int type ); +extern int asn1_skip_if_exists ( struct asn1_cursor *cursor, + unsigned int type ); +extern int asn1_skip ( struct asn1_cursor *cursor, unsigned int type ); +extern int asn1_shrink ( struct asn1_cursor *cursor, unsigned int type ); +extern int asn1_enter_any ( struct asn1_cursor *cursor ); +extern int asn1_skip_any ( struct asn1_cursor *cursor ); +extern int asn1_shrink_any ( struct asn1_cursor *cursor ); +extern int asn1_boolean ( const struct asn1_cursor *cursor ); +extern int asn1_integer ( const struct asn1_cursor *cursor, int *value ); +extern int asn1_bit_string ( const struct asn1_cursor *cursor, + struct asn1_bit_string *bits ); +extern int asn1_integral_bit_string ( const struct asn1_cursor *cursor, + struct asn1_bit_string *bits ); +extern int asn1_compare ( const struct asn1_cursor *cursor1, + const struct asn1_cursor *cursor2 ); +extern int asn1_algorithm ( const struct asn1_cursor *cursor, + struct asn1_algorithm **algorithm ); +extern int asn1_pubkey_algorithm ( const struct asn1_cursor *cursor, + struct asn1_algorithm **algorithm ); +extern int asn1_digest_algorithm ( const struct asn1_cursor *cursor, + struct asn1_algorithm **algorithm ); +extern int asn1_signature_algorithm ( const struct asn1_cursor *cursor, + struct asn1_algorithm **algorithm ); +extern int asn1_generalized_time ( const struct asn1_cursor *cursor, + time_t *time ); +extern int asn1_prepend_raw ( struct asn1_builder *builder, const void *data, + size_t len ); +extern int asn1_prepend ( struct asn1_builder *builder, unsigned int type, + const void *data, size_t len ); +extern int asn1_wrap ( struct asn1_builder *builder, unsigned int type ); + +#endif /* _IPXE_ASN1_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ata.h b/qemu/roms/ipxe/src/include/ipxe/ata.h new file mode 100644 index 000000000..b7f02d655 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ata.h @@ -0,0 +1,204 @@ +#ifndef _IPXE_ATA_H +#define _IPXE_ATA_H + +#include <stdint.h> +#include <ipxe/uaccess.h> +#include <ipxe/interface.h> + +/** @file + * + * ATA devices + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * An ATA Logical Block Address + * + * ATA controllers have three byte-wide registers for specifying the + * block address: LBA Low, LBA Mid and LBA High. This allows for a + * 24-bit address. Some devices support the "48-bit address feature + * set" (LBA48), in which case each of these byte-wide registers is + * actually a two-entry FIFO, and the "previous" byte pushed into the + * FIFO is used as the corresponding high-order byte. So, to set up + * the 48-bit address 0x123456abcdef, you would issue + * + * 0x56 -> LBA Low register + * 0xef -> LBA Low register + * 0x34 -> LBA Mid register + * 0xcd -> LBA Mid register + * 0x12 -> LBA High register + * 0xab -> LBA High register + * + * This structure encapsulates this information by providing a single + * 64-bit integer in native byte order, unioned with bytes named so + * that the sequence becomes + * + * low_prev -> LBA Low register + * low_cur -> LBA Low register + * mid_prev -> LBA Mid register + * mid_cur -> LBA Mid register + * high_prev -> LBA High register + * high_cur -> LBA High register + * + * Just to complicate matters further, in non-LBA48 mode it is + * possible to have a 28-bit address, in which case bits 27:24 must be + * written into the low four bits of the Device register. + */ +union ata_lba { + /** LBA as a 64-bit integer in native-endian order */ + uint64_t native; + /** ATA registers */ + struct { +#if __BYTE_ORDER == __LITTLE_ENDIAN + uint8_t low_cur; + uint8_t mid_cur; + uint8_t high_cur; + uint8_t low_prev; + uint8_t mid_prev; + uint8_t high_prev; + uint16_t pad; +#elif __BYTE_ORDER == __BIG_ENDIAN + uint16_t pad; + uint8_t high_prev; + uint8_t mid_prev; + uint8_t low_prev; + uint8_t high_cur; + uint8_t mid_cur; + uint8_t low_cur; +#else +#error "I need a byte order" +#endif + } bytes; +}; + +/** An ATA 2-byte FIFO register */ +union ata_fifo { + /** Value in native-endian order */ + uint16_t native; + /** ATA registers */ + struct { +#if __BYTE_ORDER == __LITTLE_ENDIAN + uint8_t cur; + uint8_t prev; +#elif __BYTE_ORDER == __BIG_ENDIAN + uint8_t prev; + uint8_t cur; +#else +#error "I need a byte order" +#endif + } bytes; +}; + +/** ATA command block */ +struct ata_cb { + /** Logical block address */ + union ata_lba lba; + /** Sector count */ + union ata_fifo count; + /** Error/feature register */ + union ata_fifo err_feat; + /** Device register */ + uint8_t device; + /** Command/status register */ + uint8_t cmd_stat; + /** Use LBA48 extended addressing */ + int lba48; +}; + +/** Obsolete bits in the ATA device register */ +#define ATA_DEV_OBSOLETE 0xa0 + +/** LBA flag in the ATA device register */ +#define ATA_DEV_LBA 0x40 + +/** Slave ("device 1") flag in the ATA device register */ +#define ATA_DEV_SLAVE 0x10 + +/** Master ("device 0") flag in the ATA device register */ +#define ATA_DEV_MASTER 0x00 + +/** Mask of non-LBA portion of device register */ +#define ATA_DEV_MASK 0xf0 + +/** "Read sectors" command */ +#define ATA_CMD_READ 0x20 + +/** "Read sectors (ext)" command */ +#define ATA_CMD_READ_EXT 0x24 + +/** "Write sectors" command */ +#define ATA_CMD_WRITE 0x30 + +/** "Write sectors (ext)" command */ +#define ATA_CMD_WRITE_EXT 0x34 + +/** "Identify" command */ +#define ATA_CMD_IDENTIFY 0xec + +/** Command completed in error */ +#define ATA_STAT_ERR 0x01 + +/** + * Structure returned by ATA IDENTIFY command + * + * This is a huge structure with many fields that we don't care about, + * so we implement only a few fields. + */ +struct ata_identity { + uint16_t ignore_a[27]; /* words 0-26 */ + uint16_t model[20]; /* words 27-46 */ + uint16_t ignore_b[13]; /* words 47-59 */ + uint32_t lba_sectors; /* words 60-61 */ + uint16_t ignore_c[21]; /* words 62-82 */ + uint16_t supports_lba48; /* word 83 */ + uint16_t ignore_d[16]; /* words 84-99 */ + uint64_t lba48_sectors; /* words 100-103 */ + uint16_t ignore_e[152]; /* words 104-255 */ +}; + +/** Supports LBA48 flag */ +#define ATA_SUPPORTS_LBA48 ( 1 << 10 ) + +/** ATA sector size */ +#define ATA_SECTOR_SIZE 512 + +/** An ATA command information unit */ +struct ata_cmd { + /** ATA command block */ + struct ata_cb cb; + /** Data-out buffer (may be NULL) + * + * If non-NULL, this buffer must be ata_command::cb::count + * sectors in size. + */ + userptr_t data_out; + /** Data-out buffer length + * + * Must be zero if @c data_out is NULL + */ + size_t data_out_len; + /** Data-in buffer (may be NULL) + * + * If non-NULL, this buffer must be ata_command::cb::count + * sectors in size. + */ + userptr_t data_in; + /** Data-in buffer length + * + * Must be zero if @c data_in is NULL + */ + size_t data_in_len; +}; + +extern int ata_command ( struct interface *control, struct interface *data, + struct ata_cmd *command ); +#define ata_command_TYPE( object_type ) \ + typeof ( int ( object_type, struct interface *data, \ + struct ata_cmd *command ) ) + +extern int ata_open ( struct interface *block, struct interface *ata, + unsigned int device, unsigned int max_count ); + +#endif /* _IPXE_ATA_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/base16.h b/qemu/roms/ipxe/src/include/ipxe/base16.h new file mode 100644 index 000000000..60e3f2315 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/base16.h @@ -0,0 +1,40 @@ +#ifndef _IPXE_BASE16_H +#define _IPXE_BASE16_H + +/** @file + * + * Base16 encoding + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <string.h> + +/** + * Calculate length of base16-encoded data + * + * @v raw_len Raw data length + * @ret encoded_len Encoded string length (excluding NUL) + */ +static inline size_t base16_encoded_len ( size_t raw_len ) { + return ( 2 * raw_len ); +} + +/** + * Calculate maximum length of base16-decoded string + * + * @v encoded Encoded string + * @v max_raw_len Maximum length of raw data + */ +static inline size_t base16_decoded_max_len ( const char *encoded ) { + return ( ( strlen ( encoded ) + 1 ) / 2 ); +} + +extern void base16_encode ( const uint8_t *raw, size_t len, char *encoded ); +extern int hex_decode ( const char *string, char separator, void *data, + size_t len ); +extern int base16_decode ( const char *encoded, uint8_t *raw ); + +#endif /* _IPXE_BASE16_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/base64.h b/qemu/roms/ipxe/src/include/ipxe/base64.h new file mode 100644 index 000000000..5fe134dc8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/base64.h @@ -0,0 +1,41 @@ +#ifndef _IPXE_BASE64_H +#define _IPXE_BASE64_H + +/** @file + * + * Base64 encoding + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <string.h> + +/** + * Calculate length of base64-encoded data + * + * @v raw_len Raw data length + * @ret encoded_len Encoded string length (excluding NUL) + */ +static inline size_t base64_encoded_len ( size_t raw_len ) { + return ( ( ( raw_len + 3 - 1 ) / 3 ) * 4 ); +} + +/** + * Calculate maximum length of base64-decoded string + * + * @v encoded Encoded string + * @v max_raw_len Maximum length of raw data + * + * Note that the exact length of the raw data cannot be known until + * the string is decoded. + */ +static inline size_t base64_decoded_max_len ( const char *encoded ) { + return ( ( ( strlen ( encoded ) + 4 - 1 ) / 4 ) * 3 ); +} + +extern void base64_encode ( const uint8_t *raw, size_t len, char *encoded ); +extern int base64_decode ( const char *encoded, uint8_t *raw ); + +#endif /* _IPXE_BASE64_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/bigint.h b/qemu/roms/ipxe/src/include/ipxe/bigint.h new file mode 100644 index 000000000..97fbce245 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/bigint.h @@ -0,0 +1,301 @@ +#ifndef _IPXE_BIGINT_H +#define _IPXE_BIGINT_H + +/** @file + * + * Big integer support + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * Define a big-integer type + * + * @v size Number of elements + * @ret bigint_t Big integer type + */ +#define bigint_t( size ) \ + struct { \ + bigint_element_t element[ (size) ]; \ + } + +/** + * Determine number of elements required for a big-integer type + * + * @v len Maximum length of big integer, in bytes + * @ret size Number of elements + */ +#define bigint_required_size( len ) \ + ( ( (len) + sizeof ( bigint_element_t ) - 1 ) / \ + sizeof ( bigint_element_t ) ) + +/** + * Determine number of elements in big-integer type + * + * @v bigint Big integer + * @ret size Number of elements + */ +#define bigint_size( bigint ) \ + ( sizeof ( *(bigint) ) / sizeof ( (bigint)->element[0] ) ) + +/** + * Initialise big integer + * + * @v value Big integer to initialise + * @v data Raw data + * @v len Length of raw data + */ +#define bigint_init( value, data, len ) do { \ + unsigned int size = bigint_size (value); \ + assert ( (len) <= ( size * sizeof ( (value)->element[0] ) ) ); \ + bigint_init_raw ( (value)->element, size, (data), (len) ); \ + } while ( 0 ) + +/** + * Finalise big integer + * + * @v value Big integer to finalise + * @v out Output buffer + * @v len Length of output buffer + */ +#define bigint_done( value, out, len ) do { \ + unsigned int size = bigint_size (value); \ + bigint_done_raw ( (value)->element, size, (out), (len) ); \ + } while ( 0 ) + +/** + * Add big integers + * + * @v addend Big integer to add + * @v value Big integer to be added to + */ +#define bigint_add( addend, value ) do { \ + unsigned int size = bigint_size (addend); \ + bigint_add_raw ( (addend)->element, (value)->element, size ); \ + } while ( 0 ) + +/** + * Subtract big integers + * + * @v subtrahend Big integer to subtract + * @v value Big integer to be subtracted from + */ +#define bigint_subtract( subtrahend, value ) do { \ + unsigned int size = bigint_size (subtrahend); \ + bigint_subtract_raw ( (subtrahend)->element, (value)->element, \ + size ); \ + } while ( 0 ) + +/** + * Rotate big integer left + * + * @v value Big integer + */ +#define bigint_rol( value ) do { \ + unsigned int size = bigint_size (value); \ + bigint_rol_raw ( (value)->element, size ); \ + } while ( 0 ) + +/** + * Rotate big integer right + * + * @v value Big integer + */ +#define bigint_ror( value ) do { \ + unsigned int size = bigint_size (value); \ + bigint_ror_raw ( (value)->element, size ); \ + } while ( 0 ) + +/** + * Test if big integer is equal to zero + * + * @v value Big integer + * @v size Number of elements + * @ret is_zero Big integer is equal to zero + */ +#define bigint_is_zero( value ) ( { \ + unsigned int size = bigint_size (value); \ + bigint_is_zero_raw ( (value)->element, size ); } ) + +/** + * Compare big integers + * + * @v value Big integer + * @v reference Reference big integer + * @ret geq Big integer is greater than or equal to the reference + */ +#define bigint_is_geq( value, reference ) ( { \ + unsigned int size = bigint_size (value); \ + bigint_is_geq_raw ( (value)->element, (reference)->element, \ + size ); } ) + +/** + * Test if bit is set in big integer + * + * @v value Big integer + * @v bit Bit to test + * @ret is_set Bit is set + */ +#define bigint_bit_is_set( value, bit ) ( { \ + unsigned int size = bigint_size (value); \ + bigint_bit_is_set_raw ( (value)->element, size, bit ); } ) + +/** + * Find highest bit set in big integer + * + * @v value Big integer + * @ret max_bit Highest bit set + 1 (or 0 if no bits set) + */ +#define bigint_max_set_bit( value ) ( { \ + unsigned int size = bigint_size (value); \ + bigint_max_set_bit_raw ( (value)->element, size ); } ) + +/** + * Grow big integer + * + * @v source Source big integer + * @v dest Destination big integer + */ +#define bigint_grow( source, dest ) do { \ + unsigned int source_size = bigint_size (source); \ + unsigned int dest_size = bigint_size (dest); \ + bigint_grow_raw ( (source)->element, source_size, \ + (dest)->element, dest_size ); \ + } while ( 0 ) + +/** + * Shrink big integer + * + * @v source Source big integer + * @v dest Destination big integer + */ +#define bigint_shrink( source, dest ) do { \ + unsigned int source_size = bigint_size (source); \ + unsigned int dest_size = bigint_size (dest); \ + bigint_shrink_raw ( (source)->element, source_size, \ + (dest)->element, dest_size ); \ + } while ( 0 ) + +/** + * Multiply big integers + * + * @v multiplicand Big integer to be multiplied + * @v multiplier Big integer to be multiplied + * @v result Big integer to hold result + */ +#define bigint_multiply( multiplicand, multiplier, result ) do { \ + unsigned int size = bigint_size (multiplicand); \ + bigint_multiply_raw ( (multiplicand)->element, \ + (multiplier)->element, (result)->element, \ + size ); \ + } while ( 0 ) + +/** + * Perform modular multiplication of big integers + * + * @v multiplicand Big integer to be multiplied + * @v multiplier Big integer to be multiplied + * @v modulus Big integer modulus + * @v result Big integer to hold result + * @v tmp Temporary working space + */ +#define bigint_mod_multiply( multiplicand, multiplier, modulus, \ + result, tmp ) do { \ + unsigned int size = bigint_size (multiplicand); \ + bigint_mod_multiply_raw ( (multiplicand)->element, \ + (multiplier)->element, \ + (modulus)->element, \ + (result)->element, size, tmp ); \ + } while ( 0 ) + +/** + * Calculate temporary working space required for moduluar multiplication + * + * @v modulus Big integer modulus + * @ret len Length of temporary working space + */ +#define bigint_mod_multiply_tmp_len( modulus ) ( { \ + unsigned int size = bigint_size (modulus); \ + sizeof ( struct { \ + bigint_t ( size * 2 ) temp_result; \ + bigint_t ( size * 2 ) temp_modulus; \ + } ); } ) + +/** + * Perform modular exponentiation of big integers + * + * @v base Big integer base + * @v modulus Big integer modulus + * @v exponent Big integer exponent + * @v result Big integer to hold result + * @v tmp Temporary working space + */ +#define bigint_mod_exp( base, modulus, exponent, result, tmp ) do { \ + unsigned int size = bigint_size (base); \ + unsigned int exponent_size = bigint_size (exponent); \ + bigint_mod_exp_raw ( (base)->element, (modulus)->element, \ + (exponent)->element, (result)->element, \ + size, exponent_size, tmp ); \ + } while ( 0 ) + +/** + * Calculate temporary working space required for moduluar exponentiation + * + * @v modulus Big integer modulus + * @v exponent Big integer exponent + * @ret len Length of temporary working space + */ +#define bigint_mod_exp_tmp_len( modulus, exponent ) ( { \ + unsigned int size = bigint_size (modulus); \ + unsigned int exponent_size = bigint_size (exponent); \ + size_t mod_multiply_len = \ + bigint_mod_multiply_tmp_len (modulus); \ + sizeof ( struct { \ + bigint_t ( size ) temp_base; \ + bigint_t ( exponent_size ) temp_exponent; \ + uint8_t mod_multiply[mod_multiply_len]; \ + } ); } ) + +#include <bits/bigint.h> + +void bigint_init_raw ( bigint_element_t *value0, unsigned int size, + const void *data, size_t len ); +void bigint_done_raw ( const bigint_element_t *value0, unsigned int size, + void *out, size_t len ); +void bigint_add_raw ( const bigint_element_t *addend0, + bigint_element_t *value0, unsigned int size ); +void bigint_subtract_raw ( const bigint_element_t *subtrahend0, + bigint_element_t *value0, unsigned int size ); +void bigint_rol_raw ( bigint_element_t *value0, unsigned int size ); +void bigint_ror_raw ( bigint_element_t *value0, unsigned int size ); +int bigint_is_zero_raw ( const bigint_element_t *value0, unsigned int size ); +int bigint_is_geq_raw ( const bigint_element_t *value0, + const bigint_element_t *reference0, + unsigned int size ); +int bigint_bit_is_set_raw ( const bigint_element_t *value0, unsigned int size, + unsigned int bit ); +int bigint_max_set_bit_raw ( const bigint_element_t *value0, + unsigned int size ); +void bigint_grow_raw ( const bigint_element_t *source0, + unsigned int source_size, bigint_element_t *dest0, + unsigned int dest_size ); +void bigint_shrink_raw ( const bigint_element_t *source0, + unsigned int source_size, bigint_element_t *dest0, + unsigned int dest_size ); +void bigint_multiply_raw ( const bigint_element_t *multiplicand0, + const bigint_element_t *multiplier0, + bigint_element_t *result0, + unsigned int size ); +void bigint_mod_multiply_raw ( const bigint_element_t *multiplicand0, + const bigint_element_t *multiplier0, + const bigint_element_t *modulus0, + bigint_element_t *result0, + unsigned int size, void *tmp ); +void bigint_mod_exp_raw ( const bigint_element_t *base0, + const bigint_element_t *modulus0, + const bigint_element_t *exponent0, + bigint_element_t *result0, + unsigned int size, unsigned int exponent_size, + void *tmp ); + +#endif /* _IPXE_BIGINT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/bitbash.h b/qemu/roms/ipxe/src/include/ipxe/bitbash.h new file mode 100644 index 000000000..69d5d9e3e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/bitbash.h @@ -0,0 +1,84 @@ +#ifndef _IPXE_BITBASH_H +#define _IPXE_BITBASH_H + +/** @file + * + * Bit-bashing interfaces + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct bit_basher; + +/** Bit-bashing operations */ +struct bit_basher_operations { + /** + * Open bit-bashing interface (optional) + * + * @v basher Bit-bashing interface + */ + void ( * open ) ( struct bit_basher *basher ); + /** + * Close bit-bashing interface (optional) + * + * @v basher Bit-bashing interface + */ + void ( * close ) ( struct bit_basher *basher ); + /** + * Set/clear output bit + * + * @v basher Bit-bashing interface + * @v bit_id Bit number + * @v data Value to write + * + * @c data will be 0 if a logic 0 should be written (i.e. the + * bit should be cleared), or -1UL if a logic 1 should be + * written (i.e. the bit should be set). This is done so that + * the method may simply binary-AND @c data with the + * appropriate bit mask. + */ + void ( * write ) ( struct bit_basher *basher, unsigned int bit_id, + unsigned long data ); + /** + * Read input bit + * + * @v basher Bit-bashing interface + * @v bit_id Bit number + * @ret zero Input is a logic 0 + * @ret non-zero Input is a logic 1 + */ + int ( * read ) ( struct bit_basher *basher, unsigned int bit_id ); +}; + +/** A bit-bashing interface */ +struct bit_basher { + /** Bit-bashing operations */ + struct bit_basher_operations *op; +}; + +/** + * Open bit-bashing interface + * + * @v basher Bit-bashing interface + */ +static inline void open_bit ( struct bit_basher *basher ) { + if ( basher->op->open ) + basher->op->open ( basher ); +} + +/** + * Close bit-bashing interface + * + * @v basher Bit-bashing interface + */ +static inline void close_bit ( struct bit_basher *basher ) { + if ( basher->op->close ) + basher->op->close ( basher ); +} + +extern void write_bit ( struct bit_basher *basher, unsigned int bit_id, + unsigned long data ); +extern int read_bit ( struct bit_basher *basher, unsigned int bit_id ); + +#endif /* _IPXE_BITBASH_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/bitmap.h b/qemu/roms/ipxe/src/include/ipxe/bitmap.h new file mode 100644 index 000000000..b18584c1f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/bitmap.h @@ -0,0 +1,85 @@ +#ifndef _IPXE_BITMAP_H +#define _IPXE_BITMAP_H + +/** @file + * + * Bitmaps for multicast downloads + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stddef.h> +#include <stdlib.h> + +/** A single block of bits within a bitmap */ +typedef unsigned long bitmap_block_t; + +/** Size of a block of bits (in bits) */ +#define BITMAP_BLKSIZE ( sizeof ( bitmap_block_t ) * 8 ) + +/** + * Block index within bitmap + * + * @v bit Bit index + * @ret index Block index + */ +#define BITMAP_INDEX( bit ) ( (bit) / BITMAP_BLKSIZE ) + +/** + * Block mask within bitmap + * + * @v bit Bit index + * @ret mask Block mask + */ +#define BITMAP_MASK( bit ) ( 1UL << ( (bit) % BITMAP_BLKSIZE ) ) + +/** A bitmap */ +struct bitmap { + /** Bitmap data */ + bitmap_block_t *blocks; + /** Length of the bitmap, in bits */ + unsigned int length; + /** Index of first gap in the bitmap */ + unsigned int first_gap; +}; + +extern int bitmap_resize ( struct bitmap *bitmap, unsigned int new_length ); +extern int bitmap_test ( struct bitmap *bitmap, unsigned int bit ); +extern void bitmap_set ( struct bitmap *bitmap, unsigned int bit ); + +/** + * Free bitmap resources + * + * @v bitmap Bitmap + */ +static inline void bitmap_free ( struct bitmap *bitmap ) { + free ( bitmap->blocks ); +} + +/** + * Get first gap within bitmap + * + * @v bitmap Bitmap + * @ret first_gap First gap + * + * The first gap is the first unset bit within the bitmap. + */ +static inline unsigned int bitmap_first_gap ( struct bitmap *bitmap ) { + return bitmap->first_gap; +} + +/** + * Check to see if bitmap is full + * + * @v bitmap Bitmap + * @ret is_full Bitmap is full + * + * The bitmap is full if it has no gaps (i.e. no unset bits). + */ +static inline int bitmap_full ( struct bitmap *bitmap ) { + return ( bitmap->first_gap == bitmap->length ); +} + +#endif /* _IPXE_BITMAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/bitops.h b/qemu/roms/ipxe/src/include/ipxe/bitops.h new file mode 100644 index 000000000..73e859f41 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/bitops.h @@ -0,0 +1,231 @@ +#ifndef _IPXE_BITOPS_H +#define _IPXE_BITOPS_H + +/* + * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * @file + * + * Bit operations + * + */ + +#include <stdint.h> +#include <byteswap.h> + +/* Endianness selection. + * + * This is a property of the NIC, not a property of the host CPU. + */ +#ifdef BITOPS_LITTLE_ENDIAN +#define cpu_to_BIT64 cpu_to_le64 +#define cpu_to_BIT32 cpu_to_le32 +#define BIT64_to_cpu le64_to_cpu +#define BIT32_to_cpu le32_to_cpu +#endif +#ifdef BITOPS_BIG_ENDIAN +#define cpu_to_BIT64 cpu_to_be64 +#define cpu_to_BIT32 cpu_to_be32 +#define BIT64_to_cpu be64_to_cpu +#define BIT32_to_cpu be32_to_cpu +#endif + +/** Datatype used to represent a bit in the pseudo-structures */ +typedef unsigned char pseudo_bit_t; + +/** + * Wrapper structure for pseudo_bit_t structures + * + * This structure provides a wrapper around pseudo_bit_t structures. + * It has the correct size, and also encapsulates type information + * about the underlying pseudo_bit_t-based structure, which allows the + * BIT_FILL() etc. macros to work without requiring explicit type + * information. + */ +#define PSEUDO_BIT_STRUCT( _structure ) \ + union { \ + uint8_t bytes[ sizeof ( _structure ) / 8 ]; \ + uint32_t dwords[ sizeof ( _structure ) / 32 ]; \ + uint64_t qwords[ sizeof ( _structure ) / 64 ]; \ + _structure *dummy[0]; \ + } __attribute__ (( packed )) u + +/** Get pseudo_bit_t structure type from wrapper structure pointer */ +#define PSEUDO_BIT_STRUCT_TYPE( _ptr ) \ + typeof ( *((_ptr)->u.dummy[0]) ) + +/** Bit offset of a field within a pseudo_bit_t structure */ +#define BIT_OFFSET( _ptr, _field ) \ + offsetof ( PSEUDO_BIT_STRUCT_TYPE ( _ptr ), _field ) + +/** Bit width of a field within a pseudo_bit_t structure */ +#define BIT_WIDTH( _ptr, _field ) \ + sizeof ( ( ( PSEUDO_BIT_STRUCT_TYPE ( _ptr ) * ) NULL )->_field ) + +/** Qword offset of a field within a pseudo_bit_t structure */ +#define QWORD_OFFSET( _ptr, _field ) \ + ( BIT_OFFSET ( _ptr, _field ) / 64 ) + +/** Qword bit offset of a field within a pseudo_bit_t structure */ +#define QWORD_BIT_OFFSET( _ptr, _index, _field ) \ + ( BIT_OFFSET ( _ptr, _field ) - ( 64 * (_index) ) ) + +/** Bit mask for a field within a pseudo_bit_t structure */ +#define BIT_MASK( _ptr, _field ) \ + ( ( ~( ( uint64_t ) 0 ) ) >> \ + ( 64 - BIT_WIDTH ( _ptr, _field ) ) ) + +/* + * Assemble native-endian qword from named fields and values + * + */ + +#define BIT_ASSEMBLE_1( _ptr, _index, _field, _value ) \ + ( ( ( uint64_t) (_value) ) << \ + QWORD_BIT_OFFSET ( _ptr, _index, _field ) ) + +#define BIT_ASSEMBLE_2( _ptr, _index, _field, _value, ... ) \ + ( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \ + BIT_ASSEMBLE_1 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_ASSEMBLE_3( _ptr, _index, _field, _value, ... ) \ + ( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \ + BIT_ASSEMBLE_2 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_ASSEMBLE_4( _ptr, _index, _field, _value, ... ) \ + ( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \ + BIT_ASSEMBLE_3 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_ASSEMBLE_5( _ptr, _index, _field, _value, ... ) \ + ( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \ + BIT_ASSEMBLE_4 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_ASSEMBLE_6( _ptr, _index, _field, _value, ... ) \ + ( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \ + BIT_ASSEMBLE_5 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_ASSEMBLE_7( _ptr, _index, _field, _value, ... ) \ + ( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \ + BIT_ASSEMBLE_6 ( _ptr, _index, __VA_ARGS__ ) ) + +/* + * Build native-endian (positive) qword bitmasks from named fields + * + */ + +#define BIT_MASK_1( _ptr, _index, _field ) \ + ( BIT_MASK ( _ptr, _field ) << \ + QWORD_BIT_OFFSET ( _ptr, _index, _field ) ) + +#define BIT_MASK_2( _ptr, _index, _field, ... ) \ + ( BIT_MASK_1 ( _ptr, _index, _field ) | \ + BIT_MASK_1 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_MASK_3( _ptr, _index, _field, ... ) \ + ( BIT_MASK_1 ( _ptr, _index, _field ) | \ + BIT_MASK_2 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_MASK_4( _ptr, _index, _field, ... ) \ + ( BIT_MASK_1 ( _ptr, _index, _field ) | \ + BIT_MASK_3 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_MASK_5( _ptr, _index, _field, ... ) \ + ( BIT_MASK_1 ( _ptr, _index, _field ) | \ + BIT_MASK_4 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_MASK_6( _ptr, _index, _field, ... ) \ + ( BIT_MASK_1 ( _ptr, _index, _field ) | \ + BIT_MASK_5 ( _ptr, _index, __VA_ARGS__ ) ) + +#define BIT_MASK_7( _ptr, _index, _field, ... ) \ + ( BIT_MASK_1 ( _ptr, _index, _field ) | \ + BIT_MASK_6 ( _ptr, _index, __VA_ARGS__ ) ) + +/* + * Populate little-endian qwords from named fields and values + * + */ + +#define BIT_FILL( _ptr, _index, _assembled ) do { \ + uint64_t *__ptr = &(_ptr)->u.qwords[(_index)]; \ + uint64_t __assembled = (_assembled); \ + *__ptr = cpu_to_BIT64 ( __assembled ); \ + } while ( 0 ) + +#define BIT_FILL_1( _ptr, _field1, ... ) \ + BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + BIT_ASSEMBLE_1 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + _field1, __VA_ARGS__ ) ) + +#define BIT_FILL_2( _ptr, _field1, ... ) \ + BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + BIT_ASSEMBLE_2 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + _field1, __VA_ARGS__ ) ) + +#define BIT_FILL_3( _ptr, _field1, ... ) \ + BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + BIT_ASSEMBLE_3 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + _field1, __VA_ARGS__ ) ) + +#define BIT_FILL_4( _ptr, _field1, ... ) \ + BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + BIT_ASSEMBLE_4 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + _field1, __VA_ARGS__ ) ) + +#define BIT_FILL_5( _ptr, _field1, ... ) \ + BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + BIT_ASSEMBLE_5 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + _field1, __VA_ARGS__ ) ) + +#define BIT_FILL_6( _ptr, _field1, ... ) \ + BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + BIT_ASSEMBLE_6 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \ + _field1, __VA_ARGS__ ) ) + +/** Extract value of named field */ +#define BIT_GET64( _ptr, _field ) \ + ( { \ + unsigned int __index = QWORD_OFFSET ( _ptr, _field ); \ + uint64_t *__ptr = &(_ptr)->u.qwords[__index]; \ + uint64_t __value = BIT64_to_cpu ( *__ptr ); \ + __value >>= \ + QWORD_BIT_OFFSET ( _ptr, __index, _field ); \ + __value &= BIT_MASK ( _ptr, _field ); \ + __value; \ + } ) + +/** Extract value of named field (for fields up to the size of a long) */ +#define BIT_GET( _ptr, _field ) \ + ( ( unsigned long ) BIT_GET64 ( _ptr, _field ) ) + +#define BIT_SET( _ptr, _field, _value ) do { \ + unsigned int __index = QWORD_OFFSET ( _ptr, _field ); \ + uint64_t *__ptr = &(_ptr)->u.qwords[__index]; \ + unsigned int __shift = \ + QWORD_BIT_OFFSET ( _ptr, __index, _field ); \ + uint64_t __value = (_value); \ + *__ptr &= cpu_to_BIT64 ( ~( BIT_MASK ( _ptr, _field ) << \ + __shift ) ); \ + *__ptr |= cpu_to_BIT64 ( __value << __shift ); \ + } while ( 0 ) + +#endif /* _IPXE_BITOPS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/blockdev.h b/qemu/roms/ipxe/src/include/ipxe/blockdev.h new file mode 100644 index 000000000..9f0a9f787 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/blockdev.h @@ -0,0 +1,55 @@ +#ifndef _IPXE_BLOCKDEV_H +#define _IPXE_BLOCKDEV_H + +/** + * @file + * + * Block devices + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/uaccess.h> +#include <ipxe/interface.h> + +/** Block device capacity */ +struct block_device_capacity { + /** Total number of blocks */ + uint64_t blocks; + /** Block size */ + size_t blksize; + /** Maximum number of blocks per single transfer */ + unsigned int max_count; +}; + +extern int block_read ( struct interface *control, struct interface *data, + uint64_t lba, unsigned int count, + userptr_t buffer, size_t len ); +#define block_read_TYPE( object_type ) \ + typeof ( int ( object_type, struct interface *data, \ + uint64_t lba, unsigned int count, \ + userptr_t buffer, size_t len ) ) + +extern int block_write ( struct interface *control, struct interface *data, + uint64_t lba, unsigned int count, + userptr_t buffer, size_t len ); +#define block_write_TYPE( object_type ) \ + typeof ( int ( object_type, struct interface *data, \ + uint64_t lba, unsigned int count, \ + userptr_t buffer, size_t len ) ) + +extern int block_read_capacity ( struct interface *control, + struct interface *data ); +#define block_read_capacity_TYPE( object_type ) \ + typeof ( int ( object_type, struct interface *data ) ) + +extern void block_capacity ( struct interface *intf, + struct block_device_capacity *capacity ); +#define block_capacity_TYPE( object_type ) \ + typeof ( void ( object_type, \ + struct block_device_capacity *capacity ) ) + + +#endif /* _IPXE_BLOCKDEV_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/bofm.h b/qemu/roms/ipxe/src/include/ipxe/bofm.h new file mode 100644 index 000000000..1da47f651 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/bofm.h @@ -0,0 +1,351 @@ +#ifndef _IPXE_BOFM_H +#define _IPXE_BOFM_H + +/** + * @file + * + * IBM BladeCenter Open Fabric Manager (BOFM) + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/list.h> +#include <ipxe/pci.h> +#include <config/sideband.h> + +/** 'IBM ' signature + * + * Present in %edi when the BIOS initialisation entry point is called, + * with the BOFM table pointer in %esi. + * + * Defined in section 4.1.2 of the POST/BIOS BOFM I/O Address + * Re-Assignment Architecture document. + */ +#define IBMs_SIGNATURE ( ( 'I' << 24 ) + ( 'B' << 16 ) + ( 'M' << 8 ) + ' ' ) + +/** ' IBM' signature + * + * Returned in %edi from the BIOS initialisation entry point, with the + * return code in %dl. + * + * Defined in section 4.1.2 of the POST/BIOS BOFM I/O Address + * Re-Assignment Architecture document. + */ +#define sIBM_SIGNATURE ( ( ' ' << 24 ) + ( 'I' << 16 ) + ( 'B' << 8 ) + 'M' ) + +/** @defgroup bofmrc BOFM return codes + * + * Defined in section 4.1.3 of the POST/BIOS BOFM I/O Address + * Re-Assignment Architecture document. + * + * @{ + */ + +/** Successful */ +#define BOFM_SUCCESS 0x00 + +/** Invalid action string */ +#define BOFM_ERR_INVALID_ACTION 0x01 + +/** Unsupported parameter structure version */ +#define BOFM_ERR_UNSUPPORTED 0x02 + +/** Device error prohibited MAC/WWN update */ +#define BOFM_ERR_DEVICE_ERROR 0x03 + +/** PCI reset required (may be combined with another return code) */ +#define BOFM_PCI_RESET 0x80 + +/** @} */ + +/** Skip option ROM initialisation + * + * A BOFM BIOS may call the initialisation entry point multiple times; + * only the last call should result in actual initialisation. + * + * This flag is internal to iPXE. + */ +#define BOFM_SKIP_INIT 0x80000000UL + +/** BOFM table header + * + * Defined in section 4.1 of the Open Fabric Manager Parameter + * Specification document. + */ +struct bofm_global_header { + /** Signature */ + uint32_t magic; + /** Subsignature (action string) */ + uint32_t action; + /** Data structure version */ + uint8_t version; + /** Data structure level */ + uint8_t level; + /** Data structure length */ + uint16_t length; + /** Data structure checksum */ + uint8_t checksum; + /** Data structure profile */ + char profile[32]; + /** Data structure global options */ + uint32_t options; + /** Data structure sequence stamp */ + uint32_t sequence; +} __attribute__ (( packed )); + +/** BOFM table header signature + * + * Defined in section 4.1.2 of the POST/BIOS BOFM I/O Address + * Re-Assignment Architecture document. + */ +#define BOFM_IOAA_MAGIC ( 'I' + ( 'O' << 8 ) + ( 'A' << 16 ) + ( 'A' << 24 ) ) + +/** @defgroup bofmaction BOFM header subsignatures (action strings) + * + * Defined in section 4.1.2 of the POST/BIOS BOFM I/O Address + * Re-Assignment Architecture document. + * + * @{ + */ + +/** Update MAC/WWN */ +#define BOFM_ACTION_UPDT ( 'U' + ( 'P' << 8 ) + ( 'D' << 16 ) + ( 'T' << 24 ) ) + +/** Restore MAC/WWN to factory default */ +#define BOFM_ACTION_DFLT ( 'D' + ( 'F' << 8 ) + ( 'L' << 16 ) + ( 'T' << 24 ) ) + +/** Harvest MAC/WWN */ +#define BOFM_ACTION_HVST ( 'H' + ( 'V' << 8 ) + ( 'S' << 16 ) + ( 'T' << 24 ) ) + +/** Update MAC/WWN and initialise device */ +#define BOFM_ACTION_PARM ( 'P' + ( 'A' << 8 ) + ( 'R' << 16 ) + ( 'M' << 24 ) ) + +/** Just initialise the device */ +#define BOFM_ACTION_NONE ( 'N' + ( 'O' << 8 ) + ( 'N' << 16 ) + ( 'E' << 24 ) ) + +/** @} */ + +/** BOFM section header + * + * Defined in section 4.2 of the Open Fabric Manager Parameter + * Specification document. + */ +struct bofm_section_header { + /** Signature */ + uint32_t magic; + /** Length */ + uint16_t length; +} __attribute__ (( packed )); + +/** @defgroup bofmsections BOFM section header signatures + * + * Defined in section 4.2 of the Open Fabric Manager Parameter + * Specification document. + * + * @{ + */ + +/** EN start marker */ +#define BOFM_EN_MAGIC ( ' ' + ( ' ' << 8 ) + ( 'E' << 16 ) + ( 'N' << 24 ) ) + +/** End marker */ +#define BOFM_DONE_MAGIC ( 'D' + ( 'O' << 8 ) + ( 'N' << 16 ) + ( 'E' << 24 ) ) + +/** @} */ + +/** BOFM Ethernet parameter entry + * + * Defined in section 5.1 of the Open Fabric Manager Parameter + * Specification document. + */ +struct bofm_en { + /** Options */ + uint16_t options; + /** PCI bus:dev.fn + * + * Valid only if @c options indicates @c BOFM_EN_MAP_PFA + */ + uint16_t busdevfn; + /** Slot or mezzanine number + * + * Valid only if @c options indicates @c BOFM_EN_MAP_SLOT_PORT + */ + uint8_t slot; + /** Port number + * + * Valid only if @c options indicates @c BOFM_EN_MAP_SLOT_PORT + */ + uint8_t port; + /** Multi-port index */ + uint8_t mport; + /** VLAN tag for MAC address A */ + uint16_t vlan_a; + /** MAC address A + * + * MAC address A is the sole MAC address, or the lower + * (inclusive) bound of a range of MAC addresses. + */ + uint8_t mac_a[6]; + /** VLAN tag for MAC address B */ + uint16_t vlan_b; + /** MAC address B + * + * MAC address B is unset, or the upper (inclusive) bound of a + * range of MAC addresses + */ + uint8_t mac_b[6]; +} __attribute__ (( packed )); + +/** @defgroup bofmenopts BOFM Ethernet parameter entry options + * + * Defined in section 5.1 of the Open Fabric Manager Parameter + * Specification document. + * + * @{ + */ + +/** Port mapping mask */ +#define BOFM_EN_MAP_MASK 0x0001 + +/** Port mapping is by PCI bus:dev.fn */ +#define BOFM_EN_MAP_PFA 0x0000 + +/** Port mapping is by slot/port */ +#define BOFM_EN_MAP_SLOT_PORT 0x0001 + +/** MAC address B is present */ +#define BOFM_EN_EN_B 0x0002 + +/** VLAN tag for MAC address B is present */ +#define BOFM_EN_VLAN_B 0x0004 + +/** MAC address A is present */ +#define BOFM_EN_EN_A 0x0008 + +/** VLAN tag for MAC address A is present */ +#define BOFM_EN_VLAN_A 0x0010 + +/** Entry consumption indicator mask */ +#define BOFM_EN_CSM_MASK 0x00c0 + +/** Entry has not been used */ +#define BOFM_EN_CSM_UNUSED 0x0000 + +/** Entry has been used successfully */ +#define BOFM_EN_CSM_SUCCESS 0x0040 + +/** Entry has been used but failed */ +#define BOFM_EN_CSM_FAILED 0x0080 + +/** Consumed entry change mask */ +#define BOFM_EN_CHG_MASK 0x0100 + +/** Consumed entry is same as previous active entry */ +#define BOFM_EN_CHG_UNCHANGED 0x0000 + +/** Consumed entry is different than previous active entry */ +#define BOFM_EN_CHG_CHANGED 0x0100 + +/** Ignore values - it's harvest time */ +#define BOFM_EN_USAGE_HARVEST 0x1000 + +/** Use entry values for assignment */ +#define BOFM_EN_USAGE_ENTRY 0x0800 + +/** Use factory default values */ +#define BOFM_EN_USAGE_DEFAULT 0x0400 + +/** Harvest complete */ +#define BOFM_EN_HVST 0x2000 + +/** Harvest request mask */ +#define BOFM_EN_RQ_HVST_MASK 0xc000 + +/** Do not harvest */ +#define BOFM_EN_RQ_HVST_NONE 0x0000 + +/** Harvest factory default values */ +#define BOFM_EN_RQ_HVST_DEFAULT 0x4000 + +/** Harvest active values */ +#define BOFM_EN_RQ_HVST_ACTIVE 0xc000 + +/** @} */ + +/** BOFM magic value debug message format */ +#define BOFM_MAGIC_FMT "'%c%c%c%c'" + +/** BOFM magic value debug message arguments */ +#define BOFM_MAGIC_ARGS( magic ) \ + ( ( (magic) >> 0 ) & 0xff ), ( ( (magic) >> 8 ) & 0xff ), \ + ( ( (magic) >> 16 ) & 0xff ), ( ( (magic) >> 24 ) & 0xff ) + +/** A BOFM device */ +struct bofm_device { + /** Underlying PCI device */ + struct pci_device *pci; + /** BOFM device operations */ + struct bofm_operations *op; + /** List of BOFM devices */ + struct list_head list; +}; + +/** BOFM device operations */ +struct bofm_operations { + /** Harvest Ethernet MAC + * + * @v bofm BOFM device + * @v mport Multi-port index + * @v mac MAC to fill in + * @ret rc Return status code + */ + int ( * harvest ) ( struct bofm_device *bofm, unsigned int mport, + uint8_t *mac ); + /** Update Ethernet MAC + * + * @v bofm BOFM device + * @v mport Multi-port index + * @v mac New MAC + * @ret rc Return status code + */ + int ( * update ) ( struct bofm_device *bofm, unsigned int mport, + const uint8_t *mac ); +}; + +/** BOFM driver table */ +#define BOFM_DRIVERS __table ( struct pci_driver, "bofm_drivers" ) + +/** Declare a BOFM driver + * + * In the common case of non-BOFM-enabled builds, allow any BOFM code + * to be garbage-collected at link time to save space. + */ +#ifdef CONFIG_BOFM +#define __bofm_driver __table_entry ( BOFM_DRIVERS, 01 ) +#else +#define __bofm_driver +#endif + +/** + * Initialise BOFM device + * + * @v bofm BOFM device + * @v pci PCI device + * @v op BOFM device operations + */ +static inline __attribute__ (( always_inline )) void +bofm_init ( struct bofm_device *bofm, struct pci_device *pci, + struct bofm_operations *op ) { + bofm->pci = pci; + bofm->op = op; +} + +extern int bofm_register ( struct bofm_device *bofm ); +extern void bofm_unregister ( struct bofm_device *bofm ); +extern int bofm_find_driver ( struct pci_device *pci ); +extern int bofm ( userptr_t bofmtab, struct pci_device *pci ); +extern void bofm_test ( struct pci_device *pci ); + +#endif /* _IPXE_BOFM_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/cbc.h b/qemu/roms/ipxe/src/include/ipxe/cbc.h new file mode 100644 index 000000000..fae376577 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/cbc.h @@ -0,0 +1,100 @@ +#ifndef _IPXE_CBC_H +#define _IPXE_CBC_H + +/** @file + * + * Cipher-block chaining + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/crypto.h> + +/** + * Set key + * + * @v ctx Context + * @v key Key + * @v keylen Key length + * @v raw_cipher Underlying cipher algorithm + * @v cbc_ctx CBC context + * @ret rc Return status code + */ +static inline int cbc_setkey ( void *ctx, const void *key, size_t keylen, + struct cipher_algorithm *raw_cipher, + void *cbc_ctx __unused ) { + + return cipher_setkey ( raw_cipher, ctx, key, keylen ); +} + +/** + * Set initialisation vector + * + * @v ctx Context + * @v iv Initialisation vector + * @v raw_cipher Underlying cipher algorithm + * @v cbc_ctx CBC context + */ +static inline void cbc_setiv ( void *ctx __unused, const void *iv, + struct cipher_algorithm *raw_cipher, + void *cbc_ctx ) { + memcpy ( cbc_ctx, iv, raw_cipher->blocksize ); +} + +extern void cbc_encrypt ( void *ctx, const void *src, void *dst, + size_t len, struct cipher_algorithm *raw_cipher, + void *cbc_ctx ); +extern void cbc_decrypt ( void *ctx, const void *src, void *dst, + size_t len, struct cipher_algorithm *raw_cipher, + void *cbc_ctx ); + +/** + * Create a cipher-block chaining mode of behaviour of an existing cipher + * + * @v _cbc_name Name for the new CBC cipher + * @v _cbc_cipher New cipher algorithm + * @v _raw_cipher Underlying cipher algorithm + * @v _raw_context Context structure for the underlying cipher + * @v _blocksize Cipher block size + */ +#define CBC_CIPHER( _cbc_name, _cbc_cipher, _raw_cipher, _raw_context, \ + _blocksize ) \ +struct _cbc_name ## _context { \ + _raw_context raw_ctx; \ + uint8_t cbc_ctx[_blocksize]; \ +}; \ +static int _cbc_name ## _setkey ( void *ctx, const void *key, \ + size_t keylen ) { \ + struct _cbc_name ## _context * _cbc_name ## _ctx = ctx; \ + return cbc_setkey ( &_cbc_name ## _ctx->raw_ctx, key, keylen, \ + &_raw_cipher, &_cbc_name ## _ctx->cbc_ctx );\ +} \ +static void _cbc_name ## _setiv ( void *ctx, const void *iv ) { \ + struct _cbc_name ## _context * _cbc_name ## _ctx = ctx; \ + cbc_setiv ( &_cbc_name ## _ctx->raw_ctx, iv, \ + &_raw_cipher, &aes_cbc_ctx->cbc_ctx ); \ +} \ +static void _cbc_name ## _encrypt ( void *ctx, const void *src, \ + void *dst, size_t len ) { \ + struct _cbc_name ## _context * _cbc_name ## _ctx = ctx; \ + cbc_encrypt ( &_cbc_name ## _ctx->raw_ctx, src, dst, len, \ + &_raw_cipher, &aes_cbc_ctx->cbc_ctx ); \ +} \ +static void _cbc_name ## _decrypt ( void *ctx, const void *src, \ + void *dst, size_t len ) { \ + struct _cbc_name ## _context * _cbc_name ## _ctx = ctx; \ + cbc_decrypt ( &_cbc_name ## _ctx->raw_ctx, src, dst, len, \ + &_raw_cipher, &aes_cbc_ctx->cbc_ctx ); \ +} \ +struct cipher_algorithm _cbc_cipher = { \ + .name = #_cbc_name, \ + .ctxsize = sizeof ( struct _cbc_name ## _context ), \ + .blocksize = _blocksize, \ + .setkey = _cbc_name ## _setkey, \ + .setiv = _cbc_name ## _setiv, \ + .encrypt = _cbc_name ## _encrypt, \ + .decrypt = _cbc_name ## _decrypt, \ +}; + +#endif /* _IPXE_CBC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/certstore.h b/qemu/roms/ipxe/src/include/ipxe/certstore.h new file mode 100644 index 000000000..7456db621 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/certstore.h @@ -0,0 +1,21 @@ +#ifndef _IPXE_CERTSTORE_H +#define _IPXE_CERTSTORE_H + +/** @file + * + * Certificate store + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/asn1.h> +#include <ipxe/x509.h> + +extern struct x509_chain certstore; + +extern struct x509_certificate * certstore_find ( struct asn1_cursor *raw ); +extern struct x509_certificate * certstore_find_key ( struct asn1_cursor *key ); +extern void certstore_add ( struct x509_certificate *cert ); + +#endif /* _IPXE_CERTSTORE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/chap.h b/qemu/roms/ipxe/src/include/ipxe/chap.h new file mode 100644 index 000000000..fce48f3ea --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/chap.h @@ -0,0 +1,53 @@ +#ifndef _IPXE_CHAP_H +#define _IPXE_CHAP_H + +/** @file + * + * CHAP protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/md5.h> + +struct digest_algorithm; + +/** A CHAP response */ +struct chap_response { + /** Digest algorithm used for the response */ + struct digest_algorithm *digest; + /** Context used by the digest algorithm */ + uint8_t *digest_context; + /** CHAP response */ + uint8_t *response; + /** Length of CHAP response */ + size_t response_len; +}; + +extern int chap_init ( struct chap_response *chap, + struct digest_algorithm *digest ); +extern void chap_update ( struct chap_response *chap, const void *data, + size_t len ); +extern void chap_respond ( struct chap_response *chap ); +extern void chap_finish ( struct chap_response *chap ); + +/** + * Add identifier data to the CHAP challenge + * + * @v chap CHAP response + * @v identifier CHAP identifier + * + * The CHAP identifier is the first byte of the CHAP challenge. This + * function is a notational convenience for calling chap_update() for + * the identifier byte. + */ +static inline void chap_set_identifier ( struct chap_response *chap, + unsigned int identifier ) { + uint8_t ident_byte = identifier; + + chap_update ( chap, &ident_byte, sizeof ( ident_byte ) ); +} + +#endif /* _IPXE_CHAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/cms.h b/qemu/roms/ipxe/src/include/ipxe/cms.h new file mode 100644 index 000000000..e026ebd2f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/cms.h @@ -0,0 +1,76 @@ +#ifndef _IPXE_CMS_H +#define _IPXE_CMS_H + +/** @file + * + * Cryptographic Message Syntax (PKCS #7) + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <time.h> +#include <ipxe/asn1.h> +#include <ipxe/crypto.h> +#include <ipxe/x509.h> +#include <ipxe/refcnt.h> +#include <ipxe/uaccess.h> + +/** CMS signer information */ +struct cms_signer_info { + /** List of signer information blocks */ + struct list_head list; + + /** Certificate chain */ + struct x509_chain *chain; + + /** Digest algorithm */ + struct digest_algorithm *digest; + /** Public-key algorithm */ + struct pubkey_algorithm *pubkey; + + /** Signature */ + void *signature; + /** Length of signature */ + size_t signature_len; +}; + +/** A CMS signature */ +struct cms_signature { + /** Reference count */ + struct refcnt refcnt; + /** List of all certificates */ + struct x509_chain *certificates; + /** List of signer information blocks */ + struct list_head info; +}; + +/** + * Get reference to CMS signature + * + * @v sig CMS signature + * @ret sig CMS signature + */ +static inline __attribute__ (( always_inline )) struct cms_signature * +cms_get ( struct cms_signature *sig ) { + ref_get ( &sig->refcnt ); + return sig; +} + +/** + * Drop reference to CMS signature + * + * @v sig CMS signature + */ +static inline __attribute__ (( always_inline )) void +cms_put ( struct cms_signature *sig ) { + ref_put ( &sig->refcnt ); +} + +extern int cms_signature ( const void *data, size_t len, + struct cms_signature **sig ); +extern int cms_verify ( struct cms_signature *sig, userptr_t data, size_t len, + const char *name, time_t time, struct x509_chain *store, + struct x509_root *root ); + +#endif /* _IPXE_CMS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/command.h b/qemu/roms/ipxe/src/include/ipxe/command.h new file mode 100644 index 000000000..432da1abb --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/command.h @@ -0,0 +1,28 @@ +#ifndef _IPXE_COMMAND_H +#define _IPXE_COMMAND_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tables.h> + +/** A command-line command */ +struct command { + /** Name of the command */ + const char *name; + /** + * Function implementing the command + * + * @v argc Argument count + * @v argv Argument list + * @ret rc Return status code + */ + int ( * exec ) ( int argc, char **argv ); +}; + +#define COMMANDS __table ( struct command, "commands" ) + +#define __command __table_entry ( COMMANDS, 01 ) + +extern char * concat_args ( char **args ); + +#endif /* _IPXE_COMMAND_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/console.h b/qemu/roms/ipxe/src/include/ipxe/console.h new file mode 100644 index 000000000..4b90c9cec --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/console.h @@ -0,0 +1,219 @@ +#ifndef _IPXE_CONSOLE_H +#define _IPXE_CONSOLE_H + +#include <stddef.h> +#include <stdio.h> +#include <ipxe/tables.h> + +/** @file + * + * User interaction. + * + * Various console devices can be selected via the build options + * CONSOLE_FIRMWARE, CONSOLE_SERIAL etc. The console functions + * putchar(), getchar() and iskey() delegate to the individual console + * drivers. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct pixel_buffer; + +/** A console configuration */ +struct console_configuration { + /** Width */ + unsigned int width; + /** Height */ + unsigned int height; + /** Colour depth */ + unsigned int depth; + /** Left margin */ + unsigned int left; + /** Right margin */ + unsigned int right; + /** Top margin */ + unsigned int top; + /** Bottom margin */ + unsigned int bottom; + /** Background picture, if any */ + struct pixel_buffer *pixbuf; +}; + +/** + * A console driver + * + * Defines the functions that implement a particular console type. + * Must be made part of the console drivers table by using + * #__console_driver. + * + * @note Consoles that cannot be used before their initialisation + * function has completed should set #disabled initially. This allows + * other console devices to still be used to print out early debugging + * messages. + */ +struct console_driver { + /** + * Console disabled flags + * + * This is the bitwise OR of zero or more console disabled + * flags. + */ + int disabled; + /** + * Write a character to the console + * + * @v character Character to be written + */ + void ( * putchar ) ( int character ); + /** + * Read a character from the console + * + * @ret character Character read + * + * If no character is available to be read, this method will + * block. The character read should not be echoed back to the + * console. + */ + int ( * getchar ) ( void ); + /** + * Check for available input + * + * @ret is_available Input is available + * + * This should return true if a subsequent call to getchar() + * will not block. + */ + int ( * iskey ) ( void ); + /** + * Configure console + * + * @v config Console configuration, or NULL to reset + * @ret rc Return status code + */ + int ( * configure ) ( struct console_configuration *config ); + /** + * Console usage bitmask + * + * This is the bitwise OR of zero or more @c CONSOLE_USAGE_XXX + * values. + */ + int usage; +}; + +/** Console is disabled for input */ +#define CONSOLE_DISABLED_INPUT 0x0001 + +/** Console is disabled for output */ +#define CONSOLE_DISABLED_OUTPUT 0x0002 + +/** Console is disabled for all uses */ +#define CONSOLE_DISABLED ( CONSOLE_DISABLED_INPUT | CONSOLE_DISABLED_OUTPUT ) + +/** Console driver table */ +#define CONSOLES __table ( struct console_driver, "consoles" ) + +/** + * Mark a <tt> struct console_driver </tt> as being part of the + * console drivers table. + * + * Use as e.g. + * + * @code + * + * struct console_driver my_console __console_driver = { + * .putchar = my_putchar, + * .getchar = my_getchar, + * .iskey = my_iskey, + * }; + * + * @endcode + * + */ +#define __console_driver __table_entry ( CONSOLES, 01 ) + +/** + * @defgroup consoleusage Console usages + * @{ + */ + +/** Standard output */ +#define CONSOLE_USAGE_STDOUT 0x0001 + +/** Debug messages */ +#define CONSOLE_USAGE_DEBUG 0x0002 + +/** Text-based user interface */ +#define CONSOLE_USAGE_TUI 0x0004 + +/** Log messages */ +#define CONSOLE_USAGE_LOG 0x0008 + +/** All console usages */ +#define CONSOLE_USAGE_ALL ( CONSOLE_USAGE_STDOUT | CONSOLE_USAGE_DEBUG | \ + CONSOLE_USAGE_TUI | CONSOLE_USAGE_LOG ) + +/** @} */ + +/** + * Test to see if console has an explicit usage + * + * @v console Console definition (e.g. CONSOLE_PCBIOS) + * @ret explicit Console has an explicit usage + * + * This relies upon the trick that the expression ( 2 * N + 1 ) will + * be valid even if N is defined to be empty, since it will then + * evaluate to give ( 2 * + 1 ) == ( 2 * +1 ) == 2. + */ +#define CONSOLE_EXPLICIT( console ) ( ( 2 * console + 1 ) != 2 ) + +/** Default console width */ +#define CONSOLE_DEFAULT_WIDTH 80 + +/** Default console height */ +#define CONSOLE_DEFAULT_HEIGHT 25 + +extern int console_usage; +extern unsigned int console_width; +extern unsigned int console_height; + +/** + * Set console usage + * + * @v usage New console usage + * @ret old_usage Previous console usage + */ +static inline __attribute__ (( always_inline )) int +console_set_usage ( int usage ) { + int old_usage = console_usage; + + console_usage = usage; + return old_usage; +} + +/** + * Set console size + * + * @v width Width, in characters + * @v height Height, in characters + */ +static inline __attribute__ (( always_inline )) void +console_set_size ( unsigned int width, unsigned int height ) { + console_width = width; + console_height = height; +} + +extern int iskey ( void ); +extern int getkey ( unsigned long timeout ); +extern int console_configure ( struct console_configuration *config ); + +/** + * Reset console + * + */ +static inline __attribute__ (( always_inline )) void console_reset ( void ) { + + console_configure ( NULL ); +} + +#endif /* _IPXE_CONSOLE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/cpio.h b/qemu/roms/ipxe/src/include/ipxe/cpio.h new file mode 100644 index 000000000..277232808 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/cpio.h @@ -0,0 +1,53 @@ +#ifndef _IPXE_CPIO_H +#define _IPXE_CPIO_H + +/** @file + * + * CPIO archives + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** A CPIO archive header + * + * All field are hexadecimal ASCII numbers padded with '0' on the + * left to the full width of the field. + */ +struct cpio_header { + /** The string "070701" or "070702" */ + char c_magic[6]; + /** File inode number */ + char c_ino[8]; + /** File mode and permissions */ + char c_mode[8]; + /** File uid */ + char c_uid[8]; + /** File gid */ + char c_gid[8]; + /** Number of links */ + char c_nlink[8]; + /** Modification time */ + char c_mtime[8]; + /** Size of data field */ + char c_filesize[8]; + /** Major part of file device number */ + char c_maj[8]; + /** Minor part of file device number */ + char c_min[8]; + /** Major part of device node reference */ + char c_rmaj[8]; + /** Minor part of device node reference */ + char c_rmin[8]; + /** Length of filename, including final NUL */ + char c_namesize[8]; + /** Checksum of data field if c_magic is 070702, othersize zero */ + char c_chksum[8]; +} __attribute__ (( packed )); + +/** CPIO magic */ +#define CPIO_MAGIC "070701" + +extern void cpio_set_field ( char *field, unsigned long value ); + +#endif /* _IPXE_CPIO_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/crc32.h b/qemu/roms/ipxe/src/include/ipxe/crc32.h new file mode 100644 index 000000000..38ac1b31f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/crc32.h @@ -0,0 +1,10 @@ +#ifndef _IPXE_CRC32_H +#define _IPXE_CRC32_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +u32 crc32_le ( u32 seed, const void *data, size_t len ); + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/crypto.h b/qemu/roms/ipxe/src/include/ipxe/crypto.h new file mode 100644 index 000000000..3eda5ec6e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/crypto.h @@ -0,0 +1,270 @@ +#ifndef _IPXE_CRYPTO_H +#define _IPXE_CRYPTO_H + +/** @file + * + * Cryptographic API + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stddef.h> + +/** A message digest algorithm */ +struct digest_algorithm { + /** Algorithm name */ + const char *name; + /** Context size */ + size_t ctxsize; + /** Block size */ + size_t blocksize; + /** Digest size */ + size_t digestsize; + /** Initialise digest + * + * @v ctx Context + */ + void ( * init ) ( void *ctx ); + /** Update digest with new data + * + * @v ctx Context + * @v src Data to digest + * @v len Length of data + * + * @v len is not necessarily a multiple of @c blocksize. + */ + void ( * update ) ( void *ctx, const void *src, size_t len ); + /** Finalise digest + * + * @v ctx Context + * @v out Buffer for digest output + */ + void ( * final ) ( void *ctx, void *out ); +}; + +/** A cipher algorithm */ +struct cipher_algorithm { + /** Algorithm name */ + const char *name; + /** Context size */ + size_t ctxsize; + /** Block size */ + size_t blocksize; + /** Set key + * + * @v ctx Context + * @v key Key + * @v keylen Key length + * @ret rc Return status code + */ + int ( * setkey ) ( void *ctx, const void *key, size_t keylen ); + /** Set initialisation vector + * + * @v ctx Context + * @v iv Initialisation vector + */ + void ( * setiv ) ( void *ctx, const void *iv ); + /** Encrypt data + * + * @v ctx Context + * @v src Data to encrypt + * @v dst Buffer for encrypted data + * @v len Length of data + * + * @v len is guaranteed to be a multiple of @c blocksize. + */ + void ( * encrypt ) ( void *ctx, const void *src, void *dst, + size_t len ); + /** Decrypt data + * + * @v ctx Context + * @v src Data to decrypt + * @v dst Buffer for decrypted data + * @v len Length of data + * + * @v len is guaranteed to be a multiple of @c blocksize. + */ + void ( * decrypt ) ( void *ctx, const void *src, void *dst, + size_t len ); +}; + +/** A public key algorithm */ +struct pubkey_algorithm { + /** Algorithm name */ + const char *name; + /** Context size */ + size_t ctxsize; + /** Initialise algorithm + * + * @v ctx Context + * @v key Key + * @v key_len Length of key + * @ret rc Return status code + */ + int ( * init ) ( void *ctx, const void *key, size_t key_len ); + /** Calculate maximum output length + * + * @v ctx Context + * @ret max_len Maximum output length + */ + size_t ( * max_len ) ( void *ctx ); + /** Encrypt + * + * @v ctx Context + * @v plaintext Plaintext + * @v plaintext_len Length of plaintext + * @v ciphertext Ciphertext + * @ret ciphertext_len Length of ciphertext, or negative error + */ + int ( * encrypt ) ( void *ctx, const void *data, size_t len, + void *out ); + /** Decrypt + * + * @v ctx Context + * @v ciphertext Ciphertext + * @v ciphertext_len Ciphertext length + * @v plaintext Plaintext + * @ret plaintext_len Plaintext length, or negative error + */ + int ( * decrypt ) ( void *ctx, const void *data, size_t len, + void *out ); + /** Sign digest value + * + * @v ctx Context + * @v digest Digest algorithm + * @v value Digest value + * @v signature Signature + * @ret signature_len Signature length, or negative error + */ + int ( * sign ) ( void *ctx, struct digest_algorithm *digest, + const void *value, void *signature ); + /** Verify signed digest value + * + * @v ctx Context + * @v digest Digest algorithm + * @v value Digest value + * @v signature Signature + * @v signature_len Signature length + * @ret rc Return status code + */ + int ( * verify ) ( void *ctx, struct digest_algorithm *digest, + const void *value, const void *signature, + size_t signature_len ); + /** Finalise algorithm + * + * @v ctx Context + */ + void ( * final ) ( void *ctx ); + /** Check that public key matches private key + * + * @v private_key Private key + * @v private_key_len Private key length + * @v public_key Public key + * @v public_key_len Public key length + * @ret rc Return status code + */ + int ( * match ) ( const void *private_key, size_t private_key_len, + const void *public_key, size_t public_key_len ); +}; + +static inline void digest_init ( struct digest_algorithm *digest, + void *ctx ) { + digest->init ( ctx ); +} + +static inline void digest_update ( struct digest_algorithm *digest, + void *ctx, const void *data, size_t len ) { + digest->update ( ctx, data, len ); +} + +static inline void digest_final ( struct digest_algorithm *digest, + void *ctx, void *out ) { + digest->final ( ctx, out ); +} + +static inline int cipher_setkey ( struct cipher_algorithm *cipher, + void *ctx, const void *key, size_t keylen ) { + return cipher->setkey ( ctx, key, keylen ); +} + +static inline void cipher_setiv ( struct cipher_algorithm *cipher, + void *ctx, const void *iv ) { + cipher->setiv ( ctx, iv ); +} + +static inline void cipher_encrypt ( struct cipher_algorithm *cipher, + void *ctx, const void *src, void *dst, + size_t len ) { + cipher->encrypt ( ctx, src, dst, len ); +} +#define cipher_encrypt( cipher, ctx, src, dst, len ) do { \ + assert ( ( (len) & ( (cipher)->blocksize - 1 ) ) == 0 ); \ + cipher_encrypt ( (cipher), (ctx), (src), (dst), (len) ); \ + } while ( 0 ) + +static inline void cipher_decrypt ( struct cipher_algorithm *cipher, + void *ctx, const void *src, void *dst, + size_t len ) { + cipher->decrypt ( ctx, src, dst, len ); +} +#define cipher_decrypt( cipher, ctx, src, dst, len ) do { \ + assert ( ( (len) & ( (cipher)->blocksize - 1 ) ) == 0 ); \ + cipher_decrypt ( (cipher), (ctx), (src), (dst), (len) ); \ + } while ( 0 ) + +static inline int is_stream_cipher ( struct cipher_algorithm *cipher ) { + return ( cipher->blocksize == 1 ); +} + +static inline int pubkey_init ( struct pubkey_algorithm *pubkey, void *ctx, + const void *key, size_t key_len ) { + return pubkey->init ( ctx, key, key_len ); +} + +static inline size_t pubkey_max_len ( struct pubkey_algorithm *pubkey, + void *ctx ) { + return pubkey->max_len ( ctx ); +} + +static inline int pubkey_encrypt ( struct pubkey_algorithm *pubkey, void *ctx, + const void *data, size_t len, void *out ) { + return pubkey->encrypt ( ctx, data, len, out ); +} + +static inline int pubkey_decrypt ( struct pubkey_algorithm *pubkey, void *ctx, + const void *data, size_t len, void *out ) { + return pubkey->decrypt ( ctx, data, len, out ); +} + +static inline int pubkey_sign ( struct pubkey_algorithm *pubkey, void *ctx, + struct digest_algorithm *digest, + const void *value, void *signature ) { + return pubkey->sign ( ctx, digest, value, signature ); +} + +static inline int pubkey_verify ( struct pubkey_algorithm *pubkey, void *ctx, + struct digest_algorithm *digest, + const void *value, const void *signature, + size_t signature_len ) { + return pubkey->verify ( ctx, digest, value, signature, signature_len ); +} + +static inline void pubkey_final ( struct pubkey_algorithm *pubkey, void *ctx ) { + pubkey->final ( ctx ); +} + +static inline int pubkey_match ( struct pubkey_algorithm *pubkey, + const void *private_key, + size_t private_key_len, const void *public_key, + size_t public_key_len ) { + return pubkey->match ( private_key, private_key_len, public_key, + public_key_len ); +} + +extern struct digest_algorithm digest_null; +extern struct cipher_algorithm cipher_null; +extern struct pubkey_algorithm pubkey_null; + +#endif /* _IPXE_CRYPTO_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/deflate.h b/qemu/roms/ipxe/src/include/ipxe/deflate.h new file mode 100644 index 000000000..19c5125eb --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/deflate.h @@ -0,0 +1,283 @@ +#ifndef _IPXE_DEFLATE_H +#define _IPXE_DEFLATE_H + +/** @file + * + * DEFLATE decompression algorithm + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <string.h> +#include <ipxe/uaccess.h> + +/** Compression formats */ +enum deflate_format { + /** Raw DEFLATE data (no header or footer) */ + DEFLATE_RAW, + /** ZLIB header and footer */ + DEFLATE_ZLIB, +}; + +/** Block header length (in bits) */ +#define DEFLATE_HEADER_BITS 3 + +/** Block header final block flags bit */ +#define DEFLATE_HEADER_BFINAL_BIT 0 + +/** Block header type LSB */ +#define DEFLATE_HEADER_BTYPE_LSB 1 + +/** Block header type mask */ +#define DEFLATE_HEADER_BTYPE_MASK 0x03 + +/** Block header type: literal data */ +#define DEFLATE_HEADER_BTYPE_LITERAL 0 + +/** Block header type: static Huffman alphabet */ +#define DEFLATE_HEADER_BTYPE_STATIC 1 + +/** Block header type: dynamic Huffman alphabet */ +#define DEFLATE_HEADER_BTYPE_DYNAMIC 2 + +/** Literal header LEN/NLEN field length (in bits) */ +#define DEFLATE_LITERAL_LEN_BITS 16 + +/** Dynamic header length (in bits) */ +#define DEFLATE_DYNAMIC_BITS 14 + +/** Dynamic header HLIT field LSB */ +#define DEFLATE_DYNAMIC_HLIT_LSB 0 + +/** Dynamic header HLIT field mask */ +#define DEFLATE_DYNAMIC_HLIT_MASK 0x1f + +/** Dynamic header HDIST field LSB */ +#define DEFLATE_DYNAMIC_HDIST_LSB 5 + +/** Dynamic header HDIST field mask */ +#define DEFLATE_DYNAMIC_HDIST_MASK 0x1f + +/** Dynamic header HCLEN field LSB */ +#define DEFLATE_DYNAMIC_HCLEN_LSB 10 + +/** Dynamic header HCLEN field mask */ +#define DEFLATE_DYNAMIC_HCLEN_MASK 0x0f + +/** Dynamic header code length length (in bits) */ +#define DEFLATE_CODELEN_BITS 3 + +/** Maximum length of a Huffman symbol (in bits) */ +#define DEFLATE_HUFFMAN_BITS 15 + +/** Quick lookup length for a Huffman symbol (in bits) + * + * This is a policy decision. + */ +#define DEFLATE_HUFFMAN_QL_BITS 7 + +/** Quick lookup shift */ +#define DEFLATE_HUFFMAN_QL_SHIFT ( 16 - DEFLATE_HUFFMAN_QL_BITS ) + +/** Literal/length end of block code */ +#define DEFLATE_LITLEN_END 256 + +/** Maximum value of a literal/length code */ +#define DEFLATE_LITLEN_MAX_CODE 287 + +/** Maximum value of a distance code */ +#define DEFLATE_DISTANCE_MAX_CODE 31 + +/** Maximum value of a code length code */ +#define DEFLATE_CODELEN_MAX_CODE 18 + +/** ZLIB header length (in bits) */ +#define ZLIB_HEADER_BITS 16 + +/** ZLIB header compression method LSB */ +#define ZLIB_HEADER_CM_LSB 0 + +/** ZLIB header compression method mask */ +#define ZLIB_HEADER_CM_MASK 0x0f + +/** ZLIB header compression method: DEFLATE */ +#define ZLIB_HEADER_CM_DEFLATE 8 + +/** ZLIB header preset dictionary flag bit */ +#define ZLIB_HEADER_FDICT_BIT 13 + +/** ZLIB ADLER32 length (in bits) */ +#define ZLIB_ADLER32_BITS 32 + +/** A Huffman-coded set of symbols of a given length */ +struct deflate_huf_symbols { + /** Length of Huffman-coded symbols */ + uint8_t bits; + /** Shift to normalise symbols of this length to 16 bits */ + uint8_t shift; + /** Number of Huffman-coded symbols having this length */ + uint16_t freq; + /** First symbol of this length (normalised to 16 bits) + * + * Stored as a 32-bit value to allow the value 0x10000 to be + * used for empty sets of symbols longer than the maximum + * utilised length. + */ + uint32_t start; + /** Raw symbols having this length */ + uint16_t *raw; +}; + +/** A Huffman-coded alphabet */ +struct deflate_alphabet { + /** Huffman-coded symbol set for each length */ + struct deflate_huf_symbols huf[DEFLATE_HUFFMAN_BITS]; + /** Quick lookup table */ + uint8_t lookup[ 1 << DEFLATE_HUFFMAN_QL_BITS ]; + /** Raw symbols + * + * Ordered by Huffman-coded symbol length, then by symbol + * value. This field has a variable length. + */ + uint16_t raw[0]; +}; + +/** A static Huffman alphabet length pattern */ +struct deflate_static_length_pattern { + /** Length pair */ + uint8_t fill; + /** Repetition count */ + uint8_t count; +} __attribute__ (( packed )); + +/** Decompressor */ +struct deflate { + /** Resume point + * + * Used as the target of a computed goto to jump to the + * appropriate point within the state machine. + */ + void *resume; + /** Format */ + enum deflate_format format; + + /** Accumulator */ + uint32_t accumulator; + /** Bit-reversed accumulator + * + * Don't ask. + */ + uint32_t rotalumucca; + /** Number of bits within the accumulator */ + unsigned int bits; + + /** Current block header */ + unsigned int header; + /** Remaining length of data (e.g. within a literal block) */ + size_t remaining; + /** Current length index within a set of code lengths */ + unsigned int length_index; + /** Target length index within a set of code lengths */ + unsigned int length_target; + /** Current length within a set of code lengths */ + unsigned int length; + /** Number of extra bits required */ + unsigned int extra_bits; + /** Length of a duplicated string */ + size_t dup_len; + /** Distance of a duplicated string */ + size_t dup_distance; + + /** Literal/length Huffman alphabet */ + struct deflate_alphabet litlen; + /** Literal/length raw symbols + * + * Must immediately follow the literal/length Huffman alphabet. + */ + uint16_t litlen_raw[ DEFLATE_LITLEN_MAX_CODE + 1 ]; + /** Number of symbols in the literal/length Huffman alphabet */ + unsigned int litlen_count; + + /** Distance and code length Huffman alphabet + * + * The code length Huffman alphabet has a maximum Huffman + * symbol length of 7 and a maximum code value of 18, and is + * thus strictly smaller than the distance Huffman alphabet. + * Since we never need both alphabets simultaneously, we can + * reuse the storage space for the distance alphabet to + * temporarily hold the code length alphabet. + */ + struct deflate_alphabet distance_codelen; + /** Distance and code length raw symbols + * + * Must immediately follow the distance and code length + * Huffman alphabet. + */ + uint16_t distance_codelen_raw[ DEFLATE_DISTANCE_MAX_CODE + 1 ]; + /** Number of symbols in the distance Huffman alphabet */ + unsigned int distance_count; + + /** Huffman code lengths + * + * The literal/length and distance code lengths are + * constructed as a single set of lengths. + * + * The code length Huffman alphabet has a maximum code value + * of 18 and the set of lengths is thus strictly smaller than + * the combined literal/length and distance set of lengths. + * Since we never need both alphabets simultaneously, we can + * reuse the storage space for the literal/length and distance + * code lengths to temporarily hold the code length code + * lengths. + */ + uint8_t lengths[ ( ( DEFLATE_LITLEN_MAX_CODE + 1 ) + + ( DEFLATE_DISTANCE_MAX_CODE + 1 ) + + 1 /* round up */ ) / 2 ]; +}; + +/** A chunk of data */ +struct deflate_chunk { + /** Data */ + userptr_t data; + /** Current offset */ + size_t offset; + /** Length of data */ + size_t len; +}; + +/** + * Initialise chunk of data + * + * @v chunk Chunk of data to initialise + * @v data Data + * @v offset Starting offset + * @v len Length + */ +static inline __attribute__ (( always_inline )) void +deflate_chunk_init ( struct deflate_chunk *chunk, userptr_t data, + size_t offset, size_t len ) { + + chunk->data = data; + chunk->offset = offset; + chunk->len = len; +} + +/** + * Check if decompression has finished + * + * @v deflate Decompressor + * @ret finished Decompression has finished + */ +static inline int deflate_finished ( struct deflate *deflate ) { + return ( deflate->resume == NULL ); +} + +extern void deflate_init ( struct deflate *deflate, + enum deflate_format format ); +extern int deflate_inflate ( struct deflate *deflate, + struct deflate_chunk *in, + struct deflate_chunk *out ); + +#endif /* _IPXE_DEFLATE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/device.h b/qemu/roms/ipxe/src/include/ipxe/device.h new file mode 100644 index 000000000..7202a6966 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/device.h @@ -0,0 +1,148 @@ +#ifndef _IPXE_DEVICE_H +#define _IPXE_DEVICE_H + +/** + * @file + * + * Device model + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/list.h> +#include <ipxe/tables.h> + +struct interface; + +/** A hardware device description */ +struct device_description { + /** Bus type + * + * This must be a BUS_TYPE_XXX constant. + */ + unsigned int bus_type; + /** Location + * + * The interpretation of this field is bus-type-specific. + */ + unsigned int location; + /** Vendor ID */ + unsigned int vendor; + /** Device ID */ + unsigned int device; + /** Device class */ + unsigned long class; + /** I/O address */ + unsigned long ioaddr; + /** IRQ */ + unsigned int irq; +}; + +/** PCI bus type */ +#define BUS_TYPE_PCI 1 + +/** ISAPnP bus type */ +#define BUS_TYPE_ISAPNP 2 + +/** EISA bus type */ +#define BUS_TYPE_EISA 3 + +/** MCA bus type */ +#define BUS_TYPE_MCA 4 + +/** ISA bus type */ +#define BUS_TYPE_ISA 5 + +/** TAP bus type */ +#define BUS_TYPE_TAP 6 + +/** EFI bus type */ +#define BUS_TYPE_EFI 7 + +/** Xen bus type */ +#define BUS_TYPE_XEN 8 + +/** A hardware device */ +struct device { + /** Name */ + char name[16]; + /** Driver name */ + const char *driver_name; + /** Device description */ + struct device_description desc; + /** Devices on the same bus */ + struct list_head siblings; + /** Devices attached to this device */ + struct list_head children; + /** Bus device */ + struct device *parent; +}; + +/** + * A root device + * + * Root devices are system buses such as PCI, EISA, etc. + * + */ +struct root_device { + /** Device chain + * + * A root device has a NULL parent field. + */ + struct device dev; + /** Root device driver */ + struct root_driver *driver; +}; + +/** A root device driver */ +struct root_driver { + /** + * Add root device + * + * @v rootdev Root device + * @ret rc Return status code + * + * Called from probe_devices() for all root devices in the build. + */ + int ( * probe ) ( struct root_device *rootdev ); + /** + * Remove root device + * + * @v rootdev Root device + * + * Called from remove_device() for all successfully-probed + * root devices. + */ + void ( * remove ) ( struct root_device *rootdev ); +}; + +/** Root device table */ +#define ROOT_DEVICES __table ( struct root_device, "root_devices" ) + +/** Declare a root device */ +#define __root_device __table_entry ( ROOT_DEVICES, 01 ) + +extern int device_keep_count; + +/** + * Prevent devices from being removed on shutdown + * + */ +static inline void devices_get ( void ) { + device_keep_count++; +} + +/** + * Allow devices to be removed on shutdown + * + */ +static inline void devices_put ( void ) { + device_keep_count--; +} + +extern struct device * identify_device ( struct interface *intf ); +#define identify_device_TYPE( object_type ) \ + typeof ( struct device * ( object_type ) ) + +#endif /* _IPXE_DEVICE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/dhcp.h b/qemu/roms/ipxe/src/include/ipxe/dhcp.h new file mode 100644 index 000000000..bcfb85cc1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/dhcp.h @@ -0,0 +1,676 @@ +#ifndef _IPXE_DHCP_H +#define _IPXE_DHCP_H + +/** @file + * + * Dynamic Host Configuration Protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stdarg.h> +#include <ipxe/in.h> +#include <ipxe/list.h> +#include <ipxe/refcnt.h> +#include <ipxe/tables.h> +#include <ipxe/uuid.h> +#include <ipxe/netdevice.h> +#include <ipxe/uaccess.h> + +struct interface; +struct dhcp_options; +struct dhcp_packet; + +/** BOOTP/DHCP server port */ +#define BOOTPS_PORT 67 + +/** BOOTP/DHCP client port */ +#define BOOTPC_PORT 68 + +/** PXE server port */ +#define PXE_PORT 4011 + +/** Construct a tag value for an encapsulated option + * + * This tag value can be passed to Etherboot functions when searching + * for DHCP options in order to search for a tag within an + * encapsulated options block. + */ +#define DHCP_ENCAP_OPT( encapsulator, encapsulated ) \ + ( ( (encapsulator) << 8 ) | (encapsulated) ) +/** Extract encapsulating option block tag from encapsulated tag value */ +#define DHCP_ENCAPSULATOR( encap_opt ) ( (encap_opt) >> 8 ) +/** Extract encapsulated option tag from encapsulated tag value */ +#define DHCP_ENCAPSULATED( encap_opt ) ( (encap_opt) & 0xff ) +/** Option is encapsulated */ +#define DHCP_IS_ENCAP_OPT( opt ) DHCP_ENCAPSULATOR( opt ) + +/** + * @defgroup dhcpopts DHCP option tags + * @{ + */ + +/** Padding + * + * This tag does not have a length field; it is always only a single + * byte in length. + */ +#define DHCP_PAD 0 + +/** Minimum normal DHCP option */ +#define DHCP_MIN_OPTION 1 + +/** Subnet mask */ +#define DHCP_SUBNET_MASK 1 + +/** Routers */ +#define DHCP_ROUTERS 3 + +/** DNS servers */ +#define DHCP_DNS_SERVERS 6 + +/** Syslog servers */ +#define DHCP_LOG_SERVERS 7 + +/** Host name */ +#define DHCP_HOST_NAME 12 + +/** Domain name */ +#define DHCP_DOMAIN_NAME 15 + +/** Root path */ +#define DHCP_ROOT_PATH 17 + +/** Vendor encapsulated options */ +#define DHCP_VENDOR_ENCAP 43 + +/** PXE boot server discovery control */ +#define DHCP_PXE_DISCOVERY_CONTROL DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 6 ) + +/** PXE boot server discovery control bits */ +enum dhcp_pxe_discovery_control { + /** Inhibit broadcast discovery */ + PXEBS_NO_BROADCAST = 1, + /** Inhibit multicast discovery */ + PXEBS_NO_MULTICAST = 2, + /** Accept only servers in DHCP_PXE_BOOT_SERVERS list */ + PXEBS_NO_UNKNOWN_SERVERS = 4, + /** Skip discovery if filename present */ + PXEBS_SKIP = 8, +}; + +/** PXE boot server multicast address */ +#define DHCP_PXE_BOOT_SERVER_MCAST DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 7 ) + +/** PXE boot servers */ +#define DHCP_PXE_BOOT_SERVERS DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 8 ) + +/** PXE boot server */ +struct dhcp_pxe_boot_server { + /** "Type" */ + uint16_t type; + /** Number of IPv4 addresses */ + uint8_t num_ip; + /** IPv4 addresses */ + struct in_addr ip[0]; +} __attribute__ (( packed )); + +/** PXE boot menu */ +#define DHCP_PXE_BOOT_MENU DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 9 ) + +/** PXE boot menu */ +struct dhcp_pxe_boot_menu { + /** "Type" */ + uint16_t type; + /** Description length */ + uint8_t desc_len; + /** Description */ + char desc[0]; +} __attribute__ (( packed )); + +/** PXE boot menu prompt */ +#define DHCP_PXE_BOOT_MENU_PROMPT DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 10 ) + +/** PXE boot menu prompt */ +struct dhcp_pxe_boot_menu_prompt { + /** Timeout + * + * A value of 0 means "time out immediately and select first + * boot item, without displaying the prompt". A value of 255 + * means "display menu immediately with no timeout". Any + * other value means "display prompt, wait this many seconds + * for keypress, if key is F8, display menu, otherwise select + * first boot item". + */ + uint8_t timeout; + /** Prompt to press F8 */ + char prompt[0]; +} __attribute__ (( packed )); + +/** PXE boot menu item */ +#define DHCP_PXE_BOOT_MENU_ITEM DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 71 ) + +/** PXE boot menu item */ +struct dhcp_pxe_boot_menu_item { + /** "Type" + * + * This field actually identifies the specific boot server (or + * cluster of boot servers offering identical boot files). + */ + uint16_t type; + /** "Layer" + * + * Just don't ask. + */ + uint16_t layer; +} __attribute__ (( packed )); + +/** Requested IP address */ +#define DHCP_REQUESTED_ADDRESS 50 + +/** Lease time */ +#define DHCP_LEASE_TIME 51 + +/** Option overloading + * + * The value of this option is the bitwise-OR of zero or more + * DHCP_OPTION_OVERLOAD_XXX constants. + */ +#define DHCP_OPTION_OVERLOAD 52 + +/** The "file" field is overloaded to contain extra DHCP options */ +#define DHCP_OPTION_OVERLOAD_FILE 1 + +/** The "sname" field is overloaded to contain extra DHCP options */ +#define DHCP_OPTION_OVERLOAD_SNAME 2 + +/** DHCP message type */ +#define DHCP_MESSAGE_TYPE 53 +#define DHCPNONE 0 +#define DHCPDISCOVER 1 +#define DHCPOFFER 2 +#define DHCPREQUEST 3 +#define DHCPDECLINE 4 +#define DHCPACK 5 +#define DHCPNAK 6 +#define DHCPRELEASE 7 +#define DHCPINFORM 8 + +/** DHCP server identifier */ +#define DHCP_SERVER_IDENTIFIER 54 + +/** Parameter request list */ +#define DHCP_PARAMETER_REQUEST_LIST 55 + +/** Maximum DHCP message size */ +#define DHCP_MAX_MESSAGE_SIZE 57 + +/** Vendor class identifier */ +#define DHCP_VENDOR_CLASS_ID 60 + +/** Client identifier */ +#define DHCP_CLIENT_ID 61 + +/** Client identifier */ +struct dhcp_client_id { + /** Link-layer protocol */ + uint8_t ll_proto; + /** Link-layer address */ + uint8_t ll_addr[MAX_LL_ADDR_LEN]; +} __attribute__ (( packed )); + +/** TFTP server name + * + * This option replaces the fixed "sname" field, when that field is + * used to contain overloaded options. + */ +#define DHCP_TFTP_SERVER_NAME 66 + +/** Bootfile name + * + * This option replaces the fixed "file" field, when that field is + * used to contain overloaded options. + */ +#define DHCP_BOOTFILE_NAME 67 + +/** User class identifier */ +#define DHCP_USER_CLASS_ID 77 + +/** Client system architecture */ +#define DHCP_CLIENT_ARCHITECTURE 93 + +/** DHCP client architecture */ +struct dhcp_client_architecture { + uint16_t arch; +} __attribute__ (( packed )); + +/** DHCP client architecture values + * + * These are defined by the PXE specification and redefined by + * RFC4578. + */ +enum dhcp_client_architecture_values { + /** Intel x86 PC */ + DHCP_CLIENT_ARCHITECTURE_X86 = 0x0000, + /** NEC/PC98 */ + DHCP_CLIENT_ARCHITECTURE_PC98 = 0x0001, + /** EFI Itanium */ + DHCP_CLIENT_ARCHITECTURE_IA64 = 0x0002, + /** DEC Alpha */ + DHCP_CLIENT_ARCHITECTURE_ALPHA = 0x0003, + /** Arc x86 */ + DHCP_CLIENT_ARCHITECTURE_ARCX86 = 0x0004, + /** Intel Lean Client */ + DHCP_CLIENT_ARCHITECTURE_LC = 0x0005, + /** EFI IA32 */ + DHCP_CLIENT_ARCHITECTURE_IA32 = 0x0006, + /** EFI BC */ + DHCP_CLIENT_ARCHITECTURE_EFI = 0x0007, + /** EFI Xscale */ + DHCP_CLIENT_ARCHITECTURE_XSCALE = 0x0008, + /** EFI x86-64 */ + DHCP_CLIENT_ARCHITECTURE_X86_64 = 0x0009, +}; + +/** Client network device interface */ +#define DHCP_CLIENT_NDI 94 + +/** UUID client identifier */ +#define DHCP_CLIENT_UUID 97 + +/** UUID client identifier */ +struct dhcp_client_uuid { + /** Identifier type */ + uint8_t type; + /** UUID */ + union uuid uuid; +} __attribute__ (( packed )); + +#define DHCP_CLIENT_UUID_TYPE 0 + +/** DNS domain search list */ +#define DHCP_DOMAIN_SEARCH 119 + +/** Etherboot-specific encapsulated options + * + * This encapsulated options field is used to contain all options + * specific to Etherboot (i.e. not assigned by IANA or other standards + * bodies). + */ +#define DHCP_EB_ENCAP 175 + +/** Priority of this options block + * + * This is a signed 8-bit integer field indicating the priority of + * this block of options. It can be used to specify the relative + * priority of multiple option blocks (e.g. options from non-volatile + * storage versus options from a DHCP server). + */ +#define DHCP_EB_PRIORITY DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x01 ) + +/** "Your" IP address + * + * This option is used internally to contain the value of the "yiaddr" + * field, in order to provide a consistent approach to storing and + * processing options. It should never be present in a DHCP packet. + */ +#define DHCP_EB_YIADDR DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x02 ) + +/** "Server" IP address + * + * This option is used internally to contain the value of the "siaddr" + * field, in order to provide a consistent approach to storing and + * processing options. It should never be present in a DHCP packet. + */ +#define DHCP_EB_SIADDR DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x03 ) + +/** Keep SAN drive registered + * + * If set to a non-zero value, iPXE will not detach any SAN drive + * after failing to boot from it. (This option is required in order + * to perform an installation direct to an iSCSI target.) + */ +#define DHCP_EB_KEEP_SAN DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x08 ) + +/** Skip booting from SAN drive + * + * If set to a non-zero value, iPXE will skip booting from any SAN + * drive. (This option is sometimes required in conjunction with @c + * DHCP_EB_KEEP_SAN in order to perform an installation direct to an + * iSCSI target.) + */ +#define DHCP_EB_SKIP_SAN_BOOT DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x09 ) + +/* + * Tags in the range 0x10-0x4f are reserved for feature markers + * + */ + +/** Scriptlet + * + * If a scriptlet exists, it will be executed in place of the usual + * call to autoboot() + */ +#define DHCP_EB_SCRIPTLET DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x51 ) + +/** Encrypted syslog server */ +#define DHCP_EB_SYSLOGS_SERVER DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x55 ) + +/** Trusted root certficate fingerprints */ +#define DHCP_EB_TRUST DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5a ) + +/** Client certficate */ +#define DHCP_EB_CERT DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5b ) + +/** Client private key */ +#define DHCP_EB_KEY DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5c ) + +/** Cross-signed certificate source */ +#define DHCP_EB_CROSS_CERT DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5d ) + +/** Skip PXE DHCP protocol extensions such as ProxyDHCP + * + * If set to a non-zero value, iPXE will not wait for ProxyDHCP offers + * and will ignore any PXE-specific DHCP options that it receives. + */ +#define DHCP_EB_NO_PXEDHCP DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb0 ) + +/** Network device descriptor + * + * Byte 0 is the bus type ID; remaining bytes depend on the bus type. + * + * PCI devices: + * Byte 0 : 1 (PCI) + * Byte 1 : PCI vendor ID MSB + * Byte 2 : PCI vendor ID LSB + * Byte 3 : PCI device ID MSB + * Byte 4 : PCI device ID LSB + */ +#define DHCP_EB_BUS_ID DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb1 ) + +/** Network device descriptor */ +struct dhcp_netdev_desc { + /** Bus type ID */ + uint8_t type; + /** Vendor ID */ + uint16_t vendor; + /** Device ID */ + uint16_t device; +} __attribute__ (( packed )); + +/** Use cached network settings (obsolete; do not reuse this value) */ +#define DHCP_EB_USE_CACHED DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb2 ) + +/** BIOS drive number + * + * This is the drive number for a drive emulated via INT 13. 0x80 is + * the first hard disk, 0x81 is the second hard disk, etc. + */ +#define DHCP_EB_BIOS_DRIVE DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbd ) + +/** Username + * + * This will be used as the username for any required authentication. + * It is expected that this option's value will be held in + * non-volatile storage, rather than transmitted as part of a DHCP + * packet. + */ +#define DHCP_EB_USERNAME DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbe ) + +/** Password + * + * This will be used as the password for any required authentication. + * It is expected that this option's value will be held in + * non-volatile storage, rather than transmitted as part of a DHCP + * packet. + */ +#define DHCP_EB_PASSWORD DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbf ) + +/** Reverse username + * + * This will be used as the reverse username (i.e. the username + * provided by the server) for any required authentication. It is + * expected that this option's value will be held in non-volatile + * storage, rather than transmitted as part of a DHCP packet. + */ +#define DHCP_EB_REVERSE_USERNAME DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc0 ) + +/** Reverse password + * + * This will be used as the reverse password (i.e. the password + * provided by the server) for any required authentication. It is + * expected that this option's value will be held in non-volatile + * storage, rather than transmitted as part of a DHCP packet. + */ +#define DHCP_EB_REVERSE_PASSWORD DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc1 ) + +/** User ID + * + * This will be used as the user id for AUTH_SYS based authentication in NFS. + */ +#define DHCP_EB_UID DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc2 ) + +/** Group ID + * + * This will be used as the group id for AUTH_SYS based authentication in NFS. + */ +#define DHCP_EB_GID DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc3 ) + +/** iPXE version number */ +#define DHCP_EB_VERSION DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xeb ) + +/** iSCSI primary target IQN */ +#define DHCP_ISCSI_PRIMARY_TARGET_IQN 201 + +/** iSCSI secondary target IQN */ +#define DHCP_ISCSI_SECONDARY_TARGET_IQN 202 + +/** iSCSI initiator IQN */ +#define DHCP_ISCSI_INITIATOR_IQN 203 + +/** Maximum normal DHCP option */ +#define DHCP_MAX_OPTION 254 + +/** End of options + * + * This tag does not have a length field; it is always only a single + * byte in length. + */ +#define DHCP_END 255 + +/** @} */ + +/** Construct a DHCP option from a list of bytes */ +#define DHCP_OPTION( ... ) VA_ARG_COUNT ( __VA_ARGS__ ), __VA_ARGS__ + +/** Construct a DHCP option from a list of characters */ +#define DHCP_STRING( ... ) DHCP_OPTION ( __VA_ARGS__ ) + +/** Construct a byte-valued DHCP option */ +#define DHCP_BYTE( value ) DHCP_OPTION ( value ) + +/** Construct a word-valued DHCP option */ +#define DHCP_WORD( value ) DHCP_OPTION ( ( ( (value) >> 8 ) & 0xff ), \ + ( ( (value) >> 0 ) & 0xff ) ) + +/** Construct a dword-valued DHCP option */ +#define DHCP_DWORD( value ) DHCP_OPTION ( ( ( (value) >> 24 ) & 0xff ), \ + ( ( (value) >> 16 ) & 0xff ), \ + ( ( (value) >> 8 ) & 0xff ), \ + ( ( (value) >> 0 ) & 0xff ) ) + +/** Construct a DHCP encapsulated options field */ +#define DHCP_ENCAP( ... ) DHCP_OPTION ( __VA_ARGS__, DHCP_END ) + +/** + * A DHCP option + * + * DHCP options consist of a mandatory tag, a length field that is + * mandatory for all options except @c DHCP_PAD and @c DHCP_END, and a + * payload. + */ +struct dhcp_option { + /** Tag + * + * Must be a @c DHCP_XXX value. + */ + uint8_t tag; + /** Length + * + * This is the length of the data field (i.e. excluding the + * tag and length fields). For the two tags @c DHCP_PAD and + * @c DHCP_END, the length field is implicitly zero and is + * also missing, i.e. these DHCP options are only a single + * byte in length. + */ + uint8_t len; + /** Option data */ + uint8_t data[0]; +} __attribute__ (( packed )); + +/** + * Length of a DHCP option header + * + * The header is the portion excluding the data, i.e. the tag and the + * length. + */ +#define DHCP_OPTION_HEADER_LEN ( offsetof ( struct dhcp_option, data ) ) + +/** Maximum length for a single DHCP option */ +#define DHCP_MAX_LEN 0xff + +/** + * A DHCP header + * + */ +struct dhcphdr { + /** Operation + * + * This must be either @c BOOTP_REQUEST or @c BOOTP_REPLY. + */ + uint8_t op; + /** Hardware address type + * + * This is an ARPHRD_XXX constant. Note that ARPHRD_XXX + * constants are nominally 16 bits wide; this could be + * considered to be a bug in the BOOTP/DHCP specification. + */ + uint8_t htype; + /** Hardware address length */ + uint8_t hlen; + /** Number of hops from server */ + uint8_t hops; + /** Transaction ID */ + uint32_t xid; + /** Seconds since start of acquisition */ + uint16_t secs; + /** Flags */ + uint16_t flags; + /** "Client" IP address + * + * This is filled in if the client already has an IP address + * assigned and can respond to ARP requests. + */ + struct in_addr ciaddr; + /** "Your" IP address + * + * This is the IP address assigned by the server to the client. + */ + struct in_addr yiaddr; + /** "Server" IP address + * + * This is the IP address of the next server to be used in the + * boot process. + */ + struct in_addr siaddr; + /** "Gateway" IP address + * + * This is the IP address of the DHCP relay agent, if any. + */ + struct in_addr giaddr; + /** Client hardware address */ + uint8_t chaddr[16]; + /** Server host name (null terminated) + * + * This field may be overridden and contain DHCP options + */ + char sname[64]; + /** Boot file name (null terminated) + * + * This field may be overridden and contain DHCP options + */ + char file[128]; + /** DHCP magic cookie + * + * Must have the value @c DHCP_MAGIC_COOKIE. + */ + uint32_t magic; + /** DHCP options + * + * Variable length; extends to the end of the packet. Minimum + * length (for the sake of sanity) is 1, to allow for a single + * @c DHCP_END tag. + */ + uint8_t options[0]; +}; + +/** Opcode for a request from client to server */ +#define BOOTP_REQUEST 1 + +/** Opcode for a reply from server to client */ +#define BOOTP_REPLY 2 + +/** BOOTP reply must be broadcast + * + * Clients that cannot accept unicast BOOTP replies must set this + * flag. + */ +#define BOOTP_FL_BROADCAST 0x8000 + +/** DHCP magic cookie */ +#define DHCP_MAGIC_COOKIE 0x63825363UL + +/** DHCP minimum packet length + * + * This is the mandated minimum packet length that a DHCP participant + * must be prepared to receive. + */ +#define DHCP_MIN_LEN 552 + +/** Timeouts for sending DHCP packets */ +#define DHCP_MIN_TIMEOUT ( 1 * TICKS_PER_SEC ) +#define DHCP_MAX_TIMEOUT ( 10 * TICKS_PER_SEC ) + +/** Maximum time that we will wait for ProxyDHCP responses */ +#define PROXYDHCP_MAX_TIMEOUT ( 2 * TICKS_PER_SEC ) + +/** Maximum time that we will wait for Boot Server responses */ +#define PXEBS_MAX_TIMEOUT ( 3 * TICKS_PER_SEC ) + +/** Settings block name used for DHCP responses */ +#define DHCP_SETTINGS_NAME "dhcp" + +/** Settings block name used for ProxyDHCP responses */ +#define PROXYDHCP_SETTINGS_NAME "proxydhcp" + +/** Setting block name used for BootServerDHCP responses */ +#define PXEBS_SETTINGS_NAME "pxebs" + +extern uint32_t dhcp_last_xid; +extern int dhcp_create_packet ( struct dhcp_packet *dhcppkt, + struct net_device *netdev, uint8_t msgtype, + uint32_t xid, const void *options, + size_t options_len, void *data, + size_t max_len ); +extern int dhcp_create_request ( struct dhcp_packet *dhcppkt, + struct net_device *netdev, + unsigned int msgtype, uint32_t xid, + struct in_addr ciaddr, + void *data, size_t max_len ); +extern int start_dhcp ( struct interface *job, struct net_device *netdev ); +extern int start_pxebs ( struct interface *job, struct net_device *netdev, + unsigned int pxe_type ); + +#endif /* _IPXE_DHCP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/dhcpopts.h b/qemu/roms/ipxe/src/include/ipxe/dhcpopts.h new file mode 100644 index 000000000..c5af5d749 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/dhcpopts.h @@ -0,0 +1,43 @@ +#ifndef _IPXE_DHCPOPTS_H +#define _IPXE_DHCPOPTS_H + +/** @file + * + * DHCP options + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +/** A DHCP options block */ +struct dhcp_options { + /** Option block raw data */ + void *data; + /** Option block used length */ + size_t used_len; + /** Option block allocated length */ + size_t alloc_len; + /** Reallocate option block raw data + * + * @v options DHCP option block + * @v len New length + * @ret rc Return status code + */ + int ( * realloc ) ( struct dhcp_options *options, size_t len ); +}; + +extern int dhcpopt_applies ( unsigned int tag ); +extern int dhcpopt_store ( struct dhcp_options *options, unsigned int tag, + const void *data, size_t len ); +extern int dhcpopt_fetch ( struct dhcp_options *options, unsigned int tag, + void *data, size_t len ); +extern void dhcpopt_init ( struct dhcp_options *options, + void *data, size_t alloc_len, + int ( * realloc ) ( struct dhcp_options *options, + size_t len ) ); +extern void dhcpopt_update_used_len ( struct dhcp_options *options ); +extern int dhcpopt_no_realloc ( struct dhcp_options *options, size_t len ); + +#endif /* _IPXE_DHCPOPTS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/dhcppkt.h b/qemu/roms/ipxe/src/include/ipxe/dhcppkt.h new file mode 100644 index 000000000..3179a6bb0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/dhcppkt.h @@ -0,0 +1,71 @@ +#ifndef _IPXE_DHCPPKT_H +#define _IPXE_DHCPPKT_H + +/** @file + * + * DHCP packets + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/dhcp.h> +#include <ipxe/dhcpopts.h> +#include <ipxe/refcnt.h> + +/** + * A DHCP packet + * + */ +struct dhcp_packet { + /** Reference counter */ + struct refcnt refcnt; + /** The DHCP packet contents */ + struct dhcphdr *dhcphdr; + /** DHCP options */ + struct dhcp_options options; + /** Settings interface */ + struct settings settings; +}; + +/** + * Increment reference count on DHCP packet + * + * @v dhcppkt DHCP packet + * @ret dhcppkt DHCP packet + */ +static inline __attribute__ (( always_inline )) struct dhcp_packet * +dhcppkt_get ( struct dhcp_packet *dhcppkt ) { + ref_get ( &dhcppkt->refcnt ); + return dhcppkt; +} + +/** + * Decrement reference count on DHCP packet + * + * @v dhcppkt DHCP packet + */ +static inline __attribute__ (( always_inline )) void +dhcppkt_put ( struct dhcp_packet *dhcppkt ) { + ref_put ( &dhcppkt->refcnt ); +} + +/** + * Get used length of DHCP packet + * + * @v dhcppkt DHCP packet + * @ret len Used length + */ +static inline int dhcppkt_len ( struct dhcp_packet *dhcppkt ) { + return ( offsetof ( struct dhcphdr, options ) + + dhcppkt->options.used_len ); +} + +extern int dhcppkt_store ( struct dhcp_packet *dhcppkt, unsigned int tag, + const void *data, size_t len ); +extern int dhcppkt_fetch ( struct dhcp_packet *dhcppkt, unsigned int tag, + void *data, size_t len ); +extern void dhcppkt_init ( struct dhcp_packet *dhcppkt, + struct dhcphdr *data, size_t len ); + +#endif /* _IPXE_DHCPPKT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/dhcpv6.h b/qemu/roms/ipxe/src/include/ipxe/dhcpv6.h new file mode 100644 index 000000000..2636b8ab2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/dhcpv6.h @@ -0,0 +1,227 @@ +#ifndef _IPXE_DHCPV6_H +#define _IPXE_DHCPV6_H + +/** @file + * + * Dynamic Host Configuration Protocol for IPv6 + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/in.h> +#include <ipxe/uuid.h> + +/** DHCPv6 server port */ +#define DHCPV6_SERVER_PORT 547 + +/** DHCPv6 client port */ +#define DHCPV6_CLIENT_PORT 546 + +/** + * A DHCPv6 option + * + */ +struct dhcpv6_option { + /** Code */ + uint16_t code; + /** Length of the data field */ + uint16_t len; + /** Data */ + uint8_t data[0]; +} __attribute__ (( packed )); + +/** DHCP unique identifier based on UUID (DUID-UUID) */ +struct dhcpv6_duid_uuid { + /** Type */ + uint16_t type; + /** UUID */ + union uuid uuid; +} __attribute__ (( packed )); + +/** DHCP unique identifier based on UUID (DUID-UUID) */ +#define DHCPV6_DUID_UUID 4 + +/** DHCPv6 client or server identifier option */ +struct dhcpv6_duid_option { + /** Option header */ + struct dhcpv6_option header; + /** DHCP unique identifier (DUID) */ + uint8_t duid[0]; +} __attribute__ (( packed )); + +/** DHCPv6 client identifier option */ +#define DHCPV6_CLIENT_ID 1 + +/** DHCPv6 server identifier option */ +#define DHCPV6_SERVER_ID 2 + +/** DHCPv6 identity association for non-temporary address (IA_NA) option */ +struct dhcpv6_ia_na_option { + /** Option header */ + struct dhcpv6_option header; + /** Identity association identifier (IAID) */ + uint32_t iaid; + /** Renew time (in seconds) */ + uint32_t renew; + /** Rebind time (in seconds) */ + uint32_t rebind; + /** IA_NA options */ + struct dhcpv6_option options[0]; +} __attribute__ (( packed )); + +/** DHCPv6 identity association for non-temporary address (IA_NA) option */ +#define DHCPV6_IA_NA 3 + +/** DHCPv6 identity association address (IAADDR) option */ +struct dhcpv6_iaaddr_option { + /** Option header */ + struct dhcpv6_option header; + /** IPv6 address */ + struct in6_addr address; + /** Preferred lifetime (in seconds) */ + uint32_t preferred; + /** Valid lifetime (in seconds) */ + uint32_t valid; + /** IAADDR options */ + struct dhcpv6_option options[0]; +} __attribute__ (( packed )); + +/** DHCPv6 identity association address (IAADDR) option */ +#define DHCPV6_IAADDR 5 + +/** DHCPv6 option request option */ +struct dhcpv6_option_request_option { + /** Option header */ + struct dhcpv6_option header; + /** Requested options */ + uint16_t requested[0]; +} __attribute__ (( packed )); + +/** DHCPv6 option request option */ +#define DHCPV6_OPTION_REQUEST 6 + +/** DHCPv6 elapsed time option */ +struct dhcpv6_elapsed_time_option { + /** Option header */ + struct dhcpv6_option header; + /** Elapsed time, in centiseconds */ + uint16_t elapsed; +} __attribute__ (( packed )); + +/** DHCPv6 elapsed time option */ +#define DHCPV6_ELAPSED_TIME 8 + +/** DHCPv6 status code option */ +struct dhcpv6_status_code_option { + /** Option header */ + struct dhcpv6_option header; + /** Status code */ + uint16_t status; + /** Status message */ + char message[0]; +} __attribute__ (( packed )); + +/** DHCPv6 status code option */ +#define DHCPV6_STATUS_CODE 13 + +/** DHCPv6 user class */ +struct dhcpv6_user_class { + /** Length */ + uint16_t len; + /** User class string */ + char string[0]; +} __attribute__ (( packed )); + +/** DHCPv6 user class option */ +struct dhcpv6_user_class_option { + /** Option header */ + struct dhcpv6_option header; + /** User class */ + struct dhcpv6_user_class user_class[0]; +} __attribute__ (( packed )); + +/** DHCPv6 user class option */ +#define DHCPV6_USER_CLASS 15 + +/** DHCPv6 DNS recursive name server option */ +#define DHCPV6_DNS_SERVERS 23 + +/** DHCPv6 domain search list option */ +#define DHCPV6_DOMAIN_LIST 24 + +/** DHCPv6 bootfile URI option */ +#define DHCPV6_BOOTFILE_URL 59 + +/** DHCPv6 bootfile parameters option */ +#define DHCPV6_BOOTFILE_PARAM 60 + +/** DHCPv6 syslog server option + * + * This option code has not yet been assigned by IANA. Please update + * this definition once an option code has been assigned. + */ +#define DHCPV6_LOG_SERVERS 0xffffffffUL + +/** + * Any DHCPv6 option + * + */ +union dhcpv6_any_option { + struct dhcpv6_option header; + struct dhcpv6_duid_option duid; + struct dhcpv6_ia_na_option ia_na; + struct dhcpv6_iaaddr_option iaaddr; + struct dhcpv6_option_request_option option_request; + struct dhcpv6_elapsed_time_option elapsed_time; + struct dhcpv6_status_code_option status_code; + struct dhcpv6_user_class_option user_class; +}; + +/** + * A DHCPv6 header + * + */ +struct dhcpv6_header { + /** Message type */ + uint8_t type; + /** Transaction ID */ + uint8_t xid[3]; + /** Options */ + struct dhcpv6_option options[0]; +} __attribute__ (( packed )); + +/** DHCPv6 solicitation */ +#define DHCPV6_SOLICIT 1 + +/** DHCPv6 advertisement */ +#define DHCPV6_ADVERTISE 2 + +/** DHCPv6 request */ +#define DHCPV6_REQUEST 3 + +/** DHCPv6 reply */ +#define DHCPV6_REPLY 7 + +/** DHCPv6 information request */ +#define DHCPV6_INFORMATION_REQUEST 11 + +/** DHCPv6 settings block name */ +#define DHCPV6_SETTINGS_NAME "dhcpv6" + +/** + * Construct all-DHCP-relay-agents-and-servers multicast address + * + * @v addr Zeroed address to construct + */ +static inline void ipv6_all_dhcp_relay_and_servers ( struct in6_addr *addr ) { + addr->s6_addr16[0] = htons ( 0xff02 ); + addr->s6_addr[13] = 1; + addr->s6_addr[15] = 2; +} + +extern int start_dhcpv6 ( struct interface *job, struct net_device *netdev, + int stateful ); + +#endif /* _IPXE_DHCPV6_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/dns.h b/qemu/roms/ipxe/src/include/ipxe/dns.h new file mode 100644 index 000000000..4f6cab3a4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/dns.h @@ -0,0 +1,155 @@ +#ifndef _IPXE_DNS_H +#define _IPXE_DNS_H + +/** @file + * + * DNS protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/in.h> + +/** DNS server port */ +#define DNS_PORT 53 + +/** An RFC1035-encoded DNS name */ +struct dns_name { + /** Start of data */ + void *data; + /** Offset of name within data */ + size_t offset; + /** Total length of data */ + size_t len; +}; + +/** + * Test for a DNS compression pointer + * + * @v byte Initial byte + * @ret is_compressed Is a compression pointer + */ +#define DNS_IS_COMPRESSED( byte ) ( (byte) & 0xc0 ) + +/** + * Extract DNS compression pointer + * + * @v word Initial word + * @ret offset Offset + */ +#define DNS_COMPRESSED_OFFSET( word ) ( (word) & ~0xc000 ) + +/** + * Extract DNS label length + * + * @v byte Initial byte + * @ret len Label length + */ +#define DNS_LABEL_LEN( byte ) ( (byte) & ~0xc0 ) + +/** Maximum length of a single DNS label */ +#define DNS_MAX_LABEL_LEN 0x3f + +/** Maximum length of a DNS name (mandated by RFC1035 section 2.3.4) */ +#define DNS_MAX_NAME_LEN 255 + +/** Maximum depth of CNAME recursion + * + * This is a policy decision. + */ +#define DNS_MAX_CNAME_RECURSION 32 + +/** A DNS packet header */ +struct dns_header { + /** Query identifier */ + uint16_t id; + /** Flags */ + uint16_t flags; + /** Number of question records */ + uint16_t qdcount; + /** Number of answer records */ + uint16_t ancount; + /** Number of name server records */ + uint16_t nscount; + /** Number of additional records */ + uint16_t arcount; +} __attribute__ (( packed )); + +/** Recursion desired flag */ +#define DNS_FLAG_RD 0x0100 + +/** A DNS question */ +struct dns_question { + /** Query type */ + uint16_t qtype; + /** Query class */ + uint16_t qclass; +} __attribute__ (( packed )); + +/** DNS class "IN" */ +#define DNS_CLASS_IN 1 + +/** A DNS resource record */ +struct dns_rr_common { + /** Type */ + uint16_t type; + /** Class */ + uint16_t class; + /** Time to live */ + uint32_t ttl; + /** Resource data length */ + uint16_t rdlength; +} __attribute__ (( packed )); + +/** Type of a DNS "A" record */ +#define DNS_TYPE_A 1 + +/** A DNS "A" record */ +struct dns_rr_a { + /** Common fields */ + struct dns_rr_common common; + /** IPv4 address */ + struct in_addr in_addr; +} __attribute__ (( packed )); + +/** Type of a DNS "AAAA" record */ +#define DNS_TYPE_AAAA 28 + +/** A DNS "AAAA" record */ +struct dns_rr_aaaa { + /** Common fields */ + struct dns_rr_common common; + /** IPv6 address */ + struct in6_addr in6_addr; +} __attribute__ (( packed )); + +/** Type of a DNS "NAME" record */ +#define DNS_TYPE_CNAME 5 + +/** A DNS "CNAME" record */ +struct dns_rr_cname { + /** Common fields */ + struct dns_rr_common common; +} __attribute__ (( packed )); + +/** A DNS resource record */ +union dns_rr { + /** Common fields */ + struct dns_rr_common common; + /** "A" record */ + struct dns_rr_a a; + /** "AAAA" record */ + struct dns_rr_aaaa aaaa; + /** "CNAME" record */ + struct dns_rr_cname cname; +}; + +extern int dns_encode ( const char *string, struct dns_name *name ); +extern int dns_decode ( struct dns_name *name, char *data, size_t len ); +extern int dns_compare ( struct dns_name *first, struct dns_name *second ); +extern int dns_copy ( struct dns_name *src, struct dns_name *dst ); +extern int dns_skip ( struct dns_name *name ); + +#endif /* _IPXE_DNS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/downloader.h b/qemu/roms/ipxe/src/include/ipxe/downloader.h new file mode 100644 index 000000000..de1a2e75e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/downloader.h @@ -0,0 +1,17 @@ +#ifndef _IPXE_DOWNLOADER_H +#define _IPXE_DOWNLOADER_H + +/** @file + * + * Image downloader + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct interface; +struct image; + +extern int create_downloader ( struct interface *job, struct image *image ); + +#endif /* _IPXE_DOWNLOADER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/drbg.h b/qemu/roms/ipxe/src/include/ipxe/drbg.h new file mode 100644 index 000000000..6374e7787 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/drbg.h @@ -0,0 +1,135 @@ +#ifndef _IPXE_DRBG_H +#define _IPXE_DRBG_H + +/** @file + * + * DRBG mechanism + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/sha256.h> +#include <ipxe/hmac_drbg.h> + +/** Choose HMAC_DRBG using SHA-256 + * + * HMAC_DRBG using SHA-256 is an Approved algorithm in ANS X9.82. + */ +#define HMAC_DRBG_ALGORITHM HMAC_DRBG_SHA256 + +/** Maximum security strength */ +#define DRBG_MAX_SECURITY_STRENGTH \ + HMAC_DRBG_MAX_SECURITY_STRENGTH ( HMAC_DRBG_ALGORITHM ) + +/** Security strength + * + * We choose to operate at a strength of 128 bits. + */ +#define DRBG_SECURITY_STRENGTH 128 + +/** Minimum entropy input length */ +#define DRBG_MIN_ENTROPY_LEN_BYTES \ + HMAC_DRBG_MIN_ENTROPY_LEN_BYTES ( DRBG_SECURITY_STRENGTH ) + +/** Maximum entropy input length */ +#define DRBG_MAX_ENTROPY_LEN_BYTES HMAC_DRBG_MAX_ENTROPY_LEN_BYTES + +/** Maximum personalisation string length */ +#define DRBG_MAX_PERSONAL_LEN_BYTES HMAC_DRBG_MAX_PERSONAL_LEN_BYTES + +/** Maximum additional input length */ +#define DRBG_MAX_ADDITIONAL_LEN_BYTES HMAC_DRBG_MAX_ADDITIONAL_LEN_BYTES + +/** Maximum length of generated pseudorandom data per request */ +#define DRBG_MAX_GENERATED_LEN_BYTES HMAC_DRBG_MAX_GENERATED_LEN_BYTES + +/** A Deterministic Random Bit Generator */ +struct drbg_state { + /** Algorithm internal state */ + struct hmac_drbg_state internal; + /** Reseed required flag */ + int reseed_required; + /** State is valid */ + int valid; +}; + +/** + * Instantiate DRBG algorithm + * + * @v state Algorithm state + * @v entropy Entropy input + * @v entropy_len Length of entropy input + * @v personal Personalisation string + * @v personal_len Length of personalisation string + * + * This is the Instantiate_algorithm function defined in ANS X9.82 + * Part 3-2007 Section 9.2 (NIST SP 800-90 Section 9.1). + */ +static inline void drbg_instantiate_algorithm ( struct drbg_state *state, + const void *entropy, + size_t entropy_len, + const void *personal, + size_t personal_len ) { + hmac_drbg_instantiate ( HMAC_DRBG_HASH ( HMAC_DRBG_ALGORITHM ), + &state->internal, entropy, entropy_len, + personal, personal_len ); +} + +/** + * Reseed DRBG algorithm + * + * @v state Algorithm state + * @v entropy Entropy input + * @v entropy_len Length of entropy input + * @v additional Additional input + * @v additional_len Length of additional input + * + * This is the Reseed_algorithm function defined in ANS X9.82 + * Part 3-2007 Section 9.3 (NIST SP 800-90 Section 9.2). + */ +static inline void drbg_reseed_algorithm ( struct drbg_state *state, + const void *entropy, + size_t entropy_len, + const void *additional, + size_t additional_len ) { + hmac_drbg_reseed ( HMAC_DRBG_HASH ( HMAC_DRBG_ALGORITHM ), + &state->internal, entropy, entropy_len, + additional, additional_len ); +} + +/** + * Generate pseudorandom bits using DRBG algorithm + * + * @v state Algorithm state + * @v additional Additional input + * @v additional_len Length of additional input + * @v data Output buffer + * @v len Length of output buffer + * @ret rc Return status code + * + * This is the Generate_algorithm function defined in ANS X9.82 + * Part 3-2007 Section 9.4 (NIST SP 800-90 Section 9.3). + * + * Note that the only permitted error is "reseed required". + */ +static inline int drbg_generate_algorithm ( struct drbg_state *state, + const void *additional, + size_t additional_len, + void *data, size_t len ) { + return hmac_drbg_generate ( HMAC_DRBG_HASH ( HMAC_DRBG_ALGORITHM ), + &state->internal, additional, + additional_len, data, len ); +} + +extern int drbg_instantiate ( struct drbg_state *state, const void *personal, + size_t personal_len ); +extern int drbg_reseed ( struct drbg_state *state, const void *additional, + size_t additional_len ); +extern int drbg_generate ( struct drbg_state *state, const void *additional, + size_t additional_len, int prediction_resist, + void *data, size_t len ); +extern void drbg_uninstantiate ( struct drbg_state *state ); + +#endif /* _IPXE_DRBG_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/eapol.h b/qemu/roms/ipxe/src/include/ipxe/eapol.h new file mode 100644 index 000000000..5ca9c2815 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/eapol.h @@ -0,0 +1,114 @@ +/* + * Copyright (c) 2009 Joshua Oreman <oremanj@rwcr.net>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _IPXE_EAPOL_H +#define _IPXE_EAPOL_H + +/** @file + * + * Definitions for EAPOL (Extensible Authentication Protocol over + * LANs) frames. Definitions for the packets usually encapsulated in + * them are elsewhere. + */ + +#include <ipxe/tables.h> +#include <stdint.h> + +FILE_LICENCE ( GPL2_OR_LATER ); + + +/** + * @defgroup eapol_type EAPOL archetype identifiers + * @{ + */ +#define EAPOL_TYPE_EAP 0 /**< EAP authentication handshake packet */ +#define EAPOL_TYPE_START 1 /**< Request by Peer to begin (no data) */ +#define EAPOL_TYPE_LOGOFF 2 /**< Request by Peer to terminate (no data) */ +#define EAPOL_TYPE_KEY 3 /**< EAPOL-Key packet */ +/** @} */ + +/** Expected EAPOL version field value + * + * Version 2 is often seen and has no format differences from version 1; + * however, many older APs will completely drop version-2 packets, so + * we advertise ourselves as version 1. + */ +#define EAPOL_THIS_VERSION 1 + +/** Length of an EAPOL frame header */ +#define EAPOL_HDR_LEN 4 + +/** An EAPOL frame + * + * This may encapsulate an eap_pkt, an eapol_key_pkt, or a Start or + * Logoff request with no data attached. It is transmitted directly in + * an Ethernet frame, with no IP packet header. + */ +struct eapol_frame +{ + /** EAPOL version identifier, always 1 */ + u8 version; + + /** EAPOL archetype identifier indicating format of payload */ + u8 type; + + /** Length of payload, in network byte order */ + u16 length; + + /** Payload, if @a type is EAP or EAPOL-Key */ + u8 data[0]; +} __attribute__ (( packed )); + + +/** An EAPOL frame type handler + * + * Normally there will be at most two of these, one for EAP and one + * for EAPOL-Key frames. The EAPOL interface code handles Start and + * Logoff directly. + */ +struct eapol_handler +{ + /** EAPOL archetype identifier for payload this handler will handle */ + u8 type; + + /** Receive EAPOL-encapsulated packet of specified type + * + * @v iob I/O buffer containing packet payload + * @v netdev Network device from which packet was received + * @V ll_dest Destination link-layer address + * @v ll_source Source link-layer address + * @ret rc Return status code + * + * The I/O buffer will have the EAPOL header pulled off it, so + * @c iob->data points to the first byte of the payload. + * + * This function takes ownership of the I/O buffer passed to it. + */ + int ( * rx ) ( struct io_buffer *iob, struct net_device *netdev, + const void *ll_dest, const void *ll_source ); +}; + +#define EAPOL_HANDLERS __table ( struct eapol_handler, "eapol_handlers" ) +#define __eapol_handler __table_entry ( EAPOL_HANDLERS, 01 ) + + +extern struct net_protocol eapol_protocol __net_protocol; + + +#endif /* _IPXE_EAPOL_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/edd.h b/qemu/roms/ipxe/src/include/ipxe/edd.h new file mode 100644 index 000000000..0c25593d5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/edd.h @@ -0,0 +1,193 @@ +#ifndef _IPXE_EDD_H +#define _IPXE_EDD_H + +/** @file + * + * Enhanced Disk Drive specification + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/interface.h> + +/** An EDD host bus type */ +struct edd_host_bus_type { + /** Type */ + uint32_t type; +} __attribute__ (( packed )); + +/** EDD bus type */ +#define EDD_BUS_TYPE_FIXED( a, b, c, d, ... ) \ + ( ( (a) << 0 ) | ( (b) << 8 ) | ( (c) << 16 ) | ( (d) << 24 ) ) +#define EDD_BUS_TYPE( ... ) \ + EDD_BUS_TYPE_FIXED ( __VA_ARGS__, ' ', ' ', ' ', ' ' ) +/** EDD PCI bus type */ +#define EDD_BUS_TYPE_PCI EDD_BUS_TYPE ( 'P', 'C', 'I' ) +/** EDD ISA bus type */ +#define EDD_BUS_TYPE_ISA EDD_BUS_TYPE ( 'I', 'S', 'A' ) +/** EDD PCI-X bus type */ +#define EDD_BUS_TYPE_PCIX EDD_BUS_TYPE ( 'P', 'C', 'I', 'X' ) +/** EDD Infiniband bus type */ +#define EDD_BUS_TYPE_IBND EDD_BUS_TYPE ( 'I', 'B', 'N', 'D' ) +/** EDD PCI Express bus type */ +#define EDD_BUS_TYPE_XPRS EDD_BUS_TYPE ( 'X', 'P', 'R', 'S' ) +/** EDD HyperTransport bus type */ +#define EDD_BUS_TYPE_HTPT EDD_BUS_TYPE ( 'H', 'T', 'P', 'T' ) + +/** An EDD interface type */ +struct edd_interface_type { + /** Type */ + uint64_t type; +} __attribute__ (( packed )); + +/** EDD interface type */ +#define EDD_INTF_TYPE_FIXED( a, b, c, d, e, f, g, h, ... ) \ + ( ( ( ( uint64_t ) (a) ) << 0 ) | ( ( ( uint64_t ) (b) ) << 8 ) | \ + ( ( ( uint64_t ) (c) ) << 16 ) | ( ( ( uint64_t ) (d) ) << 24 ) | \ + ( ( ( uint64_t ) (e) ) << 32 ) | ( ( ( uint64_t ) (f) ) << 40 ) | \ + ( ( ( uint64_t ) (g) ) << 48 ) | ( ( ( uint64_t ) (h) ) << 56 ) ) +#define EDD_INTF_TYPE( ... ) \ + EDD_INTF_TYPE_FIXED ( __VA_ARGS__, \ + ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' ) +/** EDD ATA interface type */ +#define EDD_INTF_TYPE_ATA EDD_INTF_TYPE ( 'A', 'T', 'A' ) +/** EDD ATAPI interface type */ +#define EDD_INTF_TYPE_ATAPI EDD_INTF_TYPE ( 'A', 'T', 'A', 'P', 'I' ) +/** EDD SCSI interface type */ +#define EDD_INTF_TYPE_SCSI EDD_INTF_TYPE ( 'S', 'C', 'S', 'I' ) +/** EDD USB interface type */ +#define EDD_INTF_TYPE_USB EDD_INTF_TYPE ( 'U', 'S', 'B' ) +/** EDD 1394 interface type */ +#define EDD_INTF_TYPE_1394 EDD_INTF_TYPE ( '1', '3', '9', '4' ) +/** EDD Fibre Channel interface type */ +#define EDD_INTF_TYPE_FIBRE EDD_INTF_TYPE ( 'F', 'I', 'B', 'R', 'E' ) +/** EDD I2O interface type */ +#define EDD_INTF_TYPE_I2O EDD_INTF_TYPE ( 'I', '2', 'O' ) +/** EDD RAID interface type */ +#define EDD_INTF_TYPE_RAID EDD_INTF_TYPE ( 'R', 'A', 'I', 'D' ) +/** EDD SATA interface type */ +#define EDD_INTF_TYPE_SATA EDD_INTF_TYPE ( 'S', 'A', 'T', 'A' ) +/** EDD SAS interface type */ +#define EDD_INTF_TYPE_SAS EDD_INTF_TYPE ( 'S', 'A', 'S' ) + +/** An EDD interface path */ +union edd_interface_path { + /** Legacy bus type */ + struct { + /** Base address */ + uint16_t base; + } __attribute__ (( packed )) legacy; + /** PCI, PCI-X, PCI Express, or HyperTransport bus type */ + struct { + /** Bus */ + uint8_t bus; + /** Slot */ + uint8_t slot; + /** Function */ + uint8_t function; + /** Channel number */ + uint8_t channel; + } __attribute__ (( packed )) pci; + /** Padding */ + uint8_t pad[8]; +} __attribute__ (( packed )); + +/** An EDD device path */ +union edd_device_path { + /** ATA interface type */ + struct { + /** Slave */ + uint8_t slave; + } __attribute__ (( packed )) ata; + /** ATAPI interface type */ + struct { + /** Slave */ + uint8_t slave; + /** Logical Unit Number */ + uint8_t lun; + } __attribute__ (( packed )) atapi; + /** SCSI interface type */ + struct { + /** SCSI ID */ + uint16_t id; + /** Logical Unit Number */ + uint64_t lun; + } __attribute__ (( packed )) scsi; + /** USB interface type */ + struct { + /** Serial number */ + uint64_t serial; + } __attribute__ (( packed )) usb; + /** IEEE1394 interface type */ + struct { + /** GUID */ + uint64_t guid; + } __attribute__ (( packed )) ieee1394; + /** Fibre Channel interface type */ + struct { + /** WWN */ + uint64_t wwn; + /** Logical Unit Number */ + uint64_t lun; + } __attribute__ (( packed )) fibre; + /** I2O interface type */ + struct { + /** Identity tag */ + uint64_t tag; + } __attribute__ (( packed )) i2o; + /** RAID interface type */ + struct { + /** Array number */ + uint32_t array; + } __attribute__ (( packed )) raid; + /** SATA interface type */ + struct { + /** Port number */ + uint8_t port; + /** Port multiplier number */ + uint8_t multiplier; + } __attribute__ (( packed )) sata; + /** SAS interface type */ + struct { + /** Address */ + uint64_t address; + } __attribute__ (( packed )) sas; + /** Padding */ + uint8_t pad[16]; +} __attribute__ (( packed )); + +/** EDD device path information */ +struct edd_device_path_information { + /** Key */ + uint16_t key; + /** Length of this structure */ + uint8_t len; + /** Reserved */ + uint8_t reserved_a[3]; + /** Host bus type */ + struct edd_host_bus_type host_bus_type; + /** Interface type */ + struct edd_interface_type interface_type; + /** Interface path */ + union edd_interface_path interface_path; + /** Device path */ + union edd_device_path device_path; + /** Reserved */ + uint8_t reserved_b; + /** Checksum */ + uint8_t checksum; +} __attribute__ (( packed )); + +/** EDD device path information key */ +#define EDD_DEVICE_PATH_INFO_KEY 0xbedd + +extern int edd_describe ( struct interface *intf, + struct edd_interface_type *type, + union edd_device_path *path ); +#define edd_describe_TYPE( object_type ) \ + typeof ( int ( object_type, struct edd_interface_type *type, \ + union edd_device_path *path ) ) + +#endif /* _IPXE_EDD_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/editbox.h b/qemu/roms/ipxe/src/include/ipxe/editbox.h new file mode 100644 index 000000000..9122dbbf3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/editbox.h @@ -0,0 +1,61 @@ +#ifndef _IPXE_EDITBOX_H +#define _IPXE_EDITBOX_H + +/** @file + * + * Editable text box widget + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <curses.h> +#include <ipxe/editstring.h> + +/** An editable text box widget */ +struct edit_box { + /** Editable string */ + struct edit_string string; + /** Containing window */ + WINDOW *win; + /** Row */ + unsigned int row; + /** Starting column */ + unsigned int col; + /** Width */ + unsigned int width; + /** First displayed character */ + unsigned int first; + /** Flags */ + unsigned int flags; +}; + +/** Editable text box widget flags */ +enum edit_box_flags { + /** Show stars instead of contents (for password widgets) */ + EDITBOX_STARS = 0x0001, +}; + +extern void init_editbox ( struct edit_box *box, char *buf, size_t len, + WINDOW *win, unsigned int row, unsigned int col, + unsigned int width, unsigned int flags ) + __attribute__ (( nonnull (1, 2) )); +extern void draw_editbox ( struct edit_box *box ) __nonnull; +static inline int edit_editbox ( struct edit_box *box, int key ) __nonnull; + +/** + * Edit text box widget + * + * @v box Editable text box widget + * @v key Key pressed by user + * @ret key Key returned to application, or zero + * + * You must call draw_editbox() to update the display after calling + * edit_editbox(). + * + */ +static inline int edit_editbox ( struct edit_box *box, int key ) { + return edit_string ( &box->string, key ); +} + +#endif /* _IPXE_EDITBOX_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/editstring.h b/qemu/roms/ipxe/src/include/ipxe/editstring.h new file mode 100644 index 000000000..2ef546a63 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/editstring.h @@ -0,0 +1,48 @@ +#ifndef _IPXE_EDITSTRING_H +#define _IPXE_EDITSTRING_H + +/** @file + * + * Editable strings + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** An editable string */ +struct edit_string { + /** Buffer for string */ + char *buf; + /** Size of buffer (including terminating NUL) */ + size_t len; + /** Cursor position */ + unsigned int cursor; + + /* The following items are the edit history */ + + /** Last cursor position */ + unsigned int last_cursor; + /** Start of modified portion of string */ + unsigned int mod_start; + /** End of modified portion of string */ + unsigned int mod_end; +}; + +/** + * Initialise editable string + * + * @v string Editable string + * @v buf Buffer for string + * @v len Length of buffer + */ +static inline void init_editstring ( struct edit_string *string, char *buf, + size_t len ) { + string->buf = buf; + string->len = len; +} + +extern void replace_string ( struct edit_string *string, + const char *replacement ) __nonnull; +extern int edit_string ( struct edit_string *string, int key ) __nonnull; + +#endif /* _IPXE_EDITSTRING_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Base.h b/qemu/roms/ipxe/src/include/ipxe/efi/Base.h new file mode 100644 index 000000000..844f428f1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Base.h @@ -0,0 +1,1022 @@ +/** @file + Root include file for Mde Package Base type modules + + This is the include file for any module of type base. Base modules only use + types defined via this include file and can be ported easily to any + environment. There are a set of base libraries in the Mde Package that can + be used to implement base modules. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +#ifndef __BASE_H__ +#define __BASE_H__ + +FILE_LICENCE ( BSD3 ); + +// +// Include processor specific binding +// +#include <ipxe/efi/ProcessorBind.h> + + +/** + Verifies the storage size of a given data type. + + This macro generates a divide by zero error or a zero size array declaration in + the preprocessor if the size is incorrect. These are declared as "extern" so + the space for these arrays will not be in the modules. + + @param TYPE The date type to determine the size of. + @param Size The expected size for the TYPE. + +**/ +#define VERIFY_SIZE_OF(TYPE, Size) extern UINT8 _VerifySizeof##TYPE[(sizeof(TYPE) == (Size)) / (sizeof(TYPE) == (Size))] + +// +// Verify that ProcessorBind.h produced UEFI Data Types that are compliant with +// Section 2.3.1 of the UEFI 2.3 Specification. +// +VERIFY_SIZE_OF (BOOLEAN, 1); +VERIFY_SIZE_OF (INT8, 1); +VERIFY_SIZE_OF (UINT8, 1); +VERIFY_SIZE_OF (INT16, 2); +VERIFY_SIZE_OF (UINT16, 2); +VERIFY_SIZE_OF (INT32, 4); +VERIFY_SIZE_OF (UINT32, 4); +VERIFY_SIZE_OF (INT64, 8); +VERIFY_SIZE_OF (UINT64, 8); +VERIFY_SIZE_OF (CHAR8, 1); +VERIFY_SIZE_OF (CHAR16, 2); + +// +// The Microsoft* C compiler can removed references to unreferenced data items +// if the /OPT:REF linker option is used. We defined a macro as this is a +// a non standard extension +// +#if defined(_MSC_EXTENSIONS) && !defined (MDE_CPU_EBC) + /// + /// Remove global variable from the linked image if there are no references to + /// it after all compiler and linker optimizations have been performed. + /// + /// + #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany) +#else + /// + /// Remove the global variable from the linked image if there are no references + /// to it after all compiler and linker optimizations have been performed. + /// + /// + #define GLOBAL_REMOVE_IF_UNREFERENCED +#endif + +// +// For symbol name in assembly code, an extra "_" is sometimes necessary +// + +/// +/// Private worker functions for ASM_PFX() +/// +#define _CONCATENATE(a, b) __CONCATENATE(a, b) +#define __CONCATENATE(a, b) a ## b + +/// +/// The __USER_LABEL_PREFIX__ macro predefined by GNUC represents the prefix +/// on symbols in assembly language. +/// +#define ASM_PFX(name) _CONCATENATE (__USER_LABEL_PREFIX__, name) + +#if __APPLE__ + // + // Apple extension that is used by the linker to optimize code size + // with assembly functions. Put at the end of your .S files + // + #define ASM_FUNCTION_REMOVE_IF_UNREFERENCED .subsections_via_symbols +#else + #define ASM_FUNCTION_REMOVE_IF_UNREFERENCED +#endif + +#ifdef __CC_ARM + // + // Older RVCT ARM compilers don't fully support #pragma pack and require __packed + // as a prefix for the structure. + // + #define PACKED __packed +#else + #define PACKED +#endif + +/// +/// 128 bit buffer containing a unique identifier value. +/// Unless otherwise specified, aligned on a 64 bit boundary. +/// +typedef struct { + UINT32 Data1; + UINT16 Data2; + UINT16 Data3; + UINT8 Data4[8]; +} GUID; + +// +// 8-bytes unsigned value that represents a physical system address. +// +typedef UINT64 PHYSICAL_ADDRESS; + +/// +/// LIST_ENTRY structure definition. +/// +typedef struct _LIST_ENTRY LIST_ENTRY; + +/// +/// _LIST_ENTRY structure definition. +/// +struct _LIST_ENTRY { + LIST_ENTRY *ForwardLink; + LIST_ENTRY *BackLink; +}; + +// +// Modifiers to abstract standard types to aid in debug of problems +// + +/// +/// Datum is read-only. +/// +#define CONST const + +/// +/// Datum is scoped to the current file or function. +/// +#define STATIC static + +/// +/// Undeclared type. +/// +#define VOID void + +// +// Modifiers for Data Types used to self document code. +// This concept is borrowed for UEFI specification. +// + +/// +/// Datum is passed to the function. +/// +#define IN + +/// +/// Datum is returned from the function. +/// +#define OUT + +/// +/// Passing the datum to the function is optional, and a NULL +/// is passed if the value is not supplied. +/// +#define OPTIONAL + +// +// UEFI specification claims 1 and 0. We are concerned about the +// complier portability so we did it this way. +// + +/// +/// Boolean true value. UEFI Specification defines this value to be 1, +/// but this form is more portable. +/// +#define TRUE ((BOOLEAN)(1==1)) + +/// +/// Boolean false value. UEFI Specification defines this value to be 0, +/// but this form is more portable. +/// +#define FALSE ((BOOLEAN)(0==1)) + +/// +/// NULL pointer (VOID *) +/// +#define NULL ((VOID *) 0) + +/// +/// Maximum values for common UEFI Data Types +/// +#define MAX_INT8 ((INT8)0x7F) +#define MAX_UINT8 ((UINT8)0xFF) +#define MAX_INT16 ((INT16)0x7FFF) +#define MAX_UINT16 ((UINT16)0xFFFF) +#define MAX_INT32 ((INT32)0x7FFFFFFF) +#define MAX_UINT32 ((UINT32)0xFFFFFFFF) +#define MAX_INT64 ((INT64)0x7FFFFFFFFFFFFFFFULL) +#define MAX_UINT64 ((UINT64)0xFFFFFFFFFFFFFFFFULL) + +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 +#define BIT32 0x0000000100000000ULL +#define BIT33 0x0000000200000000ULL +#define BIT34 0x0000000400000000ULL +#define BIT35 0x0000000800000000ULL +#define BIT36 0x0000001000000000ULL +#define BIT37 0x0000002000000000ULL +#define BIT38 0x0000004000000000ULL +#define BIT39 0x0000008000000000ULL +#define BIT40 0x0000010000000000ULL +#define BIT41 0x0000020000000000ULL +#define BIT42 0x0000040000000000ULL +#define BIT43 0x0000080000000000ULL +#define BIT44 0x0000100000000000ULL +#define BIT45 0x0000200000000000ULL +#define BIT46 0x0000400000000000ULL +#define BIT47 0x0000800000000000ULL +#define BIT48 0x0001000000000000ULL +#define BIT49 0x0002000000000000ULL +#define BIT50 0x0004000000000000ULL +#define BIT51 0x0008000000000000ULL +#define BIT52 0x0010000000000000ULL +#define BIT53 0x0020000000000000ULL +#define BIT54 0x0040000000000000ULL +#define BIT55 0x0080000000000000ULL +#define BIT56 0x0100000000000000ULL +#define BIT57 0x0200000000000000ULL +#define BIT58 0x0400000000000000ULL +#define BIT59 0x0800000000000000ULL +#define BIT60 0x1000000000000000ULL +#define BIT61 0x2000000000000000ULL +#define BIT62 0x4000000000000000ULL +#define BIT63 0x8000000000000000ULL + +#define SIZE_1KB 0x00000400 +#define SIZE_2KB 0x00000800 +#define SIZE_4KB 0x00001000 +#define SIZE_8KB 0x00002000 +#define SIZE_16KB 0x00004000 +#define SIZE_32KB 0x00008000 +#define SIZE_64KB 0x00010000 +#define SIZE_128KB 0x00020000 +#define SIZE_256KB 0x00040000 +#define SIZE_512KB 0x00080000 +#define SIZE_1MB 0x00100000 +#define SIZE_2MB 0x00200000 +#define SIZE_4MB 0x00400000 +#define SIZE_8MB 0x00800000 +#define SIZE_16MB 0x01000000 +#define SIZE_32MB 0x02000000 +#define SIZE_64MB 0x04000000 +#define SIZE_128MB 0x08000000 +#define SIZE_256MB 0x10000000 +#define SIZE_512MB 0x20000000 +#define SIZE_1GB 0x40000000 +#define SIZE_2GB 0x80000000 +#define SIZE_4GB 0x0000000100000000ULL +#define SIZE_8GB 0x0000000200000000ULL +#define SIZE_16GB 0x0000000400000000ULL +#define SIZE_32GB 0x0000000800000000ULL +#define SIZE_64GB 0x0000001000000000ULL +#define SIZE_128GB 0x0000002000000000ULL +#define SIZE_256GB 0x0000004000000000ULL +#define SIZE_512GB 0x0000008000000000ULL +#define SIZE_1TB 0x0000010000000000ULL +#define SIZE_2TB 0x0000020000000000ULL +#define SIZE_4TB 0x0000040000000000ULL +#define SIZE_8TB 0x0000080000000000ULL +#define SIZE_16TB 0x0000100000000000ULL +#define SIZE_32TB 0x0000200000000000ULL +#define SIZE_64TB 0x0000400000000000ULL +#define SIZE_128TB 0x0000800000000000ULL +#define SIZE_256TB 0x0001000000000000ULL +#define SIZE_512TB 0x0002000000000000ULL +#define SIZE_1PB 0x0004000000000000ULL +#define SIZE_2PB 0x0008000000000000ULL +#define SIZE_4PB 0x0010000000000000ULL +#define SIZE_8PB 0x0020000000000000ULL +#define SIZE_16PB 0x0040000000000000ULL +#define SIZE_32PB 0x0080000000000000ULL +#define SIZE_64PB 0x0100000000000000ULL +#define SIZE_128PB 0x0200000000000000ULL +#define SIZE_256PB 0x0400000000000000ULL +#define SIZE_512PB 0x0800000000000000ULL +#define SIZE_1EB 0x1000000000000000ULL +#define SIZE_2EB 0x2000000000000000ULL +#define SIZE_4EB 0x4000000000000000ULL +#define SIZE_8EB 0x8000000000000000ULL + +#define BASE_1KB 0x00000400 +#define BASE_2KB 0x00000800 +#define BASE_4KB 0x00001000 +#define BASE_8KB 0x00002000 +#define BASE_16KB 0x00004000 +#define BASE_32KB 0x00008000 +#define BASE_64KB 0x00010000 +#define BASE_128KB 0x00020000 +#define BASE_256KB 0x00040000 +#define BASE_512KB 0x00080000 +#define BASE_1MB 0x00100000 +#define BASE_2MB 0x00200000 +#define BASE_4MB 0x00400000 +#define BASE_8MB 0x00800000 +#define BASE_16MB 0x01000000 +#define BASE_32MB 0x02000000 +#define BASE_64MB 0x04000000 +#define BASE_128MB 0x08000000 +#define BASE_256MB 0x10000000 +#define BASE_512MB 0x20000000 +#define BASE_1GB 0x40000000 +#define BASE_2GB 0x80000000 +#define BASE_4GB 0x0000000100000000ULL +#define BASE_8GB 0x0000000200000000ULL +#define BASE_16GB 0x0000000400000000ULL +#define BASE_32GB 0x0000000800000000ULL +#define BASE_64GB 0x0000001000000000ULL +#define BASE_128GB 0x0000002000000000ULL +#define BASE_256GB 0x0000004000000000ULL +#define BASE_512GB 0x0000008000000000ULL +#define BASE_1TB 0x0000010000000000ULL +#define BASE_2TB 0x0000020000000000ULL +#define BASE_4TB 0x0000040000000000ULL +#define BASE_8TB 0x0000080000000000ULL +#define BASE_16TB 0x0000100000000000ULL +#define BASE_32TB 0x0000200000000000ULL +#define BASE_64TB 0x0000400000000000ULL +#define BASE_128TB 0x0000800000000000ULL +#define BASE_256TB 0x0001000000000000ULL +#define BASE_512TB 0x0002000000000000ULL +#define BASE_1PB 0x0004000000000000ULL +#define BASE_2PB 0x0008000000000000ULL +#define BASE_4PB 0x0010000000000000ULL +#define BASE_8PB 0x0020000000000000ULL +#define BASE_16PB 0x0040000000000000ULL +#define BASE_32PB 0x0080000000000000ULL +#define BASE_64PB 0x0100000000000000ULL +#define BASE_128PB 0x0200000000000000ULL +#define BASE_256PB 0x0400000000000000ULL +#define BASE_512PB 0x0800000000000000ULL +#define BASE_1EB 0x1000000000000000ULL +#define BASE_2EB 0x2000000000000000ULL +#define BASE_4EB 0x4000000000000000ULL +#define BASE_8EB 0x8000000000000000ULL + +// +// Support for variable length argument lists using the ANSI standard. +// +// Since we are using the ANSI standard we used the standard naming and +// did not follow the coding convention +// +// VA_LIST - typedef for argument list. +// VA_START (VA_LIST Marker, argument before the ...) - Init Marker for use. +// VA_END (VA_LIST Marker) - Clear Marker +// VA_ARG (VA_LIST Marker, var arg size) - Use Marker to get an argument from +// the ... list. You must know the size and pass it in this macro. +// VA_COPY (VA_LIST Dest, VA_LIST Start) - Initialize Dest as a copy of Start. +// +// example: +// +// UINTN +// ExampleVarArg ( +// IN UINTN NumberOfArgs, +// ... +// ) +// { +// VA_LIST Marker; +// UINTN Index; +// UINTN Result; +// +// // +// // Initialize the Marker +// // +// VA_START (Marker, NumberOfArgs); +// for (Index = 0, Result = 0; Index < NumberOfArgs; Index++) { +// // +// // The ... list is a series of UINTN values, so average them up. +// // +// Result += VA_ARG (Marker, UINTN); +// } +// +// VA_END (Marker); +// return Result +// } +// + +/** + Return the size of argument that has been aligned to sizeof (UINTN). + + @param n The parameter size to be aligned. + + @return The aligned size. +**/ +#define _INT_SIZE_OF(n) ((sizeof (n) + sizeof (UINTN) - 1) &~(sizeof (UINTN) - 1)) + +#if defined(__CC_ARM) +// +// RVCT ARM variable argument list support. +// + +/// +/// Variable used to traverse the list of arguments. This type can vary by +/// implementation and could be an array or structure. +/// +#ifdef __APCS_ADSABI + typedef int *va_list[1]; + #define VA_LIST va_list +#else + typedef struct __va_list { void *__ap; } va_list; + #define VA_LIST va_list +#endif + +#define VA_START(Marker, Parameter) __va_start(Marker, Parameter) + +#define VA_ARG(Marker, TYPE) __va_arg(Marker, TYPE) + +#define VA_END(Marker) ((void)0) + +// For some ARM RVCT compilers, __va_copy is not defined +#ifndef __va_copy + #define __va_copy(dest, src) ((void)((dest) = (src))) +#endif + +#define VA_COPY(Dest, Start) __va_copy (Dest, Start) + +#elif defined(__GNUC__) && !defined(NO_BUILTIN_VA_FUNCS) +// +// Use GCC built-in macros for variable argument lists. +// + +/// +/// Variable used to traverse the list of arguments. This type can vary by +/// implementation and could be an array or structure. +/// +typedef __builtin_va_list VA_LIST; + +#define VA_START(Marker, Parameter) __builtin_va_start (Marker, Parameter) + +#define VA_ARG(Marker, TYPE) ((sizeof (TYPE) < sizeof (UINTN)) ? (TYPE)(__builtin_va_arg (Marker, UINTN)) : (TYPE)(__builtin_va_arg (Marker, TYPE))) + +#define VA_END(Marker) __builtin_va_end (Marker) + +#define VA_COPY(Dest, Start) __builtin_va_copy (Dest, Start) + +#else +/// +/// Variable used to traverse the list of arguments. This type can vary by +/// implementation and could be an array or structure. +/// +typedef CHAR8 *VA_LIST; + +/** + Retrieves a pointer to the beginning of a variable argument list, based on + the name of the parameter that immediately precedes the variable argument list. + + This function initializes Marker to point to the beginning of the variable + argument list that immediately follows Parameter. The method for computing the + pointer to the next argument in the argument list is CPU-specific following the + EFIAPI ABI. + + @param Marker The VA_LIST used to traverse the list of arguments. + @param Parameter The name of the parameter that immediately precedes + the variable argument list. + + @return A pointer to the beginning of a variable argument list. + +**/ +#define VA_START(Marker, Parameter) (Marker = (VA_LIST) ((UINTN) & (Parameter) + _INT_SIZE_OF (Parameter))) + +/** + Returns an argument of a specified type from a variable argument list and updates + the pointer to the variable argument list to point to the next argument. + + This function returns an argument of the type specified by TYPE from the beginning + of the variable argument list specified by Marker. Marker is then updated to point + to the next argument in the variable argument list. The method for computing the + pointer to the next argument in the argument list is CPU-specific following the EFIAPI ABI. + + @param Marker VA_LIST used to traverse the list of arguments. + @param TYPE The type of argument to retrieve from the beginning + of the variable argument list. + + @return An argument of the type specified by TYPE. + +**/ +#define VA_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _INT_SIZE_OF (TYPE)) - _INT_SIZE_OF (TYPE))) + +/** + Terminates the use of a variable argument list. + + This function initializes Marker so it can no longer be used with VA_ARG(). + After this macro is used, the only way to access the variable argument list is + by using VA_START() again. + + @param Marker VA_LIST used to traverse the list of arguments. + +**/ +#define VA_END(Marker) (Marker = (VA_LIST) 0) + +/** + Initializes a VA_LIST as a copy of an existing VA_LIST. + + This macro initializes Dest as a copy of Start, as if the VA_START macro had been applied to Dest + followed by the same sequence of uses of the VA_ARG macro as had previously been used to reach + the present state of Start. + + @param Dest VA_LIST used to traverse the list of arguments. + @param Start VA_LIST used to traverse the list of arguments. + +**/ +#define VA_COPY(Dest, Start) ((void)((Dest) = (Start))) + +#endif + +/// +/// Pointer to the start of a variable argument list stored in a memory buffer. Same as UINT8 *. +/// +typedef UINTN *BASE_LIST; + +/** + Returns the size of a data type in sizeof(UINTN) units rounded up to the nearest UINTN boundary. + + @param TYPE The date type to determine the size of. + + @return The size of TYPE in sizeof (UINTN) units rounded up to the nearest UINTN boundary. +**/ +#define _BASE_INT_SIZE_OF(TYPE) ((sizeof (TYPE) + sizeof (UINTN) - 1) / sizeof (UINTN)) + +/** + Returns an argument of a specified type from a variable argument list and updates + the pointer to the variable argument list to point to the next argument. + + This function returns an argument of the type specified by TYPE from the beginning + of the variable argument list specified by Marker. Marker is then updated to point + to the next argument in the variable argument list. The method for computing the + pointer to the next argument in the argument list is CPU specific following the EFIAPI ABI. + + @param Marker The pointer to the beginning of a variable argument list. + @param TYPE The type of argument to retrieve from the beginning + of the variable argument list. + + @return An argument of the type specified by TYPE. + +**/ +#define BASE_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _BASE_INT_SIZE_OF (TYPE)) - _BASE_INT_SIZE_OF (TYPE))) + +/** + The macro that returns the byte offset of a field in a data structure. + + This function returns the offset, in bytes, of field specified by Field from the + beginning of the data structure specified by TYPE. If TYPE does not contain Field, + the module will not compile. + + @param TYPE The name of the data structure that contains the field specified by Field. + @param Field The name of the field in the data structure. + + @return Offset, in bytes, of field. + +**/ +#ifdef __GNUC__ +#if __GNUC__ >= 4 +#define OFFSET_OF(TYPE, Field) ((UINTN) __builtin_offsetof(TYPE, Field)) +#endif +#endif + +#ifndef OFFSET_OF +#define OFFSET_OF(TYPE, Field) ((UINTN) &(((TYPE *)0)->Field)) +#endif + +/** + Macro that returns a pointer to the data structure that contains a specified field of + that data structure. This is a lightweight method to hide information by placing a + public data structure inside a larger private data structure and using a pointer to + the public data structure to retrieve a pointer to the private data structure. + + This function computes the offset, in bytes, of field specified by Field from the beginning + of the data structure specified by TYPE. This offset is subtracted from Record, and is + used to return a pointer to a data structure of the type specified by TYPE. If the data type + specified by TYPE does not contain the field specified by Field, then the module will not compile. + + @param Record Pointer to the field specified by Field within a data structure of type TYPE. + @param TYPE The name of the data structure type to return. This data structure must + contain the field specified by Field. + @param Field The name of the field in the data structure specified by TYPE to which Record points. + + @return A pointer to the structure from one of it's elements. + +**/ +#define BASE_CR(Record, TYPE, Field) ((TYPE *) ((CHAR8 *) (Record) - (CHAR8 *) &(((TYPE *) 0)->Field))) + +/** + Rounds a value up to the next boundary using a specified alignment. + + This function rounds Value up to the next boundary using the specified Alignment. + This aligned value is returned. + + @param Value The value to round up. + @param Alignment The alignment boundary used to return the aligned value. + + @return A value up to the next boundary. + +**/ +#define ALIGN_VALUE(Value, Alignment) ((Value) + (((Alignment) - (Value)) & ((Alignment) - 1))) + +/** + Adjust a pointer by adding the minimum offset required for it to be aligned on + a specified alignment boundary. + + This function rounds the pointer specified by Pointer to the next alignment boundary + specified by Alignment. The pointer to the aligned address is returned. + + @param Pointer The pointer to round up. + @param Alignment The alignment boundary to use to return an aligned pointer. + + @return Pointer to the aligned address. + +**/ +#define ALIGN_POINTER(Pointer, Alignment) ((VOID *) (ALIGN_VALUE ((UINTN)(Pointer), (Alignment)))) + +/** + Rounds a value up to the next natural boundary for the current CPU. + This is 4-bytes for 32-bit CPUs and 8-bytes for 64-bit CPUs. + + This function rounds the value specified by Value up to the next natural boundary for the + current CPU. This rounded value is returned. + + @param Value The value to round up. + + @return Rounded value specified by Value. + +**/ +#define ALIGN_VARIABLE(Value) ALIGN_VALUE ((Value), sizeof (UINTN)) + + +/** + Return the maximum of two operands. + + This macro returns the maximum of two operand specified by a and b. + Both a and b must be the same numerical types, signed or unsigned. + + @param a The first operand with any numerical type. + @param b The second operand. Can be any numerical type as long as is + the same type as a. + + @return Maximum of two operands. + +**/ +#define MAX(a, b) \ + (((a) > (b)) ? (a) : (b)) + +/** + Return the minimum of two operands. + + This macro returns the minimal of two operand specified by a and b. + Both a and b must be the same numerical types, signed or unsigned. + + @param a The first operand with any numerical type. + @param b The second operand. It should be the same any numerical type with a. + + @return Minimum of two operands. + +**/ +#define MIN(a, b) \ + (((a) < (b)) ? (a) : (b)) + +/** + Return the absolute value of a signed operand. + + This macro returns the absolute value of the signed operand specified by a. + + @param a The signed operand. + + @return The absolute value of the signed operand. + +**/ +#define ABS(a) \ + (((a) < 0) ? (-(a)) : (a)) + +// +// Status codes common to all execution phases +// +typedef UINTN RETURN_STATUS; + +/** + Produces a RETURN_STATUS code with the highest bit set. + + @param StatusCode The status code value to convert into a warning code. + StatusCode must be in the range 0x00000000..0x7FFFFFFF. + + @return The value specified by StatusCode with the highest bit set. + +**/ +#define ENCODE_ERROR(StatusCode) ((RETURN_STATUS)(MAX_BIT | (StatusCode))) + +/** + Produces a RETURN_STATUS code with the highest bit clear. + + @param StatusCode The status code value to convert into a warning code. + StatusCode must be in the range 0x00000000..0x7FFFFFFF. + + @return The value specified by StatusCode with the highest bit clear. + +**/ +#define ENCODE_WARNING(StatusCode) ((RETURN_STATUS)(StatusCode)) + +/** + Returns TRUE if a specified RETURN_STATUS code is an error code. + + This function returns TRUE if StatusCode has the high bit set. Otherwise, FALSE is returned. + + @param StatusCode The status code value to evaluate. + + @retval TRUE The high bit of StatusCode is set. + @retval FALSE The high bit of StatusCode is clear. + +**/ +#define RETURN_ERROR(StatusCode) (((INTN)(RETURN_STATUS)(StatusCode)) < 0) + +/// +/// The operation completed successfully. +/// +#define RETURN_SUCCESS 0 + +/// +/// The image failed to load. +/// +#define RETURN_LOAD_ERROR ENCODE_ERROR (1) + +/// +/// The parameter was incorrect. +/// +#define RETURN_INVALID_PARAMETER ENCODE_ERROR (2) + +/// +/// The operation is not supported. +/// +#define RETURN_UNSUPPORTED ENCODE_ERROR (3) + +/// +/// The buffer was not the proper size for the request. +/// +#define RETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4) + +/// +/// The buffer was not large enough to hold the requested data. +/// The required buffer size is returned in the appropriate +/// parameter when this error occurs. +/// +#define RETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5) + +/// +/// There is no data pending upon return. +/// +#define RETURN_NOT_READY ENCODE_ERROR (6) + +/// +/// The physical device reported an error while attempting the +/// operation. +/// +#define RETURN_DEVICE_ERROR ENCODE_ERROR (7) + +/// +/// The device can not be written to. +/// +#define RETURN_WRITE_PROTECTED ENCODE_ERROR (8) + +/// +/// The resource has run out. +/// +#define RETURN_OUT_OF_RESOURCES ENCODE_ERROR (9) + +/// +/// An inconsistency was detected on the file system causing the +/// operation to fail. +/// +#define RETURN_VOLUME_CORRUPTED ENCODE_ERROR (10) + +/// +/// There is no more space on the file system. +/// +#define RETURN_VOLUME_FULL ENCODE_ERROR (11) + +/// +/// The device does not contain any medium to perform the +/// operation. +/// +#define RETURN_NO_MEDIA ENCODE_ERROR (12) + +/// +/// The medium in the device has changed since the last +/// access. +/// +#define RETURN_MEDIA_CHANGED ENCODE_ERROR (13) + +/// +/// The item was not found. +/// +#define RETURN_NOT_FOUND ENCODE_ERROR (14) + +/// +/// Access was denied. +/// +#define RETURN_ACCESS_DENIED ENCODE_ERROR (15) + +/// +/// The server was not found or did not respond to the request. +/// +#define RETURN_NO_RESPONSE ENCODE_ERROR (16) + +/// +/// A mapping to the device does not exist. +/// +#define RETURN_NO_MAPPING ENCODE_ERROR (17) + +/// +/// A timeout time expired. +/// +#define RETURN_TIMEOUT ENCODE_ERROR (18) + +/// +/// The protocol has not been started. +/// +#define RETURN_NOT_STARTED ENCODE_ERROR (19) + +/// +/// The protocol has already been started. +/// +#define RETURN_ALREADY_STARTED ENCODE_ERROR (20) + +/// +/// The operation was aborted. +/// +#define RETURN_ABORTED ENCODE_ERROR (21) + +/// +/// An ICMP error occurred during the network operation. +/// +#define RETURN_ICMP_ERROR ENCODE_ERROR (22) + +/// +/// A TFTP error occurred during the network operation. +/// +#define RETURN_TFTP_ERROR ENCODE_ERROR (23) + +/// +/// A protocol error occurred during the network operation. +/// +#define RETURN_PROTOCOL_ERROR ENCODE_ERROR (24) + +/// +/// A function encountered an internal version that was +/// incompatible with a version requested by the caller. +/// +#define RETURN_INCOMPATIBLE_VERSION ENCODE_ERROR (25) + +/// +/// The function was not performed due to a security violation. +/// +#define RETURN_SECURITY_VIOLATION ENCODE_ERROR (26) + +/// +/// A CRC error was detected. +/// +#define RETURN_CRC_ERROR ENCODE_ERROR (27) + +/// +/// The beginning or end of media was reached. +/// +#define RETURN_END_OF_MEDIA ENCODE_ERROR (28) + +/// +/// The end of the file was reached. +/// +#define RETURN_END_OF_FILE ENCODE_ERROR (31) + +/// +/// The language specified was invalid. +/// +#define RETURN_INVALID_LANGUAGE ENCODE_ERROR (32) + +/// +/// The security status of the data is unknown or compromised +/// and the data must be updated or replaced to restore a valid +/// security status. +/// +#define RETURN_COMPROMISED_DATA ENCODE_ERROR (33) + +/// +/// The string contained one or more characters that +/// the device could not render and were skipped. +/// +#define RETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1) + +/// +/// The handle was closed, but the file was not deleted. +/// +#define RETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2) + +/// +/// The handle was closed, but the data to the file was not +/// flushed properly. +/// +#define RETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3) + +/// +/// The resulting buffer was too small, and the data was +/// truncated to the buffer size. +/// +#define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4) + +/// +/// The data has not been updated within the timeframe set by +/// local policy for this type of data. +/// +#define RETURN_WARN_STALE_DATA ENCODE_WARNING (5) + +/** + Returns a 16-bit signature built from 2 ASCII characters. + + This macro returns a 16-bit value built from the two ASCII characters specified + by A and B. + + @param A The first ASCII character. + @param B The second ASCII character. + + @return A 16-bit value built from the two ASCII characters specified by A and B. + +**/ +#define SIGNATURE_16(A, B) ((A) | (B << 8)) + +/** + Returns a 32-bit signature built from 4 ASCII characters. + + This macro returns a 32-bit value built from the four ASCII characters specified + by A, B, C, and D. + + @param A The first ASCII character. + @param B The second ASCII character. + @param C The third ASCII character. + @param D The fourth ASCII character. + + @return A 32-bit value built from the two ASCII characters specified by A, B, + C and D. + +**/ +#define SIGNATURE_32(A, B, C, D) (SIGNATURE_16 (A, B) | (SIGNATURE_16 (C, D) << 16)) + +/** + Returns a 64-bit signature built from 8 ASCII characters. + + This macro returns a 64-bit value built from the eight ASCII characters specified + by A, B, C, D, E, F, G,and H. + + @param A The first ASCII character. + @param B The second ASCII character. + @param C The third ASCII character. + @param D The fourth ASCII character. + @param E The fifth ASCII character. + @param F The sixth ASCII character. + @param G The seventh ASCII character. + @param H The eighth ASCII character. + + @return A 64-bit value built from the two ASCII characters specified by A, B, + C, D, E, F, G and H. + +**/ +#define SIGNATURE_64(A, B, C, D, E, F, G, H) \ + (SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32)) + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/FileInfo.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/FileInfo.h new file mode 100644 index 000000000..21fd38904 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/FileInfo.h @@ -0,0 +1,73 @@ +/** @file + Provides a GUID and a data structure that can be used with EFI_FILE_PROTOCOL.SetInfo() + and EFI_FILE_PROTOCOL.GetInfo() to set or get generic file information. + This GUID is defined in UEFI specification. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __FILE_INFO_H__ +#define __FILE_INFO_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_FILE_INFO_ID \ + { \ + 0x9576e92, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +typedef struct { + /// + /// The size of the EFI_FILE_INFO structure, including the Null-terminated FileName string. + /// + UINT64 Size; + /// + /// The size of the file in bytes. + /// + UINT64 FileSize; + /// + /// PhysicalSize The amount of physical space the file consumes on the file system volume. + /// + UINT64 PhysicalSize; + /// + /// The time the file was created. + /// + EFI_TIME CreateTime; + /// + /// The time when the file was last accessed. + /// + EFI_TIME LastAccessTime; + /// + /// The time when the file's contents were last modified. + /// + EFI_TIME ModificationTime; + /// + /// The attribute bits for the file. + /// + UINT64 Attribute; + /// + /// The Null-terminated name of the file. + /// + CHAR16 FileName[1]; +} EFI_FILE_INFO; + +/// +/// The FileName field of the EFI_FILE_INFO data structure is variable length. +/// Whenever code needs to know the size of the EFI_FILE_INFO data structure, it needs to +/// be the size of the data structure without the FileName field. The following macro +/// computes this size correctly no matter how big the FileName array is declared. +/// This is required to make the EFI_FILE_INFO data structure ANSI compilant. +/// +#define SIZE_OF_EFI_FILE_INFO OFFSET_OF (EFI_FILE_INFO, FileName) + +extern EFI_GUID gEfiFileInfoGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/FileSystemInfo.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/FileSystemInfo.h new file mode 100644 index 000000000..504b7938f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/FileSystemInfo.h @@ -0,0 +1,65 @@ +/** @file + Provides a GUID and a data structure that can be used with EFI_FILE_PROTOCOL.GetInfo() + or EFI_FILE_PROTOCOL.SetInfo() to get or set information about the system's volume. + This GUID is defined in UEFI specification. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __FILE_SYSTEM_INFO_H__ +#define __FILE_SYSTEM_INFO_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_FILE_SYSTEM_INFO_ID \ + { \ + 0x9576e93, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +typedef struct { + /// + /// The size of the EFI_FILE_SYSTEM_INFO structure, including the Null-terminated VolumeLabel string. + /// + UINT64 Size; + /// + /// TRUE if the volume only supports read access. + /// + BOOLEAN ReadOnly; + /// + /// The number of bytes managed by the file system. + /// + UINT64 VolumeSize; + /// + /// The number of available bytes for use by the file system. + /// + UINT64 FreeSpace; + /// + /// The nominal block size by which files are typically grown. + /// + UINT32 BlockSize; + /// + /// The Null-terminated string that is the volume's label. + /// + CHAR16 VolumeLabel[1]; +} EFI_FILE_SYSTEM_INFO; + +/// +/// The VolumeLabel field of the EFI_FILE_SYSTEM_INFO data structure is variable length. +/// Whenever code needs to know the size of the EFI_FILE_SYSTEM_INFO data structure, it needs +/// to be the size of the data structure without the VolumeLable field. The following macro +/// computes this size correctly no matter how big the VolumeLable array is declared. +/// This is required to make the EFI_FILE_SYSTEM_INFO data structure ANSI compilant. +/// +#define SIZE_OF_EFI_FILE_SYSTEM_INFO OFFSET_OF (EFI_FILE_SYSTEM_INFO, VolumeLabel) + +extern EFI_GUID gEfiFileSystemInfoGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/HiiFormMapMethodGuid.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/HiiFormMapMethodGuid.h new file mode 100644 index 000000000..c8f37213f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/HiiFormMapMethodGuid.h @@ -0,0 +1,27 @@ +/** @file + Guid used to identify HII FormMap configuration method. + + Copyright (c) 2009, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + GUID defined in UEFI 2.2 spec. +**/ + +#ifndef __EFI_HII_FORMMAP_GUID_H__ +#define __EFI_HII_FORMMAP_GUID_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_HII_STANDARD_FORM_GUID \ + { 0x3bd2f4ec, 0xe524, 0x46e4, { 0xa9, 0xd8, 0x51, 0x1, 0x17, 0x42, 0x55, 0x62 } } + +extern EFI_GUID gEfiHiiStandardFormGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/HiiPlatformSetupFormset.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/HiiPlatformSetupFormset.h new file mode 100644 index 000000000..fa8173630 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/HiiPlatformSetupFormset.h @@ -0,0 +1,37 @@ +/** @file + GUID indicates that the form set contains forms designed to be used + for platform configuration and this form set will be displayed. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + GUID defined in UEFI 2.1. + +**/ + +#ifndef __HII_PLATFORM_SETUP_FORMSET_GUID_H__ +#define __HII_PLATFORM_SETUP_FORMSET_GUID_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_HII_PLATFORM_SETUP_FORMSET_GUID \ + { 0x93039971, 0x8545, 0x4b04, { 0xb4, 0x5e, 0x32, 0xeb, 0x83, 0x26, 0x4, 0xe } } + +#define EFI_HII_DRIVER_HEALTH_FORMSET_GUID \ + { 0xf22fc20c, 0x8cf4, 0x45eb, { 0x8e, 0x6, 0xad, 0x4e, 0x50, 0xb9, 0x5d, 0xd3 } } + +#define EFI_HII_USER_CREDENTIAL_FORMSET_GUID \ + { 0x337f4407, 0x5aee, 0x4b83, { 0xb2, 0xa7, 0x4e, 0xad, 0xca, 0x30, 0x88, 0xcd } } + +extern EFI_GUID gEfiHiiPlatformSetupFormsetGuid; +extern EFI_GUID gEfiHiiDriverHealthFormsetGuid; +extern EFI_GUID gEfiHiiUserCredentialFormsetGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/MdeModuleHii.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/MdeModuleHii.h new file mode 100644 index 000000000..76890b755 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/MdeModuleHii.h @@ -0,0 +1,222 @@ +/** @file + EDKII extented HII IFR guid opcodes. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __MDEMODULE_HII_H__ +#define __MDEMODULE_HII_H__ + +FILE_LICENCE ( BSD3 ); + +#define NARROW_CHAR 0xFFF0 +#define WIDE_CHAR 0xFFF1 +#define NON_BREAKING_CHAR 0xFFF2 + +/// +/// State defined for password statemachine . +/// +#define BROWSER_STATE_VALIDATE_PASSWORD 0 +#define BROWSER_STATE_SET_PASSWORD 1 + +/// +/// GUIDed opcodes defined for EDKII implementation. +/// +#define EFI_IFR_TIANO_GUID \ + { 0xf0b1735, 0x87a0, 0x4193, {0xb2, 0x66, 0x53, 0x8c, 0x38, 0xaf, 0x48, 0xce} } + +#pragma pack(1) + +/// +/// EDKII implementation extension opcodes, new extension can be added here later. +/// +#define EFI_IFR_EXTEND_OP_LABEL 0x0 +#define EFI_IFR_EXTEND_OP_BANNER 0x1 +#define EFI_IFR_EXTEND_OP_TIMEOUT 0x2 +#define EFI_IFR_EXTEND_OP_CLASS 0x3 +#define EFI_IFR_EXTEND_OP_SUBCLASS 0x4 + +/// +/// Label opcode. +/// +typedef struct _EFI_IFR_GUID_LABEL { + EFI_IFR_OP_HEADER Header; + /// + /// EFI_IFR_TIANO_GUID. + /// + EFI_GUID Guid; + /// + /// EFI_IFR_EXTEND_OP_LABEL. + /// + UINT8 ExtendOpCode; + /// + /// Label Number. + /// + UINT16 Number; +} EFI_IFR_GUID_LABEL; + +#define EFI_IFR_BANNER_ALIGN_LEFT 0 +#define EFI_IFR_BANNER_ALIGN_CENTER 1 +#define EFI_IFR_BANNER_ALIGN_RIGHT 2 + +/// +/// Banner opcode. +/// +typedef struct _EFI_IFR_GUID_BANNER { + EFI_IFR_OP_HEADER Header; + /// + /// EFI_IFR_TIANO_GUID. + /// + EFI_GUID Guid; + /// + /// EFI_IFR_EXTEND_OP_BANNER + /// + UINT8 ExtendOpCode; + EFI_STRING_ID Title; ///< The string token for the banner title. + UINT16 LineNumber; ///< 1-based line number. + UINT8 Alignment; ///< left, center, or right-aligned. +} EFI_IFR_GUID_BANNER; + +/// +/// Timeout opcode. +/// +typedef struct _EFI_IFR_GUID_TIMEOUT { + EFI_IFR_OP_HEADER Header; + /// + /// EFI_IFR_TIANO_GUID. + /// + EFI_GUID Guid; + /// + /// EFI_IFR_EXTEND_OP_TIMEOUT. + /// + UINT8 ExtendOpCode; + UINT16 TimeOut; ///< TimeOut Value. +} EFI_IFR_GUID_TIMEOUT; + +#define EFI_NON_DEVICE_CLASS 0x00 +#define EFI_DISK_DEVICE_CLASS 0x01 +#define EFI_VIDEO_DEVICE_CLASS 0x02 +#define EFI_NETWORK_DEVICE_CLASS 0x04 +#define EFI_INPUT_DEVICE_CLASS 0x08 +#define EFI_ON_BOARD_DEVICE_CLASS 0x10 +#define EFI_OTHER_DEVICE_CLASS 0x20 + +/// +/// Device Class opcode. +/// +typedef struct _EFI_IFR_GUID_CLASS { + EFI_IFR_OP_HEADER Header; + /// + /// EFI_IFR_TIANO_GUID. + /// + EFI_GUID Guid; + /// + /// EFI_IFR_EXTEND_OP_CLASS. + /// + UINT8 ExtendOpCode; + UINT16 Class; ///< Device Class from the above. +} EFI_IFR_GUID_CLASS; + +#define EFI_SETUP_APPLICATION_SUBCLASS 0x00 +#define EFI_GENERAL_APPLICATION_SUBCLASS 0x01 +#define EFI_FRONT_PAGE_SUBCLASS 0x02 +#define EFI_SINGLE_USE_SUBCLASS 0x03 + +/// +/// SubClass opcode +/// +typedef struct _EFI_IFR_GUID_SUBCLASS { + EFI_IFR_OP_HEADER Header; + /// + /// EFI_IFR_TIANO_GUID. + /// + EFI_GUID Guid; + /// + /// EFI_IFR_EXTEND_OP_SUBCLASS. + /// + UINT8 ExtendOpCode; + UINT16 SubClass; ///< Sub Class type from the above. +} EFI_IFR_GUID_SUBCLASS; + +/// +/// GUIDed opcodes support for framework vfr. +/// +#define EFI_IFR_FRAMEWORK_GUID \ + { 0x31ca5d1a, 0xd511, 0x4931, { 0xb7, 0x82, 0xae, 0x6b, 0x2b, 0x17, 0x8c, 0xd7 } } + +/// +/// Two extended opcodes are added, and new extensions can be added here later. +/// One is for framework OneOf question Option Key value; +/// another is for framework vareqval. +/// +#define EFI_IFR_EXTEND_OP_OPTIONKEY 0x0 +#define EFI_IFR_EXTEND_OP_VAREQNAME 0x1 + +/// +/// Store the framework vfr option key value. +/// +typedef struct _EFI_IFR_GUID_OPTIONKEY { + EFI_IFR_OP_HEADER Header; + /// + /// EFI_IFR_FRAMEWORK_GUID. + /// + EFI_GUID Guid; + /// + /// EFI_IFR_EXTEND_OP_OPTIONKEY. + /// + UINT8 ExtendOpCode; + /// + /// OneOf Questiond ID binded by OneOf Option. + /// + EFI_QUESTION_ID QuestionId; + /// + /// The OneOf Option Value. + /// + EFI_IFR_TYPE_VALUE OptionValue; + /// + /// The Framework OneOf Option Key Value. + /// + UINT16 KeyValue; +} EFI_IFR_GUID_OPTIONKEY; + +/// +/// Store the framework vfr vareqval name number. +/// +typedef struct _EFI_IFR_GUID_VAREQNAME { + EFI_IFR_OP_HEADER Header; + /// + /// EFI_IFR_FRAMEWORK_GUID. + /// + EFI_GUID Guid; + /// + /// EFI_IFR_EXTEND_OP_VAREQNAME. + /// + UINT8 ExtendOpCode; + /// + /// Question ID of the Numeric Opcode created. + /// + EFI_QUESTION_ID QuestionId; + /// + /// For vareqval (0x100), NameId is 0x100. + /// This value will convert to a Unicode String following this rule; + /// sprintf(StringBuffer, "%d", NameId) . + /// The the Unicode String will be used as a EFI Variable Name. + /// + UINT16 NameId; +} EFI_IFR_GUID_VAREQNAME; + +#pragma pack() + +extern EFI_GUID gEfiIfrTianoGuid; +extern EFI_GUID gEfiIfrFrameworkGuid; + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/PcAnsi.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/PcAnsi.h new file mode 100644 index 000000000..8b3e63f35 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/PcAnsi.h @@ -0,0 +1,60 @@ +/** @file + Terminal Device Path Vendor Guid. + + Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + GUIDs defined in UEFI 2.0 spec. + +**/ + +#ifndef __PC_ANSI_H__ +#define __PC_ANSI_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_PC_ANSI_GUID \ + { \ + 0xe0c14753, 0xf9be, 0x11d2, {0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ + } + +#define EFI_VT_100_GUID \ + { \ + 0xdfa66065, 0xb419, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ + } + +#define EFI_VT_100_PLUS_GUID \ + { \ + 0x7baec70b, 0x57e0, 0x4c76, {0x8e, 0x87, 0x2f, 0x9e, 0x28, 0x08, 0x83, 0x43 } \ + } + +#define EFI_VT_UTF8_GUID \ + { \ + 0xad15a0d6, 0x8bec, 0x4acf, {0xa0, 0x73, 0xd0, 0x1d, 0xe7, 0x7e, 0x2d, 0x88 } \ + } + +#define DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL \ + { \ + 0x37499a9d, 0x542f, 0x4c89, {0xa0, 0x26, 0x35, 0xda, 0x14, 0x20, 0x94, 0xe4 } \ + } + +#define EFI_SAS_DEVICE_PATH_GUID \ + { \ + 0xd487ddb4, 0x008b, 0x11d9, {0xaf, 0xdc, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \ + } + +extern EFI_GUID gEfiPcAnsiGuid; +extern EFI_GUID gEfiVT100Guid; +extern EFI_GUID gEfiVT100PlusGuid; +extern EFI_GUID gEfiVTUTF8Guid; +extern EFI_GUID gEfiUartDevicePathGuid; +extern EFI_GUID gEfiSasDevicePathGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/SmBios.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/SmBios.h new file mode 100644 index 000000000..cc4a1f946 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/SmBios.h @@ -0,0 +1,34 @@ +/** @file + GUIDs used to locate the SMBIOS tables in the UEFI 2.0 system table. + + This GUID in the system table is the only legal way to search for and + locate the SMBIOS tables. Do not search the 0xF0000 segment to find SMBIOS + tables. + + Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + GUIDs defined in UEFI 2.0 spec. + +**/ + +#ifndef __SMBIOS_GUID_H__ +#define __SMBIOS_GUID_H__ + +FILE_LICENCE ( BSD3 ); + +#define SMBIOS_TABLE_GUID \ + { \ + 0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ + } + +extern EFI_GUID gEfiSmbiosTableGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Guid/WinCertificate.h b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/WinCertificate.h new file mode 100644 index 000000000..cf0a7c25e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Guid/WinCertificate.h @@ -0,0 +1,130 @@ +/** @file + GUID for UEFI WIN_CERTIFICATE structure. + + Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + GUID defined in UEFI 2.0 spec. +**/ + +#ifndef __EFI_WIN_CERTIFICATE_H__ +#define __EFI_WIN_CERTIFICATE_H__ + +FILE_LICENCE ( BSD3 ); + +// +// _WIN_CERTIFICATE.wCertificateType +// +#define WIN_CERT_TYPE_PKCS_SIGNED_DATA 0x0002 +#define WIN_CERT_TYPE_EFI_PKCS115 0x0EF0 +#define WIN_CERT_TYPE_EFI_GUID 0x0EF1 + +/// +/// The WIN_CERTIFICATE structure is part of the PE/COFF specification. +/// +typedef struct { + /// + /// The length of the entire certificate, + /// including the length of the header, in bytes. + /// + UINT32 dwLength; + /// + /// The revision level of the WIN_CERTIFICATE + /// structure. The current revision level is 0x0200. + /// + UINT16 wRevision; + /// + /// The certificate type. See WIN_CERT_TYPE_xxx for the UEFI + /// certificate types. The UEFI specification reserves the range of + /// certificate type values from 0x0EF0 to 0x0EFF. + /// + UINT16 wCertificateType; + /// + /// The following is the actual certificate. The format of + /// the certificate depends on wCertificateType. + /// + /// UINT8 bCertificate[ANYSIZE_ARRAY]; + /// +} WIN_CERTIFICATE; + +/// +/// WIN_CERTIFICATE_UEFI_GUID.CertType +/// +#define EFI_CERT_TYPE_RSA2048_SHA256_GUID \ + {0xa7717414, 0xc616, 0x4977, {0x94, 0x20, 0x84, 0x47, 0x12, 0xa7, 0x35, 0xbf } } + +/// +/// WIN_CERTIFICATE_UEFI_GUID.CertData +/// +typedef struct { + EFI_GUID HashType; + UINT8 PublicKey[256]; + UINT8 Signature[256]; +} EFI_CERT_BLOCK_RSA_2048_SHA256; + + +/// +/// Certificate which encapsulates a GUID-specific digital signature +/// +typedef struct { + /// + /// This is the standard WIN_CERTIFICATE header, where + /// wCertificateType is set to WIN_CERT_TYPE_EFI_GUID. + /// + WIN_CERTIFICATE Hdr; + /// + /// This is the unique id which determines the + /// format of the CertData. . + /// + EFI_GUID CertType; + /// + /// The following is the certificate data. The format of + /// the data is determined by the CertType. + /// If CertType is EFI_CERT_TYPE_RSA2048_SHA256_GUID, + /// the CertData will be EFI_CERT_BLOCK_RSA_2048_SHA256 structure. + /// + UINT8 CertData[1]; +} WIN_CERTIFICATE_UEFI_GUID; + + +/// +/// Certificate which encapsulates the RSASSA_PKCS1-v1_5 digital signature. +/// +/// The WIN_CERTIFICATE_UEFI_PKCS1_15 structure is derived from +/// WIN_CERTIFICATE and encapsulate the information needed to +/// implement the RSASSA-PKCS1-v1_5 digital signature algorithm as +/// specified in RFC2437. +/// +typedef struct { + /// + /// This is the standard WIN_CERTIFICATE header, where + /// wCertificateType is set to WIN_CERT_TYPE_UEFI_PKCS1_15. + /// + WIN_CERTIFICATE Hdr; + /// + /// This is the hashing algorithm which was performed on the + /// UEFI executable when creating the digital signature. + /// + EFI_GUID HashAlgorithm; + /// + /// The following is the actual digital signature. The + /// size of the signature is the same size as the key + /// (1024-bit key is 128 bytes) and can be determined by + /// subtracting the length of the other parts of this header + /// from the total length of the certificate as found in + /// Hdr.dwLength. + /// + /// UINT8 Signature[]; + /// +} WIN_CERTIFICATE_EFI_PKCS1_15; + +extern EFI_GUID gEfiCertTypeRsa2048Sha256Guid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Ia32/ProcessorBind.h b/qemu/roms/ipxe/src/include/ipxe/efi/Ia32/ProcessorBind.h new file mode 100644 index 000000000..16e30b358 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Ia32/ProcessorBind.h @@ -0,0 +1,294 @@ +/** @file + Processor or Compiler specific defines and types for IA-32 architecture. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PROCESSOR_BIND_H__ +#define __PROCESSOR_BIND_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// Define the processor type so other code can make processor based choices. +/// +#define MDE_CPU_IA32 + +// +// Make sure we are using the correct packing rules per EFI specification +// +#if !defined(__GNUC__) +#pragma pack() +#endif + +#if defined(__INTEL_COMPILER) +// +// Disable ICC's remark #869: "Parameter" was never referenced warning. +// This is legal ANSI C code so we disable the remark that is turned on with -Wall +// +#pragma warning ( disable : 869 ) + +// +// Disable ICC's remark #1418: external function definition with no prior declaration. +// This is legal ANSI C code so we disable the remark that is turned on with /W4 +// +#pragma warning ( disable : 1418 ) + +// +// Disable ICC's remark #1419: external declaration in primary source file +// This is legal ANSI C code so we disable the remark that is turned on with /W4 +// +#pragma warning ( disable : 1419 ) + +// +// Disable ICC's remark #593: "Variable" was set but never used. +// This is legal ANSI C code so we disable the remark that is turned on with /W4 +// +#pragma warning ( disable : 593 ) + +#endif + + +#if defined(_MSC_EXTENSIONS) + +// +// Disable warning that make it impossible to compile at /W4 +// This only works for Microsoft* tools +// + +// +// Disabling bitfield type checking warnings. +// +#pragma warning ( disable : 4214 ) + +// +// Disabling the unreferenced formal parameter warnings. +// +#pragma warning ( disable : 4100 ) + +// +// Disable slightly different base types warning as CHAR8 * can not be set +// to a constant string. +// +#pragma warning ( disable : 4057 ) + +// +// ASSERT(FALSE) or while (TRUE) are legal constructes so supress this warning +// +#pragma warning ( disable : 4127 ) + +// +// This warning is caused by functions defined but not used. For precompiled header only. +// +#pragma warning ( disable : 4505 ) + +// +// This warning is caused by empty (after preprocessing) source file. For precompiled header only. +// +#pragma warning ( disable : 4206 ) + +#endif + + +#if defined(_MSC_EXTENSIONS) + + // + // use Microsoft C complier dependent integer width types + // + + /// + /// 8-byte unsigned value. + /// + typedef unsigned __int64 UINT64; + /// + /// 8-byte signed value. + /// + typedef __int64 INT64; + /// + /// 4-byte unsigned value. + /// + typedef unsigned __int32 UINT32; + /// + /// 4-byte signed value. + /// + typedef __int32 INT32; + /// + /// 2-byte unsigned value. + /// + typedef unsigned short UINT16; + /// + /// 2-byte Character. Unless otherwise specified all strings are stored in the + /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards. + /// + typedef unsigned short CHAR16; + /// + /// 2-byte signed value. + /// + typedef short INT16; + /// + /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other + /// values are undefined. + /// + typedef unsigned char BOOLEAN; + /// + /// 1-byte unsigned value. + /// + typedef unsigned char UINT8; + /// + /// 1-byte Character. + /// + typedef char CHAR8; + /// + /// 1-byte signed value. + /// + typedef signed char INT8; +#else + /// + /// 8-byte unsigned value. + /// + typedef unsigned long long UINT64; + /// + /// 8-byte signed value. + /// + typedef long long INT64; + /// + /// 4-byte unsigned value. + /// + typedef unsigned int UINT32; + /// + /// 4-byte signed value. + /// + typedef int INT32; + /// + /// 2-byte unsigned value. + /// + typedef unsigned short UINT16; + /// + /// 2-byte Character. Unless otherwise specified all strings are stored in the + /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards. + /// + typedef unsigned short CHAR16; + /// + /// 2-byte signed value. + /// + typedef short INT16; + /// + /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other + /// values are undefined. + /// + typedef unsigned char BOOLEAN; + /// + /// 1-byte unsigned value. + /// + typedef unsigned char UINT8; + /// + /// 1-byte Character + /// + typedef char CHAR8; + /// + /// 1-byte signed value + /// + typedef signed char INT8; +#endif + +/// +/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions; +/// 8 bytes on supported 64-bit processor instructions.) +/// +typedef UINT32 UINTN; +/// +/// Signed value of native width. (4 bytes on supported 32-bit processor instructions; +/// 8 bytes on supported 64-bit processor instructions.) +/// +typedef INT32 INTN; + +// +// Processor specific defines +// + +/// +/// A value of native width with the highest bit set. +/// +#define MAX_BIT 0x80000000 +/// +/// A value of native width with the two highest bits set. +/// +#define MAX_2_BITS 0xC0000000 + +/// +/// Maximum legal IA-32 address. +/// +#define MAX_ADDRESS 0xFFFFFFFF + +/// +/// Maximum legal IA-32 INTN and UINTN values. +/// +#define MAX_INTN ((INTN)0x7FFFFFFF) +#define MAX_UINTN ((UINTN)0xFFFFFFFF) + +/// +/// The stack alignment required for IA-32. +/// +#define CPU_STACK_ALIGNMENT sizeof(UINTN) + +// +// Modifier to ensure that all protocol member functions and EFI intrinsics +// use the correct C calling convention. All protocol member functions and +// EFI intrinsics are required to modify their member functions with EFIAPI. +// +#ifdef EFIAPI + /// + /// If EFIAPI is already defined, then we use that definition. + /// +#elif defined(_MSC_EXTENSIONS) + /// + /// Microsoft* compiler specific method for EFIAPI calling convention. + /// + #define EFIAPI __cdecl +#elif defined(__GNUC__) + /// + /// GCC specific method for EFIAPI calling convention. + /// + #define EFIAPI __attribute__((cdecl)) +#else + /// + /// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI + /// is the standard. + /// + #define EFIAPI +#endif + +#if defined(__GNUC__) + /// + /// For GNU assembly code, .global or .globl can declare global symbols. + /// Define this macro to unify the usage. + /// + #define ASM_GLOBAL .globl +#endif + +/** + Return the pointer to the first instruction of a function given a function pointer. + On IA-32 CPU architectures, these two pointer values are the same, + so the implementation of this macro is very simple. + + @param FunctionPointer A pointer to a function. + + @return The pointer to the first instruction of a function given a function pointer. + +**/ +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer) + +#ifndef __USER_LABEL_PREFIX__ +#define __USER_LABEL_PREFIX__ _ +#endif + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Acpi10.h b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Acpi10.h new file mode 100644 index 000000000..78570479b --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Acpi10.h @@ -0,0 +1,663 @@ +/** @file + ACPI 1.0b definitions from the ACPI Specification, revision 1.0b + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + +#ifndef _ACPI_1_0_H_ +#define _ACPI_1_0_H_ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/IndustryStandard/AcpiAml.h> + +/// +/// Common table header, this prefaces all ACPI tables, including FACS, but +/// excluding the RSD PTR structure. +/// +typedef struct { + UINT32 Signature; + UINT32 Length; +} EFI_ACPI_COMMON_HEADER; + +#pragma pack(1) +/// +/// The common ACPI description table header. This structure prefaces most ACPI tables. +/// +typedef struct { + UINT32 Signature; + UINT32 Length; + UINT8 Revision; + UINT8 Checksum; + UINT8 OemId[6]; + UINT64 OemTableId; + UINT32 OemRevision; + UINT32 CreatorId; + UINT32 CreatorRevision; +} EFI_ACPI_DESCRIPTION_HEADER; +#pragma pack() + +// +// Define for Desriptor +// +#define ACPI_SMALL_ITEM_FLAG 0x00 +#define ACPI_LARGE_ITEM_FLAG 0x01 + +// +// Small Item Descriptor Name +// +#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04 +#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05 +#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06 +#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07 +#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08 +#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09 +#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E +#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F + +// +// Large Item Descriptor Name +// +#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01 +#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04 +#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05 +#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06 +#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07 +#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08 +#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09 +#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A + +// +// Small Item Descriptor Value +// +#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22 +#define ACPI_IRQ_DESCRIPTOR 0x23 +#define ACPI_DMA_DESCRIPTOR 0x2A +#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30 +#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31 +#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38 +#define ACPI_IO_PORT_DESCRIPTOR 0x47 +#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B +#define ACPI_END_TAG_DESCRIPTOR 0x79 + +// +// Large Item Descriptor Value +// +#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81 +#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85 +#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86 +#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87 +#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88 +#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89 +#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A +#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A + +// +// Resource Type +// +#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00 +#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01 +#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02 + +/// +/// Power Management Timer frequency is fixed at 3.579545MHz. +/// +#define ACPI_TIMER_FREQUENCY 3579545 + +// +// Ensure proper structure formats +// +#pragma pack(1) + +/// +/// The commond definition of QWORD, DWORD, and WORD +/// Address Space Descriptors. +/// +typedef PACKED struct { + UINT8 Desc; + UINT16 Len; + UINT8 ResType; + UINT8 GenFlag; + UINT8 SpecificFlag; + UINT64 AddrSpaceGranularity; + UINT64 AddrRangeMin; + UINT64 AddrRangeMax; + UINT64 AddrTranslationOffset; + UINT64 AddrLen; +} EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR; + +typedef PACKED union { + UINT8 Byte; + PACKED struct { + UINT8 Length : 3; + UINT8 Name : 4; + UINT8 Type : 1; + } Bits; +} ACPI_SMALL_RESOURCE_HEADER; + +typedef PACKED struct { + PACKED union { + UINT8 Byte; + PACKED struct { + UINT8 Name : 7; + UINT8 Type : 1; + }Bits; + } Header; + UINT16 Length; +} ACPI_LARGE_RESOURCE_HEADER; + +/// +/// IRQ Descriptor. +/// +typedef PACKED struct { + ACPI_SMALL_RESOURCE_HEADER Header; + UINT16 Mask; +} EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR; + +/// +/// IRQ Descriptor. +/// +typedef PACKED struct { + ACPI_SMALL_RESOURCE_HEADER Header; + UINT16 Mask; + UINT8 Information; +} EFI_ACPI_IRQ_DESCRIPTOR; + +/// +/// DMA Descriptor. +/// +typedef PACKED struct { + ACPI_SMALL_RESOURCE_HEADER Header; + UINT8 ChannelMask; + UINT8 Information; +} EFI_ACPI_DMA_DESCRIPTOR; + +/// +/// I/O Port Descriptor +/// +typedef PACKED struct { + ACPI_SMALL_RESOURCE_HEADER Header; + UINT8 Information; + UINT16 BaseAddressMin; + UINT16 BaseAddressMax; + UINT8 Alignment; + UINT8 Length; +} EFI_ACPI_IO_PORT_DESCRIPTOR; + +/// +/// Fixed Location I/O Port Descriptor. +/// +typedef PACKED struct { + ACPI_SMALL_RESOURCE_HEADER Header; + UINT16 BaseAddress; + UINT8 Length; +} EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR; + +/// +/// 24-Bit Memory Range Descriptor +/// +typedef PACKED struct { + ACPI_LARGE_RESOURCE_HEADER Header; + UINT8 Information; + UINT16 BaseAddressMin; + UINT16 BaseAddressMax; + UINT16 Alignment; + UINT16 Length; +} EFI_ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR; + +/// +/// 32-Bit Memory Range Descriptor +/// +typedef PACKED struct { + ACPI_LARGE_RESOURCE_HEADER Header; + UINT8 Information; + UINT32 BaseAddressMin; + UINT32 BaseAddressMax; + UINT32 Alignment; + UINT32 Length; +} EFI_ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR; + +/// +/// Fixed 32-Bit Fixed Memory Range Descriptor +/// +typedef PACKED struct { + ACPI_LARGE_RESOURCE_HEADER Header; + UINT8 Information; + UINT32 BaseAddress; + UINT32 Length; +} EFI_ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR; + +/// +/// QWORD Address Space Descriptor +/// +typedef PACKED struct { + ACPI_LARGE_RESOURCE_HEADER Header; + UINT8 ResType; + UINT8 GenFlag; + UINT8 SpecificFlag; + UINT64 AddrSpaceGranularity; + UINT64 AddrRangeMin; + UINT64 AddrRangeMax; + UINT64 AddrTranslationOffset; + UINT64 AddrLen; +} EFI_ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR; + +/// +/// DWORD Address Space Descriptor +/// +typedef PACKED struct { + ACPI_LARGE_RESOURCE_HEADER Header; + UINT8 ResType; + UINT8 GenFlag; + UINT8 SpecificFlag; + UINT32 AddrSpaceGranularity; + UINT32 AddrRangeMin; + UINT32 AddrRangeMax; + UINT32 AddrTranslationOffset; + UINT32 AddrLen; +} EFI_ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR; + +/// +/// WORD Address Space Descriptor +/// +typedef PACKED struct { + ACPI_LARGE_RESOURCE_HEADER Header; + UINT8 ResType; + UINT8 GenFlag; + UINT8 SpecificFlag; + UINT16 AddrSpaceGranularity; + UINT16 AddrRangeMin; + UINT16 AddrRangeMax; + UINT16 AddrTranslationOffset; + UINT16 AddrLen; +} EFI_ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR; + +/// +/// Extended Interrupt Descriptor +/// +typedef PACKED struct { + ACPI_LARGE_RESOURCE_HEADER Header; + UINT8 InterruptVectorFlags; + UINT8 InterruptTableLength; + UINT32 InterruptNumber[1]; +} EFI_ACPI_EXTENDED_INTERRUPT_DESCRIPTOR; + +#pragma pack() + +/// +/// The End tag identifies an end of resource data. +/// +typedef struct { + UINT8 Desc; + UINT8 Checksum; +} EFI_ACPI_END_TAG_DESCRIPTOR; + +// +// General use definitions +// +#define EFI_ACPI_RESERVED_BYTE 0x00 +#define EFI_ACPI_RESERVED_WORD 0x0000 +#define EFI_ACPI_RESERVED_DWORD 0x00000000 +#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000 + +// +// Resource Type Specific Flags +// Ref ACPI specification 6.4.3.5.5 +// +// Bit [0] : Write Status, _RW +// +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0) +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0) +// +// Bit [2:1] : Memory Attributes, _MEM +// +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1) +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1) +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1) +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1) +// +// Bit [4:3] : Memory Attributes, _MTP +// +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3) +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3) +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3) +#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3) +// +// Bit [5] : Memory to I/O Translation, _TTP +// +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5) +#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5) + +// +// IRQ Information +// Ref ACPI specification 6.4.2.1 +// +#define EFI_ACPI_IRQ_SHARABLE_MASK 0x10 +#define EFI_ACPI_IRQ_SHARABLE 0x10 + +#define EFI_ACPI_IRQ_POLARITY_MASK 0x08 +#define EFI_ACPI_IRQ_HIGH_TRUE 0x00 +#define EFI_ACPI_IRQ_LOW_FALSE 0x08 + +#define EFI_ACPI_IRQ_MODE 0x01 +#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00 +#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01 + +// +// DMA Information +// Ref ACPI specification 6.4.2.2 +// +#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60 +#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00 +#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20 +#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40 +#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60 + +#define EFI_ACPI_DMA_BUS_MASTER_MASK 0x04 +#define EFI_ACPI_DMA_BUS_MASTER 0x04 + +#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03 +#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00 +#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01 +#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x10 + +// +// IO Information +// Ref ACPI specification 6.4.2.5 +// +#define EFI_ACPI_IO_DECODE_MASK 0x01 +#define EFI_ACPI_IO_DECODE_16_BIT 0x01 +#define EFI_ACPI_IO_DECODE_10_BIT 0x00 + +// +// Memory Information +// Ref ACPI specification 6.4.3.4 +// +#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01 +#define EFI_ACPI_MEMORY_WRITABLE 0x01 +#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00 + +// +// Ensure proper structure formats +// +#pragma pack(1) +// +// ACPI 1.0b table structures +// + +/// +/// Root System Description Pointer Structure. +/// +typedef struct { + UINT64 Signature; + UINT8 Checksum; + UINT8 OemId[6]; + UINT8 Reserved; + UINT32 RsdtAddress; +} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER; + +// +// Root System Description Table +// No definition needed as it is a common description table header, the same with +// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. +// + +/// +/// RSDT Revision (as defined in ACPI 1.0b specification). +/// +#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 + +/// +/// Fixed ACPI Description Table Structure (FADT). +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 FirmwareCtrl; + UINT32 Dsdt; + UINT8 IntModel; + UINT8 Reserved1; + UINT16 SciInt; + UINT32 SmiCmd; + UINT8 AcpiEnable; + UINT8 AcpiDisable; + UINT8 S4BiosReq; + UINT8 Reserved2; + UINT32 Pm1aEvtBlk; + UINT32 Pm1bEvtBlk; + UINT32 Pm1aCntBlk; + UINT32 Pm1bCntBlk; + UINT32 Pm2CntBlk; + UINT32 PmTmrBlk; + UINT32 Gpe0Blk; + UINT32 Gpe1Blk; + UINT8 Pm1EvtLen; + UINT8 Pm1CntLen; + UINT8 Pm2CntLen; + UINT8 PmTmLen; + UINT8 Gpe0BlkLen; + UINT8 Gpe1BlkLen; + UINT8 Gpe1Base; + UINT8 Reserved3; + UINT16 PLvl2Lat; + UINT16 PLvl3Lat; + UINT16 FlushSize; + UINT16 FlushStride; + UINT8 DutyOffset; + UINT8 DutyWidth; + UINT8 DayAlrm; + UINT8 MonAlrm; + UINT8 Century; + UINT8 Reserved4; + UINT8 Reserved5; + UINT8 Reserved6; + UINT32 Flags; +} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE; + +/// +/// FADT Version (as defined in ACPI 1.0b specification). +/// +#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01 + +#define EFI_ACPI_1_0_INT_MODE_DUAL_PIC 0 +#define EFI_ACPI_1_0_INT_MODE_MULTIPLE_APIC 1 + +// +// Fixed ACPI Description Table Fixed Feature Flags +// All other bits are reserved and must be set to 0. +// +#define EFI_ACPI_1_0_WBINVD BIT0 +#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1 +#define EFI_ACPI_1_0_PROC_C1 BIT2 +#define EFI_ACPI_1_0_P_LVL2_UP BIT3 +#define EFI_ACPI_1_0_PWR_BUTTON BIT4 +#define EFI_ACPI_1_0_SLP_BUTTON BIT5 +#define EFI_ACPI_1_0_FIX_RTC BIT6 +#define EFI_ACPI_1_0_RTC_S4 BIT7 +#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8 +#define EFI_ACPI_1_0_DCK_CAP BIT9 + +/// +/// Firmware ACPI Control Structure. +/// +typedef struct { + UINT32 Signature; + UINT32 Length; + UINT32 HardwareSignature; + UINT32 FirmwareWakingVector; + UINT32 GlobalLock; + UINT32 Flags; + UINT8 Reserved[40]; +} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE; + +/// +/// Firmware Control Structure Feature Flags. +/// All other bits are reserved and must be set to 0. +/// +#define EFI_ACPI_1_0_S4BIOS_F BIT0 + +/// +/// Multiple APIC Description Table header definition. The rest of the table +/// must be defined in a platform-specific manner. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 LocalApicAddress; + UINT32 Flags; +} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; + +/// +/// MADT Revision (as defined in ACPI 1.0b specification). +/// +#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01 + +/// +/// Multiple APIC Flags +/// All other bits are reserved and must be set to 0. +/// +#define EFI_ACPI_1_0_PCAT_COMPAT BIT0 + +// +// Multiple APIC Description Table APIC structure types +// All other values between 0x05 an 0xFF are reserved and +// will be ignored by OSPM. +// +#define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00 +#define EFI_ACPI_1_0_IO_APIC 0x01 +#define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02 +#define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03 +#define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04 + +// +// APIC Structure Definitions +// + +/// +/// Processor Local APIC Structure Definition. +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 AcpiProcessorId; + UINT8 ApicId; + UINT32 Flags; +} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE; + +/// +/// Local APIC Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED BIT0 + +/// +/// IO APIC Structure. +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 IoApicId; + UINT8 Reserved; + UINT32 IoApicAddress; + UINT32 SystemVectorBase; +} EFI_ACPI_1_0_IO_APIC_STRUCTURE; + +/// +/// Interrupt Source Override Structure. +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Bus; + UINT8 Source; + UINT32 GlobalSystemInterruptVector; + UINT16 Flags; +} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; + +/// +/// Non-Maskable Interrupt Source Structure. +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Flags; + UINT32 GlobalSystemInterruptVector; +} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; + +/// +/// Local APIC NMI Structure. +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 AcpiProcessorId; + UINT16 Flags; + UINT8 LocalApicInti; +} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE; + +/// +/// Smart Battery Description Table (SBST) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 WarningEnergyLevel; + UINT32 LowEnergyLevel; + UINT32 CriticalEnergyLevel; +} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE; + +// +// Known table signatures +// + +/// +/// "RSD PTR " Root System Description Pointer. +/// +#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') + +/// +/// "APIC" Multiple APIC Description Table. +/// +#define EFI_ACPI_1_0_APIC_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') + +/// +/// "DSDT" Differentiated System Description Table. +/// +#define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') + +/// +/// "FACS" Firmware ACPI Control Structure. +/// +#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') + +/// +/// "FACP" Fixed ACPI Description Table. +/// +#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') + +/// +/// "PSDT" Persistent System Description Table. +/// +#define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') + +/// +/// "RSDT" Root System Description Table. +/// +#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') + +/// +/// "SBST" Smart Battery Specification Table. +/// +#define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') + +/// +/// "SSDT" Secondary System Description Table. +/// +#define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') + +#pragma pack() + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/AcpiAml.h b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/AcpiAml.h new file mode 100644 index 000000000..a9186b40f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/AcpiAml.h @@ -0,0 +1,177 @@ +/** @file + This file contains AML code definition in the latest ACPI spec. + + Copyright (c) 2011, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _ACPI_AML_H_ +#define _ACPI_AML_H_ + +FILE_LICENCE ( BSD3 ); + +// +// ACPI AML definition +// + +// +// Primary OpCode +// +#define AML_ZERO_OP 0x00 +#define AML_ONE_OP 0x01 +#define AML_ALIAS_OP 0x06 +#define AML_NAME_OP 0x08 +#define AML_BYTE_PREFIX 0x0a +#define AML_WORD_PREFIX 0x0b +#define AML_DWORD_PREFIX 0x0c +#define AML_STRING_PREFIX 0x0d +#define AML_QWORD_PREFIX 0x0e +#define AML_SCOPE_OP 0x10 +#define AML_BUFFER_OP 0x11 +#define AML_PACKAGE_OP 0x12 +#define AML_VAR_PACKAGE_OP 0x13 +#define AML_METHOD_OP 0x14 +#define AML_DUAL_NAME_PREFIX 0x2e +#define AML_MULTI_NAME_PREFIX 0x2f +#define AML_NAME_CHAR_A 0x41 +#define AML_NAME_CHAR_B 0x42 +#define AML_NAME_CHAR_C 0x43 +#define AML_NAME_CHAR_D 0x44 +#define AML_NAME_CHAR_E 0x45 +#define AML_NAME_CHAR_F 0x46 +#define AML_NAME_CHAR_G 0x47 +#define AML_NAME_CHAR_H 0x48 +#define AML_NAME_CHAR_I 0x49 +#define AML_NAME_CHAR_J 0x4a +#define AML_NAME_CHAR_K 0x4b +#define AML_NAME_CHAR_L 0x4c +#define AML_NAME_CHAR_M 0x4d +#define AML_NAME_CHAR_N 0x4e +#define AML_NAME_CHAR_O 0x4f +#define AML_NAME_CHAR_P 0x50 +#define AML_NAME_CHAR_Q 0x51 +#define AML_NAME_CHAR_R 0x52 +#define AML_NAME_CHAR_S 0x53 +#define AML_NAME_CHAR_T 0x54 +#define AML_NAME_CHAR_U 0x55 +#define AML_NAME_CHAR_V 0x56 +#define AML_NAME_CHAR_W 0x57 +#define AML_NAME_CHAR_X 0x58 +#define AML_NAME_CHAR_Y 0x59 +#define AML_NAME_CHAR_Z 0x5a +#define AML_ROOT_CHAR 0x5c +#define AML_PARENT_PREFIX_CHAR 0x5e +#define AML_NAME_CHAR__ 0x5f +#define AML_LOCAL0 0x60 +#define AML_LOCAL1 0x61 +#define AML_LOCAL2 0x62 +#define AML_LOCAL3 0x63 +#define AML_LOCAL4 0x64 +#define AML_LOCAL5 0x65 +#define AML_LOCAL6 0x66 +#define AML_LOCAL7 0x67 +#define AML_ARG0 0x68 +#define AML_ARG1 0x69 +#define AML_ARG2 0x6a +#define AML_ARG3 0x6b +#define AML_ARG4 0x6c +#define AML_ARG5 0x6d +#define AML_ARG6 0x6e +#define AML_STORE_OP 0x70 +#define AML_REF_OF_OP 0x71 +#define AML_ADD_OP 0x72 +#define AML_CONCAT_OP 0x73 +#define AML_SUBTRACT_OP 0x74 +#define AML_INCREMENT_OP 0x75 +#define AML_DECREMENT_OP 0x76 +#define AML_MULTIPLY_OP 0x77 +#define AML_DIVIDE_OP 0x78 +#define AML_SHIFT_LEFT_OP 0x79 +#define AML_SHIFT_RIGHT_OP 0x7a +#define AML_AND_OP 0x7b +#define AML_NAND_OP 0x7c +#define AML_OR_OP 0x7d +#define AML_NOR_OP 0x7e +#define AML_XOR_OP 0x7f +#define AML_NOT_OP 0x80 +#define AML_FIND_SET_LEFT_BIT_OP 0x81 +#define AML_FIND_SET_RIGHT_BIT_OP 0x82 +#define AML_DEREF_OF_OP 0x83 +#define AML_CONCAT_RES_OP 0x84 +#define AML_MOD_OP 0x85 +#define AML_NOTIFY_OP 0x86 +#define AML_SIZE_OF_OP 0x87 +#define AML_INDEX_OP 0x88 +#define AML_MATCH_OP 0x89 +#define AML_CREATE_DWORD_FIELD_OP 0x8a +#define AML_CREATE_WORD_FIELD_OP 0x8b +#define AML_CREATE_BYTE_FIELD_OP 0x8c +#define AML_CREATE_BIT_FIELD_OP 0x8d +#define AML_OBJECT_TYPE_OP 0x8e +#define AML_CREATE_QWORD_FIELD_OP 0x8f +#define AML_LAND_OP 0x90 +#define AML_LOR_OP 0x91 +#define AML_LNOT_OP 0x92 +#define AML_LEQUAL_OP 0x93 +#define AML_LGREATER_OP 0x94 +#define AML_LLESS_OP 0x95 +#define AML_TO_BUFFER_OP 0x96 +#define AML_TO_DEC_STRING_OP 0x97 +#define AML_TO_HEX_STRING_OP 0x98 +#define AML_TO_INTEGER_OP 0x99 +#define AML_TO_STRING_OP 0x9c +#define AML_COPY_OBJECT_OP 0x9d +#define AML_MID_OP 0x9e +#define AML_CONTINUE_OP 0x9f +#define AML_IF_OP 0xa0 +#define AML_ELSE_OP 0xa1 +#define AML_WHILE_OP 0xa2 +#define AML_NOOP_OP 0xa3 +#define AML_RETURN_OP 0xa4 +#define AML_BREAK_OP 0xa5 +#define AML_BREAK_POINT_OP 0xcc +#define AML_ONES_OP 0xff + +// +// Extended OpCode +// +#define AML_EXT_OP 0x5b + +#define AML_EXT_MUTEX_OP 0x01 +#define AML_EXT_EVENT_OP 0x02 +#define AML_EXT_COND_REF_OF_OP 0x12 +#define AML_EXT_CREATE_FIELD_OP 0x13 +#define AML_EXT_LOAD_TABLE_OP 0x1f +#define AML_EXT_LOAD_OP 0x20 +#define AML_EXT_STALL_OP 0x21 +#define AML_EXT_SLEEP_OP 0x22 +#define AML_EXT_ACQUIRE_OP 0x23 +#define AML_EXT_SIGNAL_OP 0x24 +#define AML_EXT_WAIT_OP 0x25 +#define AML_EXT_RESET_OP 0x26 +#define AML_EXT_RELEASE_OP 0x27 +#define AML_EXT_FROM_BCD_OP 0x28 +#define AML_EXT_TO_BCD_OP 0x29 +#define AML_EXT_UNLOAD_OP 0x2a +#define AML_EXT_REVISION_OP 0x30 +#define AML_EXT_DEBUG_OP 0x31 +#define AML_EXT_FATAL_OP 0x32 +#define AML_EXT_TIMER_OP 0x33 +#define AML_EXT_REGION_OP 0x80 +#define AML_EXT_FIELD_OP 0x81 +#define AML_EXT_DEVICE_OP 0x82 +#define AML_EXT_PROCESSOR_OP 0x83 +#define AML_EXT_POWER_RES_OP 0x84 +#define AML_EXT_THERMAL_ZONE_OP 0x85 +#define AML_EXT_INDEX_FIELD_OP 0x86 +#define AML_EXT_BANK_FIELD_OP 0x87 +#define AML_EXT_DATA_REGION_OP 0x88 + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Pci22.h b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Pci22.h new file mode 100644 index 000000000..a73820f69 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Pci22.h @@ -0,0 +1,858 @@ +/** @file + Support for PCI 2.2 standard. + + This file includes the definitions in the following specifications, + PCI Local Bus Specification, 2.2 + PCI-to-PCI Bridge Architecture Specification, Revision 1.2 + PC Card Standard, 8.0 + + + + Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> + Copyright (c) 2014, Hewlett-Packard Development Company, L.P.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _PCI22_H_ +#define _PCI22_H_ + +FILE_LICENCE ( BSD3 ); + +#define PCI_MAX_BUS 255 +#define PCI_MAX_DEVICE 31 +#define PCI_MAX_FUNC 7 + +#pragma pack(1) + +/// +/// Common header region in PCI Configuration Space +/// Section 6.1, PCI Local Bus Specification, 2.2 +/// +typedef struct { + UINT16 VendorId; + UINT16 DeviceId; + UINT16 Command; + UINT16 Status; + UINT8 RevisionID; + UINT8 ClassCode[3]; + UINT8 CacheLineSize; + UINT8 LatencyTimer; + UINT8 HeaderType; + UINT8 BIST; +} PCI_DEVICE_INDEPENDENT_REGION; + +/// +/// PCI Device header region in PCI Configuration Space +/// Section 6.1, PCI Local Bus Specification, 2.2 +/// +typedef struct { + UINT32 Bar[6]; + UINT32 CISPtr; + UINT16 SubsystemVendorID; + UINT16 SubsystemID; + UINT32 ExpansionRomBar; + UINT8 CapabilityPtr; + UINT8 Reserved1[3]; + UINT32 Reserved2; + UINT8 InterruptLine; + UINT8 InterruptPin; + UINT8 MinGnt; + UINT8 MaxLat; +} PCI_DEVICE_HEADER_TYPE_REGION; + +/// +/// PCI Device Configuration Space +/// Section 6.1, PCI Local Bus Specification, 2.2 +/// +typedef struct { + PCI_DEVICE_INDEPENDENT_REGION Hdr; + PCI_DEVICE_HEADER_TYPE_REGION Device; +} PCI_TYPE00; + +/// +/// PCI-PCI Bridge header region in PCI Configuration Space +/// Section 3.2, PCI-PCI Bridge Architecture, Version 1.2 +/// +typedef struct { + UINT32 Bar[2]; + UINT8 PrimaryBus; + UINT8 SecondaryBus; + UINT8 SubordinateBus; + UINT8 SecondaryLatencyTimer; + UINT8 IoBase; + UINT8 IoLimit; + UINT16 SecondaryStatus; + UINT16 MemoryBase; + UINT16 MemoryLimit; + UINT16 PrefetchableMemoryBase; + UINT16 PrefetchableMemoryLimit; + UINT32 PrefetchableBaseUpper32; + UINT32 PrefetchableLimitUpper32; + UINT16 IoBaseUpper16; + UINT16 IoLimitUpper16; + UINT8 CapabilityPtr; + UINT8 Reserved[3]; + UINT32 ExpansionRomBAR; + UINT8 InterruptLine; + UINT8 InterruptPin; + UINT16 BridgeControl; +} PCI_BRIDGE_CONTROL_REGISTER; + +/// +/// PCI-to-PCI Bridge Configuration Space +/// Section 3.2, PCI-PCI Bridge Architecture, Version 1.2 +/// +typedef struct { + PCI_DEVICE_INDEPENDENT_REGION Hdr; + PCI_BRIDGE_CONTROL_REGISTER Bridge; +} PCI_TYPE01; + +typedef union { + PCI_TYPE00 Device; + PCI_TYPE01 Bridge; +} PCI_TYPE_GENERIC; + +/// +/// CardBus Conroller Configuration Space, +/// Section 4.5.1, PC Card Standard. 8.0 +/// +typedef struct { + UINT32 CardBusSocketReg; ///< Cardus Socket/ExCA Base + UINT8 Cap_Ptr; + UINT8 Reserved; + UINT16 SecondaryStatus; ///< Secondary Status + UINT8 PciBusNumber; ///< PCI Bus Number + UINT8 CardBusBusNumber; ///< CardBus Bus Number + UINT8 SubordinateBusNumber; ///< Subordinate Bus Number + UINT8 CardBusLatencyTimer; ///< CardBus Latency Timer + UINT32 MemoryBase0; ///< Memory Base Register 0 + UINT32 MemoryLimit0; ///< Memory Limit Register 0 + UINT32 MemoryBase1; + UINT32 MemoryLimit1; + UINT32 IoBase0; + UINT32 IoLimit0; ///< I/O Base Register 0 + UINT32 IoBase1; ///< I/O Limit Register 0 + UINT32 IoLimit1; + UINT8 InterruptLine; ///< Interrupt Line + UINT8 InterruptPin; ///< Interrupt Pin + UINT16 BridgeControl; ///< Bridge Control +} PCI_CARDBUS_CONTROL_REGISTER; + +// +// Definitions of PCI class bytes and manipulation macros. +// +#define PCI_CLASS_OLD 0x00 +#define PCI_CLASS_OLD_OTHER 0x00 +#define PCI_CLASS_OLD_VGA 0x01 + +#define PCI_CLASS_MASS_STORAGE 0x01 +#define PCI_CLASS_MASS_STORAGE_SCSI 0x00 +#define PCI_CLASS_MASS_STORAGE_IDE 0x01 +#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02 +#define PCI_CLASS_MASS_STORAGE_IPI 0x03 +#define PCI_CLASS_MASS_STORAGE_RAID 0x04 +#define PCI_CLASS_MASS_STORAGE_OTHER 0x80 + +#define PCI_CLASS_NETWORK 0x02 +#define PCI_CLASS_NETWORK_ETHERNET 0x00 +#define PCI_CLASS_NETWORK_TOKENRING 0x01 +#define PCI_CLASS_NETWORK_FDDI 0x02 +#define PCI_CLASS_NETWORK_ATM 0x03 +#define PCI_CLASS_NETWORK_ISDN 0x04 +#define PCI_CLASS_NETWORK_OTHER 0x80 + +#define PCI_CLASS_DISPLAY 0x03 +#define PCI_CLASS_DISPLAY_VGA 0x00 +#define PCI_IF_VGA_VGA 0x00 +#define PCI_IF_VGA_8514 0x01 +#define PCI_CLASS_DISPLAY_XGA 0x01 +#define PCI_CLASS_DISPLAY_3D 0x02 +#define PCI_CLASS_DISPLAY_OTHER 0x80 + +#define PCI_CLASS_MEDIA 0x04 +#define PCI_CLASS_MEDIA_VIDEO 0x00 +#define PCI_CLASS_MEDIA_AUDIO 0x01 +#define PCI_CLASS_MEDIA_TELEPHONE 0x02 +#define PCI_CLASS_MEDIA_OTHER 0x80 + +#define PCI_CLASS_MEMORY_CONTROLLER 0x05 +#define PCI_CLASS_MEMORY_RAM 0x00 +#define PCI_CLASS_MEMORY_FLASH 0x01 +#define PCI_CLASS_MEMORY_OTHER 0x80 + +#define PCI_CLASS_BRIDGE 0x06 +#define PCI_CLASS_BRIDGE_HOST 0x00 +#define PCI_CLASS_BRIDGE_ISA 0x01 +#define PCI_CLASS_BRIDGE_EISA 0x02 +#define PCI_CLASS_BRIDGE_MCA 0x03 +#define PCI_CLASS_BRIDGE_P2P 0x04 +#define PCI_IF_BRIDGE_P2P 0x00 +#define PCI_IF_BRIDGE_P2P_SUBTRACTIVE 0x01 +#define PCI_CLASS_BRIDGE_PCMCIA 0x05 +#define PCI_CLASS_BRIDGE_NUBUS 0x06 +#define PCI_CLASS_BRIDGE_CARDBUS 0x07 +#define PCI_CLASS_BRIDGE_RACEWAY 0x08 +#define PCI_CLASS_BRIDGE_OTHER 0x80 +#define PCI_CLASS_BRIDGE_ISA_PDECODE 0x80 + +#define PCI_CLASS_SCC 0x07 ///< Simple communications controllers +#define PCI_SUBCLASS_SERIAL 0x00 +#define PCI_IF_GENERIC_XT 0x00 +#define PCI_IF_16450 0x01 +#define PCI_IF_16550 0x02 +#define PCI_IF_16650 0x03 +#define PCI_IF_16750 0x04 +#define PCI_IF_16850 0x05 +#define PCI_IF_16950 0x06 +#define PCI_SUBCLASS_PARALLEL 0x01 +#define PCI_IF_PARALLEL_PORT 0x00 +#define PCI_IF_BI_DIR_PARALLEL_PORT 0x01 +#define PCI_IF_ECP_PARALLEL_PORT 0x02 +#define PCI_IF_1284_CONTROLLER 0x03 +#define PCI_IF_1284_DEVICE 0xFE +#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02 +#define PCI_SUBCLASS_MODEM 0x03 +#define PCI_IF_GENERIC_MODEM 0x00 +#define PCI_IF_16450_MODEM 0x01 +#define PCI_IF_16550_MODEM 0x02 +#define PCI_IF_16650_MODEM 0x03 +#define PCI_IF_16750_MODEM 0x04 +#define PCI_SUBCLASS_SCC_OTHER 0x80 + +#define PCI_CLASS_SYSTEM_PERIPHERAL 0x08 +#define PCI_SUBCLASS_PIC 0x00 +#define PCI_IF_8259_PIC 0x00 +#define PCI_IF_ISA_PIC 0x01 +#define PCI_IF_EISA_PIC 0x02 +#define PCI_IF_APIC_CONTROLLER 0x10 ///< I/O APIC interrupt controller , 32 bye none-prefectable memory. +#define PCI_IF_APIC_CONTROLLER2 0x20 +#define PCI_SUBCLASS_DMA 0x01 +#define PCI_IF_8237_DMA 0x00 +#define PCI_IF_ISA_DMA 0x01 +#define PCI_IF_EISA_DMA 0x02 +#define PCI_SUBCLASS_TIMER 0x02 +#define PCI_IF_8254_TIMER 0x00 +#define PCI_IF_ISA_TIMER 0x01 +#define PCI_IF_EISA_TIMER 0x02 +#define PCI_SUBCLASS_RTC 0x03 +#define PCI_IF_GENERIC_RTC 0x00 +#define PCI_IF_ISA_RTC 0x01 +#define PCI_SUBCLASS_PNP_CONTROLLER 0x04 ///< HotPlug Controller +#define PCI_SUBCLASS_PERIPHERAL_OTHER 0x80 + +#define PCI_CLASS_INPUT_DEVICE 0x09 +#define PCI_SUBCLASS_KEYBOARD 0x00 +#define PCI_SUBCLASS_PEN 0x01 +#define PCI_SUBCLASS_MOUSE_CONTROLLER 0x02 +#define PCI_SUBCLASS_SCAN_CONTROLLER 0x03 +#define PCI_SUBCLASS_GAMEPORT 0x04 +#define PCI_IF_GAMEPORT 0x00 +#define PCI_IF_GAMEPORT1 0x10 +#define PCI_SUBCLASS_INPUT_OTHER 0x80 + +#define PCI_CLASS_DOCKING_STATION 0x0A +#define PCI_SUBCLASS_DOCKING_GENERIC 0x00 +#define PCI_SUBCLASS_DOCKING_OTHER 0x80 + +#define PCI_CLASS_PROCESSOR 0x0B +#define PCI_SUBCLASS_PROC_386 0x00 +#define PCI_SUBCLASS_PROC_486 0x01 +#define PCI_SUBCLASS_PROC_PENTIUM 0x02 +#define PCI_SUBCLASS_PROC_ALPHA 0x10 +#define PCI_SUBCLASS_PROC_POWERPC 0x20 +#define PCI_SUBCLASS_PROC_MIPS 0x30 +#define PCI_SUBCLASS_PROC_CO_PORC 0x40 ///< Co-Processor + +#define PCI_CLASS_SERIAL 0x0C +#define PCI_CLASS_SERIAL_FIREWIRE 0x00 +#define PCI_IF_1394 0x00 +#define PCI_IF_1394_OPEN_HCI 0x10 +#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01 +#define PCI_CLASS_SERIAL_SSA 0x02 +#define PCI_CLASS_SERIAL_USB 0x03 +#define PCI_IF_UHCI 0x00 +#define PCI_IF_OHCI 0x10 +#define PCI_IF_USB_OTHER 0x80 +#define PCI_IF_USB_DEVICE 0xFE +#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04 +#define PCI_CLASS_SERIAL_SMB 0x05 + +#define PCI_CLASS_WIRELESS 0x0D +#define PCI_SUBCLASS_IRDA 0x00 +#define PCI_SUBCLASS_IR 0x01 +#define PCI_SUBCLASS_RF 0x10 +#define PCI_SUBCLASS_WIRELESS_OTHER 0x80 + +#define PCI_CLASS_INTELLIGENT_IO 0x0E + +#define PCI_CLASS_SATELLITE 0x0F +#define PCI_SUBCLASS_TV 0x01 +#define PCI_SUBCLASS_AUDIO 0x02 +#define PCI_SUBCLASS_VOICE 0x03 +#define PCI_SUBCLASS_DATA 0x04 + +#define PCI_SECURITY_CONTROLLER 0x10 ///< Encryption and decryption controller +#define PCI_SUBCLASS_NET_COMPUT 0x00 +#define PCI_SUBCLASS_ENTERTAINMENT 0x10 +#define PCI_SUBCLASS_SECURITY_OTHER 0x80 + +#define PCI_CLASS_DPIO 0x11 +#define PCI_SUBCLASS_DPIO 0x00 +#define PCI_SUBCLASS_DPIO_OTHER 0x80 + +/** + Macro that checks whether the Base Class code of device matched. + + @param _p Specified device. + @param c Base Class code needs matching. + + @retval TRUE Base Class code matches the specified device. + @retval FALSE Base Class code doesn't match the specified device. + +**/ +#define IS_CLASS1(_p, c) ((_p)->Hdr.ClassCode[2] == (c)) +/** + Macro that checks whether the Base Class code and Sub-Class code of device matched. + + @param _p Specified device. + @param c Base Class code needs matching. + @param s Sub-Class code needs matching. + + @retval TRUE Base Class code and Sub-Class code match the specified device. + @retval FALSE Base Class code and Sub-Class code don't match the specified device. + +**/ +#define IS_CLASS2(_p, c, s) (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s))) +/** + Macro that checks whether the Base Class code, Sub-Class code and Interface code of device matched. + + @param _p Specified device. + @param c Base Class code needs matching. + @param s Sub-Class code needs matching. + @param p Interface code needs matching. + + @retval TRUE Base Class code, Sub-Class code and Interface code match the specified device. + @retval FALSE Base Class code, Sub-Class code and Interface code don't match the specified device. + +**/ +#define IS_CLASS3(_p, c, s, p) (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p))) + +/** + Macro that checks whether device is a display controller. + + @param _p Specified device. + + @retval TRUE Device is a display controller. + @retval FALSE Device is not a display controller. + +**/ +#define IS_PCI_DISPLAY(_p) IS_CLASS1 (_p, PCI_CLASS_DISPLAY) +/** + Macro that checks whether device is a VGA-compatible controller. + + @param _p Specified device. + + @retval TRUE Device is a VGA-compatible controller. + @retval FALSE Device is not a VGA-compatible controller. + +**/ +#define IS_PCI_VGA(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_VGA) +/** + Macro that checks whether device is an 8514-compatible controller. + + @param _p Specified device. + + @retval TRUE Device is an 8514-compatible controller. + @retval FALSE Device is not an 8514-compatible controller. + +**/ +#define IS_PCI_8514(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_8514) +/** + Macro that checks whether device is built before the Class Code field was defined. + + @param _p Specified device. + + @retval TRUE Device is an old device. + @retval FALSE Device is not an old device. + +**/ +#define IS_PCI_OLD(_p) IS_CLASS1 (_p, PCI_CLASS_OLD) +/** + Macro that checks whether device is a VGA-compatible device built before the Class Code field was defined. + + @param _p Specified device. + + @retval TRUE Device is an old VGA-compatible device. + @retval FALSE Device is not an old VGA-compatible device. + +**/ +#define IS_PCI_OLD_VGA(_p) IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA) +/** + Macro that checks whether device is an IDE controller. + + @param _p Specified device. + + @retval TRUE Device is an IDE controller. + @retval FALSE Device is not an IDE controller. + +**/ +#define IS_PCI_IDE(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE) +/** + Macro that checks whether device is a SCSI bus controller. + + @param _p Specified device. + + @retval TRUE Device is a SCSI bus controller. + @retval FALSE Device is not a SCSI bus controller. + +**/ +#define IS_PCI_SCSI(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI) +/** + Macro that checks whether device is a RAID controller. + + @param _p Specified device. + + @retval TRUE Device is a RAID controller. + @retval FALSE Device is not a RAID controller. + +**/ +#define IS_PCI_RAID(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID) +/** + Macro that checks whether device is an ISA bridge. + + @param _p Specified device. + + @retval TRUE Device is an ISA bridge. + @retval FALSE Device is not an ISA bridge. + +**/ +#define IS_PCI_LPC(_p) IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA) +/** + Macro that checks whether device is a PCI-to-PCI bridge. + + @param _p Specified device. + + @retval TRUE Device is a PCI-to-PCI bridge. + @retval FALSE Device is not a PCI-to-PCI bridge. + +**/ +#define IS_PCI_P2P(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P) +/** + Macro that checks whether device is a Subtractive Decode PCI-to-PCI bridge. + + @param _p Specified device. + + @retval TRUE Device is a Subtractive Decode PCI-to-PCI bridge. + @retval FALSE Device is not a Subtractive Decode PCI-to-PCI bridge. + +**/ +#define IS_PCI_P2P_SUB(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P_SUBTRACTIVE) +/** + Macro that checks whether device is a 16550-compatible serial controller. + + @param _p Specified device. + + @retval TRUE Device is a 16550-compatible serial controller. + @retval FALSE Device is not a 16550-compatible serial controller. + +**/ +#define IS_PCI_16550_SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550) +/** + Macro that checks whether device is a Universal Serial Bus controller. + + @param _p Specified device. + + @retval TRUE Device is a Universal Serial Bus controller. + @retval FALSE Device is not a Universal Serial Bus controller. + +**/ +#define IS_PCI_USB(_p) IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB) + +// +// the definition of Header Type +// +#define HEADER_TYPE_DEVICE 0x00 +#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01 +#define HEADER_TYPE_CARDBUS_BRIDGE 0x02 +#define HEADER_TYPE_MULTI_FUNCTION 0x80 +// +// Mask of Header type +// +#define HEADER_LAYOUT_CODE 0x7f +/** + Macro that checks whether device is a PCI-PCI bridge. + + @param _p Specified device. + + @retval TRUE Device is a PCI-PCI bridge. + @retval FALSE Device is not a PCI-PCI bridge. + +**/ +#define IS_PCI_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE)) +/** + Macro that checks whether device is a CardBus bridge. + + @param _p Specified device. + + @retval TRUE Device is a CardBus bridge. + @retval FALSE Device is not a CardBus bridge. + +**/ +#define IS_CARDBUS_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE)) +/** + Macro that checks whether device is a multiple functions device. + + @param _p Specified device. + + @retval TRUE Device is a multiple functions device. + @retval FALSE Device is not a multiple functions device. + +**/ +#define IS_PCI_MULTI_FUNC(_p) ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION) + +/// +/// Rom Base Address in Bridge, defined in PCI-to-PCI Bridge Architecure Specification, +/// +#define PCI_BRIDGE_ROMBAR 0x38 + +#define PCI_MAX_BAR 0x0006 +#define PCI_MAX_CONFIG_OFFSET 0x0100 + +#define PCI_VENDOR_ID_OFFSET 0x00 +#define PCI_DEVICE_ID_OFFSET 0x02 +#define PCI_COMMAND_OFFSET 0x04 +#define PCI_PRIMARY_STATUS_OFFSET 0x06 +#define PCI_REVISION_ID_OFFSET 0x08 +#define PCI_CLASSCODE_OFFSET 0x09 +#define PCI_CACHELINE_SIZE_OFFSET 0x0C +#define PCI_LATENCY_TIMER_OFFSET 0x0D +#define PCI_HEADER_TYPE_OFFSET 0x0E +#define PCI_BIST_OFFSET 0x0F +#define PCI_BASE_ADDRESSREG_OFFSET 0x10 +#define PCI_CARDBUS_CIS_OFFSET 0x28 +#define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id +#define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C +#define PCI_SID_OFFSET 0x2E ///< SubSystem ID +#define PCI_SUBSYSTEM_ID_OFFSET 0x2E +#define PCI_EXPANSION_ROM_BASE 0x30 +#define PCI_CAPBILITY_POINTER_OFFSET 0x34 +#define PCI_INT_LINE_OFFSET 0x3C ///< Interrupt Line Register +#define PCI_INT_PIN_OFFSET 0x3D ///< Interrupt Pin Register +#define PCI_MAXGNT_OFFSET 0x3E ///< Max Grant Register +#define PCI_MAXLAT_OFFSET 0x3F ///< Max Latency Register + +// +// defined in PCI-to-PCI Bridge Architecture Specification +// +#define PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET 0x18 +#define PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET 0x19 +#define PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET 0x1a +#define PCI_BRIDGE_STATUS_REGISTER_OFFSET 0x1E +#define PCI_BRIDGE_CONTROL_REGISTER_OFFSET 0x3E + +/// +/// Interrupt Line "Unknown" or "No connection" value defined for x86 based system +/// +#define PCI_INT_LINE_UNKNOWN 0xFF + +/// +/// PCI Access Data Format +/// +typedef union { + struct { + UINT32 Reg : 8; + UINT32 Func : 3; + UINT32 Dev : 5; + UINT32 Bus : 8; + UINT32 Reserved : 7; + UINT32 Enable : 1; + } Bits; + UINT32 Uint32; +} PCI_CONFIG_ACCESS_CF8; + +#pragma pack() + +#define EFI_PCI_COMMAND_IO_SPACE BIT0 ///< 0x0001 +#define EFI_PCI_COMMAND_MEMORY_SPACE BIT1 ///< 0x0002 +#define EFI_PCI_COMMAND_BUS_MASTER BIT2 ///< 0x0004 +#define EFI_PCI_COMMAND_SPECIAL_CYCLE BIT3 ///< 0x0008 +#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010 +#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020 +#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND BIT6 ///< 0x0040 +#define EFI_PCI_COMMAND_STEPPING_CONTROL BIT7 ///< 0x0080 +#define EFI_PCI_COMMAND_SERR BIT8 ///< 0x0100 +#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK BIT9 ///< 0x0200 + +// +// defined in PCI-to-PCI Bridge Architecture Specification +// +#define EFI_PCI_BRIDGE_CONTROL_PARITY_ERROR_RESPONSE BIT0 ///< 0x0001 +#define EFI_PCI_BRIDGE_CONTROL_SERR BIT1 ///< 0x0002 +#define EFI_PCI_BRIDGE_CONTROL_ISA BIT2 ///< 0x0004 +#define EFI_PCI_BRIDGE_CONTROL_VGA BIT3 ///< 0x0008 +#define EFI_PCI_BRIDGE_CONTROL_VGA_16 BIT4 ///< 0x0010 +#define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT BIT5 ///< 0x0020 +#define EFI_PCI_BRIDGE_CONTROL_RESET_SECONDARY_BUS BIT6 ///< 0x0040 +#define EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK BIT7 ///< 0x0080 +#define EFI_PCI_BRIDGE_CONTROL_PRIMARY_DISCARD_TIMER BIT8 ///< 0x0100 +#define EFI_PCI_BRIDGE_CONTROL_SECONDARY_DISCARD_TIMER BIT9 ///< 0x0200 +#define EFI_PCI_BRIDGE_CONTROL_TIMER_STATUS BIT10 ///< 0x0400 +#define EFI_PCI_BRIDGE_CONTROL_DISCARD_TIMER_SERR BIT11 ///< 0x0800 + +// +// Following are the PCI-CARDBUS bridge control bit, defined in PC Card Standard +// +#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE BIT7 ///< 0x0080 +#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE BIT8 ///< 0x0100 +#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE BIT9 ///< 0x0200 +#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE BIT10 ///< 0x0400 + +// +// Following are the PCI status control bit +// +#define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010 +#define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020 +#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE BIT7 ///< 0x0080 +#define EFI_PCI_MASTER_DATA_PARITY_ERROR BIT8 ///< 0x0100 + +/// +/// defined in PC Card Standard +/// +#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14 + +#pragma pack(1) +// +// PCI Capability List IDs and records +// +#define EFI_PCI_CAPABILITY_ID_PMI 0x01 +#define EFI_PCI_CAPABILITY_ID_AGP 0x02 +#define EFI_PCI_CAPABILITY_ID_VPD 0x03 +#define EFI_PCI_CAPABILITY_ID_SLOTID 0x04 +#define EFI_PCI_CAPABILITY_ID_MSI 0x05 +#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06 + +/// +/// Capabilities List Header +/// Section 6.7, PCI Local Bus Specification, 2.2 +/// +typedef struct { + UINT8 CapabilityID; + UINT8 NextItemPtr; +} EFI_PCI_CAPABILITY_HDR; + +/// +/// Power Management Register Block Definition +/// Section 3.2, PCI Power Management Interface Specifiction, Revision 1.2 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + UINT16 PMC; + UINT16 PMCSR; + UINT8 BridgeExtention; + UINT8 Data; +} EFI_PCI_CAPABILITY_PMI; + +/// +/// PMC - Power Management Capabilities +/// Section 3.2.3, PCI Power Management Interface Specifiction, Revision 1.2 +/// +typedef union { + struct { + UINT16 Version : 3; + UINT16 PmeClock : 1; + UINT16 : 1; + UINT16 DeviceSpecificInitialization : 1; + UINT16 AuxCurrent : 3; + UINT16 D1Support : 1; + UINT16 D2Support : 1; + UINT16 PmeSupport : 5; + } Bits; + UINT16 Data; +} EFI_PCI_PMC; + +#define EFI_PCI_PMC_D3_COLD_MASK (BIT15) + +/// +/// PMCSR - Power Management Control/Status +/// Section 3.2.4, PCI Power Management Interface Specifiction, Revision 1.2 +/// +typedef union { + struct { + UINT16 PowerState : 2; + UINT16 : 6; + UINT16 PmeEnable : 1; + UINT16 DataSelect : 4; + UINT16 DataScale : 2; + UINT16 PmeStatus : 1; + } Bits; + UINT16 Data; +} EFI_PCI_PMCSR; + +/// +/// A.G.P Capability +/// Section 6.1.4, Accelerated Graphics Port Interface Specification, Revision 1.0 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + UINT8 Rev; + UINT8 Reserved; + UINT32 Status; + UINT32 Command; +} EFI_PCI_CAPABILITY_AGP; + +/// +/// VPD Capability Structure +/// Appendix I, PCI Local Bus Specification, 2.2 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + UINT16 AddrReg; + UINT32 DataReg; +} EFI_PCI_CAPABILITY_VPD; + +/// +/// Slot Numbering Capabilities Register +/// Section 3.2.6, PCI-to-PCI Bridge Architeture Specification, Revision 1.2 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + UINT8 ExpnsSlotReg; + UINT8 ChassisNo; +} EFI_PCI_CAPABILITY_SLOTID; + +/// +/// Message Capability Structure for 32-bit Message Address +/// Section 6.8.1, PCI Local Bus Specification, 2.2 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + UINT16 MsgCtrlReg; + UINT32 MsgAddrReg; + UINT16 MsgDataReg; +} EFI_PCI_CAPABILITY_MSI32; + +/// +/// Message Capability Structure for 64-bit Message Address +/// Section 6.8.1, PCI Local Bus Specification, 2.2 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + UINT16 MsgCtrlReg; + UINT32 MsgAddrRegLsdw; + UINT32 MsgAddrRegMsdw; + UINT16 MsgDataReg; +} EFI_PCI_CAPABILITY_MSI64; + +/// +/// Capability EFI_PCI_CAPABILITY_ID_HOTPLUG, +/// CompactPCI Hot Swap Specification PICMG 2.1, R1.0 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + /// + /// not finished - fields need to go here + /// +} EFI_PCI_CAPABILITY_HOTPLUG; + +#define DEVICE_ID_NOCARE 0xFFFF + +#define PCI_ACPI_UNUSED 0 +#define PCI_BAR_NOCHANGE 0 +#define PCI_BAR_OLD_ALIGN 0xFFFFFFFFFFFFFFFFULL +#define PCI_BAR_EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL +#define PCI_BAR_SQUAD_ALIGN 0xFFFFFFFFFFFFFFFDULL +#define PCI_BAR_DQUAD_ALIGN 0xFFFFFFFFFFFFFFFCULL + +#define PCI_BAR_IDX0 0x00 +#define PCI_BAR_IDX1 0x01 +#define PCI_BAR_IDX2 0x02 +#define PCI_BAR_IDX3 0x03 +#define PCI_BAR_IDX4 0x04 +#define PCI_BAR_IDX5 0x05 +#define PCI_BAR_ALL 0xFF + +/// +/// EFI PCI Option ROM definitions +/// +#define EFI_ROOT_BRIDGE_LIST 'eprb' +#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE 0x0EF1 ///< defined in UEFI Spec. + +#define PCI_EXPANSION_ROM_HEADER_SIGNATURE 0xaa55 +#define PCI_DATA_STRUCTURE_SIGNATURE SIGNATURE_32 ('P', 'C', 'I', 'R') +#define PCI_CODE_TYPE_PCAT_IMAGE 0x00 +#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED 0x0001 ///< defined in UEFI spec. + +/// +/// Standard PCI Expansion ROM Header +/// Section 13.4.2, Unified Extensible Firmware Interface Specification, Version 2.1 +/// +typedef struct { + UINT16 Signature; ///< 0xaa55 + UINT8 Reserved[0x16]; + UINT16 PcirOffset; +} PCI_EXPANSION_ROM_HEADER; + +/// +/// Legacy ROM Header Extensions +/// Section 6.3.3.1, PCI Local Bus Specification, 2.2 +/// +typedef struct { + UINT16 Signature; ///< 0xaa55 + UINT8 Size512; + UINT8 InitEntryPoint[3]; + UINT8 Reserved[0x12]; + UINT16 PcirOffset; +} EFI_LEGACY_EXPANSION_ROM_HEADER; + +/// +/// PCI Data Structure Format +/// Section 6.3.1.2, PCI Local Bus Specification, 2.2 +/// +typedef struct { + UINT32 Signature; ///< "PCIR" + UINT16 VendorId; + UINT16 DeviceId; + UINT16 Reserved0; + UINT16 Length; + UINT8 Revision; + UINT8 ClassCode[3]; + UINT16 ImageLength; + UINT16 CodeRevision; + UINT8 CodeType; + UINT8 Indicator; + UINT16 Reserved1; +} PCI_DATA_STRUCTURE; + +/// +/// EFI PCI Expansion ROM Header +/// Section 13.4.2, Unified Extensible Firmware Interface Specification, Version 2.1 +/// +typedef struct { + UINT16 Signature; ///< 0xaa55 + UINT16 InitializationSize; + UINT32 EfiSignature; ///< 0x0EF1 + UINT16 EfiSubsystem; + UINT16 EfiMachineType; + UINT16 CompressionType; + UINT8 Reserved[8]; + UINT16 EfiImageHeaderOffset; + UINT16 PcirOffset; +} EFI_PCI_EXPANSION_ROM_HEADER; + +typedef union { + UINT8 *Raw; + PCI_EXPANSION_ROM_HEADER *Generic; + EFI_PCI_EXPANSION_ROM_HEADER *Efi; + EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt; +} EFI_PCI_ROM_HEADER; + +#pragma pack() + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/PeImage.h b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/PeImage.h new file mode 100644 index 000000000..9499bb7f5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/PeImage.h @@ -0,0 +1,758 @@ +/** @file + EFI image format for PE32, PE32+ and TE. Please note some data structures are + different for PE32 and PE32+. EFI_IMAGE_NT_HEADERS32 is for PE32 and + EFI_IMAGE_NT_HEADERS64 is for PE32+. + + This file is coded to the Visual Studio, Microsoft Portable Executable and + Common Object File Format Specification, Revision 8.3 - February 6, 2013. + This file also includes some definitions in PI Specification, Revision 1.0. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PE_IMAGE_H__ +#define __PE_IMAGE_H__ + +FILE_LICENCE ( BSD3 ); + +// +// PE32+ Subsystem type for EFI images +// +#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION 10 +#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11 +#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12 +#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13 ///< defined PI Specification, 1.0 + + +// +// PE32+ Machine type for EFI images +// +#define IMAGE_FILE_MACHINE_I386 0x014c +#define IMAGE_FILE_MACHINE_IA64 0x0200 +#define IMAGE_FILE_MACHINE_EBC 0x0EBC +#define IMAGE_FILE_MACHINE_X64 0x8664 +#define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2 +#define IMAGE_FILE_MACHINE_ARM64 0xAA64 + +// +// EXE file formats +// +#define EFI_IMAGE_DOS_SIGNATURE SIGNATURE_16('M', 'Z') +#define EFI_IMAGE_OS2_SIGNATURE SIGNATURE_16('N', 'E') +#define EFI_IMAGE_OS2_SIGNATURE_LE SIGNATURE_16('L', 'E') +#define EFI_IMAGE_NT_SIGNATURE SIGNATURE_32('P', 'E', '\0', '\0') + +/// +/// PE images can start with an optional DOS header, so if an image is run +/// under DOS it can print an error message. +/// +typedef struct { + UINT16 e_magic; ///< Magic number. + UINT16 e_cblp; ///< Bytes on last page of file. + UINT16 e_cp; ///< Pages in file. + UINT16 e_crlc; ///< Relocations. + UINT16 e_cparhdr; ///< Size of header in paragraphs. + UINT16 e_minalloc; ///< Minimum extra paragraphs needed. + UINT16 e_maxalloc; ///< Maximum extra paragraphs needed. + UINT16 e_ss; ///< Initial (relative) SS value. + UINT16 e_sp; ///< Initial SP value. + UINT16 e_csum; ///< Checksum. + UINT16 e_ip; ///< Initial IP value. + UINT16 e_cs; ///< Initial (relative) CS value. + UINT16 e_lfarlc; ///< File address of relocation table. + UINT16 e_ovno; ///< Overlay number. + UINT16 e_res[4]; ///< Reserved words. + UINT16 e_oemid; ///< OEM identifier (for e_oeminfo). + UINT16 e_oeminfo; ///< OEM information; e_oemid specific. + UINT16 e_res2[10]; ///< Reserved words. + UINT32 e_lfanew; ///< File address of new exe header. +} EFI_IMAGE_DOS_HEADER; + +/// +/// COFF File Header (Object and Image). +/// +typedef struct { + UINT16 Machine; + UINT16 NumberOfSections; + UINT32 TimeDateStamp; + UINT32 PointerToSymbolTable; + UINT32 NumberOfSymbols; + UINT16 SizeOfOptionalHeader; + UINT16 Characteristics; +} EFI_IMAGE_FILE_HEADER; + +/// +/// Size of EFI_IMAGE_FILE_HEADER. +/// +#define EFI_IMAGE_SIZEOF_FILE_HEADER 20 + +// +// Characteristics +// +#define EFI_IMAGE_FILE_RELOCS_STRIPPED BIT0 ///< 0x0001 Relocation info stripped from file. +#define EFI_IMAGE_FILE_EXECUTABLE_IMAGE BIT1 ///< 0x0002 File is executable (i.e. no unresolved externel references). +#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED BIT2 ///< 0x0004 Line nunbers stripped from file. +#define EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED BIT3 ///< 0x0008 Local symbols stripped from file. +#define EFI_IMAGE_FILE_BYTES_REVERSED_LO BIT7 ///< 0x0080 Bytes of machine word are reversed. +#define EFI_IMAGE_FILE_32BIT_MACHINE BIT8 ///< 0x0100 32 bit word machine. +#define EFI_IMAGE_FILE_DEBUG_STRIPPED BIT9 ///< 0x0200 Debugging info stripped from file in .DBG file. +#define EFI_IMAGE_FILE_SYSTEM BIT12 ///< 0x1000 System File. +#define EFI_IMAGE_FILE_DLL BIT13 ///< 0x2000 File is a DLL. +#define EFI_IMAGE_FILE_BYTES_REVERSED_HI BIT15 ///< 0x8000 Bytes of machine word are reversed. + +/// +/// Header Data Directories. +/// +typedef struct { + UINT32 VirtualAddress; + UINT32 Size; +} EFI_IMAGE_DATA_DIRECTORY; + +// +// Directory Entries +// +#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT 0 +#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT 1 +#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE 2 +#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION 3 +#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY 4 +#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC 5 +#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6 +#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7 +#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8 +#define EFI_IMAGE_DIRECTORY_ENTRY_TLS 9 +#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10 + +#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16 + +/// +/// @attention +/// EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC means PE32 and +/// EFI_IMAGE_OPTIONAL_HEADER32 must be used. The data structures only vary +/// after NT additional fields. +/// +#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b + +/// +/// Optional Header Standard Fields for PE32. +/// +typedef struct { + /// + /// Standard fields. + /// + UINT16 Magic; + UINT8 MajorLinkerVersion; + UINT8 MinorLinkerVersion; + UINT32 SizeOfCode; + UINT32 SizeOfInitializedData; + UINT32 SizeOfUninitializedData; + UINT32 AddressOfEntryPoint; + UINT32 BaseOfCode; + UINT32 BaseOfData; ///< PE32 contains this additional field, which is absent in PE32+. + /// + /// Optional Header Windows-Specific Fields. + /// + UINT32 ImageBase; + UINT32 SectionAlignment; + UINT32 FileAlignment; + UINT16 MajorOperatingSystemVersion; + UINT16 MinorOperatingSystemVersion; + UINT16 MajorImageVersion; + UINT16 MinorImageVersion; + UINT16 MajorSubsystemVersion; + UINT16 MinorSubsystemVersion; + UINT32 Win32VersionValue; + UINT32 SizeOfImage; + UINT32 SizeOfHeaders; + UINT32 CheckSum; + UINT16 Subsystem; + UINT16 DllCharacteristics; + UINT32 SizeOfStackReserve; + UINT32 SizeOfStackCommit; + UINT32 SizeOfHeapReserve; + UINT32 SizeOfHeapCommit; + UINT32 LoaderFlags; + UINT32 NumberOfRvaAndSizes; + EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES]; +} EFI_IMAGE_OPTIONAL_HEADER32; + +/// +/// @attention +/// EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC means PE32+ and +/// EFI_IMAGE_OPTIONAL_HEADER64 must be used. The data structures only vary +/// after NT additional fields. +/// +#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b + +/// +/// Optional Header Standard Fields for PE32+. +/// +typedef struct { + /// + /// Standard fields. + /// + UINT16 Magic; + UINT8 MajorLinkerVersion; + UINT8 MinorLinkerVersion; + UINT32 SizeOfCode; + UINT32 SizeOfInitializedData; + UINT32 SizeOfUninitializedData; + UINT32 AddressOfEntryPoint; + UINT32 BaseOfCode; + /// + /// Optional Header Windows-Specific Fields. + /// + UINT64 ImageBase; + UINT32 SectionAlignment; + UINT32 FileAlignment; + UINT16 MajorOperatingSystemVersion; + UINT16 MinorOperatingSystemVersion; + UINT16 MajorImageVersion; + UINT16 MinorImageVersion; + UINT16 MajorSubsystemVersion; + UINT16 MinorSubsystemVersion; + UINT32 Win32VersionValue; + UINT32 SizeOfImage; + UINT32 SizeOfHeaders; + UINT32 CheckSum; + UINT16 Subsystem; + UINT16 DllCharacteristics; + UINT64 SizeOfStackReserve; + UINT64 SizeOfStackCommit; + UINT64 SizeOfHeapReserve; + UINT64 SizeOfHeapCommit; + UINT32 LoaderFlags; + UINT32 NumberOfRvaAndSizes; + EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES]; +} EFI_IMAGE_OPTIONAL_HEADER64; + + +/// +/// @attention +/// EFI_IMAGE_NT_HEADERS32 is for use ONLY by tools. +/// +typedef struct { + UINT32 Signature; + EFI_IMAGE_FILE_HEADER FileHeader; + EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader; +} EFI_IMAGE_NT_HEADERS32; + +#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32) + +/// +/// @attention +/// EFI_IMAGE_HEADERS64 is for use ONLY by tools. +/// +typedef struct { + UINT32 Signature; + EFI_IMAGE_FILE_HEADER FileHeader; + EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader; +} EFI_IMAGE_NT_HEADERS64; + +#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64) + +// +// Other Windows Subsystem Values +// +#define EFI_IMAGE_SUBSYSTEM_UNKNOWN 0 +#define EFI_IMAGE_SUBSYSTEM_NATIVE 1 +#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2 +#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3 +#define EFI_IMAGE_SUBSYSTEM_OS2_CUI 5 +#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI 7 + +/// +/// Length of ShortName. +/// +#define EFI_IMAGE_SIZEOF_SHORT_NAME 8 + +/// +/// Section Table. This table immediately follows the optional header. +/// +typedef struct { + UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME]; + union { + UINT32 PhysicalAddress; + UINT32 VirtualSize; + } Misc; + UINT32 VirtualAddress; + UINT32 SizeOfRawData; + UINT32 PointerToRawData; + UINT32 PointerToRelocations; + UINT32 PointerToLinenumbers; + UINT16 NumberOfRelocations; + UINT16 NumberOfLinenumbers; + UINT32 Characteristics; +} EFI_IMAGE_SECTION_HEADER; + +/// +/// Size of EFI_IMAGE_SECTION_HEADER. +/// +#define EFI_IMAGE_SIZEOF_SECTION_HEADER 40 + +// +// Section Flags Values +// +#define EFI_IMAGE_SCN_TYPE_NO_PAD BIT3 ///< 0x00000008 ///< Reserved. +#define EFI_IMAGE_SCN_CNT_CODE BIT5 ///< 0x00000020 +#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA BIT6 ///< 0x00000040 +#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA BIT7 ///< 0x00000080 + +#define EFI_IMAGE_SCN_LNK_OTHER BIT8 ///< 0x00000100 ///< Reserved. +#define EFI_IMAGE_SCN_LNK_INFO BIT9 ///< 0x00000200 ///< Section contains comments or some other type of information. +#define EFI_IMAGE_SCN_LNK_REMOVE BIT11 ///< 0x00000800 ///< Section contents will not become part of image. +#define EFI_IMAGE_SCN_LNK_COMDAT BIT12 ///< 0x00001000 + +#define EFI_IMAGE_SCN_ALIGN_1BYTES BIT20 ///< 0x00100000 +#define EFI_IMAGE_SCN_ALIGN_2BYTES BIT21 ///< 0x00200000 +#define EFI_IMAGE_SCN_ALIGN_4BYTES (BIT20|BIT21) ///< 0x00300000 +#define EFI_IMAGE_SCN_ALIGN_8BYTES BIT22 ///< 0x00400000 +#define EFI_IMAGE_SCN_ALIGN_16BYTES (BIT20|BIT22) ///< 0x00500000 +#define EFI_IMAGE_SCN_ALIGN_32BYTES (BIT21|BIT22) ///< 0x00600000 +#define EFI_IMAGE_SCN_ALIGN_64BYTES (BIT20|BIT21|BIT22) ///< 0x00700000 + +#define EFI_IMAGE_SCN_MEM_DISCARDABLE BIT25 ///< 0x02000000 +#define EFI_IMAGE_SCN_MEM_NOT_CACHED BIT26 ///< 0x04000000 +#define EFI_IMAGE_SCN_MEM_NOT_PAGED BIT27 ///< 0x08000000 +#define EFI_IMAGE_SCN_MEM_SHARED BIT28 ///< 0x10000000 +#define EFI_IMAGE_SCN_MEM_EXECUTE BIT29 ///< 0x20000000 +#define EFI_IMAGE_SCN_MEM_READ BIT30 ///< 0x40000000 +#define EFI_IMAGE_SCN_MEM_WRITE BIT31 ///< 0x80000000 + +/// +/// Size of a Symbol Table Record. +/// +#define EFI_IMAGE_SIZEOF_SYMBOL 18 + +// +// Symbols have a section number of the section in which they are +// defined. Otherwise, section numbers have the following meanings: +// +#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0 ///< Symbol is undefined or is common. +#define EFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 ///< Symbol is an absolute value. +#define EFI_IMAGE_SYM_DEBUG (UINT16) -2 ///< Symbol is a special debug item. + +// +// Symbol Type (fundamental) values. +// +#define EFI_IMAGE_SYM_TYPE_NULL 0 ///< no type. +#define EFI_IMAGE_SYM_TYPE_VOID 1 ///< no valid type. +#define EFI_IMAGE_SYM_TYPE_CHAR 2 ///< type character. +#define EFI_IMAGE_SYM_TYPE_SHORT 3 ///< type short integer. +#define EFI_IMAGE_SYM_TYPE_INT 4 +#define EFI_IMAGE_SYM_TYPE_LONG 5 +#define EFI_IMAGE_SYM_TYPE_FLOAT 6 +#define EFI_IMAGE_SYM_TYPE_DOUBLE 7 +#define EFI_IMAGE_SYM_TYPE_STRUCT 8 +#define EFI_IMAGE_SYM_TYPE_UNION 9 +#define EFI_IMAGE_SYM_TYPE_ENUM 10 ///< enumeration. +#define EFI_IMAGE_SYM_TYPE_MOE 11 ///< member of enumeration. +#define EFI_IMAGE_SYM_TYPE_BYTE 12 +#define EFI_IMAGE_SYM_TYPE_WORD 13 +#define EFI_IMAGE_SYM_TYPE_UINT 14 +#define EFI_IMAGE_SYM_TYPE_DWORD 15 + +// +// Symbol Type (derived) values. +// +#define EFI_IMAGE_SYM_DTYPE_NULL 0 ///< no derived type. +#define EFI_IMAGE_SYM_DTYPE_POINTER 1 +#define EFI_IMAGE_SYM_DTYPE_FUNCTION 2 +#define EFI_IMAGE_SYM_DTYPE_ARRAY 3 + +// +// Storage classes. +// +#define EFI_IMAGE_SYM_CLASS_END_OF_FUNCTION ((UINT8) -1) +#define EFI_IMAGE_SYM_CLASS_NULL 0 +#define EFI_IMAGE_SYM_CLASS_AUTOMATIC 1 +#define EFI_IMAGE_SYM_CLASS_EXTERNAL 2 +#define EFI_IMAGE_SYM_CLASS_STATIC 3 +#define EFI_IMAGE_SYM_CLASS_REGISTER 4 +#define EFI_IMAGE_SYM_CLASS_EXTERNAL_DEF 5 +#define EFI_IMAGE_SYM_CLASS_LABEL 6 +#define EFI_IMAGE_SYM_CLASS_UNDEFINED_LABEL 7 +#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_STRUCT 8 +#define EFI_IMAGE_SYM_CLASS_ARGUMENT 9 +#define EFI_IMAGE_SYM_CLASS_STRUCT_TAG 10 +#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_UNION 11 +#define EFI_IMAGE_SYM_CLASS_UNION_TAG 12 +#define EFI_IMAGE_SYM_CLASS_TYPE_DEFINITION 13 +#define EFI_IMAGE_SYM_CLASS_UNDEFINED_STATIC 14 +#define EFI_IMAGE_SYM_CLASS_ENUM_TAG 15 +#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_ENUM 16 +#define EFI_IMAGE_SYM_CLASS_REGISTER_PARAM 17 +#define EFI_IMAGE_SYM_CLASS_BIT_FIELD 18 +#define EFI_IMAGE_SYM_CLASS_BLOCK 100 +#define EFI_IMAGE_SYM_CLASS_FUNCTION 101 +#define EFI_IMAGE_SYM_CLASS_END_OF_STRUCT 102 +#define EFI_IMAGE_SYM_CLASS_FILE 103 +#define EFI_IMAGE_SYM_CLASS_SECTION 104 +#define EFI_IMAGE_SYM_CLASS_WEAK_EXTERNAL 105 + +// +// type packing constants +// +#define EFI_IMAGE_N_BTMASK 017 +#define EFI_IMAGE_N_TMASK 060 +#define EFI_IMAGE_N_TMASK1 0300 +#define EFI_IMAGE_N_TMASK2 0360 +#define EFI_IMAGE_N_BTSHFT 4 +#define EFI_IMAGE_N_TSHIFT 2 + +// +// Communal selection types. +// +#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES 1 +#define EFI_IMAGE_COMDAT_SELECT_ANY 2 +#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE 3 +#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH 4 +#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE 5 + +// +// the following values only be referred in PeCoff, not defined in PECOFF. +// +#define EFI_IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY 1 +#define EFI_IMAGE_WEAK_EXTERN_SEARCH_LIBRARY 2 +#define EFI_IMAGE_WEAK_EXTERN_SEARCH_ALIAS 3 + +/// +/// Relocation format. +/// +typedef struct { + UINT32 VirtualAddress; + UINT32 SymbolTableIndex; + UINT16 Type; +} EFI_IMAGE_RELOCATION; + +/// +/// Size of EFI_IMAGE_RELOCATION +/// +#define EFI_IMAGE_SIZEOF_RELOCATION 10 + +// +// I386 relocation types. +// +#define EFI_IMAGE_REL_I386_ABSOLUTE 0x0000 ///< Reference is absolute, no relocation is necessary. +#define EFI_IMAGE_REL_I386_DIR16 0x0001 ///< Direct 16-bit reference to the symbols virtual address. +#define EFI_IMAGE_REL_I386_REL16 0x0002 ///< PC-relative 16-bit reference to the symbols virtual address. +#define EFI_IMAGE_REL_I386_DIR32 0x0006 ///< Direct 32-bit reference to the symbols virtual address. +#define EFI_IMAGE_REL_I386_DIR32NB 0x0007 ///< Direct 32-bit reference to the symbols virtual address, base not included. +#define EFI_IMAGE_REL_I386_SEG12 0x0009 ///< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address. +#define EFI_IMAGE_REL_I386_SECTION 0x000A +#define EFI_IMAGE_REL_I386_SECREL 0x000B +#define EFI_IMAGE_REL_I386_REL32 0x0014 ///< PC-relative 32-bit reference to the symbols virtual address. + +// +// x64 processor relocation types. +// +#define IMAGE_REL_AMD64_ABSOLUTE 0x0000 +#define IMAGE_REL_AMD64_ADDR64 0x0001 +#define IMAGE_REL_AMD64_ADDR32 0x0002 +#define IMAGE_REL_AMD64_ADDR32NB 0x0003 +#define IMAGE_REL_AMD64_REL32 0x0004 +#define IMAGE_REL_AMD64_REL32_1 0x0005 +#define IMAGE_REL_AMD64_REL32_2 0x0006 +#define IMAGE_REL_AMD64_REL32_3 0x0007 +#define IMAGE_REL_AMD64_REL32_4 0x0008 +#define IMAGE_REL_AMD64_REL32_5 0x0009 +#define IMAGE_REL_AMD64_SECTION 0x000A +#define IMAGE_REL_AMD64_SECREL 0x000B +#define IMAGE_REL_AMD64_SECREL7 0x000C +#define IMAGE_REL_AMD64_TOKEN 0x000D +#define IMAGE_REL_AMD64_SREL32 0x000E +#define IMAGE_REL_AMD64_PAIR 0x000F +#define IMAGE_REL_AMD64_SSPAN32 0x0010 + +/// +/// Based relocation format. +/// +typedef struct { + UINT32 VirtualAddress; + UINT32 SizeOfBlock; +} EFI_IMAGE_BASE_RELOCATION; + +/// +/// Size of EFI_IMAGE_BASE_RELOCATION. +/// +#define EFI_IMAGE_SIZEOF_BASE_RELOCATION 8 + +// +// Based relocation types. +// +#define EFI_IMAGE_REL_BASED_ABSOLUTE 0 +#define EFI_IMAGE_REL_BASED_HIGH 1 +#define EFI_IMAGE_REL_BASED_LOW 2 +#define EFI_IMAGE_REL_BASED_HIGHLOW 3 +#define EFI_IMAGE_REL_BASED_HIGHADJ 4 +#define EFI_IMAGE_REL_BASED_MIPS_JMPADDR 5 +#define EFI_IMAGE_REL_BASED_ARM_MOV32A 5 +#define EFI_IMAGE_REL_BASED_ARM_MOV32T 7 +#define EFI_IMAGE_REL_BASED_IA64_IMM64 9 +#define EFI_IMAGE_REL_BASED_MIPS_JMPADDR16 9 +#define EFI_IMAGE_REL_BASED_DIR64 10 + +/// +/// Line number format. +/// +typedef struct { + union { + UINT32 SymbolTableIndex; ///< Symbol table index of function name if Linenumber is 0. + UINT32 VirtualAddress; ///< Virtual address of line number. + } Type; + UINT16 Linenumber; ///< Line number. +} EFI_IMAGE_LINENUMBER; + +/// +/// Size of EFI_IMAGE_LINENUMBER. +/// +#define EFI_IMAGE_SIZEOF_LINENUMBER 6 + +// +// Archive format. +// +#define EFI_IMAGE_ARCHIVE_START_SIZE 8 +#define EFI_IMAGE_ARCHIVE_START "!<arch>\n" +#define EFI_IMAGE_ARCHIVE_END "`\n" +#define EFI_IMAGE_ARCHIVE_PAD "\n" +#define EFI_IMAGE_ARCHIVE_LINKER_MEMBER "/ " +#define EFI_IMAGE_ARCHIVE_LONGNAMES_MEMBER "// " + +/// +/// Archive Member Headers +/// +typedef struct { + UINT8 Name[16]; ///< File member name - `/' terminated. + UINT8 Date[12]; ///< File member date - decimal. + UINT8 UserID[6]; ///< File member user id - decimal. + UINT8 GroupID[6]; ///< File member group id - decimal. + UINT8 Mode[8]; ///< File member mode - octal. + UINT8 Size[10]; ///< File member size - decimal. + UINT8 EndHeader[2]; ///< String to end header. (0x60 0x0A). +} EFI_IMAGE_ARCHIVE_MEMBER_HEADER; + +/// +/// Size of EFI_IMAGE_ARCHIVE_MEMBER_HEADER. +/// +#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60 + + +// +// DLL Support +// + +/// +/// Export Directory Table. +/// +typedef struct { + UINT32 Characteristics; + UINT32 TimeDateStamp; + UINT16 MajorVersion; + UINT16 MinorVersion; + UINT32 Name; + UINT32 Base; + UINT32 NumberOfFunctions; + UINT32 NumberOfNames; + UINT32 AddressOfFunctions; + UINT32 AddressOfNames; + UINT32 AddressOfNameOrdinals; +} EFI_IMAGE_EXPORT_DIRECTORY; + +/// +/// Hint/Name Table. +/// +typedef struct { + UINT16 Hint; + UINT8 Name[1]; +} EFI_IMAGE_IMPORT_BY_NAME; + +/// +/// Import Address Table RVA (Thunk Table). +/// +typedef struct { + union { + UINT32 Function; + UINT32 Ordinal; + EFI_IMAGE_IMPORT_BY_NAME *AddressOfData; + } u1; +} EFI_IMAGE_THUNK_DATA; + +#define EFI_IMAGE_ORDINAL_FLAG BIT31 ///< Flag for PE32. +#define EFI_IMAGE_SNAP_BY_ORDINAL(Ordinal) ((Ordinal & EFI_IMAGE_ORDINAL_FLAG) != 0) +#define EFI_IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff) + +/// +/// Import Directory Table +/// +typedef struct { + UINT32 Characteristics; + UINT32 TimeDateStamp; + UINT32 ForwarderChain; + UINT32 Name; + EFI_IMAGE_THUNK_DATA *FirstThunk; +} EFI_IMAGE_IMPORT_DESCRIPTOR; + + +/// +/// Debug Directory Format. +/// +typedef struct { + UINT32 Characteristics; + UINT32 TimeDateStamp; + UINT16 MajorVersion; + UINT16 MinorVersion; + UINT32 Type; + UINT32 SizeOfData; + UINT32 RVA; ///< The address of the debug data when loaded, relative to the image base. + UINT32 FileOffset; ///< The file pointer to the debug data. +} EFI_IMAGE_DEBUG_DIRECTORY_ENTRY; + +#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW 2 ///< The Visual C++ debug information. + +/// +/// Debug Data Structure defined in Microsoft C++. +/// +#define CODEVIEW_SIGNATURE_NB10 SIGNATURE_32('N', 'B', '1', '0') +typedef struct { + UINT32 Signature; ///< "NB10" + UINT32 Unknown; + UINT32 Unknown2; + UINT32 Unknown3; + // + // Filename of .PDB goes here + // +} EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY; + +/// +/// Debug Data Structure defined in Microsoft C++. +/// +#define CODEVIEW_SIGNATURE_RSDS SIGNATURE_32('R', 'S', 'D', 'S') +typedef struct { + UINT32 Signature; ///< "RSDS". + UINT32 Unknown; + UINT32 Unknown2; + UINT32 Unknown3; + UINT32 Unknown4; + UINT32 Unknown5; + // + // Filename of .PDB goes here + // +} EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY; + + +/// +/// Debug Data Structure defined by Apple Mach-O to Coff utility. +/// +#define CODEVIEW_SIGNATURE_MTOC SIGNATURE_32('M', 'T', 'O', 'C') +typedef struct { + UINT32 Signature; ///< "MTOC". + GUID MachOUuid; + // + // Filename of .DLL (Mach-O with debug info) goes here + // +} EFI_IMAGE_DEBUG_CODEVIEW_MTOC_ENTRY; + +/// +/// Resource format. +/// +typedef struct { + UINT32 Characteristics; + UINT32 TimeDateStamp; + UINT16 MajorVersion; + UINT16 MinorVersion; + UINT16 NumberOfNamedEntries; + UINT16 NumberOfIdEntries; + // + // Array of EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY entries goes here. + // +} EFI_IMAGE_RESOURCE_DIRECTORY; + +/// +/// Resource directory entry format. +/// +typedef struct { + union { + struct { + UINT32 NameOffset:31; + UINT32 NameIsString:1; + } s; + UINT32 Id; + } u1; + union { + UINT32 OffsetToData; + struct { + UINT32 OffsetToDirectory:31; + UINT32 DataIsDirectory:1; + } s; + } u2; +} EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY; + +/// +/// Resource directory entry for string. +/// +typedef struct { + UINT16 Length; + CHAR16 String[1]; +} EFI_IMAGE_RESOURCE_DIRECTORY_STRING; + +/// +/// Resource directory entry for data array. +/// +typedef struct { + UINT32 OffsetToData; + UINT32 Size; + UINT32 CodePage; + UINT32 Reserved; +} EFI_IMAGE_RESOURCE_DATA_ENTRY; + +/// +/// Header format for TE images, defined in the PI Specification, 1.0. +/// +typedef struct { + UINT16 Signature; ///< The signature for TE format = "VZ". + UINT16 Machine; ///< From the original file header. + UINT8 NumberOfSections; ///< From the original file header. + UINT8 Subsystem; ///< From original optional header. + UINT16 StrippedSize; ///< Number of bytes we removed from the header. + UINT32 AddressOfEntryPoint; ///< Offset to entry point -- from original optional header. + UINT32 BaseOfCode; ///< From original image -- required for ITP debug. + UINT64 ImageBase; ///< From original file header. + EFI_IMAGE_DATA_DIRECTORY DataDirectory[2]; ///< Only base relocation and debug directory. +} EFI_TE_IMAGE_HEADER; + + +#define EFI_TE_IMAGE_HEADER_SIGNATURE SIGNATURE_16('V', 'Z') + +// +// Data directory indexes in our TE image header +// +#define EFI_TE_IMAGE_DIRECTORY_ENTRY_BASERELOC 0 +#define EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG 1 + + +/// +/// Union of PE32, PE32+, and TE headers. +/// +typedef union { + EFI_IMAGE_NT_HEADERS32 Pe32; + EFI_IMAGE_NT_HEADERS64 Pe32Plus; + EFI_TE_IMAGE_HEADER Te; +} EFI_IMAGE_OPTIONAL_HEADER_UNION; + +typedef union { + EFI_IMAGE_NT_HEADERS32 *Pe32; + EFI_IMAGE_NT_HEADERS64 *Pe32Plus; + EFI_TE_IMAGE_HEADER *Te; + EFI_IMAGE_OPTIONAL_HEADER_UNION *Union; +} EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Tpm12.h b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Tpm12.h new file mode 100644 index 000000000..509425cc2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/Tpm12.h @@ -0,0 +1,2175 @@ +/** @file + TPM Specification data structures (TCG TPM Specification Version 1.2 Revision 103) + See http://trustedcomputinggroup.org for latest specification updates + + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + + +#ifndef _TPM12_H_ +#define _TPM12_H_ + +FILE_LICENCE ( BSD3 ); + +/// +/// The start of TPM return codes +/// +#define TPM_BASE 0 + +// +// All structures MUST be packed on a byte boundary. +// + +#pragma pack (1) + +// +// Part 2, section 2.2.3: Helper redefinitions +// +/// +/// Indicates the conditions where it is required that authorization be presented +/// +typedef UINT8 TPM_AUTH_DATA_USAGE; +/// +/// The information as to what the payload is in an encrypted structure +/// +typedef UINT8 TPM_PAYLOAD_TYPE; +/// +/// The version info breakdown +/// +typedef UINT8 TPM_VERSION_BYTE; +/// +/// The state of the dictionary attack mitigation logic +/// +typedef UINT8 TPM_DA_STATE; +/// +/// The request or response authorization type +/// +typedef UINT16 TPM_TAG; +/// +/// The protocol in use +/// +typedef UINT16 TPM_PROTOCOL_ID; +/// +/// Indicates the start state +/// +typedef UINT16 TPM_STARTUP_TYPE; +/// +/// The definition of the encryption scheme +/// +typedef UINT16 TPM_ENC_SCHEME; +/// +/// The definition of the signature scheme +/// +typedef UINT16 TPM_SIG_SCHEME; +/// +/// The definition of the migration scheme +/// +typedef UINT16 TPM_MIGRATE_SCHEME; +/// +/// Sets the state of the physical presence mechanism +/// +typedef UINT16 TPM_PHYSICAL_PRESENCE; +/// +/// Indicates the types of entity that are supported by the TPM +/// +typedef UINT16 TPM_ENTITY_TYPE; +/// +/// Indicates the permitted usage of the key +/// +typedef UINT16 TPM_KEY_USAGE; +/// +/// The type of asymmetric encrypted structure in use by the endorsement key +/// +typedef UINT16 TPM_EK_TYPE; +/// +/// The tag for the structure +/// +typedef UINT16 TPM_STRUCTURE_TAG; +/// +/// The platform specific spec to which the information relates to +/// +typedef UINT16 TPM_PLATFORM_SPECIFIC; +/// +/// The command ordinal +/// +typedef UINT32 TPM_COMMAND_CODE; +/// +/// Identifies a TPM capability area +/// +typedef UINT32 TPM_CAPABILITY_AREA; +/// +/// Indicates information regarding a key +/// +typedef UINT32 TPM_KEY_FLAGS; +/// +/// Indicates the type of algorithm +/// +typedef UINT32 TPM_ALGORITHM_ID; +/// +/// The locality modifier +/// +typedef UINT32 TPM_MODIFIER_INDICATOR; +/// +/// The actual number of a counter +/// +typedef UINT32 TPM_ACTUAL_COUNT; +/// +/// Attributes that define what options are in use for a transport session +/// +typedef UINT32 TPM_TRANSPORT_ATTRIBUTES; +/// +/// Handle to an authorization session +/// +typedef UINT32 TPM_AUTHHANDLE; +/// +/// Index to a DIR register +/// +typedef UINT32 TPM_DIRINDEX; +/// +/// The area where a key is held assigned by the TPM +/// +typedef UINT32 TPM_KEY_HANDLE; +/// +/// Index to a PCR register +/// +typedef UINT32 TPM_PCRINDEX; +/// +/// The return code from a function +/// +typedef UINT32 TPM_RESULT; +/// +/// The types of resources that a TPM may have using internal resources +/// +typedef UINT32 TPM_RESOURCE_TYPE; +/// +/// Allows for controlling of the key when loaded and how to handle TPM_Startup issues +/// +typedef UINT32 TPM_KEY_CONTROL; +/// +/// The index into the NV storage area +/// +typedef UINT32 TPM_NV_INDEX; +/// +/// The family ID. Family IDs are automatically assigned a sequence number by the TPM. +/// A trusted process can set the FamilyID value in an individual row to NULL, which +/// invalidates that row. The family ID resets to NULL on each change of TPM Owner. +/// +typedef UINT32 TPM_FAMILY_ID; +/// +/// IA value used as a label for the most recent verification of this family. Set to zero when not in use. +/// +typedef UINT32 TPM_FAMILY_VERIFICATION; +/// +/// How the TPM handles var +/// +typedef UINT32 TPM_STARTUP_EFFECTS; +/// +/// The mode of a symmetric encryption +/// +typedef UINT32 TPM_SYM_MODE; +/// +/// The family flags +/// +typedef UINT32 TPM_FAMILY_FLAGS; +/// +/// The index value for the delegate NV table +/// +typedef UINT32 TPM_DELEGATE_INDEX; +/// +/// The restrictions placed on delegation of CMK commands +/// +typedef UINT32 TPM_CMK_DELEGATE; +/// +/// The ID value of a monotonic counter +/// +typedef UINT32 TPM_COUNT_ID; +/// +/// A command to execute +/// +typedef UINT32 TPM_REDIT_COMMAND; +/// +/// A transport session handle +/// +typedef UINT32 TPM_TRANSHANDLE; +/// +/// A generic handle could be key, transport etc +/// +typedef UINT32 TPM_HANDLE; +/// +/// What operation is happening +/// +typedef UINT32 TPM_FAMILY_OPERATION; + +// +// Part 2, section 2.2.4: Vendor specific +// The following defines allow for the quick specification of a +// vendor specific item. +// +#define TPM_Vendor_Specific32 ((UINT32) 0x00000400) +#define TPM_Vendor_Specific8 ((UINT8) 0x80) + +// +// Part 2, section 3.1: TPM_STRUCTURE_TAG +// +#define TPM_TAG_CONTEXTBLOB ((TPM_STRUCTURE_TAG) 0x0001) +#define TPM_TAG_CONTEXT_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0002) +#define TPM_TAG_CONTEXTPOINTER ((TPM_STRUCTURE_TAG) 0x0003) +#define TPM_TAG_CONTEXTLIST ((TPM_STRUCTURE_TAG) 0x0004) +#define TPM_TAG_SIGNINFO ((TPM_STRUCTURE_TAG) 0x0005) +#define TPM_TAG_PCR_INFO_LONG ((TPM_STRUCTURE_TAG) 0x0006) +#define TPM_TAG_PERSISTENT_FLAGS ((TPM_STRUCTURE_TAG) 0x0007) +#define TPM_TAG_VOLATILE_FLAGS ((TPM_STRUCTURE_TAG) 0x0008) +#define TPM_TAG_PERSISTENT_DATA ((TPM_STRUCTURE_TAG) 0x0009) +#define TPM_TAG_VOLATILE_DATA ((TPM_STRUCTURE_TAG) 0x000A) +#define TPM_TAG_SV_DATA ((TPM_STRUCTURE_TAG) 0x000B) +#define TPM_TAG_EK_BLOB ((TPM_STRUCTURE_TAG) 0x000C) +#define TPM_TAG_EK_BLOB_AUTH ((TPM_STRUCTURE_TAG) 0x000D) +#define TPM_TAG_COUNTER_VALUE ((TPM_STRUCTURE_TAG) 0x000E) +#define TPM_TAG_TRANSPORT_INTERNAL ((TPM_STRUCTURE_TAG) 0x000F) +#define TPM_TAG_TRANSPORT_LOG_IN ((TPM_STRUCTURE_TAG) 0x0010) +#define TPM_TAG_TRANSPORT_LOG_OUT ((TPM_STRUCTURE_TAG) 0x0011) +#define TPM_TAG_AUDIT_EVENT_IN ((TPM_STRUCTURE_TAG) 0x0012) +#define TPM_TAG_AUDIT_EVENT_OUT ((TPM_STRUCTURE_TAG) 0x0013) +#define TPM_TAG_CURRENT_TICKS ((TPM_STRUCTURE_TAG) 0x0014) +#define TPM_TAG_KEY ((TPM_STRUCTURE_TAG) 0x0015) +#define TPM_TAG_STORED_DATA12 ((TPM_STRUCTURE_TAG) 0x0016) +#define TPM_TAG_NV_ATTRIBUTES ((TPM_STRUCTURE_TAG) 0x0017) +#define TPM_TAG_NV_DATA_PUBLIC ((TPM_STRUCTURE_TAG) 0x0018) +#define TPM_TAG_NV_DATA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0019) +#define TPM_TAG_DELEGATIONS ((TPM_STRUCTURE_TAG) 0x001A) +#define TPM_TAG_DELEGATE_PUBLIC ((TPM_STRUCTURE_TAG) 0x001B) +#define TPM_TAG_DELEGATE_TABLE_ROW ((TPM_STRUCTURE_TAG) 0x001C) +#define TPM_TAG_TRANSPORT_AUTH ((TPM_STRUCTURE_TAG) 0x001D) +#define TPM_TAG_TRANSPORT_PUBLIC ((TPM_STRUCTURE_TAG) 0x001E) +#define TPM_TAG_PERMANENT_FLAGS ((TPM_STRUCTURE_TAG) 0x001F) +#define TPM_TAG_STCLEAR_FLAGS ((TPM_STRUCTURE_TAG) 0x0020) +#define TPM_TAG_STANY_FLAGS ((TPM_STRUCTURE_TAG) 0x0021) +#define TPM_TAG_PERMANENT_DATA ((TPM_STRUCTURE_TAG) 0x0022) +#define TPM_TAG_STCLEAR_DATA ((TPM_STRUCTURE_TAG) 0x0023) +#define TPM_TAG_STANY_DATA ((TPM_STRUCTURE_TAG) 0x0024) +#define TPM_TAG_FAMILY_TABLE_ENTRY ((TPM_STRUCTURE_TAG) 0x0025) +#define TPM_TAG_DELEGATE_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0026) +#define TPM_TAG_DELG_KEY_BLOB ((TPM_STRUCTURE_TAG) 0x0027) +#define TPM_TAG_KEY12 ((TPM_STRUCTURE_TAG) 0x0028) +#define TPM_TAG_CERTIFY_INFO2 ((TPM_STRUCTURE_TAG) 0x0029) +#define TPM_TAG_DELEGATE_OWNER_BLOB ((TPM_STRUCTURE_TAG) 0x002A) +#define TPM_TAG_EK_BLOB_ACTIVATE ((TPM_STRUCTURE_TAG) 0x002B) +#define TPM_TAG_DAA_BLOB ((TPM_STRUCTURE_TAG) 0x002C) +#define TPM_TAG_DAA_CONTEXT ((TPM_STRUCTURE_TAG) 0x002D) +#define TPM_TAG_DAA_ENFORCE ((TPM_STRUCTURE_TAG) 0x002E) +#define TPM_TAG_DAA_ISSUER ((TPM_STRUCTURE_TAG) 0x002F) +#define TPM_TAG_CAP_VERSION_INFO ((TPM_STRUCTURE_TAG) 0x0030) +#define TPM_TAG_DAA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0031) +#define TPM_TAG_DAA_TPM ((TPM_STRUCTURE_TAG) 0x0032) +#define TPM_TAG_CMK_MIGAUTH ((TPM_STRUCTURE_TAG) 0x0033) +#define TPM_TAG_CMK_SIGTICKET ((TPM_STRUCTURE_TAG) 0x0034) +#define TPM_TAG_CMK_MA_APPROVAL ((TPM_STRUCTURE_TAG) 0x0035) +#define TPM_TAG_QUOTE_INFO2 ((TPM_STRUCTURE_TAG) 0x0036) +#define TPM_TAG_DA_INFO ((TPM_STRUCTURE_TAG) 0x0037) +#define TPM_TAG_DA_LIMITED ((TPM_STRUCTURE_TAG) 0x0038) +#define TPM_TAG_DA_ACTION_TYPE ((TPM_STRUCTURE_TAG) 0x0039) + +// +// Part 2, section 4: TPM Types +// + +// +// Part 2, section 4.1: TPM_RESOURCE_TYPE +// +#define TPM_RT_KEY ((TPM_RESOURCE_TYPE) 0x00000001) ///< The handle is a key handle and is the result of a LoadKey type operation +#define TPM_RT_AUTH ((TPM_RESOURCE_TYPE) 0x00000002) ///< The handle is an authorization handle. Auth handles come from TPM_OIAP, TPM_OSAP and TPM_DSAP +#define TPM_RT_HASH ((TPM_RESOURCE_TYPE) 0x00000003) ///< Reserved for hashes +#define TPM_RT_TRANS ((TPM_RESOURCE_TYPE) 0x00000004) ///< The handle is for a transport session. Transport handles come from TPM_EstablishTransport +#define TPM_RT_CONTEXT ((TPM_RESOURCE_TYPE) 0x00000005) ///< Resource wrapped and held outside the TPM using the context save/restore commands +#define TPM_RT_COUNTER ((TPM_RESOURCE_TYPE) 0x00000006) ///< Reserved for counters +#define TPM_RT_DELEGATE ((TPM_RESOURCE_TYPE) 0x00000007) ///< The handle is for a delegate row. These are the internal rows held in NV storage by the TPM +#define TPM_RT_DAA_TPM ((TPM_RESOURCE_TYPE) 0x00000008) ///< The value is a DAA TPM specific blob +#define TPM_RT_DAA_V0 ((TPM_RESOURCE_TYPE) 0x00000009) ///< The value is a DAA V0 parameter +#define TPM_RT_DAA_V1 ((TPM_RESOURCE_TYPE) 0x0000000A) ///< The value is a DAA V1 parameter + +// +// Part 2, section 4.2: TPM_PAYLOAD_TYPE +// +#define TPM_PT_ASYM ((TPM_PAYLOAD_TYPE) 0x01) ///< The entity is an asymmetric key +#define TPM_PT_BIND ((TPM_PAYLOAD_TYPE) 0x02) ///< The entity is bound data +#define TPM_PT_MIGRATE ((TPM_PAYLOAD_TYPE) 0x03) ///< The entity is a migration blob +#define TPM_PT_MAINT ((TPM_PAYLOAD_TYPE) 0x04) ///< The entity is a maintenance blob +#define TPM_PT_SEAL ((TPM_PAYLOAD_TYPE) 0x05) ///< The entity is sealed data +#define TPM_PT_MIGRATE_RESTRICTED ((TPM_PAYLOAD_TYPE) 0x06) ///< The entity is a restricted-migration asymmetric key +#define TPM_PT_MIGRATE_EXTERNAL ((TPM_PAYLOAD_TYPE) 0x07) ///< The entity is a external migratable key +#define TPM_PT_CMK_MIGRATE ((TPM_PAYLOAD_TYPE) 0x08) ///< The entity is a CMK migratable blob +#define TPM_PT_VENDOR_SPECIFIC ((TPM_PAYLOAD_TYPE) 0x80) ///< 0x80 - 0xFF Vendor specific payloads + +// +// Part 2, section 4.3: TPM_ENTITY_TYPE +// +#define TPM_ET_KEYHANDLE ((UINT16) 0x0001) ///< The entity is a keyHandle or key +#define TPM_ET_OWNER ((UINT16) 0x0002) ///< The entity is the TPM Owner +#define TPM_ET_DATA ((UINT16) 0x0003) ///< The entity is some data +#define TPM_ET_SRK ((UINT16) 0x0004) ///< The entity is the SRK +#define TPM_ET_KEY ((UINT16) 0x0005) ///< The entity is a key or keyHandle +#define TPM_ET_REVOKE ((UINT16) 0x0006) ///< The entity is the RevokeTrust value +#define TPM_ET_DEL_OWNER_BLOB ((UINT16) 0x0007) ///< The entity is a delegate owner blob +#define TPM_ET_DEL_ROW ((UINT16) 0x0008) ///< The entity is a delegate row +#define TPM_ET_DEL_KEY_BLOB ((UINT16) 0x0009) ///< The entity is a delegate key blob +#define TPM_ET_COUNTER ((UINT16) 0x000A) ///< The entity is a counter +#define TPM_ET_NV ((UINT16) 0x000B) ///< The entity is a NV index +#define TPM_ET_OPERATOR ((UINT16) 0x000C) ///< The entity is the operator +#define TPM_ET_RESERVED_HANDLE ((UINT16) 0x0040) ///< Reserved. This value avoids collisions with the handle MSB setting. +// +// TPM_ENTITY_TYPE MSB Values: The MSB is used to indicate the ADIP encryption sheme when applicable +// +#define TPM_ET_XOR ((UINT16) 0x0000) ///< ADIP encryption scheme: XOR +#define TPM_ET_AES128 ((UINT16) 0x0006) ///< ADIP encryption scheme: AES 128 bits + +// +// Part 2, section 4.4.1: Reserved Key Handles +// +#define TPM_KH_SRK ((TPM_KEY_HANDLE) 0x40000000) ///< The handle points to the SRK +#define TPM_KH_OWNER ((TPM_KEY_HANDLE) 0x40000001) ///< The handle points to the TPM Owner +#define TPM_KH_REVOKE ((TPM_KEY_HANDLE) 0x40000002) ///< The handle points to the RevokeTrust value +#define TPM_KH_TRANSPORT ((TPM_KEY_HANDLE) 0x40000003) ///< The handle points to the EstablishTransport static authorization +#define TPM_KH_OPERATOR ((TPM_KEY_HANDLE) 0x40000004) ///< The handle points to the Operator auth +#define TPM_KH_ADMIN ((TPM_KEY_HANDLE) 0x40000005) ///< The handle points to the delegation administration auth +#define TPM_KH_EK ((TPM_KEY_HANDLE) 0x40000006) ///< The handle points to the PUBEK, only usable with TPM_OwnerReadInternalPub + +// +// Part 2, section 4.5: TPM_STARTUP_TYPE +// +#define TPM_ST_CLEAR ((TPM_STARTUP_TYPE) 0x0001) ///< The TPM is starting up from a clean state +#define TPM_ST_STATE ((TPM_STARTUP_TYPE) 0x0002) ///< The TPM is starting up from a saved state +#define TPM_ST_DEACTIVATED ((TPM_STARTUP_TYPE) 0x0003) ///< The TPM is to startup and set the deactivated flag to TRUE + +// +// Part 2, section 4.6: TPM_STATUP_EFFECTS +// The table makeup is still an open issue. +// + +// +// Part 2, section 4.7: TPM_PROTOCOL_ID +// +#define TPM_PID_OIAP ((TPM_PROTOCOL_ID) 0x0001) ///< The OIAP protocol. +#define TPM_PID_OSAP ((TPM_PROTOCOL_ID) 0x0002) ///< The OSAP protocol. +#define TPM_PID_ADIP ((TPM_PROTOCOL_ID) 0x0003) ///< The ADIP protocol. +#define TPM_PID_ADCP ((TPM_PROTOCOL_ID) 0x0004) ///< The ADCP protocol. +#define TPM_PID_OWNER ((TPM_PROTOCOL_ID) 0x0005) ///< The protocol for taking ownership of a TPM. +#define TPM_PID_DSAP ((TPM_PROTOCOL_ID) 0x0006) ///< The DSAP protocol +#define TPM_PID_TRANSPORT ((TPM_PROTOCOL_ID) 0x0007) ///< The transport protocol + +// +// Part 2, section 4.8: TPM_ALGORITHM_ID +// The TPM MUST support the algorithms TPM_ALG_RSA, TPM_ALG_SHA, TPM_ALG_HMAC, +// TPM_ALG_MGF1 +// +#define TPM_ALG_RSA ((TPM_ALGORITHM_ID) 0x00000001) ///< The RSA algorithm. +#define TPM_ALG_DES ((TPM_ALGORITHM_ID) 0x00000002) ///< The DES algorithm +#define TPM_ALG_3DES ((TPM_ALGORITHM_ID) 0x00000003) ///< The 3DES algorithm in EDE mode +#define TPM_ALG_SHA ((TPM_ALGORITHM_ID) 0x00000004) ///< The SHA1 algorithm +#define TPM_ALG_HMAC ((TPM_ALGORITHM_ID) 0x00000005) ///< The RFC 2104 HMAC algorithm +#define TPM_ALG_AES128 ((TPM_ALGORITHM_ID) 0x00000006) ///< The AES algorithm, key size 128 +#define TPM_ALG_MGF1 ((TPM_ALGORITHM_ID) 0x00000007) ///< The XOR algorithm using MGF1 to create a string the size of the encrypted block +#define TPM_ALG_AES192 ((TPM_ALGORITHM_ID) 0x00000008) ///< AES, key size 192 +#define TPM_ALG_AES256 ((TPM_ALGORITHM_ID) 0x00000009) ///< AES, key size 256 +#define TPM_ALG_XOR ((TPM_ALGORITHM_ID) 0x0000000A) ///< XOR using the rolling nonces + +// +// Part 2, section 4.9: TPM_PHYSICAL_PRESENCE +// +#define TPM_PHYSICAL_PRESENCE_HW_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0200) ///< Sets the physicalPresenceHWEnable to FALSE +#define TPM_PHYSICAL_PRESENCE_CMD_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0100) ///< Sets the physicalPresenceCMDEnable to FALSE +#define TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0080) ///< Sets the physicalPresenceLifetimeLock to TRUE +#define TPM_PHYSICAL_PRESENCE_HW_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0040) ///< Sets the physicalPresenceHWEnable to TRUE +#define TPM_PHYSICAL_PRESENCE_CMD_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0020) ///< Sets the physicalPresenceCMDEnable to TRUE +#define TPM_PHYSICAL_PRESENCE_NOTPRESENT ((TPM_PHYSICAL_PRESENCE) 0x0010) ///< Sets PhysicalPresence = FALSE +#define TPM_PHYSICAL_PRESENCE_PRESENT ((TPM_PHYSICAL_PRESENCE) 0x0008) ///< Sets PhysicalPresence = TRUE +#define TPM_PHYSICAL_PRESENCE_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0004) ///< Sets PhysicalPresenceLock = TRUE + +// +// Part 2, section 4.10: TPM_MIGRATE_SCHEME +// +#define TPM_MS_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0001) ///< A public key that can be used with all TPM migration commands other than 'ReWrap' mode. +#define TPM_MS_REWRAP ((TPM_MIGRATE_SCHEME) 0x0002) ///< A public key that can be used for the ReWrap mode of TPM_CreateMigrationBlob. +#define TPM_MS_MAINT ((TPM_MIGRATE_SCHEME) 0x0003) ///< A public key that can be used for the Maintenance commands +#define TPM_MS_RESTRICT_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0004) ///< The key is to be migrated to a Migration Authority. +#define TPM_MS_RESTRICT_APPROVE_DOUBLE ((TPM_MIGRATE_SCHEME) 0x0005) ///< The key is to be migrated to an entity approved by a Migration Authority using double wrapping + +// +// Part 2, section 4.11: TPM_EK_TYPE +// +#define TPM_EK_TYPE_ACTIVATE ((TPM_EK_TYPE) 0x0001) ///< The blob MUST be TPM_EK_BLOB_ACTIVATE +#define TPM_EK_TYPE_AUTH ((TPM_EK_TYPE) 0x0002) ///< The blob MUST be TPM_EK_BLOB_AUTH + +// +// Part 2, section 4.12: TPM_PLATFORM_SPECIFIC +// +#define TPM_PS_PC_11 ((TPM_PLATFORM_SPECIFIC) 0x0001) ///< PC Specific version 1.1 +#define TPM_PS_PC_12 ((TPM_PLATFORM_SPECIFIC) 0x0002) ///< PC Specific version 1.2 +#define TPM_PS_PDA_12 ((TPM_PLATFORM_SPECIFIC) 0x0003) ///< PDA Specific version 1.2 +#define TPM_PS_Server_12 ((TPM_PLATFORM_SPECIFIC) 0x0004) ///< Server Specific version 1.2 +#define TPM_PS_Mobile_12 ((TPM_PLATFORM_SPECIFIC) 0x0005) ///< Mobil Specific version 1.2 + +// +// Part 2, section 5: Basic Structures +// + +/// +/// Part 2, section 5.1: TPM_STRUCT_VER +/// +typedef struct tdTPM_STRUCT_VER { + UINT8 major; + UINT8 minor; + UINT8 revMajor; + UINT8 revMinor; +} TPM_STRUCT_VER; + +/// +/// Part 2, section 5.3: TPM_VERSION +/// +typedef struct tdTPM_VERSION { + TPM_VERSION_BYTE major; + TPM_VERSION_BYTE minor; + UINT8 revMajor; + UINT8 revMinor; +} TPM_VERSION; + + +#define TPM_SHA1_160_HASH_LEN 0x14 +#define TPM_SHA1BASED_NONCE_LEN TPM_SHA1_160_HASH_LEN + +/// +/// Part 2, section 5.4: TPM_DIGEST +/// +typedef struct tdTPM_DIGEST{ + UINT8 digest[TPM_SHA1_160_HASH_LEN]; +} TPM_DIGEST; + +/// +/// This SHALL be the digest of the chosen identityLabel and privacyCA for a new TPM identity +/// +typedef TPM_DIGEST TPM_CHOSENID_HASH; +/// +/// This SHALL be the hash of a list of PCR indexes and PCR values that a key or data is bound to +/// +typedef TPM_DIGEST TPM_COMPOSITE_HASH; +/// +/// This SHALL be the value of a DIR register +/// +typedef TPM_DIGEST TPM_DIRVALUE; + +typedef TPM_DIGEST TPM_HMAC; +/// +/// The value inside of the PCR +/// +typedef TPM_DIGEST TPM_PCRVALUE; +/// +/// This SHALL be the value of the current internal audit state +/// +typedef TPM_DIGEST TPM_AUDITDIGEST; + +/// +/// Part 2, section 5.5: TPM_NONCE +/// +typedef struct tdTPM_NONCE{ + UINT8 nonce[20]; +} TPM_NONCE; + +/// +/// This SHALL be a random value generated by a TPM immediately after the EK is installed +/// in that TPM, whenever an EK is installed in that TPM +/// +typedef TPM_NONCE TPM_DAA_TPM_SEED; +/// +/// This SHALL be a random value +/// +typedef TPM_NONCE TPM_DAA_CONTEXT_SEED; + +// +// Part 2, section 5.6: TPM_AUTHDATA +// +/// +/// The AuthData data is the information that is saved or passed to provide proof of ownership +/// 296 of an entity +/// +typedef UINT8 tdTPM_AUTHDATA[20]; + +typedef tdTPM_AUTHDATA TPM_AUTHDATA; +/// +/// A secret plaintext value used in the authorization process +/// +typedef TPM_AUTHDATA TPM_SECRET; +/// +/// A ciphertext (encrypted) version of AuthData data. The encryption mechanism depends on the context +/// +typedef TPM_AUTHDATA TPM_ENCAUTH; + +/// +/// Part 2, section 5.7: TPM_KEY_HANDLE_LIST +/// Size of handle is loaded * sizeof(TPM_KEY_HANDLE) +/// +typedef struct tdTPM_KEY_HANDLE_LIST { + UINT16 loaded; + TPM_KEY_HANDLE handle[1]; +} TPM_KEY_HANDLE_LIST; + +// +// Part 2, section 5.8: TPM_KEY_USAGE values +// +/// +/// TPM_KEY_SIGNING SHALL indicate a signing key. The [private] key SHALL be +/// used for signing operations, only. This means that it MUST be a leaf of the +/// Protected Storage key hierarchy. +/// +#define TPM_KEY_SIGNING ((UINT16) 0x0010) +/// +/// TPM_KEY_STORAGE SHALL indicate a storage key. The key SHALL be used to wrap +/// and unwrap other keys in the Protected Storage hierarchy +/// +#define TPM_KEY_STORAGE ((UINT16) 0x0011) +/// +/// TPM_KEY_IDENTITY SHALL indicate an identity key. The key SHALL be used for +/// operations that require a TPM identity, only. +/// +#define TPM_KEY_IDENTITY ((UINT16) 0x0012) +/// +/// TPM_KEY_AUTHCHANGE SHALL indicate an ephemeral key that is in use during +/// the ChangeAuthAsym process, only. +/// +#define TPM_KEY_AUTHCHANGE ((UINT16) 0x0013) +/// +/// TPM_KEY_BIND SHALL indicate a key that can be used for TPM_Bind and +/// TPM_Unbind operations only. +/// +#define TPM_KEY_BIND ((UINT16) 0x0014) +/// +/// TPM_KEY_LEGACY SHALL indicate a key that can perform signing and binding +/// operations. The key MAY be used for both signing and binding operations. +/// The TPM_KEY_LEGACY key type is to allow for use by applications where both +/// signing and encryption operations occur with the same key. The use of this +/// key type is not recommended TPM_KEY_MIGRATE 0x0016 This SHALL indicate a +/// key in use for TPM_MigrateKey +/// +#define TPM_KEY_LEGACY ((UINT16) 0x0015) +/// +/// TPM_KEY_MIGRAGE SHALL indicate a key in use for TPM_MigrateKey +/// +#define TPM_KEY_MIGRATE ((UINT16) 0x0016) + +// +// Part 2, section 5.8.1: Mandatory Key Usage Schemes +// + +#define TPM_ES_NONE ((TPM_ENC_SCHEME) 0x0001) +#define TPM_ES_RSAESPKCSv15 ((TPM_ENC_SCHEME) 0x0002) +#define TPM_ES_RSAESOAEP_SHA1_MGF1 ((TPM_ENC_SCHEME) 0x0003) +#define TPM_ES_SYM_CNT ((TPM_ENC_SCHEME) 0x0004) ///< rev94 defined +#define TPM_ES_SYM_CTR ((TPM_ENC_SCHEME) 0x0004) +#define TPM_ES_SYM_OFB ((TPM_ENC_SCHEME) 0x0005) + +#define TPM_SS_NONE ((TPM_SIG_SCHEME) 0x0001) +#define TPM_SS_RSASSAPKCS1v15_SHA1 ((TPM_SIG_SCHEME) 0x0002) +#define TPM_SS_RSASSAPKCS1v15_DER ((TPM_SIG_SCHEME) 0x0003) +#define TPM_SS_RSASSAPKCS1v15_INFO ((TPM_SIG_SCHEME) 0x0004) + +// +// Part 2, section 5.9: TPM_AUTH_DATA_USAGE values +// +#define TPM_AUTH_NEVER ((TPM_AUTH_DATA_USAGE) 0x00) +#define TPM_AUTH_ALWAYS ((TPM_AUTH_DATA_USAGE) 0x01) +#define TPM_AUTH_PRIV_USE_ONLY ((TPM_AUTH_DATA_USAGE) 0x03) + +/// +/// Part 2, section 5.10: TPM_KEY_FLAGS +/// +typedef enum tdTPM_KEY_FLAGS { + redirection = 0x00000001, + migratable = 0x00000002, + isVolatile = 0x00000004, + pcrIgnoredOnRead = 0x00000008, + migrateAuthority = 0x00000010 +} TPM_KEY_FLAGS_BITS; + +/// +/// Part 2, section 5.11: TPM_CHANGEAUTH_VALIDATE +/// +typedef struct tdTPM_CHANGEAUTH_VALIDATE { + TPM_SECRET newAuthSecret; + TPM_NONCE n1; +} TPM_CHANGEAUTH_VALIDATE; + +/// +/// Part 2, section 5.12: TPM_MIGRATIONKEYAUTH +/// decalared after section 10 to catch declaration of TPM_PUBKEY +/// +/// Part 2 section 10.1: TPM_KEY_PARMS +/// [size_is(parmSize)] BYTE* parms; +/// +typedef struct tdTPM_KEY_PARMS { + TPM_ALGORITHM_ID algorithmID; + TPM_ENC_SCHEME encScheme; + TPM_SIG_SCHEME sigScheme; + UINT32 parmSize; + UINT8 *parms; +} TPM_KEY_PARMS; + +/// +/// Part 2, section 10.4: TPM_STORE_PUBKEY +/// +typedef struct tdTPM_STORE_PUBKEY { + UINT32 keyLength; + UINT8 key[1]; +} TPM_STORE_PUBKEY; + +/// +/// Part 2, section 10.5: TPM_PUBKEY +/// +typedef struct tdTPM_PUBKEY{ + TPM_KEY_PARMS algorithmParms; + TPM_STORE_PUBKEY pubKey; +} TPM_PUBKEY; + +/// +/// Part 2, section 5.12: TPM_MIGRATIONKEYAUTH +/// +typedef struct tdTPM_MIGRATIONKEYAUTH{ + TPM_PUBKEY migrationKey; + TPM_MIGRATE_SCHEME migrationScheme; + TPM_DIGEST digest; +} TPM_MIGRATIONKEYAUTH; + +/// +/// Part 2, section 5.13: TPM_COUNTER_VALUE +/// +typedef struct tdTPM_COUNTER_VALUE{ + TPM_STRUCTURE_TAG tag; + UINT8 label[4]; + TPM_ACTUAL_COUNT counter; +} TPM_COUNTER_VALUE; + +/// +/// Part 2, section 5.14: TPM_SIGN_INFO +/// Size of data indicated by dataLen +/// +typedef struct tdTPM_SIGN_INFO { + TPM_STRUCTURE_TAG tag; + UINT8 fixed[4]; + TPM_NONCE replay; + UINT32 dataLen; + UINT8 *data; +} TPM_SIGN_INFO; + +/// +/// Part 2, section 5.15: TPM_MSA_COMPOSITE +/// Number of migAuthDigest indicated by MSAlist +/// +typedef struct tdTPM_MSA_COMPOSITE { + UINT32 MSAlist; + TPM_DIGEST migAuthDigest[1]; +} TPM_MSA_COMPOSITE; + +/// +/// Part 2, section 5.16: TPM_CMK_AUTH +/// +typedef struct tdTPM_CMK_AUTH{ + TPM_DIGEST migrationAuthorityDigest; + TPM_DIGEST destinationKeyDigest; + TPM_DIGEST sourceKeyDigest; +} TPM_CMK_AUTH; + +// +// Part 2, section 5.17: TPM_CMK_DELEGATE +// +#define TPM_CMK_DELEGATE_SIGNING ((TPM_CMK_DELEGATE) BIT31) +#define TPM_CMK_DELEGATE_STORAGE ((TPM_CMK_DELEGATE) BIT30) +#define TPM_CMK_DELEGATE_BIND ((TPM_CMK_DELEGATE) BIT29) +#define TPM_CMK_DELEGATE_LEGACY ((TPM_CMK_DELEGATE) BIT28) +#define TPM_CMK_DELEGATE_MIGRATE ((TPM_CMK_DELEGATE) BIT27) + +/// +/// Part 2, section 5.18: TPM_SELECT_SIZE +/// +typedef struct tdTPM_SELECT_SIZE { + UINT8 major; + UINT8 minor; + UINT16 reqSize; +} TPM_SELECT_SIZE; + +/// +/// Part 2, section 5,19: TPM_CMK_MIGAUTH +/// +typedef struct tdTPM_CMK_MIGAUTH{ + TPM_STRUCTURE_TAG tag; + TPM_DIGEST msaDigest; + TPM_DIGEST pubKeyDigest; +} TPM_CMK_MIGAUTH; + +/// +/// Part 2, section 5.20: TPM_CMK_SIGTICKET +/// +typedef struct tdTPM_CMK_SIGTICKET{ + TPM_STRUCTURE_TAG tag; + TPM_DIGEST verKeyDigest; + TPM_DIGEST signedData; +} TPM_CMK_SIGTICKET; + +/// +/// Part 2, section 5.21: TPM_CMK_MA_APPROVAL +/// +typedef struct tdTPM_CMK_MA_APPROVAL{ + TPM_STRUCTURE_TAG tag; + TPM_DIGEST migrationAuthorityDigest; +} TPM_CMK_MA_APPROVAL; + +// +// Part 2, section 6: Command Tags +// +#define TPM_TAG_RQU_COMMAND ((TPM_STRUCTURE_TAG) 0x00C1) +#define TPM_TAG_RQU_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C2) +#define TPM_TAG_RQU_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C3) +#define TPM_TAG_RSP_COMMAND ((TPM_STRUCTURE_TAG) 0x00C4) +#define TPM_TAG_RSP_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C5) +#define TPM_TAG_RSP_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C6) + +/// +/// Part 2, section 7.1: TPM_PERMANENT_FLAGS +/// +typedef struct tdTPM_PERMANENT_FLAGS{ + TPM_STRUCTURE_TAG tag; + BOOLEAN disable; + BOOLEAN ownership; + BOOLEAN deactivated; + BOOLEAN readPubek; + BOOLEAN disableOwnerClear; + BOOLEAN allowMaintenance; + BOOLEAN physicalPresenceLifetimeLock; + BOOLEAN physicalPresenceHWEnable; + BOOLEAN physicalPresenceCMDEnable; + BOOLEAN CEKPUsed; + BOOLEAN TPMpost; + BOOLEAN TPMpostLock; + BOOLEAN FIPS; + BOOLEAN operator; + BOOLEAN enableRevokeEK; + BOOLEAN nvLocked; + BOOLEAN readSRKPub; + BOOLEAN tpmEstablished; + BOOLEAN maintenanceDone; + BOOLEAN disableFullDALogicInfo; +} TPM_PERMANENT_FLAGS; + +// +// Part 2, section 7.1.1: Flag Restrictions (of TPM_PERMANENT_FLAGS) +// +#define TPM_PF_DISABLE ((TPM_CAPABILITY_AREA) 1) +#define TPM_PF_OWNERSHIP ((TPM_CAPABILITY_AREA) 2) +#define TPM_PF_DEACTIVATED ((TPM_CAPABILITY_AREA) 3) +#define TPM_PF_READPUBEK ((TPM_CAPABILITY_AREA) 4) +#define TPM_PF_DISABLEOWNERCLEAR ((TPM_CAPABILITY_AREA) 5) +#define TPM_PF_ALLOWMAINTENANCE ((TPM_CAPABILITY_AREA) 6) +#define TPM_PF_PHYSICALPRESENCELIFETIMELOCK ((TPM_CAPABILITY_AREA) 7) +#define TPM_PF_PHYSICALPRESENCEHWENABLE ((TPM_CAPABILITY_AREA) 8) +#define TPM_PF_PHYSICALPRESENCECMDENABLE ((TPM_CAPABILITY_AREA) 9) +#define TPM_PF_CEKPUSED ((TPM_CAPABILITY_AREA) 10) +#define TPM_PF_TPMPOST ((TPM_CAPABILITY_AREA) 11) +#define TPM_PF_TPMPOSTLOCK ((TPM_CAPABILITY_AREA) 12) +#define TPM_PF_FIPS ((TPM_CAPABILITY_AREA) 13) +#define TPM_PF_OPERATOR ((TPM_CAPABILITY_AREA) 14) +#define TPM_PF_ENABLEREVOKEEK ((TPM_CAPABILITY_AREA) 15) +#define TPM_PF_NV_LOCKED ((TPM_CAPABILITY_AREA) 16) +#define TPM_PF_READSRKPUB ((TPM_CAPABILITY_AREA) 17) +#define TPM_PF_TPMESTABLISHED ((TPM_CAPABILITY_AREA) 18) +#define TPM_PF_MAINTENANCEDONE ((TPM_CAPABILITY_AREA) 19) +#define TPM_PF_DISABLEFULLDALOGICINFO ((TPM_CAPABILITY_AREA) 20) + +/// +/// Part 2, section 7.2: TPM_STCLEAR_FLAGS +/// +typedef struct tdTPM_STCLEAR_FLAGS{ + TPM_STRUCTURE_TAG tag; + BOOLEAN deactivated; + BOOLEAN disableForceClear; + BOOLEAN physicalPresence; + BOOLEAN physicalPresenceLock; + BOOLEAN bGlobalLock; +} TPM_STCLEAR_FLAGS; + +// +// Part 2, section 7.2.1: Flag Restrictions (of TPM_STCLEAR_FLAGS) +// +#define TPM_SF_DEACTIVATED ((TPM_CAPABILITY_AREA) 1) +#define TPM_SF_DISABLEFORCECLEAR ((TPM_CAPABILITY_AREA) 2) +#define TPM_SF_PHYSICALPRESENCE ((TPM_CAPABILITY_AREA) 3) +#define TPM_SF_PHYSICALPRESENCELOCK ((TPM_CAPABILITY_AREA) 4) +#define TPM_SF_BGLOBALLOCK ((TPM_CAPABILITY_AREA) 5) + +/// +/// Part 2, section 7.3: TPM_STANY_FLAGS +/// +typedef struct tdTPM_STANY_FLAGS{ + TPM_STRUCTURE_TAG tag; + BOOLEAN postInitialise; + TPM_MODIFIER_INDICATOR localityModifier; + BOOLEAN transportExclusive; + BOOLEAN TOSPresent; +} TPM_STANY_FLAGS; + +// +// Part 2, section 7.3.1: Flag Restrictions (of TPM_STANY_FLAGS) +// +#define TPM_AF_POSTINITIALISE ((TPM_CAPABILITY_AREA) 1) +#define TPM_AF_LOCALITYMODIFIER ((TPM_CAPABILITY_AREA) 2) +#define TPM_AF_TRANSPORTEXCLUSIVE ((TPM_CAPABILITY_AREA) 3) +#define TPM_AF_TOSPRESENT ((TPM_CAPABILITY_AREA) 4) + +// +// All those structures defined in section 7.4, 7.5, 7.6 are not normative and +// thus no definitions here +// +// Part 2, section 7.4: TPM_PERMANENT_DATA +// +#define TPM_MIN_COUNTERS 4 ///< the minimum number of counters is 4 +#define TPM_DELEGATE_KEY TPM_KEY +#define TPM_NUM_PCR 16 +#define TPM_MAX_NV_WRITE_NOOWNER 64 + +// +// Part 2, section 7.4.1: PERMANENT_DATA Subcap for SetCapability +// +#define TPM_PD_REVMAJOR ((TPM_CAPABILITY_AREA) 1) +#define TPM_PD_REVMINOR ((TPM_CAPABILITY_AREA) 2) +#define TPM_PD_TPMPROOF ((TPM_CAPABILITY_AREA) 3) +#define TPM_PD_OWNERAUTH ((TPM_CAPABILITY_AREA) 4) +#define TPM_PD_OPERATORAUTH ((TPM_CAPABILITY_AREA) 5) +#define TPM_PD_MANUMAINTPUB ((TPM_CAPABILITY_AREA) 6) +#define TPM_PD_ENDORSEMENTKEY ((TPM_CAPABILITY_AREA) 7) +#define TPM_PD_SRK ((TPM_CAPABILITY_AREA) 8) +#define TPM_PD_DELEGATEKEY ((TPM_CAPABILITY_AREA) 9) +#define TPM_PD_CONTEXTKEY ((TPM_CAPABILITY_AREA) 10) +#define TPM_PD_AUDITMONOTONICCOUNTER ((TPM_CAPABILITY_AREA) 11) +#define TPM_PD_MONOTONICCOUNTER ((TPM_CAPABILITY_AREA) 12) +#define TPM_PD_PCRATTRIB ((TPM_CAPABILITY_AREA) 13) +#define TPM_PD_ORDINALAUDITSTATUS ((TPM_CAPABILITY_AREA) 14) +#define TPM_PD_AUTHDIR ((TPM_CAPABILITY_AREA) 15) +#define TPM_PD_RNGSTATE ((TPM_CAPABILITY_AREA) 16) +#define TPM_PD_FAMILYTABLE ((TPM_CAPABILITY_AREA) 17) +#define TPM_DELEGATETABLE ((TPM_CAPABILITY_AREA) 18) +#define TPM_PD_EKRESET ((TPM_CAPABILITY_AREA) 19) +#define TPM_PD_MAXNVBUFSIZE ((TPM_CAPABILITY_AREA) 20) +#define TPM_PD_LASTFAMILYID ((TPM_CAPABILITY_AREA) 21) +#define TPM_PD_NOOWNERNVWRITE ((TPM_CAPABILITY_AREA) 22) +#define TPM_PD_RESTRICTDELEGATE ((TPM_CAPABILITY_AREA) 23) +#define TPM_PD_TPMDAASEED ((TPM_CAPABILITY_AREA) 24) +#define TPM_PD_DAAPROOF ((TPM_CAPABILITY_AREA) 25) + +/// +/// Part 2, section 7.5: TPM_STCLEAR_DATA +/// available inside TPM only +/// + typedef struct tdTPM_STCLEAR_DATA{ + TPM_STRUCTURE_TAG tag; + TPM_NONCE contextNonceKey; + TPM_COUNT_ID countID; + UINT32 ownerReference; + BOOLEAN disableResetLock; + TPM_PCRVALUE PCR[TPM_NUM_PCR]; + UINT32 deferredPhysicalPresence; + }TPM_STCLEAR_DATA; + +// +// Part 2, section 7.5.1: STCLEAR_DATA Subcap for SetCapability +// +#define TPM_SD_CONTEXTNONCEKEY ((TPM_CAPABILITY_AREA)0x00000001) +#define TPM_SD_COUNTID ((TPM_CAPABILITY_AREA)0x00000002) +#define TPM_SD_OWNERREFERENCE ((TPM_CAPABILITY_AREA)0x00000003) +#define TPM_SD_DISABLERESETLOCK ((TPM_CAPABILITY_AREA)0x00000004) +#define TPM_SD_PCR ((TPM_CAPABILITY_AREA)0x00000005) +#define TPM_SD_DEFERREDPHYSICALPRESENCE ((TPM_CAPABILITY_AREA)0x00000006) + +// +// Part 2, section 7.6.1: STANY_DATA Subcap for SetCapability +// +#define TPM_AD_CONTEXTNONCESESSION ((TPM_CAPABILITY_AREA) 1) +#define TPM_AD_AUDITDIGEST ((TPM_CAPABILITY_AREA) 2) +#define TPM_AD_CURRENTTICKS ((TPM_CAPABILITY_AREA) 3) +#define TPM_AD_CONTEXTCOUNT ((TPM_CAPABILITY_AREA) 4) +#define TPM_AD_CONTEXTLIST ((TPM_CAPABILITY_AREA) 5) +#define TPM_AD_SESSIONS ((TPM_CAPABILITY_AREA) 6) + +// +// Part 2, section 8: PCR Structures +// + +/// +/// Part 2, section 8.1: TPM_PCR_SELECTION +/// Size of pcrSelect[] indicated by sizeOfSelect +/// +typedef struct tdTPM_PCR_SELECTION { + UINT16 sizeOfSelect; + UINT8 pcrSelect[1]; +} TPM_PCR_SELECTION; + +/// +/// Part 2, section 8.2: TPM_PCR_COMPOSITE +/// Size of pcrValue[] indicated by valueSize +/// +typedef struct tdTPM_PCR_COMPOSITE { + TPM_PCR_SELECTION select; + UINT32 valueSize; + TPM_PCRVALUE pcrValue[1]; +} TPM_PCR_COMPOSITE; + +/// +/// Part 2, section 8.3: TPM_PCR_INFO +/// +typedef struct tdTPM_PCR_INFO { + TPM_PCR_SELECTION pcrSelection; + TPM_COMPOSITE_HASH digestAtRelease; + TPM_COMPOSITE_HASH digestAtCreation; +} TPM_PCR_INFO; + +/// +/// Part 2, section 8.6: TPM_LOCALITY_SELECTION +/// +typedef UINT8 TPM_LOCALITY_SELECTION; + +#define TPM_LOC_FOUR ((UINT8) 0x10) +#define TPM_LOC_THREE ((UINT8) 0x08) +#define TPM_LOC_TWO ((UINT8) 0x04) +#define TPM_LOC_ONE ((UINT8) 0x02) +#define TPM_LOC_ZERO ((UINT8) 0x01) + +/// +/// Part 2, section 8.4: TPM_PCR_INFO_LONG +/// +typedef struct tdTPM_PCR_INFO_LONG { + TPM_STRUCTURE_TAG tag; + TPM_LOCALITY_SELECTION localityAtCreation; + TPM_LOCALITY_SELECTION localityAtRelease; + TPM_PCR_SELECTION creationPCRSelection; + TPM_PCR_SELECTION releasePCRSelection; + TPM_COMPOSITE_HASH digestAtCreation; + TPM_COMPOSITE_HASH digestAtRelease; +} TPM_PCR_INFO_LONG; + +/// +/// Part 2, section 8.5: TPM_PCR_INFO_SHORT +/// +typedef struct tdTPM_PCR_INFO_SHORT{ + TPM_PCR_SELECTION pcrSelection; + TPM_LOCALITY_SELECTION localityAtRelease; + TPM_COMPOSITE_HASH digestAtRelease; +} TPM_PCR_INFO_SHORT; + +/// +/// Part 2, section 8.8: TPM_PCR_ATTRIBUTES +/// +typedef struct tdTPM_PCR_ATTRIBUTES{ + BOOLEAN pcrReset; + TPM_LOCALITY_SELECTION pcrExtendLocal; + TPM_LOCALITY_SELECTION pcrResetLocal; +} TPM_PCR_ATTRIBUTES; + +// +// Part 2, section 9: Storage Structures +// + +/// +/// Part 2, section 9.1: TPM_STORED_DATA +/// [size_is(sealInfoSize)] BYTE* sealInfo; +/// [size_is(encDataSize)] BYTE* encData; +/// +typedef struct tdTPM_STORED_DATA { + TPM_STRUCT_VER ver; + UINT32 sealInfoSize; + UINT8 *sealInfo; + UINT32 encDataSize; + UINT8 *encData; +} TPM_STORED_DATA; + +/// +/// Part 2, section 9.2: TPM_STORED_DATA12 +/// [size_is(sealInfoSize)] BYTE* sealInfo; +/// [size_is(encDataSize)] BYTE* encData; +/// +typedef struct tdTPM_STORED_DATA12 { + TPM_STRUCTURE_TAG tag; + TPM_ENTITY_TYPE et; + UINT32 sealInfoSize; + UINT8 *sealInfo; + UINT32 encDataSize; + UINT8 *encData; +} TPM_STORED_DATA12; + +/// +/// Part 2, section 9.3: TPM_SEALED_DATA +/// [size_is(dataSize)] BYTE* data; +/// +typedef struct tdTPM_SEALED_DATA { + TPM_PAYLOAD_TYPE payload; + TPM_SECRET authData; + TPM_NONCE tpmProof; + TPM_DIGEST storedDigest; + UINT32 dataSize; + UINT8 *data; +} TPM_SEALED_DATA; + +/// +/// Part 2, section 9.4: TPM_SYMMETRIC_KEY +/// [size_is(size)] BYTE* data; +/// +typedef struct tdTPM_SYMMETRIC_KEY { + TPM_ALGORITHM_ID algId; + TPM_ENC_SCHEME encScheme; + UINT16 dataSize; + UINT8 *data; +} TPM_SYMMETRIC_KEY; + +/// +/// Part 2, section 9.5: TPM_BOUND_DATA +/// +typedef struct tdTPM_BOUND_DATA { + TPM_STRUCT_VER ver; + TPM_PAYLOAD_TYPE payload; + UINT8 payloadData[1]; +} TPM_BOUND_DATA; + +// +// Part 2 section 10: TPM_KEY complex +// + +// +// Section 10.1, 10.4, and 10.5 have been defined previously +// + +/// +/// Part 2, section 10.2: TPM_KEY +/// [size_is(encDataSize)] BYTE* encData; +/// +typedef struct tdTPM_KEY{ + TPM_STRUCT_VER ver; + TPM_KEY_USAGE keyUsage; + TPM_KEY_FLAGS keyFlags; + TPM_AUTH_DATA_USAGE authDataUsage; + TPM_KEY_PARMS algorithmParms; + UINT32 PCRInfoSize; + UINT8 *PCRInfo; + TPM_STORE_PUBKEY pubKey; + UINT32 encDataSize; + UINT8 *encData; +} TPM_KEY; + +/// +/// Part 2, section 10.3: TPM_KEY12 +/// [size_is(encDataSize)] BYTE* encData; +/// +typedef struct tdTPM_KEY12{ + TPM_STRUCTURE_TAG tag; + UINT16 fill; + TPM_KEY_USAGE keyUsage; + TPM_KEY_FLAGS keyFlags; + TPM_AUTH_DATA_USAGE authDataUsage; + TPM_KEY_PARMS algorithmParms; + UINT32 PCRInfoSize; + UINT8 *PCRInfo; + TPM_STORE_PUBKEY pubKey; + UINT32 encDataSize; + UINT8 *encData; +} TPM_KEY12; + +/// +/// Part 2, section 10.7: TPM_STORE_PRIVKEY +/// [size_is(keyLength)] BYTE* key; +/// +typedef struct tdTPM_STORE_PRIVKEY { + UINT32 keyLength; + UINT8 *key; +} TPM_STORE_PRIVKEY; + +/// +/// Part 2, section 10.6: TPM_STORE_ASYMKEY +/// +typedef struct tdTPM_STORE_ASYMKEY { // pos len total + TPM_PAYLOAD_TYPE payload; // 0 1 1 + TPM_SECRET usageAuth; // 1 20 21 + TPM_SECRET migrationAuth; // 21 20 41 + TPM_DIGEST pubDataDigest; // 41 20 61 + TPM_STORE_PRIVKEY privKey; // 61 132-151 193-214 +} TPM_STORE_ASYMKEY; + +/// +/// Part 2, section 10.8: TPM_MIGRATE_ASYMKEY +/// [size_is(partPrivKeyLen)] BYTE* partPrivKey; +/// +typedef struct tdTPM_MIGRATE_ASYMKEY { // pos len total + TPM_PAYLOAD_TYPE payload; // 0 1 1 + TPM_SECRET usageAuth; // 1 20 21 + TPM_DIGEST pubDataDigest; // 21 20 41 + UINT32 partPrivKeyLen; // 41 4 45 + UINT8 *partPrivKey; // 45 112-127 157-172 +} TPM_MIGRATE_ASYMKEY; + +/// +/// Part 2, section 10.9: TPM_KEY_CONTROL +/// +#define TPM_KEY_CONTROL_OWNER_EVICT ((UINT32) 0x00000001) + +// +// Part 2, section 11: Signed Structures +// + +/// +/// Part 2, section 11.1: TPM_CERTIFY_INFO Structure +/// +typedef struct tdTPM_CERTIFY_INFO { + TPM_STRUCT_VER version; + TPM_KEY_USAGE keyUsage; + TPM_KEY_FLAGS keyFlags; + TPM_AUTH_DATA_USAGE authDataUsage; + TPM_KEY_PARMS algorithmParms; + TPM_DIGEST pubkeyDigest; + TPM_NONCE data; + BOOLEAN parentPCRStatus; + UINT32 PCRInfoSize; + UINT8 *PCRInfo; +} TPM_CERTIFY_INFO; + +/// +/// Part 2, section 11.2: TPM_CERTIFY_INFO2 Structure +/// +typedef struct tdTPM_CERTIFY_INFO2 { + TPM_STRUCTURE_TAG tag; + UINT8 fill; + TPM_PAYLOAD_TYPE payloadType; + TPM_KEY_USAGE keyUsage; + TPM_KEY_FLAGS keyFlags; + TPM_AUTH_DATA_USAGE authDataUsage; + TPM_KEY_PARMS algorithmParms; + TPM_DIGEST pubkeyDigest; + TPM_NONCE data; + BOOLEAN parentPCRStatus; + UINT32 PCRInfoSize; + UINT8 *PCRInfo; + UINT32 migrationAuthoritySize; + UINT8 *migrationAuthority; +} TPM_CERTIFY_INFO2; + +/// +/// Part 2, section 11.3 TPM_QUOTE_INFO Structure +/// +typedef struct tdTPM_QUOTE_INFO { + TPM_STRUCT_VER version; + UINT8 fixed[4]; + TPM_COMPOSITE_HASH digestValue; + TPM_NONCE externalData; +} TPM_QUOTE_INFO; + +/// +/// Part 2, section 11.4 TPM_QUOTE_INFO2 Structure +/// +typedef struct tdTPM_QUOTE_INFO2 { + TPM_STRUCTURE_TAG tag; + UINT8 fixed[4]; + TPM_NONCE externalData; + TPM_PCR_INFO_SHORT infoShort; +} TPM_QUOTE_INFO2; + +// +// Part 2, section 12: Identity Structures +// + +/// +/// Part 2, section 12.1 TPM_EK_BLOB +/// +typedef struct tdTPM_EK_BLOB { + TPM_STRUCTURE_TAG tag; + TPM_EK_TYPE ekType; + UINT32 blobSize; + UINT8 *blob; +} TPM_EK_BLOB; + +/// +/// Part 2, section 12.2 TPM_EK_BLOB_ACTIVATE +/// +typedef struct tdTPM_EK_BLOB_ACTIVATE { + TPM_STRUCTURE_TAG tag; + TPM_SYMMETRIC_KEY sessionKey; + TPM_DIGEST idDigest; + TPM_PCR_INFO_SHORT pcrInfo; +} TPM_EK_BLOB_ACTIVATE; + +/// +/// Part 2, section 12.3 TPM_EK_BLOB_AUTH +/// +typedef struct tdTPM_EK_BLOB_AUTH { + TPM_STRUCTURE_TAG tag; + TPM_SECRET authValue; +} TPM_EK_BLOB_AUTH; + + +/// +/// Part 2, section 12.5 TPM_IDENTITY_CONTENTS +/// +typedef struct tdTPM_IDENTITY_CONTENTS { + TPM_STRUCT_VER ver; + UINT32 ordinal; + TPM_CHOSENID_HASH labelPrivCADigest; + TPM_PUBKEY identityPubKey; +} TPM_IDENTITY_CONTENTS; + +/// +/// Part 2, section 12.6 TPM_IDENTITY_REQ +/// +typedef struct tdTPM_IDENTITY_REQ { + UINT32 asymSize; + UINT32 symSize; + TPM_KEY_PARMS asymAlgorithm; + TPM_KEY_PARMS symAlgorithm; + UINT8 *asymBlob; + UINT8 *symBlob; +} TPM_IDENTITY_REQ; + +/// +/// Part 2, section 12.7 TPM_IDENTITY_PROOF +/// +typedef struct tdTPM_IDENTITY_PROOF { + TPM_STRUCT_VER ver; + UINT32 labelSize; + UINT32 identityBindingSize; + UINT32 endorsementSize; + UINT32 platformSize; + UINT32 conformanceSize; + TPM_PUBKEY identityKey; + UINT8 *labelArea; + UINT8 *identityBinding; + UINT8 *endorsementCredential; + UINT8 *platformCredential; + UINT8 *conformanceCredential; +} TPM_IDENTITY_PROOF; + +/// +/// Part 2, section 12.8 TPM_ASYM_CA_CONTENTS +/// +typedef struct tdTPM_ASYM_CA_CONTENTS { + TPM_SYMMETRIC_KEY sessionKey; + TPM_DIGEST idDigest; +} TPM_ASYM_CA_CONTENTS; + +/// +/// Part 2, section 12.9 TPM_SYM_CA_ATTESTATION +/// +typedef struct tdTPM_SYM_CA_ATTESTATION { + UINT32 credSize; + TPM_KEY_PARMS algorithm; + UINT8 *credential; +} TPM_SYM_CA_ATTESTATION; + +/// +/// Part 2, section 15: Tick Structures +/// Placed here out of order because definitions are used in section 13. +/// +typedef struct tdTPM_CURRENT_TICKS { + TPM_STRUCTURE_TAG tag; + UINT64 currentTicks; + UINT16 tickRate; + TPM_NONCE tickNonce; +} TPM_CURRENT_TICKS; + +/// +/// Part 2, section 13: Transport structures +/// + +/// +/// Part 2, section 13.1: TPM _TRANSPORT_PUBLIC +/// +typedef struct tdTPM_TRANSPORT_PUBLIC { + TPM_STRUCTURE_TAG tag; + TPM_TRANSPORT_ATTRIBUTES transAttributes; + TPM_ALGORITHM_ID algId; + TPM_ENC_SCHEME encScheme; +} TPM_TRANSPORT_PUBLIC; + +// +// Part 2, section 13.1.1 TPM_TRANSPORT_ATTRIBUTES Definitions +// +#define TPM_TRANSPORT_ENCRYPT ((UINT32)BIT0) +#define TPM_TRANSPORT_LOG ((UINT32)BIT1) +#define TPM_TRANSPORT_EXCLUSIVE ((UINT32)BIT2) + +/// +/// Part 2, section 13.2 TPM_TRANSPORT_INTERNAL +/// +typedef struct tdTPM_TRANSPORT_INTERNAL { + TPM_STRUCTURE_TAG tag; + TPM_AUTHDATA authData; + TPM_TRANSPORT_PUBLIC transPublic; + TPM_TRANSHANDLE transHandle; + TPM_NONCE transNonceEven; + TPM_DIGEST transDigest; +} TPM_TRANSPORT_INTERNAL; + +/// +/// Part 2, section 13.3 TPM_TRANSPORT_LOG_IN structure +/// +typedef struct tdTPM_TRANSPORT_LOG_IN { + TPM_STRUCTURE_TAG tag; + TPM_DIGEST parameters; + TPM_DIGEST pubKeyHash; +} TPM_TRANSPORT_LOG_IN; + +/// +/// Part 2, section 13.4 TPM_TRANSPORT_LOG_OUT structure +/// +typedef struct tdTPM_TRANSPORT_LOG_OUT { + TPM_STRUCTURE_TAG tag; + TPM_CURRENT_TICKS currentTicks; + TPM_DIGEST parameters; + TPM_MODIFIER_INDICATOR locality; +} TPM_TRANSPORT_LOG_OUT; + +/// +/// Part 2, section 13.5 TPM_TRANSPORT_AUTH structure +/// +typedef struct tdTPM_TRANSPORT_AUTH { + TPM_STRUCTURE_TAG tag; + TPM_AUTHDATA authData; +} TPM_TRANSPORT_AUTH; + +// +// Part 2, section 14: Audit Structures +// + +/// +/// Part 2, section 14.1 TPM_AUDIT_EVENT_IN structure +/// +typedef struct tdTPM_AUDIT_EVENT_IN { + TPM_STRUCTURE_TAG tag; + TPM_DIGEST inputParms; + TPM_COUNTER_VALUE auditCount; +} TPM_AUDIT_EVENT_IN; + +/// +/// Part 2, section 14.2 TPM_AUDIT_EVENT_OUT structure +/// +typedef struct tdTPM_AUDIT_EVENT_OUT { + TPM_STRUCTURE_TAG tag; + TPM_COMMAND_CODE ordinal; + TPM_DIGEST outputParms; + TPM_COUNTER_VALUE auditCount; + TPM_RESULT returnCode; +} TPM_AUDIT_EVENT_OUT; + +// +// Part 2, section 16: Return Codes +// + +#define TPM_VENDOR_ERROR TPM_Vendor_Specific32 +#define TPM_NON_FATAL 0x00000800 + +#define TPM_SUCCESS ((TPM_RESULT) TPM_BASE) +#define TPM_AUTHFAIL ((TPM_RESULT) (TPM_BASE + 1)) +#define TPM_BADINDEX ((TPM_RESULT) (TPM_BASE + 2)) +#define TPM_BAD_PARAMETER ((TPM_RESULT) (TPM_BASE + 3)) +#define TPM_AUDITFAILURE ((TPM_RESULT) (TPM_BASE + 4)) +#define TPM_CLEAR_DISABLED ((TPM_RESULT) (TPM_BASE + 5)) +#define TPM_DEACTIVATED ((TPM_RESULT) (TPM_BASE + 6)) +#define TPM_DISABLED ((TPM_RESULT) (TPM_BASE + 7)) +#define TPM_DISABLED_CMD ((TPM_RESULT) (TPM_BASE + 8)) +#define TPM_FAIL ((TPM_RESULT) (TPM_BASE + 9)) +#define TPM_BAD_ORDINAL ((TPM_RESULT) (TPM_BASE + 10)) +#define TPM_INSTALL_DISABLED ((TPM_RESULT) (TPM_BASE + 11)) +#define TPM_INVALID_KEYHANDLE ((TPM_RESULT) (TPM_BASE + 12)) +#define TPM_KEYNOTFOUND ((TPM_RESULT) (TPM_BASE + 13)) +#define TPM_INAPPROPRIATE_ENC ((TPM_RESULT) (TPM_BASE + 14)) +#define TPM_MIGRATEFAIL ((TPM_RESULT) (TPM_BASE + 15)) +#define TPM_INVALID_PCR_INFO ((TPM_RESULT) (TPM_BASE + 16)) +#define TPM_NOSPACE ((TPM_RESULT) (TPM_BASE + 17)) +#define TPM_NOSRK ((TPM_RESULT) (TPM_BASE + 18)) +#define TPM_NOTSEALED_BLOB ((TPM_RESULT) (TPM_BASE + 19)) +#define TPM_OWNER_SET ((TPM_RESULT) (TPM_BASE + 20)) +#define TPM_RESOURCES ((TPM_RESULT) (TPM_BASE + 21)) +#define TPM_SHORTRANDOM ((TPM_RESULT) (TPM_BASE + 22)) +#define TPM_SIZE ((TPM_RESULT) (TPM_BASE + 23)) +#define TPM_WRONGPCRVAL ((TPM_RESULT) (TPM_BASE + 24)) +#define TPM_BAD_PARAM_SIZE ((TPM_RESULT) (TPM_BASE + 25)) +#define TPM_SHA_THREAD ((TPM_RESULT) (TPM_BASE + 26)) +#define TPM_SHA_ERROR ((TPM_RESULT) (TPM_BASE + 27)) +#define TPM_FAILEDSELFTEST ((TPM_RESULT) (TPM_BASE + 28)) +#define TPM_AUTH2FAIL ((TPM_RESULT) (TPM_BASE + 29)) +#define TPM_BADTAG ((TPM_RESULT) (TPM_BASE + 30)) +#define TPM_IOERROR ((TPM_RESULT) (TPM_BASE + 31)) +#define TPM_ENCRYPT_ERROR ((TPM_RESULT) (TPM_BASE + 32)) +#define TPM_DECRYPT_ERROR ((TPM_RESULT) (TPM_BASE + 33)) +#define TPM_INVALID_AUTHHANDLE ((TPM_RESULT) (TPM_BASE + 34)) +#define TPM_NO_ENDORSEMENT ((TPM_RESULT) (TPM_BASE + 35)) +#define TPM_INVALID_KEYUSAGE ((TPM_RESULT) (TPM_BASE + 36)) +#define TPM_WRONG_ENTITYTYPE ((TPM_RESULT) (TPM_BASE + 37)) +#define TPM_INVALID_POSTINIT ((TPM_RESULT) (TPM_BASE + 38)) +#define TPM_INAPPROPRIATE_SIG ((TPM_RESULT) (TPM_BASE + 39)) +#define TPM_BAD_KEY_PROPERTY ((TPM_RESULT) (TPM_BASE + 40)) +#define TPM_BAD_MIGRATION ((TPM_RESULT) (TPM_BASE + 41)) +#define TPM_BAD_SCHEME ((TPM_RESULT) (TPM_BASE + 42)) +#define TPM_BAD_DATASIZE ((TPM_RESULT) (TPM_BASE + 43)) +#define TPM_BAD_MODE ((TPM_RESULT) (TPM_BASE + 44)) +#define TPM_BAD_PRESENCE ((TPM_RESULT) (TPM_BASE + 45)) +#define TPM_BAD_VERSION ((TPM_RESULT) (TPM_BASE + 46)) +#define TPM_NO_WRAP_TRANSPORT ((TPM_RESULT) (TPM_BASE + 47)) +#define TPM_AUDITFAIL_UNSUCCESSFUL ((TPM_RESULT) (TPM_BASE + 48)) +#define TPM_AUDITFAIL_SUCCESSFUL ((TPM_RESULT) (TPM_BASE + 49)) +#define TPM_NOTRESETABLE ((TPM_RESULT) (TPM_BASE + 50)) +#define TPM_NOTLOCAL ((TPM_RESULT) (TPM_BASE + 51)) +#define TPM_BAD_TYPE ((TPM_RESULT) (TPM_BASE + 52)) +#define TPM_INVALID_RESOURCE ((TPM_RESULT) (TPM_BASE + 53)) +#define TPM_NOTFIPS ((TPM_RESULT) (TPM_BASE + 54)) +#define TPM_INVALID_FAMILY ((TPM_RESULT) (TPM_BASE + 55)) +#define TPM_NO_NV_PERMISSION ((TPM_RESULT) (TPM_BASE + 56)) +#define TPM_REQUIRES_SIGN ((TPM_RESULT) (TPM_BASE + 57)) +#define TPM_KEY_NOTSUPPORTED ((TPM_RESULT) (TPM_BASE + 58)) +#define TPM_AUTH_CONFLICT ((TPM_RESULT) (TPM_BASE + 59)) +#define TPM_AREA_LOCKED ((TPM_RESULT) (TPM_BASE + 60)) +#define TPM_BAD_LOCALITY ((TPM_RESULT) (TPM_BASE + 61)) +#define TPM_READ_ONLY ((TPM_RESULT) (TPM_BASE + 62)) +#define TPM_PER_NOWRITE ((TPM_RESULT) (TPM_BASE + 63)) +#define TPM_FAMILYCOUNT ((TPM_RESULT) (TPM_BASE + 64)) +#define TPM_WRITE_LOCKED ((TPM_RESULT) (TPM_BASE + 65)) +#define TPM_BAD_ATTRIBUTES ((TPM_RESULT) (TPM_BASE + 66)) +#define TPM_INVALID_STRUCTURE ((TPM_RESULT) (TPM_BASE + 67)) +#define TPM_KEY_OWNER_CONTROL ((TPM_RESULT) (TPM_BASE + 68)) +#define TPM_BAD_COUNTER ((TPM_RESULT) (TPM_BASE + 69)) +#define TPM_NOT_FULLWRITE ((TPM_RESULT) (TPM_BASE + 70)) +#define TPM_CONTEXT_GAP ((TPM_RESULT) (TPM_BASE + 71)) +#define TPM_MAXNVWRITES ((TPM_RESULT) (TPM_BASE + 72)) +#define TPM_NOOPERATOR ((TPM_RESULT) (TPM_BASE + 73)) +#define TPM_RESOURCEMISSING ((TPM_RESULT) (TPM_BASE + 74)) +#define TPM_DELEGATE_LOCK ((TPM_RESULT) (TPM_BASE + 75)) +#define TPM_DELEGATE_FAMILY ((TPM_RESULT) (TPM_BASE + 76)) +#define TPM_DELEGATE_ADMIN ((TPM_RESULT) (TPM_BASE + 77)) +#define TPM_TRANSPORT_NOTEXCLUSIVE ((TPM_RESULT) (TPM_BASE + 78)) +#define TPM_OWNER_CONTROL ((TPM_RESULT) (TPM_BASE + 79)) +#define TPM_DAA_RESOURCES ((TPM_RESULT) (TPM_BASE + 80)) +#define TPM_DAA_INPUT_DATA0 ((TPM_RESULT) (TPM_BASE + 81)) +#define TPM_DAA_INPUT_DATA1 ((TPM_RESULT) (TPM_BASE + 82)) +#define TPM_DAA_ISSUER_SETTINGS ((TPM_RESULT) (TPM_BASE + 83)) +#define TPM_DAA_TPM_SETTINGS ((TPM_RESULT) (TPM_BASE + 84)) +#define TPM_DAA_STAGE ((TPM_RESULT) (TPM_BASE + 85)) +#define TPM_DAA_ISSUER_VALIDITY ((TPM_RESULT) (TPM_BASE + 86)) +#define TPM_DAA_WRONG_W ((TPM_RESULT) (TPM_BASE + 87)) +#define TPM_BAD_HANDLE ((TPM_RESULT) (TPM_BASE + 88)) +#define TPM_BAD_DELEGATE ((TPM_RESULT) (TPM_BASE + 89)) +#define TPM_BADCONTEXT ((TPM_RESULT) (TPM_BASE + 90)) +#define TPM_TOOMANYCONTEXTS ((TPM_RESULT) (TPM_BASE + 91)) +#define TPM_MA_TICKET_SIGNATURE ((TPM_RESULT) (TPM_BASE + 92)) +#define TPM_MA_DESTINATION ((TPM_RESULT) (TPM_BASE + 93)) +#define TPM_MA_SOURCE ((TPM_RESULT) (TPM_BASE + 94)) +#define TPM_MA_AUTHORITY ((TPM_RESULT) (TPM_BASE + 95)) +#define TPM_PERMANENTEK ((TPM_RESULT) (TPM_BASE + 97)) +#define TPM_BAD_SIGNATURE ((TPM_RESULT) (TPM_BASE + 98)) +#define TPM_NOCONTEXTSPACE ((TPM_RESULT) (TPM_BASE + 99)) + +#define TPM_RETRY ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL)) +#define TPM_NEEDS_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 1)) +#define TPM_DOING_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 2)) +#define TPM_DEFEND_LOCK_RUNNING ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 3)) + +// +// Part 2, section 17: Ordinals +// +// Ordinals are 32 bit values. The upper byte contains values that serve as +// flag indicators, the next byte contains values indicating what committee +// designated the ordinal, and the final two bytes contain the Command +// Ordinal Index. +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ +// |P|C|V| Reserved| Purview | Command Ordinal Index | +// +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ +// +// Where: +// +// * P is Protected/Unprotected command. When 0 the command is a Protected +// command, when 1 the command is an Unprotected command. +// +// * C is Non-Connection/Connection related command. When 0 this command +// passes through to either the protected (TPM) or unprotected (TSS) +// components. +// +// * V is TPM/Vendor command. When 0 the command is TPM defined, when 1 the +// command is vendor defined. +// +// * All reserved area bits are set to 0. +// + +#define TPM_ORD_ActivateIdentity ((TPM_COMMAND_CODE) 0x0000007A) +#define TPM_ORD_AuthorizeMigrationKey ((TPM_COMMAND_CODE) 0x0000002B) +#define TPM_ORD_CertifyKey ((TPM_COMMAND_CODE) 0x00000032) +#define TPM_ORD_CertifyKey2 ((TPM_COMMAND_CODE) 0x00000033) +#define TPM_ORD_CertifySelfTest ((TPM_COMMAND_CODE) 0x00000052) +#define TPM_ORD_ChangeAuth ((TPM_COMMAND_CODE) 0x0000000C) +#define TPM_ORD_ChangeAuthAsymFinish ((TPM_COMMAND_CODE) 0x0000000F) +#define TPM_ORD_ChangeAuthAsymStart ((TPM_COMMAND_CODE) 0x0000000E) +#define TPM_ORD_ChangeAuthOwner ((TPM_COMMAND_CODE) 0x00000010) +#define TPM_ORD_CMK_ApproveMA ((TPM_COMMAND_CODE) 0x0000001D) +#define TPM_ORD_CMK_ConvertMigration ((TPM_COMMAND_CODE) 0x00000024) +#define TPM_ORD_CMK_CreateBlob ((TPM_COMMAND_CODE) 0x0000001B) +#define TPM_ORD_CMK_CreateKey ((TPM_COMMAND_CODE) 0x00000013) +#define TPM_ORD_CMK_CreateTicket ((TPM_COMMAND_CODE) 0x00000012) +#define TPM_ORD_CMK_SetRestrictions ((TPM_COMMAND_CODE) 0x0000001C) +#define TPM_ORD_ContinueSelfTest ((TPM_COMMAND_CODE) 0x00000053) +#define TPM_ORD_ConvertMigrationBlob ((TPM_COMMAND_CODE) 0x0000002A) +#define TPM_ORD_CreateCounter ((TPM_COMMAND_CODE) 0x000000DC) +#define TPM_ORD_CreateEndorsementKeyPair ((TPM_COMMAND_CODE) 0x00000078) +#define TPM_ORD_CreateMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002C) +#define TPM_ORD_CreateMigrationBlob ((TPM_COMMAND_CODE) 0x00000028) +#define TPM_ORD_CreateRevocableEK ((TPM_COMMAND_CODE) 0x0000007F) +#define TPM_ORD_CreateWrapKey ((TPM_COMMAND_CODE) 0x0000001F) +#define TPM_ORD_DAA_JOIN ((TPM_COMMAND_CODE) 0x00000029) +#define TPM_ORD_DAA_SIGN ((TPM_COMMAND_CODE) 0x00000031) +#define TPM_ORD_Delegate_CreateKeyDelegation ((TPM_COMMAND_CODE) 0x000000D4) +#define TPM_ORD_Delegate_CreateOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D5) +#define TPM_ORD_Delegate_LoadOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D8) +#define TPM_ORD_Delegate_Manage ((TPM_COMMAND_CODE) 0x000000D2) +#define TPM_ORD_Delegate_ReadTable ((TPM_COMMAND_CODE) 0x000000DB) +#define TPM_ORD_Delegate_UpdateVerification ((TPM_COMMAND_CODE) 0x000000D1) +#define TPM_ORD_Delegate_VerifyDelegation ((TPM_COMMAND_CODE) 0x000000D6) +#define TPM_ORD_DirRead ((TPM_COMMAND_CODE) 0x0000001A) +#define TPM_ORD_DirWriteAuth ((TPM_COMMAND_CODE) 0x00000019) +#define TPM_ORD_DisableForceClear ((TPM_COMMAND_CODE) 0x0000005E) +#define TPM_ORD_DisableOwnerClear ((TPM_COMMAND_CODE) 0x0000005C) +#define TPM_ORD_DisablePubekRead ((TPM_COMMAND_CODE) 0x0000007E) +#define TPM_ORD_DSAP ((TPM_COMMAND_CODE) 0x00000011) +#define TPM_ORD_EstablishTransport ((TPM_COMMAND_CODE) 0x000000E6) +#define TPM_ORD_EvictKey ((TPM_COMMAND_CODE) 0x00000022) +#define TPM_ORD_ExecuteTransport ((TPM_COMMAND_CODE) 0x000000E7) +#define TPM_ORD_Extend ((TPM_COMMAND_CODE) 0x00000014) +#define TPM_ORD_FieldUpgrade ((TPM_COMMAND_CODE) 0x000000AA) +#define TPM_ORD_FlushSpecific ((TPM_COMMAND_CODE) 0x000000BA) +#define TPM_ORD_ForceClear ((TPM_COMMAND_CODE) 0x0000005D) +#define TPM_ORD_GetAuditDigest ((TPM_COMMAND_CODE) 0x00000085) +#define TPM_ORD_GetAuditDigestSigned ((TPM_COMMAND_CODE) 0x00000086) +#define TPM_ORD_GetAuditEvent ((TPM_COMMAND_CODE) 0x00000082) +#define TPM_ORD_GetAuditEventSigned ((TPM_COMMAND_CODE) 0x00000083) +#define TPM_ORD_GetCapability ((TPM_COMMAND_CODE) 0x00000065) +#define TPM_ORD_GetCapabilityOwner ((TPM_COMMAND_CODE) 0x00000066) +#define TPM_ORD_GetCapabilitySigned ((TPM_COMMAND_CODE) 0x00000064) +#define TPM_ORD_GetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008C) +#define TPM_ORD_GetPubKey ((TPM_COMMAND_CODE) 0x00000021) +#define TPM_ORD_GetRandom ((TPM_COMMAND_CODE) 0x00000046) +#define TPM_ORD_GetTestResult ((TPM_COMMAND_CODE) 0x00000054) +#define TPM_ORD_GetTicks ((TPM_COMMAND_CODE) 0x000000F1) +#define TPM_ORD_IncrementCounter ((TPM_COMMAND_CODE) 0x000000DD) +#define TPM_ORD_Init ((TPM_COMMAND_CODE) 0x00000097) +#define TPM_ORD_KeyControlOwner ((TPM_COMMAND_CODE) 0x00000023) +#define TPM_ORD_KillMaintenanceFeature ((TPM_COMMAND_CODE) 0x0000002E) +#define TPM_ORD_LoadAuthContext ((TPM_COMMAND_CODE) 0x000000B7) +#define TPM_ORD_LoadContext ((TPM_COMMAND_CODE) 0x000000B9) +#define TPM_ORD_LoadKey ((TPM_COMMAND_CODE) 0x00000020) +#define TPM_ORD_LoadKey2 ((TPM_COMMAND_CODE) 0x00000041) +#define TPM_ORD_LoadKeyContext ((TPM_COMMAND_CODE) 0x000000B5) +#define TPM_ORD_LoadMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002D) +#define TPM_ORD_LoadManuMaintPub ((TPM_COMMAND_CODE) 0x0000002F) +#define TPM_ORD_MakeIdentity ((TPM_COMMAND_CODE) 0x00000079) +#define TPM_ORD_MigrateKey ((TPM_COMMAND_CODE) 0x00000025) +#define TPM_ORD_NV_DefineSpace ((TPM_COMMAND_CODE) 0x000000CC) +#define TPM_ORD_NV_ReadValue ((TPM_COMMAND_CODE) 0x000000CF) +#define TPM_ORD_NV_ReadValueAuth ((TPM_COMMAND_CODE) 0x000000D0) +#define TPM_ORD_NV_WriteValue ((TPM_COMMAND_CODE) 0x000000CD) +#define TPM_ORD_NV_WriteValueAuth ((TPM_COMMAND_CODE) 0x000000CE) +#define TPM_ORD_OIAP ((TPM_COMMAND_CODE) 0x0000000A) +#define TPM_ORD_OSAP ((TPM_COMMAND_CODE) 0x0000000B) +#define TPM_ORD_OwnerClear ((TPM_COMMAND_CODE) 0x0000005B) +#define TPM_ORD_OwnerReadInternalPub ((TPM_COMMAND_CODE) 0x00000081) +#define TPM_ORD_OwnerReadPubek ((TPM_COMMAND_CODE) 0x0000007D) +#define TPM_ORD_OwnerSetDisable ((TPM_COMMAND_CODE) 0x0000006E) +#define TPM_ORD_PCR_Reset ((TPM_COMMAND_CODE) 0x000000C8) +#define TPM_ORD_PcrRead ((TPM_COMMAND_CODE) 0x00000015) +#define TPM_ORD_PhysicalDisable ((TPM_COMMAND_CODE) 0x00000070) +#define TPM_ORD_PhysicalEnable ((TPM_COMMAND_CODE) 0x0000006F) +#define TPM_ORD_PhysicalSetDeactivated ((TPM_COMMAND_CODE) 0x00000072) +#define TPM_ORD_Quote ((TPM_COMMAND_CODE) 0x00000016) +#define TPM_ORD_Quote2 ((TPM_COMMAND_CODE) 0x0000003E) +#define TPM_ORD_ReadCounter ((TPM_COMMAND_CODE) 0x000000DE) +#define TPM_ORD_ReadManuMaintPub ((TPM_COMMAND_CODE) 0x00000030) +#define TPM_ORD_ReadPubek ((TPM_COMMAND_CODE) 0x0000007C) +#define TPM_ORD_ReleaseCounter ((TPM_COMMAND_CODE) 0x000000DF) +#define TPM_ORD_ReleaseCounterOwner ((TPM_COMMAND_CODE) 0x000000E0) +#define TPM_ORD_ReleaseTransportSigned ((TPM_COMMAND_CODE) 0x000000E8) +#define TPM_ORD_Reset ((TPM_COMMAND_CODE) 0x0000005A) +#define TPM_ORD_ResetLockValue ((TPM_COMMAND_CODE) 0x00000040) +#define TPM_ORD_RevokeTrust ((TPM_COMMAND_CODE) 0x00000080) +#define TPM_ORD_SaveAuthContext ((TPM_COMMAND_CODE) 0x000000B6) +#define TPM_ORD_SaveContext ((TPM_COMMAND_CODE) 0x000000B8) +#define TPM_ORD_SaveKeyContext ((TPM_COMMAND_CODE) 0x000000B4) +#define TPM_ORD_SaveState ((TPM_COMMAND_CODE) 0x00000098) +#define TPM_ORD_Seal ((TPM_COMMAND_CODE) 0x00000017) +#define TPM_ORD_Sealx ((TPM_COMMAND_CODE) 0x0000003D) +#define TPM_ORD_SelfTestFull ((TPM_COMMAND_CODE) 0x00000050) +#define TPM_ORD_SetCapability ((TPM_COMMAND_CODE) 0x0000003F) +#define TPM_ORD_SetOperatorAuth ((TPM_COMMAND_CODE) 0x00000074) +#define TPM_ORD_SetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008D) +#define TPM_ORD_SetOwnerInstall ((TPM_COMMAND_CODE) 0x00000071) +#define TPM_ORD_SetOwnerPointer ((TPM_COMMAND_CODE) 0x00000075) +#define TPM_ORD_SetRedirection ((TPM_COMMAND_CODE) 0x0000009A) +#define TPM_ORD_SetTempDeactivated ((TPM_COMMAND_CODE) 0x00000073) +#define TPM_ORD_SHA1Complete ((TPM_COMMAND_CODE) 0x000000A2) +#define TPM_ORD_SHA1CompleteExtend ((TPM_COMMAND_CODE) 0x000000A3) +#define TPM_ORD_SHA1Start ((TPM_COMMAND_CODE) 0x000000A0) +#define TPM_ORD_SHA1Update ((TPM_COMMAND_CODE) 0x000000A1) +#define TPM_ORD_Sign ((TPM_COMMAND_CODE) 0x0000003C) +#define TPM_ORD_Startup ((TPM_COMMAND_CODE) 0x00000099) +#define TPM_ORD_StirRandom ((TPM_COMMAND_CODE) 0x00000047) +#define TPM_ORD_TakeOwnership ((TPM_COMMAND_CODE) 0x0000000D) +#define TPM_ORD_Terminate_Handle ((TPM_COMMAND_CODE) 0x00000096) +#define TPM_ORD_TickStampBlob ((TPM_COMMAND_CODE) 0x000000F2) +#define TPM_ORD_UnBind ((TPM_COMMAND_CODE) 0x0000001E) +#define TPM_ORD_Unseal ((TPM_COMMAND_CODE) 0x00000018) +#define TSC_ORD_PhysicalPresence ((TPM_COMMAND_CODE) 0x4000000A) +#define TSC_ORD_ResetEstablishmentBit ((TPM_COMMAND_CODE) 0x4000000B) + +// +// Part 2, section 18: Context structures +// + +/// +/// Part 2, section 18.1: TPM_CONTEXT_BLOB +/// +typedef struct tdTPM_CONTEXT_BLOB { + TPM_STRUCTURE_TAG tag; + TPM_RESOURCE_TYPE resourceType; + TPM_HANDLE handle; + UINT8 label[16]; + UINT32 contextCount; + TPM_DIGEST integrityDigest; + UINT32 additionalSize; + UINT8 *additionalData; + UINT32 sensitiveSize; + UINT8 *sensitiveData; +} TPM_CONTEXT_BLOB; + +/// +/// Part 2, section 18.2 TPM_CONTEXT_SENSITIVE +/// +typedef struct tdTPM_CONTEXT_SENSITIVE { + TPM_STRUCTURE_TAG tag; + TPM_NONCE contextNonce; + UINT32 internalSize; + UINT8 *internalData; +} TPM_CONTEXT_SENSITIVE; + +// +// Part 2, section 19: NV Structures +// + +// +// Part 2, section 19.1.1: Required TPM_NV_INDEX values +// +#define TPM_NV_INDEX_LOCK ((UINT32)0xffffffff) +#define TPM_NV_INDEX0 ((UINT32)0x00000000) +#define TPM_NV_INDEX_DIR ((UINT32)0x10000001) +#define TPM_NV_INDEX_EKCert ((UINT32)0x0000f000) +#define TPM_NV_INDEX_TPM_CC ((UINT32)0x0000f001) +#define TPM_NV_INDEX_PlatformCert ((UINT32)0x0000f002) +#define TPM_NV_INDEX_Platform_CC ((UINT32)0x0000f003) +// +// Part 2, section 19.1.2: Reserved Index values +// +#define TPM_NV_INDEX_TSS_BASE ((UINT32)0x00011100) +#define TPM_NV_INDEX_PC_BASE ((UINT32)0x00011200) +#define TPM_NV_INDEX_SERVER_BASE ((UINT32)0x00011300) +#define TPM_NV_INDEX_MOBILE_BASE ((UINT32)0x00011400) +#define TPM_NV_INDEX_PERIPHERAL_BASE ((UINT32)0x00011500) +#define TPM_NV_INDEX_GROUP_RESV_BASE ((UINT32)0x00010000) + +/// +/// Part 2, section 19.2: TPM_NV_ATTRIBUTES +/// +typedef struct tdTPM_NV_ATTRIBUTES { + TPM_STRUCTURE_TAG tag; + UINT32 attributes; +} TPM_NV_ATTRIBUTES; + +#define TPM_NV_PER_READ_STCLEAR (BIT31) +#define TPM_NV_PER_AUTHREAD (BIT18) +#define TPM_NV_PER_OWNERREAD (BIT17) +#define TPM_NV_PER_PPREAD (BIT16) +#define TPM_NV_PER_GLOBALLOCK (BIT15) +#define TPM_NV_PER_WRITE_STCLEAR (BIT14) +#define TPM_NV_PER_WRITEDEFINE (BIT13) +#define TPM_NV_PER_WRITEALL (BIT12) +#define TPM_NV_PER_AUTHWRITE (BIT2) +#define TPM_NV_PER_OWNERWRITE (BIT1) +#define TPM_NV_PER_PPWRITE (BIT0) + +/// +/// Part 2, section 19.3: TPM_NV_DATA_PUBLIC +/// +typedef struct tdTPM_NV_DATA_PUBLIC { + TPM_STRUCTURE_TAG tag; + TPM_NV_INDEX nvIndex; + TPM_PCR_INFO_SHORT pcrInfoRead; + TPM_PCR_INFO_SHORT pcrInfoWrite; + TPM_NV_ATTRIBUTES permission; + BOOLEAN bReadSTClear; + BOOLEAN bWriteSTClear; + BOOLEAN bWriteDefine; + UINT32 dataSize; +} TPM_NV_DATA_PUBLIC; + +// +// Part 2, section 20: Delegate Structures +// + +#define TPM_DEL_OWNER_BITS ((UINT32)0x00000001) +#define TPM_DEL_KEY_BITS ((UINT32)0x00000002) +/// +/// Part 2, section 20.2: Delegate Definitions +/// +typedef struct tdTPM_DELEGATIONS { + TPM_STRUCTURE_TAG tag; + UINT32 delegateType; + UINT32 per1; + UINT32 per2; +} TPM_DELEGATIONS; + +// +// Part 2, section 20.2.1: Owner Permission Settings +// +#define TPM_DELEGATE_SetOrdinalAuditStatus (BIT30) +#define TPM_DELEGATE_DirWriteAuth (BIT29) +#define TPM_DELEGATE_CMK_ApproveMA (BIT28) +#define TPM_DELEGATE_NV_WriteValue (BIT27) +#define TPM_DELEGATE_CMK_CreateTicket (BIT26) +#define TPM_DELEGATE_NV_ReadValue (BIT25) +#define TPM_DELEGATE_Delegate_LoadOwnerDelegation (BIT24) +#define TPM_DELEGATE_DAA_Join (BIT23) +#define TPM_DELEGATE_AuthorizeMigrationKey (BIT22) +#define TPM_DELEGATE_CreateMaintenanceArchive (BIT21) +#define TPM_DELEGATE_LoadMaintenanceArchive (BIT20) +#define TPM_DELEGATE_KillMaintenanceFeature (BIT19) +#define TPM_DELEGATE_OwnerReadInteralPub (BIT18) +#define TPM_DELEGATE_ResetLockValue (BIT17) +#define TPM_DELEGATE_OwnerClear (BIT16) +#define TPM_DELEGATE_DisableOwnerClear (BIT15) +#define TPM_DELEGATE_NV_DefineSpace (BIT14) +#define TPM_DELEGATE_OwnerSetDisable (BIT13) +#define TPM_DELEGATE_SetCapability (BIT12) +#define TPM_DELEGATE_MakeIdentity (BIT11) +#define TPM_DELEGATE_ActivateIdentity (BIT10) +#define TPM_DELEGATE_OwnerReadPubek (BIT9) +#define TPM_DELEGATE_DisablePubekRead (BIT8) +#define TPM_DELEGATE_SetRedirection (BIT7) +#define TPM_DELEGATE_FieldUpgrade (BIT6) +#define TPM_DELEGATE_Delegate_UpdateVerification (BIT5) +#define TPM_DELEGATE_CreateCounter (BIT4) +#define TPM_DELEGATE_ReleaseCounterOwner (BIT3) +#define TPM_DELEGATE_DelegateManage (BIT2) +#define TPM_DELEGATE_Delegate_CreateOwnerDelegation (BIT1) +#define TPM_DELEGATE_DAA_Sign (BIT0) + +// +// Part 2, section 20.2.3: Key Permission settings +// +#define TPM_KEY_DELEGATE_CMK_ConvertMigration (BIT28) +#define TPM_KEY_DELEGATE_TickStampBlob (BIT27) +#define TPM_KEY_DELEGATE_ChangeAuthAsymStart (BIT26) +#define TPM_KEY_DELEGATE_ChangeAuthAsymFinish (BIT25) +#define TPM_KEY_DELEGATE_CMK_CreateKey (BIT24) +#define TPM_KEY_DELEGATE_MigrateKey (BIT23) +#define TPM_KEY_DELEGATE_LoadKey2 (BIT22) +#define TPM_KEY_DELEGATE_EstablishTransport (BIT21) +#define TPM_KEY_DELEGATE_ReleaseTransportSigned (BIT20) +#define TPM_KEY_DELEGATE_Quote2 (BIT19) +#define TPM_KEY_DELEGATE_Sealx (BIT18) +#define TPM_KEY_DELEGATE_MakeIdentity (BIT17) +#define TPM_KEY_DELEGATE_ActivateIdentity (BIT16) +#define TPM_KEY_DELEGATE_GetAuditDigestSigned (BIT15) +#define TPM_KEY_DELEGATE_Sign (BIT14) +#define TPM_KEY_DELEGATE_CertifyKey2 (BIT13) +#define TPM_KEY_DELEGATE_CertifyKey (BIT12) +#define TPM_KEY_DELEGATE_CreateWrapKey (BIT11) +#define TPM_KEY_DELEGATE_CMK_CreateBlob (BIT10) +#define TPM_KEY_DELEGATE_CreateMigrationBlob (BIT9) +#define TPM_KEY_DELEGATE_ConvertMigrationBlob (BIT8) +#define TPM_KEY_DELEGATE_CreateKeyDelegation (BIT7) +#define TPM_KEY_DELEGATE_ChangeAuth (BIT6) +#define TPM_KEY_DELEGATE_GetPubKey (BIT5) +#define TPM_KEY_DELEGATE_UnBind (BIT4) +#define TPM_KEY_DELEGATE_Quote (BIT3) +#define TPM_KEY_DELEGATE_Unseal (BIT2) +#define TPM_KEY_DELEGATE_Seal (BIT1) +#define TPM_KEY_DELEGATE_LoadKey (BIT0) + +// +// Part 2, section 20.3: TPM_FAMILY_FLAGS +// +#define TPM_DELEGATE_ADMIN_LOCK (BIT1) +#define TPM_FAMFLAG_ENABLE (BIT0) + +/// +/// Part 2, section 20.4: TPM_FAMILY_LABEL +/// +typedef struct tdTPM_FAMILY_LABEL { + UINT8 label; +} TPM_FAMILY_LABEL; + +/// +/// Part 2, section 20.5: TPM_FAMILY_TABLE_ENTRY +/// +typedef struct tdTPM_FAMILY_TABLE_ENTRY { + TPM_STRUCTURE_TAG tag; + TPM_FAMILY_LABEL label; + TPM_FAMILY_ID familyID; + TPM_FAMILY_VERIFICATION verificationCount; + TPM_FAMILY_FLAGS flags; +} TPM_FAMILY_TABLE_ENTRY; + +// +// Part 2, section 20.6: TPM_FAMILY_TABLE +// +#define TPM_NUM_FAMILY_TABLE_ENTRY_MIN 8 + +typedef struct tdTPM_FAMILY_TABLE{ + TPM_FAMILY_TABLE_ENTRY famTableRow[TPM_NUM_FAMILY_TABLE_ENTRY_MIN]; +} TPM_FAMILY_TABLE; + +/// +/// Part 2, section 20.7: TPM_DELEGATE_LABEL +/// +typedef struct tdTPM_DELEGATE_LABEL { + UINT8 label; +} TPM_DELEGATE_LABEL; + +/// +/// Part 2, section 20.8: TPM_DELEGATE_PUBLIC +/// +typedef struct tdTPM_DELEGATE_PUBLIC { + TPM_STRUCTURE_TAG tag; + TPM_DELEGATE_LABEL label; + TPM_PCR_INFO_SHORT pcrInfo; + TPM_DELEGATIONS permissions; + TPM_FAMILY_ID familyID; + TPM_FAMILY_VERIFICATION verificationCount; +} TPM_DELEGATE_PUBLIC; + +/// +/// Part 2, section 20.9: TPM_DELEGATE_TABLE_ROW +/// +typedef struct tdTPM_DELEGATE_TABLE_ROW { + TPM_STRUCTURE_TAG tag; + TPM_DELEGATE_PUBLIC pub; + TPM_SECRET authValue; +} TPM_DELEGATE_TABLE_ROW; + +// +// Part 2, section 20.10: TPM_DELEGATE_TABLE +// +#define TPM_NUM_DELEGATE_TABLE_ENTRY_MIN 2 + +typedef struct tdTPM_DELEGATE_TABLE{ + TPM_DELEGATE_TABLE_ROW delRow[TPM_NUM_DELEGATE_TABLE_ENTRY_MIN]; +} TPM_DELEGATE_TABLE; + +/// +/// Part 2, section 20.11: TPM_DELEGATE_SENSITIVE +/// +typedef struct tdTPM_DELEGATE_SENSITIVE { + TPM_STRUCTURE_TAG tag; + TPM_SECRET authValue; +} TPM_DELEGATE_SENSITIVE; + +/// +/// Part 2, section 20.12: TPM_DELEGATE_OWNER_BLOB +/// +typedef struct tdTPM_DELEGATE_OWNER_BLOB { + TPM_STRUCTURE_TAG tag; + TPM_DELEGATE_PUBLIC pub; + TPM_DIGEST integrityDigest; + UINT32 additionalSize; + UINT8 *additionalArea; + UINT32 sensitiveSize; + UINT8 *sensitiveArea; +} TPM_DELEGATE_OWNER_BLOB; + +/// +/// Part 2, section 20.13: TTPM_DELEGATE_KEY_BLOB +/// +typedef struct tdTPM_DELEGATE_KEY_BLOB { + TPM_STRUCTURE_TAG tag; + TPM_DELEGATE_PUBLIC pub; + TPM_DIGEST integrityDigest; + TPM_DIGEST pubKeyDigest; + UINT32 additionalSize; + UINT8 *additionalArea; + UINT32 sensitiveSize; + UINT8 *sensitiveArea; +} TPM_DELEGATE_KEY_BLOB; + +// +// Part 2, section 20.14: TPM_FAMILY_OPERATION Values +// +#define TPM_FAMILY_CREATE ((UINT32)0x00000001) +#define TPM_FAMILY_ENABLE ((UINT32)0x00000002) +#define TPM_FAMILY_ADMIN ((UINT32)0x00000003) +#define TPM_FAMILY_INVALIDATE ((UINT32)0x00000004) + +// +// Part 2, section 21.1: TPM_CAPABILITY_AREA for GetCapability +// +#define TPM_CAP_ORD ((TPM_CAPABILITY_AREA) 0x00000001) +#define TPM_CAP_ALG ((TPM_CAPABILITY_AREA) 0x00000002) +#define TPM_CAP_PID ((TPM_CAPABILITY_AREA) 0x00000003) +#define TPM_CAP_FLAG ((TPM_CAPABILITY_AREA) 0x00000004) +#define TPM_CAP_PROPERTY ((TPM_CAPABILITY_AREA) 0x00000005) +#define TPM_CAP_VERSION ((TPM_CAPABILITY_AREA) 0x00000006) +#define TPM_CAP_KEY_HANDLE ((TPM_CAPABILITY_AREA) 0x00000007) +#define TPM_CAP_CHECK_LOADED ((TPM_CAPABILITY_AREA) 0x00000008) +#define TPM_CAP_SYM_MODE ((TPM_CAPABILITY_AREA) 0x00000009) +#define TPM_CAP_KEY_STATUS ((TPM_CAPABILITY_AREA) 0x0000000C) +#define TPM_CAP_NV_LIST ((TPM_CAPABILITY_AREA) 0x0000000D) +#define TPM_CAP_MFR ((TPM_CAPABILITY_AREA) 0x00000010) +#define TPM_CAP_NV_INDEX ((TPM_CAPABILITY_AREA) 0x00000011) +#define TPM_CAP_TRANS_ALG ((TPM_CAPABILITY_AREA) 0x00000012) +#define TPM_CAP_HANDLE ((TPM_CAPABILITY_AREA) 0x00000014) +#define TPM_CAP_TRANS_ES ((TPM_CAPABILITY_AREA) 0x00000015) +#define TPM_CAP_AUTH_ENCRYPT ((TPM_CAPABILITY_AREA) 0x00000017) +#define TPM_CAP_SELECT_SIZE ((TPM_CAPABILITY_AREA) 0x00000018) +#define TPM_CAP_VERSION_VAL ((TPM_CAPABILITY_AREA) 0x0000001A) + +#define TPM_CAP_FLAG_PERMANENT ((TPM_CAPABILITY_AREA) 0x00000108) +#define TPM_CAP_FLAG_VOLATILE ((TPM_CAPABILITY_AREA) 0x00000109) + +// +// Part 2, section 21.2: CAP_PROPERTY Subcap values for GetCapability +// +#define TPM_CAP_PROP_PCR ((TPM_CAPABILITY_AREA) 0x00000101) +#define TPM_CAP_PROP_DIR ((TPM_CAPABILITY_AREA) 0x00000102) +#define TPM_CAP_PROP_MANUFACTURER ((TPM_CAPABILITY_AREA) 0x00000103) +#define TPM_CAP_PROP_KEYS ((TPM_CAPABILITY_AREA) 0x00000104) +#define TPM_CAP_PROP_MIN_COUNTER ((TPM_CAPABILITY_AREA) 0x00000107) +#define TPM_CAP_PROP_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010A) +#define TPM_CAP_PROP_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010B) +#define TPM_CAP_PROP_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010C) +#define TPM_CAP_PROP_MAX_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010D) +#define TPM_CAP_PROP_MAX_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010E) +#define TPM_CAP_PROP_MAX_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010F) +#define TPM_CAP_PROP_MAX_KEYS ((TPM_CAPABILITY_AREA) 0x00000110) +#define TPM_CAP_PROP_OWNER ((TPM_CAPABILITY_AREA) 0x00000111) +#define TPM_CAP_PROP_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000112) +#define TPM_CAP_PROP_MAX_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000113) +#define TPM_CAP_PROP_FAMILYROWS ((TPM_CAPABILITY_AREA) 0x00000114) +#define TPM_CAP_PROP_TIS_TIMEOUT ((TPM_CAPABILITY_AREA) 0x00000115) +#define TPM_CAP_PROP_STARTUP_EFFECT ((TPM_CAPABILITY_AREA) 0x00000116) +#define TPM_CAP_PROP_DELEGATE_ROW ((TPM_CAPABILITY_AREA) 0x00000117) +#define TPM_CAP_PROP_DAA_MAX ((TPM_CAPABILITY_AREA) 0x00000119) +#define CAP_PROP_SESSION_DAA ((TPM_CAPABILITY_AREA) 0x0000011A) +#define TPM_CAP_PROP_CONTEXT_DIST ((TPM_CAPABILITY_AREA) 0x0000011B) +#define TPM_CAP_PROP_DAA_INTERRUPT ((TPM_CAPABILITY_AREA) 0x0000011C) +#define TPM_CAP_PROP_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011D) +#define TPM_CAP_PROP_MAX_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011E) +#define TPM_CAP_PROP_CMK_RESTRICTION ((TPM_CAPABILITY_AREA) 0x0000011F) +#define TPM_CAP_PROP_DURATION ((TPM_CAPABILITY_AREA) 0x00000120) +#define TPM_CAP_PROP_ACTIVE_COUNTER ((TPM_CAPABILITY_AREA) 0x00000122) +#define TPM_CAP_PROP_MAX_NV_AVAILABLE ((TPM_CAPABILITY_AREA) 0x00000123) +#define TPM_CAP_PROP_INPUT_BUFFER ((TPM_CAPABILITY_AREA) 0x00000124) + +// +// Part 2, section 21.4: TPM_CAPABILITY_AREA for SetCapability +// +#define TPM_SET_PERM_FLAGS ((TPM_CAPABILITY_AREA) 0x00000001) +#define TPM_SET_PERM_DATA ((TPM_CAPABILITY_AREA) 0x00000002) +#define TPM_SET_STCLEAR_FLAGS ((TPM_CAPABILITY_AREA) 0x00000003) +#define TPM_SET_STCLEAR_DATA ((TPM_CAPABILITY_AREA) 0x00000004) +#define TPM_SET_STANY_FLAGS ((TPM_CAPABILITY_AREA) 0x00000005) +#define TPM_SET_STANY_DATA ((TPM_CAPABILITY_AREA) 0x00000006) + +/// +/// Part 2, section 21.6: TPM_CAP_VERSION_INFO +/// [size_is(vendorSpecificSize)] BYTE* vendorSpecific; +/// +typedef struct tdTPM_CAP_VERSION_INFO { + TPM_STRUCTURE_TAG tag; + TPM_VERSION version; + UINT16 specLevel; + UINT8 errataRev; + UINT8 tpmVendorID[4]; + UINT16 vendorSpecificSize; + UINT8 *vendorSpecific; +} TPM_CAP_VERSION_INFO; + +/// +/// Part 2, section 21.10: TPM_DA_ACTION_TYPE +/// +typedef struct tdTPM_DA_ACTION_TYPE { + TPM_STRUCTURE_TAG tag; + UINT32 actions; +} TPM_DA_ACTION_TYPE; + +#define TPM_DA_ACTION_FAILURE_MODE (((UINT32)1)<<3) +#define TPM_DA_ACTION_DEACTIVATE (((UINT32)1)<<2) +#define TPM_DA_ACTION_DISABLE (((UINT32)1)<<1) +#define TPM_DA_ACTION_TIMEOUT (((UINT32)1)<<0) + +/// +/// Part 2, section 21.7: TPM_DA_INFO +/// +typedef struct tdTPM_DA_INFO { + TPM_STRUCTURE_TAG tag; + TPM_DA_STATE state; + UINT16 currentCount; + UINT16 thresholdCount; + TPM_DA_ACTION_TYPE actionAtThreshold; + UINT32 actionDependValue; + UINT32 vendorDataSize; + UINT8 *vendorData; +} TPM_DA_INFO; + +/// +/// Part 2, section 21.8: TPM_DA_INFO_LIMITED +/// +typedef struct tdTPM_DA_INFO_LIMITED { + TPM_STRUCTURE_TAG tag; + TPM_DA_STATE state; + TPM_DA_ACTION_TYPE actionAtThreshold; + UINT32 vendorDataSize; + UINT8 *vendorData; +} TPM_DA_INFO_LIMITED; + +// +// Part 2, section 21.9: CAP_PROPERTY Subcap values for GetCapability +// +#define TPM_DA_STATE_INACTIVE ((UINT8)0x00) +#define TPM_DA_STATE_ACTIVE ((UINT8)0x01) + +// +// Part 2, section 22: DAA Structures +// + +// +// Part 2, section 22.1: Size definitions +// +#define TPM_DAA_SIZE_r0 (43) +#define TPM_DAA_SIZE_r1 (43) +#define TPM_DAA_SIZE_r2 (128) +#define TPM_DAA_SIZE_r3 (168) +#define TPM_DAA_SIZE_r4 (219) +#define TPM_DAA_SIZE_NT (20) +#define TPM_DAA_SIZE_v0 (128) +#define TPM_DAA_SIZE_v1 (192) +#define TPM_DAA_SIZE_NE (256) +#define TPM_DAA_SIZE_w (256) +#define TPM_DAA_SIZE_issuerModulus (256) +// +// Part 2, section 22.2: Constant definitions +// +#define TPM_DAA_power0 (104) +#define TPM_DAA_power1 (1024) + +/// +/// Part 2, section 22.3: TPM_DAA_ISSUER +/// +typedef struct tdTPM_DAA_ISSUER { + TPM_STRUCTURE_TAG tag; + TPM_DIGEST DAA_digest_R0; + TPM_DIGEST DAA_digest_R1; + TPM_DIGEST DAA_digest_S0; + TPM_DIGEST DAA_digest_S1; + TPM_DIGEST DAA_digest_n; + TPM_DIGEST DAA_digest_gamma; + UINT8 DAA_generic_q[26]; +} TPM_DAA_ISSUER; + +/// +/// Part 2, section 22.4: TPM_DAA_TPM +/// +typedef struct tdTPM_DAA_TPM { + TPM_STRUCTURE_TAG tag; + TPM_DIGEST DAA_digestIssuer; + TPM_DIGEST DAA_digest_v0; + TPM_DIGEST DAA_digest_v1; + TPM_DIGEST DAA_rekey; + UINT32 DAA_count; +} TPM_DAA_TPM; + +/// +/// Part 2, section 22.5: TPM_DAA_CONTEXT +/// +typedef struct tdTPM_DAA_CONTEXT { + TPM_STRUCTURE_TAG tag; + TPM_DIGEST DAA_digestContext; + TPM_DIGEST DAA_digest; + TPM_DAA_CONTEXT_SEED DAA_contextSeed; + UINT8 DAA_scratch[256]; + UINT8 DAA_stage; +} TPM_DAA_CONTEXT; + +/// +/// Part 2, section 22.6: TPM_DAA_JOINDATA +/// +typedef struct tdTPM_DAA_JOINDATA { + UINT8 DAA_join_u0[128]; + UINT8 DAA_join_u1[138]; + TPM_DIGEST DAA_digest_n0; +} TPM_DAA_JOINDATA; + +/// +/// Part 2, section 22.8: TPM_DAA_BLOB +/// +typedef struct tdTPM_DAA_BLOB { + TPM_STRUCTURE_TAG tag; + TPM_RESOURCE_TYPE resourceType; + UINT8 label[16]; + TPM_DIGEST blobIntegrity; + UINT32 additionalSize; + UINT8 *additionalData; + UINT32 sensitiveSize; + UINT8 *sensitiveData; +} TPM_DAA_BLOB; + +/// +/// Part 2, section 22.9: TPM_DAA_SENSITIVE +/// +typedef struct tdTPM_DAA_SENSITIVE { + TPM_STRUCTURE_TAG tag; + UINT32 internalSize; + UINT8 *internalData; +} TPM_DAA_SENSITIVE; + + +// +// Part 2, section 23: Redirection +// + +/// +/// Part 2 section 23.1: TPM_REDIR_COMMAND +/// This section defines exactly one value but does not +/// give it a name. The definition of TPM_SetRedirection in Part3 +/// refers to exactly one name but does not give its value. We join +/// them here. +/// +#define TPM_REDIR_GPIO (0x00000001) + +/// +/// TPM Command Headers defined in Part 3 +/// +typedef struct tdTPM_RQU_COMMAND_HDR { + TPM_STRUCTURE_TAG tag; + UINT32 paramSize; + TPM_COMMAND_CODE ordinal; +} TPM_RQU_COMMAND_HDR; + +/// +/// TPM Response Headers defined in Part 3 +/// +typedef struct tdTPM_RSP_COMMAND_HDR { + TPM_STRUCTURE_TAG tag; + UINT32 paramSize; + TPM_RESULT returnCode; +} TPM_RSP_COMMAND_HDR; + +#pragma pack () + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h new file mode 100644 index 000000000..8bb7ea389 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h @@ -0,0 +1,172 @@ +/** @file + TCG EFI Platform Definition in TCG_EFI_Platform_1_20_Final + + Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __UEFI_TCG_PLATFORM_H__ +#define __UEFI_TCG_PLATFORM_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/IndustryStandard/Tpm12.h> +#include <ipxe/efi/Uefi.h> + +// +// Standard event types +// +#define EV_POST_CODE ((TCG_EVENTTYPE) 0x00000001) +#define EV_SEPARATOR ((TCG_EVENTTYPE) 0x00000004) +#define EV_S_CRTM_CONTENTS ((TCG_EVENTTYPE) 0x00000007) +#define EV_S_CRTM_VERSION ((TCG_EVENTTYPE) 0x00000008) +#define EV_CPU_MICROCODE ((TCG_EVENTTYPE) 0x00000009) +#define EV_TABLE_OF_DEVICES ((TCG_EVENTTYPE) 0x0000000B) + +// +// EFI specific event types +// +#define EV_EFI_EVENT_BASE ((TCG_EVENTTYPE) 0x80000000) +#define EV_EFI_VARIABLE_DRIVER_CONFIG (EV_EFI_EVENT_BASE + 1) +#define EV_EFI_VARIABLE_BOOT (EV_EFI_EVENT_BASE + 2) +#define EV_EFI_BOOT_SERVICES_APPLICATION (EV_EFI_EVENT_BASE + 3) +#define EV_EFI_BOOT_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 4) +#define EV_EFI_RUNTIME_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 5) +#define EV_EFI_GPT_EVENT (EV_EFI_EVENT_BASE + 6) +#define EV_EFI_ACTION (EV_EFI_EVENT_BASE + 7) +#define EV_EFI_PLATFORM_FIRMWARE_BLOB (EV_EFI_EVENT_BASE + 8) +#define EV_EFI_HANDOFF_TABLES (EV_EFI_EVENT_BASE + 9) + +#define EFI_CALLING_EFI_APPLICATION \ + "Calling EFI Application from Boot Option" +#define EFI_RETURNING_FROM_EFI_APPLICATOIN \ + "Returning from EFI Application from Boot Option" +#define EFI_EXIT_BOOT_SERVICES_INVOCATION \ + "Exit Boot Services Invocation" +#define EFI_EXIT_BOOT_SERVICES_FAILED \ + "Exit Boot Services Returned with Failure" +#define EFI_EXIT_BOOT_SERVICES_SUCCEEDED \ + "Exit Boot Services Returned with Success" + + +#define EV_POSTCODE_INFO_POST_CODE "POST CODE" +#define POST_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_POST_CODE) - 1) + +#define EV_POSTCODE_INFO_SMM_CODE "SMM CODE" +#define SMM_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_SMM_CODE) - 1) + +#define EV_POSTCODE_INFO_ACPI_DATA "ACPI DATA" +#define ACPI_DATA_LEN (sizeof(EV_POSTCODE_INFO_ACPI_DATA) - 1) + +#define EV_POSTCODE_INFO_BIS_CODE "BIS CODE" +#define BIS_CODE_LEN (sizeof(EV_POSTCODE_INFO_BIS_CODE) - 1) + +#define EV_POSTCODE_INFO_UEFI_PI "UEFI PI" +#define UEFI_PI_LEN (sizeof(EV_POSTCODE_INFO_UEFI_PI) - 1) + +#define EV_POSTCODE_INFO_OPROM "Embedded Option ROM" +#define OPROM_LEN (sizeof(EV_POSTCODE_INFO_OPROM) - 1) + +// +// Set structure alignment to 1-byte +// +#pragma pack (1) + +typedef UINT32 TCG_EVENTTYPE; +typedef TPM_PCRINDEX TCG_PCRINDEX; +typedef TPM_DIGEST TCG_DIGEST; +/// +/// Event Log Entry Structure Definition +/// +typedef struct tdTCG_PCR_EVENT { + TCG_PCRINDEX PCRIndex; ///< PCRIndex event extended to + TCG_EVENTTYPE EventType; ///< TCG EFI event type + TCG_DIGEST Digest; ///< Value extended into PCRIndex + UINT32 EventSize; ///< Size of the event data + UINT8 Event[1]; ///< The event data +} TCG_PCR_EVENT; + +#define TSS_EVENT_DATA_MAX_SIZE 256 + +/// +/// TCG_PCR_EVENT_HDR +/// +typedef struct tdTCG_PCR_EVENT_HDR { + TCG_PCRINDEX PCRIndex; + TCG_EVENTTYPE EventType; + TCG_DIGEST Digest; + UINT32 EventSize; +} TCG_PCR_EVENT_HDR; + +/// +/// EFI_PLATFORM_FIRMWARE_BLOB +/// +/// BlobLength should be of type UINTN but we use UINT64 here +/// because PEI is 32-bit while DXE is 64-bit on x64 platforms +/// +typedef struct tdEFI_PLATFORM_FIRMWARE_BLOB { + EFI_PHYSICAL_ADDRESS BlobBase; + UINT64 BlobLength; +} EFI_PLATFORM_FIRMWARE_BLOB; + +/// +/// EFI_IMAGE_LOAD_EVENT +/// +/// This structure is used in EV_EFI_BOOT_SERVICES_APPLICATION, +/// EV_EFI_BOOT_SERVICES_DRIVER and EV_EFI_RUNTIME_SERVICES_DRIVER +/// +typedef struct tdEFI_IMAGE_LOAD_EVENT { + EFI_PHYSICAL_ADDRESS ImageLocationInMemory; + UINTN ImageLengthInMemory; + UINTN ImageLinkTimeAddress; + UINTN LengthOfDevicePath; + EFI_DEVICE_PATH_PROTOCOL DevicePath[1]; +} EFI_IMAGE_LOAD_EVENT; + +/// +/// EFI_HANDOFF_TABLE_POINTERS +/// +/// This structure is used in EV_EFI_HANDOFF_TABLES event to facilitate +/// the measurement of given configuration tables. +/// +typedef struct tdEFI_HANDOFF_TABLE_POINTERS { + UINTN NumberOfTables; + EFI_CONFIGURATION_TABLE TableEntry[1]; +} EFI_HANDOFF_TABLE_POINTERS; + +/// +/// EFI_VARIABLE_DATA +/// +/// This structure serves as the header for measuring variables. The name of the +/// variable (in Unicode format) should immediately follow, then the variable +/// data. +/// +typedef struct tdEFI_VARIABLE_DATA { + EFI_GUID VariableName; + UINTN UnicodeNameLength; + UINTN VariableDataLength; + CHAR16 UnicodeName[1]; + INT8 VariableData[1]; ///< Driver or platform-specific data +} EFI_VARIABLE_DATA; + +typedef struct tdEFI_GPT_DATA { + EFI_PARTITION_TABLE_HEADER EfiPartitionHeader; + UINTN NumberOfPartitions; + EFI_PARTITION_ENTRY Partitions[1]; +} EFI_GPT_DATA; + +// +// Restore original structure alignment +// +#pragma pack () + +#endif + + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/LICENCE b/qemu/roms/ipxe/src/include/ipxe/efi/LICENCE new file mode 100644 index 000000000..6c28e6f96 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/LICENCE @@ -0,0 +1,40 @@ +The EFI headers contained herein are copied from the EFI Development +Kit, available from http://www.tianocore.org and published under the +following licence: + + BSD License from Intel + Copyright (c) 2004, Intel Corporation + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + + +This licence applies only to files that are part of the EFI +Development Kit. Other files may contain their own licence terms, or +may fall under the standard iPXE GPL licence. diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Library/BaseLib.h b/qemu/roms/ipxe/src/include/ipxe/efi/Library/BaseLib.h new file mode 100644 index 000000000..e9c31d130 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Library/BaseLib.h @@ -0,0 +1,7283 @@ +/** @file + Provides string functions, linked list functions, math functions, synchronization + functions, and CPU architecture-specific functions. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __BASE_LIB__ +#define __BASE_LIB__ + +FILE_LICENCE ( BSD3 ); + +// +// Definitions for architecture-specific types +// +#if defined (MDE_CPU_IA32) +/// +/// The IA-32 architecture context buffer used by SetJump() and LongJump(). +/// +typedef struct { + UINT32 Ebx; + UINT32 Esi; + UINT32 Edi; + UINT32 Ebp; + UINT32 Esp; + UINT32 Eip; +} BASE_LIBRARY_JUMP_BUFFER; + +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4 + +#endif // defined (MDE_CPU_IA32) + +#if defined (MDE_CPU_IPF) + +/// +/// The Itanium architecture context buffer used by SetJump() and LongJump(). +/// +typedef struct { + UINT64 F2[2]; + UINT64 F3[2]; + UINT64 F4[2]; + UINT64 F5[2]; + UINT64 F16[2]; + UINT64 F17[2]; + UINT64 F18[2]; + UINT64 F19[2]; + UINT64 F20[2]; + UINT64 F21[2]; + UINT64 F22[2]; + UINT64 F23[2]; + UINT64 F24[2]; + UINT64 F25[2]; + UINT64 F26[2]; + UINT64 F27[2]; + UINT64 F28[2]; + UINT64 F29[2]; + UINT64 F30[2]; + UINT64 F31[2]; + UINT64 R4; + UINT64 R5; + UINT64 R6; + UINT64 R7; + UINT64 SP; + UINT64 BR0; + UINT64 BR1; + UINT64 BR2; + UINT64 BR3; + UINT64 BR4; + UINT64 BR5; + UINT64 InitialUNAT; + UINT64 AfterSpillUNAT; + UINT64 PFS; + UINT64 BSP; + UINT64 Predicates; + UINT64 LoopCount; + UINT64 FPSR; +} BASE_LIBRARY_JUMP_BUFFER; + +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10 + +#endif // defined (MDE_CPU_IPF) + +#if defined (MDE_CPU_X64) +/// +/// The x64 architecture context buffer used by SetJump() and LongJump(). +/// +typedef struct { + UINT64 Rbx; + UINT64 Rsp; + UINT64 Rbp; + UINT64 Rdi; + UINT64 Rsi; + UINT64 R12; + UINT64 R13; + UINT64 R14; + UINT64 R15; + UINT64 Rip; + UINT64 MxCsr; + UINT8 XmmBuffer[160]; ///< XMM6-XMM15. +} BASE_LIBRARY_JUMP_BUFFER; + +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8 + +#endif // defined (MDE_CPU_X64) + +#if defined (MDE_CPU_EBC) +/// +/// The EBC context buffer used by SetJump() and LongJump(). +/// +typedef struct { + UINT64 R0; + UINT64 R1; + UINT64 R2; + UINT64 R3; + UINT64 IP; +} BASE_LIBRARY_JUMP_BUFFER; + +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8 + +#endif // defined (MDE_CPU_EBC) + +#if defined (MDE_CPU_ARM) + +typedef struct { + UINT32 R3; ///< A copy of R13. + UINT32 R4; + UINT32 R5; + UINT32 R6; + UINT32 R7; + UINT32 R8; + UINT32 R9; + UINT32 R10; + UINT32 R11; + UINT32 R12; + UINT32 R14; +} BASE_LIBRARY_JUMP_BUFFER; + +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4 + +#endif // defined (MDE_CPU_ARM) + +#if defined (MDE_CPU_AARCH64) +typedef struct { + // GP regs + UINT64 X19; + UINT64 X20; + UINT64 X21; + UINT64 X22; + UINT64 X23; + UINT64 X24; + UINT64 X25; + UINT64 X26; + UINT64 X27; + UINT64 X28; + UINT64 FP; + UINT64 LR; + UINT64 IP0; + + // FP regs + UINT64 D8; + UINT64 D9; + UINT64 D10; + UINT64 D11; + UINT64 D12; + UINT64 D13; + UINT64 D14; + UINT64 D15; +} BASE_LIBRARY_JUMP_BUFFER; + +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8 + +#endif // defined (MDE_CPU_AARCH64) + + +// +// String Services +// + +/** + Copies one Null-terminated Unicode string to another Null-terminated Unicode + string and returns the new Unicode string. + + This function copies the contents of the Unicode string Source to the Unicode + string Destination, and returns Destination. If Source and Destination + overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination The pointer to a Null-terminated Unicode string. + @param Source The pointer to a Null-terminated Unicode string. + + @return Destination. + +**/ +CHAR16 * +EFIAPI +StrCpy ( + OUT CHAR16 *Destination, + IN CONST CHAR16 *Source + ); + + +/** + Copies up to a specified length from one Null-terminated Unicode string to + another Null-terminated Unicode string and returns the new Unicode string. + + This function copies the contents of the Unicode string Source to the Unicode + string Destination, and returns Destination. At most, Length Unicode + characters are copied from Source to Destination. If Length is 0, then + Destination is returned unmodified. If Length is greater that the number of + Unicode characters in Source, then Destination is padded with Null Unicode + characters. If Source and Destination overlap, then the results are + undefined. + + If Length > 0 and Destination is NULL, then ASSERT(). + If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Length > 0 and Source is NULL, then ASSERT(). + If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Length is greater than + PcdMaximumUnicodeStringLength, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator, + then ASSERT(). + + @param Destination The pointer to a Null-terminated Unicode string. + @param Source The pointer to a Null-terminated Unicode string. + @param Length The maximum number of Unicode characters to copy. + + @return Destination. + +**/ +CHAR16 * +EFIAPI +StrnCpy ( + OUT CHAR16 *Destination, + IN CONST CHAR16 *Source, + IN UINTN Length + ); + + +/** + Returns the length of a Null-terminated Unicode string. + + This function returns the number of Unicode characters in the Null-terminated + Unicode string specified by String. + + If String is NULL, then ASSERT(). + If String is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @return The length of String. + +**/ +UINTN +EFIAPI +StrLen ( + IN CONST CHAR16 *String + ); + + +/** + Returns the size of a Null-terminated Unicode string in bytes, including the + Null terminator. + + This function returns the size, in bytes, of the Null-terminated Unicode string + specified by String. + + If String is NULL, then ASSERT(). + If String is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param String The pointer to a Null-terminated Unicode string. + + @return The size of String. + +**/ +UINTN +EFIAPI +StrSize ( + IN CONST CHAR16 *String + ); + + +/** + Compares two Null-terminated Unicode strings, and returns the difference + between the first mismatched Unicode characters. + + This function compares the Null-terminated Unicode string FirstString to the + Null-terminated Unicode string SecondString. If FirstString is identical to + SecondString, then 0 is returned. Otherwise, the value returned is the first + mismatched Unicode character in SecondString subtracted from the first + mismatched Unicode character in FirstString. + + If FirstString is NULL, then ASSERT(). + If FirstString is not aligned on a 16-bit boundary, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If SecondString is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more + than PcdMaximumUnicodeStringLength Unicode characters, not including the + Null-terminator, then ASSERT(). + + @param FirstString The pointer to a Null-terminated Unicode string. + @param SecondString The pointer to a Null-terminated Unicode string. + + @retval 0 FirstString is identical to SecondString. + @return others FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +StrCmp ( + IN CONST CHAR16 *FirstString, + IN CONST CHAR16 *SecondString + ); + + +/** + Compares up to a specified length the contents of two Null-terminated Unicode strings, + and returns the difference between the first mismatched Unicode characters. + + This function compares the Null-terminated Unicode string FirstString to the + Null-terminated Unicode string SecondString. At most, Length Unicode + characters will be compared. If Length is 0, then 0 is returned. If + FirstString is identical to SecondString, then 0 is returned. Otherwise, the + value returned is the first mismatched Unicode character in SecondString + subtracted from the first mismatched Unicode character in FirstString. + + If Length > 0 and FirstString is NULL, then ASSERT(). + If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT(). + If Length > 0 and SecondString is NULL, then ASSERT(). + If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Length is greater than + PcdMaximumUnicodeStringLength, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than + PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator, + then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than + PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator, + then ASSERT(). + + @param FirstString The pointer to a Null-terminated Unicode string. + @param SecondString The pointer to a Null-terminated Unicode string. + @param Length The maximum number of Unicode characters to compare. + + @retval 0 FirstString is identical to SecondString. + @return others FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +StrnCmp ( + IN CONST CHAR16 *FirstString, + IN CONST CHAR16 *SecondString, + IN UINTN Length + ); + + +/** + Concatenates one Null-terminated Unicode string to another Null-terminated + Unicode string, and returns the concatenated Unicode string. + + This function concatenates two Null-terminated Unicode strings. The contents + of Null-terminated Unicode string Source are concatenated to the end of + Null-terminated Unicode string Destination. The Null-terminated concatenated + Unicode String is returned. If Source and Destination overlap, then the + results are undefined. + + If Destination is NULL, then ASSERT(). + If Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Destination contains more + than PcdMaximumUnicodeStringLength Unicode characters, not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters, not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination + and Source results in a Unicode string with more than + PcdMaximumUnicodeStringLength Unicode characters, not including the + Null-terminator, then ASSERT(). + + @param Destination The pointer to a Null-terminated Unicode string. + @param Source The pointer to a Null-terminated Unicode string. + + @return Destination. + +**/ +CHAR16 * +EFIAPI +StrCat ( + IN OUT CHAR16 *Destination, + IN CONST CHAR16 *Source + ); + + +/** + Concatenates up to a specified length one Null-terminated Unicode to the end + of another Null-terminated Unicode string, and returns the concatenated + Unicode string. + + This function concatenates two Null-terminated Unicode strings. The contents + of Null-terminated Unicode string Source are concatenated to the end of + Null-terminated Unicode string Destination, and Destination is returned. At + most, Length Unicode characters are concatenated from Source to the end of + Destination, and Destination is always Null-terminated. If Length is 0, then + Destination is returned unmodified. If Source and Destination overlap, then + the results are undefined. + + If Destination is NULL, then ASSERT(). + If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Length > 0 and Source is NULL, then ASSERT(). + If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Length is greater than + PcdMaximumUnicodeStringLength, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Destination contains more + than PcdMaximumUnicodeStringLength Unicode characters, not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters, not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination + and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength + Unicode characters, not including the Null-terminator, then ASSERT(). + + @param Destination The pointer to a Null-terminated Unicode string. + @param Source The pointer to a Null-terminated Unicode string. + @param Length The maximum number of Unicode characters to concatenate from + Source. + + @return Destination. + +**/ +CHAR16 * +EFIAPI +StrnCat ( + IN OUT CHAR16 *Destination, + IN CONST CHAR16 *Source, + IN UINTN Length + ); + +/** + Returns the first occurrence of a Null-terminated Unicode sub-string + in a Null-terminated Unicode string. + + This function scans the contents of the Null-terminated Unicode string + specified by String and returns the first occurrence of SearchString. + If SearchString is not found in String, then NULL is returned. If + the length of SearchString is zero, then String is returned. + + If String is NULL, then ASSERT(). + If String is not aligned on a 16-bit boundary, then ASSERT(). + If SearchString is NULL, then ASSERT(). + If SearchString is not aligned on a 16-bit boundary, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and SearchString + or String contains more than PcdMaximumUnicodeStringLength Unicode + characters, not including the Null-terminator, then ASSERT(). + + @param String The pointer to a Null-terminated Unicode string. + @param SearchString The pointer to a Null-terminated Unicode string to search for. + + @retval NULL If the SearchString does not appear in String. + @return others If there is a match. + +**/ +CHAR16 * +EFIAPI +StrStr ( + IN CONST CHAR16 *String, + IN CONST CHAR16 *SearchString + ); + +/** + Convert a Null-terminated Unicode decimal string to a value of + type UINTN. + + This function returns a value of type UINTN by interpreting the contents + of the Unicode string specified by String as a decimal number. The format + of the input Unicode string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The + function will ignore the pad space, which includes spaces or + tab characters, before [decimal digits]. The running zero in the + beginning of [decimal digits] will be ignored. Then, the function + stops at the first character that is a not a valid decimal character + or a Null-terminator, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, + then 0 is returned. + If the number represented by String overflows according + to the range defined by UINTN, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains + more than PcdMaximumUnicodeStringLength Unicode characters not including + the Null-terminator, then ASSERT(). + + @param String The pointer to a Null-terminated Unicode string. + + @retval Value translated from String. + +**/ +UINTN +EFIAPI +StrDecimalToUintn ( + IN CONST CHAR16 *String + ); + +/** + Convert a Null-terminated Unicode decimal string to a value of + type UINT64. + + This function returns a value of type UINT64 by interpreting the contents + of the Unicode string specified by String as a decimal number. The format + of the input Unicode string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The + function will ignore the pad space, which includes spaces or + tab characters, before [decimal digits]. The running zero in the + beginning of [decimal digits] will be ignored. Then, the function + stops at the first character that is a not a valid decimal character + or a Null-terminator, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, + then 0 is returned. + If the number represented by String overflows according + to the range defined by UINT64, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains + more than PcdMaximumUnicodeStringLength Unicode characters not including + the Null-terminator, then ASSERT(). + + @param String The pointer to a Null-terminated Unicode string. + + @retval Value translated from String. + +**/ +UINT64 +EFIAPI +StrDecimalToUint64 ( + IN CONST CHAR16 *String + ); + + +/** + Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN. + + This function returns a value of type UINTN by interpreting the contents + of the Unicode string specified by String as a hexadecimal number. + The format of the input Unicode string String is: + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. + If "x" appears in the input string, it must be prefixed with at least one 0. + The function will ignore the pad space, which includes spaces or tab characters, + before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or + [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the + first valid hexadecimal digit. Then, the function stops at the first character + that is a not a valid hexadecimal character or NULL, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then zero is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, + then zero is returned. + If the number represented by String overflows according to the range defined by + UINTN, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, + then ASSERT(). + + @param String The pointer to a Null-terminated Unicode string. + + @retval Value translated from String. + +**/ +UINTN +EFIAPI +StrHexToUintn ( + IN CONST CHAR16 *String + ); + + +/** + Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64. + + This function returns a value of type UINT64 by interpreting the contents + of the Unicode string specified by String as a hexadecimal number. + The format of the input Unicode string String is + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. + If "x" appears in the input string, it must be prefixed with at least one 0. + The function will ignore the pad space, which includes spaces or tab characters, + before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or + [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the + first valid hexadecimal digit. Then, the function stops at the first character that is + a not a valid hexadecimal character or NULL, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then zero is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, + then zero is returned. + If the number represented by String overflows according to the range defined by + UINT64, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, + then ASSERT(). + + @param String The pointer to a Null-terminated Unicode string. + + @retval Value translated from String. + +**/ +UINT64 +EFIAPI +StrHexToUint64 ( + IN CONST CHAR16 *String + ); + +/** + Convert a Null-terminated Unicode string to a Null-terminated + ASCII string and returns the ASCII string. + + This function converts the content of the Unicode string Source + to the ASCII string Destination by copying the lower 8 bits of + each Unicode character. It returns Destination. + + The caller is responsible to make sure Destination points to a buffer with size + equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes. + + If any Unicode characters in Source contain non-zero value in + the upper 8 bits, then ASSERT(). + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and Source contains + more than PcdMaximumUnicodeStringLength Unicode characters not including + the Null-terminator, then ASSERT(). + + If PcdMaximumAsciiStringLength is not zero, and Source contains more + than PcdMaximumAsciiStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Source The pointer to a Null-terminated Unicode string. + @param Destination The pointer to a Null-terminated ASCII string. + + @return Destination. + +**/ +CHAR8 * +EFIAPI +UnicodeStrToAsciiStr ( + IN CONST CHAR16 *Source, + OUT CHAR8 *Destination + ); + + +/** + Copies one Null-terminated ASCII string to another Null-terminated ASCII + string and returns the new ASCII string. + + This function copies the contents of the ASCII string Source to the ASCII + string Destination, and returns Destination. If Source and Destination + overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param Destination The pointer to a Null-terminated ASCII string. + @param Source The pointer to a Null-terminated ASCII string. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrCpy ( + OUT CHAR8 *Destination, + IN CONST CHAR8 *Source + ); + + +/** + Copies up to a specified length one Null-terminated ASCII string to another + Null-terminated ASCII string and returns the new ASCII string. + + This function copies the contents of the ASCII string Source to the ASCII + string Destination, and returns Destination. At most, Length ASCII characters + are copied from Source to Destination. If Length is 0, then Destination is + returned unmodified. If Length is greater that the number of ASCII characters + in Source, then Destination is padded with Null ASCII characters. If Source + and Destination overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Length is greater than + PcdMaximumAsciiStringLength, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator, + then ASSERT(). + + @param Destination The pointer to a Null-terminated ASCII string. + @param Source The pointer to a Null-terminated ASCII string. + @param Length The maximum number of ASCII characters to copy. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrnCpy ( + OUT CHAR8 *Destination, + IN CONST CHAR8 *Source, + IN UINTN Length + ); + + +/** + Returns the length of a Null-terminated ASCII string. + + This function returns the number of ASCII characters in the Null-terminated + ASCII string specified by String. + + If Length > 0 and Destination is NULL, then ASSERT(). + If Length > 0 and Source is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String The pointer to a Null-terminated ASCII string. + + @return The length of String. + +**/ +UINTN +EFIAPI +AsciiStrLen ( + IN CONST CHAR8 *String + ); + + +/** + Returns the size of a Null-terminated ASCII string in bytes, including the + Null terminator. + + This function returns the size, in bytes, of the Null-terminated ASCII string + specified by String. + + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String The pointer to a Null-terminated ASCII string. + + @return The size of String. + +**/ +UINTN +EFIAPI +AsciiStrSize ( + IN CONST CHAR8 *String + ); + + +/** + Compares two Null-terminated ASCII strings, and returns the difference + between the first mismatched ASCII characters. + + This function compares the Null-terminated ASCII string FirstString to the + Null-terminated ASCII string SecondString. If FirstString is identical to + SecondString, then 0 is returned. Otherwise, the value returned is the first + mismatched ASCII character in SecondString subtracted from the first + mismatched ASCII character in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more + than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param FirstString The pointer to a Null-terminated ASCII string. + @param SecondString The pointer to a Null-terminated ASCII string. + + @retval ==0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +AsciiStrCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString + ); + + +/** + Performs a case insensitive comparison of two Null-terminated ASCII strings, + and returns the difference between the first mismatched ASCII characters. + + This function performs a case insensitive comparison of the Null-terminated + ASCII string FirstString to the Null-terminated ASCII string SecondString. If + FirstString is identical to SecondString, then 0 is returned. Otherwise, the + value returned is the first mismatched lower case ASCII character in + SecondString subtracted from the first mismatched lower case ASCII character + in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more + than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param FirstString The pointer to a Null-terminated ASCII string. + @param SecondString The pointer to a Null-terminated ASCII string. + + @retval ==0 FirstString is identical to SecondString using case insensitive + comparisons. + @retval !=0 FirstString is not identical to SecondString using case + insensitive comparisons. + +**/ +INTN +EFIAPI +AsciiStriCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString + ); + + +/** + Compares two Null-terminated ASCII strings with maximum lengths, and returns + the difference between the first mismatched ASCII characters. + + This function compares the Null-terminated ASCII string FirstString to the + Null-terminated ASCII string SecondString. At most, Length ASCII characters + will be compared. If Length is 0, then 0 is returned. If FirstString is + identical to SecondString, then 0 is returned. Otherwise, the value returned + is the first mismatched ASCII character in SecondString subtracted from the + first mismatched ASCII character in FirstString. + + If Length > 0 and FirstString is NULL, then ASSERT(). + If Length > 0 and SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Length is greater than + PcdMaximumAsciiStringLength, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than + PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator, + then ASSERT(). + + @param FirstString The pointer to a Null-terminated ASCII string. + @param SecondString The pointer to a Null-terminated ASCII string. + @param Length The maximum number of ASCII characters for compare. + + @retval ==0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +AsciiStrnCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString, + IN UINTN Length + ); + + +/** + Concatenates one Null-terminated ASCII string to another Null-terminated + ASCII string, and returns the concatenated ASCII string. + + This function concatenates two Null-terminated ASCII strings. The contents of + Null-terminated ASCII string Source are concatenated to the end of Null- + terminated ASCII string Destination. The Null-terminated concatenated ASCII + String is returned. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Destination contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and concatenating Destination and + Source results in a ASCII string with more than PcdMaximumAsciiStringLength + ASCII characters, then ASSERT(). + + @param Destination The pointer to a Null-terminated ASCII string. + @param Source The pointer to a Null-terminated ASCII string. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrCat ( + IN OUT CHAR8 *Destination, + IN CONST CHAR8 *Source + ); + + +/** + Concatenates up to a specified length one Null-terminated ASCII string to + the end of another Null-terminated ASCII string, and returns the + concatenated ASCII string. + + This function concatenates two Null-terminated ASCII strings. The contents + of Null-terminated ASCII string Source are concatenated to the end of Null- + terminated ASCII string Destination, and Destination is returned. At most, + Length ASCII characters are concatenated from Source to the end of + Destination, and Destination is always Null-terminated. If Length is 0, then + Destination is returned unmodified. If Source and Destination overlap, then + the results are undefined. + + If Length > 0 and Destination is NULL, then ASSERT(). + If Length > 0 and Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Length is greater than + PcdMaximumAsciiStringLength, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Destination contains more than + PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and + Source results in a ASCII string with more than PcdMaximumAsciiStringLength + ASCII characters, not including the Null-terminator, then ASSERT(). + + @param Destination The pointer to a Null-terminated ASCII string. + @param Source The pointer to a Null-terminated ASCII string. + @param Length The maximum number of ASCII characters to concatenate from + Source. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrnCat ( + IN OUT CHAR8 *Destination, + IN CONST CHAR8 *Source, + IN UINTN Length + ); + + +/** + Returns the first occurrence of a Null-terminated ASCII sub-string + in a Null-terminated ASCII string. + + This function scans the contents of the ASCII string specified by String + and returns the first occurrence of SearchString. If SearchString is not + found in String, then NULL is returned. If the length of SearchString is zero, + then String is returned. + + If String is NULL, then ASSERT(). + If SearchString is NULL, then ASSERT(). + + If PcdMaximumAsciiStringLength is not zero, and SearchString or + String contains more than PcdMaximumAsciiStringLength Unicode characters + not including the Null-terminator, then ASSERT(). + + @param String The pointer to a Null-terminated ASCII string. + @param SearchString The pointer to a Null-terminated ASCII string to search for. + + @retval NULL If the SearchString does not appear in String. + @retval others If there is a match return the first occurrence of SearchingString. + If the length of SearchString is zero,return String. + +**/ +CHAR8 * +EFIAPI +AsciiStrStr ( + IN CONST CHAR8 *String, + IN CONST CHAR8 *SearchString + ); + + +/** + Convert a Null-terminated ASCII decimal string to a value of type + UINTN. + + This function returns a value of type UINTN by interpreting the contents + of the ASCII string String as a decimal number. The format of the input + ASCII string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The function will + ignore the pad space, which includes spaces or tab characters, before the digits. + The running zero in the beginning of [decimal digits] will be ignored. Then, the + function stops at the first character that is a not a valid decimal character or + Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, then 0 is returned. + If the number represented by String overflows according to the range defined by + UINTN, then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String The pointer to a Null-terminated ASCII string. + + @retval The value translated from String. + +**/ +UINTN +EFIAPI +AsciiStrDecimalToUintn ( + IN CONST CHAR8 *String + ); + + +/** + Convert a Null-terminated ASCII decimal string to a value of type + UINT64. + + This function returns a value of type UINT64 by interpreting the contents + of the ASCII string String as a decimal number. The format of the input + ASCII string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The function will + ignore the pad space, which includes spaces or tab characters, before the digits. + The running zero in the beginning of [decimal digits] will be ignored. Then, the + function stops at the first character that is a not a valid decimal character or + Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, then 0 is returned. + If the number represented by String overflows according to the range defined by + UINT64, then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String The pointer to a Null-terminated ASCII string. + + @retval Value translated from String. + +**/ +UINT64 +EFIAPI +AsciiStrDecimalToUint64 ( + IN CONST CHAR8 *String + ); + + +/** + Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN. + + This function returns a value of type UINTN by interpreting the contents of + the ASCII string String as a hexadecimal number. The format of the input ASCII + string String is: + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x" + appears in the input string, it must be prefixed with at least one 0. The function + will ignore the pad space, which includes spaces or tab characters, before [zeros], + [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits] + will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal + digit. Then, the function stops at the first character that is a not a valid + hexadecimal character or Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then + 0 is returned. + + If the number represented by String overflows according to the range defined by UINTN, + then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, + and String contains more than PcdMaximumAsciiStringLength ASCII characters not including + the Null-terminator, then ASSERT(). + + @param String The pointer to a Null-terminated ASCII string. + + @retval Value translated from String. + +**/ +UINTN +EFIAPI +AsciiStrHexToUintn ( + IN CONST CHAR8 *String + ); + + +/** + Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64. + + This function returns a value of type UINT64 by interpreting the contents of + the ASCII string String as a hexadecimal number. The format of the input ASCII + string String is: + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x" + appears in the input string, it must be prefixed with at least one 0. The function + will ignore the pad space, which includes spaces or tab characters, before [zeros], + [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits] + will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal + digit. Then, the function stops at the first character that is a not a valid + hexadecimal character or Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then + 0 is returned. + + If the number represented by String overflows according to the range defined by UINT64, + then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, + and String contains more than PcdMaximumAsciiStringLength ASCII characters not including + the Null-terminator, then ASSERT(). + + @param String The pointer to a Null-terminated ASCII string. + + @retval Value translated from String. + +**/ +UINT64 +EFIAPI +AsciiStrHexToUint64 ( + IN CONST CHAR8 *String + ); + + +/** + Convert one Null-terminated ASCII string to a Null-terminated + Unicode string and returns the Unicode string. + + This function converts the contents of the ASCII string Source to the Unicode + string Destination, and returns Destination. The function terminates the + Unicode string Destination by appending a Null-terminator character at the end. + The caller is responsible to make sure Destination points to a buffer with size + equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes. + + If Destination is NULL, then ASSERT(). + If Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param Source The pointer to a Null-terminated ASCII string. + @param Destination The pointer to a Null-terminated Unicode string. + + @return Destination. + +**/ +CHAR16 * +EFIAPI +AsciiStrToUnicodeStr ( + IN CONST CHAR8 *Source, + OUT CHAR16 *Destination + ); + + +/** + Converts an 8-bit value to an 8-bit BCD value. + + Converts the 8-bit value specified by Value to BCD. The BCD value is + returned. + + If Value >= 100, then ASSERT(). + + @param Value The 8-bit value to convert to BCD. Range 0..99. + + @return The BCD value. + +**/ +UINT8 +EFIAPI +DecimalToBcd8 ( + IN UINT8 Value + ); + + +/** + Converts an 8-bit BCD value to an 8-bit value. + + Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit + value is returned. + + If Value >= 0xA0, then ASSERT(). + If (Value & 0x0F) >= 0x0A, then ASSERT(). + + @param Value The 8-bit BCD value to convert to an 8-bit value. + + @return The 8-bit value is returned. + +**/ +UINT8 +EFIAPI +BcdToDecimal8 ( + IN UINT8 Value + ); + + +// +// Linked List Functions and Macros +// + +/** + Initializes the head node of a doubly linked list that is declared as a + global variable in a module. + + Initializes the forward and backward links of a new linked list. After + initializing a linked list with this macro, the other linked list functions + may be used to add and remove nodes from the linked list. This macro results + in smaller executables by initializing the linked list in the data section, + instead if calling the InitializeListHead() function to perform the + equivalent operation. + + @param ListHead The head note of a list to initialize. + +**/ +#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)} + + +/** + Initializes the head node of a doubly linked list, and returns the pointer to + the head node of the doubly linked list. + + Initializes the forward and backward links of a new linked list. After + initializing a linked list with this function, the other linked list + functions may be used to add and remove nodes from the linked list. It is up + to the caller of this function to allocate the memory for ListHead. + + If ListHead is NULL, then ASSERT(). + + @param ListHead A pointer to the head node of a new doubly linked list. + + @return ListHead + +**/ +LIST_ENTRY * +EFIAPI +InitializeListHead ( + IN OUT LIST_ENTRY *ListHead + ); + + +/** + Adds a node to the beginning of a doubly linked list, and returns the pointer + to the head node of the doubly linked list. + + Adds the node Entry at the beginning of the doubly linked list denoted by + ListHead, and returns ListHead. + + If ListHead is NULL, then ASSERT(). + If Entry is NULL, then ASSERT(). + If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or + InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and prior to insertion the number + of nodes in ListHead, including the ListHead node, is greater than or + equal to PcdMaximumLinkedListLength, then ASSERT(). + + @param ListHead A pointer to the head node of a doubly linked list. + @param Entry A pointer to a node that is to be inserted at the beginning + of a doubly linked list. + + @return ListHead + +**/ +LIST_ENTRY * +EFIAPI +InsertHeadList ( + IN OUT LIST_ENTRY *ListHead, + IN OUT LIST_ENTRY *Entry + ); + + +/** + Adds a node to the end of a doubly linked list, and returns the pointer to + the head node of the doubly linked list. + + Adds the node Entry to the end of the doubly linked list denoted by ListHead, + and returns ListHead. + + If ListHead is NULL, then ASSERT(). + If Entry is NULL, then ASSERT(). + If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or + InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and prior to insertion the number + of nodes in ListHead, including the ListHead node, is greater than or + equal to PcdMaximumLinkedListLength, then ASSERT(). + + @param ListHead A pointer to the head node of a doubly linked list. + @param Entry A pointer to a node that is to be added at the end of the + doubly linked list. + + @return ListHead + +**/ +LIST_ENTRY * +EFIAPI +InsertTailList ( + IN OUT LIST_ENTRY *ListHead, + IN OUT LIST_ENTRY *Entry + ); + + +/** + Retrieves the first node of a doubly linked list. + + Returns the first node of a doubly linked list. List must have been + initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). + If List is empty, then List is returned. + + If List is NULL, then ASSERT(). + If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or + InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + + @return The first node of a doubly linked list. + @retval List The list is empty. + +**/ +LIST_ENTRY * +EFIAPI +GetFirstNode ( + IN CONST LIST_ENTRY *List + ); + + +/** + Retrieves the next node of a doubly linked list. + + Returns the node of a doubly linked list that follows Node. + List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE() + or InitializeListHead(). If List is empty, then List is returned. + + If List is NULL, then ASSERT(). + If Node is NULL, then ASSERT(). + If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or + InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and List contains more than + PcdMaximumLinkedListLength nodes, then ASSERT(). + If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + @param Node A pointer to a node in the doubly linked list. + + @return The pointer to the next node if one exists. Otherwise List is returned. + +**/ +LIST_ENTRY * +EFIAPI +GetNextNode ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + + +/** + Retrieves the previous node of a doubly linked list. + + Returns the node of a doubly linked list that precedes Node. + List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE() + or InitializeListHead(). If List is empty, then List is returned. + + If List is NULL, then ASSERT(). + If Node is NULL, then ASSERT(). + If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or + InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and List contains more than + PcdMaximumLinkedListLength nodes, then ASSERT(). + If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + @param Node A pointer to a node in the doubly linked list. + + @return The pointer to the previous node if one exists. Otherwise List is returned. + +**/ +LIST_ENTRY * +EFIAPI +GetPreviousNode ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + + +/** + Checks to see if a doubly linked list is empty or not. + + Checks to see if the doubly linked list is empty. If the linked list contains + zero nodes, this function returns TRUE. Otherwise, it returns FALSE. + + If ListHead is NULL, then ASSERT(). + If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or + InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + + @param ListHead A pointer to the head node of a doubly linked list. + + @retval TRUE The linked list is empty. + @retval FALSE The linked list is not empty. + +**/ +BOOLEAN +EFIAPI +IsListEmpty ( + IN CONST LIST_ENTRY *ListHead + ); + + +/** + Determines if a node in a doubly linked list is the head node of a the same + doubly linked list. This function is typically used to terminate a loop that + traverses all the nodes in a doubly linked list starting with the head node. + + Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the + nodes in the doubly linked list specified by List. List must have been + initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). + + If List is NULL, then ASSERT(). + If Node is NULL, then ASSERT(). + If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), + then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal + to List, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + @param Node A pointer to a node in the doubly linked list. + + @retval TRUE Node is the head of the doubly-linked list pointed by List. + @retval FALSE Node is not the head of the doubly-linked list pointed by List. + +**/ +BOOLEAN +EFIAPI +IsNull ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + + +/** + Determines if a node the last node in a doubly linked list. + + Returns TRUE if Node is the last node in the doubly linked list specified by + List. Otherwise, FALSE is returned. List must have been initialized with + INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). + + If List is NULL, then ASSERT(). + If Node is NULL, then ASSERT(). + If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or + InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + @param Node A pointer to a node in the doubly linked list. + + @retval TRUE Node is the last node in the linked list. + @retval FALSE Node is not the last node in the linked list. + +**/ +BOOLEAN +EFIAPI +IsNodeAtEnd ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + + +/** + Swaps the location of two nodes in a doubly linked list, and returns the + first node after the swap. + + If FirstEntry is identical to SecondEntry, then SecondEntry is returned. + Otherwise, the location of the FirstEntry node is swapped with the location + of the SecondEntry node in a doubly linked list. SecondEntry must be in the + same double linked list as FirstEntry and that double linked list must have + been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). + SecondEntry is returned after the nodes are swapped. + + If FirstEntry is NULL, then ASSERT(). + If SecondEntry is NULL, then ASSERT(). + If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the + same linked list, then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes in the + linked list containing the FirstEntry and SecondEntry nodes, including + the FirstEntry and SecondEntry nodes, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + + @param FirstEntry A pointer to a node in a linked list. + @param SecondEntry A pointer to another node in the same linked list. + + @return SecondEntry. + +**/ +LIST_ENTRY * +EFIAPI +SwapListEntries ( + IN OUT LIST_ENTRY *FirstEntry, + IN OUT LIST_ENTRY *SecondEntry + ); + + +/** + Removes a node from a doubly linked list, and returns the node that follows + the removed node. + + Removes the node Entry from a doubly linked list. It is up to the caller of + this function to release the memory used by this node if that is required. On + exit, the node following Entry in the doubly linked list is returned. If + Entry is the only node in the linked list, then the head node of the linked + list is returned. + + If Entry is NULL, then ASSERT(). + If Entry is the head node of an empty list, then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes in the + linked list containing Entry, including the Entry node, is greater than + or equal to PcdMaximumLinkedListLength, then ASSERT(). + + @param Entry A pointer to a node in a linked list. + + @return Entry. + +**/ +LIST_ENTRY * +EFIAPI +RemoveEntryList ( + IN CONST LIST_ENTRY *Entry + ); + +// +// Math Services +// + +/** + Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled + with zeros. The shifted value is returned. + + This function shifts the 64-bit value Operand to the left by Count bits. The + low Count bits are set to zero. The shifted value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to shift left. + @param Count The number of bits to shift left. + + @return Operand << Count. + +**/ +UINT64 +EFIAPI +LShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + + +/** + Shifts a 64-bit integer right between 0 and 63 bits. This high bits are + filled with zeros. The shifted value is returned. + + This function shifts the 64-bit value Operand to the right by Count bits. The + high Count bits are set to zero. The shifted value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to shift right. + @param Count The number of bits to shift right. + + @return Operand >> Count + +**/ +UINT64 +EFIAPI +RShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + + +/** + Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled + with original integer's bit 63. The shifted value is returned. + + This function shifts the 64-bit value Operand to the right by Count bits. The + high Count bits are set to bit 63 of Operand. The shifted value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to shift right. + @param Count The number of bits to shift right. + + @return Operand >> Count + +**/ +UINT64 +EFIAPI +ARShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + + +/** + Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits + with the high bits that were rotated. + + This function rotates the 32-bit value Operand to the left by Count bits. The + low Count bits are fill with the high Count bits of Operand. The rotated + value is returned. + + If Count is greater than 31, then ASSERT(). + + @param Operand The 32-bit operand to rotate left. + @param Count The number of bits to rotate left. + + @return Operand << Count + +**/ +UINT32 +EFIAPI +LRotU32 ( + IN UINT32 Operand, + IN UINTN Count + ); + + +/** + Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits + with the low bits that were rotated. + + This function rotates the 32-bit value Operand to the right by Count bits. + The high Count bits are fill with the low Count bits of Operand. The rotated + value is returned. + + If Count is greater than 31, then ASSERT(). + + @param Operand The 32-bit operand to rotate right. + @param Count The number of bits to rotate right. + + @return Operand >> Count + +**/ +UINT32 +EFIAPI +RRotU32 ( + IN UINT32 Operand, + IN UINTN Count + ); + + +/** + Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits + with the high bits that were rotated. + + This function rotates the 64-bit value Operand to the left by Count bits. The + low Count bits are fill with the high Count bits of Operand. The rotated + value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to rotate left. + @param Count The number of bits to rotate left. + + @return Operand << Count + +**/ +UINT64 +EFIAPI +LRotU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + + +/** + Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits + with the high low bits that were rotated. + + This function rotates the 64-bit value Operand to the right by Count bits. + The high Count bits are fill with the low Count bits of Operand. The rotated + value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to rotate right. + @param Count The number of bits to rotate right. + + @return Operand >> Count + +**/ +UINT64 +EFIAPI +RRotU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + + +/** + Returns the bit position of the lowest bit set in a 32-bit value. + + This function computes the bit position of the lowest bit set in the 32-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 31 is returned. + + @param Operand The 32-bit operand to evaluate. + + @retval 0..31 The lowest bit set in Operand was found. + @retval -1 Operand is zero. + +**/ +INTN +EFIAPI +LowBitSet32 ( + IN UINT32 Operand + ); + + +/** + Returns the bit position of the lowest bit set in a 64-bit value. + + This function computes the bit position of the lowest bit set in the 64-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 63 is returned. + + @param Operand The 64-bit operand to evaluate. + + @retval 0..63 The lowest bit set in Operand was found. + @retval -1 Operand is zero. + + +**/ +INTN +EFIAPI +LowBitSet64 ( + IN UINT64 Operand + ); + + +/** + Returns the bit position of the highest bit set in a 32-bit value. Equivalent + to log2(x). + + This function computes the bit position of the highest bit set in the 32-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 31 is returned. + + @param Operand The 32-bit operand to evaluate. + + @retval 0..31 Position of the highest bit set in Operand if found. + @retval -1 Operand is zero. + +**/ +INTN +EFIAPI +HighBitSet32 ( + IN UINT32 Operand + ); + + +/** + Returns the bit position of the highest bit set in a 64-bit value. Equivalent + to log2(x). + + This function computes the bit position of the highest bit set in the 64-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 63 is returned. + + @param Operand The 64-bit operand to evaluate. + + @retval 0..63 Position of the highest bit set in Operand if found. + @retval -1 Operand is zero. + +**/ +INTN +EFIAPI +HighBitSet64 ( + IN UINT64 Operand + ); + + +/** + Returns the value of the highest bit set in a 32-bit value. Equivalent to + 1 << log2(x). + + This function computes the value of the highest bit set in the 32-bit value + specified by Operand. If Operand is zero, then zero is returned. + + @param Operand The 32-bit operand to evaluate. + + @return 1 << HighBitSet32(Operand) + @retval 0 Operand is zero. + +**/ +UINT32 +EFIAPI +GetPowerOfTwo32 ( + IN UINT32 Operand + ); + + +/** + Returns the value of the highest bit set in a 64-bit value. Equivalent to + 1 << log2(x). + + This function computes the value of the highest bit set in the 64-bit value + specified by Operand. If Operand is zero, then zero is returned. + + @param Operand The 64-bit operand to evaluate. + + @return 1 << HighBitSet64(Operand) + @retval 0 Operand is zero. + +**/ +UINT64 +EFIAPI +GetPowerOfTwo64 ( + IN UINT64 Operand + ); + + +/** + Switches the endianness of a 16-bit integer. + + This function swaps the bytes in a 16-bit unsigned value to switch the value + from little endian to big endian or vice versa. The byte swapped value is + returned. + + @param Value A 16-bit unsigned value. + + @return The byte swapped Value. + +**/ +UINT16 +EFIAPI +SwapBytes16 ( + IN UINT16 Value + ); + + +/** + Switches the endianness of a 32-bit integer. + + This function swaps the bytes in a 32-bit unsigned value to switch the value + from little endian to big endian or vice versa. The byte swapped value is + returned. + + @param Value A 32-bit unsigned value. + + @return The byte swapped Value. + +**/ +UINT32 +EFIAPI +SwapBytes32 ( + IN UINT32 Value + ); + + +/** + Switches the endianness of a 64-bit integer. + + This function swaps the bytes in a 64-bit unsigned value to switch the value + from little endian to big endian or vice versa. The byte swapped value is + returned. + + @param Value A 64-bit unsigned value. + + @return The byte swapped Value. + +**/ +UINT64 +EFIAPI +SwapBytes64 ( + IN UINT64 Value + ); + + +/** + Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and + generates a 64-bit unsigned result. + + This function multiples the 64-bit unsigned value Multiplicand by the 32-bit + unsigned value Multiplier and generates a 64-bit unsigned result. This 64- + bit unsigned result is returned. + + @param Multiplicand A 64-bit unsigned value. + @param Multiplier A 32-bit unsigned value. + + @return Multiplicand * Multiplier + +**/ +UINT64 +EFIAPI +MultU64x32 ( + IN UINT64 Multiplicand, + IN UINT32 Multiplier + ); + + +/** + Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and + generates a 64-bit unsigned result. + + This function multiples the 64-bit unsigned value Multiplicand by the 64-bit + unsigned value Multiplier and generates a 64-bit unsigned result. This 64- + bit unsigned result is returned. + + @param Multiplicand A 64-bit unsigned value. + @param Multiplier A 64-bit unsigned value. + + @return Multiplicand * Multiplier. + +**/ +UINT64 +EFIAPI +MultU64x64 ( + IN UINT64 Multiplicand, + IN UINT64 Multiplier + ); + + +/** + Multiples a 64-bit signed integer by a 64-bit signed integer and generates a + 64-bit signed result. + + This function multiples the 64-bit signed value Multiplicand by the 64-bit + signed value Multiplier and generates a 64-bit signed result. This 64-bit + signed result is returned. + + @param Multiplicand A 64-bit signed value. + @param Multiplier A 64-bit signed value. + + @return Multiplicand * Multiplier + +**/ +INT64 +EFIAPI +MultS64x64 ( + IN INT64 Multiplicand, + IN INT64 Multiplier + ); + + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates + a 64-bit unsigned result. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. This + function returns the 64-bit unsigned quotient. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + + @return Dividend / Divisor. + +**/ +UINT64 +EFIAPI +DivU64x32 ( + IN UINT64 Dividend, + IN UINT32 Divisor + ); + + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates + a 32-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 32-bit remainder. This function + returns the 32-bit unsigned remainder. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + + @return Dividend % Divisor. + +**/ +UINT32 +EFIAPI +ModU64x32 ( + IN UINT64 Dividend, + IN UINT32 Divisor + ); + + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates + a 64-bit unsigned result and an optional 32-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder + is not NULL, then the 32-bit unsigned remainder is returned in Remainder. + This function returns the 64-bit unsigned quotient. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + @param Remainder A pointer to a 32-bit unsigned value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor. + +**/ +UINT64 +EFIAPI +DivU64x32Remainder ( + IN UINT64 Dividend, + IN UINT32 Divisor, + OUT UINT32 *Remainder OPTIONAL + ); + + +/** + Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates + a 64-bit unsigned result and an optional 64-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 64-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder + is not NULL, then the 64-bit unsigned remainder is returned in Remainder. + This function returns the 64-bit unsigned quotient. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 64-bit unsigned value. + @param Remainder A pointer to a 64-bit unsigned value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor. + +**/ +UINT64 +EFIAPI +DivU64x64Remainder ( + IN UINT64 Dividend, + IN UINT64 Divisor, + OUT UINT64 *Remainder OPTIONAL + ); + + +/** + Divides a 64-bit signed integer by a 64-bit signed integer and generates a + 64-bit signed result and a optional 64-bit signed remainder. + + This function divides the 64-bit signed value Dividend by the 64-bit signed + value Divisor and generates a 64-bit signed quotient. If Remainder is not + NULL, then the 64-bit signed remainder is returned in Remainder. This + function returns the 64-bit signed quotient. + + It is the caller's responsibility to not call this function with a Divisor of 0. + If Divisor is 0, then the quotient and remainder should be assumed to be + the largest negative integer. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit signed value. + @param Divisor A 64-bit signed value. + @param Remainder A pointer to a 64-bit signed value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor. + +**/ +INT64 +EFIAPI +DivS64x64Remainder ( + IN INT64 Dividend, + IN INT64 Divisor, + OUT INT64 *Remainder OPTIONAL + ); + + +/** + Reads a 16-bit value from memory that may be unaligned. + + This function returns the 16-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 16-bit value that may be unaligned. + + @return The 16-bit value read from Buffer. + +**/ +UINT16 +EFIAPI +ReadUnaligned16 ( + IN CONST UINT16 *Buffer + ); + + +/** + Writes a 16-bit value to memory that may be unaligned. + + This function writes the 16-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 16-bit value that may be unaligned. + @param Value 16-bit value to write to Buffer. + + @return The 16-bit value to write to Buffer. + +**/ +UINT16 +EFIAPI +WriteUnaligned16 ( + OUT UINT16 *Buffer, + IN UINT16 Value + ); + + +/** + Reads a 24-bit value from memory that may be unaligned. + + This function returns the 24-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 24-bit value that may be unaligned. + + @return The 24-bit value read from Buffer. + +**/ +UINT32 +EFIAPI +ReadUnaligned24 ( + IN CONST UINT32 *Buffer + ); + + +/** + Writes a 24-bit value to memory that may be unaligned. + + This function writes the 24-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 24-bit value that may be unaligned. + @param Value 24-bit value to write to Buffer. + + @return The 24-bit value to write to Buffer. + +**/ +UINT32 +EFIAPI +WriteUnaligned24 ( + OUT UINT32 *Buffer, + IN UINT32 Value + ); + + +/** + Reads a 32-bit value from memory that may be unaligned. + + This function returns the 32-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 32-bit value that may be unaligned. + + @return The 32-bit value read from Buffer. + +**/ +UINT32 +EFIAPI +ReadUnaligned32 ( + IN CONST UINT32 *Buffer + ); + + +/** + Writes a 32-bit value to memory that may be unaligned. + + This function writes the 32-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 32-bit value that may be unaligned. + @param Value 32-bit value to write to Buffer. + + @return The 32-bit value to write to Buffer. + +**/ +UINT32 +EFIAPI +WriteUnaligned32 ( + OUT UINT32 *Buffer, + IN UINT32 Value + ); + + +/** + Reads a 64-bit value from memory that may be unaligned. + + This function returns the 64-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 64-bit value that may be unaligned. + + @return The 64-bit value read from Buffer. + +**/ +UINT64 +EFIAPI +ReadUnaligned64 ( + IN CONST UINT64 *Buffer + ); + + +/** + Writes a 64-bit value to memory that may be unaligned. + + This function writes the 64-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer The pointer to a 64-bit value that may be unaligned. + @param Value 64-bit value to write to Buffer. + + @return The 64-bit value to write to Buffer. + +**/ +UINT64 +EFIAPI +WriteUnaligned64 ( + OUT UINT64 *Buffer, + IN UINT64 Value + ); + + +// +// Bit Field Functions +// + +/** + Returns a bit field from an 8-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + + @return The bit field read. + +**/ +UINT8 +EFIAPI +BitFieldRead8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + + +/** + Writes a bit field to an 8-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 8-bit value is + returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param Value New value of the bit field. + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldWrite8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value + ); + + +/** + Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 8-bit value is returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param OrData The value to OR with the read value from the value + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldOr8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData + ); + + +/** + Reads a bit field from an 8-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 8-bit value is returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the read value from the value. + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldAnd8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData + ); + + +/** + Reads a bit field from an 8-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + OR with value specified by OrData. All other bits in Operand are + preserved. The new 8-bit value is returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldAndThenOr8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData + ); + + +/** + Returns a bit field from a 16-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + + @return The bit field read. + +**/ +UINT16 +EFIAPI +BitFieldRead16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + + +/** + Writes a bit field to a 16-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 16-bit value is + returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param Value New value of the bit field. + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldWrite16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value + ); + + +/** + Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 16-bit value is returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param OrData The value to OR with the read value from the value + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldOr16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData + ); + + +/** + Reads a bit field from a 16-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 16-bit value is returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the read value from the value + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldAnd16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData + ); + + +/** + Reads a bit field from a 16-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + OR with value specified by OrData. All other bits in Operand are + preserved. The new 16-bit value is returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldAndThenOr16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData + ); + + +/** + Returns a bit field from a 32-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The bit field read. + +**/ +UINT32 +EFIAPI +BitFieldRead32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + + +/** + Writes a bit field to a 32-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 32-bit value is + returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldWrite32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + + +/** + Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 32-bit value is returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the read value from the value. + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldOr32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + + +/** + Reads a bit field from a 32-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 32-bit value is returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the value + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldAnd32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + + +/** + Reads a bit field from a 32-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + OR with value specified by OrData. All other bits in Operand are + preserved. The new 32-bit value is returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldAndThenOr32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + + +/** + Returns a bit field from a 64-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + + @return The bit field read. + +**/ +UINT64 +EFIAPI +BitFieldRead64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + + +/** + Writes a bit field to a 64-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 64-bit value is + returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param Value New value of the bit field. + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldWrite64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 Value + ); + + +/** + Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 64-bit value is returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param OrData The value to OR with the read value from the value + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldOr64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 OrData + ); + + +/** + Reads a bit field from a 64-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 64-bit value is returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the value + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldAnd64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData + ); + + +/** + Reads a bit field from a 64-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + OR with value specified by OrData. All other bits in Operand are + preserved. The new 64-bit value is returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldAndThenOr64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData, + IN UINT64 OrData + ); + +// +// Base Library Checksum Functions +// + +/** + Returns the sum of all elements in a buffer in unit of UINT8. + During calculation, the carry bits are dropped. + + This function calculates the sum of all elements in a buffer + in unit of UINT8. The carry bits in result of addition are dropped. + The result is returned as UINT8. If Length is Zero, then Zero is + returned. + + If Buffer is NULL, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the sum operation. + @param Length The size, in bytes, of Buffer. + + @return Sum The sum of Buffer with carry bits dropped during additions. + +**/ +UINT8 +EFIAPI +CalculateSum8 ( + IN CONST UINT8 *Buffer, + IN UINTN Length + ); + + +/** + Returns the two's complement checksum of all elements in a buffer + of 8-bit values. + + This function first calculates the sum of the 8-bit values in the + buffer specified by Buffer and Length. The carry bits in the result + of addition are dropped. Then, the two's complement of the sum is + returned. If Length is 0, then 0 is returned. + + If Buffer is NULL, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the checksum operation. + @param Length The size, in bytes, of Buffer. + + @return Checksum The two's complement checksum of Buffer. + +**/ +UINT8 +EFIAPI +CalculateCheckSum8 ( + IN CONST UINT8 *Buffer, + IN UINTN Length + ); + + +/** + Returns the sum of all elements in a buffer of 16-bit values. During + calculation, the carry bits are dropped. + + This function calculates the sum of the 16-bit values in the buffer + specified by Buffer and Length. The carry bits in result of addition are dropped. + The 16-bit result is returned. If Length is 0, then 0 is returned. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-bit boundary, then ASSERT(). + If Length is not aligned on a 16-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the sum operation. + @param Length The size, in bytes, of Buffer. + + @return Sum The sum of Buffer with carry bits dropped during additions. + +**/ +UINT16 +EFIAPI +CalculateSum16 ( + IN CONST UINT16 *Buffer, + IN UINTN Length + ); + + +/** + Returns the two's complement checksum of all elements in a buffer of + 16-bit values. + + This function first calculates the sum of the 16-bit values in the buffer + specified by Buffer and Length. The carry bits in the result of addition + are dropped. Then, the two's complement of the sum is returned. If Length + is 0, then 0 is returned. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-bit boundary, then ASSERT(). + If Length is not aligned on a 16-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the checksum operation. + @param Length The size, in bytes, of Buffer. + + @return Checksum The two's complement checksum of Buffer. + +**/ +UINT16 +EFIAPI +CalculateCheckSum16 ( + IN CONST UINT16 *Buffer, + IN UINTN Length + ); + + +/** + Returns the sum of all elements in a buffer of 32-bit values. During + calculation, the carry bits are dropped. + + This function calculates the sum of the 32-bit values in the buffer + specified by Buffer and Length. The carry bits in result of addition are dropped. + The 32-bit result is returned. If Length is 0, then 0 is returned. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 32-bit boundary, then ASSERT(). + If Length is not aligned on a 32-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the sum operation. + @param Length The size, in bytes, of Buffer. + + @return Sum The sum of Buffer with carry bits dropped during additions. + +**/ +UINT32 +EFIAPI +CalculateSum32 ( + IN CONST UINT32 *Buffer, + IN UINTN Length + ); + + +/** + Returns the two's complement checksum of all elements in a buffer of + 32-bit values. + + This function first calculates the sum of the 32-bit values in the buffer + specified by Buffer and Length. The carry bits in the result of addition + are dropped. Then, the two's complement of the sum is returned. If Length + is 0, then 0 is returned. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 32-bit boundary, then ASSERT(). + If Length is not aligned on a 32-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the checksum operation. + @param Length The size, in bytes, of Buffer. + + @return Checksum The two's complement checksum of Buffer. + +**/ +UINT32 +EFIAPI +CalculateCheckSum32 ( + IN CONST UINT32 *Buffer, + IN UINTN Length + ); + + +/** + Returns the sum of all elements in a buffer of 64-bit values. During + calculation, the carry bits are dropped. + + This function calculates the sum of the 64-bit values in the buffer + specified by Buffer and Length. The carry bits in result of addition are dropped. + The 64-bit result is returned. If Length is 0, then 0 is returned. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 64-bit boundary, then ASSERT(). + If Length is not aligned on a 64-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the sum operation. + @param Length The size, in bytes, of Buffer. + + @return Sum The sum of Buffer with carry bits dropped during additions. + +**/ +UINT64 +EFIAPI +CalculateSum64 ( + IN CONST UINT64 *Buffer, + IN UINTN Length + ); + + +/** + Returns the two's complement checksum of all elements in a buffer of + 64-bit values. + + This function first calculates the sum of the 64-bit values in the buffer + specified by Buffer and Length. The carry bits in the result of addition + are dropped. Then, the two's complement of the sum is returned. If Length + is 0, then 0 is returned. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 64-bit boundary, then ASSERT(). + If Length is not aligned on a 64-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + + @param Buffer The pointer to the buffer to carry out the checksum operation. + @param Length The size, in bytes, of Buffer. + + @return Checksum The two's complement checksum of Buffer. + +**/ +UINT64 +EFIAPI +CalculateCheckSum64 ( + IN CONST UINT64 *Buffer, + IN UINTN Length + ); + + +// +// Base Library CPU Functions +// + +/** + Function entry point used when a stack switch is requested with SwitchStack() + + @param Context1 Context1 parameter passed into SwitchStack(). + @param Context2 Context2 parameter passed into SwitchStack(). + +**/ +typedef +VOID +(EFIAPI *SWITCH_STACK_ENTRY_POINT)( + IN VOID *Context1, OPTIONAL + IN VOID *Context2 OPTIONAL + ); + + +/** + Used to serialize load and store operations. + + All loads and stores that proceed calls to this function are guaranteed to be + globally visible when this function returns. + +**/ +VOID +EFIAPI +MemoryFence ( + VOID + ); + + +/** + Saves the current CPU context that can be restored with a call to LongJump() + and returns 0. + + Saves the current CPU context in the buffer specified by JumpBuffer and + returns 0. The initial call to SetJump() must always return 0. Subsequent + calls to LongJump() cause a non-zero value to be returned by SetJump(). + + If JumpBuffer is NULL, then ASSERT(). + For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT(). + + NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific. + The same structure must never be used for more than one CPU architecture context. + For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. + SetJump()/LongJump() is not currently supported for the EBC processor type. + + @param JumpBuffer A pointer to CPU context buffer. + + @retval 0 Indicates a return from SetJump(). + +**/ +UINTN +EFIAPI +SetJump ( + OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer + ); + + +/** + Restores the CPU context that was saved with SetJump(). + + Restores the CPU context from the buffer specified by JumpBuffer. This + function never returns to the caller. Instead is resumes execution based on + the state of JumpBuffer. + + If JumpBuffer is NULL, then ASSERT(). + For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT(). + If Value is 0, then ASSERT(). + + @param JumpBuffer A pointer to CPU context buffer. + @param Value The value to return when the SetJump() context is + restored and must be non-zero. + +**/ +VOID +EFIAPI +LongJump ( + IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, + IN UINTN Value + ); + + +/** + Enables CPU interrupts. + +**/ +VOID +EFIAPI +EnableInterrupts ( + VOID + ); + + +/** + Disables CPU interrupts. + +**/ +VOID +EFIAPI +DisableInterrupts ( + VOID + ); + + +/** + Disables CPU interrupts and returns the interrupt state prior to the disable + operation. + + @retval TRUE CPU interrupts were enabled on entry to this call. + @retval FALSE CPU interrupts were disabled on entry to this call. + +**/ +BOOLEAN +EFIAPI +SaveAndDisableInterrupts ( + VOID + ); + + +/** + Enables CPU interrupts for the smallest window required to capture any + pending interrupts. + +**/ +VOID +EFIAPI +EnableDisableInterrupts ( + VOID + ); + + +/** + Retrieves the current CPU interrupt state. + + Returns TRUE if interrupts are currently enabled. Otherwise + returns FALSE. + + @retval TRUE CPU interrupts are enabled. + @retval FALSE CPU interrupts are disabled. + +**/ +BOOLEAN +EFIAPI +GetInterruptState ( + VOID + ); + + +/** + Set the current CPU interrupt state. + + Sets the current CPU interrupt state to the state specified by + InterruptState. If InterruptState is TRUE, then interrupts are enabled. If + InterruptState is FALSE, then interrupts are disabled. InterruptState is + returned. + + @param InterruptState TRUE if interrupts should enabled. FALSE if + interrupts should be disabled. + + @return InterruptState + +**/ +BOOLEAN +EFIAPI +SetInterruptState ( + IN BOOLEAN InterruptState + ); + + +/** + Requests CPU to pause for a short period of time. + + Requests CPU to pause for a short period of time. Typically used in MP + systems to prevent memory starvation while waiting for a spin lock. + +**/ +VOID +EFIAPI +CpuPause ( + VOID + ); + + +/** + Transfers control to a function starting with a new stack. + + Transfers control to the function specified by EntryPoint using the + new stack specified by NewStack and passing in the parameters specified + by Context1 and Context2. Context1 and Context2 are optional and may + be NULL. The function EntryPoint must never return. This function + supports a variable number of arguments following the NewStack parameter. + These additional arguments are ignored on IA-32, x64, and EBC architectures. + Itanium processors expect one additional parameter of type VOID * that specifies + the new backing store pointer. + + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + @param EntryPoint A pointer to function to call with the new stack. + @param Context1 A pointer to the context to pass into the EntryPoint + function. + @param Context2 A pointer to the context to pass into the EntryPoint + function. + @param NewStack A pointer to the new stack to use for the EntryPoint + function. + @param ... This variable argument list is ignored for IA-32, x64, and + EBC architectures. For Itanium processors, this variable + argument list is expected to contain a single parameter of + type VOID * that specifies the new backing store pointer. + + +**/ +VOID +EFIAPI +SwitchStack ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack, + ... + ); + + +/** + Generates a breakpoint on the CPU. + + Generates a breakpoint on the CPU. The breakpoint must be implemented such + that code can resume normal execution after the breakpoint. + +**/ +VOID +EFIAPI +CpuBreakpoint ( + VOID + ); + + +/** + Executes an infinite loop. + + Forces the CPU to execute an infinite loop. A debugger may be used to skip + past the loop and the code that follows the loop must execute properly. This + implies that the infinite loop must not cause the code that follow it to be + optimized away. + +**/ +VOID +EFIAPI +CpuDeadLoop ( + VOID + ); + +#if defined (MDE_CPU_IPF) + +/** + Flush a range of cache lines in the cache coherency domain of the calling + CPU. + + Flushes the cache lines specified by Address and Length. If Address is not aligned + on a cache line boundary, then entire cache line containing Address is flushed. + If Address + Length is not aligned on a cache line boundary, then the entire cache + line containing Address + Length - 1 is flushed. This function may choose to flush + the entire cache if that is more efficient than flushing the specified range. If + Length is 0, the no cache lines are flushed. Address is returned. + This function is only available on Itanium processors. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the instruction lines to invalidate. If + the CPU is in a physical addressing mode, then Address is a + physical address. If the CPU is in a virtual addressing mode, + then Address is a virtual address. + + @param Length The number of bytes to invalidate from the instruction cache. + + @return Address. + +**/ +VOID * +EFIAPI +AsmFlushCacheRange ( + IN VOID *Address, + IN UINTN Length + ); + + +/** + Executes an FC instruction. + Executes an FC instruction on the cache line specified by Address. + The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary). + An implementation may flush a larger region. This function is only available on Itanium processors. + + @param Address The Address of cache line to be flushed. + + @return The address of FC instruction executed. + +**/ +UINT64 +EFIAPI +AsmFc ( + IN UINT64 Address + ); + + +/** + Executes an FC.I instruction. + Executes an FC.I instruction on the cache line specified by Address. + The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary). + An implementation may flush a larger region. This function is only available on Itanium processors. + + @param Address The Address of cache line to be flushed. + + @return The address of the FC.I instruction executed. + +**/ +UINT64 +EFIAPI +AsmFci ( + IN UINT64 Address + ); + + +/** + Reads the current value of a Processor Identifier Register (CPUID). + + Reads and returns the current value of Processor Identifier Register specified by Index. + The Index of largest implemented CPUID (One less than the number of implemented CPUID + registers) is determined by CPUID [3] bits {7:0}. + No parameter checking is performed on Index. If the Index value is beyond the + implemented CPUID register range, a Reserved Register/Field fault may occur. The caller + must either guarantee that Index is valid, or the caller must set up fault handlers to + catch the faults. This function is only available on Itanium processors. + + @param Index The 8-bit Processor Identifier Register index to read. + + @return The current value of Processor Identifier Register specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadCpuid ( + IN UINT8 Index + ); + + +/** + Reads the current value of 64-bit Processor Status Register (PSR). + This function is only available on Itanium processors. + + @return The current value of PSR. + +**/ +UINT64 +EFIAPI +AsmReadPsr ( + VOID + ); + + +/** + Writes the current value of 64-bit Processor Status Register (PSR). + + No parameter checking is performed on Value. All bits of Value corresponding to + reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to PSR. + + @return The 64-bit value written to the PSR. + +**/ +UINT64 +EFIAPI +AsmWritePsr ( + IN UINT64 Value + ); + + +/** + Reads the current value of 64-bit Kernel Register #0 (KR0). + + Reads and returns the current value of KR0. + This function is only available on Itanium processors. + + @return The current value of KR0. + +**/ +UINT64 +EFIAPI +AsmReadKr0 ( + VOID + ); + + +/** + Reads the current value of 64-bit Kernel Register #1 (KR1). + + Reads and returns the current value of KR1. + This function is only available on Itanium processors. + + @return The current value of KR1. + +**/ +UINT64 +EFIAPI +AsmReadKr1 ( + VOID + ); + + +/** + Reads the current value of 64-bit Kernel Register #2 (KR2). + + Reads and returns the current value of KR2. + This function is only available on Itanium processors. + + @return The current value of KR2. + +**/ +UINT64 +EFIAPI +AsmReadKr2 ( + VOID + ); + + +/** + Reads the current value of 64-bit Kernel Register #3 (KR3). + + Reads and returns the current value of KR3. + This function is only available on Itanium processors. + + @return The current value of KR3. + +**/ +UINT64 +EFIAPI +AsmReadKr3 ( + VOID + ); + + +/** + Reads the current value of 64-bit Kernel Register #4 (KR4). + + Reads and returns the current value of KR4. + This function is only available on Itanium processors. + + @return The current value of KR4. + +**/ +UINT64 +EFIAPI +AsmReadKr4 ( + VOID + ); + + +/** + Reads the current value of 64-bit Kernel Register #5 (KR5). + + Reads and returns the current value of KR5. + This function is only available on Itanium processors. + + @return The current value of KR5. + +**/ +UINT64 +EFIAPI +AsmReadKr5 ( + VOID + ); + + +/** + Reads the current value of 64-bit Kernel Register #6 (KR6). + + Reads and returns the current value of KR6. + This function is only available on Itanium processors. + + @return The current value of KR6. + +**/ +UINT64 +EFIAPI +AsmReadKr6 ( + VOID + ); + + +/** + Reads the current value of 64-bit Kernel Register #7 (KR7). + + Reads and returns the current value of KR7. + This function is only available on Itanium processors. + + @return The current value of KR7. + +**/ +UINT64 +EFIAPI +AsmReadKr7 ( + VOID + ); + + +/** + Write the current value of 64-bit Kernel Register #0 (KR0). + + Writes the current value of KR0. The 64-bit value written to + the KR0 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR0. + + @return The 64-bit value written to the KR0. + +**/ +UINT64 +EFIAPI +AsmWriteKr0 ( + IN UINT64 Value + ); + + +/** + Write the current value of 64-bit Kernel Register #1 (KR1). + + Writes the current value of KR1. The 64-bit value written to + the KR1 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR1. + + @return The 64-bit value written to the KR1. + +**/ +UINT64 +EFIAPI +AsmWriteKr1 ( + IN UINT64 Value + ); + + +/** + Write the current value of 64-bit Kernel Register #2 (KR2). + + Writes the current value of KR2. The 64-bit value written to + the KR2 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR2. + + @return The 64-bit value written to the KR2. + +**/ +UINT64 +EFIAPI +AsmWriteKr2 ( + IN UINT64 Value + ); + + +/** + Write the current value of 64-bit Kernel Register #3 (KR3). + + Writes the current value of KR3. The 64-bit value written to + the KR3 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR3. + + @return The 64-bit value written to the KR3. + +**/ +UINT64 +EFIAPI +AsmWriteKr3 ( + IN UINT64 Value + ); + + +/** + Write the current value of 64-bit Kernel Register #4 (KR4). + + Writes the current value of KR4. The 64-bit value written to + the KR4 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR4. + + @return The 64-bit value written to the KR4. + +**/ +UINT64 +EFIAPI +AsmWriteKr4 ( + IN UINT64 Value + ); + + +/** + Write the current value of 64-bit Kernel Register #5 (KR5). + + Writes the current value of KR5. The 64-bit value written to + the KR5 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR5. + + @return The 64-bit value written to the KR5. + +**/ +UINT64 +EFIAPI +AsmWriteKr5 ( + IN UINT64 Value + ); + + +/** + Write the current value of 64-bit Kernel Register #6 (KR6). + + Writes the current value of KR6. The 64-bit value written to + the KR6 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR6. + + @return The 64-bit value written to the KR6. + +**/ +UINT64 +EFIAPI +AsmWriteKr6 ( + IN UINT64 Value + ); + + +/** + Write the current value of 64-bit Kernel Register #7 (KR7). + + Writes the current value of KR7. The 64-bit value written to + the KR7 is returned. This function is only available on Itanium processors. + + @param Value The 64-bit value to write to KR7. + + @return The 64-bit value written to the KR7. + +**/ +UINT64 +EFIAPI +AsmWriteKr7 ( + IN UINT64 Value + ); + + +/** + Reads the current value of Interval Timer Counter Register (ITC). + + Reads and returns the current value of ITC. + This function is only available on Itanium processors. + + @return The current value of ITC. + +**/ +UINT64 +EFIAPI +AsmReadItc ( + VOID + ); + + +/** + Reads the current value of Interval Timer Vector Register (ITV). + + Reads and returns the current value of ITV. + This function is only available on Itanium processors. + + @return The current value of ITV. + +**/ +UINT64 +EFIAPI +AsmReadItv ( + VOID + ); + + +/** + Reads the current value of Interval Timer Match Register (ITM). + + Reads and returns the current value of ITM. + This function is only available on Itanium processors. + + @return The current value of ITM. +**/ +UINT64 +EFIAPI +AsmReadItm ( + VOID + ); + + +/** + Writes the current value of 64-bit Interval Timer Counter Register (ITC). + + Writes the current value of ITC. The 64-bit value written to the ITC is returned. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to ITC. + + @return The 64-bit value written to the ITC. + +**/ +UINT64 +EFIAPI +AsmWriteItc ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Interval Timer Match Register (ITM). + + Writes the current value of ITM. The 64-bit value written to the ITM is returned. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to ITM. + + @return The 64-bit value written to the ITM. + +**/ +UINT64 +EFIAPI +AsmWriteItm ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Interval Timer Vector Register (ITV). + + Writes the current value of ITV. The 64-bit value written to the ITV is returned. + No parameter checking is performed on Value. All bits of Value corresponding to + reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to ITV. + + @return The 64-bit value written to the ITV. + +**/ +UINT64 +EFIAPI +AsmWriteItv ( + IN UINT64 Value + ); + + +/** + Reads the current value of Default Control Register (DCR). + + Reads and returns the current value of DCR. This function is only available on Itanium processors. + + @return The current value of DCR. + +**/ +UINT64 +EFIAPI +AsmReadDcr ( + VOID + ); + + +/** + Reads the current value of Interruption Vector Address Register (IVA). + + Reads and returns the current value of IVA. This function is only available on Itanium processors. + + @return The current value of IVA. +**/ +UINT64 +EFIAPI +AsmReadIva ( + VOID + ); + + +/** + Reads the current value of Page Table Address Register (PTA). + + Reads and returns the current value of PTA. This function is only available on Itanium processors. + + @return The current value of PTA. + +**/ +UINT64 +EFIAPI +AsmReadPta ( + VOID + ); + + +/** + Writes the current value of 64-bit Default Control Register (DCR). + + Writes the current value of DCR. The 64-bit value written to the DCR is returned. + No parameter checking is performed on Value. All bits of Value corresponding to + reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to DCR. + + @return The 64-bit value written to the DCR. + +**/ +UINT64 +EFIAPI +AsmWriteDcr ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Interruption Vector Address Register (IVA). + + Writes the current value of IVA. The 64-bit value written to the IVA is returned. + The size of vector table is 32 K bytes and is 32 K bytes aligned + the low 15 bits of Value is ignored when written. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to IVA. + + @return The 64-bit value written to the IVA. + +**/ +UINT64 +EFIAPI +AsmWriteIva ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Page Table Address Register (PTA). + + Writes the current value of PTA. The 64-bit value written to the PTA is returned. + No parameter checking is performed on Value. All bits of Value corresponding to + reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to PTA. + + @return The 64-bit value written to the PTA. +**/ +UINT64 +EFIAPI +AsmWritePta ( + IN UINT64 Value + ); + + +/** + Reads the current value of Local Interrupt ID Register (LID). + + Reads and returns the current value of LID. This function is only available on Itanium processors. + + @return The current value of LID. + +**/ +UINT64 +EFIAPI +AsmReadLid ( + VOID + ); + + +/** + Reads the current value of External Interrupt Vector Register (IVR). + + Reads and returns the current value of IVR. This function is only available on Itanium processors. + + @return The current value of IVR. + +**/ +UINT64 +EFIAPI +AsmReadIvr ( + VOID + ); + + +/** + Reads the current value of Task Priority Register (TPR). + + Reads and returns the current value of TPR. This function is only available on Itanium processors. + + @return The current value of TPR. + +**/ +UINT64 +EFIAPI +AsmReadTpr ( + VOID + ); + + +/** + Reads the current value of External Interrupt Request Register #0 (IRR0). + + Reads and returns the current value of IRR0. This function is only available on Itanium processors. + + @return The current value of IRR0. + +**/ +UINT64 +EFIAPI +AsmReadIrr0 ( + VOID + ); + + +/** + Reads the current value of External Interrupt Request Register #1 (IRR1). + + Reads and returns the current value of IRR1. This function is only available on Itanium processors. + + @return The current value of IRR1. + +**/ +UINT64 +EFIAPI +AsmReadIrr1 ( + VOID + ); + + +/** + Reads the current value of External Interrupt Request Register #2 (IRR2). + + Reads and returns the current value of IRR2. This function is only available on Itanium processors. + + @return The current value of IRR2. + +**/ +UINT64 +EFIAPI +AsmReadIrr2 ( + VOID + ); + + +/** + Reads the current value of External Interrupt Request Register #3 (IRR3). + + Reads and returns the current value of IRR3. This function is only available on Itanium processors. + + @return The current value of IRR3. + +**/ +UINT64 +EFIAPI +AsmReadIrr3 ( + VOID + ); + + +/** + Reads the current value of Performance Monitor Vector Register (PMV). + + Reads and returns the current value of PMV. This function is only available on Itanium processors. + + @return The current value of PMV. + +**/ +UINT64 +EFIAPI +AsmReadPmv ( + VOID + ); + + +/** + Reads the current value of Corrected Machine Check Vector Register (CMCV). + + Reads and returns the current value of CMCV. This function is only available on Itanium processors. + + @return The current value of CMCV. + +**/ +UINT64 +EFIAPI +AsmReadCmcv ( + VOID + ); + + +/** + Reads the current value of Local Redirection Register #0 (LRR0). + + Reads and returns the current value of LRR0. This function is only available on Itanium processors. + + @return The current value of LRR0. + +**/ +UINT64 +EFIAPI +AsmReadLrr0 ( + VOID + ); + + +/** + Reads the current value of Local Redirection Register #1 (LRR1). + + Reads and returns the current value of LRR1. This function is only available on Itanium processors. + + @return The current value of LRR1. + +**/ +UINT64 +EFIAPI +AsmReadLrr1 ( + VOID + ); + + +/** + Writes the current value of 64-bit Page Local Interrupt ID Register (LID). + + Writes the current value of LID. The 64-bit value written to the LID is returned. + No parameter checking is performed on Value. All bits of Value corresponding to + reserved fields of LID must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to LID. + + @return The 64-bit value written to the LID. + +**/ +UINT64 +EFIAPI +AsmWriteLid ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Task Priority Register (TPR). + + Writes the current value of TPR. The 64-bit value written to the TPR is returned. + No parameter checking is performed on Value. All bits of Value corresponding to + reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to TPR. + + @return The 64-bit value written to the TPR. + +**/ +UINT64 +EFIAPI +AsmWriteTpr ( + IN UINT64 Value + ); + + +/** + Performs a write operation on End OF External Interrupt Register (EOI). + + Writes a value of 0 to the EOI Register. This function is only available on Itanium processors. + +**/ +VOID +EFIAPI +AsmWriteEoi ( + VOID + ); + + +/** + Writes the current value of 64-bit Performance Monitor Vector Register (PMV). + + Writes the current value of PMV. The 64-bit value written to the PMV is returned. + No parameter checking is performed on Value. All bits of Value corresponding + to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to PMV. + + @return The 64-bit value written to the PMV. + +**/ +UINT64 +EFIAPI +AsmWritePmv ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV). + + Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. + No parameter checking is performed on Value. All bits of Value corresponding + to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to CMCV. + + @return The 64-bit value written to the CMCV. + +**/ +UINT64 +EFIAPI +AsmWriteCmcv ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Local Redirection Register #0 (LRR0). + + Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. + No parameter checking is performed on Value. All bits of Value corresponding + to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to LRR0. + + @return The 64-bit value written to the LRR0. + +**/ +UINT64 +EFIAPI +AsmWriteLrr0 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Local Redirection Register #1 (LRR1). + + Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. + No parameter checking is performed on Value. All bits of Value corresponding + to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur. + The caller must either guarantee that Value is valid, or the caller must + set up fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to LRR1. + + @return The 64-bit value written to the LRR1. + +**/ +UINT64 +EFIAPI +AsmWriteLrr1 ( + IN UINT64 Value + ); + + +/** + Reads the current value of Instruction Breakpoint Register (IBR). + + The Instruction Breakpoint Registers are used in pairs. The even numbered + registers contain breakpoint addresses, and the odd numbered registers contain + breakpoint mask conditions. At least four instruction registers pairs are implemented + on all processor models. Implemented registers are contiguous starting with + register 0. No parameter checking is performed on Index, and if the Index value + is beyond the implemented IBR register range, a Reserved Register/Field fault may + occur. The caller must either guarantee that Index is valid, or the caller must + set up fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Index The 8-bit Instruction Breakpoint Register index to read. + + @return The current value of Instruction Breakpoint Register specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadIbr ( + IN UINT8 Index + ); + + +/** + Reads the current value of Data Breakpoint Register (DBR). + + The Data Breakpoint Registers are used in pairs. The even numbered registers + contain breakpoint addresses, and odd numbered registers contain breakpoint + mask conditions. At least four data registers pairs are implemented on all processor + models. Implemented registers are contiguous starting with register 0. + No parameter checking is performed on Index. If the Index value is beyond + the implemented DBR register range, a Reserved Register/Field fault may occur. + The caller must either guarantee that Index is valid, or the caller must set up + fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Index The 8-bit Data Breakpoint Register index to read. + + @return The current value of Data Breakpoint Register specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadDbr ( + IN UINT8 Index + ); + + +/** + Reads the current value of Performance Monitor Configuration Register (PMC). + + All processor implementations provide at least four performance counters + (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow + status registers (PMC [0]... PMC [3]). Processor implementations may provide + additional implementation-dependent PMC and PMD to increase the number of + 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD + register set is implementation dependent. No parameter checking is performed + on Index. If the Index value is beyond the implemented PMC register range, + zero value will be returned. + This function is only available on Itanium processors. + + @param Index The 8-bit Performance Monitor Configuration Register index to read. + + @return The current value of Performance Monitor Configuration Register + specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadPmc ( + IN UINT8 Index + ); + + +/** + Reads the current value of Performance Monitor Data Register (PMD). + + All processor implementations provide at least 4 performance counters + (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter + overflow status registers (PMC [0]... PMC [3]). Processor implementations may + provide additional implementation-dependent PMC and PMD to increase the number + of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD + register set is implementation dependent. No parameter checking is performed + on Index. If the Index value is beyond the implemented PMD register range, + zero value will be returned. + This function is only available on Itanium processors. + + @param Index The 8-bit Performance Monitor Data Register index to read. + + @return The current value of Performance Monitor Data Register specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadPmd ( + IN UINT8 Index + ); + + +/** + Writes the current value of 64-bit Instruction Breakpoint Register (IBR). + + Writes current value of Instruction Breakpoint Register specified by Index. + The Instruction Breakpoint Registers are used in pairs. The even numbered + registers contain breakpoint addresses, and odd numbered registers contain + breakpoint mask conditions. At least four instruction registers pairs are implemented + on all processor models. Implemented registers are contiguous starting with + register 0. No parameter checking is performed on Index. If the Index value + is beyond the implemented IBR register range, a Reserved Register/Field fault may + occur. The caller must either guarantee that Index is valid, or the caller must + set up fault handlers to catch the faults. + This function is only available on Itanium processors. + + @param Index The 8-bit Instruction Breakpoint Register index to write. + @param Value The 64-bit value to write to IBR. + + @return The 64-bit value written to the IBR. + +**/ +UINT64 +EFIAPI +AsmWriteIbr ( + IN UINT8 Index, + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Data Breakpoint Register (DBR). + + Writes current value of Data Breakpoint Register specified by Index. + The Data Breakpoint Registers are used in pairs. The even numbered registers + contain breakpoint addresses, and odd numbered registers contain breakpoint + mask conditions. At least four data registers pairs are implemented on all processor + models. Implemented registers are contiguous starting with register 0. No parameter + checking is performed on Index. If the Index value is beyond the implemented + DBR register range, a Reserved Register/Field fault may occur. The caller must + either guarantee that Index is valid, or the caller must set up fault handlers to + catch the faults. + This function is only available on Itanium processors. + + @param Index The 8-bit Data Breakpoint Register index to write. + @param Value The 64-bit value to write to DBR. + + @return The 64-bit value written to the DBR. + +**/ +UINT64 +EFIAPI +AsmWriteDbr ( + IN UINT8 Index, + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Performance Monitor Configuration Register (PMC). + + Writes current value of Performance Monitor Configuration Register specified by Index. + All processor implementations provide at least four performance counters + (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status + registers (PMC [0]... PMC [3]). Processor implementations may provide additional + implementation-dependent PMC and PMD to increase the number of 'generic' performance + counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation + dependent. No parameter checking is performed on Index. If the Index value is + beyond the implemented PMC register range, the write is ignored. + This function is only available on Itanium processors. + + @param Index The 8-bit Performance Monitor Configuration Register index to write. + @param Value The 64-bit value to write to PMC. + + @return The 64-bit value written to the PMC. + +**/ +UINT64 +EFIAPI +AsmWritePmc ( + IN UINT8 Index, + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit Performance Monitor Data Register (PMD). + + Writes current value of Performance Monitor Data Register specified by Index. + All processor implementations provide at least four performance counters + (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow + status registers (PMC [0]... PMC [3]). Processor implementations may provide + additional implementation-dependent PMC and PMD to increase the number of 'generic' + performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set + is implementation dependent. No parameter checking is performed on Index. If the + Index value is beyond the implemented PMD register range, the write is ignored. + This function is only available on Itanium processors. + + @param Index The 8-bit Performance Monitor Data Register index to write. + @param Value The 64-bit value to write to PMD. + + @return The 64-bit value written to the PMD. + +**/ +UINT64 +EFIAPI +AsmWritePmd ( + IN UINT8 Index, + IN UINT64 Value + ); + + +/** + Reads the current value of 64-bit Global Pointer (GP). + + Reads and returns the current value of GP. + This function is only available on Itanium processors. + + @return The current value of GP. + +**/ +UINT64 +EFIAPI +AsmReadGp ( + VOID + ); + + +/** + Write the current value of 64-bit Global Pointer (GP). + + Writes the current value of GP. The 64-bit value written to the GP is returned. + No parameter checking is performed on Value. + This function is only available on Itanium processors. + + @param Value The 64-bit value to write to GP. + + @return The 64-bit value written to the GP. + +**/ +UINT64 +EFIAPI +AsmWriteGp ( + IN UINT64 Value + ); + + +/** + Reads the current value of 64-bit Stack Pointer (SP). + + Reads and returns the current value of SP. + This function is only available on Itanium processors. + + @return The current value of SP. + +**/ +UINT64 +EFIAPI +AsmReadSp ( + VOID + ); + + +/// +/// Valid Index value for AsmReadControlRegister(). +/// +#define IPF_CONTROL_REGISTER_DCR 0 +#define IPF_CONTROL_REGISTER_ITM 1 +#define IPF_CONTROL_REGISTER_IVA 2 +#define IPF_CONTROL_REGISTER_PTA 8 +#define IPF_CONTROL_REGISTER_IPSR 16 +#define IPF_CONTROL_REGISTER_ISR 17 +#define IPF_CONTROL_REGISTER_IIP 19 +#define IPF_CONTROL_REGISTER_IFA 20 +#define IPF_CONTROL_REGISTER_ITIR 21 +#define IPF_CONTROL_REGISTER_IIPA 22 +#define IPF_CONTROL_REGISTER_IFS 23 +#define IPF_CONTROL_REGISTER_IIM 24 +#define IPF_CONTROL_REGISTER_IHA 25 +#define IPF_CONTROL_REGISTER_LID 64 +#define IPF_CONTROL_REGISTER_IVR 65 +#define IPF_CONTROL_REGISTER_TPR 66 +#define IPF_CONTROL_REGISTER_EOI 67 +#define IPF_CONTROL_REGISTER_IRR0 68 +#define IPF_CONTROL_REGISTER_IRR1 69 +#define IPF_CONTROL_REGISTER_IRR2 70 +#define IPF_CONTROL_REGISTER_IRR3 71 +#define IPF_CONTROL_REGISTER_ITV 72 +#define IPF_CONTROL_REGISTER_PMV 73 +#define IPF_CONTROL_REGISTER_CMCV 74 +#define IPF_CONTROL_REGISTER_LRR0 80 +#define IPF_CONTROL_REGISTER_LRR1 81 + +/** + Reads a 64-bit control register. + + Reads and returns the control register specified by Index. The valid Index valued + are defined above in "Related Definitions". + If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only + available on Itanium processors. + + @param Index The index of the control register to read. + + @return The control register specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadControlRegister ( + IN UINT64 Index + ); + + +/// +/// Valid Index value for AsmReadApplicationRegister(). +/// +#define IPF_APPLICATION_REGISTER_K0 0 +#define IPF_APPLICATION_REGISTER_K1 1 +#define IPF_APPLICATION_REGISTER_K2 2 +#define IPF_APPLICATION_REGISTER_K3 3 +#define IPF_APPLICATION_REGISTER_K4 4 +#define IPF_APPLICATION_REGISTER_K5 5 +#define IPF_APPLICATION_REGISTER_K6 6 +#define IPF_APPLICATION_REGISTER_K7 7 +#define IPF_APPLICATION_REGISTER_RSC 16 +#define IPF_APPLICATION_REGISTER_BSP 17 +#define IPF_APPLICATION_REGISTER_BSPSTORE 18 +#define IPF_APPLICATION_REGISTER_RNAT 19 +#define IPF_APPLICATION_REGISTER_FCR 21 +#define IPF_APPLICATION_REGISTER_EFLAG 24 +#define IPF_APPLICATION_REGISTER_CSD 25 +#define IPF_APPLICATION_REGISTER_SSD 26 +#define IPF_APPLICATION_REGISTER_CFLG 27 +#define IPF_APPLICATION_REGISTER_FSR 28 +#define IPF_APPLICATION_REGISTER_FIR 29 +#define IPF_APPLICATION_REGISTER_FDR 30 +#define IPF_APPLICATION_REGISTER_CCV 32 +#define IPF_APPLICATION_REGISTER_UNAT 36 +#define IPF_APPLICATION_REGISTER_FPSR 40 +#define IPF_APPLICATION_REGISTER_ITC 44 +#define IPF_APPLICATION_REGISTER_PFS 64 +#define IPF_APPLICATION_REGISTER_LC 65 +#define IPF_APPLICATION_REGISTER_EC 66 + +/** + Reads a 64-bit application register. + + Reads and returns the application register specified by Index. The valid Index + valued are defined above in "Related Definitions". + If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only + available on Itanium processors. + + @param Index The index of the application register to read. + + @return The application register specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadApplicationRegister ( + IN UINT64 Index + ); + + +/** + Reads the current value of a Machine Specific Register (MSR). + + Reads and returns the current value of the Machine Specific Register specified by Index. No + parameter checking is performed on Index, and if the Index value is beyond the implemented MSR + register range, a Reserved Register/Field fault may occur. The caller must either guarantee that + Index is valid, or the caller must set up fault handlers to catch the faults. This function is + only available on Itanium processors. + + @param Index The 8-bit Machine Specific Register index to read. + + @return The current value of the Machine Specific Register specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadMsr ( + IN UINT8 Index + ); + + +/** + Writes the current value of a Machine Specific Register (MSR). + + Writes Value to the Machine Specific Register specified by Index. Value is returned. No + parameter checking is performed on Index, and if the Index value is beyond the implemented MSR + register range, a Reserved Register/Field fault may occur. The caller must either guarantee that + Index is valid, or the caller must set up fault handlers to catch the faults. This function is + only available on Itanium processors. + + @param Index The 8-bit Machine Specific Register index to write. + @param Value The 64-bit value to write to the Machine Specific Register. + + @return The 64-bit value to write to the Machine Specific Register. + +**/ +UINT64 +EFIAPI +AsmWriteMsr ( + IN UINT8 Index, + IN UINT64 Value + ); + + +/** + Determines if the CPU is currently executing in virtual, physical, or mixed mode. + + Determines the current execution mode of the CPU. + If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned. + If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned. + If the CPU is not in physical mode or virtual mode, then it is in mixed mode, + and -1 is returned. + This function is only available on Itanium processors. + + @retval 1 The CPU is in virtual mode. + @retval 0 The CPU is in physical mode. + @retval -1 The CPU is in mixed mode. + +**/ +INT64 +EFIAPI +AsmCpuVirtual ( + VOID + ); + + +/** + Makes a PAL procedure call. + + This is a wrapper function to make a PAL procedure call. Based on the Index + value this API will make static or stacked PAL call. The following table + describes the usage of PAL Procedure Index Assignment. Architected procedures + may be designated as required or optional. If a PAL procedure is specified + as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the + Status field of the PAL_CALL_RETURN structure. + This indicates that the procedure is not present in this PAL implementation. + It is the caller's responsibility to check for this return code after calling + any optional PAL procedure. + No parameter checking is performed on the 5 input parameters, but there are + some common rules that the caller should follow when making a PAL call. Any + address passed to PAL as buffers for return parameters must be 8-byte aligned. + Unaligned addresses may cause undefined results. For those parameters defined + as reserved or some fields defined as reserved must be zero filled or the invalid + argument return value may be returned or undefined result may occur during the + execution of the procedure. If the PalEntryPoint does not point to a valid + PAL entry point then the system behavior is undefined. This function is only + available on Itanium processors. + + @param PalEntryPoint The PAL procedure calls entry point. + @param Index The PAL procedure Index number. + @param Arg2 The 2nd parameter for PAL procedure calls. + @param Arg3 The 3rd parameter for PAL procedure calls. + @param Arg4 The 4th parameter for PAL procedure calls. + + @return structure returned from the PAL Call procedure, including the status and return value. + +**/ +PAL_CALL_RETURN +EFIAPI +AsmPalCall ( + IN UINT64 PalEntryPoint, + IN UINT64 Index, + IN UINT64 Arg2, + IN UINT64 Arg3, + IN UINT64 Arg4 + ); +#endif + +#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) +/// +/// IA32 and x64 Specific Functions. +/// Byte packed structure for 16-bit Real Mode EFLAGS. +/// +typedef union { + struct { + UINT32 CF:1; ///< Carry Flag. + UINT32 Reserved_0:1; ///< Reserved. + UINT32 PF:1; ///< Parity Flag. + UINT32 Reserved_1:1; ///< Reserved. + UINT32 AF:1; ///< Auxiliary Carry Flag. + UINT32 Reserved_2:1; ///< Reserved. + UINT32 ZF:1; ///< Zero Flag. + UINT32 SF:1; ///< Sign Flag. + UINT32 TF:1; ///< Trap Flag. + UINT32 IF:1; ///< Interrupt Enable Flag. + UINT32 DF:1; ///< Direction Flag. + UINT32 OF:1; ///< Overflow Flag. + UINT32 IOPL:2; ///< I/O Privilege Level. + UINT32 NT:1; ///< Nested Task. + UINT32 Reserved_3:1; ///< Reserved. + } Bits; + UINT16 Uint16; +} IA32_FLAGS16; + +/// +/// Byte packed structure for EFLAGS/RFLAGS. +/// 32-bits on IA-32. +/// 64-bits on x64. The upper 32-bits on x64 are reserved. +/// +typedef union { + struct { + UINT32 CF:1; ///< Carry Flag. + UINT32 Reserved_0:1; ///< Reserved. + UINT32 PF:1; ///< Parity Flag. + UINT32 Reserved_1:1; ///< Reserved. + UINT32 AF:1; ///< Auxiliary Carry Flag. + UINT32 Reserved_2:1; ///< Reserved. + UINT32 ZF:1; ///< Zero Flag. + UINT32 SF:1; ///< Sign Flag. + UINT32 TF:1; ///< Trap Flag. + UINT32 IF:1; ///< Interrupt Enable Flag. + UINT32 DF:1; ///< Direction Flag. + UINT32 OF:1; ///< Overflow Flag. + UINT32 IOPL:2; ///< I/O Privilege Level. + UINT32 NT:1; ///< Nested Task. + UINT32 Reserved_3:1; ///< Reserved. + UINT32 RF:1; ///< Resume Flag. + UINT32 VM:1; ///< Virtual 8086 Mode. + UINT32 AC:1; ///< Alignment Check. + UINT32 VIF:1; ///< Virtual Interrupt Flag. + UINT32 VIP:1; ///< Virtual Interrupt Pending. + UINT32 ID:1; ///< ID Flag. + UINT32 Reserved_4:10; ///< Reserved. + } Bits; + UINTN UintN; +} IA32_EFLAGS32; + +/// +/// Byte packed structure for Control Register 0 (CR0). +/// 32-bits on IA-32. +/// 64-bits on x64. The upper 32-bits on x64 are reserved. +/// +typedef union { + struct { + UINT32 PE:1; ///< Protection Enable. + UINT32 MP:1; ///< Monitor Coprocessor. + UINT32 EM:1; ///< Emulation. + UINT32 TS:1; ///< Task Switched. + UINT32 ET:1; ///< Extension Type. + UINT32 NE:1; ///< Numeric Error. + UINT32 Reserved_0:10; ///< Reserved. + UINT32 WP:1; ///< Write Protect. + UINT32 Reserved_1:1; ///< Reserved. + UINT32 AM:1; ///< Alignment Mask. + UINT32 Reserved_2:10; ///< Reserved. + UINT32 NW:1; ///< Mot Write-through. + UINT32 CD:1; ///< Cache Disable. + UINT32 PG:1; ///< Paging. + } Bits; + UINTN UintN; +} IA32_CR0; + +/// +/// Byte packed structure for Control Register 4 (CR4). +/// 32-bits on IA-32. +/// 64-bits on x64. The upper 32-bits on x64 are reserved. +/// +typedef union { + struct { + UINT32 VME:1; ///< Virtual-8086 Mode Extensions. + UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts. + UINT32 TSD:1; ///< Time Stamp Disable. + UINT32 DE:1; ///< Debugging Extensions. + UINT32 PSE:1; ///< Page Size Extensions. + UINT32 PAE:1; ///< Physical Address Extension. + UINT32 MCE:1; ///< Machine Check Enable. + UINT32 PGE:1; ///< Page Global Enable. + UINT32 PCE:1; ///< Performance Monitoring Counter + ///< Enable. + UINT32 OSFXSR:1; ///< Operating System Support for + ///< FXSAVE and FXRSTOR instructions + UINT32 OSXMMEXCPT:1; ///< Operating System Support for + ///< Unmasked SIMD Floating Point + ///< Exceptions. + UINT32 Reserved_0:2; ///< Reserved. + UINT32 VMXE:1; ///< VMX Enable + UINT32 Reserved_1:18; ///< Reserved. + } Bits; + UINTN UintN; +} IA32_CR4; + +/// +/// Byte packed structure for a segment descriptor in a GDT/LDT. +/// +typedef union { + struct { + UINT32 LimitLow:16; + UINT32 BaseLow:16; + UINT32 BaseMid:8; + UINT32 Type:4; + UINT32 S:1; + UINT32 DPL:2; + UINT32 P:1; + UINT32 LimitHigh:4; + UINT32 AVL:1; + UINT32 L:1; + UINT32 DB:1; + UINT32 G:1; + UINT32 BaseHigh:8; + } Bits; + UINT64 Uint64; +} IA32_SEGMENT_DESCRIPTOR; + +/// +/// Byte packed structure for an IDTR, GDTR, LDTR descriptor. +/// +#pragma pack (1) +typedef struct { + UINT16 Limit; + UINTN Base; +} IA32_DESCRIPTOR; +#pragma pack () + +#define IA32_IDT_GATE_TYPE_TASK 0x85 +#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86 +#define IA32_IDT_GATE_TYPE_TRAP_16 0x87 +#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E +#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F + + +#if defined (MDE_CPU_IA32) +/// +/// Byte packed structure for an IA-32 Interrupt Gate Descriptor. +/// +typedef union { + struct { + UINT32 OffsetLow:16; ///< Offset bits 15..0. + UINT32 Selector:16; ///< Selector. + UINT32 Reserved_0:8; ///< Reserved. + UINT32 GateType:8; ///< Gate Type. See #defines above. + UINT32 OffsetHigh:16; ///< Offset bits 31..16. + } Bits; + UINT64 Uint64; +} IA32_IDT_GATE_DESCRIPTOR; + +#endif + +#if defined (MDE_CPU_X64) +/// +/// Byte packed structure for an x64 Interrupt Gate Descriptor. +/// +typedef union { + struct { + UINT32 OffsetLow:16; ///< Offset bits 15..0. + UINT32 Selector:16; ///< Selector. + UINT32 Reserved_0:8; ///< Reserved. + UINT32 GateType:8; ///< Gate Type. See #defines above. + UINT32 OffsetHigh:16; ///< Offset bits 31..16. + UINT32 OffsetUpper:32; ///< Offset bits 63..32. + UINT32 Reserved_1:32; ///< Reserved. + } Bits; + struct { + UINT64 Uint64; + UINT64 Uint64_1; + } Uint128; +} IA32_IDT_GATE_DESCRIPTOR; + +#endif + +/// +/// Byte packed structure for an FP/SSE/SSE2 context. +/// +typedef struct { + UINT8 Buffer[512]; +} IA32_FX_BUFFER; + +/// +/// Structures for the 16-bit real mode thunks. +/// +typedef struct { + UINT32 Reserved1; + UINT32 Reserved2; + UINT32 Reserved3; + UINT32 Reserved4; + UINT8 BL; + UINT8 BH; + UINT16 Reserved5; + UINT8 DL; + UINT8 DH; + UINT16 Reserved6; + UINT8 CL; + UINT8 CH; + UINT16 Reserved7; + UINT8 AL; + UINT8 AH; + UINT16 Reserved8; +} IA32_BYTE_REGS; + +typedef struct { + UINT16 DI; + UINT16 Reserved1; + UINT16 SI; + UINT16 Reserved2; + UINT16 BP; + UINT16 Reserved3; + UINT16 SP; + UINT16 Reserved4; + UINT16 BX; + UINT16 Reserved5; + UINT16 DX; + UINT16 Reserved6; + UINT16 CX; + UINT16 Reserved7; + UINT16 AX; + UINT16 Reserved8; +} IA32_WORD_REGS; + +typedef struct { + UINT32 EDI; + UINT32 ESI; + UINT32 EBP; + UINT32 ESP; + UINT32 EBX; + UINT32 EDX; + UINT32 ECX; + UINT32 EAX; + UINT16 DS; + UINT16 ES; + UINT16 FS; + UINT16 GS; + IA32_EFLAGS32 EFLAGS; + UINT32 Eip; + UINT16 CS; + UINT16 SS; +} IA32_DWORD_REGS; + +typedef union { + IA32_DWORD_REGS E; + IA32_WORD_REGS X; + IA32_BYTE_REGS H; +} IA32_REGISTER_SET; + +/// +/// Byte packed structure for an 16-bit real mode thunks. +/// +typedef struct { + IA32_REGISTER_SET *RealModeState; + VOID *RealModeBuffer; + UINT32 RealModeBufferSize; + UINT32 ThunkAttributes; +} THUNK_CONTEXT; + +#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001 +#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002 +#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004 + +/** + Retrieves CPUID information. + + Executes the CPUID instruction with EAX set to the value specified by Index. + This function always returns Index. + If Eax is not NULL, then the value of EAX after CPUID is returned in Eax. + If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx. + If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx. + If Edx is not NULL, then the value of EDX after CPUID is returned in Edx. + This function is only available on IA-32 and x64. + + @param Index The 32-bit value to load into EAX prior to invoking the CPUID + instruction. + @param Eax The pointer to the 32-bit EAX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + @param Ebx The pointer to the 32-bit EBX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + @param Ecx The pointer to the 32-bit ECX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + @param Edx The pointer to the 32-bit EDX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + + @return Index. + +**/ +UINT32 +EFIAPI +AsmCpuid ( + IN UINT32 Index, + OUT UINT32 *Eax, OPTIONAL + OUT UINT32 *Ebx, OPTIONAL + OUT UINT32 *Ecx, OPTIONAL + OUT UINT32 *Edx OPTIONAL + ); + + +/** + Retrieves CPUID information using an extended leaf identifier. + + Executes the CPUID instruction with EAX set to the value specified by Index + and ECX set to the value specified by SubIndex. This function always returns + Index. This function is only available on IA-32 and x64. + + If Eax is not NULL, then the value of EAX after CPUID is returned in Eax. + If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx. + If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx. + If Edx is not NULL, then the value of EDX after CPUID is returned in Edx. + + @param Index The 32-bit value to load into EAX prior to invoking the + CPUID instruction. + @param SubIndex The 32-bit value to load into ECX prior to invoking the + CPUID instruction. + @param Eax The pointer to the 32-bit EAX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + @param Ebx The pointer to the 32-bit EBX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + @param Ecx The pointer to the 32-bit ECX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + @param Edx The pointer to the 32-bit EDX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + + @return Index. + +**/ +UINT32 +EFIAPI +AsmCpuidEx ( + IN UINT32 Index, + IN UINT32 SubIndex, + OUT UINT32 *Eax, OPTIONAL + OUT UINT32 *Ebx, OPTIONAL + OUT UINT32 *Ecx, OPTIONAL + OUT UINT32 *Edx OPTIONAL + ); + + +/** + Set CD bit and clear NW bit of CR0 followed by a WBINVD. + + Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0, + and executing a WBINVD instruction. This function is only available on IA-32 and x64. + +**/ +VOID +EFIAPI +AsmDisableCache ( + VOID + ); + + +/** + Perform a WBINVD and clear both the CD and NW bits of CR0. + + Enables the caches by executing a WBINVD instruction and then clear both the CD and NW + bits of CR0 to 0. This function is only available on IA-32 and x64. + +**/ +VOID +EFIAPI +AsmEnableCache ( + VOID + ); + + +/** + Returns the lower 32-bits of a Machine Specific Register(MSR). + + Reads and returns the lower 32-bits of the MSR specified by Index. + No parameter checking is performed on Index, and some Index values may cause + CPU exceptions. The caller must either guarantee that Index is valid, or the + caller must set up exception handlers to catch the exceptions. This function + is only available on IA-32 and x64. + + @param Index The 32-bit MSR index to read. + + @return The lower 32 bits of the MSR identified by Index. + +**/ +UINT32 +EFIAPI +AsmReadMsr32 ( + IN UINT32 Index + ); + + +/** + Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value. + The upper 32-bits of the MSR are set to zero. + + Writes the 32-bit value specified by Value to the MSR specified by Index. The + upper 32-bits of the MSR write are set to zero. The 32-bit value written to + the MSR is returned. No parameter checking is performed on Index or Value, + and some of these may cause CPU exceptions. The caller must either guarantee + that Index and Value are valid, or the caller must establish proper exception + handlers. This function is only available on IA-32 and x64. + + @param Index The 32-bit MSR index to write. + @param Value The 32-bit value to write to the MSR. + + @return Value + +**/ +UINT32 +EFIAPI +AsmWriteMsr32 ( + IN UINT32 Index, + IN UINT32 Value + ); + + +/** + Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and + writes the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise OR + between the lower 32-bits of the read result and the value specified by + OrData, and writes the result to the 64-bit MSR specified by Index. The lower + 32-bits of the value written to the MSR is returned. No parameter checking is + performed on Index or OrData, and some of these may cause CPU exceptions. The + caller must either guarantee that Index and OrData are valid, or the caller + must establish proper exception handlers. This function is only available on + IA-32 and x64. + + @param Index The 32-bit MSR index to write. + @param OrData The value to OR with the read value from the MSR. + + @return The lower 32-bit value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrOr32 ( + IN UINT32 Index, + IN UINT32 OrData + ); + + +/** + Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes + the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + lower 32-bits of the read result and the value specified by AndData, and + writes the result to the 64-bit MSR specified by Index. The lower 32-bits of + the value written to the MSR is returned. No parameter checking is performed + on Index or AndData, and some of these may cause CPU exceptions. The caller + must either guarantee that Index and AndData are valid, or the caller must + establish proper exception handlers. This function is only available on IA-32 + and x64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + + @return The lower 32-bit value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrAnd32 ( + IN UINT32 Index, + IN UINT32 AndData + ); + + +/** + Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR + on the lower 32-bits, and writes the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + lower 32-bits of the read result and the value specified by AndData + preserving the upper 32-bits, performs a bitwise OR between the + result of the AND operation and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Address. The lower 32-bits of the value + written to the MSR is returned. No parameter checking is performed on Index, + AndData, or OrData, and some of these may cause CPU exceptions. The caller + must either guarantee that Index, AndData, and OrData are valid, or the + caller must establish proper exception handlers. This function is only + available on IA-32 and x64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + @param OrData The value to OR with the result of the AND operation. + + @return The lower 32-bit value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrAndThenOr32 ( + IN UINT32 Index, + IN UINT32 AndData, + IN UINT32 OrData + ); + + +/** + Reads a bit field of an MSR. + + Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. The caller must either guarantee that Index is valid, or the caller + must set up exception handlers to catch the exceptions. This function is only + available on IA-32 and x64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The bit field read from the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldRead32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit + ); + + +/** + Writes a bit field to an MSR. + + Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination MSR are preserved. The lower 32-bits of the MSR written is + returned. The caller must either guarantee that Index and the data written + is valid, or the caller must set up exception handlers to catch the exceptions. + This function is only available on IA-32 and x64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldWrite32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the + result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Index. The lower 32-bits of the value + written to the MSR are returned. Extra left bits in OrData are stripped. The + caller must either guarantee that Index and the data written is valid, or + the caller must set up exception handlers to catch the exceptions. This + function is only available on IA-32 and x64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the read value from the MSR. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldOr32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the + result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + read result and the value specified by AndData, and writes the result to the + 64-bit MSR specified by Index. The lower 32-bits of the value written to the + MSR are returned. Extra left bits in AndData are stripped. The caller must + either guarantee that Index and the data written is valid, or the caller must + set up exception handlers to catch the exceptions. This function is only + available on IA-32 and x64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the MSR. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldAnd32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a + bitwise OR, and writes the result back to the bit field in the + 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a + bitwise OR between the read result and the value specified by + AndData, and writes the result to the 64-bit MSR specified by Index. The + lower 32-bits of the value written to the MSR are returned. Extra left bits + in both AndData and OrData are stripped. The caller must either guarantee + that Index and the data written is valid, or the caller must set up exception + handlers to catch the exceptions. This function is only available on IA-32 + and x64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the MSR. + @param OrData The value to OR with the result of the AND operation. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldAndThenOr32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + + +/** + Returns a 64-bit Machine Specific Register(MSR). + + Reads and returns the 64-bit MSR specified by Index. No parameter checking is + performed on Index, and some Index values may cause CPU exceptions. The + caller must either guarantee that Index is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and x64. + + @param Index The 32-bit MSR index to read. + + @return The value of the MSR identified by Index. + +**/ +UINT64 +EFIAPI +AsmReadMsr64 ( + IN UINT32 Index + ); + + +/** + Writes a 64-bit value to a Machine Specific Register(MSR), and returns the + value. + + Writes the 64-bit value specified by Value to the MSR specified by Index. The + 64-bit value written to the MSR is returned. No parameter checking is + performed on Index or Value, and some of these may cause CPU exceptions. The + caller must either guarantee that Index and Value are valid, or the caller + must establish proper exception handlers. This function is only available on + IA-32 and x64. + + @param Index The 32-bit MSR index to write. + @param Value The 64-bit value to write to the MSR. + + @return Value + +**/ +UINT64 +EFIAPI +AsmWriteMsr64 ( + IN UINT32 Index, + IN UINT64 Value + ); + + +/** + Reads a 64-bit MSR, performs a bitwise OR, and writes the result + back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Index. The value written to the MSR is + returned. No parameter checking is performed on Index or OrData, and some of + these may cause CPU exceptions. The caller must either guarantee that Index + and OrData are valid, or the caller must establish proper exception handlers. + This function is only available on IA-32 and x64. + + @param Index The 32-bit MSR index to write. + @param OrData The value to OR with the read value from the MSR. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrOr64 ( + IN UINT32 Index, + IN UINT64 OrData + ); + + +/** + Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the + 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + read result and the value specified by OrData, and writes the result to the + 64-bit MSR specified by Index. The value written to the MSR is returned. No + parameter checking is performed on Index or OrData, and some of these may + cause CPU exceptions. The caller must either guarantee that Index and OrData + are valid, or the caller must establish proper exception handlers. This + function is only available on IA-32 and x64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrAnd64 ( + IN UINT32 Index, + IN UINT64 AndData + ); + + +/** + Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise + OR, and writes the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between read + result and the value specified by AndData, performs a bitwise OR + between the result of the AND operation and the value specified by OrData, + and writes the result to the 64-bit MSR specified by Index. The value written + to the MSR is returned. No parameter checking is performed on Index, AndData, + or OrData, and some of these may cause CPU exceptions. The caller must either + guarantee that Index, AndData, and OrData are valid, or the caller must + establish proper exception handlers. This function is only available on IA-32 + and x64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrAndThenOr64 ( + IN UINT32 Index, + IN UINT64 AndData, + IN UINT64 OrData + ); + + +/** + Reads a bit field of an MSR. + + Reads the bit field in the 64-bit MSR. The bit field is specified by the + StartBit and the EndBit. The value of the bit field is returned. The caller + must either guarantee that Index is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and x64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + + @return The value read from the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldRead64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit + ); + + +/** + Writes a bit field to an MSR. + + Writes Value to a bit field in a 64-bit MSR. The bit field is specified by + the StartBit and the EndBit. All other bits in the destination MSR are + preserved. The MSR written is returned. The caller must either guarantee + that Index and the data written is valid, or the caller must set up exception + handlers to catch the exceptions. This function is only available on IA-32 and x64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param Value New value of the bit field. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldWrite64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 Value + ); + + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise OR, and + writes the result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Index. The value written to the MSR is + returned. Extra left bits in OrData are stripped. The caller must either + guarantee that Index and the data written is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and x64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param OrData The value to OR with the read value from the bit field. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldOr64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 OrData + ); + + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the + result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + read result and the value specified by AndData, and writes the result to the + 64-bit MSR specified by Index. The value written to the MSR is returned. + Extra left bits in AndData are stripped. The caller must either guarantee + that Index and the data written is valid, or the caller must set up exception + handlers to catch the exceptions. This function is only available on IA-32 + and x64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the bit field. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldAnd64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData + ); + + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a + bitwise OR, and writes the result back to the bit field in the + 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by + a bitwise OR between the read result and the value specified by + AndData, and writes the result to the 64-bit MSR specified by Index. The + value written to the MSR is returned. Extra left bits in both AndData and + OrData are stripped. The caller must either guarantee that Index and the data + written is valid, or the caller must set up exception handlers to catch the + exceptions. This function is only available on IA-32 and x64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the bit field. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldAndThenOr64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData, + IN UINT64 OrData + ); + + +/** + Reads the current value of the EFLAGS register. + + Reads and returns the current value of the EFLAGS register. This function is + only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a + 64-bit value on x64. + + @return EFLAGS on IA-32 or RFLAGS on x64. + +**/ +UINTN +EFIAPI +AsmReadEflags ( + VOID + ); + + +/** + Reads the current value of the Control Register 0 (CR0). + + Reads and returns the current value of CR0. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of the Control Register 0 (CR0). + +**/ +UINTN +EFIAPI +AsmReadCr0 ( + VOID + ); + + +/** + Reads the current value of the Control Register 2 (CR2). + + Reads and returns the current value of CR2. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of the Control Register 2 (CR2). + +**/ +UINTN +EFIAPI +AsmReadCr2 ( + VOID + ); + + +/** + Reads the current value of the Control Register 3 (CR3). + + Reads and returns the current value of CR3. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of the Control Register 3 (CR3). + +**/ +UINTN +EFIAPI +AsmReadCr3 ( + VOID + ); + + +/** + Reads the current value of the Control Register 4 (CR4). + + Reads and returns the current value of CR4. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of the Control Register 4 (CR4). + +**/ +UINTN +EFIAPI +AsmReadCr4 ( + VOID + ); + + +/** + Writes a value to Control Register 0 (CR0). + + Writes and returns a new value to CR0. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Cr0 The value to write to CR0. + + @return The value written to CR0. + +**/ +UINTN +EFIAPI +AsmWriteCr0 ( + UINTN Cr0 + ); + + +/** + Writes a value to Control Register 2 (CR2). + + Writes and returns a new value to CR2. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Cr2 The value to write to CR2. + + @return The value written to CR2. + +**/ +UINTN +EFIAPI +AsmWriteCr2 ( + UINTN Cr2 + ); + + +/** + Writes a value to Control Register 3 (CR3). + + Writes and returns a new value to CR3. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Cr3 The value to write to CR3. + + @return The value written to CR3. + +**/ +UINTN +EFIAPI +AsmWriteCr3 ( + UINTN Cr3 + ); + + +/** + Writes a value to Control Register 4 (CR4). + + Writes and returns a new value to CR4. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Cr4 The value to write to CR4. + + @return The value written to CR4. + +**/ +UINTN +EFIAPI +AsmWriteCr4 ( + UINTN Cr4 + ); + + +/** + Reads the current value of Debug Register 0 (DR0). + + Reads and returns the current value of DR0. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 0 (DR0). + +**/ +UINTN +EFIAPI +AsmReadDr0 ( + VOID + ); + + +/** + Reads the current value of Debug Register 1 (DR1). + + Reads and returns the current value of DR1. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 1 (DR1). + +**/ +UINTN +EFIAPI +AsmReadDr1 ( + VOID + ); + + +/** + Reads the current value of Debug Register 2 (DR2). + + Reads and returns the current value of DR2. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 2 (DR2). + +**/ +UINTN +EFIAPI +AsmReadDr2 ( + VOID + ); + + +/** + Reads the current value of Debug Register 3 (DR3). + + Reads and returns the current value of DR3. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 3 (DR3). + +**/ +UINTN +EFIAPI +AsmReadDr3 ( + VOID + ); + + +/** + Reads the current value of Debug Register 4 (DR4). + + Reads and returns the current value of DR4. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 4 (DR4). + +**/ +UINTN +EFIAPI +AsmReadDr4 ( + VOID + ); + + +/** + Reads the current value of Debug Register 5 (DR5). + + Reads and returns the current value of DR5. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 5 (DR5). + +**/ +UINTN +EFIAPI +AsmReadDr5 ( + VOID + ); + + +/** + Reads the current value of Debug Register 6 (DR6). + + Reads and returns the current value of DR6. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 6 (DR6). + +**/ +UINTN +EFIAPI +AsmReadDr6 ( + VOID + ); + + +/** + Reads the current value of Debug Register 7 (DR7). + + Reads and returns the current value of DR7. This function is only available + on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on + x64. + + @return The value of Debug Register 7 (DR7). + +**/ +UINTN +EFIAPI +AsmReadDr7 ( + VOID + ); + + +/** + Writes a value to Debug Register 0 (DR0). + + Writes and returns a new value to DR0. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr0 The value to write to Dr0. + + @return The value written to Debug Register 0 (DR0). + +**/ +UINTN +EFIAPI +AsmWriteDr0 ( + UINTN Dr0 + ); + + +/** + Writes a value to Debug Register 1 (DR1). + + Writes and returns a new value to DR1. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr1 The value to write to Dr1. + + @return The value written to Debug Register 1 (DR1). + +**/ +UINTN +EFIAPI +AsmWriteDr1 ( + UINTN Dr1 + ); + + +/** + Writes a value to Debug Register 2 (DR2). + + Writes and returns a new value to DR2. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr2 The value to write to Dr2. + + @return The value written to Debug Register 2 (DR2). + +**/ +UINTN +EFIAPI +AsmWriteDr2 ( + UINTN Dr2 + ); + + +/** + Writes a value to Debug Register 3 (DR3). + + Writes and returns a new value to DR3. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr3 The value to write to Dr3. + + @return The value written to Debug Register 3 (DR3). + +**/ +UINTN +EFIAPI +AsmWriteDr3 ( + UINTN Dr3 + ); + + +/** + Writes a value to Debug Register 4 (DR4). + + Writes and returns a new value to DR4. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr4 The value to write to Dr4. + + @return The value written to Debug Register 4 (DR4). + +**/ +UINTN +EFIAPI +AsmWriteDr4 ( + UINTN Dr4 + ); + + +/** + Writes a value to Debug Register 5 (DR5). + + Writes and returns a new value to DR5. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr5 The value to write to Dr5. + + @return The value written to Debug Register 5 (DR5). + +**/ +UINTN +EFIAPI +AsmWriteDr5 ( + UINTN Dr5 + ); + + +/** + Writes a value to Debug Register 6 (DR6). + + Writes and returns a new value to DR6. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr6 The value to write to Dr6. + + @return The value written to Debug Register 6 (DR6). + +**/ +UINTN +EFIAPI +AsmWriteDr6 ( + UINTN Dr6 + ); + + +/** + Writes a value to Debug Register 7 (DR7). + + Writes and returns a new value to DR7. This function is only available on + IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. + + @param Dr7 The value to write to Dr7. + + @return The value written to Debug Register 7 (DR7). + +**/ +UINTN +EFIAPI +AsmWriteDr7 ( + UINTN Dr7 + ); + + +/** + Reads the current value of Code Segment Register (CS). + + Reads and returns the current value of CS. This function is only available on + IA-32 and x64. + + @return The current value of CS. + +**/ +UINT16 +EFIAPI +AsmReadCs ( + VOID + ); + + +/** + Reads the current value of Data Segment Register (DS). + + Reads and returns the current value of DS. This function is only available on + IA-32 and x64. + + @return The current value of DS. + +**/ +UINT16 +EFIAPI +AsmReadDs ( + VOID + ); + + +/** + Reads the current value of Extra Segment Register (ES). + + Reads and returns the current value of ES. This function is only available on + IA-32 and x64. + + @return The current value of ES. + +**/ +UINT16 +EFIAPI +AsmReadEs ( + VOID + ); + + +/** + Reads the current value of FS Data Segment Register (FS). + + Reads and returns the current value of FS. This function is only available on + IA-32 and x64. + + @return The current value of FS. + +**/ +UINT16 +EFIAPI +AsmReadFs ( + VOID + ); + + +/** + Reads the current value of GS Data Segment Register (GS). + + Reads and returns the current value of GS. This function is only available on + IA-32 and x64. + + @return The current value of GS. + +**/ +UINT16 +EFIAPI +AsmReadGs ( + VOID + ); + + +/** + Reads the current value of Stack Segment Register (SS). + + Reads and returns the current value of SS. This function is only available on + IA-32 and x64. + + @return The current value of SS. + +**/ +UINT16 +EFIAPI +AsmReadSs ( + VOID + ); + + +/** + Reads the current value of Task Register (TR). + + Reads and returns the current value of TR. This function is only available on + IA-32 and x64. + + @return The current value of TR. + +**/ +UINT16 +EFIAPI +AsmReadTr ( + VOID + ); + + +/** + Reads the current Global Descriptor Table Register(GDTR) descriptor. + + Reads and returns the current GDTR descriptor and returns it in Gdtr. This + function is only available on IA-32 and x64. + + If Gdtr is NULL, then ASSERT(). + + @param Gdtr The pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +AsmReadGdtr ( + OUT IA32_DESCRIPTOR *Gdtr + ); + + +/** + Writes the current Global Descriptor Table Register (GDTR) descriptor. + + Writes and the current GDTR descriptor specified by Gdtr. This function is + only available on IA-32 and x64. + + If Gdtr is NULL, then ASSERT(). + + @param Gdtr The pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +AsmWriteGdtr ( + IN CONST IA32_DESCRIPTOR *Gdtr + ); + + +/** + Reads the current Interrupt Descriptor Table Register(IDTR) descriptor. + + Reads and returns the current IDTR descriptor and returns it in Idtr. This + function is only available on IA-32 and x64. + + If Idtr is NULL, then ASSERT(). + + @param Idtr The pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +AsmReadIdtr ( + OUT IA32_DESCRIPTOR *Idtr + ); + + +/** + Writes the current Interrupt Descriptor Table Register(IDTR) descriptor. + + Writes the current IDTR descriptor and returns it in Idtr. This function is + only available on IA-32 and x64. + + If Idtr is NULL, then ASSERT(). + + @param Idtr The pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +AsmWriteIdtr ( + IN CONST IA32_DESCRIPTOR *Idtr + ); + + +/** + Reads the current Local Descriptor Table Register(LDTR) selector. + + Reads and returns the current 16-bit LDTR descriptor value. This function is + only available on IA-32 and x64. + + @return The current selector of LDT. + +**/ +UINT16 +EFIAPI +AsmReadLdtr ( + VOID + ); + + +/** + Writes the current Local Descriptor Table Register (LDTR) selector. + + Writes and the current LDTR descriptor specified by Ldtr. This function is + only available on IA-32 and x64. + + @param Ldtr 16-bit LDTR selector value. + +**/ +VOID +EFIAPI +AsmWriteLdtr ( + IN UINT16 Ldtr + ); + + +/** + Save the current floating point/SSE/SSE2 context to a buffer. + + Saves the current floating point/SSE/SSE2 state to the buffer specified by + Buffer. Buffer must be aligned on a 16-byte boundary. This function is only + available on IA-32 and x64. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-byte boundary, then ASSERT(). + + @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +AsmFxSave ( + OUT IA32_FX_BUFFER *Buffer + ); + + +/** + Restores the current floating point/SSE/SSE2 context from a buffer. + + Restores the current floating point/SSE/SSE2 state from the buffer specified + by Buffer. Buffer must be aligned on a 16-byte boundary. This function is + only available on IA-32 and x64. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-byte boundary, then ASSERT(). + If Buffer was not saved with AsmFxSave(), then ASSERT(). + + @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +AsmFxRestore ( + IN CONST IA32_FX_BUFFER *Buffer + ); + + +/** + Reads the current value of 64-bit MMX Register #0 (MM0). + + Reads and returns the current value of MM0. This function is only available + on IA-32 and x64. + + @return The current value of MM0. + +**/ +UINT64 +EFIAPI +AsmReadMm0 ( + VOID + ); + + +/** + Reads the current value of 64-bit MMX Register #1 (MM1). + + Reads and returns the current value of MM1. This function is only available + on IA-32 and x64. + + @return The current value of MM1. + +**/ +UINT64 +EFIAPI +AsmReadMm1 ( + VOID + ); + + +/** + Reads the current value of 64-bit MMX Register #2 (MM2). + + Reads and returns the current value of MM2. This function is only available + on IA-32 and x64. + + @return The current value of MM2. + +**/ +UINT64 +EFIAPI +AsmReadMm2 ( + VOID + ); + + +/** + Reads the current value of 64-bit MMX Register #3 (MM3). + + Reads and returns the current value of MM3. This function is only available + on IA-32 and x64. + + @return The current value of MM3. + +**/ +UINT64 +EFIAPI +AsmReadMm3 ( + VOID + ); + + +/** + Reads the current value of 64-bit MMX Register #4 (MM4). + + Reads and returns the current value of MM4. This function is only available + on IA-32 and x64. + + @return The current value of MM4. + +**/ +UINT64 +EFIAPI +AsmReadMm4 ( + VOID + ); + + +/** + Reads the current value of 64-bit MMX Register #5 (MM5). + + Reads and returns the current value of MM5. This function is only available + on IA-32 and x64. + + @return The current value of MM5. + +**/ +UINT64 +EFIAPI +AsmReadMm5 ( + VOID + ); + + +/** + Reads the current value of 64-bit MMX Register #6 (MM6). + + Reads and returns the current value of MM6. This function is only available + on IA-32 and x64. + + @return The current value of MM6. + +**/ +UINT64 +EFIAPI +AsmReadMm6 ( + VOID + ); + + +/** + Reads the current value of 64-bit MMX Register #7 (MM7). + + Reads and returns the current value of MM7. This function is only available + on IA-32 and x64. + + @return The current value of MM7. + +**/ +UINT64 +EFIAPI +AsmReadMm7 ( + VOID + ); + + +/** + Writes the current value of 64-bit MMX Register #0 (MM0). + + Writes the current value of MM0. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM0. + +**/ +VOID +EFIAPI +AsmWriteMm0 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit MMX Register #1 (MM1). + + Writes the current value of MM1. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM1. + +**/ +VOID +EFIAPI +AsmWriteMm1 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit MMX Register #2 (MM2). + + Writes the current value of MM2. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM2. + +**/ +VOID +EFIAPI +AsmWriteMm2 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit MMX Register #3 (MM3). + + Writes the current value of MM3. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM3. + +**/ +VOID +EFIAPI +AsmWriteMm3 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit MMX Register #4 (MM4). + + Writes the current value of MM4. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM4. + +**/ +VOID +EFIAPI +AsmWriteMm4 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit MMX Register #5 (MM5). + + Writes the current value of MM5. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM5. + +**/ +VOID +EFIAPI +AsmWriteMm5 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit MMX Register #6 (MM6). + + Writes the current value of MM6. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM6. + +**/ +VOID +EFIAPI +AsmWriteMm6 ( + IN UINT64 Value + ); + + +/** + Writes the current value of 64-bit MMX Register #7 (MM7). + + Writes the current value of MM7. This function is only available on IA32 and + x64. + + @param Value The 64-bit value to write to MM7. + +**/ +VOID +EFIAPI +AsmWriteMm7 ( + IN UINT64 Value + ); + + +/** + Reads the current value of Time Stamp Counter (TSC). + + Reads and returns the current value of TSC. This function is only available + on IA-32 and x64. + + @return The current value of TSC + +**/ +UINT64 +EFIAPI +AsmReadTsc ( + VOID + ); + + +/** + Reads the current value of a Performance Counter (PMC). + + Reads and returns the current value of performance counter specified by + Index. This function is only available on IA-32 and x64. + + @param Index The 32-bit Performance Counter index to read. + + @return The value of the PMC specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadPmc ( + IN UINT32 Index + ); + + +/** + Sets up a monitor buffer that is used by AsmMwait(). + + Executes a MONITOR instruction with the register state specified by Eax, Ecx + and Edx. Returns Eax. This function is only available on IA-32 and x64. + + @param Eax The value to load into EAX or RAX before executing the MONITOR + instruction. + @param Ecx The value to load into ECX or RCX before executing the MONITOR + instruction. + @param Edx The value to load into EDX or RDX before executing the MONITOR + instruction. + + @return Eax + +**/ +UINTN +EFIAPI +AsmMonitor ( + IN UINTN Eax, + IN UINTN Ecx, + IN UINTN Edx + ); + + +/** + Executes an MWAIT instruction. + + Executes an MWAIT instruction with the register state specified by Eax and + Ecx. Returns Eax. This function is only available on IA-32 and x64. + + @param Eax The value to load into EAX or RAX before executing the MONITOR + instruction. + @param Ecx The value to load into ECX or RCX before executing the MONITOR + instruction. + + @return Eax + +**/ +UINTN +EFIAPI +AsmMwait ( + IN UINTN Eax, + IN UINTN Ecx + ); + + +/** + Executes a WBINVD instruction. + + Executes a WBINVD instruction. This function is only available on IA-32 and + x64. + +**/ +VOID +EFIAPI +AsmWbinvd ( + VOID + ); + + +/** + Executes a INVD instruction. + + Executes a INVD instruction. This function is only available on IA-32 and + x64. + +**/ +VOID +EFIAPI +AsmInvd ( + VOID + ); + + +/** + Flushes a cache line from all the instruction and data caches within the + coherency domain of the CPU. + + Flushed the cache line specified by LinearAddress, and returns LinearAddress. + This function is only available on IA-32 and x64. + + @param LinearAddress The address of the cache line to flush. If the CPU is + in a physical addressing mode, then LinearAddress is a + physical address. If the CPU is in a virtual + addressing mode, then LinearAddress is a virtual + address. + + @return LinearAddress. +**/ +VOID * +EFIAPI +AsmFlushCacheLine ( + IN VOID *LinearAddress + ); + + +/** + Enables the 32-bit paging mode on the CPU. + + Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode. This function is + only available on IA-32. After the 32-bit paging mode is enabled, control is + transferred to the function specified by EntryPoint using the new stack + specified by NewStack and passing in the parameters specified by Context1 and + Context2. Context1 and Context2 are optional and may be NULL. The function + EntryPoint must never return. + + If the current execution mode is not 32-bit protected mode, then ASSERT(). + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit protected mode with flat descriptors. This + means all descriptors must have a base of 0 and a limit of 4GB. + 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat + descriptors. + 4) CR3 must point to valid page tables that will be used once the transition + is complete, and those page tables must guarantee that the pages for this + function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is enabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is enabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is enabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is enabled. + +**/ +VOID +EFIAPI +AsmEnablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ); + + +/** + Disables the 32-bit paging mode on the CPU. + + Disables the 32-bit paging mode on the CPU and returns to 32-bit protected + mode. This function assumes the current execution mode is 32-paged protected + mode. This function is only available on IA-32. After the 32-bit paging mode + is disabled, control is transferred to the function specified by EntryPoint + using the new stack specified by NewStack and passing in the parameters + specified by Context1 and Context2. Context1 and Context2 are optional and + may be NULL. The function EntryPoint must never return. + + If the current execution mode is not 32-bit paged mode, then ASSERT(). + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit paged mode. + 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode. + 4) CR3 must point to valid page tables that guarantee that the pages for + this function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is disabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is disabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is + disabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is disabled. + +**/ +VOID +EFIAPI +AsmDisablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ); + + +/** + Enables the 64-bit paging mode on the CPU. + + Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode with flat + descriptors. This function is only available on IA-32. After the 64-bit + paging mode is enabled, control is transferred to the function specified by + EntryPoint using the new stack specified by NewStack and passing in the + parameters specified by Context1 and Context2. Context1 and Context2 are + optional and may be 0. The function EntryPoint must never return. + + If the current execution mode is not 32-bit protected mode with flat + descriptors, then ASSERT(). + If EntryPoint is 0, then ASSERT(). + If NewStack is 0, then ASSERT(). + + @param Cs The 16-bit selector to load in the CS before EntryPoint + is called. The descriptor in the GDT that this selector + references must be setup for long mode. + @param EntryPoint The 64-bit virtual address of the function to call with + the new stack after paging is enabled. + @param Context1 The 64-bit virtual address of the context to pass into + the EntryPoint function as the first parameter after + paging is enabled. + @param Context2 The 64-bit virtual address of the context to pass into + the EntryPoint function as the second parameter after + paging is enabled. + @param NewStack The 64-bit virtual address of the new stack to use for + the EntryPoint function after paging is enabled. + +**/ +VOID +EFIAPI +AsmEnablePaging64 ( + IN UINT16 Cs, + IN UINT64 EntryPoint, + IN UINT64 Context1, OPTIONAL + IN UINT64 Context2, OPTIONAL + IN UINT64 NewStack + ); + + +/** + Disables the 64-bit paging mode on the CPU. + + Disables the 64-bit paging mode on the CPU and returns to 32-bit protected + mode. This function assumes the current execution mode is 64-paging mode. + This function is only available on x64. After the 64-bit paging mode is + disabled, control is transferred to the function specified by EntryPoint + using the new stack specified by NewStack and passing in the parameters + specified by Context1 and Context2. Context1 and Context2 are optional and + may be 0. The function EntryPoint must never return. + + If the current execution mode is not 64-bit paged mode, then ASSERT(). + If EntryPoint is 0, then ASSERT(). + If NewStack is 0, then ASSERT(). + + @param Cs The 16-bit selector to load in the CS before EntryPoint + is called. The descriptor in the GDT that this selector + references must be setup for 32-bit protected mode. + @param EntryPoint The 64-bit virtual address of the function to call with + the new stack after paging is disabled. + @param Context1 The 64-bit virtual address of the context to pass into + the EntryPoint function as the first parameter after + paging is disabled. + @param Context2 The 64-bit virtual address of the context to pass into + the EntryPoint function as the second parameter after + paging is disabled. + @param NewStack The 64-bit virtual address of the new stack to use for + the EntryPoint function after paging is disabled. + +**/ +VOID +EFIAPI +AsmDisablePaging64 ( + IN UINT16 Cs, + IN UINT32 EntryPoint, + IN UINT32 Context1, OPTIONAL + IN UINT32 Context2, OPTIONAL + IN UINT32 NewStack + ); + + +// +// 16-bit thunking services +// + +/** + Retrieves the properties for 16-bit thunk functions. + + Computes the size of the buffer and stack below 1MB required to use the + AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This + buffer size is returned in RealModeBufferSize, and the stack size is returned + in ExtraStackSize. If parameters are passed to the 16-bit real mode code, + then the actual minimum stack size is ExtraStackSize plus the maximum number + of bytes that need to be passed to the 16-bit real mode code. + + If RealModeBufferSize is NULL, then ASSERT(). + If ExtraStackSize is NULL, then ASSERT(). + + @param RealModeBufferSize A pointer to the size of the buffer below 1MB + required to use the 16-bit thunk functions. + @param ExtraStackSize A pointer to the extra size of stack below 1MB + that the 16-bit thunk functions require for + temporary storage in the transition to and from + 16-bit real mode. + +**/ +VOID +EFIAPI +AsmGetThunk16Properties ( + OUT UINT32 *RealModeBufferSize, + OUT UINT32 *ExtraStackSize + ); + + +/** + Prepares all structures a code required to use AsmThunk16(). + + Prepares all structures and code required to use AsmThunk16(). + + This interface is limited to be used in either physical mode or virtual modes with paging enabled where the + virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1. + + If ThunkContext is NULL, then ASSERT(). + + @param ThunkContext A pointer to the context structure that describes the + 16-bit real mode code to call. + +**/ +VOID +EFIAPI +AsmPrepareThunk16 ( + IN OUT THUNK_CONTEXT *ThunkContext + ); + + +/** + Transfers control to a 16-bit real mode entry point and returns the results. + + Transfers control to a 16-bit real mode entry point and returns the results. + AsmPrepareThunk16() must be called with ThunkContext before this function is used. + This function must be called with interrupts disabled. + + The register state from the RealModeState field of ThunkContext is restored just prior + to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, + which is used to set the interrupt state when a 16-bit real mode entry point is called. + Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState. + The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to + the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. + The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction, + so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment + and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry + point must exit with a RETF instruction. The register state is captured into RealModeState immediately + after the RETF instruction is executed. + + If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, + or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure + the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. + + If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, + then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. + This includes the base vectors, the interrupt masks, and the edge/level trigger mode. + + If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code + is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits. + + If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in + ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to + disable the A20 mask. + + If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in + ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, + then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports. + + If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in + ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports. + + If ThunkContext is NULL, then ASSERT(). + If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT(). + If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in + ThunkAttributes, then ASSERT(). + + This interface is limited to be used in either physical mode or virtual modes with paging enabled where the + virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1. + + @param ThunkContext A pointer to the context structure that describes the + 16-bit real mode code to call. + +**/ +VOID +EFIAPI +AsmThunk16 ( + IN OUT THUNK_CONTEXT *ThunkContext + ); + + +/** + Prepares all structures and code for a 16-bit real mode thunk, transfers + control to a 16-bit real mode entry point, and returns the results. + + Prepares all structures and code for a 16-bit real mode thunk, transfers + control to a 16-bit real mode entry point, and returns the results. If the + caller only need to perform a single 16-bit real mode thunk, then this + service should be used. If the caller intends to make more than one 16-bit + real mode thunk, then it is more efficient if AsmPrepareThunk16() is called + once and AsmThunk16() can be called for each 16-bit real mode thunk. + + This interface is limited to be used in either physical mode or virtual modes with paging enabled where the + virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1. + + See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions. + + @param ThunkContext A pointer to the context structure that describes the + 16-bit real mode code to call. + +**/ +VOID +EFIAPI +AsmPrepareAndThunk16 ( + IN OUT THUNK_CONTEXT *ThunkContext + ); + +#endif +#endif + + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiBootMode.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiBootMode.h new file mode 100644 index 000000000..f462f7aad --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiBootMode.h @@ -0,0 +1,44 @@ +/** @file + Present the boot mode values in PI. + + Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + PI Version 1.2.1A + +**/ + +#ifndef __PI_BOOT_MODE_H__ +#define __PI_BOOT_MODE_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// EFI boot mode +/// +typedef UINT32 EFI_BOOT_MODE; + +// +// 0x21 - 0xf..f are reserved. +// +#define BOOT_WITH_FULL_CONFIGURATION 0x00 +#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01 +#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02 +#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03 +#define BOOT_WITH_DEFAULT_SETTINGS 0x04 +#define BOOT_ON_S4_RESUME 0x05 +#define BOOT_ON_S5_RESUME 0x06 +#define BOOT_WITH_MFG_MODE_SETTINGS 0x07 +#define BOOT_ON_S2_RESUME 0x10 +#define BOOT_ON_S3_RESUME 0x11 +#define BOOT_ON_FLASH_UPDATE 0x12 +#define BOOT_IN_RECOVERY_MODE 0x20 + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiDependency.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiDependency.h new file mode 100644 index 000000000..b1fa399b4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiDependency.h @@ -0,0 +1,49 @@ +/** @file + Present the dependency expression values in PI. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + PI Version 1.0 + +**/ +#ifndef __PI_DEPENDENCY_H__ +#define __PI_DEPENDENCY_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// If present, this must be the first and only opcode, +/// EFI_DEP_BEFORE may be used by DXE and SMM drivers. +/// +#define EFI_DEP_BEFORE 0x00 + +/// +/// If present, this must be the first and only opcode, +/// EFI_DEP_AFTER may be used by DXE and SMM drivers. +/// +#define EFI_DEP_AFTER 0x01 + +#define EFI_DEP_PUSH 0x02 +#define EFI_DEP_AND 0x03 +#define EFI_DEP_OR 0x04 +#define EFI_DEP_NOT 0x05 +#define EFI_DEP_TRUE 0x06 +#define EFI_DEP_FALSE 0x07 +#define EFI_DEP_END 0x08 + + +/// +/// If present, this must be the first opcode, +/// EFI_DEP_SOR is only used by DXE driver. +/// +#define EFI_DEP_SOR 0x09 + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiDxeCis.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiDxeCis.h new file mode 100644 index 000000000..50d25f23f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiDxeCis.h @@ -0,0 +1,718 @@ +/** @file + Include file matches things in PI. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + PI Version 1.2 + +**/ + +#ifndef __PI_DXECIS_H__ +#define __PI_DXECIS_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Uefi/UefiMultiPhase.h> +#include <ipxe/efi/Pi/PiMultiPhase.h> + +/// +/// Global Coherencey Domain types - Memory type. +/// +typedef enum { + /// + /// A memory region that is visible to the boot processor. However, there are no system + /// components that are currently decoding this memory region. + /// + EfiGcdMemoryTypeNonExistent, + /// + /// A memory region that is visible to the boot processor. This memory region is being + /// decoded by a system component, but the memory region is not considered to be either + /// system memory or memory-mapped I/O. + /// + EfiGcdMemoryTypeReserved, + /// + /// A memory region that is visible to the boot processor. A memory controller is + /// currently decoding this memory region and the memory controller is producing a + /// tested system memory region that is available to the memory services. + /// + EfiGcdMemoryTypeSystemMemory, + /// + /// A memory region that is visible to the boot processor. This memory region is + /// currently being decoded by a component as memory-mapped I/O that can be used to + /// access I/O devices in the platform. + /// + EfiGcdMemoryTypeMemoryMappedIo, + EfiGcdMemoryTypeMaximum +} EFI_GCD_MEMORY_TYPE; + +/// +/// Global Coherencey Domain types - IO type. +/// +typedef enum { + /// + /// An I/O region that is visible to the boot processor. However, there are no system + /// components that are currently decoding this I/O region. + /// + EfiGcdIoTypeNonExistent, + /// + /// An I/O region that is visible to the boot processor. This I/O region is currently being + /// decoded by a system component, but the I/O region cannot be used to access I/O devices. + /// + EfiGcdIoTypeReserved, + /// + /// An I/O region that is visible to the boot processor. This I/O region is currently being + /// decoded by a system component that is producing I/O ports that can be used to access I/O devices. + /// + EfiGcdIoTypeIo, + EfiGcdIoTypeMaximum +} EFI_GCD_IO_TYPE; + +/// +/// The type of allocation to perform. +/// +typedef enum { + /// + /// The GCD memory space map is searched from the lowest address up to the highest address + /// looking for unallocated memory ranges. + /// + EfiGcdAllocateAnySearchBottomUp, + /// + /// The GCD memory space map is searched from the lowest address up + /// to the specified MaxAddress looking for unallocated memory ranges. + /// + EfiGcdAllocateMaxAddressSearchBottomUp, + /// + /// The GCD memory space map is checked to see if the memory range starting + /// at the specified Address is available. + /// + EfiGcdAllocateAddress, + /// + /// The GCD memory space map is searched from the highest address down to the lowest address + /// looking for unallocated memory ranges. + /// + EfiGcdAllocateAnySearchTopDown, + /// + /// The GCD memory space map is searched from the specified MaxAddress + /// down to the lowest address looking for unallocated memory ranges. + /// + EfiGcdAllocateMaxAddressSearchTopDown, + EfiGcdMaxAllocateType +} EFI_GCD_ALLOCATE_TYPE; + +/// +/// EFI_GCD_MEMORY_SPACE_DESCRIPTOR. +/// +typedef struct { + /// + /// The physical address of the first byte in the memory region. Type + /// EFI_PHYSICAL_ADDRESS is defined in the AllocatePages() function + /// description in the UEFI 2.0 specification. + /// + EFI_PHYSICAL_ADDRESS BaseAddress; + + /// + /// The number of bytes in the memory region. + /// + UINT64 Length; + + /// + /// The bit mask of attributes that the memory region is capable of supporting. The bit + /// mask of available attributes is defined in the GetMemoryMap() function description + /// in the UEFI 2.0 specification. + /// + UINT64 Capabilities; + /// + /// The bit mask of attributes that the memory region is currently using. The bit mask of + /// available attributes is defined in GetMemoryMap(). + /// + UINT64 Attributes; + /// + /// Type of the memory region. Type EFI_GCD_MEMORY_TYPE is defined in the + /// AddMemorySpace() function description. + /// + EFI_GCD_MEMORY_TYPE GcdMemoryType; + + /// + /// The image handle of the agent that allocated the memory resource described by + /// PhysicalStart and NumberOfBytes. If this field is NULL, then the memory + /// resource is not currently allocated. Type EFI_HANDLE is defined in + /// InstallProtocolInterface() in the UEFI 2.0 specification. + /// + EFI_HANDLE ImageHandle; + + /// + /// The device handle for which the memory resource has been allocated. If + /// ImageHandle is NULL, then the memory resource is not currently allocated. If this + /// field is NULL, then the memory resource is not associated with a device that is + /// described by a device handle. Type EFI_HANDLE is defined in + /// InstallProtocolInterface() in the UEFI 2.0 specification. + /// + EFI_HANDLE DeviceHandle; +} EFI_GCD_MEMORY_SPACE_DESCRIPTOR; + +/// +/// EFI_GCD_IO_SPACE_DESCRIPTOR. +/// +typedef struct { + /// + /// Physical address of the first byte in the I/O region. Type + /// EFI_PHYSICAL_ADDRESS is defined in the AllocatePages() function + /// description in the UEFI 2.0 specification. + /// + EFI_PHYSICAL_ADDRESS BaseAddress; + + /// + /// Number of bytes in the I/O region. + /// + UINT64 Length; + + /// + /// Type of the I/O region. Type EFI_GCD_IO_TYPE is defined in the + /// AddIoSpace() function description. + /// + EFI_GCD_IO_TYPE GcdIoType; + + /// + /// The image handle of the agent that allocated the I/O resource described by + /// PhysicalStart and NumberOfBytes. If this field is NULL, then the I/O + /// resource is not currently allocated. Type EFI_HANDLE is defined in + /// InstallProtocolInterface() in the UEFI 2.0 specification. + /// + EFI_HANDLE ImageHandle; + + /// + /// The device handle for which the I/O resource has been allocated. If ImageHandle + /// is NULL, then the I/O resource is not currently allocated. If this field is NULL, then + /// the I/O resource is not associated with a device that is described by a device handle. + /// Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI + /// 2.0 specification. + /// + EFI_HANDLE DeviceHandle; +} EFI_GCD_IO_SPACE_DESCRIPTOR; + + +/** + Adds reserved memory, system memory, or memory-mapped I/O resources to the + global coherency domain of the processor. + + @param GcdMemoryType The type of memory resource being added. + @param BaseAddress The physical address that is the start address + of the memory resource being added. + @param Length The size, in bytes, of the memory resource that + is being added. + @param Capabilities The bit mask of attributes that the memory + resource region supports. + + @retval EFI_SUCCESS The memory resource was added to the global + coherency domain of the processor. + @retval EFI_INVALID_PARAMETER GcdMemoryType is invalid. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to add + the memory resource to the global coherency + domain of the processor. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes + of the memory resource range specified by + BaseAddress and Length. + @retval EFI_ACCESS_DENIED One or more bytes of the memory resource range + specified by BaseAddress and Length conflicts + with a memory resource range that was previously + added to the global coherency domain of the processor. + @retval EFI_ACCESS_DENIED One or more bytes of the memory resource range + specified by BaseAddress and Length was allocated + in a prior call to AllocateMemorySpace(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ADD_MEMORY_SPACE)( + IN EFI_GCD_MEMORY_TYPE GcdMemoryType, + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length, + IN UINT64 Capabilities + ); + +/** + Allocates nonexistent memory, reserved memory, system memory, or memorymapped + I/O resources from the global coherency domain of the processor. + + @param GcdAllocateType The type of allocation to perform. + @param GcdMemoryType The type of memory resource being allocated. + @param Alignment The log base 2 of the boundary that BaseAddress must + be aligned on output. Align with 2^Alignment. + @param Length The size in bytes of the memory resource range that + is being allocated. + @param BaseAddress A pointer to a physical address to allocate. + @param Imagehandle The image handle of the agent that is allocating + the memory resource. + @param DeviceHandle The device handle for which the memory resource + is being allocated. + + @retval EFI_INVALID_PARAMETER GcdAllocateType is invalid. + @retval EFI_INVALID_PARAMETER GcdMemoryType is invalid. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_INVALID_PARAMETER BaseAddress is NULL. + @retval EFI_INVALID_PARAMETER ImageHandle is NULL. + @retval EFI_NOT_FOUND The memory resource request could not be satisfied. + No descriptor contains the desired space. + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to allocate the memory + resource from the global coherency domain of the processor. + @retval EFI_SUCCESS The memory resource was allocated from the global coherency + domain of the processor. + + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ALLOCATE_MEMORY_SPACE)( + IN EFI_GCD_ALLOCATE_TYPE GcdAllocateType, + IN EFI_GCD_MEMORY_TYPE GcdMemoryType, + IN UINTN Alignment, + IN UINT64 Length, + IN OUT EFI_PHYSICAL_ADDRESS *BaseAddress, + IN EFI_HANDLE ImageHandle, + IN EFI_HANDLE DeviceHandle OPTIONAL + ); + +/** + Frees nonexistent memory, reserved memory, system memory, or memory-mapped + I/O resources from the global coherency domain of the processor. + + @param BaseAddress The physical address that is the start address of the memory resource being freed. + @param Length The size in bytes of the memory resource range that is being freed. + + @retval EFI_SUCCESS The memory resource was freed from the global coherency domain of + the processor. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory + resource range specified by BaseAddress and Length. + @retval EFI_NOT_FOUND The memory resource range specified by BaseAddress and + Length was not allocated with previous calls to AllocateMemorySpace(). + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to free the memory resource + from the global coherency domain of the processor. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FREE_MEMORY_SPACE)( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ); + +/** + Removes reserved memory, system memory, or memory-mapped I/O resources from + the global coherency domain of the processor. + + @param BaseAddress The physical address that is the start address of the memory resource being removed. + @param Length The size in bytes of the memory resource that is being removed. + + @retval EFI_SUCCESS The memory resource was removed from the global coherency + domain of the processor. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory + resource range specified by BaseAddress and Length. + @retval EFI_NOT_FOUND One or more bytes of the memory resource range specified by + BaseAddress and Length was not added with previous calls to + AddMemorySpace(). + @retval EFI_ACCESS_DEFINED One or more bytes of the memory resource range specified by + BaseAddress and Length has been allocated with AllocateMemorySpace(). + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to remove the memory + resource from the global coherency domain of the processor. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_REMOVE_MEMORY_SPACE)( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ); + +/** + Retrieves the descriptor for a memory region containing a specified address. + + @param BaseAddress The physical address that is the start address of a memory region. + @param Descriptor A pointer to a caller allocated descriptor. + + @retval EFI_SUCCESS The descriptor for the memory resource region containing + BaseAddress was returned in Descriptor. + @retval EFI_INVALID_PARAMETER Descriptor is NULL. + @retval EFI_NOT_FOUND A memory resource range containing BaseAddress was not found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_MEMORY_SPACE_DESCRIPTOR)( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor + ); + +/** + Modifies the attributes for a memory region in the global coherency domain of the + processor. + + @param BaseAddress The physical address that is the start address of a memory region. + @param Length The size in bytes of the memory region. + @param Attributes The bit mask of attributes to set for the memory region. + + @retval EFI_SUCCESS The attributes were set for the memory region. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory + resource range specified by BaseAddress and Length. + @retval EFI_UNSUPPORTED The bit mask of attributes is not support for the memory resource + range specified by BaseAddress and Length. + @retval EFI_ACCESS_DEFINED The attributes for the memory resource range specified by + BaseAddress and Length cannot be modified. + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of + the memory resource range. + @retval EFI_NOT_AVAILABLE_YET The attributes cannot be set because CPU architectural protocol is + not available yet. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_MEMORY_SPACE_ATTRIBUTES)( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length, + IN UINT64 Attributes + ); + +/** + Returns a map of the memory resources in the global coherency domain of the + processor. + + @param NumberOfDescriptors A pointer to number of descriptors returned in the MemorySpaceMap buffer. + @param MemorySpaceMap A pointer to the array of EFI_GCD_MEMORY_SPACE_DESCRIPTORs. + + @retval EFI_SUCCESS The memory space map was returned in the MemorySpaceMap + buffer, and the number of descriptors in MemorySpaceMap was + returned in NumberOfDescriptors. + @retval EFI_INVALID_PARAMETER NumberOfDescriptors is NULL. + @retval EFI_INVALID_PARAMETER MemorySpaceMap is NULL. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate MemorySpaceMap. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_MEMORY_SPACE_MAP)( + OUT UINTN *NumberOfDescriptors, + OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR **MemorySpaceMap + ); + +/** + Adds reserved I/O or I/O resources to the global coherency domain of the processor. + + @param GcdIoType The type of I/O resource being added. + @param BaseAddress The physical address that is the start address of the I/O resource being added. + @param Length The size in bytes of the I/O resource that is being added. + + @retval EFI_SUCCESS The I/O resource was added to the global coherency domain of + the processor. + @retval EFI_INVALID_PARAMETER GcdIoType is invalid. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to add the I/O resource to + the global coherency domain of the processor. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the I/O + resource range specified by BaseAddress and Length. + @retval EFI_ACCESS_DENIED One or more bytes of the I/O resource range specified by + BaseAddress and Length conflicts with an I/O resource + range that was previously added to the global coherency domain + of the processor. + @retval EFI_ACCESS_DENIED One or more bytes of the I/O resource range specified by + BaseAddress and Length was allocated in a prior call to + AllocateIoSpace(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ADD_IO_SPACE)( + IN EFI_GCD_IO_TYPE GcdIoType, + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ); + +/** + Allocates nonexistent I/O, reserved I/O, or I/O resources from the global coherency + domain of the processor. + + @param GcdAllocateType The type of allocation to perform. + @param GcdIoType The type of I/O resource being allocated. + @param Alignment The log base 2 of the boundary that BaseAddress must be aligned on output. + @param Length The size in bytes of the I/O resource range that is being allocated. + @param BaseAddress A pointer to a physical address. + @param Imagehandle The image handle of the agent that is allocating the I/O resource. + @param DeviceHandle The device handle for which the I/O resource is being allocated. + + @retval EFI_SUCCESS The I/O resource was allocated from the global coherency domain + of the processor. + @retval EFI_INVALID_PARAMETER GcdAllocateType is invalid. + @retval EFI_INVALID_PARAMETER GcdIoType is invalid. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_INVALID_PARAMETER BaseAddress is NULL. + @retval EFI_INVALID_PARAMETER ImageHandle is NULL. + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to allocate the I/O + resource from the global coherency domain of the processor. + @retval EFI_NOT_FOUND The I/O resource request could not be satisfied. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ALLOCATE_IO_SPACE)( + IN EFI_GCD_ALLOCATE_TYPE GcdAllocateType, + IN EFI_GCD_IO_TYPE GcdIoType, + IN UINTN Alignment, + IN UINT64 Length, + IN OUT EFI_PHYSICAL_ADDRESS *BaseAddress, + IN EFI_HANDLE ImageHandle, + IN EFI_HANDLE DeviceHandle OPTIONAL + ); + +/** + Frees nonexistent I/O, reserved I/O, or I/O resources from the global coherency + domain of the processor. + + @param BaseAddress The physical address that is the start address of the I/O resource being freed. + @param Length The size in bytes of the I/O resource range that is being freed. + + @retval EFI_SUCCESS The I/O resource was freed from the global coherency domain of the + processor. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the I/O resource + range specified by BaseAddress and Length. + @retval EFI_NOT_FOUND The I/O resource range specified by BaseAddress and Length + was not allocated with previous calls to AllocateIoSpace(). + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to free the I/O resource from + the global coherency domain of the processor. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FREE_IO_SPACE)( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ); + +/** + Removes reserved I/O or I/O resources from the global coherency domain of the + processor. + + @param BaseAddress A pointer to a physical address that is the start address of the I/O resource being + removed. + @param Length The size in bytes of the I/O resource that is being removed. + + @retval EFI_SUCCESS The I/O resource was removed from the global coherency domain + of the processor. + @retval EFI_INVALID_PARAMETER Length is zero. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the I/O + resource range specified by BaseAddress and Length. + @retval EFI_NOT_FOUND One or more bytes of the I/O resource range specified by + BaseAddress and Length was not added with previous + calls to AddIoSpace(). + @retval EFI_ACCESS_DENIED One or more bytes of the I/O resource range specified by + BaseAddress and Length has been allocated with + AllocateIoSpace(). + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to remove the I/O + resource from the global coherency domain of the processor. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_REMOVE_IO_SPACE)( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ); + +/** + Retrieves the descriptor for an I/O region containing a specified address. + + @param BaseAddress The physical address that is the start address of an I/O region. + @param Descriptor A pointer to a caller allocated descriptor. + + @retval EFI_SUCCESS The descriptor for the I/O resource region containing + BaseAddress was returned in Descriptor. + @retval EFI_INVALID_PARAMETER Descriptor is NULL. + @retval EFI_NOT_FOUND An I/O resource range containing BaseAddress was not found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_IO_SPACE_DESCRIPTOR)( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + OUT EFI_GCD_IO_SPACE_DESCRIPTOR *Descriptor + ); + +/** + Returns a map of the I/O resources in the global coherency domain of the processor. + + @param NumberOfDescriptors A pointer to number of descriptors returned in the IoSpaceMap buffer. + @param MemorySpaceMap A pointer to the array of EFI_GCD_IO_SPACE_DESCRIPTORs. + + @retval EFI_SUCCESS The I/O space map was returned in the IoSpaceMap buffer, and + the number of descriptors in IoSpaceMap was returned in + NumberOfDescriptors. + @retval EFI_INVALID_PARAMETER NumberOfDescriptors is NULL. + @retval EFI_INVALID_PARAMETER IoSpaceMap is NULL. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate IoSpaceMap. + + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_IO_SPACE_MAP)( + OUT UINTN *NumberOfDescriptors, + OUT EFI_GCD_IO_SPACE_DESCRIPTOR **IoSpaceMap + ); + + + +/** + Loads and executed DXE drivers from firmware volumes. + + The Dispatch() function searches for DXE drivers in firmware volumes that have been + installed since the last time the Dispatch() service was called. It then evaluates + the dependency expressions of all the DXE drivers and loads and executes those DXE + drivers whose dependency expression evaluate to TRUE. This service must interact with + the Security Architectural Protocol to authenticate DXE drivers before they are executed. + This process is continued until no more DXE drivers can be executed. + + @retval EFI_SUCCESS One or more DXE driver were dispatched. + @retval EFI_NOT_FOUND No DXE drivers were dispatched. + @retval EFI_ALREADY_STARTED An attempt is being made to start the DXE Dispatcher recursively. + Thus, no action was taken. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DISPATCH)( + VOID + ); + +/** + Clears the Schedule on Request (SOR) flag for a component that is stored in a firmware volume. + + @param FirmwareVolumeHandle The handle of the firmware volume that contains the file specified by FileName. + @param FileName A pointer to the name of the file in a firmware volume. + + @retval EFI_SUCCESS The DXE driver was found and its SOR bit was cleared. + @retval EFI_NOT_FOUND The DXE driver does not exist, or the DXE driver exists and its SOR + bit is not set. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SCHEDULE)( + IN EFI_HANDLE FirmwareVolumeHandle, + IN CONST EFI_GUID *FileName + ); + +/** + Promotes a file stored in a firmware volume from the untrusted to the trusted state. + + @param FirmwareVolumeHandle The handle of the firmware volume that contains the file specified by FileName. + @param DriverName A pointer to the name of the file in a firmware volume. + + @return Status of promoting FFS from untrusted to trusted + state. + @retval EFI_NOT_FOUND The file was not found in the untrusted state. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TRUST)( + IN EFI_HANDLE FirmwareVolumeHandle, + IN CONST EFI_GUID *FileName + ); + +/** + Creates a firmware volume handle for a firmware volume that is present in system memory. + + @param FirmwareVolumeHeader A pointer to the header of the firmware volume. + @param Size The size, in bytes, of the firmware volume. + @param FirmwareVolumeHandle On output, a pointer to the created handle. + + @retval EFI_SUCCESS The EFI_FIRMWARE_VOLUME_PROTOCOL and + EFI_DEVICE_PATH_PROTOCOL were installed onto + FirmwareVolumeHandle for the firmware volume described + by FirmwareVolumeHeader and Size. + @retval EFI_VOLUME_CORRUPTED The firmware volume described by FirmwareVolumeHeader + and Size is corrupted. + @retval EFI_OUT_OF_RESOURCES There are not enough system resources available to produce the + EFI_FIRMWARE_VOLUME_PROTOCOL and EFI_DEVICE_PATH_PROTOCOL + for the firmware volume described by FirmwareVolumeHeader and Size. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PROCESS_FIRMWARE_VOLUME)( + IN CONST VOID *FirmwareVolumeHeader, + IN UINTN Size, + OUT EFI_HANDLE *FirmwareVolumeHandle + ); + +// +// DXE Services Table +// +#define DXE_SERVICES_SIGNATURE 0x565245535f455844ULL +#define DXE_SPECIFICATION_MAJOR_REVISION 1 +#define DXE_SPECIFICATION_MINOR_REVISION 30 +#define DXE_SERVICES_REVISION ((DXE_SPECIFICATION_MAJOR_REVISION<<16) | (DXE_SPECIFICATION_MINOR_REVISION)) + +typedef struct { + /// + /// The table header for the DXE Services Table. + /// This header contains the DXE_SERVICES_SIGNATURE and DXE_SERVICES_REVISION values. + /// + EFI_TABLE_HEADER Hdr; + + // + // Global Coherency Domain Services + // + EFI_ADD_MEMORY_SPACE AddMemorySpace; + EFI_ALLOCATE_MEMORY_SPACE AllocateMemorySpace; + EFI_FREE_MEMORY_SPACE FreeMemorySpace; + EFI_REMOVE_MEMORY_SPACE RemoveMemorySpace; + EFI_GET_MEMORY_SPACE_DESCRIPTOR GetMemorySpaceDescriptor; + EFI_SET_MEMORY_SPACE_ATTRIBUTES SetMemorySpaceAttributes; + EFI_GET_MEMORY_SPACE_MAP GetMemorySpaceMap; + EFI_ADD_IO_SPACE AddIoSpace; + EFI_ALLOCATE_IO_SPACE AllocateIoSpace; + EFI_FREE_IO_SPACE FreeIoSpace; + EFI_REMOVE_IO_SPACE RemoveIoSpace; + EFI_GET_IO_SPACE_DESCRIPTOR GetIoSpaceDescriptor; + EFI_GET_IO_SPACE_MAP GetIoSpaceMap; + + // + // Dispatcher Services + // + EFI_DISPATCH Dispatch; + EFI_SCHEDULE Schedule; + EFI_TRUST Trust; + // + // Service to process a single firmware volume found in a capsule + // + EFI_PROCESS_FIRMWARE_VOLUME ProcessFirmwareVolume; +} DXE_SERVICES; + +typedef DXE_SERVICES EFI_DXE_SERVICES; + + +/** + The function prototype for invoking a function on an Application Processor. + + This definition is used by the UEFI MP Serices Protocol, and the + PI SMM System Table. + + @param[in,out] Buffer The pointer to private data buffer. +**/ +typedef +VOID +(EFIAPI *EFI_AP_PROCEDURE)( + IN OUT VOID *Buffer + ); + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiFirmwareFile.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiFirmwareFile.h new file mode 100644 index 000000000..f6cf9574d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiFirmwareFile.h @@ -0,0 +1,496 @@ +/** @file + The firmware file related definitions in PI. + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + PI Version 1.2. + +**/ + + +#ifndef __PI_FIRMWARE_FILE_H__ +#define __PI_FIRMWARE_FILE_H__ + +FILE_LICENCE ( BSD3 ); + +#pragma pack(1) +/// +/// Used to verify the integrity of the file. +/// +typedef union { + struct { + /// + /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file + /// header. The State and IntegrityCheck.Checksum.File fields are assumed + /// to be zero and the checksum is calculated such that the entire header sums to zero. + /// + UINT8 Header; + /// + /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes + /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit + /// checksum of the file data. + /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero, + /// the IntegrityCheck.Checksum.File field must be initialized with a value of + /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the + /// EFI_FILE_DATA_VALID bit is set in the State field. + /// + UINT8 File; + } Checksum; + /// + /// This is the full 16 bits of the IntegrityCheck field. + /// + UINT16 Checksum16; +} EFI_FFS_INTEGRITY_CHECK; + +/// +/// FFS_FIXED_CHECKSUM is the checksum value used when the +/// FFS_ATTRIB_CHECKSUM attribute bit is clear. +/// +#define FFS_FIXED_CHECKSUM 0xAA + +typedef UINT8 EFI_FV_FILETYPE; +typedef UINT8 EFI_FFS_FILE_ATTRIBUTES; +typedef UINT8 EFI_FFS_FILE_STATE; + +/// +/// File Types Definitions +/// +#define EFI_FV_FILETYPE_ALL 0x00 +#define EFI_FV_FILETYPE_RAW 0x01 +#define EFI_FV_FILETYPE_FREEFORM 0x02 +#define EFI_FV_FILETYPE_SECURITY_CORE 0x03 +#define EFI_FV_FILETYPE_PEI_CORE 0x04 +#define EFI_FV_FILETYPE_DXE_CORE 0x05 +#define EFI_FV_FILETYPE_PEIM 0x06 +#define EFI_FV_FILETYPE_DRIVER 0x07 +#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08 +#define EFI_FV_FILETYPE_APPLICATION 0x09 +#define EFI_FV_FILETYPE_SMM 0x0A +#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B +#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C +#define EFI_FV_FILETYPE_SMM_CORE 0x0D +#define EFI_FV_FILETYPE_OEM_MIN 0xc0 +#define EFI_FV_FILETYPE_OEM_MAX 0xdf +#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0 +#define EFI_FV_FILETYPE_DEBUG_MAX 0xef +#define EFI_FV_FILETYPE_FFS_MIN 0xf0 +#define EFI_FV_FILETYPE_FFS_MAX 0xff +#define EFI_FV_FILETYPE_FFS_PAD 0xf0 +/// +/// FFS File Attributes. +/// +#define FFS_ATTRIB_LARGE_FILE 0x01 +#define FFS_ATTRIB_FIXED 0x04 +#define FFS_ATTRIB_DATA_ALIGNMENT 0x38 +#define FFS_ATTRIB_CHECKSUM 0x40 + +/// +/// FFS File State Bits. +/// +#define EFI_FILE_HEADER_CONSTRUCTION 0x01 +#define EFI_FILE_HEADER_VALID 0x02 +#define EFI_FILE_DATA_VALID 0x04 +#define EFI_FILE_MARKED_FOR_UPDATE 0x08 +#define EFI_FILE_DELETED 0x10 +#define EFI_FILE_HEADER_INVALID 0x20 + + +/// +/// Each file begins with the header that describe the +/// contents and state of the files. +/// +typedef struct { + /// + /// This GUID is the file name. It is used to uniquely identify the file. + /// + EFI_GUID Name; + /// + /// Used to verify the integrity of the file. + /// + EFI_FFS_INTEGRITY_CHECK IntegrityCheck; + /// + /// Identifies the type of file. + /// + EFI_FV_FILETYPE Type; + /// + /// Declares various file attribute bits. + /// + EFI_FFS_FILE_ATTRIBUTES Attributes; + /// + /// The length of the file in bytes, including the FFS header. + /// + UINT8 Size[3]; + /// + /// Used to track the state of the file throughout the life of the file from creation to deletion. + /// + EFI_FFS_FILE_STATE State; +} EFI_FFS_FILE_HEADER; + +typedef struct { + /// + /// This GUID is the file name. It is used to uniquely identify the file. There may be only + /// one instance of a file with the file name GUID of Name in any given firmware + /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD. + /// + EFI_GUID Name; + + /// + /// Used to verify the integrity of the file. + /// + EFI_FFS_INTEGRITY_CHECK IntegrityCheck; + + /// + /// Identifies the type of file. + /// + EFI_FV_FILETYPE Type; + + /// + /// Declares various file attribute bits. + /// + EFI_FFS_FILE_ATTRIBUTES Attributes; + + /// + /// The length of the file in bytes, including the FFS header. + /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a + /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER). + /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is + /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F. + /// + UINT8 Size[3]; + + /// + /// Used to track the state of the file throughout the life of the file from creation to deletion. + /// + EFI_FFS_FILE_STATE State; + + /// + /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero. + /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used. + /// + UINT32 ExtendedSize; +} EFI_FFS_FILE_HEADER2; + +#define IS_FFS_FILE2(FfsFileHeaderPtr) \ + (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE) + +#define FFS_FILE_SIZE(FfsFileHeaderPtr) \ + ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff)) + +#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \ + (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize) + +typedef UINT8 EFI_SECTION_TYPE; + +/// +/// Pseudo type. It is used as a wild card when retrieving sections. +/// The section type EFI_SECTION_ALL matches all section types. +/// +#define EFI_SECTION_ALL 0x00 + +/// +/// Encapsulation section Type values. +/// +#define EFI_SECTION_COMPRESSION 0x01 + +#define EFI_SECTION_GUID_DEFINED 0x02 + +#define EFI_SECTION_DISPOSABLE 0x03 + +/// +/// Leaf section Type values. +/// +#define EFI_SECTION_PE32 0x10 +#define EFI_SECTION_PIC 0x11 +#define EFI_SECTION_TE 0x12 +#define EFI_SECTION_DXE_DEPEX 0x13 +#define EFI_SECTION_VERSION 0x14 +#define EFI_SECTION_USER_INTERFACE 0x15 +#define EFI_SECTION_COMPATIBILITY16 0x16 +#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17 +#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18 +#define EFI_SECTION_RAW 0x19 +#define EFI_SECTION_PEI_DEPEX 0x1B +#define EFI_SECTION_SMM_DEPEX 0x1C + +/// +/// Common section header. +/// +typedef struct { + /// + /// A 24-bit unsigned integer that contains the total size of the section in bytes, + /// including the EFI_COMMON_SECTION_HEADER. + /// + UINT8 Size[3]; + EFI_SECTION_TYPE Type; + /// + /// Declares the section type. + /// +} EFI_COMMON_SECTION_HEADER; + +typedef struct { + /// + /// A 24-bit unsigned integer that contains the total size of the section in bytes, + /// including the EFI_COMMON_SECTION_HEADER. + /// + UINT8 Size[3]; + + EFI_SECTION_TYPE Type; + + /// + /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If + /// Size is not equal to 0xFFFFFF, then this field does not exist. + /// + UINT32 ExtendedSize; +} EFI_COMMON_SECTION_HEADER2; + +/// +/// Leaf section type that contains an +/// IA-32 16-bit executable image. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2; + +/// +/// CompressionType of EFI_COMPRESSION_SECTION. +/// +#define EFI_NOT_COMPRESSED 0x00 +#define EFI_STANDARD_COMPRESSION 0x01 +/// +/// An encapsulation section type in which the +/// section data is compressed. +/// +typedef struct { + /// + /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION. + /// + EFI_COMMON_SECTION_HEADER CommonHeader; + /// + /// The UINT32 that indicates the size of the section data after decompression. + /// + UINT32 UncompressedLength; + /// + /// Indicates which compression algorithm is used. + /// + UINT8 CompressionType; +} EFI_COMPRESSION_SECTION; + +typedef struct { + /// + /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION. + /// + EFI_COMMON_SECTION_HEADER2 CommonHeader; + /// + /// UINT32 that indicates the size of the section data after decompression. + /// + UINT32 UncompressedLength; + /// + /// Indicates which compression algorithm is used. + /// + UINT8 CompressionType; +} EFI_COMPRESSION_SECTION2; + +/// +/// An encapsulation section type in which the section data is disposable. +/// A disposable section is an encapsulation section in which the section data may be disposed of during +/// the process of creating or updating a firmware image without significant impact on the usefulness of +/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This +/// allows optional or descriptive data to be included with the firmware file which can be removed in +/// order to conserve space. The contents of this section are implementation specific, but might contain +/// debug data or detailed integration instructions. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2; + +/// +/// The leaf section which could be used to determine the dispatch order of DXEs. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2; + +/// +/// The leaf section which contains a PI FV. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2; + +/// +/// The leaf section which contains a single GUID. +/// +typedef struct { + /// + /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID. + /// + EFI_COMMON_SECTION_HEADER CommonHeader; + /// + /// This GUID is defined by the creator of the file. It is a vendor-defined file type. + /// + EFI_GUID SubTypeGuid; +} EFI_FREEFORM_SUBTYPE_GUID_SECTION; + +typedef struct { + /// + /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID. + /// + EFI_COMMON_SECTION_HEADER2 CommonHeader; + /// + /// This GUID is defined by the creator of the file. It is a vendor-defined file type. + /// + EFI_GUID SubTypeGuid; +} EFI_FREEFORM_SUBTYPE_GUID_SECTION2; + +/// +/// Attributes of EFI_GUID_DEFINED_SECTION. +/// +#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01 +#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02 +/// +/// The leaf section which is encapsulation defined by specific GUID. +/// +typedef struct { + /// + /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED. + /// + EFI_COMMON_SECTION_HEADER CommonHeader; + /// + /// The GUID that defines the format of the data that follows. It is a vendor-defined section type. + /// + EFI_GUID SectionDefinitionGuid; + /// + /// Contains the offset in bytes from the beginning of the common header to the first byte of the data. + /// + UINT16 DataOffset; + /// + /// The bit field that declares some specific characteristics of the section contents. + /// + UINT16 Attributes; +} EFI_GUID_DEFINED_SECTION; + +typedef struct { + /// + /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED. + /// + EFI_COMMON_SECTION_HEADER2 CommonHeader; + /// + /// The GUID that defines the format of the data that follows. It is a vendor-defined section type. + /// + EFI_GUID SectionDefinitionGuid; + /// + /// Contains the offset in bytes from the beginning of the common header to the first byte of the data. + /// + UINT16 DataOffset; + /// + /// The bit field that declares some specific characteristics of the section contents. + /// + UINT16 Attributes; +} EFI_GUID_DEFINED_SECTION2; + +/// +/// The leaf section which contains PE32+ image. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2; + +/// +/// The leaf section used to determine the dispatch order of PEIMs. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2; + +/// +/// A leaf section type that contains a position-independent-code (PIC) image. +/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image. +/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be +/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all +/// relocation information has been stripped from the image and the image can be moved and will +/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must +/// be used if the section is 16MB or larger. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2; + +/// +/// The leaf section which constains the position-independent-code image. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2; + +/// +/// The leaf section which contains an array of zero or more bytes. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2; + +/// +/// The SMM dependency expression section is a leaf section that contains a dependency expression that +/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the +/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform +/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression. +/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol +/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger. +/// +typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION; +typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2; + +/// +/// The leaf section which contains a unicode string that +/// is human readable file name. +/// +typedef struct { + EFI_COMMON_SECTION_HEADER CommonHeader; + + /// + /// Array of unicode string. + /// + CHAR16 FileNameString[1]; +} EFI_USER_INTERFACE_SECTION; + +typedef struct { + EFI_COMMON_SECTION_HEADER2 CommonHeader; + CHAR16 FileNameString[1]; +} EFI_USER_INTERFACE_SECTION2; + +/// +/// The leaf section which contains a numeric build number and +/// an optional unicode string that represents the file revision. +/// +typedef struct { + EFI_COMMON_SECTION_HEADER CommonHeader; + UINT16 BuildNumber; + + /// + /// Array of unicode string. + /// + CHAR16 VersionString[1]; +} EFI_VERSION_SECTION; + +typedef struct { + EFI_COMMON_SECTION_HEADER2 CommonHeader; + /// + /// A UINT16 that represents a particular build. Subsequent builds have monotonically + /// increasing build numbers relative to earlier builds. + /// + UINT16 BuildNumber; + CHAR16 VersionString[1]; +} EFI_VERSION_SECTION2; + +#define IS_SECTION2(SectionHeaderPtr) \ + ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff) + +#define SECTION_SIZE(SectionHeaderPtr) \ + ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff)) + +#define SECTION2_SIZE(SectionHeaderPtr) \ + (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize) + +#pragma pack() + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiFirmwareVolume.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiFirmwareVolume.h new file mode 100644 index 000000000..e818861b7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiFirmwareVolume.h @@ -0,0 +1,236 @@ +/** @file + The firmware volume related definitions in PI. + + Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + PI Version 1.3 + +**/ + +#ifndef __PI_FIRMWAREVOLUME_H__ +#define __PI_FIRMWAREVOLUME_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// EFI_FV_FILE_ATTRIBUTES +/// +typedef UINT32 EFI_FV_FILE_ATTRIBUTES; + +// +// Value of EFI_FV_FILE_ATTRIBUTES. +// +#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F +#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100 +#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200 + +/// +/// type of EFI FVB attribute +/// +typedef UINT32 EFI_FVB_ATTRIBUTES_2; + +// +// Attributes bit definitions +// +#define EFI_FVB2_READ_DISABLED_CAP 0x00000001 +#define EFI_FVB2_READ_ENABLED_CAP 0x00000002 +#define EFI_FVB2_READ_STATUS 0x00000004 +#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008 +#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010 +#define EFI_FVB2_WRITE_STATUS 0x00000020 +#define EFI_FVB2_LOCK_CAP 0x00000040 +#define EFI_FVB2_LOCK_STATUS 0x00000080 +#define EFI_FVB2_STICKY_WRITE 0x00000200 +#define EFI_FVB2_MEMORY_MAPPED 0x00000400 +#define EFI_FVB2_ERASE_POLARITY 0x00000800 +#define EFI_FVB2_READ_LOCK_CAP 0x00001000 +#define EFI_FVB2_READ_LOCK_STATUS 0x00002000 +#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000 +#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000 +#define EFI_FVB2_ALIGNMENT 0x001F0000 +#define EFI_FVB2_ALIGNMENT_1 0x00000000 +#define EFI_FVB2_ALIGNMENT_2 0x00010000 +#define EFI_FVB2_ALIGNMENT_4 0x00020000 +#define EFI_FVB2_ALIGNMENT_8 0x00030000 +#define EFI_FVB2_ALIGNMENT_16 0x00040000 +#define EFI_FVB2_ALIGNMENT_32 0x00050000 +#define EFI_FVB2_ALIGNMENT_64 0x00060000 +#define EFI_FVB2_ALIGNMENT_128 0x00070000 +#define EFI_FVB2_ALIGNMENT_256 0x00080000 +#define EFI_FVB2_ALIGNMENT_512 0x00090000 +#define EFI_FVB2_ALIGNMENT_1K 0x000A0000 +#define EFI_FVB2_ALIGNMENT_2K 0x000B0000 +#define EFI_FVB2_ALIGNMENT_4K 0x000C0000 +#define EFI_FVB2_ALIGNMENT_8K 0x000D0000 +#define EFI_FVB2_ALIGNMENT_16K 0x000E0000 +#define EFI_FVB2_ALIGNMENT_32K 0x000F0000 +#define EFI_FVB2_ALIGNMENT_64K 0x00100000 +#define EFI_FVB2_ALIGNMENT_128K 0x00110000 +#define EFI_FVB2_ALIGNMENT_256K 0x00120000 +#define EFI_FVB2_ALIGNMENT_512K 0x00130000 +#define EFI_FVB2_ALIGNMENT_1M 0x00140000 +#define EFI_FVB2_ALIGNMENT_2M 0x00150000 +#define EFI_FVB2_ALIGNMENT_4M 0x00160000 +#define EFI_FVB2_ALIGNMENT_8M 0x00170000 +#define EFI_FVB2_ALIGNMENT_16M 0x00180000 +#define EFI_FVB2_ALIGNMENT_32M 0x00190000 +#define EFI_FVB2_ALIGNMENT_64M 0x001A0000 +#define EFI_FVB2_ALIGNMENT_128M 0x001B0000 +#define EFI_FVB2_ALIGNMENT_256M 0x001C0000 +#define EFI_FVB2_ALIGNMENT_512M 0x001D0000 +#define EFI_FVB2_ALIGNMENT_1G 0x001E0000 +#define EFI_FVB2_ALIGNMENT_2G 0x001F0000 +#define EFI_FVB2_WEAK_ALIGNMENT 0x80000000 + +typedef struct { + /// + /// The number of sequential blocks which are of the same size. + /// + UINT32 NumBlocks; + /// + /// The size of the blocks. + /// + UINT32 Length; +} EFI_FV_BLOCK_MAP_ENTRY; + +/// +/// Describes the features and layout of the firmware volume. +/// +typedef struct { + /// + /// The first 16 bytes are reserved to allow for the reset vector of + /// processors whose reset vector is at address 0. + /// + UINT8 ZeroVector[16]; + /// + /// Declares the file system with which the firmware volume is formatted. + /// + EFI_GUID FileSystemGuid; + /// + /// Length in bytes of the complete firmware volume, including the header. + /// + UINT64 FvLength; + /// + /// Set to EFI_FVH_SIGNATURE + /// + UINT32 Signature; + /// + /// Declares capabilities and power-on defaults for the firmware volume. + /// + EFI_FVB_ATTRIBUTES_2 Attributes; + /// + /// Length in bytes of the complete firmware volume header. + /// + UINT16 HeaderLength; + /// + /// A 16-bit checksum of the firmware volume header. A valid header sums to zero. + /// + UINT16 Checksum; + /// + /// Offset, relative to the start of the header, of the extended header + /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header. + /// + UINT16 ExtHeaderOffset; + /// + /// This field must always be set to zero. + /// + UINT8 Reserved[1]; + /// + /// Set to 2. Future versions of this specification may define new header fields and will + /// increment the Revision field accordingly. + /// + UINT8 Revision; + /// + /// An array of run-length encoded FvBlockMapEntry structures. The array is + /// terminated with an entry of {0,0}. + /// + EFI_FV_BLOCK_MAP_ENTRY BlockMap[1]; +} EFI_FIRMWARE_VOLUME_HEADER; + +#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H') + +/// +/// Firmware Volume Header Revision definition +/// +#define EFI_FVH_REVISION 0x02 + +/// +/// Extension header pointed by ExtHeaderOffset of volume header. +/// +typedef struct { + /// + /// Firmware volume name. + /// + EFI_GUID FvName; + /// + /// Size of the rest of the extension header, including this structure. + /// + UINT32 ExtHeaderSize; +} EFI_FIRMWARE_VOLUME_EXT_HEADER; + +/// +/// Entry struture for describing FV extension header +/// +typedef struct { + /// + /// Size of this header extension. + /// + UINT16 ExtEntrySize; + /// + /// Type of the header. + /// + UINT16 ExtEntryType; +} EFI_FIRMWARE_VOLUME_EXT_ENTRY; + +#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01 +/// +/// This extension header provides a mapping between a GUID and an OEM file type. +/// +typedef struct { + /// + /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE. + /// + EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr; + /// + /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit + /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types. + /// + UINT32 TypeMask; + /// + /// An array of GUIDs, each GUID representing an OEM file type. + /// + /// EFI_GUID Types[1]; + /// +} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE; + +#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002 + +/// +/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific +/// GUID FormatType type which includes a length and a successive series of data bytes. +/// +typedef struct { + /// + /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE. + /// + EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr; + /// + /// Vendor-specific GUID. + /// + EFI_GUID FormatType; + /// + /// An arry of bytes of length Length. + /// + /// UINT8 Data[1]; + /// +} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiHob.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiHob.h new file mode 100644 index 000000000..c68ea3002 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiHob.h @@ -0,0 +1,454 @@ +/** @file + HOB related definitions in PI. + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + PI Version 1.0 + +**/ + +#ifndef __PI_HOB_H__ +#define __PI_HOB_H__ + +FILE_LICENCE ( BSD3 ); + +// +// HobType of EFI_HOB_GENERIC_HEADER. +// +#define EFI_HOB_TYPE_HANDOFF 0x0001 +#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002 +#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003 +#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004 +#define EFI_HOB_TYPE_FV 0x0005 +#define EFI_HOB_TYPE_CPU 0x0006 +#define EFI_HOB_TYPE_MEMORY_POOL 0x0007 +#define EFI_HOB_TYPE_FV2 0x0009 +#define EFI_HOB_TYPE_LOAD_PEIM_UNUSED 0x000A +#define EFI_HOB_TYPE_UEFI_CAPSULE 0x000B +#define EFI_HOB_TYPE_UNUSED 0xFFFE +#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF + +/// +/// Describes the format and size of the data inside the HOB. +/// All HOBs must contain this generic HOB header. +/// +typedef struct { + /// + /// Identifies the HOB data structure type. + /// + UINT16 HobType; + /// + /// The length in bytes of the HOB. + /// + UINT16 HobLength; + /// + /// This field must always be set to zero. + /// + UINT32 Reserved; +} EFI_HOB_GENERIC_HEADER; + + +/// +/// Value of version in EFI_HOB_HANDOFF_INFO_TABLE. +/// +#define EFI_HOB_HANDOFF_TABLE_VERSION 0x0009 + +/// +/// Contains general state information used by the HOB producer phase. +/// This HOB must be the first one in the HOB list. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_HANDOFF. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// The version number pertaining to the PHIT HOB definition. + /// This value is four bytes in length to provide an 8-byte aligned entry + /// when it is combined with the 4-byte BootMode. + /// + UINT32 Version; + /// + /// The system boot mode as determined during the HOB producer phase. + /// + EFI_BOOT_MODE BootMode; + /// + /// The highest address location of memory that is allocated for use by the HOB producer + /// phase. This address must be 4-KB aligned to meet page restrictions of UEFI. + /// + EFI_PHYSICAL_ADDRESS EfiMemoryTop; + /// + /// The lowest address location of memory that is allocated for use by the HOB producer phase. + /// + EFI_PHYSICAL_ADDRESS EfiMemoryBottom; + /// + /// The highest address location of free memory that is currently available + /// for use by the HOB producer phase. + /// + EFI_PHYSICAL_ADDRESS EfiFreeMemoryTop; + /// + /// The lowest address location of free memory that is available for use by the HOB producer phase. + /// + EFI_PHYSICAL_ADDRESS EfiFreeMemoryBottom; + /// + /// The end of the HOB list. + /// + EFI_PHYSICAL_ADDRESS EfiEndOfHobList; +} EFI_HOB_HANDOFF_INFO_TABLE; + +/// +/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the +/// various attributes of the logical memory allocation. The type field will be used for +/// subsequent inclusion in the UEFI memory map. +/// +typedef struct { + /// + /// A GUID that defines the memory allocation region's type and purpose, as well as + /// other fields within the memory allocation HOB. This GUID is used to define the + /// additional data within the HOB that may be present for the memory allocation HOB. + /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0 + /// specification. + /// + EFI_GUID Name; + + /// + /// The base address of memory allocated by this HOB. Type + /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0 + /// specification. + /// + EFI_PHYSICAL_ADDRESS MemoryBaseAddress; + + /// + /// The length in bytes of memory allocated by this HOB. + /// + UINT64 MemoryLength; + + /// + /// Defines the type of memory allocated by this HOB. The memory type definition + /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined + /// in AllocatePages() in the UEFI 2.0 specification. + /// + EFI_MEMORY_TYPE MemoryType; + + /// + /// Padding for Itanium processor family + /// + UINT8 Reserved[4]; +} EFI_HOB_MEMORY_ALLOCATION_HEADER; + +/// +/// Describes all memory ranges used during the HOB producer +/// phase that exist outside the HOB list. This HOB type +/// describes how memory is used, not the physical attributes of memory. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the + /// various attributes of the logical memory allocation. + /// + EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor; + // + // Additional data pertaining to the "Name" Guid memory + // may go here. + // +} EFI_HOB_MEMORY_ALLOCATION; + + +/// +/// Describes the memory stack that is produced by the HOB producer +/// phase and upon which all post-memory-installed executable +/// content in the HOB producer phase is executing. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the + /// various attributes of the logical memory allocation. + /// + EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor; +} EFI_HOB_MEMORY_ALLOCATION_STACK; + +/// +/// Defines the location of the boot-strap +/// processor (BSP) BSPStore ("Backing Store Pointer Store"). +/// This HOB is valid for the Itanium processor family only +/// register overflow store. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the + /// various attributes of the logical memory allocation. + /// + EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor; +} EFI_HOB_MEMORY_ALLOCATION_BSP_STORE; + +/// +/// Defines the location and entry point of the HOB consumer phase. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the + /// various attributes of the logical memory allocation. + /// + EFI_HOB_MEMORY_ALLOCATION_HEADER MemoryAllocationHeader; + /// + /// The GUID specifying the values of the firmware file system name + /// that contains the HOB consumer phase component. + /// + EFI_GUID ModuleName; + /// + /// The address of the memory-mapped firmware volume + /// that contains the HOB consumer phase firmware file. + /// + EFI_PHYSICAL_ADDRESS EntryPoint; +} EFI_HOB_MEMORY_ALLOCATION_MODULE; + +/// +/// The resource type. +/// +typedef UINT32 EFI_RESOURCE_TYPE; + +// +// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR. +// +#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000 +#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001 +#define EFI_RESOURCE_IO 0x00000002 +#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003 +#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004 +#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005 +#define EFI_RESOURCE_IO_RESERVED 0x00000006 +#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007 + +/// +/// A type of recount attribute type. +/// +typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE; + +// +// These types can be ORed together as needed. +// +// The following attributes are used to describe settings +// +#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001 +#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002 +#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004 +#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080 +#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100 +#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200 +// +// The rest of the attributes are used to describe capabilities +// +#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008 +#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010 +#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020 +#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040 +#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400 +#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800 +#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000 +#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000 +#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000 +#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000 +#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000 +#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000 +#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTABLE 0x00100000 +#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE 0x00200000 +#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE 0x00400000 + +/// +/// Describes the resource properties of all fixed, +/// nonrelocatable resource ranges found on the processor +/// host bus during the HOB producer phase. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// A GUID representing the owner of the resource. This GUID is used by HOB + /// consumer phase components to correlate device ownership of a resource. + /// + EFI_GUID Owner; + /// + /// The resource type enumeration as defined by EFI_RESOURCE_TYPE. + /// + EFI_RESOURCE_TYPE ResourceType; + /// + /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE. + /// + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute; + /// + /// The physical start address of the resource region. + /// + EFI_PHYSICAL_ADDRESS PhysicalStart; + /// + /// The number of bytes of the resource region. + /// + UINT64 ResourceLength; +} EFI_HOB_RESOURCE_DESCRIPTOR; + +/// +/// Allows writers of executable content in the HOB producer phase to +/// maintain and manage HOBs with specific GUID. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// A GUID that defines the contents of this HOB. + /// + EFI_GUID Name; + // + // Guid specific data goes here + // +} EFI_HOB_GUID_TYPE; + +/// +/// Details the location of firmware volumes that contain firmware files. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_FV. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// The physical memory-mapped base address of the firmware volume. + /// + EFI_PHYSICAL_ADDRESS BaseAddress; + /// + /// The length in bytes of the firmware volume. + /// + UINT64 Length; +} EFI_HOB_FIRMWARE_VOLUME; + +/// +/// Details the location of a firmware volume that was extracted +/// from a file within another firmware volume. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_FV2. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// The physical memory-mapped base address of the firmware volume. + /// + EFI_PHYSICAL_ADDRESS BaseAddress; + /// + /// The length in bytes of the firmware volume. + /// + UINT64 Length; + /// + /// The name of the firmware volume. + /// + EFI_GUID FvName; + /// + /// The name of the firmware file that contained this firmware volume. + /// + EFI_GUID FileName; +} EFI_HOB_FIRMWARE_VOLUME2; + + +/// +/// Describes processor information, such as address space and I/O space capabilities. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_CPU. + /// + EFI_HOB_GENERIC_HEADER Header; + /// + /// Identifies the maximum physical memory addressability of the processor. + /// + UINT8 SizeOfMemorySpace; + /// + /// Identifies the maximum physical I/O addressability of the processor. + /// + UINT8 SizeOfIoSpace; + /// + /// This field will always be set to zero. + /// + UINT8 Reserved[6]; +} EFI_HOB_CPU; + + +/// +/// Describes pool memory allocations. +/// +typedef struct { + /// + /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_POOL. + /// + EFI_HOB_GENERIC_HEADER Header; +} EFI_HOB_MEMORY_POOL; + +/// +/// Each UEFI capsule HOB details the location of a UEFI capsule. It includes a base address and length +/// which is based upon memory blocks with a EFI_CAPSULE_HEADER and the associated +/// CapsuleImageSize-based payloads. These HOB's shall be created by the PEI PI firmware +/// sometime after the UEFI UpdateCapsule service invocation with the +/// CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE flag set in the EFI_CAPSULE_HEADER. +/// +typedef struct { + /// + /// The HOB generic header where Header.HobType = EFI_HOB_TYPE_UEFI_CAPSULE. + /// + EFI_HOB_GENERIC_HEADER Header; + + /// + /// The physical memory-mapped base address of an UEFI capsule. This value is set to + /// point to the base of the contiguous memory of the UEFI capsule. + /// The length of the contiguous memory in bytes. + /// + EFI_PHYSICAL_ADDRESS BaseAddress; + UINT64 Length; +} EFI_HOB_UEFI_CAPSULE; + +/// +/// Union of all the possible HOB Types. +/// +typedef union { + EFI_HOB_GENERIC_HEADER *Header; + EFI_HOB_HANDOFF_INFO_TABLE *HandoffInformationTable; + EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation; + EFI_HOB_MEMORY_ALLOCATION_BSP_STORE *MemoryAllocationBspStore; + EFI_HOB_MEMORY_ALLOCATION_STACK *MemoryAllocationStack; + EFI_HOB_MEMORY_ALLOCATION_MODULE *MemoryAllocationModule; + EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor; + EFI_HOB_GUID_TYPE *Guid; + EFI_HOB_FIRMWARE_VOLUME *FirmwareVolume; + EFI_HOB_FIRMWARE_VOLUME2 *FirmwareVolume2; + EFI_HOB_CPU *Cpu; + EFI_HOB_MEMORY_POOL *Pool; + EFI_HOB_UEFI_CAPSULE *Capsule; + UINT8 *Raw; +} EFI_PEI_HOB_POINTERS; + + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiMultiPhase.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiMultiPhase.h new file mode 100644 index 000000000..daf6591f5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiMultiPhase.h @@ -0,0 +1,167 @@ +/** @file + Include file matches things in PI for multiple module types. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + These elements are defined in UEFI Platform Initialization Specification 1.2. + +**/ + +#ifndef __PI_MULTIPHASE_H__ +#define __PI_MULTIPHASE_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Pi/PiFirmwareVolume.h> +#include <ipxe/efi/Pi/PiFirmwareFile.h> +#include <ipxe/efi/Pi/PiBootMode.h> +#include <ipxe/efi/Pi/PiHob.h> +#include <ipxe/efi/Pi/PiDependency.h> +#include <ipxe/efi/Pi/PiStatusCode.h> +#include <ipxe/efi/Pi/PiS3BootScript.h> + +/** + Produces an error code in the range reserved for use by the Platform Initialization + Architecture Specification. + + The supported 32-bit range is 0xA0000000-0xBFFFFFFF + The supported 64-bit range is 0xA000000000000000-0xBFFFFFFFFFFFFFFF + + @param StatusCode The status code value to convert into a warning code. + StatusCode must be in the range 0x00000000..0x1FFFFFFF. + + @return The value specified by StatusCode in the PI reserved range. + +**/ +#define DXE_ERROR(StatusCode) (MAX_BIT | (MAX_BIT >> 2) | StatusCode) + +/// +/// If this value is returned by an EFI image, then the image should be unloaded. +/// +#define EFI_REQUEST_UNLOAD_IMAGE DXE_ERROR (1) + +/// +/// If this value is returned by an API, it means the capability is not yet +/// installed/available/ready to use. +/// +#define EFI_NOT_AVAILABLE_YET DXE_ERROR (2) + +/// +/// Success and warning codes reserved for use by PI. +/// Supported 32-bit range is 0x20000000-0x3fffffff. +/// Supported 64-bit range is 0x2000000000000000-0x3fffffffffffffff. +/// +#define PI_ENCODE_WARNING(a) ((MAX_BIT >> 2) | (a)) + +/// +/// Error codes reserved for use by PI. +/// Supported 32-bit range is 0xa0000000-0xbfffffff. +/// Supported 64-bit range is 0xa000000000000000-0xbfffffffffffffff. +/// +#define PI_ENCODE_ERROR(a) (MAX_BIT | (MAX_BIT >> 2) | (a)) + +/// +/// Return status codes defined in SMM CIS. +/// +#define EFI_INTERRUPT_PENDING PI_ENCODE_ERROR (0) + +#define EFI_WARN_INTERRUPT_SOURCE_PENDING PI_ENCODE_WARNING (0) +#define EFI_WARN_INTERRUPT_SOURCE_QUIESCED PI_ENCODE_WARNING (1) + +/// +/// Bitmask of values for Authentication Status. +/// Authentication Status is returned from EFI_GUIDED_SECTION_EXTRACTION_PROTOCOL +/// and the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI +/// +/// xx00 Image was not signed. +/// xxx1 Platform security policy override. Assumes the same meaning as 0010 (the image was signed, the +/// signature was tested, and the signature passed authentication test). +/// 0010 Image was signed, the signature was tested, and the signature passed authentication test. +/// 0110 Image was signed and the signature was not tested. +/// 1010 Image was signed, the signature was tested, and the signature failed the authentication test. +/// +///@{ +#define EFI_AUTH_STATUS_PLATFORM_OVERRIDE 0x01 +#define EFI_AUTH_STATUS_IMAGE_SIGNED 0x02 +#define EFI_AUTH_STATUS_NOT_TESTED 0x04 +#define EFI_AUTH_STATUS_TEST_FAILED 0x08 +#define EFI_AUTH_STATUS_ALL 0x0f +///@} + +/// +/// SMRAM states and capabilities +/// +#define EFI_SMRAM_OPEN 0x00000001 +#define EFI_SMRAM_CLOSED 0x00000002 +#define EFI_SMRAM_LOCKED 0x00000004 +#define EFI_CACHEABLE 0x00000008 +#define EFI_ALLOCATED 0x00000010 +#define EFI_NEEDS_TESTING 0x00000020 +#define EFI_NEEDS_ECC_INITIALIZATION 0x00000040 + +/// +/// Structure describing a SMRAM region and its accessibility attributes. +/// +typedef struct { + /// + /// Designates the physical address of the SMRAM in memory. This view of memory is + /// the same as seen by I/O-based agents, for example, but it may not be the address seen + /// by the processors. + /// + EFI_PHYSICAL_ADDRESS PhysicalStart; + /// + /// Designates the address of the SMRAM, as seen by software executing on the + /// processors. This address may or may not match PhysicalStart. + /// + EFI_PHYSICAL_ADDRESS CpuStart; + /// + /// Describes the number of bytes in the SMRAM region. + /// + UINT64 PhysicalSize; + /// + /// Describes the accessibility attributes of the SMRAM. These attributes include the + /// hardware state (e.g., Open/Closed/Locked), capability (e.g., cacheable), logical + /// allocation (e.g., allocated), and pre-use initialization (e.g., needs testing/ECC + /// initialization). + /// + UINT64 RegionState; +} EFI_SMRAM_DESCRIPTOR; + +typedef enum { + EFI_PCD_TYPE_8, + EFI_PCD_TYPE_16, + EFI_PCD_TYPE_32, + EFI_PCD_TYPE_64, + EFI_PCD_TYPE_BOOL, + EFI_PCD_TYPE_PTR +} EFI_PCD_TYPE; + +typedef struct { + /// + /// The returned information associated with the requested TokenNumber. If + /// TokenNumber is 0, then PcdType is set to EFI_PCD_TYPE_8. + /// + EFI_PCD_TYPE PcdType; + /// + /// The size of the data in bytes associated with the TokenNumber specified. If + /// TokenNumber is 0, then PcdSize is set 0. + /// + UINTN PcdSize; + /// + /// The null-terminated ASCII string associated with a given token. If the + /// TokenNumber specified was 0, then this field corresponds to the null-terminated + /// ASCII string associated with the token's namespace Guid. If NULL, there is no + /// name associated with this request. + /// + CHAR8 *PcdName; +} EFI_PCD_INFO; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiS3BootScript.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiS3BootScript.h new file mode 100644 index 000000000..01cae154c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiS3BootScript.h @@ -0,0 +1,61 @@ +/** @file + This file contains the boot script defintions that are shared between the + Boot Script Executor PPI and the Boot Script Save Protocol. + + Copyright (c) 2009, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _PI_S3_BOOT_SCRIPT_H_ +#define _PI_S3_BOOT_SCRIPT_H_ + +FILE_LICENCE ( BSD3 ); + +//******************************************* +// EFI Boot Script Opcode definitions +//******************************************* +#define EFI_BOOT_SCRIPT_IO_WRITE_OPCODE 0x00 +#define EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE 0x01 +#define EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE 0x02 +#define EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE 0x03 +#define EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE 0x04 +#define EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE 0x05 +#define EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE 0x06 +#define EFI_BOOT_SCRIPT_STALL_OPCODE 0x07 +#define EFI_BOOT_SCRIPT_DISPATCH_OPCODE 0x08 +#define EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x09 +#define EFI_BOOT_SCRIPT_INFORMATION_OPCODE 0x0A +#define EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE 0x0B +#define EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE 0x0C +#define EFI_BOOT_SCRIPT_IO_POLL_OPCODE 0x0D +#define EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x0E +#define EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE 0x0F +#define EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE 0x10 + +//******************************************* +// EFI_BOOT_SCRIPT_WIDTH +//******************************************* +typedef enum { + EfiBootScriptWidthUint8, + EfiBootScriptWidthUint16, + EfiBootScriptWidthUint32, + EfiBootScriptWidthUint64, + EfiBootScriptWidthFifoUint8, + EfiBootScriptWidthFifoUint16, + EfiBootScriptWidthFifoUint32, + EfiBootScriptWidthFifoUint64, + EfiBootScriptWidthFillUint8, + EfiBootScriptWidthFillUint16, + EfiBootScriptWidthFillUint32, + EfiBootScriptWidthFillUint64, + EfiBootScriptWidthMaximum +} EFI_BOOT_SCRIPT_WIDTH; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiStatusCode.h b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiStatusCode.h new file mode 100644 index 000000000..5bef98f64 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Pi/PiStatusCode.h @@ -0,0 +1,1201 @@ +/** @file + StatusCode related definitions in PI. + +Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + These status codes are defined in UEFI Platform Initialization Specification 1.2, + Volume 3: Shared Architectural Elements. + +**/ + +#ifndef __PI_STATUS_CODE_H__ +#define __PI_STATUS_CODE_H__ + +FILE_LICENCE ( BSD3 ); + +// +// Required for IA32, X64, IPF, ARM and EBC defines for CPU exception types +// +#include <ipxe/efi/Protocol/DebugSupport.h> + +/// +/// Status Code Type Definition. +/// +typedef UINT32 EFI_STATUS_CODE_TYPE; + +/// +/// A Status Code Type is made up of the code type and severity. +/// All values masked by EFI_STATUS_CODE_RESERVED_MASK are +/// reserved for use by this specification. +/// +///@{ +#define EFI_STATUS_CODE_TYPE_MASK 0x000000FF +#define EFI_STATUS_CODE_SEVERITY_MASK 0xFF000000 +#define EFI_STATUS_CODE_RESERVED_MASK 0x00FFFF00 +///@} + +/// +/// Definition of code types. All other values masked by +/// EFI_STATUS_CODE_TYPE_MASK are reserved for use by +/// this specification. +/// +///@{ +#define EFI_PROGRESS_CODE 0x00000001 +#define EFI_ERROR_CODE 0x00000002 +#define EFI_DEBUG_CODE 0x00000003 +///@} + +/// +/// Definitions of severities, all other values masked by +/// EFI_STATUS_CODE_SEVERITY_MASK are reserved for use by +/// this specification. +/// Uncontained errors are major errors that could not contained +/// to the specific component that is reporting the error. +/// For example, if a memory error was not detected early enough, +/// the bad data could be consumed by other drivers. +/// +///@{ +#define EFI_ERROR_MINOR 0x40000000 +#define EFI_ERROR_MAJOR 0x80000000 +#define EFI_ERROR_UNRECOVERED 0x90000000 +#define EFI_ERROR_UNCONTAINED 0xa0000000 +///@} + +/// +/// Status Code Value Definition. +/// +typedef UINT32 EFI_STATUS_CODE_VALUE; + +/// +/// A Status Code Value is made up of the class, subclass, and +/// an operation. +/// +///@{ +#define EFI_STATUS_CODE_CLASS_MASK 0xFF000000 +#define EFI_STATUS_CODE_SUBCLASS_MASK 0x00FF0000 +#define EFI_STATUS_CODE_OPERATION_MASK 0x0000FFFF +///@} + +/// +/// Definition of Status Code extended data header. +/// The data will follow HeaderSize bytes from the beginning of +/// the structure and is Size bytes long. +/// +typedef struct { + /// + /// The size of the structure. This is specified to enable future expansion. + /// + UINT16 HeaderSize; + /// + /// The size of the data in bytes. This does not include the size of the header structure. + /// + UINT16 Size; + /// + /// The GUID defining the type of the data. + /// + EFI_GUID Type; +} EFI_STATUS_CODE_DATA; + +/// +/// General partitioning scheme for Progress and Error Codes are: +/// - 0x0000-0x0FFF Shared by all sub-classes in a given class. +/// - 0x1000-0x7FFF Subclass Specific. +/// - 0x8000-0xFFFF OEM specific. +///@{ +#define EFI_SUBCLASS_SPECIFIC 0x1000 +#define EFI_OEM_SPECIFIC 0x8000 +///@} + +/// +/// Debug Code definitions for all classes and subclass. +/// Only one debug code is defined at this point and should +/// be used for anything that is sent to the debug stream. +/// +///@{ +#define EFI_DC_UNSPECIFIED 0x0 +///@} + +/// +/// Class definitions. +/// Values of 4-127 are reserved for future use by this specification. +/// Values in the range 127-255 are reserved for OEM use. +/// +///@{ +#define EFI_COMPUTING_UNIT 0x00000000 +#define EFI_PERIPHERAL 0x01000000 +#define EFI_IO_BUS 0x02000000 +#define EFI_SOFTWARE 0x03000000 +///@} + +/// +/// Computing Unit Subclass definitions. +/// Values of 8-127 are reserved for future use by this specification. +/// Values of 128-255 are reserved for OEM use. +/// +///@{ +#define EFI_COMPUTING_UNIT_UNSPECIFIED (EFI_COMPUTING_UNIT | 0x00000000) +#define EFI_COMPUTING_UNIT_HOST_PROCESSOR (EFI_COMPUTING_UNIT | 0x00010000) +#define EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR (EFI_COMPUTING_UNIT | 0x00020000) +#define EFI_COMPUTING_UNIT_IO_PROCESSOR (EFI_COMPUTING_UNIT | 0x00030000) +#define EFI_COMPUTING_UNIT_CACHE (EFI_COMPUTING_UNIT | 0x00040000) +#define EFI_COMPUTING_UNIT_MEMORY (EFI_COMPUTING_UNIT | 0x00050000) +#define EFI_COMPUTING_UNIT_CHIPSET (EFI_COMPUTING_UNIT | 0x00060000) +///@} + +/// +/// Computing Unit Class Progress Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_CU_PC_INIT_BEGIN 0x00000000 +#define EFI_CU_PC_INIT_END 0x00000001 +///@} + +// +// Computing Unit Unspecified Subclass Progress Code definitions. +// + +/// +/// Computing Unit Host Processor Subclass Progress Code definitions. +///@{ +#define EFI_CU_HP_PC_POWER_ON_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CU_HP_PC_CACHE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_CU_HP_PC_RAM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_CU_HP_PC_MEMORY_CONTROLLER_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_CU_HP_PC_IO_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_CU_HP_PC_BSP_SELECT (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_CU_HP_PC_BSP_RESELECT (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_CU_HP_PC_AP_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000007) +#define EFI_CU_HP_PC_SMM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000008) +///@} + +// +// Computing Unit Firmware Processor Subclass Progress Code definitions. +// + +// +// Computing Unit IO Processor Subclass Progress Code definitions. +// + +/// +/// Computing Unit Cache Subclass Progress Code definitions. +/// +///@{ +#define EFI_CU_CACHE_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CU_CACHE_PC_CONFIGURATION (EFI_SUBCLASS_SPECIFIC | 0x00000001) +///@} + +/// +/// Computing Unit Memory Subclass Progress Code definitions. +/// +///@{ +#define EFI_CU_MEMORY_PC_SPD_READ (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CU_MEMORY_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_CU_MEMORY_PC_TIMING (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_CU_MEMORY_PC_CONFIGURING (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_CU_MEMORY_PC_OPTIMIZING (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_CU_MEMORY_PC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_CU_MEMORY_PC_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000006) +///@} + +// +// Computing Unit Chipset Subclass Progress Code definitions. +// + +/// +/// South Bridge initialization prior to memory detection. +/// +#define EFI_CHIPSET_PC_PEI_CAR_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000000) + +/// +/// North Bridge initialization prior to memory detection. +/// +#define EFI_CHIPSET_PC_PEI_CAR_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000001) + +/// +/// South Bridge initialization after memory detection. +/// +#define EFI_CHIPSET_PC_PEI_MEM_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000002) + +/// +/// North Bridge initialization after memory detection. +/// +#define EFI_CHIPSET_PC_PEI_MEM_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000003) + +/// +/// PCI Host Bridge DXE initialization. +/// +#define EFI_CHIPSET_PC_DXE_HB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000004) + +/// +/// North Bridge DXE initialization. +/// +#define EFI_CHIPSET_PC_DXE_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000005) + +/// +/// North Bridge specific SMM initialization in DXE. +/// +#define EFI_CHIPSET_PC_DXE_NB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000006) + +/// +/// Initialization of the South Bridge specific UEFI Runtime Services. +/// +#define EFI_CHIPSET_PC_DXE_SB_RT_INIT (EFI_SUBCLASS_SPECIFIC|0x00000007) + +/// +/// South Bridge DXE initialization +/// +#define EFI_CHIPSET_PC_DXE_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000008) + +/// +/// South Bridge specific SMM initialization in DXE. +/// +#define EFI_CHIPSET_PC_DXE_SB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000009) + +/// +/// Initialization of the South Bridge devices. +/// +#define EFI_CHIPSET_PC_DXE_SB_DEVICES_INIT (EFI_SUBCLASS_SPECIFIC|0x0000000a) + +/// +/// Computing Unit Class Error Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_CU_EC_NON_SPECIFIC 0x00000000 +#define EFI_CU_EC_DISABLED 0x00000001 +#define EFI_CU_EC_NOT_SUPPORTED 0x00000002 +#define EFI_CU_EC_NOT_DETECTED 0x00000003 +#define EFI_CU_EC_NOT_CONFIGURED 0x00000004 +///@} + +// +// Computing Unit Unspecified Subclass Error Code definitions. +// + +/// +/// Computing Unit Host Processor Subclass Error Code definitions. +/// +///@{ +#define EFI_CU_HP_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CU_HP_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_CU_HP_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_CU_HP_EC_TIMER_EXPIRED (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_CU_HP_EC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_CU_HP_EC_INTERNAL (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_CU_HP_EC_THERMAL (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_CU_HP_EC_LOW_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000007) +#define EFI_CU_HP_EC_HIGH_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000008) +#define EFI_CU_HP_EC_CACHE (EFI_SUBCLASS_SPECIFIC | 0x00000009) +#define EFI_CU_HP_EC_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000A) +#define EFI_CU_HP_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000B) +#define EFI_CU_HP_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000C) +#define EFI_CU_HP_EC_NO_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000D) +///@} + +/// +/// Computing Unit Firmware Processor Subclass Error Code definitions. +/// +///@{ +#define EFI_CU_FP_EC_HARD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CU_FP_EC_SOFT_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_CU_FP_EC_COMM_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002) +///@} + +// +// Computing Unit IO Processor Subclass Error Code definitions. +// + +/// +/// Computing Unit Cache Subclass Error Code definitions. +/// +///@{ +#define EFI_CU_CACHE_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CU_CACHE_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_CU_CACHE_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_CU_CACHE_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000003) +///@} + +/// +/// Computing Unit Memory Subclass Error Code definitions. +/// +///@{ +#define EFI_CU_MEMORY_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CU_MEMORY_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_CU_MEMORY_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_CU_MEMORY_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_CU_MEMORY_EC_SPD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_CU_MEMORY_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_CU_MEMORY_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_CU_MEMORY_EC_S3_RESUME_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000007) +#define EFI_CU_MEMORY_EC_UPDATE_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000008) +#define EFI_CU_MEMORY_EC_NONE_DETECTED (EFI_SUBCLASS_SPECIFIC | 0x00000009) +#define EFI_CU_MEMORY_EC_NONE_USEFUL (EFI_SUBCLASS_SPECIFIC | 0x0000000A) +///@} + +/// +/// Computing Unit Chipset Subclass Error Code definitions. +/// +///@{ +#define EFI_CHIPSET_EC_BAD_BATTERY (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_CHIPSET_EC_DXE_NB_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_CHIPSET_EC_DXE_SB_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002) +///@} + +/// +/// Peripheral Subclass definitions. +/// Values of 12-127 are reserved for future use by this specification. +/// Values of 128-255 are reserved for OEM use. +/// +///@{ +#define EFI_PERIPHERAL_UNSPECIFIED (EFI_PERIPHERAL | 0x00000000) +#define EFI_PERIPHERAL_KEYBOARD (EFI_PERIPHERAL | 0x00010000) +#define EFI_PERIPHERAL_MOUSE (EFI_PERIPHERAL | 0x00020000) +#define EFI_PERIPHERAL_LOCAL_CONSOLE (EFI_PERIPHERAL | 0x00030000) +#define EFI_PERIPHERAL_REMOTE_CONSOLE (EFI_PERIPHERAL | 0x00040000) +#define EFI_PERIPHERAL_SERIAL_PORT (EFI_PERIPHERAL | 0x00050000) +#define EFI_PERIPHERAL_PARALLEL_PORT (EFI_PERIPHERAL | 0x00060000) +#define EFI_PERIPHERAL_FIXED_MEDIA (EFI_PERIPHERAL | 0x00070000) +#define EFI_PERIPHERAL_REMOVABLE_MEDIA (EFI_PERIPHERAL | 0x00080000) +#define EFI_PERIPHERAL_AUDIO_INPUT (EFI_PERIPHERAL | 0x00090000) +#define EFI_PERIPHERAL_AUDIO_OUTPUT (EFI_PERIPHERAL | 0x000A0000) +#define EFI_PERIPHERAL_LCD_DEVICE (EFI_PERIPHERAL | 0x000B0000) +#define EFI_PERIPHERAL_NETWORK (EFI_PERIPHERAL | 0x000C0000) +///@} + +/// +/// Peripheral Class Progress Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_P_PC_INIT 0x00000000 +#define EFI_P_PC_RESET 0x00000001 +#define EFI_P_PC_DISABLE 0x00000002 +#define EFI_P_PC_PRESENCE_DETECT 0x00000003 +#define EFI_P_PC_ENABLE 0x00000004 +#define EFI_P_PC_RECONFIG 0x00000005 +#define EFI_P_PC_DETECTED 0x00000006 +///@} + +// +// Peripheral Class Unspecified Subclass Progress Code definitions. +// + +/// +/// Peripheral Class Keyboard Subclass Progress Code definitions. +/// +///@{ +#define EFI_P_KEYBOARD_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_KEYBOARD_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000001) +///@} + +/// +/// Peripheral Class Mouse Subclass Progress Code definitions. +/// +///@{ +#define EFI_P_MOUSE_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000000) +///@} + +// +// Peripheral Class Local Console Subclass Progress Code definitions. +// + +// +// Peripheral Class Remote Console Subclass Progress Code definitions. +// + +/// +/// Peripheral Class Serial Port Subclass Progress Code definitions. +/// +///@{ +#define EFI_P_SERIAL_PORT_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000) +///@} + +// +// Peripheral Class Parallel Port Subclass Progress Code definitions. +// + +// +// Peripheral Class Fixed Media Subclass Progress Code definitions. +// + +// +// Peripheral Class Removable Media Subclass Progress Code definitions. +// + +// +// Peripheral Class Audio Input Subclass Progress Code definitions. +// + +// +// Peripheral Class Audio Output Subclass Progress Code definitions. +// + +// +// Peripheral Class LCD Device Subclass Progress Code definitions. +// + +// +// Peripheral Class Network Subclass Progress Code definitions. +// + +/// +/// Peripheral Class Error Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_P_EC_NON_SPECIFIC 0x00000000 +#define EFI_P_EC_DISABLED 0x00000001 +#define EFI_P_EC_NOT_SUPPORTED 0x00000002 +#define EFI_P_EC_NOT_DETECTED 0x00000003 +#define EFI_P_EC_NOT_CONFIGURED 0x00000004 +#define EFI_P_EC_INTERFACE_ERROR 0x00000005 +#define EFI_P_EC_CONTROLLER_ERROR 0x00000006 +#define EFI_P_EC_INPUT_ERROR 0x00000007 +#define EFI_P_EC_OUTPUT_ERROR 0x00000008 +#define EFI_P_EC_RESOURCE_CONFLICT 0x00000009 +///@} + +// +// Peripheral Class Unspecified Subclass Error Code definitions. +// + +/// +/// Peripheral Class Keyboard Subclass Error Code definitions. +/// +///@{ +#define EFI_P_KEYBOARD_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_KEYBOARD_EC_STUCK_KEY (EFI_SUBCLASS_SPECIFIC | 0x00000001) +///@} + +/// +/// Peripheral Class Mouse Subclass Error Code definitions. +/// +///@{ +#define EFI_P_MOUSE_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000) +///@} + +// +// Peripheral Class Local Console Subclass Error Code definitions. +// + +// +// Peripheral Class Remote Console Subclass Error Code definitions. +// + +// +// Peripheral Class Serial Port Subclass Error Code definitions. +// + +// +// Peripheral Class Parallel Port Subclass Error Code definitions. +// + +// +// Peripheral Class Fixed Media Subclass Error Code definitions. +// + +// +// Peripheral Class Removable Media Subclass Error Code definitions. +// + +// +// Peripheral Class Audio Input Subclass Error Code definitions. +// + +// +// Peripheral Class Audio Output Subclass Error Code definitions. +// + +// +// Peripheral Class LCD Device Subclass Error Code definitions. +// + +// +// Peripheral Class Network Subclass Error Code definitions. +// + +/// +/// IO Bus Subclass definitions. +/// Values of 14-127 are reserved for future use by this specification. +/// Values of 128-255 are reserved for OEM use. +/// +///@{ +#define EFI_IO_BUS_UNSPECIFIED (EFI_IO_BUS | 0x00000000) +#define EFI_IO_BUS_PCI (EFI_IO_BUS | 0x00010000) +#define EFI_IO_BUS_USB (EFI_IO_BUS | 0x00020000) +#define EFI_IO_BUS_IBA (EFI_IO_BUS | 0x00030000) +#define EFI_IO_BUS_AGP (EFI_IO_BUS | 0x00040000) +#define EFI_IO_BUS_PC_CARD (EFI_IO_BUS | 0x00050000) +#define EFI_IO_BUS_LPC (EFI_IO_BUS | 0x00060000) +#define EFI_IO_BUS_SCSI (EFI_IO_BUS | 0x00070000) +#define EFI_IO_BUS_ATA_ATAPI (EFI_IO_BUS | 0x00080000) +#define EFI_IO_BUS_FC (EFI_IO_BUS | 0x00090000) +#define EFI_IO_BUS_IP_NETWORK (EFI_IO_BUS | 0x000A0000) +#define EFI_IO_BUS_SMBUS (EFI_IO_BUS | 0x000B0000) +#define EFI_IO_BUS_I2C (EFI_IO_BUS | 0x000C0000) +///@} + +/// +/// IO Bus Class Progress Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_IOB_PC_INIT 0x00000000 +#define EFI_IOB_PC_RESET 0x00000001 +#define EFI_IOB_PC_DISABLE 0x00000002 +#define EFI_IOB_PC_DETECT 0x00000003 +#define EFI_IOB_PC_ENABLE 0x00000004 +#define EFI_IOB_PC_RECONFIG 0x00000005 +#define EFI_IOB_PC_HOTPLUG 0x00000006 +///@} + +// +// IO Bus Class Unspecified Subclass Progress Code definitions. +// + +/// +/// IO Bus Class PCI Subclass Progress Code definitions. +/// +///@{ +#define EFI_IOB_PCI_BUS_ENUM (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_IOB_PCI_RES_ALLOC (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_IOB_PCI_HPC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002) +///@} + +// +// IO Bus Class USB Subclass Progress Code definitions. +// + +// +// IO Bus Class IBA Subclass Progress Code definitions. +// + +// +// IO Bus Class AGP Subclass Progress Code definitions. +// + +// +// IO Bus Class PC Card Subclass Progress Code definitions. +// + +// +// IO Bus Class LPC Subclass Progress Code definitions. +// + +// +// IO Bus Class SCSI Subclass Progress Code definitions. +// + +// +// IO Bus Class ATA/ATAPI Subclass Progress Code definitions. +// +#define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003) +// +// IO Bus Class FC Subclass Progress Code definitions. +// + +// +// IO Bus Class IP Network Subclass Progress Code definitions. +// + +// +// IO Bus Class SMBUS Subclass Progress Code definitions. +// + +// +// IO Bus Class I2C Subclass Progress Code definitions. +// + +/// +/// IO Bus Class Error Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_IOB_EC_NON_SPECIFIC 0x00000000 +#define EFI_IOB_EC_DISABLED 0x00000001 +#define EFI_IOB_EC_NOT_SUPPORTED 0x00000002 +#define EFI_IOB_EC_NOT_DETECTED 0x00000003 +#define EFI_IOB_EC_NOT_CONFIGURED 0x00000004 +#define EFI_IOB_EC_INTERFACE_ERROR 0x00000005 +#define EFI_IOB_EC_CONTROLLER_ERROR 0x00000006 +#define EFI_IOB_EC_READ_ERROR 0x00000007 +#define EFI_IOB_EC_WRITE_ERROR 0x00000008 +#define EFI_IOB_EC_RESOURCE_CONFLICT 0x00000009 +///@} + +// +// IO Bus Class Unspecified Subclass Error Code definitions. +// + +/// +/// IO Bus Class PCI Subclass Error Code definitions. +/// +///@{ +#define EFI_IOB_PCI_EC_PERR (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_IOB_PCI_EC_SERR (EFI_SUBCLASS_SPECIFIC | 0x00000001) +///@} + +// +// IO Bus Class USB Subclass Error Code definitions. +// + +// +// IO Bus Class IBA Subclass Error Code definitions. +// + +// +// IO Bus Class AGP Subclass Error Code definitions. +// + +// +// IO Bus Class PC Card Subclass Error Code definitions. +// + +// +// IO Bus Class LPC Subclass Error Code definitions. +// + +// +// IO Bus Class SCSI Subclass Error Code definitions. +// + +// +// IO Bus Class ATA/ATAPI Subclass Error Code definitions. +// +#define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001) + +// +// IO Bus Class FC Subclass Error Code definitions. +// + +// +// IO Bus Class IP Network Subclass Error Code definitions. +// + +// +// IO Bus Class SMBUS Subclass Error Code definitions. +// + +// +// IO Bus Class I2C Subclass Error Code definitions. +// + +/// +/// Software Subclass definitions. +/// Values of 14-127 are reserved for future use by this specification. +/// Values of 128-255 are reserved for OEM use. +/// +///@{ +#define EFI_SOFTWARE_UNSPECIFIED (EFI_SOFTWARE | 0x00000000) +#define EFI_SOFTWARE_SEC (EFI_SOFTWARE | 0x00010000) +#define EFI_SOFTWARE_PEI_CORE (EFI_SOFTWARE | 0x00020000) +#define EFI_SOFTWARE_PEI_MODULE (EFI_SOFTWARE | 0x00030000) +#define EFI_SOFTWARE_DXE_CORE (EFI_SOFTWARE | 0x00040000) +#define EFI_SOFTWARE_DXE_BS_DRIVER (EFI_SOFTWARE | 0x00050000) +#define EFI_SOFTWARE_DXE_RT_DRIVER (EFI_SOFTWARE | 0x00060000) +#define EFI_SOFTWARE_SMM_DRIVER (EFI_SOFTWARE | 0x00070000) +#define EFI_SOFTWARE_EFI_APPLICATION (EFI_SOFTWARE | 0x00080000) +#define EFI_SOFTWARE_EFI_OS_LOADER (EFI_SOFTWARE | 0x00090000) +#define EFI_SOFTWARE_RT (EFI_SOFTWARE | 0x000A0000) +#define EFI_SOFTWARE_AL (EFI_SOFTWARE | 0x000B0000) +#define EFI_SOFTWARE_EBC_EXCEPTION (EFI_SOFTWARE | 0x000C0000) +#define EFI_SOFTWARE_IA32_EXCEPTION (EFI_SOFTWARE | 0x000D0000) +#define EFI_SOFTWARE_IPF_EXCEPTION (EFI_SOFTWARE | 0x000E0000) +#define EFI_SOFTWARE_PEI_SERVICE (EFI_SOFTWARE | 0x000F0000) +#define EFI_SOFTWARE_EFI_BOOT_SERVICE (EFI_SOFTWARE | 0x00100000) +#define EFI_SOFTWARE_EFI_RUNTIME_SERVICE (EFI_SOFTWARE | 0x00110000) +#define EFI_SOFTWARE_EFI_DXE_SERVICE (EFI_SOFTWARE | 0x00120000) +#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000) +#define EFI_SOFTWARE_ARM_EXCEPTION (EFI_SOFTWARE | 0x00140000) + +///@} + +/// +/// Software Class Progress Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_SW_PC_INIT 0x00000000 +#define EFI_SW_PC_LOAD 0x00000001 +#define EFI_SW_PC_INIT_BEGIN 0x00000002 +#define EFI_SW_PC_INIT_END 0x00000003 +#define EFI_SW_PC_AUTHENTICATE_BEGIN 0x00000004 +#define EFI_SW_PC_AUTHENTICATE_END 0x00000005 +#define EFI_SW_PC_INPUT_WAIT 0x00000006 +#define EFI_SW_PC_USER_SETUP 0x00000007 +///@} + +// +// Software Class Unspecified Subclass Progress Code definitions. +// + +/// +/// Software Class SEC Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_SEC_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_SEC_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001) +///@} + +/// +/// Software Class PEI Core Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_PEI_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_PEI_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_PEI_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002) +///@} + +/// +/// Software Class PEI Module Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_PEI_PC_RECOVERY_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_PEI_PC_CAPSULE_LOAD (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_PEI_PC_CAPSULE_START (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_PEI_PC_RECOVERY_USER (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_PEI_PC_RECOVERY_AUTO (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_SW_PEI_PC_S3_BOOT_SCRIPT (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_SW_PEI_PC_OS_WAKE (EFI_SUBCLASS_SPECIFIC | 0x00000006) +///@} + +/// +/// Software Class DXE Core Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_DXE_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_DXE_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_DXE_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_DXE_CORE_PC_START_DRIVER (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_DXE_CORE_PC_ARCH_READY (EFI_SUBCLASS_SPECIFIC | 0x00000004) +///@} + +/// +/// Software Class DXE BS Driver Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000004) +///@} + +// +// Software Class SMM Driver Subclass Progress Code definitions. +// + +// +// Software Class EFI Application Subclass Progress Code definitions. +// + +// +// Software Class EFI OS Loader Subclass Progress Code definitions. +// + +/// +/// Software Class EFI RT Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_RT_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_RT_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_RT_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002) +///@} + +// +// Software Class X64 Exception Subclass Progress Code definitions. +// + +// +// Software Class ARM Exception Subclass Progress Code definitions. +// + +// +// Software Class EBC Exception Subclass Progress Code definitions. +// + +// +// Software Class IA32 Exception Subclass Progress Code definitions. +// + +// +// Software Class X64 Exception Subclass Progress Code definitions. +// + +// +// Software Class IPF Exception Subclass Progress Code definitions. +// + +/// +/// Software Class PEI Services Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_PS_PC_INSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_PS_PC_REINSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_PS_PC_LOCATE_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_PS_PC_NOTIFY_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_PS_PC_GET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_SW_PS_PC_SET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_SW_PS_PC_GET_HOB_LIST (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_SW_PS_PC_CREATE_HOB (EFI_SUBCLASS_SPECIFIC | 0x00000007) +#define EFI_SW_PS_PC_FFS_FIND_NEXT_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000008) +#define EFI_SW_PS_PC_FFS_FIND_NEXT_FILE (EFI_SUBCLASS_SPECIFIC | 0x00000009) +#define EFI_SW_PS_PC_FFS_FIND_SECTION_DATA (EFI_SUBCLASS_SPECIFIC | 0x0000000A) +#define EFI_SW_PS_PC_INSTALL_PEI_MEMORY (EFI_SUBCLASS_SPECIFIC | 0x0000000B) +#define EFI_SW_PS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x0000000C) +#define EFI_SW_PS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x0000000D) +#define EFI_SW_PS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000E) +#define EFI_SW_PS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000F) +#define EFI_SW_PS_PC_RESET_SYSTEM (EFI_SUBCLASS_SPECIFIC | 0x00000010) +#define EFI_SW_PS_PC_FFS_FIND_FILE_BY_NAME (EFI_SUBCLASS_SPECIFIC | 0x00000013) +#define EFI_SW_PS_PC_FFS_GET_FILE_INFO (EFI_SUBCLASS_SPECIFIC | 0x00000014) +#define EFI_SW_PS_PC_FFS_GET_VOLUME_INFO (EFI_SUBCLASS_SPECIFIC | 0x00000015) +#define EFI_SW_PS_PC_FFS_REGISTER_FOR_SHADOW (EFI_SUBCLASS_SPECIFIC | 0x00000016) +///@} + +/// +/// Software Class EFI Boot Services Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_BS_PC_RAISE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_BS_PC_RESTORE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_BS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_BS_PC_FREE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_BS_PC_GET_MEMORY_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_SW_BS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_SW_BS_PC_FREE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_SW_BS_PC_CREATE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000007) +#define EFI_SW_BS_PC_SET_TIMER (EFI_SUBCLASS_SPECIFIC | 0x00000008) +#define EFI_SW_BS_PC_WAIT_FOR_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000009) +#define EFI_SW_BS_PC_SIGNAL_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000A) +#define EFI_SW_BS_PC_CLOSE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000B) +#define EFI_SW_BS_PC_CHECK_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000C) +#define EFI_SW_BS_PC_INSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000D) +#define EFI_SW_BS_PC_REINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000E) +#define EFI_SW_BS_PC_UNINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000F) +#define EFI_SW_BS_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000010) +#define EFI_SW_BS_PC_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000011) +#define EFI_SW_BS_PC_REGISTER_PROTOCOL_NOTIFY (EFI_SUBCLASS_SPECIFIC | 0x00000012) +#define EFI_SW_BS_PC_LOCATE_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000013) +#define EFI_SW_BS_PC_INSTALL_CONFIGURATION_TABLE (EFI_SUBCLASS_SPECIFIC | 0x00000014) +#define EFI_SW_BS_PC_LOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000015) +#define EFI_SW_BS_PC_START_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000016) +#define EFI_SW_BS_PC_EXIT (EFI_SUBCLASS_SPECIFIC | 0x00000017) +#define EFI_SW_BS_PC_UNLOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000018) +#define EFI_SW_BS_PC_EXIT_BOOT_SERVICES (EFI_SUBCLASS_SPECIFIC | 0x00000019) +#define EFI_SW_BS_PC_GET_NEXT_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x0000001A) +#define EFI_SW_BS_PC_STALL (EFI_SUBCLASS_SPECIFIC | 0x0000001B) +#define EFI_SW_BS_PC_SET_WATCHDOG_TIMER (EFI_SUBCLASS_SPECIFIC | 0x0000001C) +#define EFI_SW_BS_PC_CONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001D) +#define EFI_SW_BS_PC_DISCONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001E) +#define EFI_SW_BS_PC_OPEN_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x0000001F) +#define EFI_SW_BS_PC_CLOSE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000020) +#define EFI_SW_BS_PC_OPEN_PROTOCOL_INFORMATION (EFI_SUBCLASS_SPECIFIC | 0x00000021) +#define EFI_SW_BS_PC_PROTOCOLS_PER_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000022) +#define EFI_SW_BS_PC_LOCATE_HANDLE_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000023) +#define EFI_SW_BS_PC_LOCATE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000024) +#define EFI_SW_BS_PC_INSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000025) +#define EFI_SW_BS_PC_UNINSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000026) +#define EFI_SW_BS_PC_CALCULATE_CRC_32 (EFI_SUBCLASS_SPECIFIC | 0x00000027) +#define EFI_SW_BS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000028) +#define EFI_SW_BS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000029) +#define EFI_SW_BS_PC_CREATE_EVENT_EX (EFI_SUBCLASS_SPECIFIC | 0x0000002A) +///@} + +/// +/// Software Class EFI Runtime Services Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_RS_PC_GET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_RS_PC_SET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_RS_PC_GET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_RS_PC_SET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_RS_PC_SET_VIRTUAL_ADDRESS_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_SW_RS_PC_CONVERT_POINTER (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_SW_RS_PC_GET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_SW_RS_PC_GET_NEXT_VARIABLE_NAME (EFI_SUBCLASS_SPECIFIC | 0x00000007) +#define EFI_SW_RS_PC_SET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000008) +#define EFI_SW_RS_PC_GET_NEXT_HIGH_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x00000009) +#define EFI_SW_RS_PC_RESET_SYSTEM (EFI_SUBCLASS_SPECIFIC | 0x0000000A) +#define EFI_SW_RS_PC_UPDATE_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x0000000B) +#define EFI_SW_RS_PC_QUERY_CAPSULE_CAPABILITIES (EFI_SUBCLASS_SPECIFIC | 0x0000000C) +#define EFI_SW_RS_PC_QUERY_VARIABLE_INFO (EFI_SUBCLASS_SPECIFIC | 0x0000000D) +///@} + +/// +/// Software Class EFI DXE Services Subclass Progress Code definitions +/// +///@{ +#define EFI_SW_DS_PC_ADD_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_DS_PC_ALLOCATE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_DS_PC_FREE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_DS_PC_REMOVE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_DS_PC_GET_MEMORY_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_SW_DS_PC_SET_MEMORY_SPACE_ATTRIBUTES (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_SW_DS_PC_GET_MEMORY_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_SW_DS_PC_ADD_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000007) +#define EFI_SW_DS_PC_ALLOCATE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000008) +#define EFI_SW_DS_PC_FREE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000009) +#define EFI_SW_DS_PC_REMOVE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x0000000A) +#define EFI_SW_DS_PC_GET_IO_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x0000000B) +#define EFI_SW_DS_PC_GET_IO_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x0000000C) +#define EFI_SW_DS_PC_DISPATCH (EFI_SUBCLASS_SPECIFIC | 0x0000000D) +#define EFI_SW_DS_PC_SCHEDULE (EFI_SUBCLASS_SPECIFIC | 0x0000000E) +#define EFI_SW_DS_PC_TRUST (EFI_SUBCLASS_SPECIFIC | 0x0000000F) +#define EFI_SW_DS_PC_PROCESS_FIRMWARE_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000010) +///@} + +/// +/// Software Class Error Code definitions. +/// These are shared by all subclasses. +/// +///@{ +#define EFI_SW_EC_NON_SPECIFIC 0x00000000 +#define EFI_SW_EC_LOAD_ERROR 0x00000001 +#define EFI_SW_EC_INVALID_PARAMETER 0x00000002 +#define EFI_SW_EC_UNSUPPORTED 0x00000003 +#define EFI_SW_EC_INVALID_BUFFER 0x00000004 +#define EFI_SW_EC_OUT_OF_RESOURCES 0x00000005 +#define EFI_SW_EC_ABORTED 0x00000006 +#define EFI_SW_EC_ILLEGAL_SOFTWARE_STATE 0x00000007 +#define EFI_SW_EC_ILLEGAL_HARDWARE_STATE 0x00000008 +#define EFI_SW_EC_START_ERROR 0x00000009 +#define EFI_SW_EC_BAD_DATE_TIME 0x0000000A +#define EFI_SW_EC_CFG_INVALID 0x0000000B +#define EFI_SW_EC_CFG_CLR_REQUEST 0x0000000C +#define EFI_SW_EC_CFG_DEFAULT 0x0000000D +#define EFI_SW_EC_PWD_INVALID 0x0000000E +#define EFI_SW_EC_PWD_CLR_REQUEST 0x0000000F +#define EFI_SW_EC_PWD_CLEARED 0x00000010 +#define EFI_SW_EC_EVENT_LOG_FULL 0x00000011 +///@} + +// +// Software Class Unspecified Subclass Error Code definitions. +// + +// +// Software Class SEC Subclass Error Code definitions. +// + +/// +/// Software Class PEI Core Subclass Error Code definitions. +/// +///@{ +#define EFI_SW_PEI_CORE_EC_DXE_CORRUPT (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_PEI_CORE_EC_DXEIPL_NOT_FOUND (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_PEI_CORE_EC_MEMORY_NOT_INSTALLED (EFI_SUBCLASS_SPECIFIC | 0x00000002) +///@} + +/// +/// Software Class PEI Module Subclass Error Code definitions. +/// +///@{ +#define EFI_SW_PEI_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_PEI_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_PEI_EC_S3_RESUME_PPI_NOT_FOUND (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_PEI_EC_S3_OS_WAKE_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_SW_PEI_EC_S3_RESUME_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_SW_PEI_EC_RECOVERY_PPI_NOT_FOUND (EFI_SUBCLASS_SPECIFIC | 0x00000006) +#define EFI_SW_PEI_EC_RECOVERY_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000007) +///@} + +/// +/// Software Class DXE Foundation Subclass Error Code definitions. +/// +///@{ +#define EFI_SW_DXE_CORE_EC_NO_ARCH (EFI_SUBCLASS_SPECIFIC | 0x00000000) +///@} + + +/// +/// Software Class DXE Boot Service Driver Subclass Error Code definitions. +/// +///@{ +#define EFI_SW_DXE_BS_EC_LEGACY_OPROM_NO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_DXE_BS_EC_INVALID_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_DXE_BS_EC_BOOT_OPTION_LOAD_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_DXE_BS_EC_BOOT_OPTION_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_DXE_BS_EC_INVALID_IDE_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000004) +///@} + +// +// Software Class DXE Runtime Service Driver Subclass Error Code definitions. +// + +// +// Software Class SMM Driver Subclass Error Code definitions. +// + +// +// Software Class EFI Application Subclass Error Code definitions. +// + +// +// Software Class EFI OS Loader Subclass Error Code definitions. +// + +// +// Software Class EFI RT Subclass Error Code definitions. +// + +// +// Software Class EFI AL Subclass Error Code definitions. +// + +/// +/// Software Class EBC Exception Subclass Error Code definitions. +/// These exceptions are derived from the debug protocol definitions in the EFI +/// specification. +/// +///@{ +#define EFI_SW_EC_EBC_UNDEFINED 0x00000000 +#define EFI_SW_EC_EBC_DIVIDE_ERROR EXCEPT_EBC_DIVIDE_ERROR +#define EFI_SW_EC_EBC_DEBUG EXCEPT_EBC_DEBUG +#define EFI_SW_EC_EBC_BREAKPOINT EXCEPT_EBC_BREAKPOINT +#define EFI_SW_EC_EBC_OVERFLOW EXCEPT_EBC_OVERFLOW +#define EFI_SW_EC_EBC_INVALID_OPCODE EXCEPT_EBC_INVALID_OPCODE +#define EFI_SW_EC_EBC_STACK_FAULT EXCEPT_EBC_STACK_FAULT +#define EFI_SW_EC_EBC_ALIGNMENT_CHECK EXCEPT_EBC_ALIGNMENT_CHECK +#define EFI_SW_EC_EBC_INSTRUCTION_ENCODING EXCEPT_EBC_INSTRUCTION_ENCODING +#define EFI_SW_EC_EBC_BAD_BREAK EXCEPT_EBC_BAD_BREAK +#define EFI_SW_EC_EBC_STEP EXCEPT_EBC_STEP +///@} + +/// +/// Software Class IA32 Exception Subclass Error Code definitions. +/// These exceptions are derived from the debug protocol definitions in the EFI +/// specification. +/// +///@{ +#define EFI_SW_EC_IA32_DIVIDE_ERROR EXCEPT_IA32_DIVIDE_ERROR +#define EFI_SW_EC_IA32_DEBUG EXCEPT_IA32_DEBUG +#define EFI_SW_EC_IA32_NMI EXCEPT_IA32_NMI +#define EFI_SW_EC_IA32_BREAKPOINT EXCEPT_IA32_BREAKPOINT +#define EFI_SW_EC_IA32_OVERFLOW EXCEPT_IA32_OVERFLOW +#define EFI_SW_EC_IA32_BOUND EXCEPT_IA32_BOUND +#define EFI_SW_EC_IA32_INVALID_OPCODE EXCEPT_IA32_INVALID_OPCODE +#define EFI_SW_EC_IA32_DOUBLE_FAULT EXCEPT_IA32_DOUBLE_FAULT +#define EFI_SW_EC_IA32_INVALID_TSS EXCEPT_IA32_INVALID_TSS +#define EFI_SW_EC_IA32_SEG_NOT_PRESENT EXCEPT_IA32_SEG_NOT_PRESENT +#define EFI_SW_EC_IA32_STACK_FAULT EXCEPT_IA32_STACK_FAULT +#define EFI_SW_EC_IA32_GP_FAULT EXCEPT_IA32_GP_FAULT +#define EFI_SW_EC_IA32_PAGE_FAULT EXCEPT_IA32_PAGE_FAULT +#define EFI_SW_EC_IA32_FP_ERROR EXCEPT_IA32_FP_ERROR +#define EFI_SW_EC_IA32_ALIGNMENT_CHECK EXCEPT_IA32_ALIGNMENT_CHECK +#define EFI_SW_EC_IA32_MACHINE_CHECK EXCEPT_IA32_MACHINE_CHECK +#define EFI_SW_EC_IA32_SIMD EXCEPT_IA32_SIMD +///@} + +/// +/// Software Class IPF Exception Subclass Error Code definitions. +/// These exceptions are derived from the debug protocol definitions in the EFI +/// specification. +/// +///@{ +#define EFI_SW_EC_IPF_ALT_DTLB EXCEPT_IPF_ALT_DTLB +#define EFI_SW_EC_IPF_DNESTED_TLB EXCEPT_IPF_DNESTED_TLB +#define EFI_SW_EC_IPF_BREAKPOINT EXCEPT_IPF_BREAKPOINT +#define EFI_SW_EC_IPF_EXTERNAL_INTERRUPT EXCEPT_IPF_EXTERNAL_INTERRUPT +#define EFI_SW_EC_IPF_GEN_EXCEPT EXCEPT_IPF_GEN_EXCEPT +#define EFI_SW_EC_IPF_NAT_CONSUMPTION EXCEPT_IPF_NAT_CONSUMPTION +#define EFI_SW_EC_IPF_DEBUG_EXCEPT EXCEPT_IPF_DEBUG_EXCEPT +#define EFI_SW_EC_IPF_UNALIGNED_ACCESS EXCEPT_IPF_UNALIGNED_ACCESS +#define EFI_SW_EC_IPF_FP_FAULT EXCEPT_IPF_FP_FAULT +#define EFI_SW_EC_IPF_FP_TRAP EXCEPT_IPF_FP_TRAP +#define EFI_SW_EC_IPF_TAKEN_BRANCH EXCEPT_IPF_TAKEN_BRANCH +#define EFI_SW_EC_IPF_SINGLE_STEP EXCEPT_IPF_SINGLE_STEP +///@} + +/// +/// Software Class PEI Service Subclass Error Code definitions. +/// +///@{ +#define EFI_SW_PS_EC_RESET_NOT_AVAILABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_PS_EC_MEMORY_INSTALLED_TWICE (EFI_SUBCLASS_SPECIFIC | 0x00000001) +///@} + +// +// Software Class EFI Boot Service Subclass Error Code definitions. +// + +// +// Software Class EFI Runtime Service Subclass Error Code definitions. +// + +/// +/// Software Class EFI DXE Service Subclass Error Code definitions. +/// +///@{ +#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005) +#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006) +///@} + +/// +/// Software Class DXE RT Driver Subclass Progress Code definitions. +/// +///@{ +#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003) +#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004) +#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005) +///@} + +/// +/// Software Class X64 Exception Subclass Error Code definitions. +/// These exceptions are derived from the debug protocol +/// definitions in the EFI specification. +/// +///@{ +#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR +#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG +#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI +#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT +#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW +#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND +#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE +#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT +#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS +#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT +#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT +#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT +#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT +#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR +#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK +#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK +#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD +///@} + +/// +/// Software Class ARM Exception Subclass Error Code definitions. +/// These exceptions are derived from the debug protocol +/// definitions in the EFI specification. +/// +///@{ +#define EFI_SW_EC_ARM_RESET EXCEPT_ARM_RESET +#define EFI_SW_EC_ARM_UNDEFINED_INSTRUCTION EXCEPT_ARM_UNDEFINED_INSTRUCTION +#define EFI_SW_EC_ARM_SOFTWARE_INTERRUPT EXCEPT_ARM_SOFTWARE_INTERRUPT +#define EFI_SW_EC_ARM_PREFETCH_ABORT EXCEPT_ARM_PREFETCH_ABORT +#define EFI_SW_EC_ARM_DATA_ABORT EXCEPT_ARM_DATA_ABORT +#define EFI_SW_EC_ARM_RESERVED EXCEPT_ARM_RESERVED +#define EFI_SW_EC_ARM_IRQ EXCEPT_ARM_IRQ +#define EFI_SW_EC_ARM_FIQ EXCEPT_ARM_FIQ +///@} + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/PiDxe.h b/qemu/roms/ipxe/src/include/ipxe/efi/PiDxe.h new file mode 100644 index 000000000..94433680d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/PiDxe.h @@ -0,0 +1,27 @@ +/** @file + + Root include file for Mde Package DXE_CORE, DXE, RUNTIME, SMM, SAL type modules. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PI_DXE_H__ +#define __PI_DXE_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Uefi/UefiBaseType.h> +#include <ipxe/efi/Uefi/UefiSpec.h> + +#include <ipxe/efi/Pi/PiDxeCis.h> + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/ProcessorBind.h b/qemu/roms/ipxe/src/include/ipxe/efi/ProcessorBind.h new file mode 100644 index 000000000..1294459f9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/ProcessorBind.h @@ -0,0 +1,21 @@ +#ifndef _IPXE_EFI_PROCESSOR_BIND_H +#define _IPXE_EFI_PROCESSOR_BIND_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* + * EFI header files rely on having the CPU architecture directory + * present in the search path in order to pick up ProcessorBind.h. We + * use this header file as a quick indirection layer. + * - mcb30 + */ + +#if __i386__ +#include <ipxe/efi/Ia32/ProcessorBind.h> +#endif + +#if __x86_64__ +#include <ipxe/efi/X64/ProcessorBind.h> +#endif + +#endif /* _IPXE_EFI_PROCESSOR_BIND_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Arp.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Arp.h new file mode 100644 index 000000000..80921f9a0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Arp.h @@ -0,0 +1,387 @@ +/** @file + EFI ARP Protocol Definition + + The EFI ARP Service Binding Protocol is used to locate EFI + ARP Protocol drivers to create and destroy child of the + driver to communicate with other host using ARP protocol. + The EFI ARP Protocol provides services to map IP network + address to hardware address used by a data link protocol. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol was introduced in UEFI Specification 2.0. + +**/ + +#ifndef __EFI_ARP_PROTOCOL_H__ +#define __EFI_ARP_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_ARP_SERVICE_BINDING_PROTOCOL_GUID \ + { \ + 0xf44c00ee, 0x1f2c, 0x4a00, {0xaa, 0x9, 0x1c, 0x9f, 0x3e, 0x8, 0x0, 0xa3 } \ + } + +#define EFI_ARP_PROTOCOL_GUID \ + { \ + 0xf4b427bb, 0xba21, 0x4f16, {0xbc, 0x4e, 0x43, 0xe4, 0x16, 0xab, 0x61, 0x9c } \ + } + +typedef struct _EFI_ARP_PROTOCOL EFI_ARP_PROTOCOL; + +typedef struct { + /// + /// Length in bytes of this entry. + /// + UINT32 Size; + + /// + /// Set to TRUE if this entry is a "deny" entry. + /// Set to FALSE if this entry is a "normal" entry. + /// + BOOLEAN DenyFlag; + + /// + /// Set to TRUE if this entry will not time out. + /// Set to FALSE if this entry will time out. + /// + BOOLEAN StaticFlag; + + /// + /// 16-bit ARP hardware identifier number. + /// + UINT16 HwAddressType; + + /// + /// 16-bit protocol type number. + /// + UINT16 SwAddressType; + + /// + /// The length of the hardware address. + /// + UINT8 HwAddressLength; + + /// + /// The length of the protocol address. + /// + UINT8 SwAddressLength; +} EFI_ARP_FIND_DATA; + +typedef struct { + /// + /// 16-bit protocol type number in host byte order. + /// + UINT16 SwAddressType; + + /// + /// The length in bytes of the station's protocol address to register. + /// + UINT8 SwAddressLength; + + /// + /// The pointer to the first byte of the protocol address to register. For + /// example, if SwAddressType is 0x0800 (IP), then + /// StationAddress points to the first byte of this station's IP + /// address stored in network byte order. + /// + VOID *StationAddress; + + /// + /// The timeout value in 100-ns units that is associated with each + /// new dynamic ARP cache entry. If it is set to zero, the value is + /// implementation-specific. + /// + UINT32 EntryTimeOut; + + /// + /// The number of retries before a MAC address is resolved. If it is + /// set to zero, the value is implementation-specific. + /// + UINT32 RetryCount; + + /// + /// The timeout value in 100-ns units that is used to wait for the ARP + /// reply packet or the timeout value between two retries. Set to zero + /// to use implementation-specific value. + /// + UINT32 RetryTimeOut; +} EFI_ARP_CONFIG_DATA; + + +/** + This function is used to assign a station address to the ARP cache for this instance + of the ARP driver. + + Each ARP instance has one station address. The EFI_ARP_PROTOCOL driver will + respond to ARP requests that match this registered station address. A call to + this function with the ConfigData field set to NULL will reset this ARP instance. + + Once a protocol type and station address have been assigned to this ARP instance, + all the following ARP functions will use this information. Attempting to change + the protocol type or station address to a configured ARP instance will result in errors. + + @param This The pointer to the EFI_ARP_PROTOCOL instance. + @param ConfigData The pointer to the EFI_ARP_CONFIG_DATA structure. + + @retval EFI_SUCCESS The new station address was successfully + registered. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + * This is NULL. + * SwAddressLength is zero when ConfigData is not NULL. + * StationAddress is NULL when ConfigData is not NULL. + @retval EFI_ACCESS_DENIED The SwAddressType, SwAddressLength, or + StationAddress is different from the one that is + already registered. + @retval EFI_OUT_OF_RESOURCES Storage for the new StationAddress could not be + allocated. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ARP_CONFIGURE)( + IN EFI_ARP_PROTOCOL *This, + IN EFI_ARP_CONFIG_DATA *ConfigData OPTIONAL + ); + +/** + This function is used to insert entries into the ARP cache. + + ARP cache entries are typically inserted and updated by network protocol drivers + as network traffic is processed. Most ARP cache entries will time out and be + deleted if the network traffic stops. ARP cache entries that were inserted + by the Add() function may be static (will not time out) or dynamic (will time out). + Default ARP cache timeout values are not covered in most network protocol + specifications (although RFC 1122 comes pretty close) and will only be + discussed in general terms in this specification. The timeout values that are + used in the EFI Sample Implementation should be used only as a guideline. + Final product implementations of the EFI network stack should be tuned for + their expected network environments. + + @param This Pointer to the EFI_ARP_PROTOCOL instance. + @param DenyFlag Set to TRUE if this entry is a deny entry. Set to + FALSE if this entry is a normal entry. + @param TargetSwAddress Pointer to a protocol address to add (or deny). + May be set to NULL if DenyFlag is TRUE. + @param TargetHwAddress Pointer to a hardware address to add (or deny). + May be set to NULL if DenyFlag is TRUE. + @param TimeoutValue Time in 100-ns units that this entry will remain + in the ARP cache. A value of zero means that the + entry is permanent. A nonzero value will override + the one given by Configure() if the entry to be + added is a dynamic entry. + @param Overwrite If TRUE, the matching cache entry will be + overwritten with the supplied parameters. If + FALSE, EFI_ACCESS_DENIED is returned if the + corresponding cache entry already exists. + + @retval EFI_SUCCESS The entry has been added or updated. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + * This is NULL. + * DenyFlag is FALSE and TargetHwAddress is NULL. + * DenyFlag is FALSE and TargetSwAddress is NULL. + * TargetHwAddress is NULL and TargetSwAddress is NULL. + * Neither TargetSwAddress nor TargetHwAddress are NULL when DenyFlag is + TRUE. + @retval EFI_OUT_OF_RESOURCES The new ARP cache entry could not be allocated. + @retval EFI_ACCESS_DENIED The ARP cache entry already exists and Overwrite + is not true. + @retval EFI_NOT_STARTED The ARP driver instance has not been configured. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ARP_ADD)( + IN EFI_ARP_PROTOCOL *This, + IN BOOLEAN DenyFlag, + IN VOID *TargetSwAddress OPTIONAL, + IN VOID *TargetHwAddress OPTIONAL, + IN UINT32 TimeoutValue, + IN BOOLEAN Overwrite + ); + +/** + This function searches the ARP cache for matching entries and allocates a buffer into + which those entries are copied. + + The first part of the allocated buffer is EFI_ARP_FIND_DATA, following which + are protocol address pairs and hardware address pairs. + When finding a specific protocol address (BySwAddress is TRUE and AddressBuffer + is not NULL), the ARP cache timeout for the found entry is reset if Refresh is + set to TRUE. If the found ARP cache entry is a permanent entry, it is not + affected by Refresh. + + @param This The pointer to the EFI_ARP_PROTOCOL instance. + @param BySwAddress Set to TRUE to look for matching software protocol + addresses. Set to FALSE to look for matching + hardware protocol addresses. + @param AddressBuffer The pointer to the address buffer. Set to NULL + to match all addresses. + @param EntryLength The size of an entry in the entries buffer. + @param EntryCount The number of ARP cache entries that are found by + the specified criteria. + @param Entries The pointer to the buffer that will receive the ARP + cache entries. + @param Refresh Set to TRUE to refresh the timeout value of the + matching ARP cache entry. + + @retval EFI_SUCCESS The requested ARP cache entries were copied into + the buffer. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + This is NULL. Both EntryCount and EntryLength are + NULL, when Refresh is FALSE. + @retval EFI_NOT_FOUND No matching entries were found. + @retval EFI_NOT_STARTED The ARP driver instance has not been configured. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ARP_FIND)( + IN EFI_ARP_PROTOCOL *This, + IN BOOLEAN BySwAddress, + IN VOID *AddressBuffer OPTIONAL, + OUT UINT32 *EntryLength OPTIONAL, + OUT UINT32 *EntryCount OPTIONAL, + OUT EFI_ARP_FIND_DATA **Entries OPTIONAL, + IN BOOLEAN Refresh + ); + + +/** + This function removes specified ARP cache entries. + + @param This The pointer to the EFI_ARP_PROTOCOL instance. + @param BySwAddress Set to TRUE to delete matching protocol addresses. + Set to FALSE to delete matching hardware + addresses. + @param AddressBuffer The pointer to the address buffer that is used as a + key to look for the cache entry. Set to NULL to + delete all entries. + + @retval EFI_SUCCESS The entry was removed from the ARP cache. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_FOUND The specified deletion key was not found. + @retval EFI_NOT_STARTED The ARP driver instance has not been configured. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ARP_DELETE)( + IN EFI_ARP_PROTOCOL *This, + IN BOOLEAN BySwAddress, + IN VOID *AddressBuffer OPTIONAL + ); + +/** + This function delete all dynamic entries from the ARP cache that match the specified + software protocol type. + + @param This The pointer to the EFI_ARP_PROTOCOL instance. + + @retval EFI_SUCCESS The cache has been flushed. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_FOUND There are no matching dynamic cache entries. + @retval EFI_NOT_STARTED The ARP driver instance has not been configured. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ARP_FLUSH)( + IN EFI_ARP_PROTOCOL *This + ); + +/** + This function tries to resolve the TargetSwAddress and optionally returns a + TargetHwAddress if it already exists in the ARP cache. + + @param This The pointer to the EFI_ARP_PROTOCOL instance. + @param TargetSwAddress The pointer to the protocol address to resolve. + @param ResolvedEvent The pointer to the event that will be signaled when + the address is resolved or some error occurs. + @param TargetHwAddress The pointer to the buffer for the resolved hardware + address in network byte order. + + @retval EFI_SUCCESS The data is copied from the ARP cache into the + TargetHwAddress buffer. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + This is NULL. TargetHwAddress is NULL. + @retval EFI_ACCESS_DENIED The requested address is not present in the normal + ARP cache but is present in the deny address list. + Outgoing traffic to that address is forbidden. + @retval EFI_NOT_STARTED The ARP driver instance has not been configured. + @retval EFI_NOT_READY The request has been started and is not finished. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ARP_REQUEST)( + IN EFI_ARP_PROTOCOL *This, + IN VOID *TargetSwAddress OPTIONAL, + IN EFI_EVENT ResolvedEvent OPTIONAL, + OUT VOID *TargetHwAddress + ); + +/** + This function aborts the previous ARP request (identified by This, TargetSwAddress + and ResolvedEvent) that is issued by EFI_ARP_PROTOCOL.Request(). + + If the request is in the internal ARP request queue, the request is aborted + immediately and its ResolvedEvent is signaled. Only an asynchronous address + request needs to be canceled. If TargeSwAddress and ResolveEvent are both + NULL, all the pending asynchronous requests that have been issued by This + instance will be cancelled and their corresponding events will be signaled. + + @param This The pointer to the EFI_ARP_PROTOCOL instance. + @param TargetSwAddress The pointer to the protocol address in previous + request session. + @param ResolvedEvent Pointer to the event that is used as the + notification event in previous request session. + + @retval EFI_SUCCESS The pending request session(s) is/are aborted and + corresponding event(s) is/are signaled. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + This is NULL. TargetSwAddress is not NULL and + ResolvedEvent is NULL. TargetSwAddress is NULL and + ResolvedEvent is not NULL. + @retval EFI_NOT_STARTED The ARP driver instance has not been configured. + @retval EFI_NOT_FOUND The request is not issued by + EFI_ARP_PROTOCOL.Request(). + + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ARP_CANCEL)( + IN EFI_ARP_PROTOCOL *This, + IN VOID *TargetSwAddress OPTIONAL, + IN EFI_EVENT ResolvedEvent OPTIONAL + ); + +/// +/// ARP is used to resolve local network protocol addresses into +/// network hardware addresses. +/// +struct _EFI_ARP_PROTOCOL { + EFI_ARP_CONFIGURE Configure; + EFI_ARP_ADD Add; + EFI_ARP_FIND Find; + EFI_ARP_DELETE Delete; + EFI_ARP_FLUSH Flush; + EFI_ARP_REQUEST Request; + EFI_ARP_CANCEL Cancel; +}; + + +extern EFI_GUID gEfiArpServiceBindingProtocolGuid; +extern EFI_GUID gEfiArpProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/BlockIo.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/BlockIo.h new file mode 100644 index 000000000..f45154bb1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/BlockIo.h @@ -0,0 +1,243 @@ +/** @file + Block IO protocol as defined in the UEFI 2.0 specification. + + The Block IO protocol is used to abstract block devices like hard drives, + DVD-ROMs and floppy drives. + + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __BLOCK_IO_H__ +#define __BLOCK_IO_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_BLOCK_IO_PROTOCOL_GUID \ + { \ + 0x964e5b21, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +typedef struct _EFI_BLOCK_IO_PROTOCOL EFI_BLOCK_IO_PROTOCOL; + +/// +/// Protocol GUID name defined in EFI1.1. +/// +#define BLOCK_IO_PROTOCOL EFI_BLOCK_IO_PROTOCOL_GUID + +/// +/// Protocol defined in EFI1.1. +/// +typedef EFI_BLOCK_IO_PROTOCOL EFI_BLOCK_IO; + +/** + Reset the Block Device. + + @param This Indicates a pointer to the calling context. + @param ExtendedVerification Driver may perform diagnostics on reset. + + @retval EFI_SUCCESS The device was reset. + @retval EFI_DEVICE_ERROR The device is not functioning properly and could + not be reset. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_BLOCK_RESET)( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN BOOLEAN ExtendedVerification + ); + +/** + Read BufferSize bytes from Lba into Buffer. + + @param This Indicates a pointer to the calling context. + @param MediaId Id of the media, changes every time the media is replaced. + @param Lba The starting Logical Block Address to read from + @param BufferSize Size of Buffer, must be a multiple of device block size. + @param Buffer A pointer to the destination buffer for the data. The caller is + responsible for either having implicit or explicit ownership of the buffer. + + @retval EFI_SUCCESS The data was read correctly from the device. + @retval EFI_DEVICE_ERROR The device reported an error while performing the read. + @retval EFI_NO_MEDIA There is no media in the device. + @retval EFI_MEDIA_CHANGED The MediaId does not matched the current device. + @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device. + @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid, + or the buffer is not on proper alignment. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_BLOCK_READ)( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN UINT32 MediaId, + IN EFI_LBA Lba, + IN UINTN BufferSize, + OUT VOID *Buffer + ); + +/** + Write BufferSize bytes from Lba into Buffer. + + @param This Indicates a pointer to the calling context. + @param MediaId The media ID that the write request is for. + @param Lba The starting logical block address to be written. The caller is + responsible for writing to only legitimate locations. + @param BufferSize Size of Buffer, must be a multiple of device block size. + @param Buffer A pointer to the source buffer for the data. + + @retval EFI_SUCCESS The data was written correctly to the device. + @retval EFI_WRITE_PROTECTED The device can not be written to. + @retval EFI_DEVICE_ERROR The device reported an error while performing the write. + @retval EFI_NO_MEDIA There is no media in the device. + @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device. + @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device. + @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid, + or the buffer is not on proper alignment. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_BLOCK_WRITE)( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN UINT32 MediaId, + IN EFI_LBA Lba, + IN UINTN BufferSize, + IN VOID *Buffer + ); + +/** + Flush the Block Device. + + @param This Indicates a pointer to the calling context. + + @retval EFI_SUCCESS All outstanding data was written to the device + @retval EFI_DEVICE_ERROR The device reported an error while writting back the data + @retval EFI_NO_MEDIA There is no media in the device. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_BLOCK_FLUSH)( + IN EFI_BLOCK_IO_PROTOCOL *This + ); + +/** + Block IO read only mode data and updated only via members of BlockIO +**/ +typedef struct { + /// + /// The curent media Id. If the media changes, this value is changed. + /// + UINT32 MediaId; + + /// + /// TRUE if the media is removable; otherwise, FALSE. + /// + BOOLEAN RemovableMedia; + + /// + /// TRUE if there is a media currently present in the device; + /// othersise, FALSE. THis field shows the media present status + /// as of the most recent ReadBlocks() or WriteBlocks() call. + /// + BOOLEAN MediaPresent; + + /// + /// TRUE if LBA 0 is the first block of a partition; otherwise + /// FALSE. For media with only one partition this would be TRUE. + /// + BOOLEAN LogicalPartition; + + /// + /// TRUE if the media is marked read-only otherwise, FALSE. + /// This field shows the read-only status as of the most recent WriteBlocks () call. + /// + BOOLEAN ReadOnly; + + /// + /// TRUE if the WriteBlock () function caches write data. + /// + BOOLEAN WriteCaching; + + /// + /// The intrinsic block size of the device. If the media changes, then + /// this field is updated. + /// + UINT32 BlockSize; + + /// + /// Supplies the alignment requirement for any buffer to read or write block(s). + /// + UINT32 IoAlign; + + /// + /// The last logical block address on the device. + /// If the media changes, then this field is updated. + /// + EFI_LBA LastBlock; + + /// + /// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to + /// EFI_BLOCK_IO_PROTOCOL_REVISION2. Returns the first LBA is aligned to + /// a physical block boundary. + /// + EFI_LBA LowestAlignedLba; + + /// + /// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to + /// EFI_BLOCK_IO_PROTOCOL_REVISION2. Returns the number of logical blocks + /// per physical block. + /// + UINT32 LogicalBlocksPerPhysicalBlock; + + /// + /// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to + /// EFI_BLOCK_IO_PROTOCOL_REVISION3. Returns the optimal transfer length + /// granularity as a number of logical blocks. + /// + UINT32 OptimalTransferLengthGranularity; +} EFI_BLOCK_IO_MEDIA; + +#define EFI_BLOCK_IO_PROTOCOL_REVISION 0x00010000 +#define EFI_BLOCK_IO_PROTOCOL_REVISION2 0x00020001 +#define EFI_BLOCK_IO_PROTOCOL_REVISION3 0x00020031 + +/// +/// Revision defined in EFI1.1. +/// +#define EFI_BLOCK_IO_INTERFACE_REVISION EFI_BLOCK_IO_PROTOCOL_REVISION + +/// +/// This protocol provides control over block devices. +/// +struct _EFI_BLOCK_IO_PROTOCOL { + /// + /// The revision to which the block IO interface adheres. All future + /// revisions must be backwards compatible. If a future version is not + /// back wards compatible, it is not the same GUID. + /// + UINT64 Revision; + /// + /// Pointer to the EFI_BLOCK_IO_MEDIA data for this device. + /// + EFI_BLOCK_IO_MEDIA *Media; + + EFI_BLOCK_RESET Reset; + EFI_BLOCK_READ ReadBlocks; + EFI_BLOCK_WRITE WriteBlocks; + EFI_BLOCK_FLUSH FlushBlocks; + +}; + +extern EFI_GUID gEfiBlockIoProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/BusSpecificDriverOverride.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/BusSpecificDriverOverride.h new file mode 100644 index 000000000..be92323fc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/BusSpecificDriverOverride.h @@ -0,0 +1,74 @@ +/** @file + Bus Specific Driver Override protocol as defined in the UEFI 2.0 specification. + + Bus drivers that have a bus specific algorithm for matching drivers to controllers are + required to produce this protocol for each controller. For example, a PCI Bus Driver will produce an + instance of this protocol for every PCI controller that has a PCI option ROM that contains one or + more UEFI drivers. The protocol instance is attached to the handle of the PCI controller. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_H_ +#define _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_H_ + +FILE_LICENCE ( BSD3 ); + +/// +/// Global ID for the Bus Specific Driver Override Protocol +/// +#define EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_GUID \ + { \ + 0x3bc1b285, 0x8a15, 0x4a82, {0xaa, 0xbf, 0x4d, 0x7d, 0x13, 0xfb, 0x32, 0x65 } \ + } + +typedef struct _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL; + +// +// Prototypes for the Bus Specific Driver Override Protocol +// + +/** + Uses a bus specific algorithm to retrieve a driver image handle for a controller. + + @param This A pointer to the EFI_BUS_SPECIFIC_DRIVER_ + OVERRIDE_PROTOCOL instance. + @param DriverImageHandle On input, a pointer to the previous driver image handle returned + by GetDriver(). On output, a pointer to the next driver + image handle. Passing in a NULL, will return the first driver + image handle. + + @retval EFI_SUCCESS A bus specific override driver is returned in DriverImageHandle. + @retval EFI_NOT_FOUND The end of the list of override drivers was reached. + A bus specific override driver is not returned in DriverImageHandle. + @retval EFI_INVALID_PARAMETER DriverImageHandle is not a handle that was returned on a + previous call to GetDriver(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_GET_DRIVER)( + IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This, + IN OUT EFI_HANDLE *DriverImageHandle + ); + +/// +/// This protocol matches one or more drivers to a controller. This protocol is produced by a bus driver, +/// and it is installed on the child handles of buses that require a bus specific algorithm for matching +/// drivers to controllers. +/// +struct _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL { + EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_GET_DRIVER GetDriver; +}; + +extern EFI_GUID gEfiBusSpecificDriverOverrideProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ComponentName.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ComponentName.h new file mode 100644 index 000000000..87b6d61a0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ComponentName.h @@ -0,0 +1,131 @@ +/** @file + EFI Component Name Protocol as defined in the EFI 1.1 specification. + This protocol is used to retrieve user readable names of EFI Drivers + and controllers managed by EFI Drivers. + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EFI_COMPONENT_NAME_H__ +#define __EFI_COMPONENT_NAME_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// The global ID for the Component Name Protocol. +/// +#define EFI_COMPONENT_NAME_PROTOCOL_GUID \ + { \ + 0x107a772c, 0xd5e1, 0x11d4, {0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ + } + +typedef struct _EFI_COMPONENT_NAME_PROTOCOL EFI_COMPONENT_NAME_PROTOCOL; + + +/** + Retrieves a Unicode string that is the user-readable name of the EFI Driver. + + @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance. + @param Language A pointer to a three-character ISO 639-2 language identifier. + This is the language of the driver name that that the caller + is requesting, and it must match one of the languages specified + in SupportedLanguages. The number of languages supported by a + driver is up to the driver writer. + @param DriverName A pointer to the Unicode string to return. This Unicode string + is the name of the driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by This + and the language specified by Language was returned + in DriverName. + @retval EFI_INVALID_PARAMETER Language is NULL. + @retval EFI_INVALID_PARAMETER DriverName is NULL. + @retval EFI_UNSUPPORTED The driver specified by This does not support the + language specified by Language. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_COMPONENT_NAME_GET_DRIVER_NAME)( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ); + + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by an EFI Driver. + + @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance. + @param ControllerHandle The handle of a controller that the driver specified by + This is managing. This handle specifies the controller + whose name is to be returned. + @param ChildHandle The handle of the child controller to retrieve the name + of. This is an optional parameter that may be NULL. It + will be NULL for device drivers. It will also be NULL + for a bus drivers that wish to retrieve the name of the + bus controller. It will not be NULL for a bus driver + that wishes to retrieve the name of a child controller. + @param Language A pointer to a three character ISO 639-2 language + identifier. This is the language of the controller name + that the caller is requesting, and it must match one + of the languages specified in SupportedLanguages. The + number of languages supported by a driver is up to the + driver writer. + @param ControllerName A pointer to the Unicode string to return. This Unicode + string is the name of the controller specified by + ControllerHandle and ChildHandle in the language specified + by Language, from the point of view of the driver specified + by This. + + @retval EFI_SUCCESS The Unicode string for the user-readable name in the + language specified by Language for the driver + specified by This was returned in DriverName. + @retval EFI_INVALID_PARAMETER ControllerHandle is NULL. + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid EFI_HANDLE. + @retval EFI_INVALID_PARAMETER Language is NULL. + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + @retval EFI_UNSUPPORTED The driver specified by This is not currently managing + the controller specified by ControllerHandle and + ChildHandle. + @retval EFI_UNSUPPORTED The driver specified by This does not support the + language specified by Language. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_COMPONENT_NAME_GET_CONTROLLER_NAME)( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ); + +/// +/// This protocol is used to retrieve user readable names of drivers +/// and controllers managed by UEFI Drivers. +/// +struct _EFI_COMPONENT_NAME_PROTOCOL { + EFI_COMPONENT_NAME_GET_DRIVER_NAME GetDriverName; + EFI_COMPONENT_NAME_GET_CONTROLLER_NAME GetControllerName; + /// + /// A Null-terminated ASCII string that contains one or more + /// ISO 639-2 language codes. This is the list of language codes + /// that this protocol supports. + /// + CHAR8 *SupportedLanguages; +}; + +extern EFI_GUID gEfiComponentNameProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ComponentName2.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ComponentName2.h new file mode 100644 index 000000000..82d8b2561 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ComponentName2.h @@ -0,0 +1,174 @@ +/** @file + UEFI Component Name 2 Protocol as defined in the UEFI 2.1 specification. + This protocol is used to retrieve user readable names of drivers + and controllers managed by UEFI Drivers. + + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EFI_COMPONENT_NAME2_H__ +#define __EFI_COMPONENT_NAME2_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// Global ID for the Component Name Protocol +/// +#define EFI_COMPONENT_NAME2_PROTOCOL_GUID \ + {0x6a7a5cff, 0xe8d9, 0x4f70, { 0xba, 0xda, 0x75, 0xab, 0x30, 0x25, 0xce, 0x14 } } + +typedef struct _EFI_COMPONENT_NAME2_PROTOCOL EFI_COMPONENT_NAME2_PROTOCOL; + + +/** + Retrieves a string that is the user readable name of + the EFI Driver. + + @param This A pointer to the + EFI_COMPONENT_NAME2_PROTOCOL instance. + + @param Language A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller + is requesting, and it must match one of the + languages specified in SupportedLanguages. + The number of languages supported by a + driver is up to the driver writer. Language + is specified in RFC 4646 language code + format. + + @param DriverName A pointer to the string to return. + This string is the name of the + driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The string for the + Driver specified by This and the + language specified by Language + was returned in DriverName. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER DriverName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This + does not support the language + specified by Language. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_COMPONENT_NAME2_GET_DRIVER_NAME)( + IN EFI_COMPONENT_NAME2_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ); + + +/** + Retrieves a string that is the user readable name of + the controller that is being managed by an EFI Driver. + + @param This A pointer to the + EFI_COMPONENT_NAME2_PROTOCOL instance. + + @param ControllerHandle The handle of a controller that the + driver specified by This is managing. + This handle specifies the controller + whose name is to be returned. + + @param ChildHandle The handle of the child controller to + retrieve the name of. This is an + optional parameter that may be NULL. + It will be NULL for device drivers. + It will also be NULL for bus + drivers that wish to retrieve the + name of the bus controller. It will + not be NULL for a bus driver that + wishes to retrieve the name of a + child controller. + + @param Language A pointer to a Null-terminated ASCII + string array indicating the language. + This is the language of the driver + name that the caller is requesting, + and it must match one of the + languages specified in + SupportedLanguages. The number of + languages supported by a driver is up + to the driver writer. Language is + specified in RFC 4646 language code + format. + + @param ControllerName A pointer to the string to return. + This string is the name of the controller + specified by ControllerHandle and ChildHandle + in the language specified by Language + from the point of view of the driver + specified by This. + + @retval EFI_SUCCESS The string for the user + readable name in the language + specified by Language for the + driver specified by This was + returned in DriverName. + + @retval EFI_INVALID_PARAMETER ControllerHandle is NULL. + + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it + is not a valid EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This is + not currently managing the + controller specified by + ControllerHandle and + ChildHandle. + + @retval EFI_UNSUPPORTED The driver specified by This + does not support the language + specified by Language. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)( + IN EFI_COMPONENT_NAME2_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ); + +/// +/// This protocol is used to retrieve user readable names of drivers +/// and controllers managed by UEFI Drivers. +/// +struct _EFI_COMPONENT_NAME2_PROTOCOL { + EFI_COMPONENT_NAME2_GET_DRIVER_NAME GetDriverName; + EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME GetControllerName; + + /// + /// A Null-terminated ASCII string array that contains one or more + /// supported language codes. This is the list of language codes that + /// this protocol supports. The number of languages supported by a + /// driver is up to the driver writer. SupportedLanguages is + /// specified in RFC 4646 format. + /// + CHAR8 *SupportedLanguages; +}; + +extern EFI_GUID gEfiComponentName2ProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ConsoleControl/ConsoleControl.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ConsoleControl/ConsoleControl.h new file mode 100644 index 000000000..0bf5799e6 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ConsoleControl/ConsoleControl.h @@ -0,0 +1,124 @@ +/*++ + +Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + ConsoleControl.h + +Abstract: + + Abstraction of a Text mode or GOP/UGA screen + +--*/ + +#ifndef __CONSOLE_CONTROL_H__ +#define __CONSOLE_CONTROL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_CONSOLE_CONTROL_PROTOCOL_GUID \ + { 0xf42f7782, 0x12e, 0x4c12, {0x99, 0x56, 0x49, 0xf9, 0x43, 0x4, 0xf7, 0x21} } + +typedef struct _EFI_CONSOLE_CONTROL_PROTOCOL EFI_CONSOLE_CONTROL_PROTOCOL; + + +typedef enum { + EfiConsoleControlScreenText, + EfiConsoleControlScreenGraphics, + EfiConsoleControlScreenMaxValue +} EFI_CONSOLE_CONTROL_SCREEN_MODE; + + +typedef +EFI_STATUS +(EFIAPI *EFI_CONSOLE_CONTROL_PROTOCOL_GET_MODE) ( + IN EFI_CONSOLE_CONTROL_PROTOCOL *This, + OUT EFI_CONSOLE_CONTROL_SCREEN_MODE *Mode, + OUT BOOLEAN *GopUgaExists, OPTIONAL + OUT BOOLEAN *StdInLocked OPTIONAL + ) +/*++ + + Routine Description: + Return the current video mode information. Also returns info about existence + of Graphics Output devices or UGA Draw devices in system, and if the Std In + device is locked. All the arguments are optional and only returned if a non + NULL pointer is passed in. + + Arguments: + This - Protocol instance pointer. + Mode - Are we in text of grahics mode. + GopUgaExists - TRUE if Console Spliter has found a GOP or UGA device + StdInLocked - TRUE if StdIn device is keyboard locked + + Returns: + EFI_SUCCESS - Mode information returned. + +--*/ +; + + +typedef +EFI_STATUS +(EFIAPI *EFI_CONSOLE_CONTROL_PROTOCOL_SET_MODE) ( + IN EFI_CONSOLE_CONTROL_PROTOCOL *This, + IN EFI_CONSOLE_CONTROL_SCREEN_MODE Mode + ) +/*++ + + Routine Description: + Set the current mode to either text or graphics. Graphics is + for Quiet Boot. + + Arguments: + This - Protocol instance pointer. + Mode - Mode to set the + + Returns: + EFI_SUCCESS - Mode information returned. + +--*/ +; + + +typedef +EFI_STATUS +(EFIAPI *EFI_CONSOLE_CONTROL_PROTOCOL_LOCK_STD_IN) ( + IN EFI_CONSOLE_CONTROL_PROTOCOL *This, + IN CHAR16 *Password + ) +/*++ + + Routine Description: + Lock Std In devices until Password is typed. + + Arguments: + This - Protocol instance pointer. + Password - Password needed to unlock screen. NULL means unlock keyboard + + Returns: + EFI_SUCCESS - Mode information returned. + EFI_DEVICE_ERROR - Std In not locked + +--*/ +; + + + +struct _EFI_CONSOLE_CONTROL_PROTOCOL { + EFI_CONSOLE_CONTROL_PROTOCOL_GET_MODE GetMode; + EFI_CONSOLE_CONTROL_PROTOCOL_SET_MODE SetMode; + EFI_CONSOLE_CONTROL_PROTOCOL_LOCK_STD_IN LockStdIn; +}; + +extern EFI_GUID gEfiConsoleControlProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Cpu.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Cpu.h new file mode 100644 index 000000000..665924e88 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Cpu.h @@ -0,0 +1,302 @@ +/** @file + CPU Architectural Protocol as defined in PI spec Volume 2 DXE + + This code abstracts the DXE core from processor implementation details. + + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __ARCH_PROTOCOL_CPU_H__ +#define __ARCH_PROTOCOL_CPU_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/DebugSupport.h> + +#define EFI_CPU_ARCH_PROTOCOL_GUID \ + { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } } + +typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL; + +/// +/// The type of flush operation +/// +typedef enum { + EfiCpuFlushTypeWriteBackInvalidate, + EfiCpuFlushTypeWriteBack, + EfiCpuFlushTypeInvalidate, + EfiCpuMaxFlushType +} EFI_CPU_FLUSH_TYPE; + +/// +/// The type of processor INIT. +/// +typedef enum { + EfiCpuInit, + EfiCpuMaxInitType +} EFI_CPU_INIT_TYPE; + +/** + EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs. + + @param InterruptType Defines the type of interrupt or exception that + occurred on the processor.This parameter is processor architecture specific. + @param SystemContext A pointer to the processor context when + the interrupt occurred on the processor. + + @return None + +**/ +typedef +VOID +(EFIAPI *EFI_CPU_INTERRUPT_HANDLER)( + IN CONST EFI_EXCEPTION_TYPE InterruptType, + IN CONST EFI_SYSTEM_CONTEXT SystemContext + ); + +/** + This function flushes the range of addresses from Start to Start+Length + from the processor's data cache. If Start is not aligned to a cache line + boundary, then the bytes before Start to the preceding cache line boundary + are also flushed. If Start+Length is not aligned to a cache line boundary, + then the bytes past Start+Length to the end of the next cache line boundary + are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be + supported. If the data cache is fully coherent with all DMA operations, then + this function can just return EFI_SUCCESS. If the processor does not support + flushing a range of the data cache, then the entire data cache can be flushed. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + @param Start The beginning physical address to flush from the processor's data + cache. + @param Length The number of bytes to flush from the processor's data cache. This + function may flush more bytes than Length specifies depending upon + the granularity of the flush operation that the processor supports. + @param FlushType Specifies the type of flush operation to perform. + + @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from + the processor's data cache. + @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified + by FlushType. + @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed + from the processor's data cache. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_FLUSH_DATA_CACHE)( + IN EFI_CPU_ARCH_PROTOCOL *This, + IN EFI_PHYSICAL_ADDRESS Start, + IN UINT64 Length, + IN EFI_CPU_FLUSH_TYPE FlushType + ); + + +/** + This function enables interrupt processing by the processor. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are enabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_ENABLE_INTERRUPT)( + IN EFI_CPU_ARCH_PROTOCOL *This + ); + + +/** + This function disables interrupt processing by the processor. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are disabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_DISABLE_INTERRUPT)( + IN EFI_CPU_ARCH_PROTOCOL *This + ); + + +/** + This function retrieves the processor's current interrupt state a returns it in + State. If interrupts are currently enabled, then TRUE is returned. If interrupts + are currently disabled, then FALSE is returned. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + @param State A pointer to the processor's current interrupt state. Set to TRUE if + interrupts are enabled and FALSE if interrupts are disabled. + + @retval EFI_SUCCESS The processor's current interrupt state was returned in State. + @retval EFI_INVALID_PARAMETER State is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_GET_INTERRUPT_STATE)( + IN EFI_CPU_ARCH_PROTOCOL *This, + OUT BOOLEAN *State + ); + + +/** + This function generates an INIT on the processor. If this function succeeds, then the + processor will be reset, and control will not be returned to the caller. If InitType is + not supported by this processor, or the processor cannot programmatically generate an + INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error + occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + @param InitType The type of processor INIT to perform. + + @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen. + @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported + by this processor. + @retval EFI_DEVICE_ERROR The processor INIT failed. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_INIT)( + IN EFI_CPU_ARCH_PROTOCOL *This, + IN EFI_CPU_INIT_TYPE InitType + ); + + +/** + This function registers and enables the handler specified by InterruptHandler for a processor + interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the + handler for the processor interrupt or exception type specified by InterruptType is uninstalled. + The installed handler is called once for each processor interrupt or exception. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts + are enabled and FALSE if interrupts are disabled. + @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called + when a processor interrupt occurs. If this parameter is NULL, then the handler + will be uninstalled. + + @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled. + @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was + previously installed. + @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not + previously installed. + @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER)( + IN EFI_CPU_ARCH_PROTOCOL *This, + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler + ); + + +/** + This function reads the processor timer specified by TimerIndex and returns it in TimerValue. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + @param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter + must be between 0 and NumberOfTimers-1. + @param TimerValue Pointer to the returned timer value. + @param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment + of TimerValue. If TimerValue does not increment at a predictable rate, then 0 is + returned. This parameter is optional and may be NULL. + + @retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue. + @retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers. + @retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid. + @retval EFI_UNSUPPORTED The processor does not have any readable timers. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_GET_TIMER_VALUE)( + IN EFI_CPU_ARCH_PROTOCOL *This, + IN UINT32 TimerIndex, + OUT UINT64 *TimerValue, + OUT UINT64 *TimerPeriod OPTIONAL + ); + + +/** + This function modifies the attributes for the memory region specified by BaseAddress and + Length from their current attributes to the attributes specified by Attributes. + + @param This The EFI_CPU_ARCH_PROTOCOL instance. + @param BaseAddress The physical address that is the start address of a memory region. + @param Length The size in bytes of the memory region. + @param Attributes The bit mask of attributes to set for the memory region. + + @retval EFI_SUCCESS The attributes were set for the memory region. + @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by + BaseAddress and Length cannot be modified. + @retval EFI_INVALID_PARAMETER Length is zero. + Attributes specified an illegal combination of attributes that + cannot be set together. + @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of + the memory resource range. + @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory + resource range specified by BaseAddress and Length. + The bit mask of attributes is not support for the memory resource + range specified by BaseAddress and Length. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)( + IN EFI_CPU_ARCH_PROTOCOL *This, + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length, + IN UINT64 Attributes + ); + + +/// +/// The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE +/// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt +/// vectors and exception vectors, reading internal processor timers, resetting the processor, and +/// determining the processor frequency. +/// +struct _EFI_CPU_ARCH_PROTOCOL { + EFI_CPU_FLUSH_DATA_CACHE FlushDataCache; + EFI_CPU_ENABLE_INTERRUPT EnableInterrupt; + EFI_CPU_DISABLE_INTERRUPT DisableInterrupt; + EFI_CPU_GET_INTERRUPT_STATE GetInterruptState; + EFI_CPU_INIT Init; + EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler; + EFI_CPU_GET_TIMER_VALUE GetTimerValue; + EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes; + /// + /// The number of timers that are available in a processor. The value in this + /// field is a constant that must not be modified after the CPU Architectural + /// Protocol is installed. All consumers must treat this as a read-only field. + /// + UINT32 NumberOfTimers; + /// + /// The size, in bytes, of the alignment required for DMA buffer allocations. + /// This is typically the size of the largest data cache line in the platform. + /// The value in this field is a constant that must not be modified after the + /// CPU Architectural Protocol is installed. All consumers must treat this as + /// a read-only field. + /// + UINT32 DmaBufferAlignment; +}; + +extern EFI_GUID gEfiCpuArchProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DebugSupport.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DebugSupport.h new file mode 100644 index 000000000..e2b4b203a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DebugSupport.h @@ -0,0 +1,780 @@ +/** @file + DebugSupport protocol and supporting definitions as defined in the UEFI2.4 + specification. + + The DebugSupport protocol is used by source level debuggers to abstract the + processor and handle context save and restore operations. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR> + +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __DEBUG_SUPPORT_H__ +#define __DEBUG_SUPPORT_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/IndustryStandard/PeImage.h> + +typedef struct _EFI_DEBUG_SUPPORT_PROTOCOL EFI_DEBUG_SUPPORT_PROTOCOL; + +/// +/// Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}. +/// +#define EFI_DEBUG_SUPPORT_PROTOCOL_GUID \ + { \ + 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \ + } + +/// +/// Processor exception to be hooked. +/// All exception types for IA32, X64, Itanium and EBC processors are defined. +/// +typedef INTN EFI_EXCEPTION_TYPE; + +/// +/// IA-32 processor exception types. +/// +#define EXCEPT_IA32_DIVIDE_ERROR 0 +#define EXCEPT_IA32_DEBUG 1 +#define EXCEPT_IA32_NMI 2 +#define EXCEPT_IA32_BREAKPOINT 3 +#define EXCEPT_IA32_OVERFLOW 4 +#define EXCEPT_IA32_BOUND 5 +#define EXCEPT_IA32_INVALID_OPCODE 6 +#define EXCEPT_IA32_DOUBLE_FAULT 8 +#define EXCEPT_IA32_INVALID_TSS 10 +#define EXCEPT_IA32_SEG_NOT_PRESENT 11 +#define EXCEPT_IA32_STACK_FAULT 12 +#define EXCEPT_IA32_GP_FAULT 13 +#define EXCEPT_IA32_PAGE_FAULT 14 +#define EXCEPT_IA32_FP_ERROR 16 +#define EXCEPT_IA32_ALIGNMENT_CHECK 17 +#define EXCEPT_IA32_MACHINE_CHECK 18 +#define EXCEPT_IA32_SIMD 19 + +/// +/// FXSAVE_STATE. +/// FP / MMX / XMM registers (see fxrstor instruction definition). +/// +typedef struct { + UINT16 Fcw; + UINT16 Fsw; + UINT16 Ftw; + UINT16 Opcode; + UINT32 Eip; + UINT16 Cs; + UINT16 Reserved1; + UINT32 DataOffset; + UINT16 Ds; + UINT8 Reserved2[10]; + UINT8 St0Mm0[10], Reserved3[6]; + UINT8 St1Mm1[10], Reserved4[6]; + UINT8 St2Mm2[10], Reserved5[6]; + UINT8 St3Mm3[10], Reserved6[6]; + UINT8 St4Mm4[10], Reserved7[6]; + UINT8 St5Mm5[10], Reserved8[6]; + UINT8 St6Mm6[10], Reserved9[6]; + UINT8 St7Mm7[10], Reserved10[6]; + UINT8 Xmm0[16]; + UINT8 Xmm1[16]; + UINT8 Xmm2[16]; + UINT8 Xmm3[16]; + UINT8 Xmm4[16]; + UINT8 Xmm5[16]; + UINT8 Xmm6[16]; + UINT8 Xmm7[16]; + UINT8 Reserved11[14 * 16]; +} EFI_FX_SAVE_STATE_IA32; + +/// +/// IA-32 processor context definition. +/// +typedef struct { + UINT32 ExceptionData; + EFI_FX_SAVE_STATE_IA32 FxSaveState; + UINT32 Dr0; + UINT32 Dr1; + UINT32 Dr2; + UINT32 Dr3; + UINT32 Dr6; + UINT32 Dr7; + UINT32 Cr0; + UINT32 Cr1; /* Reserved */ + UINT32 Cr2; + UINT32 Cr3; + UINT32 Cr4; + UINT32 Eflags; + UINT32 Ldtr; + UINT32 Tr; + UINT32 Gdtr[2]; + UINT32 Idtr[2]; + UINT32 Eip; + UINT32 Gs; + UINT32 Fs; + UINT32 Es; + UINT32 Ds; + UINT32 Cs; + UINT32 Ss; + UINT32 Edi; + UINT32 Esi; + UINT32 Ebp; + UINT32 Esp; + UINT32 Ebx; + UINT32 Edx; + UINT32 Ecx; + UINT32 Eax; +} EFI_SYSTEM_CONTEXT_IA32; + +/// +/// x64 processor exception types. +/// +#define EXCEPT_X64_DIVIDE_ERROR 0 +#define EXCEPT_X64_DEBUG 1 +#define EXCEPT_X64_NMI 2 +#define EXCEPT_X64_BREAKPOINT 3 +#define EXCEPT_X64_OVERFLOW 4 +#define EXCEPT_X64_BOUND 5 +#define EXCEPT_X64_INVALID_OPCODE 6 +#define EXCEPT_X64_DOUBLE_FAULT 8 +#define EXCEPT_X64_INVALID_TSS 10 +#define EXCEPT_X64_SEG_NOT_PRESENT 11 +#define EXCEPT_X64_STACK_FAULT 12 +#define EXCEPT_X64_GP_FAULT 13 +#define EXCEPT_X64_PAGE_FAULT 14 +#define EXCEPT_X64_FP_ERROR 16 +#define EXCEPT_X64_ALIGNMENT_CHECK 17 +#define EXCEPT_X64_MACHINE_CHECK 18 +#define EXCEPT_X64_SIMD 19 + +/// +/// FXSAVE_STATE. +/// FP / MMX / XMM registers (see fxrstor instruction definition). +/// +typedef struct { + UINT16 Fcw; + UINT16 Fsw; + UINT16 Ftw; + UINT16 Opcode; + UINT64 Rip; + UINT64 DataOffset; + UINT8 Reserved1[8]; + UINT8 St0Mm0[10], Reserved2[6]; + UINT8 St1Mm1[10], Reserved3[6]; + UINT8 St2Mm2[10], Reserved4[6]; + UINT8 St3Mm3[10], Reserved5[6]; + UINT8 St4Mm4[10], Reserved6[6]; + UINT8 St5Mm5[10], Reserved7[6]; + UINT8 St6Mm6[10], Reserved8[6]; + UINT8 St7Mm7[10], Reserved9[6]; + UINT8 Xmm0[16]; + UINT8 Xmm1[16]; + UINT8 Xmm2[16]; + UINT8 Xmm3[16]; + UINT8 Xmm4[16]; + UINT8 Xmm5[16]; + UINT8 Xmm6[16]; + UINT8 Xmm7[16]; + // + // NOTE: UEFI 2.0 spec definition as follows. + // + UINT8 Reserved11[14 * 16]; +} EFI_FX_SAVE_STATE_X64; + +/// +/// x64 processor context definition. +/// +typedef struct { + UINT64 ExceptionData; + EFI_FX_SAVE_STATE_X64 FxSaveState; + UINT64 Dr0; + UINT64 Dr1; + UINT64 Dr2; + UINT64 Dr3; + UINT64 Dr6; + UINT64 Dr7; + UINT64 Cr0; + UINT64 Cr1; /* Reserved */ + UINT64 Cr2; + UINT64 Cr3; + UINT64 Cr4; + UINT64 Cr8; + UINT64 Rflags; + UINT64 Ldtr; + UINT64 Tr; + UINT64 Gdtr[2]; + UINT64 Idtr[2]; + UINT64 Rip; + UINT64 Gs; + UINT64 Fs; + UINT64 Es; + UINT64 Ds; + UINT64 Cs; + UINT64 Ss; + UINT64 Rdi; + UINT64 Rsi; + UINT64 Rbp; + UINT64 Rsp; + UINT64 Rbx; + UINT64 Rdx; + UINT64 Rcx; + UINT64 Rax; + UINT64 R8; + UINT64 R9; + UINT64 R10; + UINT64 R11; + UINT64 R12; + UINT64 R13; + UINT64 R14; + UINT64 R15; +} EFI_SYSTEM_CONTEXT_X64; + +/// +/// Itanium Processor Family Exception types. +/// +#define EXCEPT_IPF_VHTP_TRANSLATION 0 +#define EXCEPT_IPF_INSTRUCTION_TLB 1 +#define EXCEPT_IPF_DATA_TLB 2 +#define EXCEPT_IPF_ALT_INSTRUCTION_TLB 3 +#define EXCEPT_IPF_ALT_DATA_TLB 4 +#define EXCEPT_IPF_DATA_NESTED_TLB 5 +#define EXCEPT_IPF_INSTRUCTION_KEY_MISSED 6 +#define EXCEPT_IPF_DATA_KEY_MISSED 7 +#define EXCEPT_IPF_DIRTY_BIT 8 +#define EXCEPT_IPF_INSTRUCTION_ACCESS_BIT 9 +#define EXCEPT_IPF_DATA_ACCESS_BIT 10 +#define EXCEPT_IPF_BREAKPOINT 11 +#define EXCEPT_IPF_EXTERNAL_INTERRUPT 12 +// +// 13 - 19 reserved +// +#define EXCEPT_IPF_PAGE_NOT_PRESENT 20 +#define EXCEPT_IPF_KEY_PERMISSION 21 +#define EXCEPT_IPF_INSTRUCTION_ACCESS_RIGHTS 22 +#define EXCEPT_IPF_DATA_ACCESS_RIGHTS 23 +#define EXCEPT_IPF_GENERAL_EXCEPTION 24 +#define EXCEPT_IPF_DISABLED_FP_REGISTER 25 +#define EXCEPT_IPF_NAT_CONSUMPTION 26 +#define EXCEPT_IPF_SPECULATION 27 +// +// 28 reserved +// +#define EXCEPT_IPF_DEBUG 29 +#define EXCEPT_IPF_UNALIGNED_REFERENCE 30 +#define EXCEPT_IPF_UNSUPPORTED_DATA_REFERENCE 31 +#define EXCEPT_IPF_FP_FAULT 32 +#define EXCEPT_IPF_FP_TRAP 33 +#define EXCEPT_IPF_LOWER_PRIVILEGE_TRANSFER_TRAP 34 +#define EXCEPT_IPF_TAKEN_BRANCH 35 +#define EXCEPT_IPF_SINGLE_STEP 36 +// +// 37 - 44 reserved +// +#define EXCEPT_IPF_IA32_EXCEPTION 45 +#define EXCEPT_IPF_IA32_INTERCEPT 46 +#define EXCEPT_IPF_IA32_INTERRUPT 47 + +/// +/// IPF processor context definition. +/// +typedef struct { + // + // The first reserved field is necessary to preserve alignment for the correct + // bits in UNAT and to insure F2 is 16 byte aligned. + // + UINT64 Reserved; + UINT64 R1; + UINT64 R2; + UINT64 R3; + UINT64 R4; + UINT64 R5; + UINT64 R6; + UINT64 R7; + UINT64 R8; + UINT64 R9; + UINT64 R10; + UINT64 R11; + UINT64 R12; + UINT64 R13; + UINT64 R14; + UINT64 R15; + UINT64 R16; + UINT64 R17; + UINT64 R18; + UINT64 R19; + UINT64 R20; + UINT64 R21; + UINT64 R22; + UINT64 R23; + UINT64 R24; + UINT64 R25; + UINT64 R26; + UINT64 R27; + UINT64 R28; + UINT64 R29; + UINT64 R30; + UINT64 R31; + + UINT64 F2[2]; + UINT64 F3[2]; + UINT64 F4[2]; + UINT64 F5[2]; + UINT64 F6[2]; + UINT64 F7[2]; + UINT64 F8[2]; + UINT64 F9[2]; + UINT64 F10[2]; + UINT64 F11[2]; + UINT64 F12[2]; + UINT64 F13[2]; + UINT64 F14[2]; + UINT64 F15[2]; + UINT64 F16[2]; + UINT64 F17[2]; + UINT64 F18[2]; + UINT64 F19[2]; + UINT64 F20[2]; + UINT64 F21[2]; + UINT64 F22[2]; + UINT64 F23[2]; + UINT64 F24[2]; + UINT64 F25[2]; + UINT64 F26[2]; + UINT64 F27[2]; + UINT64 F28[2]; + UINT64 F29[2]; + UINT64 F30[2]; + UINT64 F31[2]; + + UINT64 Pr; + + UINT64 B0; + UINT64 B1; + UINT64 B2; + UINT64 B3; + UINT64 B4; + UINT64 B5; + UINT64 B6; + UINT64 B7; + + // + // application registers + // + UINT64 ArRsc; + UINT64 ArBsp; + UINT64 ArBspstore; + UINT64 ArRnat; + + UINT64 ArFcr; + + UINT64 ArEflag; + UINT64 ArCsd; + UINT64 ArSsd; + UINT64 ArCflg; + UINT64 ArFsr; + UINT64 ArFir; + UINT64 ArFdr; + + UINT64 ArCcv; + + UINT64 ArUnat; + + UINT64 ArFpsr; + + UINT64 ArPfs; + UINT64 ArLc; + UINT64 ArEc; + + // + // control registers + // + UINT64 CrDcr; + UINT64 CrItm; + UINT64 CrIva; + UINT64 CrPta; + UINT64 CrIpsr; + UINT64 CrIsr; + UINT64 CrIip; + UINT64 CrIfa; + UINT64 CrItir; + UINT64 CrIipa; + UINT64 CrIfs; + UINT64 CrIim; + UINT64 CrIha; + + // + // debug registers + // + UINT64 Dbr0; + UINT64 Dbr1; + UINT64 Dbr2; + UINT64 Dbr3; + UINT64 Dbr4; + UINT64 Dbr5; + UINT64 Dbr6; + UINT64 Dbr7; + + UINT64 Ibr0; + UINT64 Ibr1; + UINT64 Ibr2; + UINT64 Ibr3; + UINT64 Ibr4; + UINT64 Ibr5; + UINT64 Ibr6; + UINT64 Ibr7; + + // + // virtual registers - nat bits for R1-R31 + // + UINT64 IntNat; + +} EFI_SYSTEM_CONTEXT_IPF; + +/// +/// EBC processor exception types. +/// +#define EXCEPT_EBC_UNDEFINED 0 +#define EXCEPT_EBC_DIVIDE_ERROR 1 +#define EXCEPT_EBC_DEBUG 2 +#define EXCEPT_EBC_BREAKPOINT 3 +#define EXCEPT_EBC_OVERFLOW 4 +#define EXCEPT_EBC_INVALID_OPCODE 5 ///< Opcode out of range. +#define EXCEPT_EBC_STACK_FAULT 6 +#define EXCEPT_EBC_ALIGNMENT_CHECK 7 +#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 ///< Malformed instruction. +#define EXCEPT_EBC_BAD_BREAK 9 ///< BREAK 0 or undefined BREAK. +#define EXCEPT_EBC_STEP 10 ///< To support debug stepping. +/// +/// For coding convenience, define the maximum valid EBC exception. +/// +#define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP + +/// +/// EBC processor context definition. +/// +typedef struct { + UINT64 R0; + UINT64 R1; + UINT64 R2; + UINT64 R3; + UINT64 R4; + UINT64 R5; + UINT64 R6; + UINT64 R7; + UINT64 Flags; + UINT64 ControlFlags; + UINT64 Ip; +} EFI_SYSTEM_CONTEXT_EBC; + + + +/// +/// ARM processor exception types. +/// +#define EXCEPT_ARM_RESET 0 +#define EXCEPT_ARM_UNDEFINED_INSTRUCTION 1 +#define EXCEPT_ARM_SOFTWARE_INTERRUPT 2 +#define EXCEPT_ARM_PREFETCH_ABORT 3 +#define EXCEPT_ARM_DATA_ABORT 4 +#define EXCEPT_ARM_RESERVED 5 +#define EXCEPT_ARM_IRQ 6 +#define EXCEPT_ARM_FIQ 7 + +/// +/// For coding convenience, define the maximum valid ARM exception. +/// +#define MAX_ARM_EXCEPTION EXCEPT_ARM_FIQ + +/// +/// ARM processor context definition. +/// +typedef struct { + UINT32 R0; + UINT32 R1; + UINT32 R2; + UINT32 R3; + UINT32 R4; + UINT32 R5; + UINT32 R6; + UINT32 R7; + UINT32 R8; + UINT32 R9; + UINT32 R10; + UINT32 R11; + UINT32 R12; + UINT32 SP; + UINT32 LR; + UINT32 PC; + UINT32 CPSR; + UINT32 DFSR; + UINT32 DFAR; + UINT32 IFSR; + UINT32 IFAR; +} EFI_SYSTEM_CONTEXT_ARM; + + +/// +/// AARCH64 processor exception types. +/// +#define EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 0 +#define EXCEPT_AARCH64_IRQ 1 +#define EXCEPT_AARCH64_FIQ 2 +#define EXCEPT_AARCH64_SERROR 3 + +/// +/// For coding convenience, define the maximum valid ARM exception. +/// +#define MAX_AARCH64_EXCEPTION EXCEPT_AARCH64_SERROR + +typedef struct { + // General Purpose Registers + UINT64 X0; + UINT64 X1; + UINT64 X2; + UINT64 X3; + UINT64 X4; + UINT64 X5; + UINT64 X6; + UINT64 X7; + UINT64 X8; + UINT64 X9; + UINT64 X10; + UINT64 X11; + UINT64 X12; + UINT64 X13; + UINT64 X14; + UINT64 X15; + UINT64 X16; + UINT64 X17; + UINT64 X18; + UINT64 X19; + UINT64 X20; + UINT64 X21; + UINT64 X22; + UINT64 X23; + UINT64 X24; + UINT64 X25; + UINT64 X26; + UINT64 X27; + UINT64 X28; + UINT64 FP; // x29 - Frame pointer + UINT64 LR; // x30 - Link Register + UINT64 SP; // x31 - Stack pointer + + // FP/SIMD Registers + UINT64 V0[2]; + UINT64 V1[2]; + UINT64 V2[2]; + UINT64 V3[2]; + UINT64 V4[2]; + UINT64 V5[2]; + UINT64 V6[2]; + UINT64 V7[2]; + UINT64 V8[2]; + UINT64 V9[2]; + UINT64 V10[2]; + UINT64 V11[2]; + UINT64 V12[2]; + UINT64 V13[2]; + UINT64 V14[2]; + UINT64 V15[2]; + UINT64 V16[2]; + UINT64 V17[2]; + UINT64 V18[2]; + UINT64 V19[2]; + UINT64 V20[2]; + UINT64 V21[2]; + UINT64 V22[2]; + UINT64 V23[2]; + UINT64 V24[2]; + UINT64 V25[2]; + UINT64 V26[2]; + UINT64 V27[2]; + UINT64 V28[2]; + UINT64 V29[2]; + UINT64 V30[2]; + UINT64 V31[2]; + + UINT64 ELR; // Exception Link Register + UINT64 SPSR; // Saved Processor Status Register + UINT64 FPSR; // Floating Point Status Register + UINT64 ESR; // Exception syndrome register + UINT64 FAR; // Fault Address Register +} EFI_SYSTEM_CONTEXT_AARCH64; + + +/// +/// Universal EFI_SYSTEM_CONTEXT definition. +/// +typedef union { + EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc; + EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32; + EFI_SYSTEM_CONTEXT_X64 *SystemContextX64; + EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf; + EFI_SYSTEM_CONTEXT_ARM *SystemContextArm; + EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64; +} EFI_SYSTEM_CONTEXT; + +// +// DebugSupport callback function prototypes +// + +/** + Registers and enables an exception callback function for the specified exception. + + @param ExceptionType Exception types in EBC, IA-32, x64, or IPF. + @param SystemContext Exception content. + +**/ +typedef +VOID +(EFIAPI *EFI_EXCEPTION_CALLBACK)( + IN EFI_EXCEPTION_TYPE ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ); + +/** + Registers and enables the on-target debug agent's periodic entry point. + + @param SystemContext Exception content. + +**/ +typedef +VOID +(EFIAPI *EFI_PERIODIC_CALLBACK)( + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ); + +/// +/// Machine type definition +/// +typedef enum { + IsaIa32 = IMAGE_FILE_MACHINE_I386, ///< 0x014C + IsaX64 = IMAGE_FILE_MACHINE_X64, ///< 0x8664 + IsaIpf = IMAGE_FILE_MACHINE_IA64, ///< 0x0200 + IsaEbc = IMAGE_FILE_MACHINE_EBC, ///< 0x0EBC + IsaArm = IMAGE_FILE_MACHINE_ARMTHUMB_MIXED, ///< 0x01c2 + IsaAArch64 = IMAGE_FILE_MACHINE_ARM64 ///< 0xAA64 +} EFI_INSTRUCTION_SET_ARCHITECTURE; + + +// +// DebugSupport member function definitions +// + +/** + Returns the maximum value that may be used for the ProcessorIndex parameter in + RegisterPeriodicCallback() and RegisterExceptionCallback(). + + @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. + @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported + processor index is returned. + + @retval EFI_SUCCESS The function completed successfully. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_MAXIMUM_PROCESSOR_INDEX)( + IN EFI_DEBUG_SUPPORT_PROTOCOL *This, + OUT UINTN *MaxProcessorIndex + ); + +/** + Registers a function to be called back periodically in interrupt context. + + @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. + @param ProcessorIndex Specifies which processor the callback function applies to. + @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main + periodic entry point of the debug agent. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback + function was previously registered. + @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback + function. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_REGISTER_PERIODIC_CALLBACK)( + IN EFI_DEBUG_SUPPORT_PROTOCOL *This, + IN UINTN ProcessorIndex, + IN EFI_PERIODIC_CALLBACK PeriodicCallback + ); + +/** + Registers a function to be called when a given processor exception occurs. + + @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. + @param ProcessorIndex Specifies which processor the callback function applies to. + @param ExceptionCallback A pointer to a function of type EXCEPTION_CALLBACK that is called + when the processor exception specified by ExceptionType occurs. + @param ExceptionType Specifies which processor exception to hook. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback + function was previously registered. + @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback + function. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_REGISTER_EXCEPTION_CALLBACK)( + IN EFI_DEBUG_SUPPORT_PROTOCOL *This, + IN UINTN ProcessorIndex, + IN EFI_EXCEPTION_CALLBACK ExceptionCallback, + IN EFI_EXCEPTION_TYPE ExceptionType + ); + +/** + Invalidates processor instruction cache for a memory range. Subsequent execution in this range + causes a fresh memory fetch to retrieve code to be executed. + + @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. + @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated. + @param Start Specifies the physical base of the memory range to be invalidated. + @param Length Specifies the minimum number of bytes in the processor's instruction + cache to invalidate. + + @retval EFI_SUCCESS The function completed successfully. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INVALIDATE_INSTRUCTION_CACHE)( + IN EFI_DEBUG_SUPPORT_PROTOCOL *This, + IN UINTN ProcessorIndex, + IN VOID *Start, + IN UINT64 Length + ); + +/// +/// This protocol provides the services to allow the debug agent to register +/// callback functions that are called either periodically or when specific +/// processor exceptions occur. +/// +struct _EFI_DEBUG_SUPPORT_PROTOCOL { + /// + /// Declares the processor architecture for this instance of the EFI Debug Support protocol. + /// + EFI_INSTRUCTION_SET_ARCHITECTURE Isa; + EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex; + EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback; + EFI_REGISTER_EXCEPTION_CALLBACK RegisterExceptionCallback; + EFI_INVALIDATE_INSTRUCTION_CACHE InvalidateInstructionCache; +}; + +extern EFI_GUID gEfiDebugSupportProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DevicePath.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DevicePath.h new file mode 100644 index 000000000..a305df575 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DevicePath.h @@ -0,0 +1,1171 @@ +/** @file + The device path protocol as defined in UEFI 2.0. + + The device path represents a programmatic path to a device, + from a software point of view. The path must persist from boot to boot, so + it can not contain things like PCI bus numbers that change from boot to boot. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EFI_DEVICE_PATH_PROTOCOL_H__ +#define __EFI_DEVICE_PATH_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Guid/PcAnsi.h> + +/// +/// Device Path protocol. +/// +#define EFI_DEVICE_PATH_PROTOCOL_GUID \ + { \ + 0x9576e91, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +/// +/// Device Path guid definition for backward-compatible with EFI1.1. +/// +#define DEVICE_PATH_PROTOCOL EFI_DEVICE_PATH_PROTOCOL_GUID + +#pragma pack(1) + +/** + This protocol can be used on any device handle to obtain generic path/location + information concerning the physical device or logical device. If the handle does + not logically map to a physical device, the handle may not necessarily support + the device path protocol. The device path describes the location of the device + the handle is for. The size of the Device Path can be determined from the structures + that make up the Device Path. +**/ +typedef struct { + UINT8 Type; ///< 0x01 Hardware Device Path. + ///< 0x02 ACPI Device Path. + ///< 0x03 Messaging Device Path. + ///< 0x04 Media Device Path. + ///< 0x05 BIOS Boot Specification Device Path. + ///< 0x7F End of Hardware Device Path. + + UINT8 SubType; ///< Varies by Type + ///< 0xFF End Entire Device Path, or + ///< 0x01 End This Instance of a Device Path and start a new + ///< Device Path. + + UINT8 Length[2]; ///< Specific Device Path data. Type and Sub-Type define + ///< type of data. Size of data is included in Length. + +} EFI_DEVICE_PATH_PROTOCOL; + +/// +/// Device Path protocol definition for backward-compatible with EFI1.1. +/// +typedef EFI_DEVICE_PATH_PROTOCOL EFI_DEVICE_PATH; + +/// +/// Hardware Device Paths. +/// +#define HARDWARE_DEVICE_PATH 0x01 + +/// +/// PCI Device Path SubType. +/// +#define HW_PCI_DP 0x01 + +/// +/// PCI Device Path. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// PCI Function Number. + /// + UINT8 Function; + /// + /// PCI Device Number. + /// + UINT8 Device; +} PCI_DEVICE_PATH; + +/// +/// PCCARD Device Path SubType. +/// +#define HW_PCCARD_DP 0x02 + +/// +/// PCCARD Device Path. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Function Number (0 = First Function). + /// + UINT8 FunctionNumber; +} PCCARD_DEVICE_PATH; + +/// +/// Memory Mapped Device Path SubType. +/// +#define HW_MEMMAP_DP 0x03 + +/// +/// Memory Mapped Device Path. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// EFI_MEMORY_TYPE + /// + UINT32 MemoryType; + /// + /// Starting Memory Address. + /// + EFI_PHYSICAL_ADDRESS StartingAddress; + /// + /// Ending Memory Address. + /// + EFI_PHYSICAL_ADDRESS EndingAddress; +} MEMMAP_DEVICE_PATH; + +/// +/// Hardware Vendor Device Path SubType. +/// +#define HW_VENDOR_DP 0x04 + +/// +/// The Vendor Device Path allows the creation of vendor-defined Device Paths. A vendor must +/// allocate a Vendor GUID for a Device Path. The Vendor GUID can then be used to define the +/// contents on the n bytes that follow in the Vendor Device Path node. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Vendor-assigned GUID that defines the data that follows. + /// + EFI_GUID Guid; + /// + /// Vendor-defined variable size data. + /// +} VENDOR_DEVICE_PATH; + +/// +/// Controller Device Path SubType. +/// +#define HW_CONTROLLER_DP 0x05 + +/// +/// Controller Device Path. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Controller number. + /// + UINT32 ControllerNumber; +} CONTROLLER_DEVICE_PATH; + +/// +/// ACPI Device Paths. +/// +#define ACPI_DEVICE_PATH 0x02 + +/// +/// ACPI Device Path SubType. +/// +#define ACPI_DP 0x01 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Device's PnP hardware ID stored in a numeric 32-bit + /// compressed EISA-type ID. This value must match the + /// corresponding _HID in the ACPI name space. + /// + UINT32 HID; + /// + /// Unique ID that is required by ACPI if two devices have the + /// same _HID. This value must also match the corresponding + /// _UID/_HID pair in the ACPI name space. Only the 32-bit + /// numeric value type of _UID is supported. Thus, strings must + /// not be used for the _UID in the ACPI name space. + /// + UINT32 UID; +} ACPI_HID_DEVICE_PATH; + +/// +/// Expanded ACPI Device Path SubType. +/// +#define ACPI_EXTENDED_DP 0x02 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Device's PnP hardware ID stored in a numeric 32-bit + /// compressed EISA-type ID. This value must match the + /// corresponding _HID in the ACPI name space. + /// + UINT32 HID; + /// + /// Unique ID that is required by ACPI if two devices have the + /// same _HID. This value must also match the corresponding + /// _UID/_HID pair in the ACPI name space. + /// + UINT32 UID; + /// + /// Device's compatible PnP hardware ID stored in a numeric + /// 32-bit compressed EISA-type ID. This value must match at + /// least one of the compatible device IDs returned by the + /// corresponding _CID in the ACPI name space. + /// + UINT32 CID; + /// + /// Optional variable length _HIDSTR. + /// Optional variable length _UIDSTR. + /// Optional variable length _CIDSTR. + /// +} ACPI_EXTENDED_HID_DEVICE_PATH; + +// +// EISA ID Macro +// EISA ID Definition 32-bits +// bits[15:0] - three character compressed ASCII EISA ID. +// bits[31:16] - binary number +// Compressed ASCII is 5 bits per character 0b00001 = 'A' 0b11010 = 'Z' +// +#define PNP_EISA_ID_CONST 0x41d0 +#define EISA_ID(_Name, _Num) ((UINT32)((_Name) | (_Num) << 16)) +#define EISA_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId))) +#define EFI_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId))) + +#define PNP_EISA_ID_MASK 0xffff +#define EISA_ID_TO_NUM(_Id) ((_Id) >> 16) + +/// +/// ACPI _ADR Device Path SubType. +/// +#define ACPI_ADR_DP 0x03 + +/// +/// The _ADR device path is used to contain video output device attributes to support the Graphics +/// Output Protocol. The device path can contain multiple _ADR entries if multiple video output +/// devices are displaying the same output. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// _ADR value. For video output devices the value of this + /// field comes from Table B-2 of the ACPI 3.0 specification. At + /// least one _ADR value is required. + /// + UINT32 ADR; + // + // This device path may optionally contain more than one _ADR entry. + // +} ACPI_ADR_DEVICE_PATH; + +#define ACPI_ADR_DISPLAY_TYPE_OTHER 0 +#define ACPI_ADR_DISPLAY_TYPE_VGA 1 +#define ACPI_ADR_DISPLAY_TYPE_TV 2 +#define ACPI_ADR_DISPLAY_TYPE_EXTERNAL_DIGITAL 3 +#define ACPI_ADR_DISPLAY_TYPE_INTERNAL_DIGITAL 4 + +#define ACPI_DISPLAY_ADR(_DeviceIdScheme, _HeadId, _NonVgaOutput, _BiosCanDetect, _VendorInfo, _Type, _Port, _Index) \ + ((UINT32)( (((_DeviceIdScheme) & 0x1) << 31) | \ + (((_HeadId) & 0x7) << 18) | \ + (((_NonVgaOutput) & 0x1) << 17) | \ + (((_BiosCanDetect) & 0x1) << 16) | \ + (((_VendorInfo) & 0xf) << 12) | \ + (((_Type) & 0xf) << 8) | \ + (((_Port) & 0xf) << 4) | \ + ((_Index) & 0xf) )) + +/// +/// Messaging Device Paths. +/// This Device Path is used to describe the connection of devices outside the resource domain of the +/// system. This Device Path can describe physical messaging information like SCSI ID, or abstract +/// information like networking protocol IP addresses. +/// +#define MESSAGING_DEVICE_PATH 0x03 + +/// +/// ATAPI Device Path SubType +/// +#define MSG_ATAPI_DP 0x01 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Set to zero for primary, or one for secondary. + /// + UINT8 PrimarySecondary; + /// + /// Set to zero for master, or one for slave mode. + /// + UINT8 SlaveMaster; + /// + /// Logical Unit Number. + /// + UINT16 Lun; +} ATAPI_DEVICE_PATH; + +/// +/// SCSI Device Path SubType. +/// +#define MSG_SCSI_DP 0x02 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Target ID on the SCSI bus (PUN). + /// + UINT16 Pun; + /// + /// Logical Unit Number (LUN). + /// + UINT16 Lun; +} SCSI_DEVICE_PATH; + +/// +/// Fibre Channel SubType. +/// +#define MSG_FIBRECHANNEL_DP 0x03 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Reserved for the future. + /// + UINT32 Reserved; + /// + /// Fibre Channel World Wide Number. + /// + UINT64 WWN; + /// + /// Fibre Channel Logical Unit Number. + /// + UINT64 Lun; +} FIBRECHANNEL_DEVICE_PATH; + +/// +/// Fibre Channel Ex SubType. +/// +#define MSG_FIBRECHANNELEX_DP 0x15 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Reserved for the future. + /// + UINT32 Reserved; + /// + /// 8 byte array containing Fibre Channel End Device Port Name. + /// + UINT8 WWN[8]; + /// + /// 8 byte array containing Fibre Channel Logical Unit Number. + /// + UINT8 Lun[8]; +} FIBRECHANNELEX_DEVICE_PATH; + +/// +/// 1394 Device Path SubType +/// +#define MSG_1394_DP 0x04 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Reserved for the future. + /// + UINT32 Reserved; + /// + /// 1394 Global Unique ID (GUID). + /// + UINT64 Guid; +} F1394_DEVICE_PATH; + +/// +/// USB Device Path SubType. +/// +#define MSG_USB_DP 0x05 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// USB Parent Port Number. + /// + UINT8 ParentPortNumber; + /// + /// USB Interface Number. + /// + UINT8 InterfaceNumber; +} USB_DEVICE_PATH; + +/// +/// USB Class Device Path SubType. +/// +#define MSG_USB_CLASS_DP 0x0f +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Vendor ID assigned by USB-IF. A value of 0xFFFF will + /// match any Vendor ID. + /// + UINT16 VendorId; + /// + /// Product ID assigned by USB-IF. A value of 0xFFFF will + /// match any Product ID. + /// + UINT16 ProductId; + /// + /// The class code assigned by the USB-IF. A value of 0xFF + /// will match any class code. + /// + UINT8 DeviceClass; + /// + /// The subclass code assigned by the USB-IF. A value of + /// 0xFF will match any subclass code. + /// + UINT8 DeviceSubClass; + /// + /// The protocol code assigned by the USB-IF. A value of + /// 0xFF will match any protocol code. + /// + UINT8 DeviceProtocol; +} USB_CLASS_DEVICE_PATH; + +/// +/// USB WWID Device Path SubType. +/// +#define MSG_USB_WWID_DP 0x10 + +/// +/// This device path describes a USB device using its serial number. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// USB interface number. + /// + UINT16 InterfaceNumber; + /// + /// USB vendor id of the device. + /// + UINT16 VendorId; + /// + /// USB product id of the device. + /// + UINT16 ProductId; + /// + /// Last 64-or-fewer UTF-16 characters of the USB + /// serial number. The length of the string is + /// determined by the Length field less the offset of the + /// Serial Number field (10) + /// + /// CHAR16 SerialNumber[...]; +} USB_WWID_DEVICE_PATH; + +/// +/// Device Logical Unit SubType. +/// +#define MSG_DEVICE_LOGICAL_UNIT_DP 0x11 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Logical Unit Number for the interface. + /// + UINT8 Lun; +} DEVICE_LOGICAL_UNIT_DEVICE_PATH; + +/// +/// SATA Device Path SubType. +/// +#define MSG_SATA_DP 0x12 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// The HBA port number that facilitates the connection to the + /// device or a port multiplier. The value 0xFFFF is reserved. + /// + UINT16 HBAPortNumber; + /// + /// The Port multiplier port number that facilitates the connection + /// to the device. Bit 15 should be set if the device is directly + /// connected to the HBA. + /// + UINT16 PortMultiplierPortNumber; + /// + /// Logical Unit Number. + /// + UINT16 Lun; +} SATA_DEVICE_PATH; + +/// +/// Flag for if the device is directly connected to the HBA. +/// +#define SATA_HBA_DIRECT_CONNECT_FLAG 0x8000 + +/// +/// I2O Device Path SubType. +/// +#define MSG_I2O_DP 0x06 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Target ID (TID) for a device. + /// + UINT32 Tid; +} I2O_DEVICE_PATH; + +/// +/// MAC Address Device Path SubType. +/// +#define MSG_MAC_ADDR_DP 0x0b +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// The MAC address for a network interface padded with 0s. + /// + EFI_MAC_ADDRESS MacAddress; + /// + /// Network interface type(i.e. 802.3, FDDI). + /// + UINT8 IfType; +} MAC_ADDR_DEVICE_PATH; + +/// +/// IPv4 Device Path SubType +/// +#define MSG_IPv4_DP 0x0c +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// The local IPv4 address. + /// + EFI_IPv4_ADDRESS LocalIpAddress; + /// + /// The remote IPv4 address. + /// + EFI_IPv4_ADDRESS RemoteIpAddress; + /// + /// The local port number. + /// + UINT16 LocalPort; + /// + /// The remote port number. + /// + UINT16 RemotePort; + /// + /// The network protocol(i.e. UDP, TCP). + /// + UINT16 Protocol; + /// + /// 0x00 - The Source IP Address was assigned though DHCP. + /// 0x01 - The Source IP Address is statically bound. + /// + BOOLEAN StaticIpAddress; + /// + /// The gateway IP address + /// + EFI_IPv4_ADDRESS GatewayIpAddress; + /// + /// The subnet mask + /// + EFI_IPv4_ADDRESS SubnetMask; +} IPv4_DEVICE_PATH; + +/// +/// IPv6 Device Path SubType. +/// +#define MSG_IPv6_DP 0x0d +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// The local IPv6 address. + /// + EFI_IPv6_ADDRESS LocalIpAddress; + /// + /// The remote IPv6 address. + /// + EFI_IPv6_ADDRESS RemoteIpAddress; + /// + /// The local port number. + /// + UINT16 LocalPort; + /// + /// The remote port number. + /// + UINT16 RemotePort; + /// + /// The network protocol(i.e. UDP, TCP). + /// + UINT16 Protocol; + /// + /// 0x00 - The Local IP Address was manually configured. + /// 0x01 - The Local IP Address is assigned through IPv6 + /// stateless auto-configuration. + /// 0x02 - The Local IP Address is assigned through IPv6 + /// stateful configuration. + /// + UINT8 IpAddressOrigin; + /// + /// The prefix length + /// + UINT8 PrefixLength; + /// + /// The gateway IP address + /// + EFI_IPv6_ADDRESS GatewayIpAddress; +} IPv6_DEVICE_PATH; + +/// +/// InfiniBand Device Path SubType. +/// +#define MSG_INFINIBAND_DP 0x09 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Flags to help identify/manage InfiniBand device path elements: + /// Bit 0 - IOC/Service (0b = IOC, 1b = Service). + /// Bit 1 - Extend Boot Environment. + /// Bit 2 - Console Protocol. + /// Bit 3 - Storage Protocol. + /// Bit 4 - Network Protocol. + /// All other bits are reserved. + /// + UINT32 ResourceFlags; + /// + /// 128-bit Global Identifier for remote fabric port. + /// + UINT8 PortGid[16]; + /// + /// 64-bit unique identifier to remote IOC or server process. + /// Interpretation of field specified by Resource Flags (bit 0). + /// + UINT64 ServiceId; + /// + /// 64-bit persistent ID of remote IOC port. + /// + UINT64 TargetPortId; + /// + /// 64-bit persistent ID of remote device. + /// + UINT64 DeviceId; +} INFINIBAND_DEVICE_PATH; + +#define INFINIBAND_RESOURCE_FLAG_IOC_SERVICE 0x01 +#define INFINIBAND_RESOURCE_FLAG_EXTENDED_BOOT_ENVIRONMENT 0x02 +#define INFINIBAND_RESOURCE_FLAG_CONSOLE_PROTOCOL 0x04 +#define INFINIBAND_RESOURCE_FLAG_STORAGE_PROTOCOL 0x08 +#define INFINIBAND_RESOURCE_FLAG_NETWORK_PROTOCOL 0x10 + +/// +/// UART Device Path SubType. +/// +#define MSG_UART_DP 0x0e +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Reserved. + /// + UINT32 Reserved; + /// + /// The baud rate setting for the UART style device. A value of 0 + /// means that the device's default baud rate will be used. + /// + UINT64 BaudRate; + /// + /// The number of data bits for the UART style device. A value + /// of 0 means that the device's default number of data bits will be used. + /// + UINT8 DataBits; + /// + /// The parity setting for the UART style device. + /// Parity 0x00 - Default Parity. + /// Parity 0x01 - No Parity. + /// Parity 0x02 - Even Parity. + /// Parity 0x03 - Odd Parity. + /// Parity 0x04 - Mark Parity. + /// Parity 0x05 - Space Parity. + /// + UINT8 Parity; + /// + /// The number of stop bits for the UART style device. + /// Stop Bits 0x00 - Default Stop Bits. + /// Stop Bits 0x01 - 1 Stop Bit. + /// Stop Bits 0x02 - 1.5 Stop Bits. + /// Stop Bits 0x03 - 2 Stop Bits. + /// + UINT8 StopBits; +} UART_DEVICE_PATH; + +// +// Use VENDOR_DEVICE_PATH struct +// +#define MSG_VENDOR_DP 0x0a +typedef VENDOR_DEVICE_PATH VENDOR_DEFINED_DEVICE_PATH; + +#define DEVICE_PATH_MESSAGING_PC_ANSI EFI_PC_ANSI_GUID +#define DEVICE_PATH_MESSAGING_VT_100 EFI_VT_100_GUID +#define DEVICE_PATH_MESSAGING_VT_100_PLUS EFI_VT_100_PLUS_GUID +#define DEVICE_PATH_MESSAGING_VT_UTF8 EFI_VT_UTF8_GUID + +/// +/// A new device path node is defined to declare flow control characteristics. +/// UART Flow Control Messaging Device Path +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL GUID. + /// + EFI_GUID Guid; + /// + /// Bitmap of supported flow control types. + /// Bit 0 set indicates hardware flow control. + /// Bit 1 set indicates Xon/Xoff flow control. + /// All other bits are reserved and are clear. + /// + UINT32 FlowControlMap; +} UART_FLOW_CONTROL_DEVICE_PATH; + +#define UART_FLOW_CONTROL_HARDWARE 0x00000001 +#define UART_FLOW_CONTROL_XON_XOFF 0x00000010 + +#define DEVICE_PATH_MESSAGING_SAS EFI_SAS_DEVICE_PATH_GUID +/// +/// Serial Attached SCSI (SAS) Device Path. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// DEVICE_PATH_MESSAGING_SAS GUID. + /// + EFI_GUID Guid; + /// + /// Reserved for future use. + /// + UINT32 Reserved; + /// + /// SAS Address for Serial Attached SCSI Target. + /// + UINT64 SasAddress; + /// + /// SAS Logical Unit Number. + /// + UINT64 Lun; + /// + /// More Information about the device and its interconnect. + /// + UINT16 DeviceTopology; + /// + /// Relative Target Port (RTP). + /// + UINT16 RelativeTargetPort; +} SAS_DEVICE_PATH; + +/// +/// Serial Attached SCSI (SAS) Ex Device Path SubType +/// +#define MSG_SASEX_DP 0x16 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// 8-byte array of the SAS Address for Serial Attached SCSI Target Port. + /// + UINT8 SasAddress[8]; + /// + /// 8-byte array of the SAS Logical Unit Number. + /// + UINT8 Lun[8]; + /// + /// More Information about the device and its interconnect. + /// + UINT16 DeviceTopology; + /// + /// Relative Target Port (RTP). + /// + UINT16 RelativeTargetPort; +} SASEX_DEVICE_PATH; + +/// +/// NvmExpress Namespace Device Path SubType. +/// +#define MSG_NVME_NAMESPACE_DP 0x17 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + UINT32 NamespaceId; + UINT64 NamespaceUuid; +} NVME_NAMESPACE_DEVICE_PATH; + +/// +/// iSCSI Device Path SubType +/// +#define MSG_ISCSI_DP 0x13 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Network Protocol (0 = TCP, 1+ = reserved). + /// + UINT16 NetworkProtocol; + /// + /// iSCSI Login Options. + /// + UINT16 LoginOption; + /// + /// iSCSI Logical Unit Number. + /// + UINT64 Lun; + /// + /// iSCSI Target Portal group tag the initiator intends + /// to establish a session with. + /// + UINT16 TargetPortalGroupTag; + /// + /// iSCSI NodeTarget Name. The length of the name + /// is determined by subtracting the offset of this field from Length. + /// + /// CHAR8 iSCSI Target Name. +} ISCSI_DEVICE_PATH; + +#define ISCSI_LOGIN_OPTION_NO_HEADER_DIGEST 0x0000 +#define ISCSI_LOGIN_OPTION_HEADER_DIGEST_USING_CRC32C 0x0002 +#define ISCSI_LOGIN_OPTION_NO_DATA_DIGEST 0x0000 +#define ISCSI_LOGIN_OPTION_DATA_DIGEST_USING_CRC32C 0x0008 +#define ISCSI_LOGIN_OPTION_AUTHMETHOD_CHAP 0x0000 +#define ISCSI_LOGIN_OPTION_AUTHMETHOD_NON 0x1000 +#define ISCSI_LOGIN_OPTION_CHAP_BI 0x0000 +#define ISCSI_LOGIN_OPTION_CHAP_UNI 0x2000 + +/// +/// VLAN Device Path SubType. +/// +#define MSG_VLAN_DP 0x14 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// VLAN identifier (0-4094). + /// + UINT16 VlanId; +} VLAN_DEVICE_PATH; + +// +// Media Device Path +// +#define MEDIA_DEVICE_PATH 0x04 + +/// +/// Hard Drive Media Device Path SubType. +/// +#define MEDIA_HARDDRIVE_DP 0x01 + +/// +/// The Hard Drive Media Device Path is used to represent a partition on a hard drive. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Describes the entry in a partition table, starting with entry 1. + /// Partition number zero represents the entire device. Valid + /// partition numbers for a MBR partition are [1, 4]. Valid + /// partition numbers for a GPT partition are [1, NumberOfPartitionEntries]. + /// + UINT32 PartitionNumber; + /// + /// Starting LBA of the partition on the hard drive. + /// + UINT64 PartitionStart; + /// + /// Size of the partition in units of Logical Blocks. + /// + UINT64 PartitionSize; + /// + /// Signature unique to this partition: + /// If SignatureType is 0, this field has to be initialized with 16 zeros. + /// If SignatureType is 1, the MBR signature is stored in the first 4 bytes of this field. + /// The other 12 bytes are initialized with zeros. + /// If SignatureType is 2, this field contains a 16 byte signature. + /// + UINT8 Signature[16]; + /// + /// Partition Format: (Unused values reserved). + /// 0x01 - PC-AT compatible legacy MBR. + /// 0x02 - GUID Partition Table. + /// + UINT8 MBRType; + /// + /// Type of Disk Signature: (Unused values reserved). + /// 0x00 - No Disk Signature. + /// 0x01 - 32-bit signature from address 0x1b8 of the type 0x01 MBR. + /// 0x02 - GUID signature. + /// + UINT8 SignatureType; +} HARDDRIVE_DEVICE_PATH; + +#define MBR_TYPE_PCAT 0x01 +#define MBR_TYPE_EFI_PARTITION_TABLE_HEADER 0x02 + +#define NO_DISK_SIGNATURE 0x00 +#define SIGNATURE_TYPE_MBR 0x01 +#define SIGNATURE_TYPE_GUID 0x02 + +/// +/// CD-ROM Media Device Path SubType. +/// +#define MEDIA_CDROM_DP 0x02 + +/// +/// The CD-ROM Media Device Path is used to define a system partition that exists on a CD-ROM. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Boot Entry number from the Boot Catalog. The Initial/Default entry is defined as zero. + /// + UINT32 BootEntry; + /// + /// Starting RBA of the partition on the medium. CD-ROMs use Relative logical Block Addressing. + /// + UINT64 PartitionStart; + /// + /// Size of the partition in units of Blocks, also called Sectors. + /// + UINT64 PartitionSize; +} CDROM_DEVICE_PATH; + +// +// Use VENDOR_DEVICE_PATH struct +// +#define MEDIA_VENDOR_DP 0x03 ///< Media vendor device path subtype. + +/// +/// File Path Media Device Path SubType +/// +#define MEDIA_FILEPATH_DP 0x04 +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// A NULL-terminated Path string including directory and file names. + /// + CHAR16 PathName[1]; +} FILEPATH_DEVICE_PATH; + +#define SIZE_OF_FILEPATH_DEVICE_PATH OFFSET_OF(FILEPATH_DEVICE_PATH,PathName) + +/// +/// Media Protocol Device Path SubType. +/// +#define MEDIA_PROTOCOL_DP 0x05 + +/// +/// The Media Protocol Device Path is used to denote the protocol that is being +/// used in a device path at the location of the path specified. +/// Many protocols are inherent to the style of device path. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// The ID of the protocol. + /// + EFI_GUID Protocol; +} MEDIA_PROTOCOL_DEVICE_PATH; + +/// +/// PIWG Firmware File SubType. +/// +#define MEDIA_PIWG_FW_FILE_DP 0x06 + +/// +/// This device path is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware file. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Firmware file name + /// + EFI_GUID FvFileName; +} MEDIA_FW_VOL_FILEPATH_DEVICE_PATH; + +/// +/// PIWG Firmware Volume Device Path SubType. +/// +#define MEDIA_PIWG_FW_VOL_DP 0x07 + +/// +/// This device path is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware volume. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Firmware volume name. + /// + EFI_GUID FvName; +} MEDIA_FW_VOL_DEVICE_PATH; + +/// +/// Media relative offset range device path. +/// +#define MEDIA_RELATIVE_OFFSET_RANGE_DP 0x08 + +/// +/// Used to describe the offset range of media relative. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + UINT32 Reserved; + UINT64 StartingOffset; + UINT64 EndingOffset; +} MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH; + +/// +/// BIOS Boot Specification Device Path. +/// +#define BBS_DEVICE_PATH 0x05 + +/// +/// BIOS Boot Specification Device Path SubType. +/// +#define BBS_BBS_DP 0x01 + +/// +/// This Device Path is used to describe the booting of non-EFI-aware operating systems. +/// +typedef struct { + EFI_DEVICE_PATH_PROTOCOL Header; + /// + /// Device Type as defined by the BIOS Boot Specification. + /// + UINT16 DeviceType; + /// + /// Status Flags as defined by the BIOS Boot Specification. + /// + UINT16 StatusFlag; + /// + /// Null-terminated ASCII string that describes the boot device to a user. + /// + CHAR8 String[1]; +} BBS_BBS_DEVICE_PATH; + +// +// DeviceType definitions - from BBS specification +// +#define BBS_TYPE_FLOPPY 0x01 +#define BBS_TYPE_HARDDRIVE 0x02 +#define BBS_TYPE_CDROM 0x03 +#define BBS_TYPE_PCMCIA 0x04 +#define BBS_TYPE_USB 0x05 +#define BBS_TYPE_EMBEDDED_NETWORK 0x06 +#define BBS_TYPE_BEV 0x80 +#define BBS_TYPE_UNKNOWN 0xFF + + +/// +/// Union of all possible Device Paths and pointers to Device Paths. +/// +typedef union { + EFI_DEVICE_PATH_PROTOCOL DevPath; + PCI_DEVICE_PATH Pci; + PCCARD_DEVICE_PATH PcCard; + MEMMAP_DEVICE_PATH MemMap; + VENDOR_DEVICE_PATH Vendor; + + CONTROLLER_DEVICE_PATH Controller; + ACPI_HID_DEVICE_PATH Acpi; + ACPI_EXTENDED_HID_DEVICE_PATH ExtendedAcpi; + ACPI_ADR_DEVICE_PATH AcpiAdr; + + ATAPI_DEVICE_PATH Atapi; + SCSI_DEVICE_PATH Scsi; + ISCSI_DEVICE_PATH Iscsi; + FIBRECHANNEL_DEVICE_PATH FibreChannel; + FIBRECHANNELEX_DEVICE_PATH FibreChannelEx; + + F1394_DEVICE_PATH F1394; + USB_DEVICE_PATH Usb; + SATA_DEVICE_PATH Sata; + USB_CLASS_DEVICE_PATH UsbClass; + USB_WWID_DEVICE_PATH UsbWwid; + DEVICE_LOGICAL_UNIT_DEVICE_PATH LogicUnit; + I2O_DEVICE_PATH I2O; + MAC_ADDR_DEVICE_PATH MacAddr; + IPv4_DEVICE_PATH Ipv4; + IPv6_DEVICE_PATH Ipv6; + VLAN_DEVICE_PATH Vlan; + INFINIBAND_DEVICE_PATH InfiniBand; + UART_DEVICE_PATH Uart; + UART_FLOW_CONTROL_DEVICE_PATH UartFlowControl; + SAS_DEVICE_PATH Sas; + SASEX_DEVICE_PATH SasEx; + NVME_NAMESPACE_DEVICE_PATH NvmeNamespace; + HARDDRIVE_DEVICE_PATH HardDrive; + CDROM_DEVICE_PATH CD; + + FILEPATH_DEVICE_PATH FilePath; + MEDIA_PROTOCOL_DEVICE_PATH MediaProtocol; + + MEDIA_FW_VOL_DEVICE_PATH FirmwareVolume; + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FirmwareFile; + MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH Offset; + + BBS_BBS_DEVICE_PATH Bbs; +} EFI_DEV_PATH; + + + +typedef union { + EFI_DEVICE_PATH_PROTOCOL *DevPath; + PCI_DEVICE_PATH *Pci; + PCCARD_DEVICE_PATH *PcCard; + MEMMAP_DEVICE_PATH *MemMap; + VENDOR_DEVICE_PATH *Vendor; + + CONTROLLER_DEVICE_PATH *Controller; + ACPI_HID_DEVICE_PATH *Acpi; + ACPI_EXTENDED_HID_DEVICE_PATH *ExtendedAcpi; + ACPI_ADR_DEVICE_PATH *AcpiAdr; + + ATAPI_DEVICE_PATH *Atapi; + SCSI_DEVICE_PATH *Scsi; + ISCSI_DEVICE_PATH *Iscsi; + FIBRECHANNEL_DEVICE_PATH *FibreChannel; + FIBRECHANNELEX_DEVICE_PATH *FibreChannelEx; + + F1394_DEVICE_PATH *F1394; + USB_DEVICE_PATH *Usb; + SATA_DEVICE_PATH *Sata; + USB_CLASS_DEVICE_PATH *UsbClass; + USB_WWID_DEVICE_PATH *UsbWwid; + DEVICE_LOGICAL_UNIT_DEVICE_PATH *LogicUnit; + I2O_DEVICE_PATH *I2O; + MAC_ADDR_DEVICE_PATH *MacAddr; + IPv4_DEVICE_PATH *Ipv4; + IPv6_DEVICE_PATH *Ipv6; + VLAN_DEVICE_PATH *Vlan; + INFINIBAND_DEVICE_PATH *InfiniBand; + UART_DEVICE_PATH *Uart; + UART_FLOW_CONTROL_DEVICE_PATH *UartFlowControl; + SAS_DEVICE_PATH *Sas; + SASEX_DEVICE_PATH *SasEx; + NVME_NAMESPACE_DEVICE_PATH *NvmeNamespace; + HARDDRIVE_DEVICE_PATH *HardDrive; + CDROM_DEVICE_PATH *CD; + + FILEPATH_DEVICE_PATH *FilePath; + MEDIA_PROTOCOL_DEVICE_PATH *MediaProtocol; + + MEDIA_FW_VOL_DEVICE_PATH *FirmwareVolume; + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FirmwareFile; + MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *Offset; + + BBS_BBS_DEVICE_PATH *Bbs; + UINT8 *Raw; +} EFI_DEV_PATH_PTR; + +#pragma pack() + +#define END_DEVICE_PATH_TYPE 0x7f +#define END_ENTIRE_DEVICE_PATH_SUBTYPE 0xFF +#define END_INSTANCE_DEVICE_PATH_SUBTYPE 0x01 + +extern EFI_GUID gEfiDevicePathProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DevicePathToText.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DevicePathToText.h new file mode 100644 index 000000000..edca965bc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DevicePathToText.h @@ -0,0 +1,87 @@ +/** @file + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL as defined in UEFI 2.0. + This protocol provides service to convert device nodes and paths to text. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __DEVICE_PATH_TO_TEXT_PROTOCOL_H__ +#define __DEVICE_PATH_TO_TEXT_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// Device Path To Text protocol +/// +#define EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID \ + { \ + 0x8b843e20, 0x8132, 0x4852, {0x90, 0xcc, 0x55, 0x1a, 0x4e, 0x4a, 0x7f, 0x1c } \ + } + +/** + Convert a device node to its text representation. + + @param DeviceNode Points to the device node to be converted. + @param DisplayOnly If DisplayOnly is TRUE, then the shorter text representation + of the display node is used, where applicable. If DisplayOnly + is FALSE, then the longer text representation of the display node + is used. + @param AllowShortcuts If AllowShortcuts is TRUE, then the shortcut forms of text + representation for a device node can be used, where applicable. + + @retval a_pointer a pointer to the allocated text representation of the device node data + @retval NULL if DeviceNode is NULL or there was insufficient memory. + +**/ +typedef +CHAR16* +(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_NODE)( + IN CONST EFI_DEVICE_PATH_PROTOCOL *DeviceNode, + IN BOOLEAN DisplayOnly, + IN BOOLEAN AllowShortcuts + ); + +/** + Convert a device path to its text representation. + + @param DevicePath Points to the device path to be converted. + @param DisplayOnly If DisplayOnly is TRUE, then the shorter text representation + of the display node is used, where applicable. If DisplayOnly + is FALSE, then the longer text representation of the display node + is used. + @param AllowShortcuts The AllowShortcuts is FALSE, then the shortcut forms of + text representation for a device node cannot be used. + + @retval a_pointer a pointer to the allocated text representation of the device node. + @retval NULL if DevicePath is NULL or there was insufficient memory. + +**/ +typedef +CHAR16* +(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_PATH)( + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath, + IN BOOLEAN DisplayOnly, + IN BOOLEAN AllowShortcuts + ); + +/// +/// This protocol converts device paths and device nodes to text. +/// +typedef struct { + EFI_DEVICE_PATH_TO_TEXT_NODE ConvertDeviceNodeToText; + EFI_DEVICE_PATH_TO_TEXT_PATH ConvertDevicePathToText; +} EFI_DEVICE_PATH_TO_TEXT_PROTOCOL; + +extern EFI_GUID gEfiDevicePathToTextProtocolGuid; + +#endif + + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Dhcp4.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Dhcp4.h new file mode 100644 index 000000000..560ee3224 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Dhcp4.h @@ -0,0 +1,782 @@ +/** @file + EFI_DHCP4_PROTOCOL as defined in UEFI 2.0. + EFI_DHCP4_SERVICE_BINDING_PROTOCOL as defined in UEFI 2.0. + These protocols are used to collect configuration information for the EFI IPv4 Protocol + drivers and to provide DHCPv4 server and PXE boot server discovery services. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol was introduced in UEFI Specification 2.0. + +**/ + +#ifndef __EFI_DHCP4_PROTOCOL_H__ +#define __EFI_DHCP4_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_DHCP4_PROTOCOL_GUID \ + { \ + 0x8a219718, 0x4ef5, 0x4761, {0x91, 0xc8, 0xc0, 0xf0, 0x4b, 0xda, 0x9e, 0x56 } \ + } + +#define EFI_DHCP4_SERVICE_BINDING_PROTOCOL_GUID \ + { \ + 0x9d9a39d8, 0xbd42, 0x4a73, {0xa4, 0xd5, 0x8e, 0xe9, 0x4b, 0xe1, 0x13, 0x80 } \ + } + +typedef struct _EFI_DHCP4_PROTOCOL EFI_DHCP4_PROTOCOL; + + +#pragma pack(1) +typedef struct { + /// + /// DHCP option code. + /// + UINT8 OpCode; + /// + /// Length of the DHCP option data. Not present if OpCode is 0 or 255. + /// + UINT8 Length; + /// + /// Start of the DHCP option data. Not present if OpCode is 0 or 255 or if Length is zero. + /// + UINT8 Data[1]; +} EFI_DHCP4_PACKET_OPTION; +#pragma pack() + + +#pragma pack(1) +/// +/// EFI_DHCP4_PACKET defines the format of DHCPv4 packets. See RFC 2131 for more information. +/// +typedef struct { + UINT8 OpCode; + UINT8 HwType; + UINT8 HwAddrLen; + UINT8 Hops; + UINT32 Xid; + UINT16 Seconds; + UINT16 Reserved; + EFI_IPv4_ADDRESS ClientAddr; ///< Client IP address from client. + EFI_IPv4_ADDRESS YourAddr; ///< Client IP address from server. + EFI_IPv4_ADDRESS ServerAddr; ///< IP address of next server in bootstrap. + EFI_IPv4_ADDRESS GatewayAddr; ///< Relay agent IP address. + UINT8 ClientHwAddr[16]; ///< Client hardware address. + CHAR8 ServerName[64]; + CHAR8 BootFileName[128]; +}EFI_DHCP4_HEADER; +#pragma pack() + + +#pragma pack(1) +typedef struct { + /// + /// Size of the EFI_DHCP4_PACKET buffer. + /// + UINT32 Size; + /// + /// Length of the EFI_DHCP4_PACKET from the first byte of the Header field + /// to the last byte of the Option[] field. + /// + UINT32 Length; + + struct { + /// + /// DHCP packet header. + /// + EFI_DHCP4_HEADER Header; + /// + /// DHCP magik cookie in network byte order. + /// + UINT32 Magik; + /// + /// Start of the DHCP packed option data. + /// + UINT8 Option[1]; + } Dhcp4; +} EFI_DHCP4_PACKET; +#pragma pack() + + +typedef enum { + /// + /// The EFI DHCPv4 Protocol driver is stopped. + /// + Dhcp4Stopped = 0x0, + /// + /// The EFI DHCPv4 Protocol driver is inactive. + /// + Dhcp4Init = 0x1, + /// + /// The EFI DHCPv4 Protocol driver is collecting DHCP offer packets from DHCP servers. + /// + Dhcp4Selecting = 0x2, + /// + /// The EFI DHCPv4 Protocol driver has sent the request to the DHCP server and is waiting for a response. + /// + Dhcp4Requesting = 0x3, + /// + /// The DHCP configuration has completed. + /// + Dhcp4Bound = 0x4, + /// + /// The DHCP configuration is being renewed and another request has + /// been sent out, but it has not received a response from the server yet. + /// + Dhcp4Renewing = 0x5, + /// + /// The DHCP configuration has timed out and the EFI DHCPv4 + /// Protocol driver is trying to extend the lease time. + /// + Dhcp4Rebinding = 0x6, + /// + /// The EFI DHCPv4 Protocol driver was initialized with a previously + /// allocated or known IP address. + /// + Dhcp4InitReboot = 0x7, + /// + /// The EFI DHCPv4 Protocol driver is seeking to reuse the previously + /// allocated IP address by sending a request to the DHCP server. + /// + Dhcp4Rebooting = 0x8 +} EFI_DHCP4_STATE; + + +typedef enum{ + /// + /// The packet to start the configuration sequence is about to be sent. + /// + Dhcp4SendDiscover = 0x01, + /// + /// A reply packet was just received. + /// + Dhcp4RcvdOffer = 0x02, + /// + /// It is time for Dhcp4Callback to select an offer. + /// + Dhcp4SelectOffer = 0x03, + /// + /// A request packet is about to be sent. + /// + Dhcp4SendRequest = 0x04, + /// + /// A DHCPACK packet was received and will be passed to Dhcp4Callback. + /// + Dhcp4RcvdAck = 0x05, + /// + /// A DHCPNAK packet was received and will be passed to Dhcp4Callback. + /// + Dhcp4RcvdNak = 0x06, + /// + /// A decline packet is about to be sent. + /// + Dhcp4SendDecline = 0x07, + /// + /// The DHCP configuration process has completed. No packet is associated with this event. + /// + Dhcp4BoundCompleted = 0x08, + /// + /// It is time to enter the Dhcp4Renewing state and to contact the server + /// that originally issued the network address. No packet is associated with this event. + /// + Dhcp4EnterRenewing = 0x09, + /// + /// It is time to enter the Dhcp4Rebinding state and to contact any server. + /// No packet is associated with this event. + /// + Dhcp4EnterRebinding = 0x0a, + /// + /// The configured IP address was lost either because the lease has expired, + /// the user released the configuration, or a DHCPNAK packet was received in + /// the Dhcp4Renewing or Dhcp4Rebinding state. No packet is associated with this event. + /// + Dhcp4AddressLost = 0x0b, + /// + /// The DHCP process failed because a DHCPNAK packet was received or the user + /// aborted the DHCP process at a time when the configuration was not available yet. + /// No packet is associated with this event. + /// + Dhcp4Fail = 0x0c +} EFI_DHCP4_EVENT; + +/** + Callback routine. + + EFI_DHCP4_CALLBACK is provided by the consumer of the EFI DHCPv4 Protocol driver + to intercept events that occurred in the configuration process. This structure + provides advanced control of each state transition of the DHCP process. The + returned status code determines the behavior of the EFI DHCPv4 Protocol driver. + There are three possible returned values, which are described in the following + table. + + @param This The pointer to the EFI DHCPv4 Protocol instance that is used to + configure this callback function. + @param Context The pointer to the context that is initialized by + EFI_DHCP4_PROTOCOL.Configure(). + @param CurrentState The current operational state of the EFI DHCPv4 Protocol + driver. + @param Dhcp4Event The event that occurs in the current state, which usually means a + state transition. + @param Packet The DHCP packet that is going to be sent or already received. + @param NewPacket The packet that is used to replace the above Packet. + + @retval EFI_SUCCESS Tells the EFI DHCPv4 Protocol driver to continue the DHCP process. + When it is in the Dhcp4Selecting state, it tells the EFI DHCPv4 Protocol + driver to stop collecting additional packets. The driver will exit + the Dhcp4Selecting state and enter the Dhcp4Requesting state. + @retval EFI_NOT_READY Only used in the Dhcp4Selecting state. The EFI DHCPv4 Protocol + driver will continue to wait for more packets until the retry + timeout expires. + @retval EFI_ABORTED Tells the EFI DHCPv4 Protocol driver to abort the current process and + return to the Dhcp4Init or Dhcp4InitReboot state. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_CALLBACK)( + IN EFI_DHCP4_PROTOCOL *This, + IN VOID *Context, + IN EFI_DHCP4_STATE CurrentState, + IN EFI_DHCP4_EVENT Dhcp4Event, + IN EFI_DHCP4_PACKET *Packet OPTIONAL, + OUT EFI_DHCP4_PACKET **NewPacket OPTIONAL + ); + +typedef struct { + /// + /// The number of times to try sending a packet during the Dhcp4SendDiscover + /// event and waiting for a response during the Dhcp4RcvdOffer event. + /// Set to zero to use the default try counts and timeout values. + /// + UINT32 DiscoverTryCount; + /// + /// The maximum amount of time (in seconds) to wait for returned packets in each + /// of the retries. Timeout values of zero will default to a timeout value + /// of one second. Set to NULL to use default timeout values. + /// + UINT32 *DiscoverTimeout; + /// + /// The number of times to try sending a packet during the Dhcp4SendRequest event + /// and waiting for a response during the Dhcp4RcvdAck event before accepting + /// failure. Set to zero to use the default try counts and timeout values. + /// + UINT32 RequestTryCount; + /// + /// The maximum amount of time (in seconds) to wait for return packets in each of the retries. + /// Timeout values of zero will default to a timeout value of one second. + /// Set to NULL to use default timeout values. + /// + UINT32 *RequestTimeout; + /// + /// For a DHCPDISCOVER, setting this parameter to the previously allocated IP + /// address will cause the EFI DHCPv4 Protocol driver to enter the Dhcp4InitReboot state. + /// And set this field to 0.0.0.0 to enter the Dhcp4Init state. + /// For a DHCPINFORM this parameter should be set to the client network address + /// which was assigned to the client during a DHCPDISCOVER. + /// + EFI_IPv4_ADDRESS ClientAddress; + /// + /// The callback function to intercept various events that occurred in + /// the DHCP configuration process. Set to NULL to ignore all those events. + /// + EFI_DHCP4_CALLBACK Dhcp4Callback; + /// + /// The pointer to the context that will be passed to Dhcp4Callback when it is called. + /// + VOID *CallbackContext; + /// + /// Number of DHCP options in the OptionList. + /// + UINT32 OptionCount; + /// + /// List of DHCP options to be included in every packet that is sent during the + /// Dhcp4SendDiscover event. Pad options are appended automatically by DHCP driver + /// in outgoing DHCP packets. If OptionList itself contains pad option, they are + /// ignored by the driver. OptionList can be freed after EFI_DHCP4_PROTOCOL.Configure() + /// returns. Ignored if OptionCount is zero. + /// + EFI_DHCP4_PACKET_OPTION **OptionList; +} EFI_DHCP4_CONFIG_DATA; + + +typedef struct { + /// + /// The EFI DHCPv4 Protocol driver operating state. + /// + EFI_DHCP4_STATE State; + /// + /// The configuration data of the current EFI DHCPv4 Protocol driver instance. + /// + EFI_DHCP4_CONFIG_DATA ConfigData; + /// + /// The client IP address that was acquired from the DHCP server. If it is zero, + /// the DHCP acquisition has not completed yet and the following fields in this structure are undefined. + /// + EFI_IPv4_ADDRESS ClientAddress; + /// + /// The local hardware address. + /// + EFI_MAC_ADDRESS ClientMacAddress; + /// + /// The server IP address that is providing the DHCP service to this client. + /// + EFI_IPv4_ADDRESS ServerAddress; + /// + /// The router IP address that was acquired from the DHCP server. + /// May be zero if the server does not offer this address. + /// + EFI_IPv4_ADDRESS RouterAddress; + /// + /// The subnet mask of the connected network that was acquired from the DHCP server. + /// + EFI_IPv4_ADDRESS SubnetMask; + /// + /// The lease time (in 1-second units) of the configured IP address. + /// The value 0xFFFFFFFF means that the lease time is infinite. + /// A default lease of 7 days is used if the DHCP server does not provide a value. + /// + UINT32 LeaseTime; + /// + /// The cached latest DHCPACK or DHCPNAK or BOOTP REPLY packet. May be NULL if no packet is cached. + /// + EFI_DHCP4_PACKET *ReplyPacket; +} EFI_DHCP4_MODE_DATA; + + +typedef struct { + /// + /// Alternate listening address. It can be a unicast, multicast, or broadcast address. + /// + EFI_IPv4_ADDRESS ListenAddress; + /// + /// The subnet mask of above listening unicast/broadcast IP address. + /// Ignored if ListenAddress is a multicast address. + /// + EFI_IPv4_ADDRESS SubnetMask; + /// + /// Alternate station source (or listening) port number. + /// If zero, then the default station port number (68) will be used. + /// + UINT16 ListenPort; +} EFI_DHCP4_LISTEN_POINT; + + +typedef struct { + /// + /// The completion status of transmitting and receiving. + /// + EFI_STATUS Status; + /// + /// If not NULL, the event that will be signaled when the collection process + /// completes. If NULL, this function will busy-wait until the collection process competes. + /// + EFI_EVENT CompletionEvent; + /// + /// The pointer to the server IP address. This address may be a unicast, multicast, or broadcast address. + /// + EFI_IPv4_ADDRESS RemoteAddress; + /// + /// The server listening port number. If zero, the default server listening port number (67) will be used. + /// + UINT16 RemotePort; + /// + /// The pointer to the gateway address to override the existing setting. + /// + EFI_IPv4_ADDRESS GatewayAddress; + /// + /// The number of entries in ListenPoints. If zero, the default station address and port number 68 are used. + /// + UINT32 ListenPointCount; + /// + /// An array of station address and port number pairs that are used as receiving filters. + /// The first entry is also used as the source address and source port of the outgoing packet. + /// + EFI_DHCP4_LISTEN_POINT *ListenPoints; + /// + /// The number of seconds to collect responses. Zero is invalid. + /// + UINT32 TimeoutValue; + /// + /// The pointer to the packet to be transmitted. + /// + EFI_DHCP4_PACKET *Packet; + /// + /// Number of received packets. + /// + UINT32 ResponseCount; + /// + /// The pointer to the allocated list of received packets. + /// + EFI_DHCP4_PACKET *ResponseList; +} EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN; + + +/** + Returns the current operating mode and cached data packet for the EFI DHCPv4 Protocol driver. + + The GetModeData() function returns the current operating mode and cached data + packet for the EFI DHCPv4 Protocol driver. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + @param Dhcp4ModeData The pointer to storage for the EFI_DHCP4_MODE_DATA structure. + + @retval EFI_SUCCESS The mode data was returned. + @retval EFI_INVALID_PARAMETER This is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_GET_MODE_DATA)( + IN EFI_DHCP4_PROTOCOL *This, + OUT EFI_DHCP4_MODE_DATA *Dhcp4ModeData + ); + +/** + Initializes, changes, or resets the operational settings for the EFI DHCPv4 Protocol driver. + + The Configure() function is used to initialize, change, or reset the operational + settings of the EFI DHCPv4 Protocol driver for the communication device on which + the EFI DHCPv4 Service Binding Protocol is installed. This function can be + successfully called only if both of the following are true: + * This instance of the EFI DHCPv4 Protocol driver is in the Dhcp4Stopped, Dhcp4Init, + Dhcp4InitReboot, or Dhcp4Bound states. + * No other EFI DHCPv4 Protocol driver instance that is controlled by this EFI + DHCPv4 Service Binding Protocol driver instance has configured this EFI DHCPv4 + Protocol driver. + When this driver is in the Dhcp4Stopped state, it can transfer into one of the + following two possible initial states: + * Dhcp4Init + * Dhcp4InitReboot. + The driver can transfer into these states by calling Configure() with a non-NULL + Dhcp4CfgData. The driver will transfer into the appropriate state based on the + supplied client network address in the ClientAddress parameter and DHCP options + in the OptionList parameter as described in RFC 2131. + When Configure() is called successfully while Dhcp4CfgData is set to NULL, the + default configuring data will be reset in the EFI DHCPv4 Protocol driver and + the state of the EFI DHCPv4 Protocol driver will not be changed. If one instance + wants to make it possible for another instance to configure the EFI DHCPv4 Protocol + driver, it must call this function with Dhcp4CfgData set to NULL. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + @param Dhcp4CfgData The pointer to the EFI_DHCP4_CONFIG_DATA. + + @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the Dhcp4Init or + Dhcp4InitReboot state, if the original state of this driver + was Dhcp4Stopped, Dhcp4Init,Dhcp4InitReboot, or Dhcp4Bound + and the value of Dhcp4CfgData was not NULL. + Otherwise, the state was left unchanged. + @retval EFI_ACCESS_DENIED This instance of the EFI DHCPv4 Protocol driver was not in the + Dhcp4Stopped, Dhcp4Init, Dhcp4InitReboot, or Dhcp4Bound state; + Or onother instance of this EFI DHCPv4 Protocol driver is already + in a valid configured state. + @retval EFI_INVALID_PARAMETER One or more following conditions are TRUE: + This is NULL. + DiscoverTryCount > 0 and DiscoverTimeout is NULL + RequestTryCount > 0 and RequestTimeout is NULL. + OptionCount >0 and OptionList is NULL. + ClientAddress is not a valid unicast address. + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_CONFIGURE)( + IN EFI_DHCP4_PROTOCOL *This, + IN EFI_DHCP4_CONFIG_DATA *Dhcp4CfgData OPTIONAL + ); + + +/** + Starts the DHCP configuration process. + + The Start() function starts the DHCP configuration process. This function can + be called only when the EFI DHCPv4 Protocol driver is in the Dhcp4Init or + Dhcp4InitReboot state. + If the DHCP process completes successfully, the state of the EFI DHCPv4 Protocol + driver will be transferred through Dhcp4Selecting and Dhcp4Requesting to the + Dhcp4Bound state. The CompletionEvent will then be signaled if it is not NULL. + If the process aborts, either by the user or by some unexpected network error, + the state is restored to the Dhcp4Init state. The Start() function can be called + again to restart the process. + Refer to RFC 2131 for precise state transitions during this process. At the + time when each event occurs in this process, the callback function that was set + by EFI_DHCP4_PROTOCOL.Configure() will be called and the user can take this + opportunity to control the process. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + @param CompletionEvent If not NULL, it indicates the event that will be signaled when the + EFI DHCPv4 Protocol driver is transferred into the + Dhcp4Bound state or when the DHCP process is aborted. + EFI_DHCP4_PROTOCOL.GetModeData() can be called to + check the completion status. If NULL, + EFI_DHCP4_PROTOCOL.Start() will wait until the driver + is transferred into the Dhcp4Bound state or the process fails. + + @retval EFI_SUCCESS The DHCP configuration process has started, or it has completed + when CompletionEvent is NULL. + @retval EFI_NOT_STARTED The EFI DHCPv4 Protocol driver is in the Dhcp4Stopped + state. EFI_DHCP4_PROTOCOL. Configure() needs to be called. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_TIMEOUT The DHCP configuration process failed because no response was + received from the server within the specified timeout value. + @retval EFI_ABORTED The user aborted the DHCP process. + @retval EFI_ALREADY_STARTED Some other EFI DHCPv4 Protocol instance already started the + DHCP process. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_NO_MEDIA There was a media error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_START)( + IN EFI_DHCP4_PROTOCOL *This, + IN EFI_EVENT CompletionEvent OPTIONAL + ); + +/** + Extends the lease time by sending a request packet. + + The RenewRebind() function is used to manually extend the lease time when the + EFI DHCPv4 Protocol driver is in the Dhcp4Bound state, and the lease time has + not expired yet. This function will send a request packet to the previously + found server (or to any server when RebindRequest is TRUE) and transfer the + state into the Dhcp4Renewing state (or Dhcp4Rebinding when RebindingRequest is + TRUE). When a response is received, the state is returned to Dhcp4Bound. + If no response is received before the try count is exceeded (the RequestTryCount + field that is specified in EFI_DHCP4_CONFIG_DATA) but before the lease time that + was issued by the previous server expires, the driver will return to the Dhcp4Bound + state, and the previous configuration is restored. The outgoing and incoming packets + can be captured by the EFI_DHCP4_CALLBACK function. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + @param RebindRequest If TRUE, this function broadcasts the request packets and enters + the Dhcp4Rebinding state. Otherwise, it sends a unicast + request packet and enters the Dhcp4Renewing state. + @param CompletionEvent If not NULL, this event is signaled when the renew/rebind phase + completes or some error occurs. + EFI_DHCP4_PROTOCOL.GetModeData() can be called to + check the completion status. If NULL, + EFI_DHCP4_PROTOCOL.RenewRebind() will busy-wait + until the DHCP process finishes. + + @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the + Dhcp4Renewing state or is back to the Dhcp4Bound state. + @retval EFI_NOT_STARTED The EFI DHCPv4 Protocol driver is in the Dhcp4Stopped + state. EFI_DHCP4_PROTOCOL.Configure() needs to + be called. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_TIMEOUT There was no response from the server when the try count was + exceeded. + @retval EFI_ACCESS_DENIED The driver is not in the Dhcp4Bound state. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_RENEW_REBIND)( + IN EFI_DHCP4_PROTOCOL *This, + IN BOOLEAN RebindRequest, + IN EFI_EVENT CompletionEvent OPTIONAL + ); + +/** + Releases the current address configuration. + + The Release() function releases the current configured IP address by doing either + of the following: + * Sending a DHCPRELEASE packet when the EFI DHCPv4 Protocol driver is in the + Dhcp4Bound state + * Setting the previously assigned IP address that was provided with the + EFI_DHCP4_PROTOCOL.Configure() function to 0.0.0.0 when the driver is in + Dhcp4InitReboot state + After a successful call to this function, the EFI DHCPv4 Protocol driver returns + to the Dhcp4Init state, and any subsequent incoming packets will be discarded silently. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + + @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the Dhcp4Init phase. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_ACCESS_DENIED The EFI DHCPv4 Protocol driver is not Dhcp4InitReboot state. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_RELEASE)( + IN EFI_DHCP4_PROTOCOL *This + ); + +/** + Stops the current address configuration. + + The Stop() function is used to stop the DHCP configuration process. After this + function is called successfully, the EFI DHCPv4 Protocol driver is transferred + into the Dhcp4Stopped state. EFI_DHCP4_PROTOCOL.Configure() needs to be called + before DHCP configuration process can be started again. This function can be + called when the EFI DHCPv4 Protocol driver is in any state. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + + @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the Dhcp4Stopped phase. + @retval EFI_INVALID_PARAMETER This is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_STOP)( + IN EFI_DHCP4_PROTOCOL *This + ); + +/** + Builds a DHCP packet, given the options to be appended or deleted or replaced. + + The Build() function is used to assemble a new packet from the original packet + by replacing or deleting existing options or appending new options. This function + does not change any state of the EFI DHCPv4 Protocol driver and can be used at + any time. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + @param SeedPacket Initial packet to be used as a base for building new packet. + @param DeleteCount Number of opcodes in the DeleteList. + @param DeleteList List of opcodes to be deleted from the seed packet. + Ignored if DeleteCount is zero. + @param AppendCount Number of entries in the OptionList. + @param AppendList The pointer to a DHCP option list to be appended to SeedPacket. + If SeedPacket also contains options in this list, they are + replaced by new options (except pad option). Ignored if + AppendCount is zero. Type EFI_DHCP4_PACKET_OPTION + @param NewPacket The pointer to storage for the pointer to the new allocated packet. + Use the EFI Boot Service FreePool() on the resulting pointer + when done with the packet. + + @retval EFI_SUCCESS The new packet was built. + @retval EFI_OUT_OF_RESOURCES Storage for the new packet could not be allocated. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + This is NULL. + SeedPacket is NULL. + SeedPacket is not a well-formed DHCP packet. + AppendCount is not zero and AppendList is NULL. + DeleteCount is not zero and DeleteList is NULL. + NewPacket is NULL + Both DeleteCount and AppendCount are zero and + NewPacket is not NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_BUILD)( + IN EFI_DHCP4_PROTOCOL *This, + IN EFI_DHCP4_PACKET *SeedPacket, + IN UINT32 DeleteCount, + IN UINT8 *DeleteList OPTIONAL, + IN UINT32 AppendCount, + IN EFI_DHCP4_PACKET_OPTION *AppendList[] OPTIONAL, + OUT EFI_DHCP4_PACKET **NewPacket + ); + + +/** + Transmits a DHCP formatted packet and optionally waits for responses. + + The TransmitReceive() function is used to transmit a DHCP packet and optionally + wait for the response from servers. This function does not change the state of + the EFI DHCPv4 Protocol driver. It can be used at any time because of this. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + @param Token The pointer to the EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN structure. + + @retval EFI_SUCCESS The packet was successfully queued for transmission. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + This is NULL. + Token.RemoteAddress is zero. + Token.Packet is NULL. + Token.Packet is not a well-formed DHCP packet. + The transaction ID in Token.Packet is in use by another DHCP process. + @retval EFI_NOT_READY The previous call to this function has not finished yet. Try to call + this function after collection process completes. + @retval EFI_NO_MAPPING The default station address is not available yet. + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_UNSUPPORTED The implementation doesn't support this function + @retval Others Some other unexpected error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_TRANSMIT_RECEIVE)( + IN EFI_DHCP4_PROTOCOL *This, + IN EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN *Token + ); + + +/** + Parses the packed DHCP option data. + + The Parse() function is used to retrieve the option list from a DHCP packet. + If *OptionCount isn't zero, and there is enough space for all the DHCP options + in the Packet, each element of PacketOptionList is set to point to somewhere in + the Packet->Dhcp4.Option where a new DHCP option begins. If RFC3396 is supported, + the caller should reassemble the parsed DHCP options to get the final result. + If *OptionCount is zero or there isn't enough space for all of them, the number + of DHCP options in the Packet is returned in OptionCount. + + @param This The pointer to the EFI_DHCP4_PROTOCOL instance. + @param Packet The pointer to packet to be parsed. + @param OptionCount On input, the number of entries in the PacketOptionList. + On output, the number of entries that were written into the + PacketOptionList. + @param PacketOptionList A list of packet option entries to be filled in. End option or pad + options are not included. + + @retval EFI_SUCCESS The packet was successfully parsed. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + This is NULL. + The packet is NULL. + The packet is not a well-formed DHCP packet. + OptionCount is NULL. + @retval EFI_BUFFER_TOO_SMALL One or more of the following conditions is TRUE: + 1) *OptionCount is smaller than the number of options that + were found in the Packet. + 2) PacketOptionList is NULL. + @retval EFI_OUT_OF_RESOURCE The packet failed to parse because of a resource shortage. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DHCP4_PARSE)( + IN EFI_DHCP4_PROTOCOL *This, + IN EFI_DHCP4_PACKET *Packet, + IN OUT UINT32 *OptionCount, + OUT EFI_DHCP4_PACKET_OPTION *PacketOptionList[] OPTIONAL + ); + +/// +/// This protocol is used to collect configuration information for the EFI IPv4 Protocol drivers +/// and to provide DHCPv4 server and PXE boot server discovery services. +/// +struct _EFI_DHCP4_PROTOCOL { + EFI_DHCP4_GET_MODE_DATA GetModeData; + EFI_DHCP4_CONFIGURE Configure; + EFI_DHCP4_START Start; + EFI_DHCP4_RENEW_REBIND RenewRebind; + EFI_DHCP4_RELEASE Release; + EFI_DHCP4_STOP Stop; + EFI_DHCP4_BUILD Build; + EFI_DHCP4_TRANSMIT_RECEIVE TransmitReceive; + EFI_DHCP4_PARSE Parse; +}; + +extern EFI_GUID gEfiDhcp4ProtocolGuid; +extern EFI_GUID gEfiDhcp4ServiceBindingProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DiskIo.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DiskIo.h new file mode 100644 index 000000000..1b47ce520 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DiskIo.h @@ -0,0 +1,119 @@ +/** @file + Disk IO protocol as defined in the UEFI 2.0 specification. + + The Disk IO protocol is used to convert block oriented devices into byte + oriented devices. The Disk IO protocol is intended to layer on top of the + Block IO protocol. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __DISK_IO_H__ +#define __DISK_IO_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_DISK_IO_PROTOCOL_GUID \ + { \ + 0xce345171, 0xba0b, 0x11d2, {0x8e, 0x4f, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +/// +/// Protocol GUID name defined in EFI1.1. +/// +#define DISK_IO_PROTOCOL EFI_DISK_IO_PROTOCOL_GUID + +typedef struct _EFI_DISK_IO_PROTOCOL EFI_DISK_IO_PROTOCOL; + +/// +/// Protocol defined in EFI1.1. +/// +typedef EFI_DISK_IO_PROTOCOL EFI_DISK_IO; + +/** + Read BufferSize bytes from Offset into Buffer. + + @param This Protocol instance pointer. + @param MediaId Id of the media, changes every time the media is replaced. + @param Offset The starting byte offset to read from + @param BufferSize Size of Buffer + @param Buffer Buffer containing read data + + @retval EFI_SUCCESS The data was read correctly from the device. + @retval EFI_DEVICE_ERROR The device reported an error while performing the read. + @retval EFI_NO_MEDIA There is no media in the device. + @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device. + @retval EFI_INVALID_PARAMETER The read request contains device addresses that are not + valid for the device. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DISK_READ)( + IN EFI_DISK_IO_PROTOCOL *This, + IN UINT32 MediaId, + IN UINT64 Offset, + IN UINTN BufferSize, + OUT VOID *Buffer + ); + +/** + Writes a specified number of bytes to a device. + + @param This Indicates a pointer to the calling context. + @param MediaId ID of the medium to be written. + @param Offset The starting byte offset on the logical block I/O device to write. + @param BufferSize The size in bytes of Buffer. The number of bytes to write to the device. + @param Buffer A pointer to the buffer containing the data to be written. + + @retval EFI_SUCCESS The data was written correctly to the device. + @retval EFI_WRITE_PROTECTED The device can not be written to. + @retval EFI_DEVICE_ERROR The device reported an error while performing the write. + @retval EFI_NO_MEDIA There is no media in the device. + @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device. + @retval EFI_INVALID_PARAMETER The write request contains device addresses that are not + valid for the device. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DISK_WRITE)( + IN EFI_DISK_IO_PROTOCOL *This, + IN UINT32 MediaId, + IN UINT64 Offset, + IN UINTN BufferSize, + IN VOID *Buffer + ); + +#define EFI_DISK_IO_PROTOCOL_REVISION 0x00010000 + +/// +/// Revision defined in EFI1.1 +/// +#define EFI_DISK_IO_INTERFACE_REVISION EFI_DISK_IO_PROTOCOL_REVISION + +/// +/// This protocol is used to abstract Block I/O interfaces. +/// +struct _EFI_DISK_IO_PROTOCOL { + /// + /// The revision to which the disk I/O interface adheres. All future + /// revisions must be backwards compatible. If a future version is not + /// backwards compatible, it is not the same GUID. + /// + UINT64 Revision; + EFI_DISK_READ ReadDisk; + EFI_DISK_WRITE WriteDisk; +}; + +extern EFI_GUID gEfiDiskIoProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DriverBinding.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DriverBinding.h new file mode 100644 index 000000000..1f464a730 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/DriverBinding.h @@ -0,0 +1,203 @@ +/** @file + UEFI DriverBinding Protocol is defined in UEFI specification. + + This protocol is produced by every driver that follows the UEFI Driver Model, + and it is the central component that allows drivers and controllers to be managed. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EFI_DRIVER_BINDING_H__ +#define __EFI_DRIVER_BINDING_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// The global ID for the ControllerHandle Driver Protocol. +/// +#define EFI_DRIVER_BINDING_PROTOCOL_GUID \ + { \ + 0x18a031ab, 0xb443, 0x4d1a, {0xa5, 0xc0, 0xc, 0x9, 0x26, 0x1e, 0x9f, 0x71 } \ + } + +typedef struct _EFI_DRIVER_BINDING_PROTOCOL EFI_DRIVER_BINDING_PROTOCOL; + +/** + Tests to see if this driver supports a given controller. If a child device is provided, + it further tests to see if this driver supports creating a handle for the specified child device. + + This function checks to see if the driver specified by This supports the device specified by + ControllerHandle. Drivers will typically use the device path attached to + ControllerHandle and/or the services from the bus I/O abstraction attached to + ControllerHandle to determine if the driver supports ControllerHandle. This function + may be called many times during platform initialization. In order to reduce boot times, the tests + performed by this function must be very small, and take as little time as possible to execute. This + function must not change the state of any hardware devices, and this function must be aware that the + device specified by ControllerHandle may already be managed by the same driver or a + different driver. This function must match its calls to AllocatePages() with FreePages(), + AllocatePool() with FreePool(), and OpenProtocol() with CloseProtocol(). + Because ControllerHandle may have been previously started by the same driver, if a protocol is + already in the opened state, then it must not be closed with CloseProtocol(). This is required + to guarantee the state of ControllerHandle is not modified by this function. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle The handle of the controller to test. This handle + must support a protocol interface that supplies + an I/O abstraction to the driver. + @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This + parameter is ignored by device drivers, and is optional for bus + drivers. For bus drivers, if this parameter is not NULL, then + the bus driver must determine if the bus controller specified + by ControllerHandle and the child controller specified + by RemainingDevicePath are both supported by this + bus driver. + + @retval EFI_SUCCESS The device specified by ControllerHandle and + RemainingDevicePath is supported by the driver specified by This. + @retval EFI_ALREADY_STARTED The device specified by ControllerHandle and + RemainingDevicePath is already being managed by the driver + specified by This. + @retval EFI_ACCESS_DENIED The device specified by ControllerHandle and + RemainingDevicePath is already being managed by a different + driver or an application that requires exclusive access. + Currently not implemented. + @retval EFI_UNSUPPORTED The device specified by ControllerHandle and + RemainingDevicePath is not supported by the driver specified by This. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DRIVER_BINDING_SUPPORTED)( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL + ); + +/** + Starts a device controller or a bus controller. + + The Start() function is designed to be invoked from the EFI boot service ConnectController(). + As a result, much of the error checking on the parameters to Start() has been moved into this + common boot service. It is legal to call Start() from other locations, + but the following calling restrictions must be followed, or the system behavior will not be deterministic. + 1. ControllerHandle must be a valid EFI_HANDLE. + 2. If RemainingDevicePath is not NULL, then it must be a pointer to a naturally aligned + EFI_DEVICE_PATH_PROTOCOL. + 3. Prior to calling Start(), the Supported() function for the driver specified by This must + have been called with the same calling parameters, and Supported() must have returned EFI_SUCCESS. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle The handle of the controller to start. This handle + must support a protocol interface that supplies + an I/O abstraction to the driver. + @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This + parameter is ignored by device drivers, and is optional for bus + drivers. For a bus driver, if this parameter is NULL, then handles + for all the children of Controller are created by this driver. + If this parameter is not NULL and the first Device Path Node is + not the End of Device Path Node, then only the handle for the + child device specified by the first Device Path Node of + RemainingDevicePath is created by this driver. + If the first Device Path Node of RemainingDevicePath is + the End of Device Path Node, no child handle is created by this + driver. + + @retval EFI_SUCCESS The device was started. + @retval EFI_DEVICE_ERROR The device could not be started due to a device error.Currently not implemented. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval Others The driver failded to start the device. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DRIVER_BINDING_START)( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL + ); + +/** + Stops a device controller or a bus controller. + + The Stop() function is designed to be invoked from the EFI boot service DisconnectController(). + As a result, much of the error checking on the parameters to Stop() has been moved + into this common boot service. It is legal to call Stop() from other locations, + but the following calling restrictions must be followed, or the system behavior will not be deterministic. + 1. ControllerHandle must be a valid EFI_HANDLE that was used on a previous call to this + same driver's Start() function. + 2. The first NumberOfChildren handles of ChildHandleBuffer must all be a valid + EFI_HANDLE. In addition, all of these handles must have been created in this driver's + Start() function, and the Start() function must have called OpenProtocol() on + ControllerHandle with an Attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle A handle to the device being stopped. The handle must + support a bus specific I/O protocol for the driver + to use to stop the device. + @param[in] NumberOfChildren The number of child device handles in ChildHandleBuffer. + @param[in] ChildHandleBuffer An array of child handles to be freed. May be NULL + if NumberOfChildren is 0. + + @retval EFI_SUCCESS The device was stopped. + @retval EFI_DEVICE_ERROR The device could not be stopped due to a device error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DRIVER_BINDING_STOP)( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer OPTIONAL + ); + +/// +/// This protocol provides the services required to determine if a driver supports a given controller. +/// If a controller is supported, then it also provides routines to start and stop the controller. +/// +struct _EFI_DRIVER_BINDING_PROTOCOL { + EFI_DRIVER_BINDING_SUPPORTED Supported; + EFI_DRIVER_BINDING_START Start; + EFI_DRIVER_BINDING_STOP Stop; + + /// + /// The version number of the UEFI driver that produced the + /// EFI_DRIVER_BINDING_PROTOCOL. This field is used by + /// the EFI boot service ConnectController() to determine + /// the order that driver's Supported() service will be used when + /// a controller needs to be started. EFI Driver Binding Protocol + /// instances with higher Version values will be used before ones + /// with lower Version values. The Version values of 0x0- + /// 0x0f and 0xfffffff0-0xffffffff are reserved for + /// platform/OEM specific drivers. The Version values of 0x10- + /// 0xffffffef are reserved for IHV-developed drivers. + /// + UINT32 Version; + + /// + /// The image handle of the UEFI driver that produced this instance + /// of the EFI_DRIVER_BINDING_PROTOCOL. + /// + EFI_HANDLE ImageHandle; + + /// + /// The handle on which this instance of the + /// EFI_DRIVER_BINDING_PROTOCOL is installed. In most + /// cases, this is the same handle as ImageHandle. However, for + /// UEFI drivers that produce more than one instance of the + /// EFI_DRIVER_BINDING_PROTOCOL, this value may not be + /// the same as ImageHandle. + /// + EFI_HANDLE DriverBindingHandle; +}; + +extern EFI_GUID gEfiDriverBindingProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/FormBrowser2.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/FormBrowser2.h new file mode 100644 index 000000000..0c0f56d73 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/FormBrowser2.h @@ -0,0 +1,181 @@ +/** @file + This protocol is defined in UEFI spec. + + The EFI_FORM_BROWSER2_PROTOCOL is the interface to call for drivers to + leverage the EFI configuration driver interface. + +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EFI_FORM_BROWSER2_H__ +#define __EFI_FORM_BROWSER2_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Guid/HiiPlatformSetupFormset.h> + +#define EFI_FORM_BROWSER2_PROTOCOL_GUID \ + {0xb9d4c360, 0xbcfb, 0x4f9b, {0x92, 0x98, 0x53, 0xc1, 0x36, 0x98, 0x22, 0x58 }} + + +typedef struct _EFI_FORM_BROWSER2_PROTOCOL EFI_FORM_BROWSER2_PROTOCOL; + + + +/** + + @param LeftColumn The value that designates the text column + where the browser window will begin from + the left-hand side of the screen + + @param RightColumn The value that designates the text + column where the browser window will end + on the right-hand side of the screen. + + @param TopRow The value that designates the text row from the + top of the screen where the browser window + will start. + + @param BottomRow The value that designates the text row from the + bottom of the screen where the browser + window will end. +**/ +typedef struct { + UINTN LeftColumn; + UINTN RightColumn; + UINTN TopRow; + UINTN BottomRow; +} EFI_SCREEN_DESCRIPTOR; + +typedef UINTN EFI_BROWSER_ACTION_REQUEST; + +#define EFI_BROWSER_ACTION_REQUEST_NONE 0 +#define EFI_BROWSER_ACTION_REQUEST_RESET 1 +#define EFI_BROWSER_ACTION_REQUEST_SUBMIT 2 +#define EFI_BROWSER_ACTION_REQUEST_EXIT 3 +#define EFI_BROWSER_ACTION_REQUEST_FORM_SUBMIT_EXIT 4 +#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD_EXIT 5 +#define EFI_BROWSER_ACTION_REQUEST_FORM_APPLY 6 +#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD 7 + + +/** + Initialize the browser to display the specified configuration forms. + + This function is the primary interface to the internal forms-based browser. + The forms browser will display forms associated with the specified Handles. + The browser will select all forms in packages which have the specified Type + and (for EFI_HII_PACKAGE_TYPE_GUID) the specified PackageGuid. + + @param This A pointer to the EFI_FORM_BROWSER2_PROTOCOL instance + + @param Handles A pointer to an array of Handles. This value should correspond + to the value of the HII form package that is required to be displayed. + + @param HandleCount The number of Handles specified in Handle. + + @param FormSetGuid This field points to the EFI_GUID which must match the Guid field or one of the + elements of the ClassId field in the EFI_IFR_FORM_SET op-code. If + FormsetGuid is NULL, then this function will display the form set class + EFI_HII_PLATFORM_SETUP_FORMSET_GUID. + + @param FormId This field specifies the identifier of the form within the form set to render as the first + displayable page. If this field has a value of 0x0000, then the Forms Browser will + render the first enabled form in the form set. + + @param ScreenDimensions Points to recommended form dimensions, including any non-content area, in + characters. + + @param ActionRequest Points to the action recommended by the form. + + @retval EFI_SUCCESS The function completed successfully + + @retval EFI_NOT_FOUND The variable was not found. + + @retval EFI_INVALID_PARAMETER One of the parameters has an + invalid value. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SEND_FORM2)( + IN CONST EFI_FORM_BROWSER2_PROTOCOL *This, + IN EFI_HII_HANDLE *Handle, + IN UINTN HandleCount, + IN EFI_GUID *FormSetGuid, OPTIONAL + IN EFI_FORM_ID FormId, OPTIONAL + IN CONST EFI_SCREEN_DESCRIPTOR *ScreenDimensions, OPTIONAL + OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest OPTIONAL +); + + +/** + This function is called by a callback handler to retrieve uncommitted state data from the browser. + + This routine is called by a routine which was called by the + browser. This routine called this service in the browser to + retrieve or set certain uncommitted state information. + + @param This A pointer to the EFI_FORM_BROWSER2_PROTOCOL instance. + + @param ResultsDataSize A pointer to the size of the buffer + associated with ResultsData. On input, the size in + bytes of ResultsData. On output, the size of data + returned in ResultsData. + + @param ResultsData A string returned from an IFR browser or + equivalent. The results string will have + no routing information in them. + + @param RetrieveData A BOOLEAN field which allows an agent to + retrieve (if RetrieveData = TRUE) data + from the uncommitted browser state + information or set (if RetrieveData = + FALSE) data in the uncommitted browser + state information. + + @param VariableGuid An optional field to indicate the target + variable GUID name to use. + + @param VariableName An optional field to indicate the target + human-readable variable name. + + @retval EFI_SUCCESS The results have been distributed or are + awaiting distribution. + + @retval EFI_OUT_OF_RESOURCES The ResultsDataSize specified + was too small to contain the + results data. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_BROWSER_CALLBACK2)( + IN CONST EFI_FORM_BROWSER2_PROTOCOL *This, + IN OUT UINTN *ResultsDataSize, + IN OUT EFI_STRING ResultsData, + IN CONST BOOLEAN RetrieveData, + IN CONST EFI_GUID *VariableGuid, OPTIONAL + IN CONST CHAR16 *VariableName OPTIONAL +); + +/// +/// This interface will allow the caller to direct the configuration +/// driver to use either the HII database or use the passed-in packet of data. +/// +struct _EFI_FORM_BROWSER2_PROTOCOL { + EFI_SEND_FORM2 SendForm; + EFI_BROWSER_CALLBACK2 BrowserCallback; +} ; + +extern EFI_GUID gEfiFormBrowser2ProtocolGuid; + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/GraphicsOutput.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/GraphicsOutput.h new file mode 100644 index 000000000..98ca8c9c0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/GraphicsOutput.h @@ -0,0 +1,278 @@ +/** @file + Graphics Output Protocol from the UEFI 2.0 specification. + + Abstraction of a very simple graphics device. + + Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __GRAPHICS_OUTPUT_H__ +#define __GRAPHICS_OUTPUT_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID \ + { \ + 0x9042a9de, 0x23dc, 0x4a38, {0x96, 0xfb, 0x7a, 0xde, 0xd0, 0x80, 0x51, 0x6a } \ + } + +typedef struct _EFI_GRAPHICS_OUTPUT_PROTOCOL EFI_GRAPHICS_OUTPUT_PROTOCOL; + +typedef struct { + UINT32 RedMask; + UINT32 GreenMask; + UINT32 BlueMask; + UINT32 ReservedMask; +} EFI_PIXEL_BITMASK; + +typedef enum { + /// + /// A pixel is 32-bits and byte zero represents red, byte one represents green, + /// byte two represents blue, and byte three is reserved. This is the definition + /// for the physical frame buffer. The byte values for the red, green, and blue + /// components represent the color intensity. This color intensity value range + /// from a minimum intensity of 0 to maximum intensity of 255. + /// + PixelRedGreenBlueReserved8BitPerColor, + /// + /// A pixel is 32-bits and byte zero represents blue, byte one represents green, + /// byte two represents red, and byte three is reserved. This is the definition + /// for the physical frame buffer. The byte values for the red, green, and blue + /// components represent the color intensity. This color intensity value range + /// from a minimum intensity of 0 to maximum intensity of 255. + /// + PixelBlueGreenRedReserved8BitPerColor, + /// + /// The Pixel definition of the physical frame buffer. + /// + PixelBitMask, + /// + /// This mode does not support a physical frame buffer. + /// + PixelBltOnly, + /// + /// Valid EFI_GRAPHICS_PIXEL_FORMAT enum values are less than this value. + /// + PixelFormatMax +} EFI_GRAPHICS_PIXEL_FORMAT; + +typedef struct { + /// + /// The version of this data structure. A value of zero represents the + /// EFI_GRAPHICS_OUTPUT_MODE_INFORMATION structure as defined in this specification. + /// + UINT32 Version; + /// + /// The size of video screen in pixels in the X dimension. + /// + UINT32 HorizontalResolution; + /// + /// The size of video screen in pixels in the Y dimension. + /// + UINT32 VerticalResolution; + /// + /// Enumeration that defines the physical format of the pixel. A value of PixelBltOnly + /// implies that a linear frame buffer is not available for this mode. + /// + EFI_GRAPHICS_PIXEL_FORMAT PixelFormat; + /// + /// This bit-mask is only valid if PixelFormat is set to PixelPixelBitMask. + /// A bit being set defines what bits are used for what purpose such as Red, Green, Blue, or Reserved. + /// + EFI_PIXEL_BITMASK PixelInformation; + /// + /// Defines the number of pixel elements per video memory line. + /// + UINT32 PixelsPerScanLine; +} EFI_GRAPHICS_OUTPUT_MODE_INFORMATION; + +/** + Returns information for an available graphics mode that the graphics device + and the set of active video output devices supports. + + @param This The EFI_GRAPHICS_OUTPUT_PROTOCOL instance. + @param ModeNumber The mode number to return information on. + @param SizeOfInfo A pointer to the size, in bytes, of the Info buffer. + @param Info A pointer to callee allocated buffer that returns information about ModeNumber. + + @retval EFI_SUCCESS Valid mode information was returned. + @retval EFI_DEVICE_ERROR A hardware error occurred trying to retrieve the video mode. + @retval EFI_INVALID_PARAMETER ModeNumber is not valid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GRAPHICS_OUTPUT_PROTOCOL_QUERY_MODE)( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN UINT32 ModeNumber, + OUT UINTN *SizeOfInfo, + OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info + ); + +/** + Set the video device into the specified mode and clears the visible portions of + the output display to black. + + @param This The EFI_GRAPHICS_OUTPUT_PROTOCOL instance. + @param ModeNumber Abstraction that defines the current video mode. + + @retval EFI_SUCCESS The graphics mode specified by ModeNumber was selected. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED ModeNumber is not supported by this device. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GRAPHICS_OUTPUT_PROTOCOL_SET_MODE)( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN UINT32 ModeNumber + ); + +typedef struct { + UINT8 Blue; + UINT8 Green; + UINT8 Red; + UINT8 Reserved; +} EFI_GRAPHICS_OUTPUT_BLT_PIXEL; + +typedef union { + EFI_GRAPHICS_OUTPUT_BLT_PIXEL Pixel; + UINT32 Raw; +} EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION; + +/// +/// actions for BltOperations +/// +typedef enum { + /// + /// Write data from the BltBuffer pixel (0, 0) + /// directly to every pixel of the video display rectangle + /// (DestinationX, DestinationY) (DestinationX + Width, DestinationY + Height). + /// Only one pixel will be used from the BltBuffer. Delta is NOT used. + /// + EfiBltVideoFill, + + /// + /// Read data from the video display rectangle + /// (SourceX, SourceY) (SourceX + Width, SourceY + Height) and place it in + /// the BltBuffer rectangle (DestinationX, DestinationY ) + /// (DestinationX + Width, DestinationY + Height). If DestinationX or + /// DestinationY is not zero then Delta must be set to the length in bytes + /// of a row in the BltBuffer. + /// + EfiBltVideoToBltBuffer, + + /// + /// Write data from the BltBuffer rectangle + /// (SourceX, SourceY) (SourceX + Width, SourceY + Height) directly to the + /// video display rectangle (DestinationX, DestinationY) + /// (DestinationX + Width, DestinationY + Height). If SourceX or SourceY is + /// not zero then Delta must be set to the length in bytes of a row in the + /// BltBuffer. + /// + EfiBltBufferToVideo, + + /// + /// Copy from the video display rectangle (SourceX, SourceY) + /// (SourceX + Width, SourceY + Height) to the video display rectangle + /// (DestinationX, DestinationY) (DestinationX + Width, DestinationY + Height). + /// The BltBuffer and Delta are not used in this mode. + /// + EfiBltVideoToVideo, + + EfiGraphicsOutputBltOperationMax +} EFI_GRAPHICS_OUTPUT_BLT_OPERATION; + +/** + Blt a rectangle of pixels on the graphics screen. Blt stands for BLock Transfer. + + @param This Protocol instance pointer. + @param BltBuffer The data to transfer to the graphics screen. + Size is at least Width*Height*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL). + @param BltOperation The operation to perform when copying BltBuffer on to the graphics screen. + @param SourceX The X coordinate of source for the BltOperation. + @param SourceY The Y coordinate of source for the BltOperation. + @param DestinationX The X coordinate of destination for the BltOperation. + @param DestinationY The Y coordinate of destination for the BltOperation. + @param Width The width of a rectangle in the blt rectangle in pixels. + @param Height The height of a rectangle in the blt rectangle in pixels. + @param Delta Not used for EfiBltVideoFill or the EfiBltVideoToVideo operation. + If a Delta of zero is used, the entire BltBuffer is being operated on. + If a subrectangle of the BltBuffer is being used then Delta + represents the number of bytes in a row of the BltBuffer. + + @retval EFI_SUCCESS BltBuffer was drawn to the graphics screen. + @retval EFI_INVALID_PARAMETER BltOperation is not valid. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GRAPHICS_OUTPUT_PROTOCOL_BLT)( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL + IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation, + IN UINTN SourceX, + IN UINTN SourceY, + IN UINTN DestinationX, + IN UINTN DestinationY, + IN UINTN Width, + IN UINTN Height, + IN UINTN Delta OPTIONAL + ); + +typedef struct { + /// + /// The number of modes supported by QueryMode() and SetMode(). + /// + UINT32 MaxMode; + /// + /// Current Mode of the graphics device. Valid mode numbers are 0 to MaxMode -1. + /// + UINT32 Mode; + /// + /// Pointer to read-only EFI_GRAPHICS_OUTPUT_MODE_INFORMATION data. + /// + EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info; + /// + /// Size of Info structure in bytes. + /// + UINTN SizeOfInfo; + /// + /// Base address of graphics linear frame buffer. + /// Offset zero in FrameBufferBase represents the upper left pixel of the display. + /// + EFI_PHYSICAL_ADDRESS FrameBufferBase; + /// + /// Amount of frame buffer needed to support the active mode as defined by + /// PixelsPerScanLine xVerticalResolution x PixelElementSize. + /// + UINTN FrameBufferSize; +} EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE; + +/// +/// Provides a basic abstraction to set video modes and copy pixels to and from +/// the graphics controller's frame buffer. The linear address of the hardware +/// frame buffer is also exposed so software can write directly to the video hardware. +/// +struct _EFI_GRAPHICS_OUTPUT_PROTOCOL { + EFI_GRAPHICS_OUTPUT_PROTOCOL_QUERY_MODE QueryMode; + EFI_GRAPHICS_OUTPUT_PROTOCOL_SET_MODE SetMode; + EFI_GRAPHICS_OUTPUT_PROTOCOL_BLT Blt; + /// + /// Pointer to EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE data. + /// + EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE *Mode; +}; + +extern EFI_GUID gEfiGraphicsOutputProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/HiiConfigAccess.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/HiiConfigAccess.h new file mode 100644 index 000000000..17ce3fdcc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/HiiConfigAccess.h @@ -0,0 +1,224 @@ +/** @file + + The EFI HII results processing protocol invokes this type of protocol + when it needs to forward results to a driver's configuration handler. + This protocol is published by drivers providing and requesting + configuration data from HII. It may only be invoked by HII. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +#ifndef __EFI_HII_CONFIG_ACCESS_H__ +#define __EFI_HII_CONFIG_ACCESS_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/FormBrowser2.h> + +#define EFI_HII_CONFIG_ACCESS_PROTOCOL_GUID \ + { 0x330d4706, 0xf2a0, 0x4e4f, { 0xa3, 0x69, 0xb6, 0x6f, 0xa8, 0xd5, 0x43, 0x85 } } + +typedef struct _EFI_HII_CONFIG_ACCESS_PROTOCOL EFI_HII_CONFIG_ACCESS_PROTOCOL; + +typedef UINTN EFI_BROWSER_ACTION; + +#define EFI_BROWSER_ACTION_CHANGING 0 +#define EFI_BROWSER_ACTION_CHANGED 1 +#define EFI_BROWSER_ACTION_RETRIEVE 2 +#define EFI_BROWSER_ACTION_FORM_OPEN 3 +#define EFI_BROWSER_ACTION_FORM_CLOSE 4 +#define EFI_BROWSER_ACTION_DEFAULT_STANDARD 0x1000 +#define EFI_BROWSER_ACTION_DEFAULT_MANUFACTURING 0x1001 +#define EFI_BROWSER_ACTION_DEFAULT_SAFE 0x1002 +#define EFI_BROWSER_ACTION_DEFAULT_PLATFORM 0x2000 +#define EFI_BROWSER_ACTION_DEFAULT_HARDWARE 0x3000 +#define EFI_BROWSER_ACTION_DEFAULT_FIRMWARE 0x4000 + +/** + + This function allows the caller to request the current + configuration for one or more named elements. The resulting + string is in <ConfigAltResp> format. Any and all alternative + configuration strings shall also be appended to the end of the + current configuration string. If they are, they must appear + after the current configuration. They must contain the same + routing (GUID, NAME, PATH) as the current configuration string. + They must have an additional description indicating the type of + alternative configuration the string represents, + "ALTCFG=<StringToken>". That <StringToken> (when + converted from Hex UNICODE to binary) is a reference to a + string in the associated string pack. + + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL. + + @param Request A null-terminated Unicode string in + <ConfigRequest> format. Note that this + includes the routing information as well as + the configurable name / value pairs. It is + invalid for this string to be in + <MultiConfigRequest> format. + If a NULL is passed in for the Request field, + all of the settings being abstracted by this function + will be returned in the Results field. In addition, + if a ConfigHdr is passed in with no request elements, + all of the settings being abstracted for that particular + ConfigHdr reference will be returned in the Results Field. + + @param Progress On return, points to a character in the + Request string. Points to the string's null + terminator if request was successful. Points + to the most recent "&" before the first + failing name / value pair (or the beginning + of the string if the failure is in the first + name / value pair) if the request was not + successful. + + @param Results A null-terminated Unicode string in + <MultiConfigAltResp> format which has all values + filled in for the names in the Request string. + String to be allocated by the called function. + + @retval EFI_SUCCESS The Results string is filled with the + values corresponding to all requested + names. + + @retval EFI_OUT_OF_RESOURCES Not enough memory to store the + parts of the results that must be + stored awaiting possible future + protocols. + + @retval EFI_NOT_FOUND A configuration element matching + the routing data is not found. + Progress set to the first character + in the routing header. + + @retval EFI_INVALID_PARAMETER Illegal syntax. Progress set + to most recent "&" before the + error or the beginning of the + string. + + @retval EFI_INVALID_PARAMETER Unknown name. Progress points + to the & before the name in + question. + +**/ +typedef +EFI_STATUS +(EFIAPI * EFI_HII_ACCESS_EXTRACT_CONFIG)( + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, + IN CONST EFI_STRING Request, + OUT EFI_STRING *Progress, + OUT EFI_STRING *Results +); + + +/** + + This function applies changes in a driver's configuration. + Input is a Configuration, which has the routing data for this + driver followed by name / value configuration pairs. The driver + must apply those pairs to its configurable storage. If the + driver's configuration is stored in a linear block of data + and the driver's name / value pairs are in <BlockConfig> + format, it may use the ConfigToBlock helper function (above) to + simplify the job. + + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL. + + @param Configuration A null-terminated Unicode string in + <ConfigString> format. + + @param Progress A pointer to a string filled in with the + offset of the most recent '&' before the + first failing name / value pair (or the + beginn ing of the string if the failure + is in the first name / value pair) or + the terminating NULL if all was + successful. + + @retval EFI_SUCCESS The results have been distributed or are + awaiting distribution. + + @retval EFI_OUT_OF_RESOURCES Not enough memory to store the + parts of the results that must be + stored awaiting possible future + protocols. + + @retval EFI_INVALID_PARAMETERS Passing in a NULL for the + Results parameter would result + in this type of error. + + @retval EFI_NOT_FOUND Target for the specified routing data + was not found + +**/ +typedef +EFI_STATUS +(EFIAPI * EFI_HII_ACCESS_ROUTE_CONFIG)( + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, + IN CONST EFI_STRING Configuration, + OUT EFI_STRING *Progress +); + +/** + + This function is called to provide results data to the driver. + This data consists of a unique key that is used to identify + which data is either being passed back or being asked for. + + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL. + @param Action Specifies the type of action taken by the browser. + @param QuestionId A unique value which is sent to the original + exporting driver so that it can identify the type + of data to expect. The format of the data tends to + vary based on the opcode that generated the callback. + @param Type The type of value for the question. + @param Value A pointer to the data being sent to the original + exporting driver. + @param ActionRequest On return, points to the action requested by the + callback function. + + @retval EFI_SUCCESS The callback successfully handled the action. + @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold the + variable and its data. + @retval EFI_DEVICE_ERROR The variable could not be saved. + @retval EFI_UNSUPPORTED The specified Action is not supported by the + callback. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_ACCESS_FORM_CALLBACK)( + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, + IN EFI_BROWSER_ACTION Action, + IN EFI_QUESTION_ID QuestionId, + IN UINT8 Type, + IN OUT EFI_IFR_TYPE_VALUE *Value, + OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest + ) + ; + +/// +/// This protocol provides a callable interface between the HII and +/// drivers. Only drivers which provide IFR data to HII are required +/// to publish this protocol. +/// +struct _EFI_HII_CONFIG_ACCESS_PROTOCOL { + EFI_HII_ACCESS_EXTRACT_CONFIG ExtractConfig; + EFI_HII_ACCESS_ROUTE_CONFIG RouteConfig; + EFI_HII_ACCESS_FORM_CALLBACK Callback; +} ; + +extern EFI_GUID gEfiHiiConfigAccessProtocolGuid; + +#endif + + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/HiiDatabase.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/HiiDatabase.h new file mode 100644 index 000000000..cbc0108b0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/HiiDatabase.h @@ -0,0 +1,533 @@ +/** @file + The file provides Database manager for HII-related data + structures. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __HII_DATABASE_H__ +#define __HII_DATABASE_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_HII_DATABASE_PROTOCOL_GUID \ + { 0xef9fc172, 0xa1b2, 0x4693, { 0xb3, 0x27, 0x6d, 0x32, 0xfc, 0x41, 0x60, 0x42 } } + + +typedef struct _EFI_HII_DATABASE_PROTOCOL EFI_HII_DATABASE_PROTOCOL; + + +/// +/// EFI_HII_DATABASE_NOTIFY_TYPE. +/// +typedef UINTN EFI_HII_DATABASE_NOTIFY_TYPE; + +#define EFI_HII_DATABASE_NOTIFY_NEW_PACK 0x00000001 +#define EFI_HII_DATABASE_NOTIFY_REMOVE_PACK 0x00000002 +#define EFI_HII_DATABASE_NOTIFY_EXPORT_PACK 0x00000004 +#define EFI_HII_DATABASE_NOTIFY_ADD_PACK 0x00000008 +/** + + Functions which are registered to receive notification of + database events have this prototype. The actual event is encoded + in NotifyType. The following table describes how PackageType, + PackageGuid, Handle, and Package are used for each of the + notification types. + + @param PackageType Package type of the notification. + + @param PackageGuid If PackageType is + EFI_HII_PACKAGE_TYPE_GUID, then this is + the pointer to the GUID from the Guid + field of EFI_HII_PACKAGE_GUID_HEADER. + Otherwise, it must be NULL. + + @param Package Points to the package referred to by the notification. + + @param Handle The handle of the package + list which contains the specified package. + + @param NotifyType The type of change concerning the + database. See + EFI_HII_DATABASE_NOTIFY_TYPE. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_NOTIFY)( + IN UINT8 PackageType, + IN CONST EFI_GUID *PackageGuid, + IN CONST EFI_HII_PACKAGE_HEADER *Package, + IN EFI_HII_HANDLE Handle, + IN EFI_HII_DATABASE_NOTIFY_TYPE NotifyType +); + +/** + + This function adds the packages in the package list to the + database and returns a handle. If there is a + EFI_DEVICE_PATH_PROTOCOL associated with the DriverHandle, then + this function will create a package of type + EFI_PACKAGE_TYPE_DEVICE_PATH and add it to the package list. For + each package in the package list, registered functions with the + notification type NEW_PACK and having the same package type will + be called. For each call to NewPackageList(), there should be a + corresponding call to + EFI_HII_DATABASE_PROTOCOL.RemovePackageList(). + + @param This A pointer to the EFI_HII_DATABASE_PROTOCOL instance. + + @param PackageList A pointer to an EFI_HII_PACKAGE_LIST_HEADER structure. + + @param DriverHandle Associate the package list with this EFI handle. + If a NULL is specified, this data will not be associate + with any drivers and cannot have a callback induced. + + @param Handle A pointer to the EFI_HII_HANDLE instance. + + @retval EFI_SUCCESS The package list associated with the + Handle was added to the HII database. + + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary + resources for the new database + contents. + + @retval EFI_INVALID_PARAMETER PackageList is NULL, or Handle is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_NEW_PACK)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN CONST EFI_HII_PACKAGE_LIST_HEADER *PackageList, + IN EFI_HANDLE DriverHandle, OPTIONAL + OUT EFI_HII_HANDLE *Handle +); + + +/** + + This function removes the package list that is associated with a + handle Handle from the HII database. Before removing the + package, any registered functions with the notification type + REMOVE_PACK and the same package type will be called. For each + call to EFI_HII_DATABASE_PROTOCOL.NewPackageList(), there should + be a corresponding call to RemovePackageList. + + @param This A pointer to the EFI_HII_DATABASE_PROTOCOL instance. + + @param Handle The handle that was registered to the data + that is requested for removal. + + @retval EFI_SUCCESS The data associated with the Handle was + removed from the HII database. + @retval EFI_NOT_FOUND The specified Handle is not in database. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_REMOVE_PACK)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN EFI_HII_HANDLE Handle +); + + +/** + + This function updates the existing package list (which has the + specified Handle) in the HII databases, using the new package + list specified by PackageList. The update process has the + following steps: Collect all the package types in the package + list specified by PackageList. A package type consists of the + Type field of EFI_HII_PACKAGE_HEADER and, if the Type is + EFI_HII_PACKAGE_TYPE_GUID, the Guid field, as defined in + EFI_HII_PACKAGE_GUID_HEADER. Iterate through the packages within + the existing package list in the HII database specified by + Handle. If a package's type matches one of the collected types collected + in step 1, then perform the following steps: + - Call any functions registered with the notification type + REMOVE_PACK. + - Remove the package from the package list and the HII + database. + Add all of the packages within the new package list specified + by PackageList, using the following steps: + - Add the package to the package list and the HII database. + - Call any functions registered with the notification type + ADD_PACK. + + @param This A pointer to the EFI_HII_DATABASE_PROTOCOL instance. + + @param Handle The handle that was registered to the data + that is requested for removal. + + @param PackageList A pointer to an EFI_HII_PACKAGE_LIST + package. + + @retval EFI_SUCCESS The HII database was successfully updated. + + @retval EFI_OUT_OF_RESOURCES Unable to allocate enough memory + for the updated database. + + @retval EFI_INVALID_PARAMETER PackageList was NULL. + @retval EFI_NOT_FOUND The specified Handle is not in database. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_UPDATE_PACK)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN EFI_HII_HANDLE Handle, + IN CONST EFI_HII_PACKAGE_LIST_HEADER *PackageList +); + + +/** + + This function returns a list of the package handles of the + specified type that are currently active in the database. The + pseudo-type EFI_HII_PACKAGE_TYPE_ALL will cause all package + handles to be listed. + + @param This A pointer to the EFI_HII_DATABASE_PROTOCOL instance. + + @param PackageType Specifies the package type of the packages + to list or EFI_HII_PACKAGE_TYPE_ALL for + all packages to be listed. + + @param PackageGuid If PackageType is + EFI_HII_PACKAGE_TYPE_GUID, then this is + the pointer to the GUID which must match + the Guid field of + EFI_HII_PACKAGE_GUID_HEADER. Otherwise, it + must be NULL. + + @param HandleBufferLength On input, a pointer to the length + of the handle buffer. On output, + the length of the handle buffer + that is required for the handles found. + + @param Handle An array of EFI_HII_HANDLE instances returned. + + @retval EFI_SUCCESS The matching handles are outputed successfully. + HandleBufferLength is updated with the actual length. + @retval EFI_BUFFER_TOO_SMALL The HandleBufferLength parameter + indicates that Handle is too + small to support the number of + handles. HandleBufferLength is + updated with a value that will + enable the data to fit. + @retval EFI_NOT_FOUND No matching handle could be found in database. + @retval EFI_INVALID_PARAMETER HandleBufferLength was NULL. + @retval EFI_INVALID_PARAMETER The value referenced by HandleBufferLength was not + zero and Handle was NULL. + @retval EFI_INVALID_PARAMETER PackageType is not a EFI_HII_PACKAGE_TYPE_GUID but + PackageGuid is not NULL, PackageType is a EFI_HII_ + PACKAGE_TYPE_GUID but PackageGuid is NULL. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_LIST_PACKS)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN UINT8 PackageType, + IN CONST EFI_GUID *PackageGuid, + IN OUT UINTN *HandleBufferLength, + OUT EFI_HII_HANDLE *Handle +); + +/** + + This function will export one or all package lists in the + database to a buffer. For each package list exported, this + function will call functions registered with EXPORT_PACK and + then copy the package list to the buffer. The registered + functions may call EFI_HII_DATABASE_PROTOCOL.UpdatePackageList() + to modify the package list before it is copied to the buffer. If + the specified BufferSize is too small, then the status + EFI_OUT_OF_RESOURCES will be returned and the actual package + size will be returned in BufferSize. + + @param This A pointer to the EFI_HII_DATABASE_PROTOCOL instance. + + + @param Handle An EFI_HII_HANDLE that corresponds to the + desired package list in the HII database to + export or NULL to indicate all package lists + should be exported. + + @param BufferSize On input, a pointer to the length of the + buffer. On output, the length of the + buffer that is required for the exported + data. + + @param Buffer A pointer to a buffer that will contain the + results of the export function. + + + @retval EFI_SUCCESS Package exported. + + @retval EFI_OUT_OF_RESOURCES BufferSize is too small to hold the package. + + @retval EFI_NOT_FOUND The specifiecd Handle could not be found in the + current database. + + @retval EFI_INVALID_PARAMETER BufferSize was NULL. + + @retval EFI_INVALID_PARAMETER The value referenced by BufferSize was not zero + and Buffer was NULL. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_EXPORT_PACKS)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN EFI_HII_HANDLE Handle, + IN OUT UINTN *BufferSize, + OUT EFI_HII_PACKAGE_LIST_HEADER *Buffer +); + + +/** + + + This function registers a function which will be called when + specified actions related to packages of the specified type + occur in the HII database. By registering a function, other + HII-related drivers are notified when specific package types + are added, removed or updated in the HII database. Each driver + or application which registers a notification should use + EFI_HII_DATABASE_PROTOCOL.UnregisterPackageNotify() before + exiting. + + + @param This A pointer to the EFI_HII_DATABASE_PROTOCOL instance. + + @param PackageType The package type. See + EFI_HII_PACKAGE_TYPE_x in EFI_HII_PACKAGE_HEADER. + + @param PackageGuid If PackageType is + EFI_HII_PACKAGE_TYPE_GUID, then this is + the pointer to the GUID which must match + the Guid field of + EFI_HII_PACKAGE_GUID_HEADER. Otherwise, it + must be NULL. + + @param PackageNotifyFn Points to the function to be called + when the event specified by + NotificationType occurs. See + EFI_HII_DATABASE_NOTIFY. + + @param NotifyType Describes the types of notification which + this function will be receiving. See + EFI_HII_DATABASE_NOTIFY_TYPE for a + list of types. + + @param NotifyHandle Points to the unique handle assigned to + the registered notification. Can be used + in EFI_HII_DATABASE_PROTOCOL.UnregisterPack + to stop notifications. + + + @retval EFI_SUCCESS Notification registered successfully. + + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary + data structures. + + @retval EFI_INVALID_PARAMETER PackageGuid is not NULL when + PackageType is not + EFI_HII_PACKAGE_TYPE_GUID. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_REGISTER_NOTIFY)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN UINT8 PackageType, + IN CONST EFI_GUID *PackageGuid, + IN EFI_HII_DATABASE_NOTIFY PackageNotifyFn, + IN EFI_HII_DATABASE_NOTIFY_TYPE NotifyType, + OUT EFI_HANDLE *NotifyHandle +); + + +/** + + Removes the specified HII database package-related notification. + + @param This A pointer to the EFI_HII_DATABASE_PROTOCOL instance. + + @param NotificationHandle The handle of the notification + function being unregistered. + + @retval EFI_SUCCESS Successsfully unregistered the notification. + + @retval EFI_NOT_FOUND The incoming notification handle does not exist + in the current hii database. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_UNREGISTER_NOTIFY)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN EFI_HANDLE NotificationHandle +); + + +/** + + This routine retrieves an array of GUID values for each keyboard + layout that was previously registered in the system. + + @param This A pointer to the EFI_HII_PROTOCOL instance. + + @param KeyGuidBufferLength On input, a pointer to the length + of the keyboard GUID buffer. On + output, the length of the handle + buffer that is required for the + handles found. + + @param KeyGuidBuffer An array of keyboard layout GUID + instances returned. + + @retval EFI_SUCCESS KeyGuidBuffer was updated successfully. + + @retval EFI_BUFFER_TOO_SMALL The KeyGuidBufferLength + parameter indicates that + KeyGuidBuffer is too small to + support the number of GUIDs. + KeyGuidBufferLength is updated + with a value that will enable + the data to fit. + @retval EFI_INVALID_PARAMETER The KeyGuidBufferLength is NULL. + @retval EFI_INVALID_PARAMETER The value referenced by + KeyGuidBufferLength is not + zero and KeyGuidBuffer is NULL. + @retval EFI_NOT_FOUND There was no keyboard layout. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_FIND_KEYBOARD_LAYOUTS)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN OUT UINT16 *KeyGuidBufferLength, + OUT EFI_GUID *KeyGuidBuffer +); + + +/** + + This routine retrieves the requested keyboard layout. The layout + is a physical description of the keys on a keyboard, and the + character(s) that are associated with a particular set of key + strokes. + + @param This A pointer to the EFI_HII_PROTOCOL instance. + + @param KeyGuid A pointer to the unique ID associated with a + given keyboard layout. If KeyGuid is NULL then + the current layout will be retrieved. + + @param KeyboardLayoutLength On input, a pointer to the length of the + KeyboardLayout buffer. On output, the length of + the data placed into KeyboardLayout. + + @param KeyboardLayout A pointer to a buffer containing the + retrieved keyboard layout. + + @retval EFI_SUCCESS The keyboard layout was retrieved + successfully. + + @retval EFI_NOT_FOUND The requested keyboard layout was not found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_GET_KEYBOARD_LAYOUT)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN CONST EFI_GUID *KeyGuid, + IN OUT UINT16 *KeyboardLayoutLength, + OUT EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout +); + +/** + + This routine sets the default keyboard layout to the one + referenced by KeyGuid. When this routine is called, an event + will be signaled of the EFI_HII_SET_KEYBOARD_LAYOUT_EVENT_GUID + group type. This is so that agents which are sensitive to the + current keyboard layout being changed can be notified of this + change. + + @param This A pointer to the EFI_HII_PROTOCOL instance. + + @param KeyGuid A pointer to the unique ID associated with a + given keyboard layout. + + @retval EFI_SUCCESS The current keyboard layout was successfully set. + + @retval EFI_NOT_FOUND The referenced keyboard layout was not + found, so action was taken. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_SET_KEYBOARD_LAYOUT)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN CONST EFI_GUID *KeyGuid +); + +/** + + Return the EFI handle associated with a package list. + + @param This A pointer to the EFI_HII_PROTOCOL instance. + + @param PackageListHandle An EFI_HII_HANDLE that corresponds + to the desired package list in the + HIIdatabase. + + @param DriverHandle On return, contains the EFI_HANDLE which + was registered with the package list in + NewPackageList(). + + @retval EFI_SUCCESS The DriverHandle was returned successfully. + + @retval EFI_INVALID_PARAMETER The PackageListHandle was not valid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HII_DATABASE_GET_PACK_HANDLE)( + IN CONST EFI_HII_DATABASE_PROTOCOL *This, + IN EFI_HII_HANDLE PackageListHandle, + OUT EFI_HANDLE *DriverHandle +); + +/// +/// Database manager for HII-related data structures. +/// +struct _EFI_HII_DATABASE_PROTOCOL { + EFI_HII_DATABASE_NEW_PACK NewPackageList; + EFI_HII_DATABASE_REMOVE_PACK RemovePackageList; + EFI_HII_DATABASE_UPDATE_PACK UpdatePackageList; + EFI_HII_DATABASE_LIST_PACKS ListPackageLists; + EFI_HII_DATABASE_EXPORT_PACKS ExportPackageLists; + EFI_HII_DATABASE_REGISTER_NOTIFY RegisterPackageNotify; + EFI_HII_DATABASE_UNREGISTER_NOTIFY UnregisterPackageNotify; + EFI_HII_FIND_KEYBOARD_LAYOUTS FindKeyboardLayouts; + EFI_HII_GET_KEYBOARD_LAYOUT GetKeyboardLayout; + EFI_HII_SET_KEYBOARD_LAYOUT SetKeyboardLayout; + EFI_HII_DATABASE_GET_PACK_HANDLE GetPackageListHandle; +}; + +extern EFI_GUID gEfiHiiDatabaseProtocolGuid; + +#endif + + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Ip4.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Ip4.h new file mode 100644 index 000000000..f174c0cfb --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Ip4.h @@ -0,0 +1,614 @@ +/** @file + This file defines the EFI IPv4 (Internet Protocol version 4) + Protocol interface. It is split into the following three main + sections: + - EFI IPv4 Service Binding Protocol + - EFI IPv4 Variable (deprecated in UEFI 2.4B) + - EFI IPv4 Protocol. + The EFI IPv4 Protocol provides basic network IPv4 packet I/O services, + which includes support foR a subset of the Internet Control Message + Protocol (ICMP) and may include support for the Internet Group Management + Protocol (IGMP). + +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in UEFI Specification 2.0. + +**/ + +#ifndef __EFI_IP4_PROTOCOL_H__ +#define __EFI_IP4_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/ManagedNetwork.h> + +#define EFI_IP4_SERVICE_BINDING_PROTOCOL_GUID \ + { \ + 0xc51711e7, 0xb4bf, 0x404a, {0xbf, 0xb8, 0x0a, 0x04, 0x8e, 0xf1, 0xff, 0xe4 } \ + } + +#define EFI_IP4_PROTOCOL_GUID \ + { \ + 0x41d94cd2, 0x35b6, 0x455a, {0x82, 0x58, 0xd4, 0xe5, 0x13, 0x34, 0xaa, 0xdd } \ + } + +typedef struct _EFI_IP4_PROTOCOL EFI_IP4_PROTOCOL; + +/// +/// EFI_IP4_ADDRESS_PAIR is deprecated in the UEFI 2.4B and should not be used any more. +/// The definition in here is only present to provide backwards compatability. +/// +typedef struct { + EFI_HANDLE InstanceHandle; + EFI_IPv4_ADDRESS Ip4Address; + EFI_IPv4_ADDRESS SubnetMask; +} EFI_IP4_ADDRESS_PAIR; + +/// +/// EFI_IP4_VARIABLE_DATA is deprecated in the UEFI 2.4B and should not be used any more. +/// The definition in here is only present to provide backwards compatability. +/// +typedef struct { + EFI_HANDLE DriverHandle; + UINT32 AddressCount; + EFI_IP4_ADDRESS_PAIR AddressPairs[1]; +} EFI_IP4_VARIABLE_DATA; + +typedef struct { + /// + /// The default IPv4 protocol packets to send and receive. Ignored + /// when AcceptPromiscuous is TRUE. + /// + UINT8 DefaultProtocol; + /// + /// Set to TRUE to receive all IPv4 packets that get through the receive filters. + /// Set to FALSE to receive only the DefaultProtocol IPv4 + /// packets that get through the receive filters. + /// + BOOLEAN AcceptAnyProtocol; + /// + /// Set to TRUE to receive ICMP error report packets. Ignored when + /// AcceptPromiscuous or AcceptAnyProtocol is TRUE. + /// + BOOLEAN AcceptIcmpErrors; + /// + /// Set to TRUE to receive broadcast IPv4 packets. Ignored when + /// AcceptPromiscuous is TRUE. + /// Set to FALSE to stop receiving broadcast IPv4 packets. + /// + BOOLEAN AcceptBroadcast; + /// + /// Set to TRUE to receive all IPv4 packets that are sent to any + /// hardware address or any protocol address. + /// Set to FALSE to stop receiving all promiscuous IPv4 packets + /// + BOOLEAN AcceptPromiscuous; + /// + /// Set to TRUE to use the default IPv4 address and default routing table. + /// + BOOLEAN UseDefaultAddress; + /// + /// The station IPv4 address that will be assigned to this EFI IPv4Protocol instance. + /// + EFI_IPv4_ADDRESS StationAddress; + /// + /// The subnet address mask that is associated with the station address. + /// + EFI_IPv4_ADDRESS SubnetMask; + /// + /// TypeOfService field in transmitted IPv4 packets. + /// + UINT8 TypeOfService; + /// + /// TimeToLive field in transmitted IPv4 packets. + /// + UINT8 TimeToLive; + /// + /// State of the DoNotFragment bit in transmitted IPv4 packets. + /// + BOOLEAN DoNotFragment; + /// + /// Set to TRUE to send and receive unformatted packets. The other + /// IPv4 receive filters are still applied. Fragmentation is disabled for RawData mode. + /// + BOOLEAN RawData; + /// + /// The timer timeout value (number of microseconds) for the + /// receive timeout event to be associated with each assembled + /// packet. Zero means do not drop assembled packets. + /// + UINT32 ReceiveTimeout; + /// + /// The timer timeout value (number of microseconds) for the + /// transmit timeout event to be associated with each outgoing + /// packet. Zero means do not drop outgoing packets. + /// + UINT32 TransmitTimeout; +} EFI_IP4_CONFIG_DATA; + + +typedef struct { + EFI_IPv4_ADDRESS SubnetAddress; + EFI_IPv4_ADDRESS SubnetMask; + EFI_IPv4_ADDRESS GatewayAddress; +} EFI_IP4_ROUTE_TABLE; + +typedef struct { + UINT8 Type; + UINT8 Code; +} EFI_IP4_ICMP_TYPE; + +typedef struct { + /// + /// Set to TRUE after this EFI IPv4 Protocol instance has been successfully configured. + /// + BOOLEAN IsStarted; + /// + /// The maximum packet size, in bytes, of the packet which the upper layer driver could feed. + /// + UINT32 MaxPacketSize; + /// + /// Current configuration settings. + /// + EFI_IP4_CONFIG_DATA ConfigData; + /// + /// Set to TRUE when the EFI IPv4 Protocol instance has a station address and subnet mask. + /// + BOOLEAN IsConfigured; + /// + /// Number of joined multicast groups. + /// + UINT32 GroupCount; + /// + /// List of joined multicast group addresses. + /// + EFI_IPv4_ADDRESS *GroupTable; + /// + /// Number of entries in the routing table. + /// + UINT32 RouteCount; + /// + /// Routing table entries. + /// + EFI_IP4_ROUTE_TABLE *RouteTable; + /// + /// Number of entries in the supported ICMP types list. + /// + UINT32 IcmpTypeCount; + /// + /// Array of ICMP types and codes that are supported by this EFI IPv4 Protocol driver + /// + EFI_IP4_ICMP_TYPE *IcmpTypeList; +} EFI_IP4_MODE_DATA; + +#pragma pack(1) + +typedef struct { + UINT8 HeaderLength:4; + UINT8 Version:4; + UINT8 TypeOfService; + UINT16 TotalLength; + UINT16 Identification; + UINT16 Fragmentation; + UINT8 TimeToLive; + UINT8 Protocol; + UINT16 Checksum; + EFI_IPv4_ADDRESS SourceAddress; + EFI_IPv4_ADDRESS DestinationAddress; +} EFI_IP4_HEADER; +#pragma pack() + + +typedef struct { + UINT32 FragmentLength; + VOID *FragmentBuffer; +} EFI_IP4_FRAGMENT_DATA; + + +typedef struct { + EFI_TIME TimeStamp; + EFI_EVENT RecycleSignal; + UINT32 HeaderLength; + EFI_IP4_HEADER *Header; + UINT32 OptionsLength; + VOID *Options; + UINT32 DataLength; + UINT32 FragmentCount; + EFI_IP4_FRAGMENT_DATA FragmentTable[1]; +} EFI_IP4_RECEIVE_DATA; + + +typedef struct { + EFI_IPv4_ADDRESS SourceAddress; + EFI_IPv4_ADDRESS GatewayAddress; + UINT8 Protocol; + UINT8 TypeOfService; + UINT8 TimeToLive; + BOOLEAN DoNotFragment; +} EFI_IP4_OVERRIDE_DATA; + +typedef struct { + EFI_IPv4_ADDRESS DestinationAddress; + EFI_IP4_OVERRIDE_DATA *OverrideData; //OPTIONAL + UINT32 OptionsLength; //OPTIONAL + VOID *OptionsBuffer; //OPTIONAL + UINT32 TotalDataLength; + UINT32 FragmentCount; + EFI_IP4_FRAGMENT_DATA FragmentTable[1]; +} EFI_IP4_TRANSMIT_DATA; + +typedef struct { + /// + /// This Event will be signaled after the Status field is updated + /// by the EFI IPv4 Protocol driver. The type of Event must be + /// EFI_NOTIFY_SIGNAL. The Task Priority Level (TPL) of + /// Event must be lower than or equal to TPL_CALLBACK. + /// + EFI_EVENT Event; + /// + /// The status that is returned to the caller at the end of the operation + /// to indicate whether this operation completed successfully. + /// + EFI_STATUS Status; + union { + /// + /// When this token is used for receiving, RxData is a pointer to the EFI_IP4_RECEIVE_DATA. + /// + EFI_IP4_RECEIVE_DATA *RxData; + /// + /// When this token is used for transmitting, TxData is a pointer to the EFI_IP4_TRANSMIT_DATA. + /// + EFI_IP4_TRANSMIT_DATA *TxData; + } Packet; +} EFI_IP4_COMPLETION_TOKEN; + +/** + Gets the current operational settings for this instance of the EFI IPv4 Protocol driver. + + The GetModeData() function returns the current operational mode data for this + driver instance. The data fields in EFI_IP4_MODE_DATA are read only. This + function is used optionally to retrieve the operational mode data of underlying + networks or drivers. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + @param Ip4ModeData The pointer to the EFI IPv4 Protocol mode data structure. + @param MnpConfigData The pointer to the managed network configuration data structure. + @param SnpModeData The pointer to the simple network mode data structure. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_OUT_OF_RESOURCES The required mode data could not be allocated. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_GET_MODE_DATA)( + IN CONST EFI_IP4_PROTOCOL *This, + OUT EFI_IP4_MODE_DATA *Ip4ModeData OPTIONAL, + OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL, + OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL + ); + +/** + Assigns an IPv4 address and subnet mask to this EFI IPv4 Protocol driver instance. + + The Configure() function is used to set, change, or reset the operational + parameters and filter settings for this EFI IPv4 Protocol instance. Until these + parameters have been set, no network traffic can be sent or received by this + instance. Once the parameters have been reset (by calling this function with + IpConfigData set to NULL), no more traffic can be sent or received until these + parameters have been set again. Each EFI IPv4 Protocol instance can be started + and stopped independently of each other by enabling or disabling their receive + filter settings with the Configure() function. + + When IpConfigData.UseDefaultAddress is set to FALSE, the new station address will + be appended as an alias address into the addresses list in the EFI IPv4 Protocol + driver. While set to TRUE, Configure() will trigger the EFI_IP4_CONFIG_PROTOCOL + to retrieve the default IPv4 address if it is not available yet. Clients could + frequently call GetModeData() to check the status to ensure that the default IPv4 + address is ready. + + If operational parameters are reset or changed, any pending transmit and receive + requests will be cancelled. Their completion token status will be set to EFI_ABORTED + and their events will be signaled. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + @param IpConfigData The pointer to the EFI IPv4 Protocol configuration data structure. + + @retval EFI_SUCCESS The driver instance was successfully opened. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + This is NULL. + IpConfigData.StationAddress is not a unicast IPv4 address. + IpConfigData.SubnetMask is not a valid IPv4 subnet + @retval EFI_UNSUPPORTED One or more of the following conditions is TRUE: + A configuration protocol (DHCP, BOOTP, RARP, etc.) could + not be located when clients choose to use the default IPv4 + address. This EFI IPv4 Protocol implementation does not + support this requested filter or timeout setting. + @retval EFI_OUT_OF_RESOURCES The EFI IPv4 Protocol driver instance data could not be allocated. + @retval EFI_ALREADY_STARTED The interface is already open and must be stopped before the + IPv4 address or subnet mask can be changed. The interface must + also be stopped when switching to/from raw packet mode. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. The EFI IPv4 + Protocol driver instance is not opened. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_CONFIGURE)( + IN EFI_IP4_PROTOCOL *This, + IN EFI_IP4_CONFIG_DATA *IpConfigData OPTIONAL + ); + +/** + Joins and leaves multicast groups. + + The Groups() function is used to join and leave multicast group sessions. Joining + a group will enable reception of matching multicast packets. Leaving a group will + disable the multicast packet reception. + + If JoinFlag is FALSE and GroupAddress is NULL, all joined groups will be left. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + @param JoinFlag Set to TRUE to join the multicast group session and FALSE to leave. + @param GroupAddress The pointer to the IPv4 multicast address. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER One or more of the following is TRUE: + - This is NULL. + - JoinFlag is TRUE and GroupAddress is NULL. + - GroupAddress is not NULL and *GroupAddress is + not a multicast IPv4 address. + @retval EFI_NOT_STARTED This instance has not been started. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_OUT_OF_RESOURCES System resources could not be allocated. + @retval EFI_UNSUPPORTED This EFI IPv4 Protocol implementation does not support multicast groups. + @retval EFI_ALREADY_STARTED The group address is already in the group table (when + JoinFlag is TRUE). + @retval EFI_NOT_FOUND The group address is not in the group table (when JoinFlag is FALSE). + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_GROUPS)( + IN EFI_IP4_PROTOCOL *This, + IN BOOLEAN JoinFlag, + IN EFI_IPv4_ADDRESS *GroupAddress OPTIONAL + ); + +/** + Adds and deletes routing table entries. + + The Routes() function adds a route to or deletes a route from the routing table. + + Routes are determined by comparing the SubnetAddress with the destination IPv4 + address arithmetically AND-ed with the SubnetMask. The gateway address must be + on the same subnet as the configured station address. + + The default route is added with SubnetAddress and SubnetMask both set to 0.0.0.0. + The default route matches all destination IPv4 addresses that do not match any + other routes. + + A GatewayAddress that is zero is a nonroute. Packets are sent to the destination + IP address if it can be found in the ARP cache or on the local subnet. One automatic + nonroute entry will be inserted into the routing table for outgoing packets that + are addressed to a local subnet (gateway address of 0.0.0.0). + + Each EFI IPv4 Protocol instance has its own independent routing table. Those EFI + IPv4 Protocol instances that use the default IPv4 address will also have copies + of the routing table that was provided by the EFI_IP4_CONFIG_PROTOCOL, and these + copies will be updated whenever the EIF IPv4 Protocol driver reconfigures its + instances. As a result, client modification to the routing table will be lost. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + @param DeleteRoute Set to TRUE to delete this route from the routing table. Set to + FALSE to add this route to the routing table. SubnetAddress + and SubnetMask are used as the key to each route entry. + @param SubnetAddress The address of the subnet that needs to be routed. + @param SubnetMask The subnet mask of SubnetAddress. + @param GatewayAddress The unicast gateway IPv4 address for this route. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_NOT_STARTED The driver instance has not been started. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - SubnetAddress is NULL. + - SubnetMask is NULL. + - GatewayAddress is NULL. + - *SubnetAddress is not a valid subnet address. + - *SubnetMask is not a valid subnet mask. + - *GatewayAddress is not a valid unicast IPv4 address. + @retval EFI_OUT_OF_RESOURCES Could not add the entry to the routing table. + @retval EFI_NOT_FOUND This route is not in the routing table (when DeleteRoute is TRUE). + @retval EFI_ACCESS_DENIED The route is already defined in the routing table (when + DeleteRoute is FALSE). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_ROUTES)( + IN EFI_IP4_PROTOCOL *This, + IN BOOLEAN DeleteRoute, + IN EFI_IPv4_ADDRESS *SubnetAddress, + IN EFI_IPv4_ADDRESS *SubnetMask, + IN EFI_IPv4_ADDRESS *GatewayAddress + ); + +/** + Places outgoing data packets into the transmit queue. + + The Transmit() function places a sending request in the transmit queue of this + EFI IPv4 Protocol instance. Whenever the packet in the token is sent out or some + errors occur, the event in the token will be signaled and the status is updated. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + @param Token The pointer to the transmit token. + + @retval EFI_SUCCESS The data has been queued for transmission. + @retval EFI_NOT_STARTED This instance has not been started. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more pameters are invalid. + @retval EFI_ACCESS_DENIED The transmit completion token with the same Token.Event + was already in the transmit queue. + @retval EFI_NOT_READY The completion token could not be queued because the transmit + queue is full. + @retval EFI_NOT_FOUND Not route is found to destination address. + @retval EFI_OUT_OF_RESOURCES Could not queue the transmit data. + @retval EFI_BUFFER_TOO_SMALL Token.Packet.TxData.TotalDataLength is too + short to transmit. + @retval EFI_BAD_BUFFER_SIZE The length of the IPv4 header + option length + total data length is + greater than MTU (or greater than the maximum packet size if + Token.Packet.TxData.OverrideData. + DoNotFragment is TRUE.) + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_TRANSMIT)( + IN EFI_IP4_PROTOCOL *This, + IN EFI_IP4_COMPLETION_TOKEN *Token + ); + +/** + Places a receiving request into the receiving queue. + + The Receive() function places a completion token into the receive packet queue. + This function is always asynchronous. + + The Token.Event field in the completion token must be filled in by the caller + and cannot be NULL. When the receive operation completes, the EFI IPv4 Protocol + driver updates the Token.Status and Token.Packet.RxData fields and the Token.Event + is signaled. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + @param Token The pointer to a token that is associated with the receive data descriptor. + + @retval EFI_SUCCESS The receive completion token was cached. + @retval EFI_NOT_STARTED This EFI IPv4 Protocol instance has not been started. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, RARP, etc.) + is not finished yet. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - Token is NULL. + - Token.Event is NULL. + @retval EFI_OUT_OF_RESOURCES The receive completion token could not be queued due to a lack of system + resources (usually memory). + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + The EFI IPv4 Protocol instance has been reset to startup defaults. + @retval EFI_ACCESS_DENIED The receive completion token with the same Token.Event was already + in the receive queue. + @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full. + @retval EFI_ICMP_ERROR An ICMP error packet was received. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_RECEIVE)( + IN EFI_IP4_PROTOCOL *This, + IN EFI_IP4_COMPLETION_TOKEN *Token + ); + +/** + Abort an asynchronous transmit or receive request. + + The Cancel() function is used to abort a pending transmit or receive request. + If the token is in the transmit or receive request queues, after calling this + function, Token->Status will be set to EFI_ABORTED and then Token->Event will + be signaled. If the token is not in one of the queues, which usually means the + asynchronous operation has completed, this function will not signal the token + and EFI_NOT_FOUND is returned. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + @param Token The pointer to a token that has been issued by + EFI_IP4_PROTOCOL.Transmit() or + EFI_IP4_PROTOCOL.Receive(). If NULL, all pending + tokens are aborted. Type EFI_IP4_COMPLETION_TOKEN is + defined in EFI_IP4_PROTOCOL.Transmit(). + + @retval EFI_SUCCESS The asynchronous I/O request was aborted and + Token->Event was signaled. When Token is NULL, all + pending requests were aborted and their events were signaled. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_STARTED This instance has not been started. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_NOT_FOUND When Token is not NULL, the asynchronous I/O request was + not found in the transmit or receive queue. It has either completed + or was not issued by Transmit() and Receive(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_CANCEL)( + IN EFI_IP4_PROTOCOL *This, + IN EFI_IP4_COMPLETION_TOKEN *Token OPTIONAL + ); + +/** + Polls for incoming data packets and processes outgoing data packets. + + The Poll() function polls for incoming data packets and processes outgoing data + packets. Network drivers and applications can call the EFI_IP4_PROTOCOL.Poll() + function to increase the rate that data packets are moved between the communications + device and the transmit and receive queues. + + In some systems the periodic timer event may not poll the underlying communications + device fast enough to transmit and/or receive all data packets without missing + incoming packets or dropping outgoing packets. Drivers and applications that are + experiencing packet loss should try calling the EFI_IP4_PROTOCOL.Poll() function + more often. + + @param This The pointer to the EFI_IP4_PROTOCOL instance. + + @retval EFI_SUCCESS Incoming or outgoing data was processed. + @retval EFI_NOT_STARTED This EFI IPv4 Protocol instance has not been started. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_NOT_READY No incoming or outgoing data is processed. + @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue. + Consider increasing the polling rate. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_POLL)( + IN EFI_IP4_PROTOCOL *This + ); + +/// +/// The EFI IPv4 Protocol implements a simple packet-oriented interface that can be +/// used by drivers, daemons, and applications to transmit and receive network packets. +/// +struct _EFI_IP4_PROTOCOL { + EFI_IP4_GET_MODE_DATA GetModeData; + EFI_IP4_CONFIGURE Configure; + EFI_IP4_GROUPS Groups; + EFI_IP4_ROUTES Routes; + EFI_IP4_TRANSMIT Transmit; + EFI_IP4_RECEIVE Receive; + EFI_IP4_CANCEL Cancel; + EFI_IP4_POLL Poll; +}; + +extern EFI_GUID gEfiIp4ServiceBindingProtocolGuid; +extern EFI_GUID gEfiIp4ProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Ip4Config.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Ip4Config.h new file mode 100644 index 000000000..227ae0399 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Ip4Config.h @@ -0,0 +1,184 @@ +/** @file + This file provides a definition of the EFI IPv4 Configuration + Protocol. + +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in UEFI Specification 2.0. + +**/ +#ifndef __EFI_IP4CONFIG_PROTOCOL_H__ +#define __EFI_IP4CONFIG_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/Ip4.h> + +#define EFI_IP4_CONFIG_PROTOCOL_GUID \ + { \ + 0x3b95aa31, 0x3793, 0x434b, {0x86, 0x67, 0xc8, 0x07, 0x08, 0x92, 0xe0, 0x5e } \ + } + +typedef struct _EFI_IP4_CONFIG_PROTOCOL EFI_IP4_CONFIG_PROTOCOL; + +#define IP4_CONFIG_VARIABLE_ATTRIBUTES \ + (EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS) + +/// +/// EFI_IP4_IPCONFIG_DATA contains the minimum IPv4 configuration data +/// that is needed to start basic network communication. The StationAddress +/// and SubnetMask must be a valid unicast IP address and subnet mask. +/// If RouteTableSize is not zero, then RouteTable contains a properly +/// formatted routing table for the StationAddress/SubnetMask, with the +/// last entry in the table being the default route. +/// +typedef struct { + /// + /// Default station IP address, stored in network byte order. + /// + EFI_IPv4_ADDRESS StationAddress; + /// + /// Default subnet mask, stored in network byte order. + /// + EFI_IPv4_ADDRESS SubnetMask; + /// + /// Number of entries in the following RouteTable. May be zero. + /// + UINT32 RouteTableSize; + /// + /// Default routing table data (stored in network byte order). + /// Ignored if RouteTableSize is zero. + /// + EFI_IP4_ROUTE_TABLE *RouteTable; +} EFI_IP4_IPCONFIG_DATA; + + +/** + Starts running the configuration policy for the EFI IPv4 Protocol driver. + + The Start() function is called to determine and to begin the platform + configuration policy by the EFI IPv4 Protocol driver. This determination may + be as simple as returning EFI_UNSUPPORTED if there is no EFI IPv4 Protocol + driver configuration policy. It may be as involved as loading some defaults + from nonvolatile storage, downloading dynamic data from a DHCP server, and + checking permissions with a site policy server. + Starting the configuration policy is just the beginning. It may finish almost + instantly or it may take several minutes before it fails to retrieve configuration + information from one or more servers. Once the policy is started, drivers + should use the DoneEvent parameter to determine when the configuration policy + has completed. EFI_IP4_CONFIG_PROTOCOL.GetData() must then be called to + determine if the configuration succeeded or failed. + Until the configuration completes successfully, EFI IPv4 Protocol driver instances + that are attempting to use default configurations must return EFI_NO_MAPPING. + Once the configuration is complete, the EFI IPv4 Configuration Protocol driver + signals DoneEvent. The configuration may need to be updated in the future. + Note that in this case the EFI IPv4 Configuration Protocol driver must signal + ReconfigEvent, and all EFI IPv4 Protocol driver instances that are using default + configurations must return EFI_NO_MAPPING until the configuration policy has + been rerun. + + @param This The pointer to the EFI_IP4_CONFIG_PROTOCOL instance. + @param DoneEvent Event that will be signaled when the EFI IPv4 + Protocol driver configuration policy completes + execution. This event must be of type EVT_NOTIFY_SIGNAL. + @param ReconfigEvent Event that will be signaled when the EFI IPv4 + Protocol driver configuration needs to be updated. + This event must be of type EVT_NOTIFY_SIGNAL. + + @retval EFI_SUCCESS The configuration policy for the EFI IPv4 Protocol + driver is now running. + @retval EFI_INVALID_PARAMETER One or more of the following parameters is NULL: + This + DoneEvent + ReconfigEvent + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_ALREADY_STARTED The configuration policy for the EFI IPv4 Protocol + driver was already started. + @retval EFI_DEVICE_ERROR An unexpected system error or network error occurred. + @retval EFI_UNSUPPORTED This interface does not support the EFI IPv4 Protocol + driver configuration. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_CONFIG_START)( + IN EFI_IP4_CONFIG_PROTOCOL *This, + IN EFI_EVENT DoneEvent, + IN EFI_EVENT ReconfigEvent + ); + +/** + Stops running the configuration policy for the EFI IPv4 Protocol driver. + + The Stop() function stops the configuration policy for the EFI IPv4 Protocol driver. + All configuration data will be lost after calling Stop(). + + @param This The pointer to the EFI_IP4_CONFIG_PROTOCOL instance. + + @retval EFI_SUCCESS The configuration policy for the EFI IPv4 Protocol + driver has been stopped. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_STARTED The configuration policy for the EFI IPv4 Protocol + driver was not started. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_CONFIG_STOP)( + IN EFI_IP4_CONFIG_PROTOCOL *This + ); + +/** + Returns the default configuration data (if any) for the EFI IPv4 Protocol driver. + + The GetData() function returns the current configuration data for the EFI IPv4 + Protocol driver after the configuration policy has completed. + + @param This The pointer to the EFI_IP4_CONFIG_PROTOCOL instance. + @param IpConfigDataSize On input, the size of the IpConfigData buffer. + On output, the count of bytes that were written + into the IpConfigData buffer. + @param IpConfigData The pointer to the EFI IPv4 Configuration Protocol + driver configuration data structure. + Type EFI_IP4_IPCONFIG_DATA is defined in + "Related Definitions" below. + + @retval EFI_SUCCESS The EFI IPv4 Protocol driver configuration has been returned. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_STARTED The configuration policy for the EFI IPv4 Protocol + driver is not running. + @retval EFI_NOT_READY EFI IPv4 Protocol driver configuration is still running. + @retval EFI_ABORTED EFI IPv4 Protocol driver configuration could not complete. + @retval EFI_BUFFER_TOO_SMALL *IpConfigDataSize is smaller than the configuration + data buffer or IpConfigData is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IP4_CONFIG_GET_DATA)( + IN EFI_IP4_CONFIG_PROTOCOL *This, + IN OUT UINTN *IpConfigDataSize, + OUT EFI_IP4_IPCONFIG_DATA *IpConfigData OPTIONAL + ); + +/// +/// The EFI_IP4_CONFIG_PROTOCOL driver performs platform-dependent and policy-dependent +/// configurations for the EFI IPv4 Protocol driver. +/// +struct _EFI_IP4_CONFIG_PROTOCOL { + EFI_IP4_CONFIG_START Start; + EFI_IP4_CONFIG_STOP Stop; + EFI_IP4_CONFIG_GET_DATA GetData; +}; + +extern EFI_GUID gEfiIp4ConfigProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadFile.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadFile.h new file mode 100644 index 000000000..99387e89f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadFile.h @@ -0,0 +1,90 @@ +/** @file + Load File protocol as defined in the UEFI 2.0 specification. + + The load file protocol exists to supports the addition of new boot devices, + and to support booting from devices that do not map well to file system. + Network boot is done via a LoadFile protocol. + + UEFI 2.0 can boot from any device that produces a LoadFile protocol. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EFI_LOAD_FILE_PROTOCOL_H__ +#define __EFI_LOAD_FILE_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_LOAD_FILE_PROTOCOL_GUID \ + { \ + 0x56EC3091, 0x954C, 0x11d2, {0x8E, 0x3F, 0x00, 0xA0, 0xC9, 0x69, 0x72, 0x3B } \ + } + +/// +/// Protocol Guid defined by EFI1.1. +/// +#define LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL_GUID + +typedef struct _EFI_LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL; + +/// +/// Backward-compatible with EFI1.1 +/// +typedef EFI_LOAD_FILE_PROTOCOL EFI_LOAD_FILE_INTERFACE; + +/** + Causes the driver to load a specified file. + + @param This Protocol instance pointer. + @param FilePath The device specific path of the file to load. + @param BootPolicy If TRUE, indicates that the request originates from the + boot manager is attempting to load FilePath as a boot + selection. If FALSE, then FilePath must match as exact file + to be loaded. + @param BufferSize On input the size of Buffer in bytes. On output with a return + code of EFI_SUCCESS, the amount of data transferred to + Buffer. On output with a return code of EFI_BUFFER_TOO_SMALL, + the size of Buffer required to retrieve the requested file. + @param Buffer The memory buffer to transfer the file to. IF Buffer is NULL, + then the size of the requested file is returned in + BufferSize. + + @retval EFI_SUCCESS The file was loaded. + @retval EFI_UNSUPPORTED The device does not support the provided BootPolicy + @retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or + BufferSize is NULL. + @retval EFI_NO_MEDIA No medium was present to load the file. + @retval EFI_DEVICE_ERROR The file was not loaded due to a device error. + @retval EFI_NO_RESPONSE The remote system did not respond. + @retval EFI_NOT_FOUND The file was not found. + @retval EFI_ABORTED The file load process was manually cancelled. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_LOAD_FILE)( + IN EFI_LOAD_FILE_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *FilePath, + IN BOOLEAN BootPolicy, + IN OUT UINTN *BufferSize, + IN VOID *Buffer OPTIONAL + ); + +/// +/// The EFI_LOAD_FILE_PROTOCOL is a simple protocol used to obtain files from arbitrary devices. +/// +struct _EFI_LOAD_FILE_PROTOCOL { + EFI_LOAD_FILE LoadFile; +}; + +extern EFI_GUID gEfiLoadFileProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadFile2.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadFile2.h new file mode 100644 index 000000000..6cb26fff9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadFile2.h @@ -0,0 +1,87 @@ +/** @file + Load File protocol as defined in the UEFI 2.0 specification. + + Load file protocol exists to supports the addition of new boot devices, + and to support booting from devices that do not map well to file system. + Network boot is done via a LoadFile protocol. + + UEFI 2.0 can boot from any device that produces a LoadFile protocol. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EFI_LOAD_FILE2_PROTOCOL_H__ +#define __EFI_LOAD_FILE2_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_LOAD_FILE2_PROTOCOL_GUID \ + { \ + 0x4006c0c1, 0xfcb3, 0x403e, {0x99, 0x6d, 0x4a, 0x6c, 0x87, 0x24, 0xe0, 0x6d } \ + } + +/// +/// Protocol Guid defined by UEFI2.1. +/// +#define LOAD_FILE2_PROTOCOL EFI_LOAD_FILE2_PROTOCOL_GUID + +typedef struct _EFI_LOAD_FILE2_PROTOCOL EFI_LOAD_FILE2_PROTOCOL; + + +/** + Causes the driver to load a specified file. + + @param This Protocol instance pointer. + @param FilePath The device specific path of the file to load. + @param BootPolicy Should always be FALSE. + @param BufferSize On input the size of Buffer in bytes. On output with a return + code of EFI_SUCCESS, the amount of data transferred to + Buffer. On output with a return code of EFI_BUFFER_TOO_SMALL, + the size of Buffer required to retrieve the requested file. + @param Buffer The memory buffer to transfer the file to. IF Buffer is NULL, + then no the size of the requested file is returned in + BufferSize. + + @retval EFI_SUCCESS The file was loaded. + @retval EFI_UNSUPPORTED BootPolicy is TRUE. + @retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or + BufferSize is NULL. + @retval EFI_NO_MEDIA No medium was present to load the file. + @retval EFI_DEVICE_ERROR The file was not loaded due to a device error. + @retval EFI_NO_RESPONSE The remote system did not respond. + @retval EFI_NOT_FOUND The file was not found + @retval EFI_ABORTED The file load process was manually canceled. + @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current + directory entry. BufferSize has been updated with + the size needed to complete the request. + + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_LOAD_FILE2)( + IN EFI_LOAD_FILE2_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *FilePath, + IN BOOLEAN BootPolicy, + IN OUT UINTN *BufferSize, + IN VOID *Buffer OPTIONAL + ); + +/// +/// The EFI_LOAD_FILE_PROTOCOL is a simple protocol used to obtain files from arbitrary devices. +/// +struct _EFI_LOAD_FILE2_PROTOCOL { + EFI_LOAD_FILE2 LoadFile; +}; + +extern EFI_GUID gEfiLoadFile2ProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadedImage.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadedImage.h new file mode 100755 index 000000000..cbe4103c4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/LoadedImage.h @@ -0,0 +1,90 @@ +/** @file + UEFI 2.0 Loaded image protocol definition. + + Every EFI driver and application is passed an image handle when it is loaded. + This image handle will contain a Loaded Image Protocol. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __LOADED_IMAGE_PROTOCOL_H__ +#define __LOADED_IMAGE_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_LOADED_IMAGE_PROTOCOL_GUID \ + { \ + 0x5B1B31A1, 0x9562, 0x11d2, {0x8E, 0x3F, 0x00, 0xA0, 0xC9, 0x69, 0x72, 0x3B } \ + } + +#define EFI_LOADED_IMAGE_DEVICE_PATH_PROTOCOL_GUID \ + { \ + 0xbc62157e, 0x3e33, 0x4fec, {0x99, 0x20, 0x2d, 0x3b, 0x36, 0xd7, 0x50, 0xdf } \ + } + +/// +/// Protocol GUID defined in EFI1.1. +/// +#define LOADED_IMAGE_PROTOCOL EFI_LOADED_IMAGE_PROTOCOL_GUID + +/// +/// EFI_SYSTEM_TABLE & EFI_IMAGE_UNLOAD are defined in EfiApi.h +/// +#define EFI_LOADED_IMAGE_PROTOCOL_REVISION 0x1000 + +/// +/// Revision defined in EFI1.1. +/// +#define EFI_LOADED_IMAGE_INFORMATION_REVISION EFI_LOADED_IMAGE_PROTOCOL_REVISION + +/// +/// Can be used on any image handle to obtain information about the loaded image. +/// +typedef struct { + UINT32 Revision; ///< Defines the revision of the EFI_LOADED_IMAGE_PROTOCOL structure. + ///< All future revisions will be backward compatible to the current revision. + EFI_HANDLE ParentHandle; ///< Parent image's image handle. NULL if the image is loaded directly from + ///< the firmware's boot manager. + EFI_SYSTEM_TABLE *SystemTable; ///< the image's EFI system table pointer. + + // + // Source location of image + // + EFI_HANDLE DeviceHandle; ///< The device handle that the EFI Image was loaded from. + EFI_DEVICE_PATH_PROTOCOL *FilePath; ///< A pointer to the file path portion specific to DeviceHandle + ///< that the EFI Image was loaded from. + VOID *Reserved; ///< Reserved. DO NOT USE. + + // + // Images load options + // + UINT32 LoadOptionsSize;///< The size in bytes of LoadOptions. + VOID *LoadOptions; ///< A pointer to the image's binary load options. + + // + // Location of where image was loaded + // + VOID *ImageBase; ///< The base address at which the image was loaded. + UINT64 ImageSize; ///< The size in bytes of the loaded image. + EFI_MEMORY_TYPE ImageCodeType; ///< The memory type that the code sections were loaded as. + EFI_MEMORY_TYPE ImageDataType; ///< The memory type that the data sections were loaded as. + EFI_IMAGE_UNLOAD Unload; +} EFI_LOADED_IMAGE_PROTOCOL; + +// +// For backward-compatible with EFI1.1. +// +typedef EFI_LOADED_IMAGE_PROTOCOL EFI_LOADED_IMAGE; + +extern EFI_GUID gEfiLoadedImageProtocolGuid; +extern EFI_GUID gEfiLoadedImageDevicePathProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ManagedNetwork.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ManagedNetwork.h new file mode 100644 index 000000000..2bd092269 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/ManagedNetwork.h @@ -0,0 +1,374 @@ +/** @file + EFI_MANAGED_NETWORK_SERVICE_BINDING_PROTOCOL as defined in UEFI 2.0. + EFI_MANAGED_NETWORK_PROTOCOL as defined in UEFI 2.0. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in UEFI Specification 2.0 + +**/ + +#ifndef __EFI_MANAGED_NETWORK_PROTOCOL_H__ +#define __EFI_MANAGED_NETWORK_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/SimpleNetwork.h> + +#define EFI_MANAGED_NETWORK_SERVICE_BINDING_PROTOCOL_GUID \ + { \ + 0xf36ff770, 0xa7e1, 0x42cf, {0x9e, 0xd2, 0x56, 0xf0, 0xf2, 0x71, 0xf4, 0x4c } \ + } + +#define EFI_MANAGED_NETWORK_PROTOCOL_GUID \ + { \ + 0x7ab33a91, 0xace5, 0x4326, { 0xb5, 0x72, 0xe7, 0xee, 0x33, 0xd3, 0x9f, 0x16 } \ + } + +typedef struct _EFI_MANAGED_NETWORK_PROTOCOL EFI_MANAGED_NETWORK_PROTOCOL; + +typedef struct { + /// + /// Timeout value for a UEFI one-shot timer event. A packet that has not been removed + /// from the MNP receive queue will be dropped if its receive timeout expires. + /// + UINT32 ReceivedQueueTimeoutValue; + /// + /// Timeout value for a UEFI one-shot timer event. A packet that has not been removed + /// from the MNP transmit queue will be dropped if its receive timeout expires. + /// + UINT32 TransmitQueueTimeoutValue; + /// + /// Ethernet type II 16-bit protocol type in host byte order. Valid + /// values are zero and 1,500 to 65,535. + /// + UINT16 ProtocolTypeFilter; + /// + /// Set to TRUE to receive packets that are sent to the network + /// device MAC address. The startup default value is FALSE. + /// + BOOLEAN EnableUnicastReceive; + /// + /// Set to TRUE to receive packets that are sent to any of the + /// active multicast groups. The startup default value is FALSE. + /// + BOOLEAN EnableMulticastReceive; + /// + /// Set to TRUE to receive packets that are sent to the network + /// device broadcast address. The startup default value is FALSE. + /// + BOOLEAN EnableBroadcastReceive; + /// + /// Set to TRUE to receive packets that are sent to any MAC address. + /// The startup default value is FALSE. + /// + BOOLEAN EnablePromiscuousReceive; + /// + /// Set to TRUE to drop queued packets when the configuration + /// is changed. The startup default value is FALSE. + /// + BOOLEAN FlushQueuesOnReset; + /// + /// Set to TRUE to timestamp all packets when they are received + /// by the MNP. Note that timestamps may be unsupported in some + /// MNP implementations. The startup default value is FALSE. + /// + BOOLEAN EnableReceiveTimestamps; + /// + /// Set to TRUE to disable background polling in this MNP + /// instance. Note that background polling may not be supported in + /// all MNP implementations. The startup default value is FALSE, + /// unless background polling is not supported. + /// + BOOLEAN DisableBackgroundPolling; +} EFI_MANAGED_NETWORK_CONFIG_DATA; + +typedef struct { + EFI_TIME Timestamp; + EFI_EVENT RecycleEvent; + UINT32 PacketLength; + UINT32 HeaderLength; + UINT32 AddressLength; + UINT32 DataLength; + BOOLEAN BroadcastFlag; + BOOLEAN MulticastFlag; + BOOLEAN PromiscuousFlag; + UINT16 ProtocolType; + VOID *DestinationAddress; + VOID *SourceAddress; + VOID *MediaHeader; + VOID *PacketData; +} EFI_MANAGED_NETWORK_RECEIVE_DATA; + +typedef struct { + UINT32 FragmentLength; + VOID *FragmentBuffer; +} EFI_MANAGED_NETWORK_FRAGMENT_DATA; + +typedef struct { + EFI_MAC_ADDRESS *DestinationAddress; //OPTIONAL + EFI_MAC_ADDRESS *SourceAddress; //OPTIONAL + UINT16 ProtocolType; //OPTIONAL + UINT32 DataLength; + UINT16 HeaderLength; //OPTIONAL + UINT16 FragmentCount; + EFI_MANAGED_NETWORK_FRAGMENT_DATA FragmentTable[1]; +} EFI_MANAGED_NETWORK_TRANSMIT_DATA; + + +typedef struct { + /// + /// This Event will be signaled after the Status field is updated + /// by the MNP. The type of Event must be + /// EFI_NOTIFY_SIGNAL. The Task Priority Level (TPL) of + /// Event must be lower than or equal to TPL_CALLBACK. + /// + EFI_EVENT Event; + /// + /// The status that is returned to the caller at the end of the operation + /// to indicate whether this operation completed successfully. + /// + EFI_STATUS Status; + union { + /// + /// When this token is used for receiving, RxData is a pointer to the EFI_MANAGED_NETWORK_RECEIVE_DATA. + /// + EFI_MANAGED_NETWORK_RECEIVE_DATA *RxData; + /// + /// When this token is used for transmitting, TxData is a pointer to the EFI_MANAGED_NETWORK_TRANSMIT_DATA. + /// + EFI_MANAGED_NETWORK_TRANSMIT_DATA *TxData; + } Packet; +} EFI_MANAGED_NETWORK_COMPLETION_TOKEN; + +/** + Returns the operational parameters for the current MNP child driver. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + @param MnpConfigData The pointer to storage for MNP operational parameters. + @param SnpModeData The pointer to storage for SNP operational parameters. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_UNSUPPORTED The requested feature is unsupported in this MNP implementation. + @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. The default + values are returned in MnpConfigData if it is not NULL. + @retval Other The mode data could not be read. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_GET_MODE_DATA)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This, + OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL, + OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL + ); + +/** + Sets or clears the operational parameters for the MNP child driver. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + @param MnpConfigData The pointer to configuration data that will be assigned to the MNP + child driver instance. If NULL, the MNP child driver instance is + reset to startup defaults and all pending transmit and receive + requests are flushed. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES Required system resources (usually memory) could not be + allocated. + @retval EFI_UNSUPPORTED The requested feature is unsupported in this [MNP] + implementation. + @retval EFI_DEVICE_ERROR An unexpected network or system error occurred. + @retval Other The MNP child driver instance has been reset to startup defaults. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_CONFIGURE)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This, + IN EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL + ); + +/** + Translates an IP multicast address to a hardware (MAC) multicast address. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + @param Ipv6Flag Set to TRUE to if IpAddress is an IPv6 multicast address. + Set to FALSE if IpAddress is an IPv4 multicast address. + @param IpAddress The pointer to the multicast IP address (in network byte order) to convert. + @param MacAddress The pointer to the resulting multicast MAC address. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER One of the following conditions is TRUE: + - This is NULL. + - IpAddress is NULL. + - *IpAddress is not a valid multicast IP address. + - MacAddress is NULL. + @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. + @retval EFI_UNSUPPORTED The requested feature is unsupported in this MNP implementation. + @retval EFI_DEVICE_ERROR An unexpected network or system error occurred. + @retval Other The address could not be converted. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_MCAST_IP_TO_MAC)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This, + IN BOOLEAN Ipv6Flag, + IN EFI_IP_ADDRESS *IpAddress, + OUT EFI_MAC_ADDRESS *MacAddress + ); + +/** + Enables and disables receive filters for multicast address. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + @param JoinFlag Set to TRUE to join this multicast group. + Set to FALSE to leave this multicast group. + @param MacAddress The pointer to the multicast MAC group (address) to join or leave. + + @retval EFI_SUCCESS The requested operation completed successfully. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - JoinFlag is TRUE and MacAddress is NULL. + - *MacAddress is not a valid multicast MAC address. + @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. + @retval EFI_ALREADY_STARTED The supplied multicast group is already joined. + @retval EFI_NOT_FOUND The supplied multicast group is not joined. + @retval EFI_DEVICE_ERROR An unexpected network or system error occurred. + @retval EFI_UNSUPPORTED The requested feature is unsupported in this MNP implementation. + @retval Other The requested operation could not be completed. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_GROUPS)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This, + IN BOOLEAN JoinFlag, + IN EFI_MAC_ADDRESS *MacAddress OPTIONAL + ); + +/** + Places asynchronous outgoing data packets into the transmit queue. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + @param Token The pointer to a token associated with the transmit data descriptor. + + @retval EFI_SUCCESS The transmit completion token was cached. + @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_ACCESS_DENIED The transmit completion token is already in the transmit queue. + @retval EFI_OUT_OF_RESOURCES The transmit data could not be queued due to a lack of system resources + (usually memory). + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_NOT_READY The transmit request could not be queued because the transmit queue is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_TRANSMIT)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This, + IN EFI_MANAGED_NETWORK_COMPLETION_TOKEN *Token + ); + +/** + Places an asynchronous receiving request into the receiving queue. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + @param Token The pointer to a token associated with the receive data descriptor. + + @retval EFI_SUCCESS The receive completion token was cached. + @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - Token is NULL. + - Token.Event is NULL. + @retval EFI_OUT_OF_RESOURCES The transmit data could not be queued due to a lack of system resources + (usually memory). + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_ACCESS_DENIED The receive completion token was already in the receive queue. + @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_RECEIVE)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This, + IN EFI_MANAGED_NETWORK_COMPLETION_TOKEN *Token + ); + + +/** + Aborts an asynchronous transmit or receive request. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + @param Token The pointer to a token that has been issued by + EFI_MANAGED_NETWORK_PROTOCOL.Transmit() or + EFI_MANAGED_NETWORK_PROTOCOL.Receive(). If + NULL, all pending tokens are aborted. + + @retval EFI_SUCCESS The asynchronous I/O request was aborted and Token.Event + was signaled. When Token is NULL, all pending requests were + aborted and their events were signaled. + @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_FOUND When Token is not NULL, the asynchronous I/O request was + not found in the transmit or receive queue. It has either completed + or was not issued by Transmit() and Receive(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_CANCEL)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This, + IN EFI_MANAGED_NETWORK_COMPLETION_TOKEN *Token OPTIONAL + ); + +/** + Polls for incoming data packets and processes outgoing data packets. + + @param This The pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance. + + @retval EFI_SUCCESS Incoming or outgoing data was processed. + @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_NOT_READY No incoming or outgoing data was processed. Consider increasing + the polling rate. + @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue. + Consider increasing the polling rate. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MANAGED_NETWORK_POLL)( + IN EFI_MANAGED_NETWORK_PROTOCOL *This + ); + +/// +/// The MNP is used by network applications (and drivers) to +/// perform raw (unformatted) asynchronous network packet I/O. +/// +struct _EFI_MANAGED_NETWORK_PROTOCOL { + EFI_MANAGED_NETWORK_GET_MODE_DATA GetModeData; + EFI_MANAGED_NETWORK_CONFIGURE Configure; + EFI_MANAGED_NETWORK_MCAST_IP_TO_MAC McastIpToMac; + EFI_MANAGED_NETWORK_GROUPS Groups; + EFI_MANAGED_NETWORK_TRANSMIT Transmit; + EFI_MANAGED_NETWORK_RECEIVE Receive; + EFI_MANAGED_NETWORK_CANCEL Cancel; + EFI_MANAGED_NETWORK_POLL Poll; +}; + +extern EFI_GUID gEfiManagedNetworkServiceBindingProtocolGuid; +extern EFI_GUID gEfiManagedNetworkProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Mtftp4.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Mtftp4.h new file mode 100644 index 000000000..0e961cfd4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Mtftp4.h @@ -0,0 +1,595 @@ +/** @file + EFI Multicast Trivial File Tranfer Protocol Definition + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in UEFI Specification 2.0 + +**/ + +#ifndef __EFI_MTFTP4_PROTOCOL_H__ +#define __EFI_MTFTP4_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_MTFTP4_SERVICE_BINDING_PROTOCOL_GUID \ + { \ + 0x2FE800BE, 0x8F01, 0x4aa6, {0x94, 0x6B, 0xD7, 0x13, 0x88, 0xE1, 0x83, 0x3F } \ + } + +#define EFI_MTFTP4_PROTOCOL_GUID \ + { \ + 0x78247c57, 0x63db, 0x4708, {0x99, 0xc2, 0xa8, 0xb4, 0xa9, 0xa6, 0x1f, 0x6b } \ + } + +typedef struct _EFI_MTFTP4_PROTOCOL EFI_MTFTP4_PROTOCOL; +typedef struct _EFI_MTFTP4_TOKEN EFI_MTFTP4_TOKEN; + +// +//MTFTP4 packet opcode definition +// +#define EFI_MTFTP4_OPCODE_RRQ 1 +#define EFI_MTFTP4_OPCODE_WRQ 2 +#define EFI_MTFTP4_OPCODE_DATA 3 +#define EFI_MTFTP4_OPCODE_ACK 4 +#define EFI_MTFTP4_OPCODE_ERROR 5 +#define EFI_MTFTP4_OPCODE_OACK 6 +#define EFI_MTFTP4_OPCODE_DIR 7 +#define EFI_MTFTP4_OPCODE_DATA8 8 +#define EFI_MTFTP4_OPCODE_ACK8 9 + +// +// MTFTP4 error code definition +// +#define EFI_MTFTP4_ERRORCODE_NOT_DEFINED 0 +#define EFI_MTFTP4_ERRORCODE_FILE_NOT_FOUND 1 +#define EFI_MTFTP4_ERRORCODE_ACCESS_VIOLATION 2 +#define EFI_MTFTP4_ERRORCODE_DISK_FULL 3 +#define EFI_MTFTP4_ERRORCODE_ILLEGAL_OPERATION 4 +#define EFI_MTFTP4_ERRORCODE_UNKNOWN_TRANSFER_ID 5 +#define EFI_MTFTP4_ERRORCODE_FILE_ALREADY_EXISTS 6 +#define EFI_MTFTP4_ERRORCODE_NO_SUCH_USER 7 +#define EFI_MTFTP4_ERRORCODE_REQUEST_DENIED 8 + +// +// MTFTP4 pacekt definitions +// +#pragma pack(1) + +typedef struct { + UINT16 OpCode; + UINT8 Filename[1]; +} EFI_MTFTP4_REQ_HEADER; + +typedef struct { + UINT16 OpCode; + UINT8 Data[1]; +} EFI_MTFTP4_OACK_HEADER; + +typedef struct { + UINT16 OpCode; + UINT16 Block; + UINT8 Data[1]; +} EFI_MTFTP4_DATA_HEADER; + +typedef struct { + UINT16 OpCode; + UINT16 Block[1]; +} EFI_MTFTP4_ACK_HEADER; + +typedef struct { + UINT16 OpCode; + UINT64 Block; + UINT8 Data[1]; +} EFI_MTFTP4_DATA8_HEADER; + +typedef struct { + UINT16 OpCode; + UINT64 Block[1]; +} EFI_MTFTP4_ACK8_HEADER; + +typedef struct { + UINT16 OpCode; + UINT16 ErrorCode; + UINT8 ErrorMessage[1]; +} EFI_MTFTP4_ERROR_HEADER; + +typedef union { + /// + /// Type of packets as defined by the MTFTPv4 packet opcodes. + /// + UINT16 OpCode; + /// + /// Read request packet header. + /// + EFI_MTFTP4_REQ_HEADER Rrq; + /// + /// Write request packet header. + /// + EFI_MTFTP4_REQ_HEADER Wrq; + /// + /// Option acknowledge packet header. + /// + EFI_MTFTP4_OACK_HEADER Oack; + /// + /// Data packet header. + /// + EFI_MTFTP4_DATA_HEADER Data; + /// + /// Acknowledgement packet header. + /// + EFI_MTFTP4_ACK_HEADER Ack; + /// + /// Data packet header with big block number. + /// + EFI_MTFTP4_DATA8_HEADER Data8; + /// + /// Acknowledgement header with big block num. + /// + EFI_MTFTP4_ACK8_HEADER Ack8; + /// + /// Error packet header. + /// + EFI_MTFTP4_ERROR_HEADER Error; +} EFI_MTFTP4_PACKET; + +#pragma pack() + +/// +/// MTFTP4 option definition. +/// +typedef struct { + UINT8 *OptionStr; + UINT8 *ValueStr; +} EFI_MTFTP4_OPTION; + + +typedef struct { + BOOLEAN UseDefaultSetting; + EFI_IPv4_ADDRESS StationIp; + EFI_IPv4_ADDRESS SubnetMask; + UINT16 LocalPort; + EFI_IPv4_ADDRESS GatewayIp; + EFI_IPv4_ADDRESS ServerIp; + UINT16 InitialServerPort; + UINT16 TryCount; + UINT16 TimeoutValue; +} EFI_MTFTP4_CONFIG_DATA; + + +typedef struct { + EFI_MTFTP4_CONFIG_DATA ConfigData; + UINT8 SupportedOptionCount; + UINT8 **SupportedOptoins; + UINT8 UnsupportedOptionCount; + UINT8 **UnsupportedOptoins; +} EFI_MTFTP4_MODE_DATA; + + +typedef struct { + EFI_IPv4_ADDRESS GatewayIp; + EFI_IPv4_ADDRESS ServerIp; + UINT16 ServerPort; + UINT16 TryCount; + UINT16 TimeoutValue; +} EFI_MTFTP4_OVERRIDE_DATA; + +// +// Protocol interfaces definition +// + +/** + A callback function that is provided by the caller to intercept + the EFI_MTFTP4_OPCODE_DATA or EFI_MTFTP4_OPCODE_DATA8 packets processed in the + EFI_MTFTP4_PROTOCOL.ReadFile() function, and alternatively to intercept + EFI_MTFTP4_OPCODE_OACK or EFI_MTFTP4_OPCODE_ERROR packets during a call to + EFI_MTFTP4_PROTOCOL.ReadFile(), WriteFile() or ReadDirectory(). + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param Token The token that the caller provided in the + EFI_MTFTP4_PROTOCOL.ReadFile(), WriteFile() + or ReadDirectory() function. + @param PacketLen Indicates the length of the packet. + @param Packet The pointer to an MTFTPv4 packet. + + @retval EFI_SUCCESS The operation was successful. + @retval Others Aborts the transfer process. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_CHECK_PACKET)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_TOKEN *Token, + IN UINT16 PacketLen, + IN EFI_MTFTP4_PACKET *Paket + ); + +/** + Timeout callback funtion. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param Token The token that is provided in the + EFI_MTFTP4_PROTOCOL.ReadFile() or + EFI_MTFTP4_PROTOCOL.WriteFile() or + EFI_MTFTP4_PROTOCOL.ReadDirectory() functions + by the caller. + + @retval EFI_SUCCESS The operation was successful. + @retval Others Aborts download process. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_TIMEOUT_CALLBACK)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_TOKEN *Token + ); + +/** + A callback function that the caller provides to feed data to the + EFI_MTFTP4_PROTOCOL.WriteFile() function. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param Token The token provided in the + EFI_MTFTP4_PROTOCOL.WriteFile() by the caller. + @param Length Indicates the length of the raw data wanted on input, and the + length the data available on output. + @param Buffer The pointer to the buffer where the data is stored. + + @retval EFI_SUCCESS The operation was successful. + @retval Others Aborts session. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_PACKET_NEEDED)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_TOKEN *Token, + IN OUT UINT16 *Length, + OUT VOID **Buffer + ); + + +/** + Submits an asynchronous interrupt transfer to an interrupt endpoint of a USB device. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param ModeData The pointer to storage for the EFI MTFTPv4 Protocol driver mode data. + + @retval EFI_SUCCESS The configuration data was successfully returned. + @retval EFI_OUT_OF_RESOURCES The required mode data could not be allocated. + @retval EFI_INVALID_PARAMETER This is NULL or ModeData is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_GET_MODE_DATA)( + IN EFI_MTFTP4_PROTOCOL *This, + OUT EFI_MTFTP4_MODE_DATA *ModeData + ); + + +/** + Initializes, changes, or resets the default operational setting for this + EFI MTFTPv4 Protocol driver instance. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param MtftpConfigData The pointer to the configuration data structure. + + @retval EFI_SUCCESS The EFI MTFTPv4 Protocol driver was configured successfully. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_ACCESS_DENIED The EFI configuration could not be changed at this time because + there is one MTFTP background operation in progress. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) has not finished yet. + @retval EFI_UNSUPPORTED A configuration protocol (DHCP, BOOTP, RARP, etc.) could not + be located when clients choose to use the default address + settings. + @retval EFI_OUT_OF_RESOURCES The EFI MTFTPv4 Protocol driver instance data could not be + allocated. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. The EFI + MTFTPv4 Protocol driver instance is not configured. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_CONFIGURE)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_CONFIG_DATA *MtftpConfigData OPTIONAL + ); + + +/** + Gets information about a file from an MTFTPv4 server. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param OverrideData Data that is used to override the existing parameters. If NULL, + the default parameters that were set in the + EFI_MTFTP4_PROTOCOL.Configure() function are used. + @param Filename The pointer to null-terminated ASCII file name string. + @param ModeStr The pointer to null-terminated ASCII mode string. If NULL, "octet" will be used. + @param OptionCount Number of option/value string pairs in OptionList. + @param OptionList The pointer to array of option/value string pairs. Ignored if + OptionCount is zero. + @param PacketLength The number of bytes in the returned packet. + @param Packet The pointer to the received packet. This buffer must be freed by + the caller. + + @retval EFI_SUCCESS An MTFTPv4 OACK packet was received and is in the Packet. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - Filename is NULL. + - OptionCount is not zero and OptionList is NULL. + - One or more options in OptionList have wrong format. + - PacketLength is NULL. + - One or more IPv4 addresses in OverrideData are not valid + unicast IPv4 addresses if OverrideData is not NULL. + @retval EFI_UNSUPPORTED One or more options in the OptionList are in the + unsupported list of structure EFI_MTFTP4_MODE_DATA. + @retval EFI_NOT_STARTED The EFI MTFTPv4 Protocol driver has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) has not finished yet. + @retval EFI_ACCESS_DENIED The previous operation has not completed yet. + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_TFTP_ERROR An MTFTPv4 ERROR packet was received and is in the Packet. + @retval EFI_NETWORK_UNREACHABLE An ICMP network unreachable error packet was received and the Packet is set to NULL. + @retval EFI_HOST_UNREACHABLE An ICMP host unreachable error packet was received and the Packet is set to NULL. + @retval EFI_PROTOCOL_UNREACHABLE An ICMP protocol unreachable error packet was received and the Packet is set to NULL. + @retval EFI_PORT_UNREACHABLE An ICMP port unreachable error packet was received and the Packet is set to NULL. + @retval EFI_ICMP_ERROR Some other ICMP ERROR packet was received and is in the Buffer. + @retval EFI_PROTOCOL_ERROR An unexpected MTFTPv4 packet was received and is in the Packet. + @retval EFI_TIMEOUT No responses were received from the MTFTPv4 server. + @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred. + @retval EFI_NO_MEDIA There was a media error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_GET_INFO)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_OVERRIDE_DATA *OverrideData OPTIONAL, + IN UINT8 *Filename, + IN UINT8 *ModeStr OPTIONAL, + IN UINT8 OptionCount, + IN EFI_MTFTP4_OPTION *OptionList, + OUT UINT32 *PacketLength, + OUT EFI_MTFTP4_PACKET **Packet OPTIONAL + ); + +/** + Parses the options in an MTFTPv4 OACK packet. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param PacketLen Length of the OACK packet to be parsed. + @param Packet The pointer to the OACK packet to be parsed. + @param OptionCount The pointer to the number of options in following OptionList. + @param OptionList The pointer to EFI_MTFTP4_OPTION storage. Call the EFI Boot + Service FreePool() to release the OptionList if the options + in this OptionList are not needed any more. + + @retval EFI_SUCCESS The OACK packet was valid and the OptionCount and + OptionList parameters have been updated. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - PacketLen is 0. + - Packet is NULL or Packet is not a valid MTFTPv4 packet. + - OptionCount is NULL. + @retval EFI_NOT_FOUND No options were found in the OACK packet. + @retval EFI_OUT_OF_RESOURCES Storage for the OptionList array cannot be allocated. + @retval EFI_PROTOCOL_ERROR One or more of the option fields is invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_PARSE_OPTIONS)( + IN EFI_MTFTP4_PROTOCOL *This, + IN UINT32 PacketLen, + IN EFI_MTFTP4_PACKET *Packet, + OUT UINT32 *OptionCount, + OUT EFI_MTFTP4_OPTION **OptionList OPTIONAL + ); + + +/** + Downloads a file from an MTFTPv4 server. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param Token The pointer to the token structure to provide the parameters that are + used in this operation. + + @retval EFI_SUCCESS The data file has been transferred successfully. + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_BUFFER_TOO_SMALL BufferSize is not zero but not large enough to hold the + downloaded data in downloading process. + @retval EFI_ABORTED Current operation is aborted by user. + @retval EFI_NETWORK_UNREACHABLE An ICMP network unreachable error packet was received. + @retval EFI_HOST_UNREACHABLE An ICMP host unreachable error packet was received. + @retval EFI_PROTOCOL_UNREACHABLE An ICMP protocol unreachable error packet was received. + @retval EFI_PORT_UNREACHABLE An ICMP port unreachable error packet was received. + @retval EFI_ICMP_ERROR Some other ICMP ERROR packet was received. + @retval EFI_TIMEOUT No responses were received from the MTFTPv4 server. + @retval EFI_TFTP_ERROR An MTFTPv4 ERROR packet was received. + @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred. + @retval EFI_NO_MEDIA There was a media error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_READ_FILE)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_TOKEN *Token + ); + + + +/** + Sends a file to an MTFTPv4 server. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param Token The pointer to the token structure to provide the parameters that are + used in this operation. + + @retval EFI_SUCCESS The upload session has started. + @retval EFI_UNSUPPORTED The operation is not supported by this implementation. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_UNSUPPORTED One or more options in the Token.OptionList are in + the unsupported list of structure EFI_MTFTP4_MODE_DATA. + @retval EFI_NOT_STARTED The EFI MTFTPv4 Protocol driver has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_ALREADY_STARTED This Token is already being used in another MTFTPv4 session. + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_ACCESS_DENIED The previous operation has not completed yet. + @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_WRITE_FILE)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_TOKEN *Token + ); + + +/** + Downloads a data file "directory" from an MTFTPv4 server. May be unsupported in some EFI + implementations. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + @param Token The pointer to the token structure to provide the parameters that are + used in this operation. + + @retval EFI_SUCCESS The MTFTPv4 related file "directory" has been downloaded. + @retval EFI_UNSUPPORTED The operation is not supported by this implementation. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_UNSUPPORTED One or more options in the Token.OptionList are in + the unsupported list of structure EFI_MTFTP4_MODE_DATA. + @retval EFI_NOT_STARTED The EFI MTFTPv4 Protocol driver has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_ALREADY_STARTED This Token is already being used in another MTFTPv4 session. + @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated. + @retval EFI_ACCESS_DENIED The previous operation has not completed yet. + @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_READ_DIRECTORY)( + IN EFI_MTFTP4_PROTOCOL *This, + IN EFI_MTFTP4_TOKEN *Token + ); + +/** + Polls for incoming data packets and processes outgoing data packets. + + @param This The pointer to the EFI_MTFTP4_PROTOCOL instance. + + @retval EFI_SUCCESS Incoming or outgoing data was processed. + @retval EFI_NOT_STARTED This EFI MTFTPv4 Protocol instance has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue. + Consider increasing the polling rate. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_MTFTP4_POLL)( + IN EFI_MTFTP4_PROTOCOL *This + ); + +/// +/// The EFI_MTFTP4_PROTOCOL is designed to be used by UEFI drivers and applications +/// to transmit and receive data files. The EFI MTFTPv4 Protocol driver uses +/// the underlying EFI UDPv4 Protocol driver and EFI IPv4 Protocol driver. +/// +struct _EFI_MTFTP4_PROTOCOL { + EFI_MTFTP4_GET_MODE_DATA GetModeData; + EFI_MTFTP4_CONFIGURE Configure; + EFI_MTFTP4_GET_INFO GetInfo; + EFI_MTFTP4_PARSE_OPTIONS ParseOptions; + EFI_MTFTP4_READ_FILE ReadFile; + EFI_MTFTP4_WRITE_FILE WriteFile; + EFI_MTFTP4_READ_DIRECTORY ReadDirectory; + EFI_MTFTP4_POLL Poll; +}; + +struct _EFI_MTFTP4_TOKEN { + /// + /// The status that is returned to the caller at the end of the operation + /// to indicate whether this operation completed successfully. + /// + EFI_STATUS Status; + /// + /// The event that will be signaled when the operation completes. If + /// set to NULL, the corresponding function will wait until the read or + /// write operation finishes. The type of Event must be + /// EVT_NOTIFY_SIGNAL. The Task Priority Level (TPL) of + /// Event must be lower than or equal to TPL_CALLBACK. + /// + EFI_EVENT Event; + /// + /// If not NULL, the data that will be used to override the existing configure data. + /// + EFI_MTFTP4_OVERRIDE_DATA *OverrideData; + /// + /// The pointer to the null-terminated ASCII file name string. + /// + UINT8 *Filename; + /// + /// The pointer to the null-terminated ASCII mode string. If NULL, "octet" is used. + /// + UINT8 *ModeStr; + /// + /// Number of option/value string pairs. + /// + UINT32 OptionCount; + /// + /// The pointer to an array of option/value string pairs. Ignored if OptionCount is zero. + /// + EFI_MTFTP4_OPTION *OptionList; + /// + /// The size of the data buffer. + /// + UINT64 BufferSize; + /// + /// The pointer to the data buffer. Data that is downloaded from the + /// MTFTPv4 server is stored here. Data that is uploaded to the + /// MTFTPv4 server is read from here. Ignored if BufferSize is zero. + /// + VOID *Buffer; + /// + /// The pointer to the context that will be used by CheckPacket, + /// TimeoutCallback and PacketNeeded. + /// + VOID *Context; + /// + /// The pointer to the callback function to check the contents of the received packet. + /// + EFI_MTFTP4_CHECK_PACKET CheckPacket; + /// + /// The pointer to the function to be called when a timeout occurs. + /// + EFI_MTFTP4_TIMEOUT_CALLBACK TimeoutCallback; + /// + /// The pointer to the function to provide the needed packet contents. + /// + EFI_MTFTP4_PACKET_NEEDED PacketNeeded; +}; + +extern EFI_GUID gEfiMtftp4ServiceBindingProtocolGuid; +extern EFI_GUID gEfiMtftp4ProtocolGuid; + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h new file mode 100644 index 000000000..5adedd8e9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h @@ -0,0 +1,120 @@ +/** @file + EFI Network Interface Identifier Protocol. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in EFI Specification 1.10. + +**/ + +#ifndef __EFI_NETWORK_INTERFACE_IDENTIFER_H__ +#define __EFI_NETWORK_INTERFACE_IDENTIFER_H__ + +FILE_LICENCE ( BSD3 ); + +// +// GUID retired from UEFI Specification 2.1b +// +#define EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_GUID \ + { \ + 0xE18541CD, 0xF755, 0x4f73, {0x92, 0x8D, 0x64, 0x3C, 0x8A, 0x79, 0xB2, 0x29 } \ + } + +// +// GUID intruduced in UEFI Specification 2.1b +// +#define EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_GUID_31 \ + { \ + 0x1ACED566, 0x76ED, 0x4218, {0xBC, 0x81, 0x76, 0x7F, 0x1F, 0x97, 0x7A, 0x89 } \ + } + +// +// Revision defined in UEFI Specification 2.4 +// +#define EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION 0x00020000 + + +/// +/// Revision defined in EFI1.1. +/// +#define EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE_REVISION EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION + +/// +/// Forward reference for pure ANSI compatability. +/// +typedef struct _EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL; + +/// +/// Protocol defined in EFI1.1. +/// +typedef EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE; + +/// +/// An optional protocol that is used to describe details about the software +/// layer that is used to produce the Simple Network Protocol. +/// +struct _EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL { + UINT64 Revision; ///< The revision of the EFI_NETWORK_INTERFACE_IDENTIFIER protocol. + UINT64 Id; ///< The address of the first byte of the identifying structure for this network + ///< interface. This is only valid when the network interface is started + ///< (see Start()). When the network interface is not started, this field is set to zero. + UINT64 ImageAddr; ///< The address of the first byte of the identifying structure for this + ///< network interface. This is set to zero if there is no structure. + UINT32 ImageSize; ///< The size of unrelocated network interface image. + CHAR8 StringId[4];///< A four-character ASCII string that is sent in the class identifier field of + ///< option 60 in DHCP. For a Type of EfiNetworkInterfaceUndi, this field is UNDI. + UINT8 Type; ///< Network interface type. This will be set to one of the values + ///< in EFI_NETWORK_INTERFACE_TYPE. + UINT8 MajorVer; ///< Major version number. + UINT8 MinorVer; ///< Minor version number. + BOOLEAN Ipv6Supported; ///< TRUE if the network interface supports IPv6; otherwise FALSE. + UINT16 IfNum; ///< The network interface number that is being identified by this Network + ///< Interface Identifier Protocol. This field must be less than or + ///< equal to the (IFcnt | IFcntExt <<8 ) fields in the !PXE structure. + +}; + +/// +///******************************************************* +/// EFI_NETWORK_INTERFACE_TYPE +///******************************************************* +/// +typedef enum { + EfiNetworkInterfaceUndi = 1 +} EFI_NETWORK_INTERFACE_TYPE; + +/// +/// Forward reference for pure ANSI compatability. +/// +typedef struct undiconfig_table UNDI_CONFIG_TABLE; + +/// +/// The format of the configuration table for UNDI +/// +struct undiconfig_table { + UINT32 NumberOfInterfaces; ///< The number of NIC devices + ///< that this UNDI controls. + UINT32 reserved; + UNDI_CONFIG_TABLE *nextlink; ///< A pointer to the next UNDI + ///< configuration table. + /// + /// The length of this array is given in the NumberOfInterfaces field. + /// + struct { + VOID *NII_InterfacePointer; ///< Pointer to the NII interface structure. + VOID *DevicePathPointer; ///< Pointer to the device path for this NIC. + } NII_entry[1]; +}; + +extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid; +extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid_31; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PciIo.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PciIo.h new file mode 100644 index 000000000..97f65e1f8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PciIo.h @@ -0,0 +1,560 @@ +/** @file + EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration, + and DMA interfaces that a driver uses to access its PCI controller. + + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PCI_IO_H__ +#define __PCI_IO_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// Global ID for the PCI I/O Protocol +/// +#define EFI_PCI_IO_PROTOCOL_GUID \ + { \ + 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \ + } + +typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL; + +/// +/// ******************************************************* +/// EFI_PCI_IO_PROTOCOL_WIDTH +/// ******************************************************* +/// +typedef enum { + EfiPciIoWidthUint8 = 0, + EfiPciIoWidthUint16, + EfiPciIoWidthUint32, + EfiPciIoWidthUint64, + EfiPciIoWidthFifoUint8, + EfiPciIoWidthFifoUint16, + EfiPciIoWidthFifoUint32, + EfiPciIoWidthFifoUint64, + EfiPciIoWidthFillUint8, + EfiPciIoWidthFillUint16, + EfiPciIoWidthFillUint32, + EfiPciIoWidthFillUint64, + EfiPciIoWidthMaximum +} EFI_PCI_IO_PROTOCOL_WIDTH; + +// +// Complete PCI address generater +// +#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or I/O cycle through unchanged +#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cycles +#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are combined +#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header +#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header +#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header +#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached +#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range +#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 ///< Clear for an add-in PCI Device +#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 ///< Clear for a physical PCI Option ROM accessed through ROM BAR +#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC +#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode) +#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode) + +#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER) +#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO) + +/// +/// ******************************************************* +/// EFI_PCI_IO_PROTOCOL_OPERATION +/// ******************************************************* +/// +typedef enum { + /// + /// A read operation from system memory by a bus master. + /// + EfiPciIoOperationBusMasterRead, + /// + /// A write operation from system memory by a bus master. + /// + EfiPciIoOperationBusMasterWrite, + /// + /// Provides both read and write access to system memory by both the processor and a + /// bus master. The buffer is coherent from both the processor's and the bus master's point of view. + /// + EfiPciIoOperationBusMasterCommonBuffer, + EfiPciIoOperationMaximum +} EFI_PCI_IO_PROTOCOL_OPERATION; + +/// +/// ******************************************************* +/// EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION +/// ******************************************************* +/// +typedef enum { + /// + /// Retrieve the PCI controller's current attributes, and return them in Result. + /// + EfiPciIoAttributeOperationGet, + /// + /// Set the PCI controller's current attributes to Attributes. + /// + EfiPciIoAttributeOperationSet, + /// + /// Enable the attributes specified by the bits that are set in Attributes for this PCI controller. + /// + EfiPciIoAttributeOperationEnable, + /// + /// Disable the attributes specified by the bits that are set in Attributes for this PCI controller. + /// + EfiPciIoAttributeOperationDisable, + /// + /// Retrieve the PCI controller's supported attributes, and return them in Result. + /// + EfiPciIoAttributeOperationSupported, + EfiPciIoAttributeOperationMaximum +} EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION; + +/** + Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is + satisfied or after a defined duration. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Width Signifies the width of the memory or I/O operations. + @param BarIndex The BAR index of the standard PCI Configuration header to use as the + base address for the memory operation to perform. + @param Offset The offset within the selected BAR to start the memory operation. + @param Mask Mask used for the polling criteria. + @param Value The comparison value used for the polling exit criteria. + @param Delay The number of 100 ns units to poll. + @param Result Pointer to the last value read from the memory location. + + @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria. + @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. + @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller. + @retval EFI_TIMEOUT Delay expired before a match occurred. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM)( + IN EFI_PCI_IO_PROTOCOL *This, + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, + IN UINT8 BarIndex, + IN UINT64 Offset, + IN UINT64 Mask, + IN UINT64 Value, + IN UINT64 Delay, + OUT UINT64 *Result + ); + +/** + Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Width Signifies the width of the memory or I/O operations. + @param BarIndex The BAR index of the standard PCI Configuration header to use as the + base address for the memory or I/O operation to perform. + @param Offset The offset within the selected BAR to start the memory or I/O operation. + @param Count The number of memory or I/O operations to perform. + @param Buffer For read operations, the destination buffer to store the results. For write + operations, the source buffer to write data from. + + @retval EFI_SUCCESS The data was read from or written to the PCI controller. + @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. + @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not + valid for the PCI BAR specified by BarIndex. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM)( + IN EFI_PCI_IO_PROTOCOL *This, + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, + IN UINT8 BarIndex, + IN UINT64 Offset, + IN UINTN Count, + IN OUT VOID *Buffer + ); + +typedef struct { + /// + /// Read PCI controller registers in the PCI memory or I/O space. + /// + EFI_PCI_IO_PROTOCOL_IO_MEM Read; + /// + /// Write PCI controller registers in the PCI memory or I/O space. + /// + EFI_PCI_IO_PROTOCOL_IO_MEM Write; +} EFI_PCI_IO_PROTOCOL_ACCESS; + +/** + Enable a PCI driver to access PCI controller registers in PCI configuration space. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Width Signifies the width of the memory operations. + @param Offset The offset within the PCI configuration space for the PCI controller. + @param Count The number of PCI configuration operations to perform. + @param Buffer For read operations, the destination buffer to store the results. For write + operations, the source buffer to write data from. + + + @retval EFI_SUCCESS The data was read from or written to the PCI controller. + @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not + valid for the PCI configuration header of the PCI controller. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG)( + IN EFI_PCI_IO_PROTOCOL *This, + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, + IN UINT32 Offset, + IN UINTN Count, + IN OUT VOID *Buffer + ); + +typedef struct { + /// + /// Read PCI controller registers in PCI configuration space. + /// + EFI_PCI_IO_PROTOCOL_CONFIG Read; + /// + /// Write PCI controller registers in PCI configuration space. + /// + EFI_PCI_IO_PROTOCOL_CONFIG Write; +} EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS; + +/** + Enables a PCI driver to copy one region of PCI memory space to another region of PCI + memory space. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Width Signifies the width of the memory operations. + @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the + base address for the memory operation to perform. + @param DestOffset The destination offset within the BAR specified by DestBarIndex to + start the memory writes for the copy operation. + @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the + base address for the memory operation to perform. + @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start + the memory reads for the copy operation. + @param Count The number of memory operations to perform. Bytes moved is Width + size * Count, starting at DestOffset and SrcOffset. + + @retval EFI_SUCCESS The data was copied from one memory region to another memory region. + @retval EFI_UNSUPPORTED DestBarIndex not valid for this PCI controller. + @retval EFI_UNSUPPORTED SrcBarIndex not valid for this PCI controller. + @retval EFI_UNSUPPORTED The address range specified by DestOffset, Width, and Count + is not valid for the PCI BAR specified by DestBarIndex. + @retval EFI_UNSUPPORTED The address range specified by SrcOffset, Width, and Count is + not valid for the PCI BAR specified by SrcBarIndex. + @retval EFI_INVALID_PARAMETER Width is invalid. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM)( + IN EFI_PCI_IO_PROTOCOL *This, + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, + IN UINT8 DestBarIndex, + IN UINT64 DestOffset, + IN UINT8 SrcBarIndex, + IN UINT64 SrcOffset, + IN UINTN Count + ); + +/** + Provides the PCI controller-specific addresses needed to access system memory. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Operation Indicates if the bus master is going to read or write to system memory. + @param HostAddress The system memory address to map to the PCI controller. + @param NumberOfBytes On input the number of bytes to map. On output the number of bytes + that were mapped. + @param DeviceAddress The resulting map address for the bus master PCI controller to use to + access the hosts HostAddress. + @param Mapping A resulting value to pass to Unmap(). + + @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes. + @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval EFI_DEVICE_ERROR The system hardware could not map the requested address. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_MAP)( + IN EFI_PCI_IO_PROTOCOL *This, + IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, + IN VOID *HostAddress, + IN OUT UINTN *NumberOfBytes, + OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, + OUT VOID **Mapping + ); + +/** + Completes the Map() operation and releases any corresponding resources. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Mapping The mapping value returned from Map(). + + @retval EFI_SUCCESS The range was unmapped. + @retval EFI_DEVICE_ERROR The data was not committed to the target system memory. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP)( + IN EFI_PCI_IO_PROTOCOL *This, + IN VOID *Mapping + ); + +/** + Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer + mapping. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Type This parameter is not used and must be ignored. + @param MemoryType The type of memory to allocate, EfiBootServicesData or + EfiRuntimeServicesData. + @param Pages The number of pages to allocate. + @param HostAddress A pointer to store the base system memory address of the + allocated range. + @param Attributes The requested bit mask of attributes for the allocated range. + + @retval EFI_SUCCESS The requested memory pages were allocated. + @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are + MEMORY_WRITE_COMBINE and MEMORY_CACHED. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER)( + IN EFI_PCI_IO_PROTOCOL *This, + IN EFI_ALLOCATE_TYPE Type, + IN EFI_MEMORY_TYPE MemoryType, + IN UINTN Pages, + OUT VOID **HostAddress, + IN UINT64 Attributes + ); + +/** + Frees memory that was allocated with AllocateBuffer(). + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Pages The number of pages to free. + @param HostAddress The base system memory address of the allocated range. + + @retval EFI_SUCCESS The requested memory pages were freed. + @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages + was not allocated with AllocateBuffer(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER)( + IN EFI_PCI_IO_PROTOCOL *This, + IN UINTN Pages, + IN VOID *HostAddress + ); + +/** + Flushes all PCI posted write transactions from a PCI host bridge to system memory. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + + @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host + bridge to system memory. + @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI + host bridge due to a hardware error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH)( + IN EFI_PCI_IO_PROTOCOL *This + ); + +/** + Retrieves this PCI controller's current PCI bus number, device number, and function number. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param SegmentNumber The PCI controller's current PCI segment number. + @param BusNumber The PCI controller's current PCI bus number. + @param DeviceNumber The PCI controller's current PCI device number. + @param FunctionNumber The PCI controller's current PCI function number. + + @retval EFI_SUCCESS The PCI controller location was returned. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION)( + IN EFI_PCI_IO_PROTOCOL *This, + OUT UINTN *SegmentNumber, + OUT UINTN *BusNumber, + OUT UINTN *DeviceNumber, + OUT UINTN *FunctionNumber + ); + +/** + Performs an operation on the attributes that this PCI controller supports. The operations include + getting the set of supported attributes, retrieving the current attributes, setting the current + attributes, enabling attributes, and disabling attributes. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Operation The operation to perform on the attributes for this PCI controller. + @param Attributes The mask of attributes that are used for Set, Enable, and Disable + operations. + @param Result A pointer to the result mask of attributes that are returned for the Get + and Supported operations. + + @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_UNSUPPORTED one or more of the bits set in + Attributes are not supported by this PCI controller or one of + its parent bridges when Operation is Set, Enable or Disable. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES)( + IN EFI_PCI_IO_PROTOCOL *This, + IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, + IN UINT64 Attributes, + OUT UINT64 *Result OPTIONAL + ); + +/** + Gets the attributes that this PCI controller supports setting on a BAR using + SetBarAttributes(), and retrieves the list of resource descriptors for a BAR. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param BarIndex The BAR index of the standard PCI Configuration header to use as the + base address for resource range. The legal range for this field is 0..5. + @param Supports A pointer to the mask of attributes that this PCI controller supports + setting for this BAR with SetBarAttributes(). + @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current + configuration of this BAR of the PCI controller. + + @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI + controller supports are returned in Supports. If Resources + is not NULL, then the ACPI 2.0 resource descriptors that the PCI + controller is currently using are returned in Resources. + @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL. + @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. + @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate + Resources. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES)( + IN EFI_PCI_IO_PROTOCOL *This, + IN UINT8 BarIndex, + OUT UINT64 *Supports, OPTIONAL + OUT VOID **Resources OPTIONAL + ); + +/** + Sets the attributes for a range of a BAR on a PCI controller. + + @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. + @param Attributes The mask of attributes to set for the resource range specified by + BarIndex, Offset, and Length. + @param BarIndex The BAR index of the standard PCI Configuration header to use as the + base address for resource range. The legal range for this field is 0..5. + @param Offset A pointer to the BAR relative base address of the resource range to be + modified by the attributes specified by Attributes. + @param Length A pointer to the length of the resource range to be modified by the + attributes specified by Attributes. + + @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource + range specified by BarIndex, Offset, and Length were + set on the PCI controller, and the actual resource range is returned + in Offset and Length. + @retval EFI_INVALID_PARAMETER Offset or Length is NULL. + @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the + resource range specified by BarIndex, Offset, and + Length. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES)( + IN EFI_PCI_IO_PROTOCOL *This, + IN UINT64 Attributes, + IN UINT8 BarIndex, + IN OUT UINT64 *Offset, + IN OUT UINT64 *Length + ); + +/// +/// The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration, +/// and DMA interfaces used to abstract accesses to PCI controllers. +/// There is one EFI_PCI_IO_PROTOCOL instance for each PCI controller on a PCI bus. +/// A device driver that wishes to manage a PCI controller in a system will have to +/// retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller. +/// +struct _EFI_PCI_IO_PROTOCOL { + EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem; + EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo; + EFI_PCI_IO_PROTOCOL_ACCESS Mem; + EFI_PCI_IO_PROTOCOL_ACCESS Io; + EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci; + EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem; + EFI_PCI_IO_PROTOCOL_MAP Map; + EFI_PCI_IO_PROTOCOL_UNMAP Unmap; + EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer; + EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer; + EFI_PCI_IO_PROTOCOL_FLUSH Flush; + EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation; + EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes; + EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes; + EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes; + + /// + /// The size, in bytes, of the ROM image. + /// + UINT64 RomSize; + + /// + /// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible + /// for allocating memory for the ROM image, and copying the contents of the ROM to memory. + /// The contents of this buffer are either from the PCI option ROM that can be accessed + /// through the ROM BAR of the PCI controller, or it is from a platform-specific location. + /// The Attributes() function can be used to determine from which of these two sources + /// the RomImage buffer was initialized. + /// + VOID *RomImage; +}; + +extern EFI_GUID gEfiPciIoProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h new file mode 100644 index 000000000..b9c80f589 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h @@ -0,0 +1,444 @@ +/** @file + PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification. + + PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, + and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform + defferent types of bus mastering DMA. + + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PCI_ROOT_BRIDGE_IO_H__ +#define __PCI_ROOT_BRIDGE_IO_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Library/BaseLib.h> + +#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \ + { \ + 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ + } + +typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL; + +/// +/// ******************************************************* +/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH +/// ******************************************************* +/// +typedef enum { + EfiPciWidthUint8, + EfiPciWidthUint16, + EfiPciWidthUint32, + EfiPciWidthUint64, + EfiPciWidthFifoUint8, + EfiPciWidthFifoUint16, + EfiPciWidthFifoUint32, + EfiPciWidthFifoUint64, + EfiPciWidthFillUint8, + EfiPciWidthFillUint16, + EfiPciWidthFillUint32, + EfiPciWidthFillUint64, + EfiPciWidthMaximum +} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH; + +/// +/// ******************************************************* +/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION +/// ******************************************************* +/// +typedef enum { + /// + /// A read operation from system memory by a bus master that is not capable of producing + /// PCI dual address cycles. + /// + EfiPciOperationBusMasterRead, + /// + /// A write operation from system memory by a bus master that is not capable of producing + /// PCI dual address cycles. + /// + EfiPciOperationBusMasterWrite, + /// + /// Provides both read and write access to system memory by both the processor and a bus + /// master that is not capable of producing PCI dual address cycles. + /// + EfiPciOperationBusMasterCommonBuffer, + /// + /// A read operation from system memory by a bus master that is capable of producing PCI + /// dual address cycles. + /// + EfiPciOperationBusMasterRead64, + /// + /// A write operation to system memory by a bus master that is capable of producing PCI + /// dual address cycles. + /// + EfiPciOperationBusMasterWrite64, + /// + /// Provides both read and write access to system memory by both the processor and a bus + /// master that is capable of producing PCI dual address cycles. + /// + EfiPciOperationBusMasterCommonBuffer64, + EfiPciOperationMaximum +} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION; + +#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 +#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002 +#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004 +#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008 +#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010 +#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 +#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 +#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 +#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800 +#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000 +#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 +#define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000 +#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 +#define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000 + +#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) + +#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER) + +#define EFI_PCI_ADDRESS(bus, dev, func, reg) \ + (UINT64) ( \ + (((UINTN) bus) << 24) | \ + (((UINTN) dev) << 16) | \ + (((UINTN) func) << 8) | \ + (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32)))) + +typedef struct { + UINT8 Register; + UINT8 Function; + UINT8 Device; + UINT8 Bus; + UINT32 ExtendedRegister; +} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS; + +/** + Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is + satisfied or after a defined duration. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Width Signifies the width of the memory or I/O operations. + @param Address The base address of the memory or I/O operations. + @param Mask Mask used for the polling criteria. + @param Value The comparison value used for the polling exit criteria. + @param Delay The number of 100 ns units to poll. + @param Result Pointer to the last value read from the memory location. + + @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria. + @retval EFI_TIMEOUT Delay expired before a match occurred. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, + IN UINT64 Address, + IN UINT64 Mask, + IN UINT64 Value, + IN UINT64 Delay, + OUT UINT64 *Result + ); + +/** + Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Width Signifies the width of the memory operations. + @param Address The base address of the memory operations. + @param Count The number of memory operations to perform. + @param Buffer For read operations, the destination buffer to store the results. For write + operations, the source buffer to write data from. + + @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, + IN UINT64 Address, + IN UINTN Count, + IN OUT VOID *Buffer + ); + +typedef struct { + /// + /// Read PCI controller registers in the PCI root bridge memory space. + /// + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read; + /// + /// Write PCI controller registers in the PCI root bridge memory space. + /// + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write; +} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS; + +/** + Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI + root bridge memory space. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance. + @param Width Signifies the width of the memory operations. + @param DestAddress The destination address of the memory operation. + @param SrcAddress The source address of the memory operation. + @param Count The number of memory operations to perform. + + @retval EFI_SUCCESS The data was copied from one memory region to another memory region. + @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, + IN UINT64 DestAddress, + IN UINT64 SrcAddress, + IN UINTN Count + ); + +/** + Provides the PCI controller-specific addresses required to access system memory from a + DMA bus master. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Operation Indicates if the bus master is going to read or write to system memory. + @param HostAddress The system memory address to map to the PCI controller. + @param NumberOfBytes On input the number of bytes to map. On output the number of bytes + that were mapped. + @param DeviceAddress The resulting map address for the bus master PCI controller to use to + access the hosts HostAddress. + @param Mapping A resulting value to pass to Unmap(). + + @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes. + @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval EFI_DEVICE_ERROR The system hardware could not map the requested address. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, + IN VOID *HostAddress, + IN OUT UINTN *NumberOfBytes, + OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, + OUT VOID **Mapping + ); + +/** + Completes the Map() operation and releases any corresponding resources. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Mapping The mapping value returned from Map(). + + @retval EFI_SUCCESS The range was unmapped. + @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map(). + @retval EFI_DEVICE_ERROR The data was not committed to the target system memory. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN VOID *Mapping + ); + +/** + Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or + EfiPciOperationBusMasterCommonBuffer64 mapping. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Type This parameter is not used and must be ignored. + @param MemoryType The type of memory to allocate, EfiBootServicesData or + EfiRuntimeServicesData. + @param Pages The number of pages to allocate. + @param HostAddress A pointer to store the base system memory address of the + allocated range. + @param Attributes The requested bit mask of attributes for the allocated range. + + @retval EFI_SUCCESS The requested memory pages were allocated. + @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are + MEMORY_WRITE_COMBINE and MEMORY_CACHED. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN EFI_ALLOCATE_TYPE Type, + IN EFI_MEMORY_TYPE MemoryType, + IN UINTN Pages, + IN OUT VOID **HostAddress, + IN UINT64 Attributes + ); + +/** + Frees memory that was allocated with AllocateBuffer(). + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Pages The number of pages to free. + @param HostAddress The base system memory address of the allocated range. + + @retval EFI_SUCCESS The requested memory pages were freed. + @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages + was not allocated with AllocateBuffer(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN UINTN Pages, + IN VOID *HostAddress + ); + +/** + Flushes all PCI posted write transactions from a PCI host bridge to system memory. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + + @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host + bridge to system memory. + @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI + host bridge due to a hardware error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This + ); + +/** + Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the + attributes that a PCI root bridge is currently using. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Supports A pointer to the mask of attributes that this PCI root bridge supports + setting with SetAttributes(). + @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently + using. + + @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root + bridge supports is returned in Supports. If Attributes is + not NULL, then the attributes that the PCI root bridge is currently + using is returned in Attributes. + @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL. + + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + OUT UINT64 *Supports, + OUT UINT64 *Attributes + ); + +/** + Sets attributes for a resource range on a PCI root bridge. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Attributes The mask of attributes to set. + @param ResourceBase A pointer to the base address of the resource range to be modified by the + attributes specified by Attributes. + @param ResourceLength A pointer to the length of the resource range to be modified by the + attributes specified by Attributes. + + @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource + range specified by ResourceBase and ResourceLength + were set on the PCI root bridge, and the actual resource range is + returned in ResuourceBase and ResourceLength. + @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root + Bridge. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the + resource range specified by BaseAddress and Length. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + IN UINT64 Attributes, + IN OUT UINT64 *ResourceBase, + IN OUT UINT64 *ResourceLength + ); + +/** + Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0 + resource descriptors. + + @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current + configuration of this PCI root bridge. + + @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in + Resources. + @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be + retrieved. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)( + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, + OUT VOID **Resources + ); + +/// +/// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are +/// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller. +/// +struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL { + /// + /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member. + /// + EFI_HANDLE ParentHandle; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration; + + /// + /// The segment number that this PCI root bridge resides. + /// + UINT32 SegmentNumber; +}; + +extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PxeBaseCode.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PxeBaseCode.h new file mode 100644 index 000000000..26447987d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/PxeBaseCode.h @@ -0,0 +1,936 @@ +/** @file + EFI PXE Base Code Protocol definitions, which is used to access PXE-compatible + devices for network access and network booting. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in EFI Specification 1.10. + +**/ +#ifndef __PXE_BASE_CODE_PROTOCOL_H__ +#define __PXE_BASE_CODE_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// PXE Base Code protocol. +/// +#define EFI_PXE_BASE_CODE_PROTOCOL_GUID \ + { \ + 0x03c4e603, 0xac28, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ + } + +typedef struct _EFI_PXE_BASE_CODE_PROTOCOL EFI_PXE_BASE_CODE_PROTOCOL; + +/// +/// Protocol defined in EFI1.1. +/// +typedef EFI_PXE_BASE_CODE_PROTOCOL EFI_PXE_BASE_CODE; + +/// +/// Default IP TTL and ToS. +/// +#define DEFAULT_TTL 16 +#define DEFAULT_ToS 0 + +/// +/// ICMP error format. +/// +typedef struct { + UINT8 Type; + UINT8 Code; + UINT16 Checksum; + union { + UINT32 reserved; + UINT32 Mtu; + UINT32 Pointer; + struct { + UINT16 Identifier; + UINT16 Sequence; + } Echo; + } u; + UINT8 Data[494]; +} EFI_PXE_BASE_CODE_ICMP_ERROR; + +/// +/// TFTP error format. +/// +typedef struct { + UINT8 ErrorCode; + CHAR8 ErrorString[127]; +} EFI_PXE_BASE_CODE_TFTP_ERROR; + +/// +/// IP Receive Filter definitions. +/// +#define EFI_PXE_BASE_CODE_MAX_IPCNT 8 + +/// +/// IP Receive Filter structure. +/// +typedef struct { + UINT8 Filters; + UINT8 IpCnt; + UINT16 reserved; + EFI_IP_ADDRESS IpList[EFI_PXE_BASE_CODE_MAX_IPCNT]; +} EFI_PXE_BASE_CODE_IP_FILTER; + +#define EFI_PXE_BASE_CODE_IP_FILTER_STATION_IP 0x0001 +#define EFI_PXE_BASE_CODE_IP_FILTER_BROADCAST 0x0002 +#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS 0x0004 +#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS_MULTICAST 0x0008 + +/// +/// ARP cache entries. +/// +typedef struct { + EFI_IP_ADDRESS IpAddr; + EFI_MAC_ADDRESS MacAddr; +} EFI_PXE_BASE_CODE_ARP_ENTRY; + +/// +/// ARP route table entries. +/// +typedef struct { + EFI_IP_ADDRESS IpAddr; + EFI_IP_ADDRESS SubnetMask; + EFI_IP_ADDRESS GwAddr; +} EFI_PXE_BASE_CODE_ROUTE_ENTRY; + +// +// UDP definitions +// +typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT; + +#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_IP 0x0001 +#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_PORT 0x0002 +#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_IP 0x0004 +#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_PORT 0x0008 +#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_USE_FILTER 0x0010 +#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_MAY_FRAGMENT 0x0020 + +// +// Discover() definitions +// +#define EFI_PXE_BASE_CODE_BOOT_TYPE_BOOTSTRAP 0 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_MS_WINNT_RIS 1 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_INTEL_LCM 2 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_DOSUNDI 3 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_NEC_ESMPRO 4 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_IBM_WSoD 5 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_IBM_LCCM 6 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_CA_UNICENTER_TNG 7 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_HP_OPENVIEW 8 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_ALTIRIS_9 9 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_ALTIRIS_10 10 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_ALTIRIS_11 11 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_NOT_USED_12 12 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_REDHAT_INSTALL 13 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_REDHAT_BOOT 14 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_REMBO 15 +#define EFI_PXE_BASE_CODE_BOOT_TYPE_BEOBOOT 16 +// +// 17 through 32767 are reserved +// 32768 through 65279 are for vendor use +// 65280 through 65534 are reserved +// +#define EFI_PXE_BASE_CODE_BOOT_TYPE_PXETEST 65535 + +#define EFI_PXE_BASE_CODE_BOOT_LAYER_MASK 0x7FFF +#define EFI_PXE_BASE_CODE_BOOT_LAYER_INITIAL 0x0000 + +// +// PXE Tag definition that identifies the processor +// and programming environment of the client system. +// These identifiers are defined by IETF: +// http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml +// +#if defined (MDE_CPU_IA32) +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0006 +#elif defined (MDE_CPU_IPF) +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0002 +#elif defined (MDE_CPU_X64) +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0007 +#elif defined (MDE_CPU_ARM) +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000A +#elif defined (MDE_CPU_AARCH64) +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B +#endif + + +/// +/// Discover() server list structure. +/// +typedef struct { + UINT16 Type; + BOOLEAN AcceptAnyResponse; + UINT8 Reserved; + EFI_IP_ADDRESS IpAddr; +} EFI_PXE_BASE_CODE_SRVLIST; + +/// +/// Discover() information override structure. +/// +typedef struct { + BOOLEAN UseMCast; + BOOLEAN UseBCast; + BOOLEAN UseUCast; + BOOLEAN MustUseList; + EFI_IP_ADDRESS ServerMCastIp; + UINT16 IpCnt; + EFI_PXE_BASE_CODE_SRVLIST SrvList[1]; +} EFI_PXE_BASE_CODE_DISCOVER_INFO; + +/// +/// TFTP opcode definitions. +/// +typedef enum { + EFI_PXE_BASE_CODE_TFTP_FIRST, + EFI_PXE_BASE_CODE_TFTP_GET_FILE_SIZE, + EFI_PXE_BASE_CODE_TFTP_READ_FILE, + EFI_PXE_BASE_CODE_TFTP_WRITE_FILE, + EFI_PXE_BASE_CODE_TFTP_READ_DIRECTORY, + EFI_PXE_BASE_CODE_MTFTP_GET_FILE_SIZE, + EFI_PXE_BASE_CODE_MTFTP_READ_FILE, + EFI_PXE_BASE_CODE_MTFTP_READ_DIRECTORY, + EFI_PXE_BASE_CODE_MTFTP_LAST +} EFI_PXE_BASE_CODE_TFTP_OPCODE; + +/// +/// MTFTP information. This information is required +/// to start or join a multicast TFTP session. It is also required to +/// perform the "get file size" and "read directory" operations of MTFTP. +/// +typedef struct { + EFI_IP_ADDRESS MCastIp; + EFI_PXE_BASE_CODE_UDP_PORT CPort; + EFI_PXE_BASE_CODE_UDP_PORT SPort; + UINT16 ListenTimeout; + UINT16 TransmitTimeout; +} EFI_PXE_BASE_CODE_MTFTP_INFO; + +/// +/// DHCPV4 Packet structure. +/// +typedef struct { + UINT8 BootpOpcode; + UINT8 BootpHwType; + UINT8 BootpHwAddrLen; + UINT8 BootpGateHops; + UINT32 BootpIdent; + UINT16 BootpSeconds; + UINT16 BootpFlags; + UINT8 BootpCiAddr[4]; + UINT8 BootpYiAddr[4]; + UINT8 BootpSiAddr[4]; + UINT8 BootpGiAddr[4]; + UINT8 BootpHwAddr[16]; + UINT8 BootpSrvName[64]; + UINT8 BootpBootFile[128]; + UINT32 DhcpMagik; + UINT8 DhcpOptions[56]; +} EFI_PXE_BASE_CODE_DHCPV4_PACKET; + +/// +/// DHCPV6 Packet structure. +/// +typedef struct { + UINT32 MessageType:8; + UINT32 TransactionId:24; + UINT8 DhcpOptions[1024]; +} EFI_PXE_BASE_CODE_DHCPV6_PACKET; + +/// +/// Packet structure. +/// +typedef union { + UINT8 Raw[1472]; + EFI_PXE_BASE_CODE_DHCPV4_PACKET Dhcpv4; + EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6; +} EFI_PXE_BASE_CODE_PACKET; + +// +// PXE Base Code Mode structure +// +#define EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES 8 +#define EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES 8 + +/// +/// EFI_PXE_BASE_CODE_MODE. +/// The data values in this structure are read-only and +/// are updated by the code that produces the +/// EFI_PXE_BASE_CODE_PROTOCOL functions. +/// +typedef struct { + BOOLEAN Started; + BOOLEAN Ipv6Available; + BOOLEAN Ipv6Supported; + BOOLEAN UsingIpv6; + BOOLEAN BisSupported; + BOOLEAN BisDetected; + BOOLEAN AutoArp; + BOOLEAN SendGUID; + BOOLEAN DhcpDiscoverValid; + BOOLEAN DhcpAckReceived; + BOOLEAN ProxyOfferReceived; + BOOLEAN PxeDiscoverValid; + BOOLEAN PxeReplyReceived; + BOOLEAN PxeBisReplyReceived; + BOOLEAN IcmpErrorReceived; + BOOLEAN TftpErrorReceived; + BOOLEAN MakeCallbacks; + UINT8 TTL; + UINT8 ToS; + EFI_IP_ADDRESS StationIp; + EFI_IP_ADDRESS SubnetMask; + EFI_PXE_BASE_CODE_PACKET DhcpDiscover; + EFI_PXE_BASE_CODE_PACKET DhcpAck; + EFI_PXE_BASE_CODE_PACKET ProxyOffer; + EFI_PXE_BASE_CODE_PACKET PxeDiscover; + EFI_PXE_BASE_CODE_PACKET PxeReply; + EFI_PXE_BASE_CODE_PACKET PxeBisReply; + EFI_PXE_BASE_CODE_IP_FILTER IpFilter; + UINT32 ArpCacheEntries; + EFI_PXE_BASE_CODE_ARP_ENTRY ArpCache[EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES]; + UINT32 RouteTableEntries; + EFI_PXE_BASE_CODE_ROUTE_ENTRY RouteTable[EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES]; + EFI_PXE_BASE_CODE_ICMP_ERROR IcmpError; + EFI_PXE_BASE_CODE_TFTP_ERROR TftpError; +} EFI_PXE_BASE_CODE_MODE; + +// +// PXE Base Code Interface Function definitions +// + +/** + Enables the use of the PXE Base Code Protocol functions. + + This function enables the use of the PXE Base Code Protocol functions. If the + Started field of the EFI_PXE_BASE_CODE_MODE structure is already TRUE, then + EFI_ALREADY_STARTED will be returned. If UseIpv6 is TRUE, then IPv6 formatted + addresses will be used in this session. If UseIpv6 is FALSE, then IPv4 formatted + addresses will be used in this session. If UseIpv6 is TRUE, and the Ipv6Supported + field of the EFI_PXE_BASE_CODE_MODE structure is FALSE, then EFI_UNSUPPORTED will + be returned. If there is not enough memory or other resources to start the PXE + Base Code Protocol, then EFI_OUT_OF_RESOURCES will be returned. Otherwise, the + PXE Base Code Protocol will be started, and all of the fields of the EFI_PXE_BASE_CODE_MODE + structure will be initialized as follows: + StartedSet to TRUE. + Ipv6SupportedUnchanged. + Ipv6AvailableUnchanged. + UsingIpv6Set to UseIpv6. + BisSupportedUnchanged. + BisDetectedUnchanged. + AutoArpSet to TRUE. + SendGUIDSet to FALSE. + TTLSet to DEFAULT_TTL. + ToSSet to DEFAULT_ToS. + DhcpCompletedSet to FALSE. + ProxyOfferReceivedSet to FALSE. + StationIpSet to an address of all zeros. + SubnetMaskSet to a subnet mask of all zeros. + DhcpDiscoverZero-filled. + DhcpAckZero-filled. + ProxyOfferZero-filled. + PxeDiscoverValidSet to FALSE. + PxeDiscoverZero-filled. + PxeReplyValidSet to FALSE. + PxeReplyZero-filled. + PxeBisReplyValidSet to FALSE. + PxeBisReplyZero-filled. + IpFilterSet the Filters field to 0 and the IpCnt field to 0. + ArpCacheEntriesSet to 0. + ArpCacheZero-filled. + RouteTableEntriesSet to 0. + RouteTableZero-filled. + IcmpErrorReceivedSet to FALSE. + IcmpErrorZero-filled. + TftpErroReceivedSet to FALSE. + TftpErrorZero-filled. + MakeCallbacksSet to TRUE if the PXE Base Code Callback Protocol is available. + Set to FALSE if the PXE Base Code Callback Protocol is not available. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param UseIpv6 Specifies the type of IP addresses that are to be used during the session + that is being started. Set to TRUE for IPv6 addresses, and FALSE for + IPv4 addresses. + + @retval EFI_SUCCESS The PXE Base Code Protocol was started. + @retval EFI_DEVICE_ERROR The network device encountered an error during this oper + @retval EFI_UNSUPPORTED UseIpv6 is TRUE, but the Ipv6Supported field of the + EFI_PXE_BASE_CODE_MODE structure is FALSE. + @retval EFI_ALREADY_STARTED The PXE Base Code Protocol is already in the started state. + @retval EFI_INVALID_PARAMETER The This parameter is NULL or does not point to a valid + EFI_PXE_BASE_CODE_PROTOCOL structure. + @retval EFI_OUT_OF_RESOURCES Could not allocate enough memory or other resources to start the + PXE Base Code Protocol. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_START)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN BOOLEAN UseIpv6 + ); + +/** + Disables the use of the PXE Base Code Protocol functions. + + This function stops all activity on the network device. All the resources allocated + in Start() are released, the Started field of the EFI_PXE_BASE_CODE_MODE structure is + set to FALSE and EFI_SUCCESS is returned. If the Started field of the EFI_PXE_BASE_CODE_MODE + structure is already FALSE, then EFI_NOT_STARTED will be returned. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + + @retval EFI_SUCCESS The PXE Base Code Protocol was stopped. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is already in the stopped state. + @retval EFI_INVALID_PARAMETER The This parameter is NULL or does not point to a valid + EFI_PXE_BASE_CODE_PROTOCOL structure. + @retval EFI_DEVICE_ERROR The network device encountered an error during this operation. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_STOP)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This + ); + +/** + Attempts to complete a DHCPv4 D.O.R.A. (discover / offer / request / acknowledge) or DHCPv6 + S.A.R.R (solicit / advertise / request / reply) sequence. + + This function attempts to complete the DHCP sequence. If this sequence is completed, + then EFI_SUCCESS is returned, and the DhcpCompleted, ProxyOfferReceived, StationIp, + SubnetMask, DhcpDiscover, DhcpAck, and ProxyOffer fields of the EFI_PXE_BASE_CODE_MODE + structure are filled in. + If SortOffers is TRUE, then the cached DHCP offer packets will be sorted before + they are tried. If SortOffers is FALSE, then the cached DHCP offer packets will + be tried in the order in which they are received. Please see the Preboot Execution + Environment (PXE) Specification for additional details on the implementation of DHCP. + This function can take at least 31 seconds to timeout and return control to the + caller. If the DHCP sequence does not complete, then EFI_TIMEOUT will be returned. + If the Callback Protocol does not return EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE, + then the DHCP sequence will be stopped and EFI_ABORTED will be returned. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param SortOffers TRUE if the offers received should be sorted. Set to FALSE to try the + offers in the order that they are received. + + @retval EFI_SUCCESS Valid DHCP has completed. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER The This parameter is NULL or does not point to a valid + EFI_PXE_BASE_CODE_PROTOCOL structure. + @retval EFI_DEVICE_ERROR The network device encountered an error during this operation. + @retval EFI_OUT_OF_RESOURCES Could not allocate enough memory to complete the DHCP Protocol. + @retval EFI_ABORTED The callback function aborted the DHCP Protocol. + @retval EFI_TIMEOUT The DHCP Protocol timed out. + @retval EFI_ICMP_ERROR An ICMP error packet was received during the DHCP session. + @retval EFI_NO_RESPONSE Valid PXE offer was not received. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_DHCP)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN BOOLEAN SortOffers + ); + +/** + Attempts to complete the PXE Boot Server and/or boot image discovery sequence. + + This function attempts to complete the PXE Boot Server and/or boot image discovery + sequence. If this sequence is completed, then EFI_SUCCESS is returned, and the + PxeDiscoverValid, PxeDiscover, PxeReplyReceived, and PxeReply fields of the + EFI_PXE_BASE_CODE_MODE structure are filled in. If UseBis is TRUE, then the + PxeBisReplyReceived and PxeBisReply fields of the EFI_PXE_BASE_CODE_MODE structure + will also be filled in. If UseBis is FALSE, then PxeBisReplyValid will be set to FALSE. + In the structure referenced by parameter Info, the PXE Boot Server list, SrvList[], + has two uses: It is the Boot Server IP address list used for unicast discovery + (if the UseUCast field is TRUE), and it is the list used for Boot Server verification + (if the MustUseList field is TRUE). Also, if the MustUseList field in that structure + is TRUE and the AcceptAnyResponse field in the SrvList[] array is TRUE, any Boot + Server reply of that type will be accepted. If the AcceptAnyResponse field is + FALSE, only responses from Boot Servers with matching IP addresses will be accepted. + This function can take at least 10 seconds to timeout and return control to the + caller. If the Discovery sequence does not complete, then EFI_TIMEOUT will be + returned. Please see the Preboot Execution Environment (PXE) Specification for + additional details on the implementation of the Discovery sequence. + If the Callback Protocol does not return EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE, + then the Discovery sequence is stopped and EFI_ABORTED will be returned. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param Type The type of bootstrap to perform. + @param Layer The pointer to the boot server layer number to discover, which must be + PXE_BOOT_LAYER_INITIAL when a new server type is being + discovered. + @param UseBis TRUE if Boot Integrity Services are to be used. FALSE otherwise. + @param Info The pointer to a data structure that contains additional information on the + type of discovery operation that is to be performed. + + @retval EFI_SUCCESS The Discovery sequence has been completed. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_DEVICE_ERROR The network device encountered an error during this operation. + @retval EFI_OUT_OF_RESOURCES Could not allocate enough memory to complete Discovery. + @retval EFI_ABORTED The callback function aborted the Discovery sequence. + @retval EFI_TIMEOUT The Discovery sequence timed out. + @retval EFI_ICMP_ERROR An ICMP error packet was received during the PXE discovery + session. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_DISCOVER)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN UINT16 Type, + IN UINT16 *Layer, + IN BOOLEAN UseBis, + IN EFI_PXE_BASE_CODE_DISCOVER_INFO *Info OPTIONAL + ); + +/** + Used to perform TFTP and MTFTP services. + + This function is used to perform TFTP and MTFTP services. This includes the + TFTP operations to get the size of a file, read a directory, read a file, and + write a file. It also includes the MTFTP operations to get the size of a file, + read a directory, and read a file. The type of operation is specified by Operation. + If the callback function that is invoked during the TFTP/MTFTP operation does + not return EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE, then EFI_ABORTED will + be returned. + For read operations, the return data will be placed in the buffer specified by + BufferPtr. If BufferSize is too small to contain the entire downloaded file, + then EFI_BUFFER_TOO_SMALL will be returned and BufferSize will be set to zero + or the size of the requested file (the size of the requested file is only returned + if the TFTP server supports TFTP options). If BufferSize is large enough for the + read operation, then BufferSize will be set to the size of the downloaded file, + and EFI_SUCCESS will be returned. Applications using the PxeBc.Mtftp() services + should use the get-file-size operations to determine the size of the downloaded + file prior to using the read-file operations--especially when downloading large + (greater than 64 MB) files--instead of making two calls to the read-file operation. + Following this recommendation will save time if the file is larger than expected + and the TFTP server does not support TFTP option extensions. Without TFTP option + extension support, the client has to download the entire file, counting and discarding + the received packets, to determine the file size. + For write operations, the data to be sent is in the buffer specified by BufferPtr. + BufferSize specifies the number of bytes to send. If the write operation completes + successfully, then EFI_SUCCESS will be returned. + For TFTP "get file size" operations, the size of the requested file or directory + is returned in BufferSize, and EFI_SUCCESS will be returned. If the TFTP server + does not support options, the file will be downloaded into a bit bucket and the + length of the downloaded file will be returned. For MTFTP "get file size" operations, + if the MTFTP server does not support the "get file size" option, EFI_UNSUPPORTED + will be returned. + This function can take up to 10 seconds to timeout and return control to the caller. + If the TFTP sequence does not complete, EFI_TIMEOUT will be returned. + If the Callback Protocol does not return EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE, + then the TFTP sequence is stopped and EFI_ABORTED will be returned. + The format of the data returned from a TFTP read directory operation is a null-terminated + filename followed by a null-terminated information string, of the form + "size year-month-day hour:minute:second" (i.e. %d %d-%d-%d %d:%d:%f - note that + the seconds field can be a decimal number), where the date and time are UTC. For + an MTFTP read directory command, there is additionally a null-terminated multicast + IP address preceding the filename of the form %d.%d.%d.%d for IP v4. The final + entry is itself null-terminated, so that the final information string is terminated + with two null octets. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param Operation The type of operation to perform. + @param BufferPtr A pointer to the data buffer. + @param Overwrite Only used on write file operations. TRUE if a file on a remote server can + be overwritten. + @param BufferSize For get-file-size operations, *BufferSize returns the size of the + requested file. + @param BlockSize The requested block size to be used during a TFTP transfer. + @param ServerIp The TFTP / MTFTP server IP address. + @param Filename A Null-terminated ASCII string that specifies a directory name or a file + name. + @param Info The pointer to the MTFTP information. + @param DontUseBuffer Set to FALSE for normal TFTP and MTFTP read file operation. + + @retval EFI_SUCCESS The TFTP/MTFTP operation was completed. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_DEVICE_ERROR The network device encountered an error during this operation. + @retval EFI_BUFFER_TOO_SMALL The buffer is not large enough to complete the read operation. + @retval EFI_ABORTED The callback function aborted the TFTP/MTFTP operation. + @retval EFI_TIMEOUT The TFTP/MTFTP operation timed out. + @retval EFI_ICMP_ERROR An ICMP error packet was received during the MTFTP session. + @retval EFI_TFTP_ERROR A TFTP error packet was received during the MTFTP session. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_MTFTP)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN EFI_PXE_BASE_CODE_TFTP_OPCODE Operation, + IN OUT VOID *BufferPtr OPTIONAL, + IN BOOLEAN Overwrite, + IN OUT UINT64 *BufferSize, + IN UINTN *BlockSize OPTIONAL, + IN EFI_IP_ADDRESS *ServerIp, + IN UINT8 *Filename OPTIONAL, + IN EFI_PXE_BASE_CODE_MTFTP_INFO *Info OPTIONAL, + IN BOOLEAN DontUseBuffer + ); + +/** + Writes a UDP packet to the network interface. + + This function writes a UDP packet specified by the (optional HeaderPtr and) + BufferPtr parameters to the network interface. The UDP header is automatically + built by this routine. It uses the parameters OpFlags, DestIp, DestPort, GatewayIp, + SrcIp, and SrcPort to build this header. If the packet is successfully built and + transmitted through the network interface, then EFI_SUCCESS will be returned. + If a timeout occurs during the transmission of the packet, then EFI_TIMEOUT will + be returned. If an ICMP error occurs during the transmission of the packet, then + the IcmpErrorReceived field is set to TRUE, the IcmpError field is filled in and + EFI_ICMP_ERROR will be returned. If the Callback Protocol does not return + EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE, then EFI_ABORTED will be returned. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param OpFlags The UDP operation flags. + @param DestIp The destination IP address. + @param DestPort The destination UDP port number. + @param GatewayIp The gateway IP address. + @param SrcIp The source IP address. + @param SrcPort The source UDP port number. + @param HeaderSize An optional field which may be set to the length of a header at + HeaderPtr to be prefixed to the data at BufferPtr. + @param HeaderPtr If HeaderSize is not NULL, a pointer to a header to be prefixed to the + data at BufferPtr. + @param BufferSize A pointer to the size of the data at BufferPtr. + @param BufferPtr A pointer to the data to be written. + + @retval EFI_SUCCESS The UDP Write operation was completed. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_BAD_BUFFER_SIZE The buffer is too long to be transmitted. + @retval EFI_ABORTED The callback function aborted the UDP Write operation. + @retval EFI_TIMEOUT The UDP Write operation timed out. + @retval EFI_ICMP_ERROR An ICMP error packet was received during the UDP write session. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_UDP_WRITE)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN UINT16 OpFlags, + IN EFI_IP_ADDRESS *DestIp, + IN EFI_PXE_BASE_CODE_UDP_PORT *DestPort, + IN EFI_IP_ADDRESS *GatewayIp, OPTIONAL + IN EFI_IP_ADDRESS *SrcIp, OPTIONAL + IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort, OPTIONAL + IN UINTN *HeaderSize, OPTIONAL + IN VOID *HeaderPtr, OPTIONAL + IN UINTN *BufferSize, + IN VOID *BufferPtr + ); + +/** + Reads a UDP packet from the network interface. + + This function reads a UDP packet from a network interface. The data contents + are returned in (the optional HeaderPtr and) BufferPtr, and the size of the + buffer received is returned in BufferSize. If the input BufferSize is smaller + than the UDP packet received (less optional HeaderSize), it will be set to the + required size, and EFI_BUFFER_TOO_SMALL will be returned. In this case, the + contents of BufferPtr are undefined, and the packet is lost. If a UDP packet is + successfully received, then EFI_SUCCESS will be returned, and the information + from the UDP header will be returned in DestIp, DestPort, SrcIp, and SrcPort if + they are not NULL. + Depending on the values of OpFlags and the DestIp, DestPort, SrcIp, and SrcPort + input values, different types of UDP packet receive filtering will be performed. + The following tables summarize these receive filter operations. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param OpFlags The UDP operation flags. + @param DestIp The destination IP address. + @param DestPort The destination UDP port number. + @param SrcIp The source IP address. + @param SrcPort The source UDP port number. + @param HeaderSize An optional field which may be set to the length of a header at + HeaderPtr to be prefixed to the data at BufferPtr. + @param HeaderPtr If HeaderSize is not NULL, a pointer to a header to be prefixed to the + data at BufferPtr. + @param BufferSize A pointer to the size of the data at BufferPtr. + @param BufferPtr A pointer to the data to be read. + + @retval EFI_SUCCESS The UDP Read operation was completed. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_DEVICE_ERROR The network device encountered an error during this operation. + @retval EFI_BUFFER_TOO_SMALL The packet is larger than Buffer can hold. + @retval EFI_ABORTED The callback function aborted the UDP Read operation. + @retval EFI_TIMEOUT The UDP Read operation timed out. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_UDP_READ)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN UINT16 OpFlags, + IN OUT EFI_IP_ADDRESS *DestIp, OPTIONAL + IN OUT EFI_PXE_BASE_CODE_UDP_PORT *DestPort, OPTIONAL + IN OUT EFI_IP_ADDRESS *SrcIp, OPTIONAL + IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort, OPTIONAL + IN UINTN *HeaderSize, OPTIONAL + IN VOID *HeaderPtr, OPTIONAL + IN OUT UINTN *BufferSize, + IN VOID *BufferPtr + ); + +/** + Updates the IP receive filters of a network device and enables software filtering. + + The NewFilter field is used to modify the network device's current IP receive + filter settings and to enable a software filter. This function updates the IpFilter + field of the EFI_PXE_BASE_CODE_MODE structure with the contents of NewIpFilter. + The software filter is used when the USE_FILTER in OpFlags is set to UdpRead(). + The current hardware filter remains in effect no matter what the settings of OpFlags + are, so that the meaning of ANY_DEST_IP set in OpFlags to UdpRead() is from those + packets whose reception is enabled in hardware - physical NIC address (unicast), + broadcast address, logical address or addresses (multicast), or all (promiscuous). + UdpRead() does not modify the IP filter settings. + Dhcp(), Discover(), and Mtftp() set the IP filter, and return with the IP receive + filter list emptied and the filter set to EFI_PXE_BASE_CODE_IP_FILTER_STATION_IP. + If an application or driver wishes to preserve the IP receive filter settings, + it will have to preserve the IP receive filter settings before these calls, and + use SetIpFilter() to restore them after the calls. If incompatible filtering is + requested (for example, PROMISCUOUS with anything else), or if the device does not + support a requested filter setting and it cannot be accommodated in software + (for example, PROMISCUOUS not supported), EFI_INVALID_PARAMETER will be returned. + The IPlist field is used to enable IPs other than the StationIP. They may be + multicast or unicast. If IPcnt is set as well as EFI_PXE_BASE_CODE_IP_FILTER_STATION_IP, + then both the StationIP and the IPs from the IPlist will be used. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param NewFilter The pointer to the new set of IP receive filters. + + @retval EFI_SUCCESS The IP receive filter settings were updated. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_SET_IP_FILTER)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN EFI_PXE_BASE_CODE_IP_FILTER *NewFilter + ); + +/** + Uses the ARP protocol to resolve a MAC address. + + This function uses the ARP protocol to resolve a MAC address. The UsingIpv6 field + of the EFI_PXE_BASE_CODE_MODE structure is used to determine if IPv4 or IPv6 + addresses are being used. The IP address specified by IpAddr is used to resolve + a MAC address. If the ARP protocol succeeds in resolving the specified address, + then the ArpCacheEntries and ArpCache fields of the EFI_PXE_BASE_CODE_MODE structure + are updated, and EFI_SUCCESS is returned. If MacAddr is not NULL, the resolved + MAC address is placed there as well. + If the PXE Base Code protocol is in the stopped state, then EFI_NOT_STARTED is + returned. If the ARP protocol encounters a timeout condition while attempting + to resolve an address, then EFI_TIMEOUT is returned. If the Callback Protocol + does not return EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE, then EFI_ABORTED is + returned. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param IpAddr The pointer to the IP address that is used to resolve a MAC address. + @param MacAddr If not NULL, a pointer to the MAC address that was resolved with the + ARP protocol. + + @retval EFI_SUCCESS The IP or MAC address was resolved. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_DEVICE_ERROR The network device encountered an error during this operation. + @retval EFI_ABORTED The callback function aborted the ARP Protocol. + @retval EFI_TIMEOUT The ARP Protocol encountered a timeout condition. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_ARP)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN EFI_IP_ADDRESS *IpAddr, + IN EFI_MAC_ADDRESS *MacAddr OPTIONAL + ); + +/** + Updates the parameters that affect the operation of the PXE Base Code Protocol. + + This function sets parameters that affect the operation of the PXE Base Code Protocol. + The parameter specified by NewAutoArp is used to control the generation of ARP + protocol packets. If NewAutoArp is TRUE, then ARP Protocol packets will be generated + as required by the PXE Base Code Protocol. If NewAutoArp is FALSE, then no ARP + Protocol packets will be generated. In this case, the only mappings that are + available are those stored in the ArpCache of the EFI_PXE_BASE_CODE_MODE structure. + If there are not enough mappings in the ArpCache to perform a PXE Base Code Protocol + service, then the service will fail. This function updates the AutoArp field of + the EFI_PXE_BASE_CODE_MODE structure to NewAutoArp. + The SetParameters() call must be invoked after a Callback Protocol is installed + to enable the use of callbacks. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param NewAutoArp If not NULL, a pointer to a value that specifies whether to replace the + current value of AutoARP. + @param NewSendGUID If not NULL, a pointer to a value that specifies whether to replace the + current value of SendGUID. + @param NewTTL If not NULL, a pointer to be used in place of the current value of TTL, + the "time to live" field of the IP header. + @param NewToS If not NULL, a pointer to be used in place of the current value of ToS, + the "type of service" field of the IP header. + @param NewMakeCallback If not NULL, a pointer to a value that specifies whether to replace the + current value of the MakeCallback field of the Mode structure. + + @retval EFI_SUCCESS The new parameters values were updated. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_SET_PARAMETERS)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN BOOLEAN *NewAutoArp, OPTIONAL + IN BOOLEAN *NewSendGUID, OPTIONAL + IN UINT8 *NewTTL, OPTIONAL + IN UINT8 *NewToS, OPTIONAL + IN BOOLEAN *NewMakeCallback OPTIONAL + ); + +/** + Updates the station IP address and/or subnet mask values of a network device. + + This function updates the station IP address and/or subnet mask values of a network + device. + The NewStationIp field is used to modify the network device's current IP address. + If NewStationIP is NULL, then the current IP address will not be modified. Otherwise, + this function updates the StationIp field of the EFI_PXE_BASE_CODE_MODE structure + with NewStationIp. + The NewSubnetMask field is used to modify the network device's current subnet + mask. If NewSubnetMask is NULL, then the current subnet mask will not be modified. + Otherwise, this function updates the SubnetMask field of the EFI_PXE_BASE_CODE_MODE + structure with NewSubnetMask. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param NewStationIp The pointer to the new IP address to be used by the network device. + @param NewSubnetMask The pointer to the new subnet mask to be used by the network device. + + @retval EFI_SUCCESS The new station IP address and/or subnet mask were updated. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_SET_STATION_IP)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + IN EFI_IP_ADDRESS *NewStationIp, OPTIONAL + IN EFI_IP_ADDRESS *NewSubnetMask OPTIONAL + ); + +/** + Updates the contents of the cached DHCP and Discover packets. + + The pointers to the new packets are used to update the contents of the cached + packets in the EFI_PXE_BASE_CODE_MODE structure. + + @param This The pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance. + @param NewDhcpDiscoverValid The pointer to a value that will replace the current + DhcpDiscoverValid field. + @param NewDhcpAckReceived The pointer to a value that will replace the current + DhcpAckReceived field. + @param NewProxyOfferReceived The pointer to a value that will replace the current + ProxyOfferReceived field. + @param NewPxeDiscoverValid The pointer to a value that will replace the current + ProxyOfferReceived field. + @param NewPxeReplyReceived The pointer to a value that will replace the current + PxeReplyReceived field. + @param NewPxeBisReplyReceived The pointer to a value that will replace the current + PxeBisReplyReceived field. + @param NewDhcpDiscover The pointer to the new cached DHCP Discover packet contents. + @param NewDhcpAck The pointer to the new cached DHCP Ack packet contents. + @param NewProxyOffer The pointer to the new cached Proxy Offer packet contents. + @param NewPxeDiscover The pointer to the new cached PXE Discover packet contents. + @param NewPxeReply The pointer to the new cached PXE Reply packet contents. + @param NewPxeBisReply The pointer to the new cached PXE BIS Reply packet contents. + + @retval EFI_SUCCESS The cached packet contents were updated. + @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state. + @retval EFI_INVALID_PARAMETER This is NULL or not point to a valid EFI_PXE_BASE_CODE_PROTOCOL structure. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PXE_BASE_CODE_SET_PACKETS)( + IN EFI_PXE_BASE_CODE_PROTOCOL *This, + BOOLEAN *NewDhcpDiscoverValid, OPTIONAL + BOOLEAN *NewDhcpAckReceived, OPTIONAL + BOOLEAN *NewProxyOfferReceived, OPTIONAL + BOOLEAN *NewPxeDiscoverValid, OPTIONAL + BOOLEAN *NewPxeReplyReceived, OPTIONAL + BOOLEAN *NewPxeBisReplyReceived, OPTIONAL + IN EFI_PXE_BASE_CODE_PACKET *NewDhcpDiscover, OPTIONAL + IN EFI_PXE_BASE_CODE_PACKET *NewDhcpAck, OPTIONAL + IN EFI_PXE_BASE_CODE_PACKET *NewProxyOffer, OPTIONAL + IN EFI_PXE_BASE_CODE_PACKET *NewPxeDiscover, OPTIONAL + IN EFI_PXE_BASE_CODE_PACKET *NewPxeReply, OPTIONAL + IN EFI_PXE_BASE_CODE_PACKET *NewPxeBisReply OPTIONAL + ); + +// +// PXE Base Code Protocol structure +// +#define EFI_PXE_BASE_CODE_PROTOCOL_REVISION 0x00010000 + +// +// Revision defined in EFI1.1 +// +#define EFI_PXE_BASE_CODE_INTERFACE_REVISION EFI_PXE_BASE_CODE_PROTOCOL_REVISION + +/// +/// The EFI_PXE_BASE_CODE_PROTOCOL is used to control PXE-compatible devices. +/// An EFI_PXE_BASE_CODE_PROTOCOL will be layered on top of an +/// EFI_MANAGED_NETWORK_PROTOCOL protocol in order to perform packet level transactions. +/// The EFI_PXE_BASE_CODE_PROTOCOL handle also supports the +/// EFI_LOAD_FILE_PROTOCOL protocol. This provides a clean way to obtain control from the +/// boot manager if the boot path is from the remote device. +/// +struct _EFI_PXE_BASE_CODE_PROTOCOL { + /// + /// The revision of the EFI_PXE_BASE_CODE_PROTOCOL. All future revisions must + /// be backwards compatible. If a future version is not backwards compatible + /// it is not the same GUID. + /// + UINT64 Revision; + EFI_PXE_BASE_CODE_START Start; + EFI_PXE_BASE_CODE_STOP Stop; + EFI_PXE_BASE_CODE_DHCP Dhcp; + EFI_PXE_BASE_CODE_DISCOVER Discover; + EFI_PXE_BASE_CODE_MTFTP Mtftp; + EFI_PXE_BASE_CODE_UDP_WRITE UdpWrite; + EFI_PXE_BASE_CODE_UDP_READ UdpRead; + EFI_PXE_BASE_CODE_SET_IP_FILTER SetIpFilter; + EFI_PXE_BASE_CODE_ARP Arp; + EFI_PXE_BASE_CODE_SET_PARAMETERS SetParameters; + EFI_PXE_BASE_CODE_SET_STATION_IP SetStationIp; + EFI_PXE_BASE_CODE_SET_PACKETS SetPackets; + /// + /// The pointer to the EFI_PXE_BASE_CODE_MODE data for this device. + /// + EFI_PXE_BASE_CODE_MODE *Mode; +}; + +extern EFI_GUID gEfiPxeBaseCodeProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleFileSystem.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleFileSystem.h new file mode 100644 index 000000000..b6bacfd9c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleFileSystem.h @@ -0,0 +1,564 @@ +/** @file + SimpleFileSystem protocol as defined in the UEFI 2.0 specification. + + The SimpleFileSystem protocol is the programmatic access to the FAT (12,16,32) + file system specified in UEFI 2.0. It can also be used to abstract a file + system other than FAT. + + UEFI 2.0 can boot from any valid EFI image contained in a SimpleFileSystem. + +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __SIMPLE_FILE_SYSTEM_H__ +#define __SIMPLE_FILE_SYSTEM_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID \ + { \ + 0x964e5b22, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +typedef struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL; + +typedef struct _EFI_FILE_PROTOCOL EFI_FILE_PROTOCOL; +typedef struct _EFI_FILE_PROTOCOL *EFI_FILE_HANDLE; + +/// +/// Protocol GUID name defined in EFI1.1. +/// +#define SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID + +/// +/// Protocol name defined in EFI1.1. +/// +typedef EFI_SIMPLE_FILE_SYSTEM_PROTOCOL EFI_FILE_IO_INTERFACE; +typedef EFI_FILE_PROTOCOL EFI_FILE; + +/** + Open the root directory on a volume. + + @param This A pointer to the volume to open the root directory. + @param Root A pointer to the location to return the opened file handle for the + root directory. + + @retval EFI_SUCCESS The device was opened. + @retval EFI_UNSUPPORTED This volume does not support the requested file system type. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_ACCESS_DENIED The service denied access to the file. + @retval EFI_OUT_OF_RESOURCES The volume was not opened due to lack of resources. + @retval EFI_MEDIA_CHANGED The device has a different medium in it or the medium is no + longer supported. Any existing file handles for this volume are + no longer valid. To access the files on the new medium, the + volume must be reopened with OpenVolume(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME)( + IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This, + OUT EFI_FILE_PROTOCOL **Root + ); + +#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION 0x00010000 + +/// +/// Revision defined in EFI1.1 +/// +#define EFI_FILE_IO_INTERFACE_REVISION EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION + +struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL { + /// + /// The version of the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. The version + /// specified by this specification is 0x00010000. All future revisions + /// must be backwards compatible. + /// + UINT64 Revision; + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME OpenVolume; +}; + +/** + Opens a new file relative to the source file's location. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to the source location. This would typically be an open + handle to a directory. + @param NewHandle A pointer to the location to return the opened handle for the new + file. + @param FileName The Null-terminated string of the name of the file to be opened. + The file name may contain the following path modifiers: "\", ".", + and "..". + @param OpenMode The mode to open the file. The only valid combinations that the + file may be opened with are: Read, Read/Write, or Create/Read/Write. + @param Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these are the + attribute bits for the newly created file. + + @retval EFI_SUCCESS The file was opened. + @retval EFI_NOT_FOUND The specified file could not be found on the device. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_MEDIA_CHANGED The device has a different medium in it or the medium is no + longer supported. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_WRITE_PROTECTED An attempt was made to create a file, or open a file for write + when the media is write-protected. + @retval EFI_ACCESS_DENIED The service denied access to the file. + @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file. + @retval EFI_VOLUME_FULL The volume is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_OPEN)( + IN EFI_FILE_PROTOCOL *This, + OUT EFI_FILE_PROTOCOL **NewHandle, + IN CHAR16 *FileName, + IN UINT64 OpenMode, + IN UINT64 Attributes + ); + +// +// Open modes +// +#define EFI_FILE_MODE_READ 0x0000000000000001ULL +#define EFI_FILE_MODE_WRITE 0x0000000000000002ULL +#define EFI_FILE_MODE_CREATE 0x8000000000000000ULL + +// +// File attributes +// +#define EFI_FILE_READ_ONLY 0x0000000000000001ULL +#define EFI_FILE_HIDDEN 0x0000000000000002ULL +#define EFI_FILE_SYSTEM 0x0000000000000004ULL +#define EFI_FILE_RESERVED 0x0000000000000008ULL +#define EFI_FILE_DIRECTORY 0x0000000000000010ULL +#define EFI_FILE_ARCHIVE 0x0000000000000020ULL +#define EFI_FILE_VALID_ATTR 0x0000000000000037ULL + +/** + Closes a specified file handle. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to close. + + @retval EFI_SUCCESS The file was closed. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_CLOSE)( + IN EFI_FILE_PROTOCOL *This + ); + +/** + Close and delete the file handle. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the + handle to the file to delete. + + @retval EFI_SUCCESS The file was closed and deleted, and the handle was closed. + @retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not deleted. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_DELETE)( + IN EFI_FILE_PROTOCOL *This + ); + +/** + Reads data from a file. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to read data from. + @param BufferSize On input, the size of the Buffer. On output, the amount of data + returned in Buffer. In both cases, the size is measured in bytes. + @param Buffer The buffer into which the data is read. + + @retval EFI_SUCCESS Data was read. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_DEVICE_ERROR An attempt was made to read from a deleted file. + @retval EFI_DEVICE_ERROR On entry, the current file position is beyond the end of the file. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory + entry. BufferSize has been updated with the size + needed to complete the request. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_READ)( + IN EFI_FILE_PROTOCOL *This, + IN OUT UINTN *BufferSize, + OUT VOID *Buffer + ); + +/** + Writes data to a file. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to write data to. + @param BufferSize On input, the size of the Buffer. On output, the amount of data + actually written. In both cases, the size is measured in bytes. + @param Buffer The buffer of data to write. + + @retval EFI_SUCCESS Data was written. + @retval EFI_UNSUPPORTED Writes to open directory files are not supported. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_DEVICE_ERROR An attempt was made to write to a deleted file. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_WRITE_PROTECTED The file or medium is write-protected. + @retval EFI_ACCESS_DENIED The file was opened read only. + @retval EFI_VOLUME_FULL The volume is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_WRITE)( + IN EFI_FILE_PROTOCOL *This, + IN OUT UINTN *BufferSize, + IN VOID *Buffer + ); + +/** + Sets a file's current position. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the + file handle to set the requested position on. + @param Position The byte position from the start of the file to set. + + @retval EFI_SUCCESS The position was set. + @retval EFI_UNSUPPORTED The seek request for nonzero is not valid on open + directories. + @retval EFI_DEVICE_ERROR An attempt was made to set the position of a deleted file. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_SET_POSITION)( + IN EFI_FILE_PROTOCOL *This, + IN UINT64 Position + ); + +/** + Returns a file's current position. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to get the current position on. + @param Position The address to return the file's current position value. + + @retval EFI_SUCCESS The position was returned. + @retval EFI_UNSUPPORTED The request is not valid on open directories. + @retval EFI_DEVICE_ERROR An attempt was made to get the position from a deleted file. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_GET_POSITION)( + IN EFI_FILE_PROTOCOL *This, + OUT UINT64 *Position + ); + +/** + Returns information about a file. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle the requested information is for. + @param InformationType The type identifier for the information being requested. + @param BufferSize On input, the size of Buffer. On output, the amount of data + returned in Buffer. In both cases, the size is measured in bytes. + @param Buffer A pointer to the data buffer to return. The buffer's type is + indicated by InformationType. + + @retval EFI_SUCCESS The information was returned. + @retval EFI_UNSUPPORTED The InformationType is not known. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry. + BufferSize has been updated with the size needed to complete + the request. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_GET_INFO)( + IN EFI_FILE_PROTOCOL *This, + IN EFI_GUID *InformationType, + IN OUT UINTN *BufferSize, + OUT VOID *Buffer + ); + +/** + Sets information about a file. + + @param File A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle the information is for. + @param InformationType The type identifier for the information being set. + @param BufferSize The size, in bytes, of Buffer. + @param Buffer A pointer to the data buffer to write. The buffer's type is + indicated by InformationType. + + @retval EFI_SUCCESS The information was set. + @retval EFI_UNSUPPORTED The InformationType is not known. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_WRITE_PROTECTED InformationType is EFI_FILE_INFO_ID and the media is + read-only. + @retval EFI_WRITE_PROTECTED InformationType is EFI_FILE_PROTOCOL_SYSTEM_INFO_ID + and the media is read only. + @retval EFI_WRITE_PROTECTED InformationType is EFI_FILE_SYSTEM_VOLUME_LABEL_ID + and the media is read-only. + @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file to a + file that is already present. + @retval EFI_ACCESS_DENIED An attempt is being made to change the EFI_FILE_DIRECTORY + Attribute. + @retval EFI_ACCESS_DENIED An attempt is being made to change the size of a directory. + @retval EFI_ACCESS_DENIED InformationType is EFI_FILE_INFO_ID and the file was opened + read-only and an attempt is being made to modify a field + other than Attribute. + @retval EFI_VOLUME_FULL The volume is full. + @retval EFI_BAD_BUFFER_SIZE BufferSize is smaller than the size of the type indicated + by InformationType. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_SET_INFO)( + IN EFI_FILE_PROTOCOL *This, + IN EFI_GUID *InformationType, + IN UINTN BufferSize, + IN VOID *Buffer + ); + +/** + Flushes all modified data associated with a file to a device. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to flush. + + @retval EFI_SUCCESS The data was flushed. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_WRITE_PROTECTED The file or medium is write-protected. + @retval EFI_ACCESS_DENIED The file was opened read-only. + @retval EFI_VOLUME_FULL The volume is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_FLUSH)( + IN EFI_FILE_PROTOCOL *This + ); + +typedef struct { + // + // If Event is NULL, then blocking I/O is performed. + // If Event is not NULL and non-blocking I/O is supported, then non-blocking I/O is performed, + // and Event will be signaled when the read request is completed. + // The caller must be prepared to handle the case where the callback associated with Event + // occurs before the original asynchronous I/O request call returns. + // + EFI_EVENT Event; + + // + // Defines whether or not the signaled event encountered an error. + // + EFI_STATUS Status; + + // + // For OpenEx(): Not Used, ignored. + // For ReadEx(): On input, the size of the Buffer. On output, the amount of data returned in Buffer. + // In both cases, the size is measured in bytes. + // For WriteEx(): On input, the size of the Buffer. On output, the amount of data actually written. + // In both cases, the size is measured in bytes. + // For FlushEx(): Not used, ignored. + // + UINTN BufferSize; + + // + // For OpenEx(): Not Used, ignored. + // For ReadEx(): The buffer into which the data is read. + // For WriteEx(): The buffer of data to write. + // For FlushEx(): Not Used, ignored. + // + VOID *Buffer; +} EFI_FILE_IO_TOKEN; + +/** + Opens a new file relative to the source directory's location. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to the source location. + @param NewHandle A pointer to the location to return the opened handle for the new + file. + @param FileName The Null-terminated string of the name of the file to be opened. + The file name may contain the following path modifiers: "\", ".", + and "..". + @param OpenMode The mode to open the file. The only valid combinations that the + file may be opened with are: Read, Read/Write, or Create/Read/Write. + @param Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these are the + attribute bits for the newly created file. + @param Token A pointer to the token associated with the transaction. + + @retval EFI_SUCCESS If Event is NULL (blocking I/O): The data was read successfully. + If Event is not NULL (asynchronous I/O): The request was successfully + queued for processing. + @retval EFI_NOT_FOUND The specified file could not be found on the device. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_MEDIA_CHANGED The device has a different medium in it or the medium is no + longer supported. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_WRITE_PROTECTED An attempt was made to create a file, or open a file for write + when the media is write-protected. + @retval EFI_ACCESS_DENIED The service denied access to the file. + @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file. + @retval EFI_VOLUME_FULL The volume is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_OPEN_EX)( + IN EFI_FILE_PROTOCOL *This, + OUT EFI_FILE_PROTOCOL **NewHandle, + IN CHAR16 *FileName, + IN UINT64 OpenMode, + IN UINT64 Attributes, + IN OUT EFI_FILE_IO_TOKEN *Token + ); + + +/** + Reads data from a file. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file handle to read data from. + @param Token A pointer to the token associated with the transaction. + + @retval EFI_SUCCESS If Event is NULL (blocking I/O): The data was read successfully. + If Event is not NULL (asynchronous I/O): The request was successfully + queued for processing. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_DEVICE_ERROR An attempt was made to read from a deleted file. + @retval EFI_DEVICE_ERROR On entry, the current file position is beyond the end of the file. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_OUT_OF_RESOURCES Unable to queue the request due to lack of resources. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_READ_EX) ( + IN EFI_FILE_PROTOCOL *This, + IN OUT EFI_FILE_IO_TOKEN *Token +); + + +/** + Writes data to a file. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file handle to write data to. + @param Token A pointer to the token associated with the transaction. + + @retval EFI_SUCCESS If Event is NULL (blocking I/O): The data was read successfully. + If Event is not NULL (asynchronous I/O): The request was successfully + queued for processing. + @retval EFI_UNSUPPORTED Writes to open directory files are not supported. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_DEVICE_ERROR An attempt was made to write to a deleted file. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_WRITE_PROTECTED The file or medium is write-protected. + @retval EFI_ACCESS_DENIED The file was opened read only. + @retval EFI_VOLUME_FULL The volume is full. + @retval EFI_OUT_OF_RESOURCES Unable to queue the request due to lack of resources. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_WRITE_EX) ( + IN EFI_FILE_PROTOCOL *This, + IN OUT EFI_FILE_IO_TOKEN *Token +); + +/** + Flushes all modified data associated with a file to a device. + + @param This A pointer to the EFI_FILE_PROTOCOL instance that is the file + handle to flush. + @param Token A pointer to the token associated with the transaction. + + @retval EFI_SUCCESS If Event is NULL (blocking I/O): The data was read successfully. + If Event is not NULL (asynchronous I/O): The request was successfully + queued for processing. + @retval EFI_NO_MEDIA The device has no medium. + @retval EFI_DEVICE_ERROR The device reported an error. + @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted. + @retval EFI_WRITE_PROTECTED The file or medium is write-protected. + @retval EFI_ACCESS_DENIED The file was opened read-only. + @retval EFI_VOLUME_FULL The volume is full. + @retval EFI_OUT_OF_RESOURCES Unable to queue the request due to lack of resources. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FILE_FLUSH_EX) ( + IN EFI_FILE_PROTOCOL *This, + IN OUT EFI_FILE_IO_TOKEN *Token + ); + +#define EFI_FILE_PROTOCOL_REVISION 0x00010000 +#define EFI_FILE_PROTOCOL_REVISION2 0x00020000 +#define EFI_FILE_PROTOCOL_LATEST_REVISION EFI_FILE_PROTOCOL_REVISION2 + +// +// Revision defined in EFI1.1. +// +#define EFI_FILE_REVISION EFI_FILE_PROTOCOL_REVISION + +/// +/// The EFI_FILE_PROTOCOL provides file IO access to supported file systems. +/// An EFI_FILE_PROTOCOL provides access to a file's or directory's contents, +/// and is also a reference to a location in the directory tree of the file system +/// in which the file resides. With any given file handle, other files may be opened +/// relative to this file's location, yielding new file handles. +/// +struct _EFI_FILE_PROTOCOL { + /// + /// The version of the EFI_FILE_PROTOCOL interface. The version specified + /// by this specification is EFI_FILE_PROTOCOL_LATEST_REVISION. + /// Future versions are required to be backward compatible to version 1.0. + /// + UINT64 Revision; + EFI_FILE_OPEN Open; + EFI_FILE_CLOSE Close; + EFI_FILE_DELETE Delete; + EFI_FILE_READ Read; + EFI_FILE_WRITE Write; + EFI_FILE_GET_POSITION GetPosition; + EFI_FILE_SET_POSITION SetPosition; + EFI_FILE_GET_INFO GetInfo; + EFI_FILE_SET_INFO SetInfo; + EFI_FILE_FLUSH Flush; + EFI_FILE_OPEN_EX OpenEx; + EFI_FILE_READ_EX ReadEx; + EFI_FILE_WRITE_EX WriteEx; + EFI_FILE_FLUSH_EX FlushEx; +}; + + +extern EFI_GUID gEfiSimpleFileSystemProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleNetwork.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleNetwork.h new file mode 100644 index 000000000..2b521a9de --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleNetwork.h @@ -0,0 +1,664 @@ +/** @file + The EFI_SIMPLE_NETWORK_PROTOCOL provides services to initialize a network interface, + transmit packets, receive packets, and close a network interface. + + Basic network device abstraction. + + Rx - Received + Tx - Transmit + MCast - MultiCast + ... + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in EFI Specification 1.10. + +**/ + +#ifndef __SIMPLE_NETWORK_H__ +#define __SIMPLE_NETWORK_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_SIMPLE_NETWORK_PROTOCOL_GUID \ + { \ + 0xA19832B9, 0xAC25, 0x11D3, {0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \ + } + +typedef struct _EFI_SIMPLE_NETWORK_PROTOCOL EFI_SIMPLE_NETWORK_PROTOCOL; + + +/// +/// Protocol defined in EFI1.1. +/// +typedef EFI_SIMPLE_NETWORK_PROTOCOL EFI_SIMPLE_NETWORK; + +/// +/// Simple Network Protocol data structures. +/// +typedef struct { + /// + /// Total number of frames received. Includes frames with errors and + /// dropped frames. + /// + UINT64 RxTotalFrames; + + /// + /// Number of valid frames received and copied into receive buffers. + /// + UINT64 RxGoodFrames; + + /// + /// Number of frames below the minimum length for the media. + /// This would be <64 for ethernet. + /// + UINT64 RxUndersizeFrames; + + /// + /// Number of frames longer than the maxminum length for the + /// media. This would be >1500 for ethernet. + /// + UINT64 RxOversizeFrames; + + /// + /// Valid frames that were dropped because receive buffers were full. + /// + UINT64 RxDroppedFrames; + + /// + /// Number of valid unicast frames received and not dropped. + /// + UINT64 RxUnicastFrames; + + /// + /// Number of valid broadcast frames received and not dropped. + /// + UINT64 RxBroadcastFrames; + + /// + /// Number of valid mutlicast frames received and not dropped. + /// + UINT64 RxMulticastFrames; + + /// + /// Number of frames w/ CRC or alignment errors. + /// + UINT64 RxCrcErrorFrames; + + /// + /// Total number of bytes received. Includes frames with errors + /// and dropped frames. + // + UINT64 RxTotalBytes; + + /// + /// Transmit statistics. + /// + UINT64 TxTotalFrames; + UINT64 TxGoodFrames; + UINT64 TxUndersizeFrames; + UINT64 TxOversizeFrames; + UINT64 TxDroppedFrames; + UINT64 TxUnicastFrames; + UINT64 TxBroadcastFrames; + UINT64 TxMulticastFrames; + UINT64 TxCrcErrorFrames; + UINT64 TxTotalBytes; + + /// + /// Number of collisions detection on this subnet. + /// + UINT64 Collisions; + + /// + /// Number of frames destined for unsupported protocol. + /// + UINT64 UnsupportedProtocol; + +} EFI_NETWORK_STATISTICS; + +/// +/// The state of the network interface. +/// When an EFI_SIMPLE_NETWORK_PROTOCOL driver initializes a +/// network interface, the network interface is left in the EfiSimpleNetworkStopped state. +/// +typedef enum { + EfiSimpleNetworkStopped, + EfiSimpleNetworkStarted, + EfiSimpleNetworkInitialized, + EfiSimpleNetworkMaxState +} EFI_SIMPLE_NETWORK_STATE; + +#define EFI_SIMPLE_NETWORK_RECEIVE_UNICAST 0x01 +#define EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST 0x02 +#define EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST 0x04 +#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS 0x08 +#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST 0x10 + +#define EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT 0x01 +#define EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT 0x02 +#define EFI_SIMPLE_NETWORK_COMMAND_INTERRUPT 0x04 +#define EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT 0x08 + +#define MAX_MCAST_FILTER_CNT 16 +typedef struct { + /// + /// Reports the current state of the network interface. + /// + UINT32 State; + /// + /// The size, in bytes, of the network interface's HW address. + /// + UINT32 HwAddressSize; + /// + /// The size, in bytes, of the network interface's media header. + /// + UINT32 MediaHeaderSize; + /// + /// The maximum size, in bytes, of the packets supported by the network interface. + /// + UINT32 MaxPacketSize; + /// + /// The size, in bytes, of the NVRAM device attached to the network interface. + /// + UINT32 NvRamSize; + /// + /// The size that must be used for all NVRAM reads and writes. The + /// start address for NVRAM read and write operations and the total + /// length of those operations, must be a multiple of this value. The + /// legal values for this field are 0, 1, 2, 4, and 8. + /// + UINT32 NvRamAccessSize; + /// + /// The multicast receive filter settings supported by the network interface. + /// + UINT32 ReceiveFilterMask; + /// + /// The current multicast receive filter settings. + /// + UINT32 ReceiveFilterSetting; + /// + /// The maximum number of multicast address receive filters supported by the driver. + /// + UINT32 MaxMCastFilterCount; + /// + /// The current number of multicast address receive filters. + /// + UINT32 MCastFilterCount; + /// + /// Array containing the addresses of the current multicast address receive filters. + /// + EFI_MAC_ADDRESS MCastFilter[MAX_MCAST_FILTER_CNT]; + /// + /// The current HW MAC address for the network interface. + /// + EFI_MAC_ADDRESS CurrentAddress; + /// + /// The current HW MAC address for broadcast packets. + /// + EFI_MAC_ADDRESS BroadcastAddress; + /// + /// The permanent HW MAC address for the network interface. + /// + EFI_MAC_ADDRESS PermanentAddress; + /// + /// The interface type of the network interface. + /// + UINT8 IfType; + /// + /// TRUE if the HW MAC address can be changed. + /// + BOOLEAN MacAddressChangeable; + /// + /// TRUE if the network interface can transmit more than one packet at a time. + /// + BOOLEAN MultipleTxSupported; + /// + /// TRUE if the presence of media can be determined; otherwise FALSE. + /// + BOOLEAN MediaPresentSupported; + /// + /// TRUE if media are connected to the network interface; otherwise FALSE. + /// + BOOLEAN MediaPresent; +} EFI_SIMPLE_NETWORK_MODE; + +// +// Protocol Member Functions +// +/** + Changes the state of a network interface from "stopped" to "started". + + @param This Protocol instance pointer. + + @retval EFI_SUCCESS The network interface was started. + @retval EFI_ALREADY_STARTED The network interface is already in the started state. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_START)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This + ); + +/** + Changes the state of a network interface from "started" to "stopped". + + @param This Protocol instance pointer. + + @retval EFI_SUCCESS The network interface was stopped. + @retval EFI_ALREADY_STARTED The network interface is already in the stopped state. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_STOP)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This + ); + +/** + Resets a network adapter and allocates the transmit and receive buffers + required by the network interface; optionally, also requests allocation + of additional transmit and receive buffers. + + @param This The protocol instance pointer. + @param ExtraRxBufferSize The size, in bytes, of the extra receive buffer space + that the driver should allocate for the network interface. + Some network interfaces will not be able to use the extra + buffer, and the caller will not know if it is actually + being used. + @param ExtraTxBufferSize The size, in bytes, of the extra transmit buffer space + that the driver should allocate for the network interface. + Some network interfaces will not be able to use the extra + buffer, and the caller will not know if it is actually + being used. + + @retval EFI_SUCCESS The network interface was initialized. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_OUT_OF_RESOURCES There was not enough memory for the transmit and + receive buffers. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_INITIALIZE)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN UINTN ExtraRxBufferSize OPTIONAL, + IN UINTN ExtraTxBufferSize OPTIONAL + ); + +/** + Resets a network adapter and re-initializes it with the parameters that were + provided in the previous call to Initialize(). + + @param This The protocol instance pointer. + @param ExtendedVerification Indicates that the driver may perform a more + exhaustive verification operation of the device + during reset. + + @retval EFI_SUCCESS The network interface was reset. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_RESET)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN BOOLEAN ExtendedVerification + ); + +/** + Resets a network adapter and leaves it in a state that is safe for + another driver to initialize. + + @param This Protocol instance pointer. + + @retval EFI_SUCCESS The network interface was shutdown. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_SHUTDOWN)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This + ); + +/** + Manages the multicast receive filters of a network interface. + + @param This The protocol instance pointer. + @param Enable A bit mask of receive filters to enable on the network interface. + @param Disable A bit mask of receive filters to disable on the network interface. + @param ResetMCastFilter Set to TRUE to reset the contents of the multicast receive + filters on the network interface to their default values. + @param McastFilterCnt Number of multicast HW MAC addresses in the new + MCastFilter list. This value must be less than or equal to + the MCastFilterCnt field of EFI_SIMPLE_NETWORK_MODE. This + field is optional if ResetMCastFilter is TRUE. + @param MCastFilter A pointer to a list of new multicast receive filter HW MAC + addresses. This list will replace any existing multicast + HW MAC address list. This field is optional if + ResetMCastFilter is TRUE. + + @retval EFI_SUCCESS The multicast receive filter list was updated. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_RECEIVE_FILTERS)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN UINT32 Enable, + IN UINT32 Disable, + IN BOOLEAN ResetMCastFilter, + IN UINTN MCastFilterCnt OPTIONAL, + IN EFI_MAC_ADDRESS *MCastFilter OPTIONAL + ); + +/** + Modifies or resets the current station address, if supported. + + @param This The protocol instance pointer. + @param Reset Flag used to reset the station address to the network interfaces + permanent address. + @param New The new station address to be used for the network interface. + + @retval EFI_SUCCESS The network interfaces station address was updated. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_STATION_ADDRESS)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN BOOLEAN Reset, + IN EFI_MAC_ADDRESS *New OPTIONAL + ); + +/** + Resets or collects the statistics on a network interface. + + @param This Protocol instance pointer. + @param Reset Set to TRUE to reset the statistics for the network interface. + @param StatisticsSize On input the size, in bytes, of StatisticsTable. On + output the size, in bytes, of the resulting table of + statistics. + @param StatisticsTable A pointer to the EFI_NETWORK_STATISTICS structure that + contains the statistics. + + @retval EFI_SUCCESS The statistics were collected from the network interface. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_BUFFER_TOO_SMALL The Statistics buffer was too small. The current buffer + size needed to hold the statistics is returned in + StatisticsSize. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_STATISTICS)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN BOOLEAN Reset, + IN OUT UINTN *StatisticsSize OPTIONAL, + OUT EFI_NETWORK_STATISTICS *StatisticsTable OPTIONAL + ); + +/** + Converts a multicast IP address to a multicast HW MAC address. + + @param This The protocol instance pointer. + @param IPv6 Set to TRUE if the multicast IP address is IPv6 [RFC 2460]. Set + to FALSE if the multicast IP address is IPv4 [RFC 791]. + @param IP The multicast IP address that is to be converted to a multicast + HW MAC address. + @param MAC The multicast HW MAC address that is to be generated from IP. + + @retval EFI_SUCCESS The multicast IP address was mapped to the multicast + HW MAC address. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_BUFFER_TOO_SMALL The Statistics buffer was too small. The current buffer + size needed to hold the statistics is returned in + StatisticsSize. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_MCAST_IP_TO_MAC)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN BOOLEAN IPv6, + IN EFI_IP_ADDRESS *IP, + OUT EFI_MAC_ADDRESS *MAC + ); + +/** + Performs read and write operations on the NVRAM device attached to a + network interface. + + @param This The protocol instance pointer. + @param ReadWrite TRUE for read operations, FALSE for write operations. + @param Offset Byte offset in the NVRAM device at which to start the read or + write operation. This must be a multiple of NvRamAccessSize and + less than NvRamSize. + @param BufferSize The number of bytes to read or write from the NVRAM device. + This must also be a multiple of NvramAccessSize. + @param Buffer A pointer to the data buffer. + + @retval EFI_SUCCESS The NVRAM access was performed. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_NVDATA)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN BOOLEAN ReadWrite, + IN UINTN Offset, + IN UINTN BufferSize, + IN OUT VOID *Buffer + ); + +/** + Reads the current interrupt status and recycled transmit buffer status from + a network interface. + + @param This The protocol instance pointer. + @param InterruptStatus A pointer to the bit mask of the currently active interrupts + If this is NULL, the interrupt status will not be read from + the device. If this is not NULL, the interrupt status will + be read from the device. When the interrupt status is read, + it will also be cleared. Clearing the transmit interrupt + does not empty the recycled transmit buffer array. + @param TxBuf Recycled transmit buffer address. The network interface will + not transmit if its internal recycled transmit buffer array + is full. Reading the transmit buffer does not clear the + transmit interrupt. If this is NULL, then the transmit buffer + status will not be read. If there are no transmit buffers to + recycle and TxBuf is not NULL, * TxBuf will be set to NULL. + + @retval EFI_SUCCESS The status of the network interface was retrieved. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_GET_STATUS)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + OUT UINT32 *InterruptStatus OPTIONAL, + OUT VOID **TxBuf OPTIONAL + ); + +/** + Places a packet in the transmit queue of a network interface. + + @param This The protocol instance pointer. + @param HeaderSize The size, in bytes, of the media header to be filled in by + the Transmit() function. If HeaderSize is non-zero, then it + must be equal to This->Mode->MediaHeaderSize and the DestAddr + and Protocol parameters must not be NULL. + @param BufferSize The size, in bytes, of the entire packet (media header and + data) to be transmitted through the network interface. + @param Buffer A pointer to the packet (media header followed by data) to be + transmitted. This parameter cannot be NULL. If HeaderSize is zero, + then the media header in Buffer must already be filled in by the + caller. If HeaderSize is non-zero, then the media header will be + filled in by the Transmit() function. + @param SrcAddr The source HW MAC address. If HeaderSize is zero, then this parameter + is ignored. If HeaderSize is non-zero and SrcAddr is NULL, then + This->Mode->CurrentAddress is used for the source HW MAC address. + @param DestAddr The destination HW MAC address. If HeaderSize is zero, then this + parameter is ignored. + @param Protocol The type of header to build. If HeaderSize is zero, then this + parameter is ignored. See RFC 1700, section "Ether Types", for + examples. + + @retval EFI_SUCCESS The packet was placed on the transmit queue. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_NOT_READY The network interface is too busy to accept this transmit request. + @retval EFI_BUFFER_TOO_SMALL The BufferSize parameter is too small. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_TRANSMIT)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + IN UINTN HeaderSize, + IN UINTN BufferSize, + IN VOID *Buffer, + IN EFI_MAC_ADDRESS *SrcAddr OPTIONAL, + IN EFI_MAC_ADDRESS *DestAddr OPTIONAL, + IN UINT16 *Protocol OPTIONAL + ); + +/** + Receives a packet from a network interface. + + @param This The protocol instance pointer. + @param HeaderSize The size, in bytes, of the media header received on the network + interface. If this parameter is NULL, then the media header size + will not be returned. + @param BufferSize On entry, the size, in bytes, of Buffer. On exit, the size, in + bytes, of the packet that was received on the network interface. + @param Buffer A pointer to the data buffer to receive both the media header and + the data. + @param SrcAddr The source HW MAC address. If this parameter is NULL, the + HW MAC source address will not be extracted from the media + header. + @param DestAddr The destination HW MAC address. If this parameter is NULL, + the HW MAC destination address will not be extracted from the + media header. + @param Protocol The media header type. If this parameter is NULL, then the + protocol will not be extracted from the media header. See + RFC 1700 section "Ether Types" for examples. + + @retval EFI_SUCCESS The received data was stored in Buffer, and BufferSize has + been updated to the number of bytes received. + @retval EFI_NOT_STARTED The network interface has not been started. + @retval EFI_NOT_READY The network interface is too busy to accept this transmit + request. + @retval EFI_BUFFER_TOO_SMALL The BufferSize parameter is too small. + @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value. + @retval EFI_DEVICE_ERROR The command could not be sent to the network interface. + @retval EFI_UNSUPPORTED This function is not supported by the network interface. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIMPLE_NETWORK_RECEIVE)( + IN EFI_SIMPLE_NETWORK_PROTOCOL *This, + OUT UINTN *HeaderSize OPTIONAL, + IN OUT UINTN *BufferSize, + OUT VOID *Buffer, + OUT EFI_MAC_ADDRESS *SrcAddr OPTIONAL, + OUT EFI_MAC_ADDRESS *DestAddr OPTIONAL, + OUT UINT16 *Protocol OPTIONAL + ); + +#define EFI_SIMPLE_NETWORK_PROTOCOL_REVISION 0x00010000 + +// +// Revision defined in EFI1.1 +// +#define EFI_SIMPLE_NETWORK_INTERFACE_REVISION EFI_SIMPLE_NETWORK_PROTOCOL_REVISION + +/// +/// The EFI_SIMPLE_NETWORK_PROTOCOL protocol is used to initialize access +/// to a network adapter. Once the network adapter initializes, +/// the EFI_SIMPLE_NETWORK_PROTOCOL protocol provides services that +/// allow packets to be transmitted and received. +/// +struct _EFI_SIMPLE_NETWORK_PROTOCOL { + /// + /// Revision of the EFI_SIMPLE_NETWORK_PROTOCOL. All future revisions must + /// be backwards compatible. If a future version is not backwards compatible + /// it is not the same GUID. + /// + UINT64 Revision; + EFI_SIMPLE_NETWORK_START Start; + EFI_SIMPLE_NETWORK_STOP Stop; + EFI_SIMPLE_NETWORK_INITIALIZE Initialize; + EFI_SIMPLE_NETWORK_RESET Reset; + EFI_SIMPLE_NETWORK_SHUTDOWN Shutdown; + EFI_SIMPLE_NETWORK_RECEIVE_FILTERS ReceiveFilters; + EFI_SIMPLE_NETWORK_STATION_ADDRESS StationAddress; + EFI_SIMPLE_NETWORK_STATISTICS Statistics; + EFI_SIMPLE_NETWORK_MCAST_IP_TO_MAC MCastIpToMac; + EFI_SIMPLE_NETWORK_NVDATA NvData; + EFI_SIMPLE_NETWORK_GET_STATUS GetStatus; + EFI_SIMPLE_NETWORK_TRANSMIT Transmit; + EFI_SIMPLE_NETWORK_RECEIVE Receive; + /// + /// Event used with WaitForEvent() to wait for a packet to be received. + /// + EFI_EVENT WaitForPacket; + /// + /// Pointer to the EFI_SIMPLE_NETWORK_MODE data for the device. + /// + EFI_SIMPLE_NETWORK_MODE *Mode; +}; + +extern EFI_GUID gEfiSimpleNetworkProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextIn.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextIn.h new file mode 100644 index 000000000..571ecaf30 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextIn.h @@ -0,0 +1,136 @@ +/** @file + Simple Text Input protocol from the UEFI 2.0 specification. + + Abstraction of a very simple input device like a keyboard or serial + terminal. + + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __SIMPLE_TEXT_IN_PROTOCOL_H__ +#define __SIMPLE_TEXT_IN_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID \ + { \ + 0x387477c1, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +typedef struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL; + +/// +/// Protocol GUID name defined in EFI1.1. +/// +#define SIMPLE_INPUT_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID + +/// +/// Protocol name in EFI1.1 for backward-compatible. +/// +typedef struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL SIMPLE_INPUT_INTERFACE; + +/// +/// The keystroke information for the key that was pressed. +/// +typedef struct { + UINT16 ScanCode; + CHAR16 UnicodeChar; +} EFI_INPUT_KEY; + +// +// Required unicode control chars +// +#define CHAR_NULL 0x0000 +#define CHAR_BACKSPACE 0x0008 +#define CHAR_TAB 0x0009 +#define CHAR_LINEFEED 0x000A +#define CHAR_CARRIAGE_RETURN 0x000D + +// +// EFI Scan codes +// +#define SCAN_NULL 0x0000 +#define SCAN_UP 0x0001 +#define SCAN_DOWN 0x0002 +#define SCAN_RIGHT 0x0003 +#define SCAN_LEFT 0x0004 +#define SCAN_HOME 0x0005 +#define SCAN_END 0x0006 +#define SCAN_INSERT 0x0007 +#define SCAN_DELETE 0x0008 +#define SCAN_PAGE_UP 0x0009 +#define SCAN_PAGE_DOWN 0x000A +#define SCAN_F1 0x000B +#define SCAN_F2 0x000C +#define SCAN_F3 0x000D +#define SCAN_F4 0x000E +#define SCAN_F5 0x000F +#define SCAN_F6 0x0010 +#define SCAN_F7 0x0011 +#define SCAN_F8 0x0012 +#define SCAN_F9 0x0013 +#define SCAN_F10 0x0014 +#define SCAN_ESC 0x0017 + +/** + Reset the input device and optionally run diagnostics + + @param This Protocol instance pointer. + @param ExtendedVerification Driver may perform diagnostics on reset. + + @retval EFI_SUCCESS The device was reset. + @retval EFI_DEVICE_ERROR The device is not functioning properly and could not be reset. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INPUT_RESET)( + IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This, + IN BOOLEAN ExtendedVerification + ); + +/** + Reads the next keystroke from the input device. The WaitForKey Event can + be used to test for existence of a keystroke via WaitForEvent () call. + + @param This Protocol instance pointer. + @param Key A pointer to a buffer that is filled in with the keystroke + information for the key that was pressed. + + @retval EFI_SUCCESS The keystroke information was returned. + @retval EFI_NOT_READY There was no keystroke data available. + @retval EFI_DEVICE_ERROR The keystroke information was not returned due to + hardware errors. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INPUT_READ_KEY)( + IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This, + OUT EFI_INPUT_KEY *Key + ); + +/// +/// The EFI_SIMPLE_TEXT_INPUT_PROTOCOL is used on the ConsoleIn device. +/// It is the minimum required protocol for ConsoleIn. +/// +struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL { + EFI_INPUT_RESET Reset; + EFI_INPUT_READ_KEY ReadKeyStroke; + /// + /// Event to use with WaitForEvent() to wait for a key to be available + /// + EFI_EVENT WaitForKey; +}; + +extern EFI_GUID gEfiSimpleTextInProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextInEx.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextInEx.h new file mode 100644 index 000000000..9a9f5ab59 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextInEx.h @@ -0,0 +1,327 @@ +/** @file + Simple Text Input Ex protocol from the UEFI 2.0 specification. + + This protocol defines an extension to the EFI_SIMPLE_TEXT_INPUT_PROTOCOL + which exposes much more state and modifier information from the input device, + also allows one to register a notification for a particular keystroke. + + Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __SIMPLE_TEXT_IN_EX_H__ +#define __SIMPLE_TEXT_IN_EX_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/SimpleTextIn.h> + +#define EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL_GUID \ + {0xdd9e7534, 0x7762, 0x4698, { 0x8c, 0x14, 0xf5, 0x85, 0x17, 0xa6, 0x25, 0xaa } } + + +typedef struct _EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL; + +/** + The Reset() function resets the input device hardware. As part + of initialization process, the firmware/device will make a quick + but reasonable attempt to verify that the device is functioning. + If the ExtendedVerification flag is TRUE the firmware may take + an extended amount of time to verify the device is operating on + reset. Otherwise the reset operation is to occur as quickly as + possible. The hardware verification process is not defined by + this specification and is left up to the platform firmware or + driver to implement. + + @param This A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance. + + @param ExtendedVerification Indicates that the driver may + perform a more exhaustive + verification operation of the + device during reset. + + + @retval EFI_SUCCESS The device was reset. + + @retval EFI_DEVICE_ERROR The device is not functioning + correctly and could not be reset. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INPUT_RESET_EX)( + IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This, + IN BOOLEAN ExtendedVerification +); + + +/// +/// EFI_KEY_TOGGLE_STATE. The toggle states are defined. +/// They are: EFI_TOGGLE_STATE_VALID, EFI_SCROLL_LOCK_ACTIVE +/// EFI_NUM_LOCK_ACTIVE, EFI_CAPS_LOCK_ACTIVE +/// +typedef UINT8 EFI_KEY_TOGGLE_STATE; + +typedef struct _EFI_KEY_STATE { + /// + /// Reflects the currently pressed shift + /// modifiers for the input device. The + /// returned value is valid only if the high + /// order bit has been set. + /// + UINT32 KeyShiftState; + /// + /// Reflects the current internal state of + /// various toggled attributes. The returned + /// value is valid only if the high order + /// bit has been set. + /// + EFI_KEY_TOGGLE_STATE KeyToggleState; +} EFI_KEY_STATE; + +typedef struct { + /// + /// The EFI scan code and Unicode value returned from the input device. + /// + EFI_INPUT_KEY Key; + /// + /// The current state of various toggled attributes as well as input modifier values. + /// + EFI_KEY_STATE KeyState; +} EFI_KEY_DATA; + +// +// Any Shift or Toggle State that is valid should have +// high order bit set. +// +// Shift state +// +#define EFI_SHIFT_STATE_VALID 0x80000000 +#define EFI_RIGHT_SHIFT_PRESSED 0x00000001 +#define EFI_LEFT_SHIFT_PRESSED 0x00000002 +#define EFI_RIGHT_CONTROL_PRESSED 0x00000004 +#define EFI_LEFT_CONTROL_PRESSED 0x00000008 +#define EFI_RIGHT_ALT_PRESSED 0x00000010 +#define EFI_LEFT_ALT_PRESSED 0x00000020 +#define EFI_RIGHT_LOGO_PRESSED 0x00000040 +#define EFI_LEFT_LOGO_PRESSED 0x00000080 +#define EFI_MENU_KEY_PRESSED 0x00000100 +#define EFI_SYS_REQ_PRESSED 0x00000200 + +// +// Toggle state +// +#define EFI_TOGGLE_STATE_VALID 0x80 +#define EFI_KEY_STATE_EXPOSED 0x40 +#define EFI_SCROLL_LOCK_ACTIVE 0x01 +#define EFI_NUM_LOCK_ACTIVE 0x02 +#define EFI_CAPS_LOCK_ACTIVE 0x04 + +// +// EFI Scan codes +// +#define SCAN_F11 0x0015 +#define SCAN_F12 0x0016 +#define SCAN_PAUSE 0x0048 +#define SCAN_F13 0x0068 +#define SCAN_F14 0x0069 +#define SCAN_F15 0x006A +#define SCAN_F16 0x006B +#define SCAN_F17 0x006C +#define SCAN_F18 0x006D +#define SCAN_F19 0x006E +#define SCAN_F20 0x006F +#define SCAN_F21 0x0070 +#define SCAN_F22 0x0071 +#define SCAN_F23 0x0072 +#define SCAN_F24 0x0073 +#define SCAN_MUTE 0x007F +#define SCAN_VOLUME_UP 0x0080 +#define SCAN_VOLUME_DOWN 0x0081 +#define SCAN_BRIGHTNESS_UP 0x0100 +#define SCAN_BRIGHTNESS_DOWN 0x0101 +#define SCAN_SUSPEND 0x0102 +#define SCAN_HIBERNATE 0x0103 +#define SCAN_TOGGLE_DISPLAY 0x0104 +#define SCAN_RECOVERY 0x0105 +#define SCAN_EJECT 0x0106 + +/** + The function reads the next keystroke from the input device. If + there is no pending keystroke the function returns + EFI_NOT_READY. If there is a pending keystroke, then + KeyData.Key.ScanCode is the EFI scan code defined in Error! + Reference source not found. The KeyData.Key.UnicodeChar is the + actual printable character or is zero if the key does not + represent a printable character (control key, function key, + etc.). The KeyData.KeyState is shift state for the character + reflected in KeyData.Key.UnicodeChar or KeyData.Key.ScanCode . + When interpreting the data from this function, it should be + noted that if a class of printable characters that are + normally adjusted by shift modifiers (e.g. Shift Key + "f" + key) would be presented solely as a KeyData.Key.UnicodeChar + without the associated shift state. So in the previous example + of a Shift Key + "f" key being pressed, the only pertinent + data returned would be KeyData.Key.UnicodeChar with the value + of "F". This of course would not typically be the case for + non-printable characters such as the pressing of the Right + Shift Key + F10 key since the corresponding returned data + would be reflected both in the KeyData.KeyState.KeyShiftState + and KeyData.Key.ScanCode values. UEFI drivers which implement + the EFI_SIMPLE_TEXT_INPUT_EX protocol are required to return + KeyData.Key and KeyData.KeyState values. These drivers must + always return the most current state of + KeyData.KeyState.KeyShiftState and + KeyData.KeyState.KeyToggleState. It should also be noted that + certain input devices may not be able to produce shift or toggle + state information, and in those cases the high order bit in the + respective Toggle and Shift state fields should not be active. + + + @param This A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance. + + @param KeyData A pointer to a buffer that is filled in with + the keystroke state data for the key that was + pressed. + + + @retval EFI_SUCCESS The keystroke information was + returned. + + @retval EFI_NOT_READY There was no keystroke data available. + EFI_DEVICE_ERROR The keystroke + information was not returned due to + hardware errors. + + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INPUT_READ_KEY_EX)( + IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This, + OUT EFI_KEY_DATA *KeyData +); + +/** + The SetState() function allows the input device hardware to + have state settings adjusted. + + @param This A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance. + + @param KeyToggleState Pointer to the EFI_KEY_TOGGLE_STATE to + set the state for the input device. + + + @retval EFI_SUCCESS The device state was set appropriately. + + @retval EFI_DEVICE_ERROR The device is not functioning + correctly and could not have the + setting adjusted. + + @retval EFI_UNSUPPORTED The device does not support the + ability to have its state set. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_STATE)( + IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This, + IN EFI_KEY_TOGGLE_STATE *KeyToggleState +); + +/// +/// The function will be called when the key sequence is typed specified by KeyData. +/// +typedef +EFI_STATUS +(EFIAPI *EFI_KEY_NOTIFY_FUNCTION)( + IN EFI_KEY_DATA *KeyData +); + +/** + The RegisterKeystrokeNotify() function registers a function + which will be called when a specified keystroke will occur. + + @param This A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance. + + @param KeyData A pointer to a buffer that is filled in with + the keystroke information for the key that was + pressed. + + @param KeyNotificationFunction Points to the function to be + called when the key sequence + is typed specified by KeyData. + + + @param NotifyHandle Points to the unique handle assigned to + the registered notification. + + @retval EFI_SUCCESS The device state was set + appropriately. + + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary + data structures. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_REGISTER_KEYSTROKE_NOTIFY)( + IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This, + IN EFI_KEY_DATA *KeyData, + IN EFI_KEY_NOTIFY_FUNCTION KeyNotificationFunction, + OUT VOID **NotifyHandle +); + +/** + The UnregisterKeystrokeNotify() function removes the + notification which was previously registered. + + @param This A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance. + + @param NotificationHandle The handle of the notification + function being unregistered. + + @retval EFI_SUCCESS The device state was set appropriately. + + @retval EFI_INVALID_PARAMETER The NotificationHandle is + invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UNREGISTER_KEYSTROKE_NOTIFY)( + IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This, + IN VOID *NotificationHandle +); + + +/// +/// The EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL is used on the ConsoleIn +/// device. It is an extension to the Simple Text Input protocol +/// which allows a variety of extended shift state information to be +/// returned. +/// +struct _EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL{ + EFI_INPUT_RESET_EX Reset; + EFI_INPUT_READ_KEY_EX ReadKeyStrokeEx; + /// + /// Event to use with WaitForEvent() to wait for a key to be available. + /// + EFI_EVENT WaitForKeyEx; + EFI_SET_STATE SetState; + EFI_REGISTER_KEYSTROKE_NOTIFY RegisterKeyNotify; + EFI_UNREGISTER_KEYSTROKE_NOTIFY UnregisterKeyNotify; +}; + + +extern EFI_GUID gEfiSimpleTextInputExProtocolGuid; + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextOut.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextOut.h new file mode 100644 index 000000000..a79cf431c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/SimpleTextOut.h @@ -0,0 +1,406 @@ +/** @file + Simple Text Out protocol from the UEFI 2.0 specification. + + Abstraction of a very simple text based output device like VGA text mode or + a serial terminal. The Simple Text Out protocol instance can represent + a single hardware device or a virtual device that is an aggregation + of multiple physical devices. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __SIMPLE_TEXT_OUT_H__ +#define __SIMPLE_TEXT_OUT_H__ + +FILE_LICENCE ( BSD3 ); + +#define EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID \ + { \ + 0x387477c2, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ + } + +/// +/// Protocol GUID defined in EFI1.1. +/// +#define SIMPLE_TEXT_OUTPUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID + +typedef struct _EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL; + +/// +/// Backward-compatible with EFI1.1. +/// +typedef EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL SIMPLE_TEXT_OUTPUT_INTERFACE; + +// +// Define's for required EFI Unicode Box Draw characters +// +#define BOXDRAW_HORIZONTAL 0x2500 +#define BOXDRAW_VERTICAL 0x2502 +#define BOXDRAW_DOWN_RIGHT 0x250c +#define BOXDRAW_DOWN_LEFT 0x2510 +#define BOXDRAW_UP_RIGHT 0x2514 +#define BOXDRAW_UP_LEFT 0x2518 +#define BOXDRAW_VERTICAL_RIGHT 0x251c +#define BOXDRAW_VERTICAL_LEFT 0x2524 +#define BOXDRAW_DOWN_HORIZONTAL 0x252c +#define BOXDRAW_UP_HORIZONTAL 0x2534 +#define BOXDRAW_VERTICAL_HORIZONTAL 0x253c +#define BOXDRAW_DOUBLE_HORIZONTAL 0x2550 +#define BOXDRAW_DOUBLE_VERTICAL 0x2551 +#define BOXDRAW_DOWN_RIGHT_DOUBLE 0x2552 +#define BOXDRAW_DOWN_DOUBLE_RIGHT 0x2553 +#define BOXDRAW_DOUBLE_DOWN_RIGHT 0x2554 +#define BOXDRAW_DOWN_LEFT_DOUBLE 0x2555 +#define BOXDRAW_DOWN_DOUBLE_LEFT 0x2556 +#define BOXDRAW_DOUBLE_DOWN_LEFT 0x2557 +#define BOXDRAW_UP_RIGHT_DOUBLE 0x2558 +#define BOXDRAW_UP_DOUBLE_RIGHT 0x2559 +#define BOXDRAW_DOUBLE_UP_RIGHT 0x255a +#define BOXDRAW_UP_LEFT_DOUBLE 0x255b +#define BOXDRAW_UP_DOUBLE_LEFT 0x255c +#define BOXDRAW_DOUBLE_UP_LEFT 0x255d +#define BOXDRAW_VERTICAL_RIGHT_DOUBLE 0x255e +#define BOXDRAW_VERTICAL_DOUBLE_RIGHT 0x255f +#define BOXDRAW_DOUBLE_VERTICAL_RIGHT 0x2560 +#define BOXDRAW_VERTICAL_LEFT_DOUBLE 0x2561 +#define BOXDRAW_VERTICAL_DOUBLE_LEFT 0x2562 +#define BOXDRAW_DOUBLE_VERTICAL_LEFT 0x2563 +#define BOXDRAW_DOWN_HORIZONTAL_DOUBLE 0x2564 +#define BOXDRAW_DOWN_DOUBLE_HORIZONTAL 0x2565 +#define BOXDRAW_DOUBLE_DOWN_HORIZONTAL 0x2566 +#define BOXDRAW_UP_HORIZONTAL_DOUBLE 0x2567 +#define BOXDRAW_UP_DOUBLE_HORIZONTAL 0x2568 +#define BOXDRAW_DOUBLE_UP_HORIZONTAL 0x2569 +#define BOXDRAW_VERTICAL_HORIZONTAL_DOUBLE 0x256a +#define BOXDRAW_VERTICAL_DOUBLE_HORIZONTAL 0x256b +#define BOXDRAW_DOUBLE_VERTICAL_HORIZONTAL 0x256c + +// +// EFI Required Block Elements Code Chart +// +#define BLOCKELEMENT_FULL_BLOCK 0x2588 +#define BLOCKELEMENT_LIGHT_SHADE 0x2591 + +// +// EFI Required Geometric Shapes Code Chart +// +#define GEOMETRICSHAPE_UP_TRIANGLE 0x25b2 +#define GEOMETRICSHAPE_RIGHT_TRIANGLE 0x25ba +#define GEOMETRICSHAPE_DOWN_TRIANGLE 0x25bc +#define GEOMETRICSHAPE_LEFT_TRIANGLE 0x25c4 + +// +// EFI Required Arrow shapes +// +#define ARROW_LEFT 0x2190 +#define ARROW_UP 0x2191 +#define ARROW_RIGHT 0x2192 +#define ARROW_DOWN 0x2193 + +// +// EFI Console Colours +// +#define EFI_BLACK 0x00 +#define EFI_BLUE 0x01 +#define EFI_GREEN 0x02 +#define EFI_CYAN (EFI_BLUE | EFI_GREEN) +#define EFI_RED 0x04 +#define EFI_MAGENTA (EFI_BLUE | EFI_RED) +#define EFI_BROWN (EFI_GREEN | EFI_RED) +#define EFI_LIGHTGRAY (EFI_BLUE | EFI_GREEN | EFI_RED) +#define EFI_BRIGHT 0x08 +#define EFI_DARKGRAY (EFI_BRIGHT) +#define EFI_LIGHTBLUE (EFI_BLUE | EFI_BRIGHT) +#define EFI_LIGHTGREEN (EFI_GREEN | EFI_BRIGHT) +#define EFI_LIGHTCYAN (EFI_CYAN | EFI_BRIGHT) +#define EFI_LIGHTRED (EFI_RED | EFI_BRIGHT) +#define EFI_LIGHTMAGENTA (EFI_MAGENTA | EFI_BRIGHT) +#define EFI_YELLOW (EFI_BROWN | EFI_BRIGHT) +#define EFI_WHITE (EFI_BLUE | EFI_GREEN | EFI_RED | EFI_BRIGHT) + +#define EFI_TEXT_ATTR(f, b) ((f) | ((b) << 4)) + +#define EFI_BACKGROUND_BLACK 0x00 +#define EFI_BACKGROUND_BLUE 0x10 +#define EFI_BACKGROUND_GREEN 0x20 +#define EFI_BACKGROUND_CYAN (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_GREEN) +#define EFI_BACKGROUND_RED 0x40 +#define EFI_BACKGROUND_MAGENTA (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_RED) +#define EFI_BACKGROUND_BROWN (EFI_BACKGROUND_GREEN | EFI_BACKGROUND_RED) +#define EFI_BACKGROUND_LIGHTGRAY (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_GREEN | EFI_BACKGROUND_RED) + +// +// We currently define attributes from 0 - 7F for color manipulations +// To internally handle the local display characteristics for a particular character, +// Bit 7 signifies the local glyph representation for a character. If turned on, glyphs will be +// pulled from the wide glyph database and will display locally as a wide character (16 X 19 versus 8 X 19) +// If bit 7 is off, the narrow glyph database will be used. This does NOT affect information that is sent to +// non-local displays, such as serial or LAN consoles. +// +#define EFI_WIDE_ATTRIBUTE 0x80 + +/** + Reset the text output device hardware and optionaly run diagnostics + + @param This The protocol instance pointer. + @param ExtendedVerification Driver may perform more exhaustive verfication + operation of the device during reset. + + @retval EFI_SUCCESS The text output device was reset. + @retval EFI_DEVICE_ERROR The text output device is not functioning correctly and + could not be reset. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_RESET)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN BOOLEAN ExtendedVerification + ); + +/** + Write a string to the output device. + + @param This The protocol instance pointer. + @param String The NULL-terminated string to be displayed on the output + device(s). All output devices must also support the Unicode + drawing character codes defined in this file. + + @retval EFI_SUCCESS The string was output to the device. + @retval EFI_DEVICE_ERROR The device reported an error while attempting to output + the text. + @retval EFI_UNSUPPORTED The output device's mode is not currently in a + defined text mode. + @retval EFI_WARN_UNKNOWN_GLYPH This warning code indicates that some of the + characters in the string could not be + rendered and were skipped. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_STRING)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *String + ); + +/** + Verifies that all characters in a string can be output to the + target device. + + @param This The protocol instance pointer. + @param String The NULL-terminated string to be examined for the output + device(s). + + @retval EFI_SUCCESS The device(s) are capable of rendering the output string. + @retval EFI_UNSUPPORTED Some of the characters in the string cannot be + rendered by one or more of the output devices mapped + by the EFI handle. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_TEST_STRING)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *String + ); + +/** + Returns information for an available text mode that the output device(s) + supports. + + @param This The protocol instance pointer. + @param ModeNumber The mode number to return information on. + @param Columns Returns the geometry of the text output device for the + requested ModeNumber. + @param Rows Returns the geometry of the text output device for the + requested ModeNumber. + + @retval EFI_SUCCESS The requested mode information was returned. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The mode number was not valid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_QUERY_MODE)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN ModeNumber, + OUT UINTN *Columns, + OUT UINTN *Rows + ); + +/** + Sets the output device(s) to a specified mode. + + @param This The protocol instance pointer. + @param ModeNumber The mode number to set. + + @retval EFI_SUCCESS The requested text mode was set. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The mode number was not valid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_SET_MODE)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN ModeNumber + ); + +/** + Sets the background and foreground colors for the OutputString () and + ClearScreen () functions. + + @param This The protocol instance pointer. + @param Attribute The attribute to set. Bits 0..3 are the foreground color, and + bits 4..6 are the background color. All other bits are undefined + and must be zero. The valid Attributes are defined in this file. + + @retval EFI_SUCCESS The attribute was set. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The attribute requested is not defined. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_SET_ATTRIBUTE)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN Attribute + ); + +/** + Clears the output device(s) display to the currently selected background + color. + + @param This The protocol instance pointer. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The output device is not in a valid text mode. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_CLEAR_SCREEN)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This + ); + +/** + Sets the current coordinates of the cursor position + + @param This The protocol instance pointer. + @param Column The position to set the cursor to. Must be greater than or + equal to zero and less than the number of columns and rows + by QueryMode (). + @param Row The position to set the cursor to. Must be greater than or + equal to zero and less than the number of columns and rows + by QueryMode (). + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The output device is not in a valid text mode, or the + cursor position is invalid for the current mode. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_SET_CURSOR_POSITION)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN Column, + IN UINTN Row + ); + +/** + Makes the cursor visible or invisible + + @param This The protocol instance pointer. + @param Visible If TRUE, the cursor is set to be visible. If FALSE, the cursor is + set to be invisible. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the + request, or the device does not support changing + the cursor mode. + @retval EFI_UNSUPPORTED The output device is not in a valid text mode. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TEXT_ENABLE_CURSOR)( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN BOOLEAN Visible + ); + +/** + @par Data Structure Description: + Mode Structure pointed to by Simple Text Out protocol. +**/ +typedef struct { + /// + /// The number of modes supported by QueryMode () and SetMode (). + /// + INT32 MaxMode; + + // + // current settings + // + + /// + /// The text mode of the output device(s). + /// + INT32 Mode; + /// + /// The current character output attribute. + /// + INT32 Attribute; + /// + /// The cursor's column. + /// + INT32 CursorColumn; + /// + /// The cursor's row. + /// + INT32 CursorRow; + /// + /// The cursor is currently visbile or not. + /// + BOOLEAN CursorVisible; +} EFI_SIMPLE_TEXT_OUTPUT_MODE; + +/// +/// The SIMPLE_TEXT_OUTPUT protocol is used to control text-based output devices. +/// It is the minimum required protocol for any handle supplied as the ConsoleOut +/// or StandardError device. In addition, the minimum supported text mode of such +/// devices is at least 80 x 25 characters. +/// +struct _EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL { + EFI_TEXT_RESET Reset; + + EFI_TEXT_STRING OutputString; + EFI_TEXT_TEST_STRING TestString; + + EFI_TEXT_QUERY_MODE QueryMode; + EFI_TEXT_SET_MODE SetMode; + EFI_TEXT_SET_ATTRIBUTE SetAttribute; + + EFI_TEXT_CLEAR_SCREEN ClearScreen; + EFI_TEXT_SET_CURSOR_POSITION SetCursorPosition; + EFI_TEXT_ENABLE_CURSOR EnableCursor; + + /// + /// Pointer to SIMPLE_TEXT_OUTPUT_MODE data. + /// + EFI_SIMPLE_TEXT_OUTPUT_MODE *Mode; +}; + +extern EFI_GUID gEfiSimpleTextOutProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/TcgService.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/TcgService.h new file mode 100644 index 000000000..1068448f0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/TcgService.h @@ -0,0 +1,209 @@ +/** @file + TCG Service Protocol as defined in TCG_EFI_Protocol_1_20_Final + See http://trustedcomputinggroup.org for the latest specification + +Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _TCG_SERVICE_PROTOCOL_H_ +#define _TCG_SERVICE_PROTOCOL_H_ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/IndustryStandard/UefiTcgPlatform.h> + +#define EFI_TCG_PROTOCOL_GUID \ + {0xf541796d, 0xa62e, 0x4954, { 0xa7, 0x75, 0x95, 0x84, 0xf6, 0x1b, 0x9c, 0xdd } } + +typedef struct _EFI_TCG_PROTOCOL EFI_TCG_PROTOCOL; + +typedef struct { + UINT8 Major; + UINT8 Minor; + UINT8 RevMajor; + UINT8 RevMinor; +} TCG_VERSION; + +typedef struct _TCG_EFI_BOOT_SERVICE_CAPABILITY { + UINT8 Size; /// Size of this structure. + TCG_VERSION StructureVersion; + TCG_VERSION ProtocolSpecVersion; + UINT8 HashAlgorithmBitmap; /// Hash algorithms . + /// This protocol is capable of : 01=SHA-1. + BOOLEAN TPMPresentFlag; /// 00h = TPM not present. + BOOLEAN TPMDeactivatedFlag; /// 01h = TPM currently deactivated. +} TCG_EFI_BOOT_SERVICE_CAPABILITY; + +typedef UINT32 TCG_ALGORITHM_ID; + +/// +/// Note: +/// Status codes returned for functions of EFI_TCG_PROTOCOL do not exactly match +/// those defined in the TCG EFI Protocol 1.20 Final Specification. +/// + +/** + This service provides EFI protocol capability information, state information + about the TPM, and Event Log state information. + + @param This Indicates the calling context + @param ProtocolCapability The callee allocates memory for a TCG_BOOT_SERVICE_CAPABILITY + structure and fills in the fields with the EFI protocol + capability information and the current TPM state information. + @param TCGFeatureFlags This is a pointer to the feature flags. No feature + flags are currently defined so this parameter + MUST be set to 0. However, in the future, + feature flags may be defined that, for example, + enable hash algorithm agility. + @param EventLogLocation This is a pointer to the address of the event log in memory. + @param EventLogLastEntry If the Event Log contains more than one entry, + this is a pointer to the address of the start of + the last entry in the event log in memory. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER ProtocolCapability does not match TCG capability. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCG_STATUS_CHECK)( + IN EFI_TCG_PROTOCOL *This, + OUT TCG_EFI_BOOT_SERVICE_CAPABILITY + *ProtocolCapability, + OUT UINT32 *TCGFeatureFlags, + OUT EFI_PHYSICAL_ADDRESS *EventLogLocation, + OUT EFI_PHYSICAL_ADDRESS *EventLogLastEntry + ); + +/** + This service abstracts the capability to do a hash operation on a data buffer. + + @param This Indicates the calling context. + @param HashData The pointer to the data buffer to be hashed. + @param HashDataLen The length of the data buffer to be hashed. + @param AlgorithmId Identification of the Algorithm to use for the hashing operation. + @param HashedDataLen Resultant length of the hashed data. + @param HashedDataResult Resultant buffer of the hashed data. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER HashDataLen is NULL. + @retval EFI_INVALID_PARAMETER HashDataLenResult is NULL. + @retval EFI_OUT_OF_RESOURCES Cannot allocate buffer of size *HashedDataLen. + @retval EFI_UNSUPPORTED AlgorithmId not supported. + @retval EFI_BUFFER_TOO_SMALL *HashedDataLen < sizeof (TCG_DIGEST). +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCG_HASH_ALL)( + IN EFI_TCG_PROTOCOL *This, + IN UINT8 *HashData, + IN UINT64 HashDataLen, + IN TCG_ALGORITHM_ID AlgorithmId, + IN OUT UINT64 *HashedDataLen, + IN OUT UINT8 **HashedDataResult + ); + +/** + This service abstracts the capability to add an entry to the Event Log. + + @param This Indicates the calling context + @param TCGLogData The pointer to the start of the data buffer containing + the TCG_PCR_EVENT data structure. All fields in + this structure are properly filled by the caller. + @param EventNumber The event number of the event just logged. + @param Flags Indicates additional flags. Only one flag has been + defined at this time, which is 0x01 and means the + extend operation should not be performed. All + other bits are reserved. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_OUT_OF_RESOURCES Insufficient memory in the event log to complete this action. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCG_LOG_EVENT)( + IN EFI_TCG_PROTOCOL *This, + IN TCG_PCR_EVENT *TCGLogData, + IN OUT UINT32 *EventNumber, + IN UINT32 Flags + ); + +/** + This service is a proxy for commands to the TPM. + + @param This Indicates the calling context. + @param TpmInputParameterBlockSize Size of the TPM input parameter block. + @param TpmInputParameterBlock The pointer to the TPM input parameter block. + @param TpmOutputParameterBlockSize Size of the TPM output parameter block. + @param TpmOutputParameterBlock The pointer to the TPM output parameter block. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER Invalid ordinal. + @retval EFI_UNSUPPORTED Current Task Priority Level >= EFI_TPL_CALLBACK. + @retval EFI_TIMEOUT The TIS timed-out. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCG_PASS_THROUGH_TO_TPM)( + IN EFI_TCG_PROTOCOL *This, + IN UINT32 TpmInputParameterBlockSize, + IN UINT8 *TpmInputParameterBlock, + IN UINT32 TpmOutputParameterBlockSize, + IN UINT8 *TpmOutputParameterBlock + ); + +/** + This service abstracts the capability to do a hash operation on a data buffer, extend a specific TPM PCR with the hash result, and add an entry to the Event Log + + @param This Indicates the calling context + @param HashData The physical address of the start of the data buffer + to be hashed, extended, and logged. + @param HashDataLen The length, in bytes, of the buffer referenced by HashData + @param AlgorithmId Identification of the Algorithm to use for the hashing operation + @param TCGLogData The physical address of the start of the data + buffer containing the TCG_PCR_EVENT data structure. + @param EventNumber The event number of the event just logged. + @param EventLogLastEntry The physical address of the first byte of the entry + just placed in the Event Log. If the Event Log was + empty when this function was called then this physical + address will be the same as the physical address of + the start of the Event Log. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_UNSUPPORTED AlgorithmId != TPM_ALG_SHA. + @retval EFI_UNSUPPORTED Current TPL >= EFI_TPL_CALLBACK. + @retval EFI_DEVICE_ERROR The command was unsuccessful. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCG_HASH_LOG_EXTEND_EVENT)( + IN EFI_TCG_PROTOCOL *This, + IN EFI_PHYSICAL_ADDRESS HashData, + IN UINT64 HashDataLen, + IN TCG_ALGORITHM_ID AlgorithmId, + IN OUT TCG_PCR_EVENT *TCGLogData, + IN OUT UINT32 *EventNumber, + OUT EFI_PHYSICAL_ADDRESS *EventLogLastEntry + ); + +/// +/// The EFI_TCG Protocol abstracts TCG activity. +/// +struct _EFI_TCG_PROTOCOL { + EFI_TCG_STATUS_CHECK StatusCheck; + EFI_TCG_HASH_ALL HashAll; + EFI_TCG_LOG_EVENT LogEvent; + EFI_TCG_PASS_THROUGH_TO_TPM PassThroughToTpm; + EFI_TCG_HASH_LOG_EXTEND_EVENT HashLogExtendEvent; +}; + +extern EFI_GUID gEfiTcgProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Tcp4.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Tcp4.h new file mode 100644 index 000000000..1771bc55f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Tcp4.h @@ -0,0 +1,579 @@ +/** @file + EFI TCPv4(Transmission Control Protocol version 4) Protocol Definition + The EFI TCPv4 Service Binding Protocol is used to locate EFI TCPv4 Protocol drivers to create + and destroy child of the driver to communicate with other host using TCP protocol. + The EFI TCPv4 Protocol provides services to send and receive data stream. + +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in UEFI Specification 2.0. + +**/ + +#ifndef __EFI_TCP4_PROTOCOL_H__ +#define __EFI_TCP4_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/Ip4.h> + +#define EFI_TCP4_SERVICE_BINDING_PROTOCOL_GUID \ + { \ + 0x00720665, 0x67EB, 0x4a99, {0xBA, 0xF7, 0xD3, 0xC3, 0x3A, 0x1C, 0x7C, 0xC9 } \ + } + +#define EFI_TCP4_PROTOCOL_GUID \ + { \ + 0x65530BC7, 0xA359, 0x410f, {0xB0, 0x10, 0x5A, 0xAD, 0xC7, 0xEC, 0x2B, 0x62 } \ + } + +typedef struct _EFI_TCP4_PROTOCOL EFI_TCP4_PROTOCOL; + +/// +/// EFI_TCP4_SERVICE_POINT is deprecated in the UEFI 2.4B and should not be used any more. +/// The definition in here is only present to provide backwards compatability. +/// +typedef struct { + EFI_HANDLE InstanceHandle; + EFI_IPv4_ADDRESS LocalAddress; + UINT16 LocalPort; + EFI_IPv4_ADDRESS RemoteAddress; + UINT16 RemotePort; +} EFI_TCP4_SERVICE_POINT; + +/// +/// EFI_TCP4_VARIABLE_DATA is deprecated in the UEFI 2.4B and should not be used any more. +/// The definition in here is only present to provide backwards compatability. +/// +typedef struct { + EFI_HANDLE DriverHandle; + UINT32 ServiceCount; + EFI_TCP4_SERVICE_POINT Services[1]; +} EFI_TCP4_VARIABLE_DATA; + +typedef struct { + BOOLEAN UseDefaultAddress; + EFI_IPv4_ADDRESS StationAddress; + EFI_IPv4_ADDRESS SubnetMask; + UINT16 StationPort; + EFI_IPv4_ADDRESS RemoteAddress; + UINT16 RemotePort; + BOOLEAN ActiveFlag; +} EFI_TCP4_ACCESS_POINT; + +typedef struct { + UINT32 ReceiveBufferSize; + UINT32 SendBufferSize; + UINT32 MaxSynBackLog; + UINT32 ConnectionTimeout; + UINT32 DataRetries; + UINT32 FinTimeout; + UINT32 TimeWaitTimeout; + UINT32 KeepAliveProbes; + UINT32 KeepAliveTime; + UINT32 KeepAliveInterval; + BOOLEAN EnableNagle; + BOOLEAN EnableTimeStamp; + BOOLEAN EnableWindowScaling; + BOOLEAN EnableSelectiveAck; + BOOLEAN EnablePathMtuDiscovery; +} EFI_TCP4_OPTION; + +typedef struct { + // + // I/O parameters + // + UINT8 TypeOfService; + UINT8 TimeToLive; + + // + // Access Point + // + EFI_TCP4_ACCESS_POINT AccessPoint; + + // + // TCP Control Options + // + EFI_TCP4_OPTION *ControlOption; +} EFI_TCP4_CONFIG_DATA; + +/// +/// TCP4 connnection state +/// +typedef enum { + Tcp4StateClosed = 0, + Tcp4StateListen = 1, + Tcp4StateSynSent = 2, + Tcp4StateSynReceived = 3, + Tcp4StateEstablished = 4, + Tcp4StateFinWait1 = 5, + Tcp4StateFinWait2 = 6, + Tcp4StateClosing = 7, + Tcp4StateTimeWait = 8, + Tcp4StateCloseWait = 9, + Tcp4StateLastAck = 10 +} EFI_TCP4_CONNECTION_STATE; + +typedef struct { + EFI_EVENT Event; + EFI_STATUS Status; +} EFI_TCP4_COMPLETION_TOKEN; + +typedef struct { + /// + /// The Status in the CompletionToken will be set to one of + /// the following values if the active open succeeds or an unexpected + /// error happens: + /// EFI_SUCCESS: The active open succeeds and the instance's + /// state is Tcp4StateEstablished. + /// EFI_CONNECTION_RESET: The connect fails because the connection is reset + /// either by instance itself or the communication peer. + /// EFI_CONNECTION_REFUSED: The connect fails because this connection is initiated with + /// an active open and the connection is refused. + /// EFI_ABORTED: The active open is aborted. + /// EFI_TIMEOUT: The connection establishment timer expires and + /// no more specific information is available. + /// EFI_NETWORK_UNREACHABLE: The active open fails because + /// an ICMP network unreachable error is received. + /// EFI_HOST_UNREACHABLE: The active open fails because an + /// ICMP host unreachable error is received. + /// EFI_PROTOCOL_UNREACHABLE: The active open fails + /// because an ICMP protocol unreachable error is received. + /// EFI_PORT_UNREACHABLE: The connection establishment + /// timer times out and an ICMP port unreachable error is received. + /// EFI_ICMP_ERROR: The connection establishment timer timeout and some other ICMP + /// error is received. + /// EFI_DEVICE_ERROR: An unexpected system or network error occurred. + /// EFI_NO_MEDIA: There was a media error. + /// + EFI_TCP4_COMPLETION_TOKEN CompletionToken; +} EFI_TCP4_CONNECTION_TOKEN; + +typedef struct { + EFI_TCP4_COMPLETION_TOKEN CompletionToken; + EFI_HANDLE NewChildHandle; +} EFI_TCP4_LISTEN_TOKEN; + +typedef struct { + UINT32 FragmentLength; + VOID *FragmentBuffer; +} EFI_TCP4_FRAGMENT_DATA; + +typedef struct { + BOOLEAN UrgentFlag; + UINT32 DataLength; + UINT32 FragmentCount; + EFI_TCP4_FRAGMENT_DATA FragmentTable[1]; +} EFI_TCP4_RECEIVE_DATA; + +typedef struct { + BOOLEAN Push; + BOOLEAN Urgent; + UINT32 DataLength; + UINT32 FragmentCount; + EFI_TCP4_FRAGMENT_DATA FragmentTable[1]; +} EFI_TCP4_TRANSMIT_DATA; + +typedef struct { + /// + /// When transmission finishes or meets any unexpected error it will + /// be set to one of the following values: + /// EFI_SUCCESS: The receiving or transmission operation + /// completes successfully. + /// EFI_CONNECTION_FIN: The receiving operation fails because the communication peer + /// has closed the connection and there is no more data in the + /// receive buffer of the instance. + /// EFI_CONNECTION_RESET: The receiving or transmission operation fails + /// because this connection is reset either by instance + /// itself or the communication peer. + /// EFI_ABORTED: The receiving or transmission is aborted. + /// EFI_TIMEOUT: The transmission timer expires and no more + /// specific information is available. + /// EFI_NETWORK_UNREACHABLE: The transmission fails + /// because an ICMP network unreachable error is received. + /// EFI_HOST_UNREACHABLE: The transmission fails because an + /// ICMP host unreachable error is received. + /// EFI_PROTOCOL_UNREACHABLE: The transmission fails + /// because an ICMP protocol unreachable error is received. + /// EFI_PORT_UNREACHABLE: The transmission fails and an + /// ICMP port unreachable error is received. + /// EFI_ICMP_ERROR: The transmission fails and some other + /// ICMP error is received. + /// EFI_DEVICE_ERROR: An unexpected system or network error occurs. + /// EFI_NO_MEDIA: There was a media error. + /// + EFI_TCP4_COMPLETION_TOKEN CompletionToken; + union { + /// + /// When this token is used for receiving, RxData is a pointer to EFI_TCP4_RECEIVE_DATA. + /// + EFI_TCP4_RECEIVE_DATA *RxData; + /// + /// When this token is used for transmitting, TxData is a pointer to EFI_TCP4_TRANSMIT_DATA. + /// + EFI_TCP4_TRANSMIT_DATA *TxData; + } Packet; +} EFI_TCP4_IO_TOKEN; + +typedef struct { + EFI_TCP4_COMPLETION_TOKEN CompletionToken; + BOOLEAN AbortOnClose; +} EFI_TCP4_CLOSE_TOKEN; + +// +// Interface definition for TCP4 protocol +// + +/** + Get the current operational status. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param Tcp4State The pointer to the buffer to receive the current TCP state. + @param Tcp4ConfigData The pointer to the buffer to receive the current TCP configuration. + @param Ip4ModeData The pointer to the buffer to receive the current IPv4 configuration + data used by the TCPv4 instance. + @param MnpConfigData The pointer to the buffer to receive the current MNP configuration + data used indirectly by the TCPv4 instance. + @param SnpModeData The pointer to the buffer to receive the current SNP configuration + data used indirectly by the TCPv4 instance. + + @retval EFI_SUCCESS The mode data was read. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_STARTED No configuration data is available because this instance hasn't + been started. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_GET_MODE_DATA)( + IN EFI_TCP4_PROTOCOL *This, + OUT EFI_TCP4_CONNECTION_STATE *Tcp4State OPTIONAL, + OUT EFI_TCP4_CONFIG_DATA *Tcp4ConfigData OPTIONAL, + OUT EFI_IP4_MODE_DATA *Ip4ModeData OPTIONAL, + OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL, + OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL + ); + +/** + Initialize or brutally reset the operational parameters for this EFI TCPv4 instance. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param Tcp4ConfigData The pointer to the configure data to configure the instance. + + @retval EFI_SUCCESS The operational settings are set, changed, or reset + successfully. + @retval EFI_INVALID_PARAMETER Some parameter is invalid. + @retval EFI_NO_MAPPING When using a default address, configuration (through + DHCP, BOOTP, RARP, etc.) is not finished yet. + @retval EFI_ACCESS_DENIED Configuring TCP instance when it is configured without + calling Configure() with NULL to reset it. + @retval EFI_DEVICE_ERROR An unexpected network or system error occurred. + @retval EFI_UNSUPPORTED One or more of the control options are not supported in + the implementation. + @retval EFI_OUT_OF_RESOURCES Could not allocate enough system resources when + executing Configure(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_CONFIGURE)( + IN EFI_TCP4_PROTOCOL *This, + IN EFI_TCP4_CONFIG_DATA *TcpConfigData OPTIONAL + ); + + +/** + Add or delete a route entry to the route table + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param DeleteRoute Set it to TRUE to delete this route from the routing table. Set it to + FALSE to add this route to the routing table. + DestinationAddress and SubnetMask are used as the + keywords to search route entry. + @param SubnetAddress The destination network. + @param SubnetMask The subnet mask of the destination network. + @param GatewayAddress The gateway address for this route. It must be on the same + subnet with the station address unless a direct route is specified. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_NOT_STARTED The EFI TCPv4 Protocol instance has not been configured. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - SubnetAddress is NULL. + - SubnetMask is NULL. + - GatewayAddress is NULL. + - *SubnetAddress is not NULL a valid subnet address. + - *SubnetMask is not a valid subnet mask. + - *GatewayAddress is not a valid unicast IP address or it + is not in the same subnet. + @retval EFI_OUT_OF_RESOURCES Could not allocate enough resources to add the entry to the + routing table. + @retval EFI_NOT_FOUND This route is not in the routing table. + @retval EFI_ACCESS_DENIED The route is already defined in the routing table. + @retval EFI_UNSUPPORTED The TCP driver does not support this operation. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_ROUTES)( + IN EFI_TCP4_PROTOCOL *This, + IN BOOLEAN DeleteRoute, + IN EFI_IPv4_ADDRESS *SubnetAddress, + IN EFI_IPv4_ADDRESS *SubnetMask, + IN EFI_IPv4_ADDRESS *GatewayAddress + ); + +/** + Initiate a nonblocking TCP connection request for an active TCP instance. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param ConnectionToken The pointer to the connection token to return when the TCP three + way handshake finishes. + + @retval EFI_SUCCESS The connection request is successfully initiated and the state + of this TCPv4 instance has been changed to Tcp4StateSynSent. + @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured. + @retval EFI_ACCESS_DENIED One or more of the following conditions are TRUE: + - This instance is not configured as an active one. + - This instance is not in Tcp4StateClosed state. + @retval EFI_INVALID_PARAMETER One or more of the following are TRUE: + - This is NULL. + - ConnectionToken is NULL. + - ConnectionToken->CompletionToken.Event is NULL. + @retval EFI_OUT_OF_RESOURCES The driver can't allocate enough resource to initiate the activ eopen. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_CONNECT)( + IN EFI_TCP4_PROTOCOL *This, + IN EFI_TCP4_CONNECTION_TOKEN *ConnectionToken + ); + + +/** + Listen on the passive instance to accept an incoming connection request. This is a nonblocking operation. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param ListenToken The pointer to the listen token to return when operation finishes. + + @retval EFI_SUCCESS The listen token has been queued successfully. + @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured. + @retval EFI_ACCESS_DENIED One or more of the following are TRUE: + - This instance is not a passive instance. + - This instance is not in Tcp4StateListen state. + - The same listen token has already existed in the listen + token queue of this TCP instance. + @retval EFI_INVALID_PARAMETER One or more of the following are TRUE: + - This is NULL. + - ListenToken is NULL. + - ListentToken->CompletionToken.Event is NULL. + @retval EFI_OUT_OF_RESOURCES Could not allocate enough resource to finish the operation. + @retval EFI_DEVICE_ERROR Any unexpected and not belonged to above category error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_ACCEPT)( + IN EFI_TCP4_PROTOCOL *This, + IN EFI_TCP4_LISTEN_TOKEN *ListenToken + ); + +/** + Queues outgoing data into the transmit queue. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param Token The pointer to the completion token to queue to the transmit queue. + + @retval EFI_SUCCESS The data has been queued for transmission. + @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more of the following are TRUE: + - This is NULL. + - Token is NULL. + - Token->CompletionToken.Event is NULL. + - Token->Packet.TxData is NULL L. + - Token->Packet.FragmentCount is zero. + - Token->Packet.DataLength is not equal to the sum of fragment lengths. + @retval EFI_ACCESS_DENIED One or more of the following conditions is TRUE: + - A transmit completion token with the same Token->CompletionToken.Event + was already in the transmission queue. + - The current instance is in Tcp4StateClosed state. + - The current instance is a passive one and it is in + Tcp4StateListen state. + - User has called Close() to disconnect this connection. + @retval EFI_NOT_READY The completion token could not be queued because the + transmit queue is full. + @retval EFI_OUT_OF_RESOURCES Could not queue the transmit data because of resource + shortage. + @retval EFI_NETWORK_UNREACHABLE There is no route to the destination network or address. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_TRANSMIT)( + IN EFI_TCP4_PROTOCOL *This, + IN EFI_TCP4_IO_TOKEN *Token + ); + + +/** + Places an asynchronous receive request into the receiving queue. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param Token The pointer to a token that is associated with the receive data + descriptor. + + @retval EFI_SUCCESS The receive completion token was cached. + @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, RARP, + etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - Token is NULL. + - Token->CompletionToken.Event is NULL. + - Token->Packet.RxData is NULL. + - Token->Packet.RxData->DataLength is 0. + - The Token->Packet.RxData->DataLength is not + the sum of all FragmentBuffer length in FragmentTable. + @retval EFI_OUT_OF_RESOURCES The receive completion token could not be queued due to a lack of + system resources (usually memory). + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_ACCESS_DENIED One or more of the following conditions is TRUE: + - A receive completion token with the same Token- + >CompletionToken.Event was already in the receive + queue. + - The current instance is in Tcp4StateClosed state. + - The current instance is a passive one and it is in + Tcp4StateListen state. + - User has called Close() to disconnect this connection. + @retval EFI_CONNECTION_FIN The communication peer has closed the connection and there is + no any buffered data in the receive buffer of this instance. + @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_RECEIVE)( + IN EFI_TCP4_PROTOCOL *This, + IN EFI_TCP4_IO_TOKEN *Token + ); + +/** + Disconnecting a TCP connection gracefully or reset a TCP connection. This function is a + nonblocking operation. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param CloseToken The pointer to the close token to return when operation finishes. + + @retval EFI_SUCCESS The Close() is called successfully. + @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured. + @retval EFI_ACCESS_DENIED One or more of the following are TRUE: + - Configure() has been called with + TcpConfigData set to NULL and this function has + not returned. + - Previous Close() call on this instance has not + finished. + @retval EFI_INVALID_PARAMETER One or more of the following are TRUE: + - This is NULL. + - CloseToken is NULL. + - CloseToken->CompletionToken.Event is NULL. + @retval EFI_OUT_OF_RESOURCES Could not allocate enough resource to finish the operation. + @retval EFI_DEVICE_ERROR Any unexpected and not belonged to above category error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_CLOSE)( + IN EFI_TCP4_PROTOCOL *This, + IN EFI_TCP4_CLOSE_TOKEN *CloseToken + ); + +/** + Abort an asynchronous connection, listen, transmission or receive request. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + @param Token The pointer to a token that has been issued by + EFI_TCP4_PROTOCOL.Connect(), + EFI_TCP4_PROTOCOL.Accept(), + EFI_TCP4_PROTOCOL.Transmit() or + EFI_TCP4_PROTOCOL.Receive(). If NULL, all pending + tokens issued by above four functions will be aborted. Type + EFI_TCP4_COMPLETION_TOKEN is defined in + EFI_TCP4_PROTOCOL.Connect(). + + @retval EFI_SUCCESS The asynchronous I/O request is aborted and Token->Event + is signaled. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_STARTED This instance hasn't been configured. + @retval EFI_NO_MAPPING When using the default address, configuration + (DHCP, BOOTP,RARP, etc.) hasn't finished yet. + @retval EFI_NOT_FOUND The asynchronous I/O request isn't found in the + transmission or receive queue. It has either + completed or wasn't issued by Transmit() and Receive(). + @retval EFI_UNSUPPORTED The implementation does not support this function. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_CANCEL)( + IN EFI_TCP4_PROTOCOL *This, + IN EFI_TCP4_COMPLETION_TOKEN *Token OPTIONAL + ); + + +/** + Poll to receive incoming data and transmit outgoing segments. + + @param This The pointer to the EFI_TCP4_PROTOCOL instance. + + @retval EFI_SUCCESS Incoming or outgoing data was processed. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_NOT_READY No incoming or outgoing data is processed. + @retval EFI_TIMEOUT Data was dropped out of the transmission or receive queue. + Consider increasing the polling rate. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_TCP4_POLL)( + IN EFI_TCP4_PROTOCOL *This + ); + +/// +/// The EFI_TCP4_PROTOCOL defines the EFI TCPv4 Protocol child to be used by +/// any network drivers or applications to send or receive data stream. +/// It can either listen on a specified port as a service or actively connected +/// to remote peer as a client. Each instance has its own independent settings, +/// such as the routing table. +/// +struct _EFI_TCP4_PROTOCOL { + EFI_TCP4_GET_MODE_DATA GetModeData; + EFI_TCP4_CONFIGURE Configure; + EFI_TCP4_ROUTES Routes; + EFI_TCP4_CONNECT Connect; + EFI_TCP4_ACCEPT Accept; + EFI_TCP4_TRANSMIT Transmit; + EFI_TCP4_RECEIVE Receive; + EFI_TCP4_CLOSE Close; + EFI_TCP4_CANCEL Cancel; + EFI_TCP4_POLL Poll; +}; + +extern EFI_GUID gEfiTcp4ServiceBindingProtocolGuid; +extern EFI_GUID gEfiTcp4ProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Udp4.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Udp4.h new file mode 100644 index 000000000..3c61db8c2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/Udp4.h @@ -0,0 +1,447 @@ +/** @file + UDP4 Service Binding Protocol as defined in UEFI specification. + + The EFI UDPv4 Protocol provides simple packet-oriented services + to transmit and receive UDP packets. + +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in UEFI Specification 2.0. + +**/ + +#ifndef __EFI_UDP4_PROTOCOL_H__ +#define __EFI_UDP4_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Protocol/Ip4.h> +// +//GUID definitions +// +#define EFI_UDP4_SERVICE_BINDING_PROTOCOL_GUID \ + { \ + 0x83f01464, 0x99bd, 0x45e5, {0xb3, 0x83, 0xaf, 0x63, 0x05, 0xd8, 0xe9, 0xe6 } \ + } + +#define EFI_UDP4_PROTOCOL_GUID \ + { \ + 0x3ad9df29, 0x4501, 0x478d, {0xb1, 0xf8, 0x7f, 0x7f, 0xe7, 0x0e, 0x50, 0xf3 } \ + } + +typedef struct _EFI_UDP4_PROTOCOL EFI_UDP4_PROTOCOL; + +/// +/// EFI_UDP4_SERVICE_POINT is deprecated in the UEFI 2.4B and should not be used any more. +/// The definition in here is only present to provide backwards compatability. +/// +typedef struct { + EFI_HANDLE InstanceHandle; + EFI_IPv4_ADDRESS LocalAddress; + UINT16 LocalPort; + EFI_IPv4_ADDRESS RemoteAddress; + UINT16 RemotePort; +} EFI_UDP4_SERVICE_POINT; + +/// +/// EFI_UDP4_VARIABLE_DATA is deprecated in the UEFI 2.4B and should not be used any more. +/// The definition in here is only present to provide backwards compatability. +/// +typedef struct { + EFI_HANDLE DriverHandle; + UINT32 ServiceCount; + EFI_UDP4_SERVICE_POINT Services[1]; +} EFI_UDP4_VARIABLE_DATA; + +typedef struct { + UINT32 FragmentLength; + VOID *FragmentBuffer; +} EFI_UDP4_FRAGMENT_DATA; + +typedef struct { + EFI_IPv4_ADDRESS SourceAddress; + UINT16 SourcePort; + EFI_IPv4_ADDRESS DestinationAddress; + UINT16 DestinationPort; +} EFI_UDP4_SESSION_DATA; +typedef struct { + // + // Receiving Filters + // + BOOLEAN AcceptBroadcast; + BOOLEAN AcceptPromiscuous; + BOOLEAN AcceptAnyPort; + BOOLEAN AllowDuplicatePort; + // + // I/O parameters + // + UINT8 TypeOfService; + UINT8 TimeToLive; + BOOLEAN DoNotFragment; + UINT32 ReceiveTimeout; + UINT32 TransmitTimeout; + // + // Access Point + // + BOOLEAN UseDefaultAddress; + EFI_IPv4_ADDRESS StationAddress; + EFI_IPv4_ADDRESS SubnetMask; + UINT16 StationPort; + EFI_IPv4_ADDRESS RemoteAddress; + UINT16 RemotePort; +} EFI_UDP4_CONFIG_DATA; + +typedef struct { + EFI_UDP4_SESSION_DATA *UdpSessionData; //OPTIONAL + EFI_IPv4_ADDRESS *GatewayAddress; //OPTIONAL + UINT32 DataLength; + UINT32 FragmentCount; + EFI_UDP4_FRAGMENT_DATA FragmentTable[1]; +} EFI_UDP4_TRANSMIT_DATA; + +typedef struct { + EFI_TIME TimeStamp; + EFI_EVENT RecycleSignal; + EFI_UDP4_SESSION_DATA UdpSession; + UINT32 DataLength; + UINT32 FragmentCount; + EFI_UDP4_FRAGMENT_DATA FragmentTable[1]; +} EFI_UDP4_RECEIVE_DATA; + + +typedef struct { + EFI_EVENT Event; + EFI_STATUS Status; + union { + EFI_UDP4_RECEIVE_DATA *RxData; + EFI_UDP4_TRANSMIT_DATA *TxData; + } Packet; +} EFI_UDP4_COMPLETION_TOKEN; + +/** + Reads the current operational settings. + + The GetModeData() function copies the current operational settings of this EFI + UDPv4 Protocol instance into user-supplied buffers. This function is used + optionally to retrieve the operational mode data of underlying networks or + drivers. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + @param Udp4ConfigData The pointer to the buffer to receive the current configuration data. + @param Ip4ModeData The pointer to the EFI IPv4 Protocol mode data structure. + @param MnpConfigData The pointer to the managed network configuration data structure. + @param SnpModeData The pointer to the simple network mode data structure. + + @retval EFI_SUCCESS The mode data was read. + @retval EFI_NOT_STARTED When Udp4ConfigData is queried, no configuration data is + available because this instance has not been started. + @retval EFI_INVALID_PARAMETER This is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_GET_MODE_DATA)( + IN EFI_UDP4_PROTOCOL *This, + OUT EFI_UDP4_CONFIG_DATA *Udp4ConfigData OPTIONAL, + OUT EFI_IP4_MODE_DATA *Ip4ModeData OPTIONAL, + OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL, + OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL + ); + + +/** + Initializes, changes, or resets the operational parameters for this instance of the EFI UDPv4 + Protocol. + + The Configure() function is used to do the following: + * Initialize and start this instance of the EFI UDPv4 Protocol. + * Change the filtering rules and operational parameters. + * Reset this instance of the EFI UDPv4 Protocol. + Until these parameters are initialized, no network traffic can be sent or + received by this instance. This instance can be also reset by calling Configure() + with UdpConfigData set to NULL. Once reset, the receiving queue and transmitting + queue are flushed and no traffic is allowed through this instance. + With different parameters in UdpConfigData, Configure() can be used to bind + this instance to specified port. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + @param Udp4ConfigData The pointer to the buffer to receive the current configuration data. + + @retval EFI_SUCCESS The configuration settings were set, changed, or reset successfully. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_INVALID_PARAMETER UdpConfigData.StationAddress is not a valid unicast IPv4 address. + @retval EFI_INVALID_PARAMETER UdpConfigData.SubnetMask is not a valid IPv4 address mask. The subnet + mask must be contiguous. + @retval EFI_INVALID_PARAMETER UdpConfigData.RemoteAddress is not a valid unicast IPv4 address if it + is not zero. + @retval EFI_ALREADY_STARTED The EFI UDPv4 Protocol instance is already started/configured + and must be stopped/reset before it can be reconfigured. + @retval EFI_ACCESS_DENIED UdpConfigData. AllowDuplicatePort is FALSE + and UdpConfigData.StationPort is already used by + other instance. + @retval EFI_OUT_OF_RESOURCES The EFI UDPv4 Protocol driver cannot allocate memory for this + EFI UDPv4 Protocol instance. + @retval EFI_DEVICE_ERROR An unexpected network or system error occurred and this instance + was not opened. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_CONFIGURE)( + IN EFI_UDP4_PROTOCOL *This, + IN EFI_UDP4_CONFIG_DATA *UdpConfigData OPTIONAL + ); + +/** + Joins and leaves multicast groups. + + The Groups() function is used to enable and disable the multicast group + filtering. If the JoinFlag is FALSE and the MulticastAddress is NULL, then all + currently joined groups are left. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + @param JoinFlag Set to TRUE to join a multicast group. Set to FALSE to leave one + or all multicast groups. + @param MulticastAddress The pointer to multicast group address to join or leave. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_NOT_STARTED The EFI UDPv4 Protocol instance has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_OUT_OF_RESOURCES Could not allocate resources to join the group. + @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE: + - This is NULL. + - JoinFlag is TRUE and MulticastAddress is NULL. + - JoinFlag is TRUE and *MulticastAddress is not + a valid multicast address. + @retval EFI_ALREADY_STARTED The group address is already in the group table (when + JoinFlag is TRUE). + @retval EFI_NOT_FOUND The group address is not in the group table (when JoinFlag is + FALSE). + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_GROUPS)( + IN EFI_UDP4_PROTOCOL *This, + IN BOOLEAN JoinFlag, + IN EFI_IPv4_ADDRESS *MulticastAddress OPTIONAL + ); + +/** + Adds and deletes routing table entries. + + The Routes() function adds a route to or deletes a route from the routing table. + Routes are determined by comparing the SubnetAddress with the destination IP + address and arithmetically AND-ing it with the SubnetMask. The gateway address + must be on the same subnet as the configured station address. + The default route is added with SubnetAddress and SubnetMask both set to 0.0.0.0. + The default route matches all destination IP addresses that do not match any + other routes. + A zero GatewayAddress is a nonroute. Packets are sent to the destination IP + address if it can be found in the Address Resolution Protocol (ARP) cache or + on the local subnet. One automatic nonroute entry will be inserted into the + routing table for outgoing packets that are addressed to a local subnet + (gateway address of 0.0.0.0). + Each instance of the EFI UDPv4 Protocol has its own independent routing table. + Instances of the EFI UDPv4 Protocol that use the default IP address will also + have copies of the routing table provided by the EFI_IP4_CONFIG_PROTOCOL. These + copies will be updated automatically whenever the IP driver reconfigures its + instances; as a result, the previous modification to these copies will be lost. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + @param DeleteRoute Set to TRUE to delete this route from the routing table. + Set to FALSE to add this route to the routing table. + @param SubnetAddress The destination network address that needs to be routed. + @param SubnetMask The subnet mask of SubnetAddress. + @param GatewayAddress The gateway IP address for this route. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_NOT_STARTED The EFI UDPv4 Protocol instance has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + - RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES Could not add the entry to the routing table. + @retval EFI_NOT_FOUND This route is not in the routing table. + @retval EFI_ACCESS_DENIED The route is already defined in the routing table. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_ROUTES)( + IN EFI_UDP4_PROTOCOL *This, + IN BOOLEAN DeleteRoute, + IN EFI_IPv4_ADDRESS *SubnetAddress, + IN EFI_IPv4_ADDRESS *SubnetMask, + IN EFI_IPv4_ADDRESS *GatewayAddress + ); + +/** + Polls for incoming data packets and processes outgoing data packets. + + The Poll() function can be used by network drivers and applications to increase + the rate that data packets are moved between the communications device and the + transmit and receive queues. + In some systems, the periodic timer event in the managed network driver may not + poll the underlying communications device fast enough to transmit and/or receive + all data packets without missing incoming packets or dropping outgoing packets. + Drivers and applications that are experiencing packet loss should try calling + the Poll() function more often. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + + @retval EFI_SUCCESS Incoming or outgoing data was processed. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_POLL)( + IN EFI_UDP4_PROTOCOL *This + ); + +/** + Places an asynchronous receive request into the receiving queue. + + The Receive() function places a completion token into the receive packet queue. + This function is always asynchronous. + The caller must fill in the Token.Event field in the completion token, and this + field cannot be NULL. When the receive operation completes, the EFI UDPv4 Protocol + driver updates the Token.Status and Token.Packet.RxData fields and the Token.Event + is signaled. Providing a proper notification function and context for the event + will enable the user to receive the notification and receiving status. That + notification function is guaranteed to not be re-entered. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + @param Token The pointer to a token that is associated with the receive data + descriptor. + + @retval EFI_SUCCESS The receive completion token was cached. + @retval EFI_NOT_STARTED This EFI UDPv4 Protocol instance has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, RARP, etc.) + is not finished yet. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_INVALID_PARAMETER Token is NULL. + @retval EFI_INVALID_PARAMETER Token.Event is NULL. + @retval EFI_OUT_OF_RESOURCES The receive completion token could not be queued due to a lack of system + resources (usually memory). + @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. + @retval EFI_ACCESS_DENIED A receive completion token with the same Token.Event was already in + the receive queue. + @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_RECEIVE)( + IN EFI_UDP4_PROTOCOL *This, + IN EFI_UDP4_COMPLETION_TOKEN *Token + ); + +/** + Queues outgoing data packets into the transmit queue. + + The Transmit() function places a sending request to this instance of the EFI + UDPv4 Protocol, alongside the transmit data that was filled by the user. Whenever + the packet in the token is sent out or some errors occur, the Token.Event will + be signaled and Token.Status is updated. Providing a proper notification function + and context for the event will enable the user to receive the notification and + transmitting status. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + @param Token The pointer to the completion token that will be placed into the + transmit queue. + + @retval EFI_SUCCESS The data has been queued for transmission. + @retval EFI_NOT_STARTED This EFI UDPv4 Protocol instance has not been started. + @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_ACCESS_DENIED The transmit completion token with the same + Token.Event was already in the transmit queue. + @retval EFI_NOT_READY The completion token could not be queued because the + transmit queue is full. + @retval EFI_OUT_OF_RESOURCES Could not queue the transmit data. + @retval EFI_NOT_FOUND There is no route to the destination network or address. + @retval EFI_BAD_BUFFER_SIZE The data length is greater than the maximum UDP packet + size. Or the length of the IP header + UDP header + data + length is greater than MTU if DoNotFragment is TRUE. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_TRANSMIT)( + IN EFI_UDP4_PROTOCOL *This, + IN EFI_UDP4_COMPLETION_TOKEN *Token + ); + +/** + Aborts an asynchronous transmit or receive request. + + The Cancel() function is used to abort a pending transmit or receive request. + If the token is in the transmit or receive request queues, after calling this + function, Token.Status will be set to EFI_ABORTED and then Token.Event will be + signaled. If the token is not in one of the queues, which usually means that + the asynchronous operation has completed, this function will not signal the + token and EFI_NOT_FOUND is returned. + + @param This The pointer to the EFI_UDP4_PROTOCOL instance. + @param Token The pointer to a token that has been issued by + EFI_UDP4_PROTOCOL.Transmit() or + EFI_UDP4_PROTOCOL.Receive().If NULL, all pending + tokens are aborted. + + @retval EFI_SUCCESS The asynchronous I/O request was aborted and Token.Event + was signaled. When Token is NULL, all pending requests are + aborted and their events are signaled. + @retval EFI_INVALID_PARAMETER This is NULL. + @retval EFI_NOT_STARTED This instance has not been started. + @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, + RARP, etc.) is not finished yet. + @retval EFI_NOT_FOUND When Token is not NULL, the asynchronous I/O request was + not found in the transmit or receive queue. It has either completed + or was not issued by Transmit() and Receive(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UDP4_CANCEL)( + IN EFI_UDP4_PROTOCOL *This, + IN EFI_UDP4_COMPLETION_TOKEN *Token OPTIONAL + ); + +/// +/// The EFI_UDP4_PROTOCOL defines an EFI UDPv4 Protocol session that can be used +/// by any network drivers, applications, or daemons to transmit or receive UDP packets. +/// This protocol instance can either be bound to a specified port as a service or +/// connected to some remote peer as an active client. Each instance has its own settings, +/// such as the routing table and group table, which are independent from each other. +/// +struct _EFI_UDP4_PROTOCOL { + EFI_UDP4_GET_MODE_DATA GetModeData; + EFI_UDP4_CONFIGURE Configure; + EFI_UDP4_GROUPS Groups; + EFI_UDP4_ROUTES Routes; + EFI_UDP4_TRANSMIT Transmit; + EFI_UDP4_RECEIVE Receive; + EFI_UDP4_CANCEL Cancel; + EFI_UDP4_POLL Poll; +}; + +extern EFI_GUID gEfiUdp4ServiceBindingProtocolGuid; +extern EFI_GUID gEfiUdp4ProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/VlanConfig.h b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/VlanConfig.h new file mode 100644 index 000000000..928faded2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Protocol/VlanConfig.h @@ -0,0 +1,145 @@ +/** @file + EFI VLAN Config protocol is to provide manageability interface for VLAN configuration. + + Copyright (c) 2009, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + This Protocol is introduced in UEFI Specification 2.2 + +**/ + +#ifndef __EFI_VLANCONFIG_PROTOCOL_H__ +#define __EFI_VLANCONFIG_PROTOCOL_H__ + +FILE_LICENCE ( BSD3 ); + + +#define EFI_VLAN_CONFIG_PROTOCOL_GUID \ + { \ + 0x9e23d768, 0xd2f3, 0x4366, {0x9f, 0xc3, 0x3a, 0x7a, 0xba, 0x86, 0x43, 0x74 } \ + } + +typedef struct _EFI_VLAN_CONFIG_PROTOCOL EFI_VLAN_CONFIG_PROTOCOL; + + +/// +/// EFI_VLAN_FIND_DATA +/// +typedef struct { + UINT16 VlanId; ///< Vlan Identifier. + UINT8 Priority; ///< Priority of this VLAN. +} EFI_VLAN_FIND_DATA; + + +/** + Create a VLAN device or modify the configuration parameter of an + already-configured VLAN. + + The Set() function is used to create a new VLAN device or change the VLAN + configuration parameters. If the VlanId hasn't been configured in the + physical Ethernet device, a new VLAN device will be created. If a VLAN with + this VlanId is already configured, then related configuration will be updated + as the input parameters. + + If VlanId is zero, the VLAN device will send and receive untagged frames. + Otherwise, the VLAN device will send and receive VLAN-tagged frames containing the VlanId. + If VlanId is out of scope of (0-4094), EFI_INVALID_PARAMETER is returned. + If Priority is out of the scope of (0-7), then EFI_INVALID_PARAMETER is returned. + If there is not enough system memory to perform the registration, then + EFI_OUT_OF_RESOURCES is returned. + + @param[in] This Points to the EFI_VLAN_CONFIG_PROTOCOL. + @param[in] VlanId A unique identifier (1-4094) of the VLAN which is being created + or modified, or zero (0). + @param[in] Priority 3 bit priority in VLAN header. Priority 0 is default value. If + VlanId is zero (0), Priority is ignored. + + @retval EFI_SUCCESS The VLAN is successfully configured. + @retval EFI_INVALID_PARAMETER One or more of following conditions is TRUE: + - This is NULL. + - VlanId is an invalid VLAN Identifier. + - Priority is invalid. + @retval EFI_OUT_OF_RESOURCES There is not enough system memory to perform the registration. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_VLAN_CONFIG_SET)( + IN EFI_VLAN_CONFIG_PROTOCOL *This, + IN UINT16 VlanId, + IN UINT8 Priority + ); + +/** + Find configuration information for specified VLAN or all configured VLANs. + + The Find() function is used to find the configuration information for matching + VLAN and allocate a buffer into which those entries are copied. + + @param[in] This Points to the EFI_VLAN_CONFIG_PROTOCOL. + @param[in] VlanId Pointer to VLAN identifier. Set to NULL to find all + configured VLANs. + @param[out] NumberOfVlan The number of VLANs which is found by the specified criteria. + @param[out] Entries The buffer which receive the VLAN configuration. + + @retval EFI_SUCCESS The VLAN is successfully found. + @retval EFI_INVALID_PARAMETER One or more of following conditions is TRUE: + - This is NULL. + - Specified VlanId is invalid. + @retval EFI_NOT_FOUND No matching VLAN is found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_VLAN_CONFIG_FIND)( + IN EFI_VLAN_CONFIG_PROTOCOL *This, + IN UINT16 *VlanId OPTIONAL, + OUT UINT16 *NumberOfVlan, + OUT EFI_VLAN_FIND_DATA **Entries + ); + +/** + Remove the configured VLAN device. + + The Remove() function is used to remove the specified VLAN device. + If the VlanId is out of the scope of (0-4094), EFI_INVALID_PARAMETER is returned. + If specified VLAN hasn't been previously configured, EFI_NOT_FOUND is returned. + + @param[in] This Points to the EFI_VLAN_CONFIG_PROTOCOL. + @param[in] VlanId Identifier (0-4094) of the VLAN to be removed. + + @retval EFI_SUCCESS The VLAN is successfully removed. + @retval EFI_INVALID_PARAMETER One or more of following conditions is TRUE: + - This is NULL. + - VlanId is an invalid parameter. + @retval EFI_NOT_FOUND The to-be-removed VLAN does not exist. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_VLAN_CONFIG_REMOVE)( + IN EFI_VLAN_CONFIG_PROTOCOL *This, + IN UINT16 VlanId + ); + +/// +/// EFI_VLAN_CONFIG_PROTOCOL +/// provide manageability interface for VLAN setting. The intended +/// VLAN tagging implementation is IEEE802.1Q. +/// +struct _EFI_VLAN_CONFIG_PROTOCOL { + EFI_VLAN_CONFIG_SET Set; + EFI_VLAN_CONFIG_FIND Find; + EFI_VLAN_CONFIG_REMOVE Remove; +}; + +extern EFI_GUID gEfiVlanConfigProtocolGuid; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Uefi.h b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi.h new file mode 100644 index 000000000..a5a25a9c4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi.h @@ -0,0 +1,29 @@ +/** @file + + Root include file for Mde Package UEFI, UEFI_APPLICATION type modules. + + This is the include file for any module of type UEFI and UEFI_APPLICATION. Uefi modules only use + types defined via this include file and can be ported easily to any + environment. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PI_UEFI_H__ +#define __PI_UEFI_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Uefi/UefiBaseType.h> +#include <ipxe/efi/Uefi/UefiSpec.h> + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiBaseType.h b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiBaseType.h new file mode 100644 index 000000000..371dae649 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiBaseType.h @@ -0,0 +1,303 @@ +/** @file + Defines data types and constants introduced in UEFI. + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR> + +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __UEFI_BASETYPE_H__ +#define __UEFI_BASETYPE_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Base.h> + +// +// Basic data type definitions introduced in UEFI. +// + +/// +/// 128-bit buffer containing a unique identifier value. +/// +typedef GUID EFI_GUID; +/// +/// Function return status for EFI API. +/// +typedef RETURN_STATUS EFI_STATUS; +/// +/// A collection of related interfaces. +/// +typedef VOID *EFI_HANDLE; +/// +/// Handle to an event structure. +/// +typedef VOID *EFI_EVENT; +/// +/// Task priority level. +/// +typedef UINTN EFI_TPL; +/// +/// Logical block address. +/// +typedef UINT64 EFI_LBA; + +/// +/// 64-bit physical memory address. +/// +typedef UINT64 EFI_PHYSICAL_ADDRESS; + +/// +/// 64-bit virtual memory address. +/// +typedef UINT64 EFI_VIRTUAL_ADDRESS; + +/// +/// EFI Time Abstraction: +/// Year: 1900 - 9999 +/// Month: 1 - 12 +/// Day: 1 - 31 +/// Hour: 0 - 23 +/// Minute: 0 - 59 +/// Second: 0 - 59 +/// Nanosecond: 0 - 999,999,999 +/// TimeZone: -1440 to 1440 or 2047 +/// +typedef struct { + UINT16 Year; + UINT8 Month; + UINT8 Day; + UINT8 Hour; + UINT8 Minute; + UINT8 Second; + UINT8 Pad1; + UINT32 Nanosecond; + INT16 TimeZone; + UINT8 Daylight; + UINT8 Pad2; +} EFI_TIME; + + +/// +/// 4-byte buffer. An IPv4 internet protocol address. +/// +typedef struct { + UINT8 Addr[4]; +} EFI_IPv4_ADDRESS; + +/// +/// 16-byte buffer. An IPv6 internet protocol address. +/// +typedef struct { + UINT8 Addr[16]; +} EFI_IPv6_ADDRESS; + +/// +/// 32-byte buffer containing a network Media Access Control address. +/// +typedef struct { + UINT8 Addr[32]; +} EFI_MAC_ADDRESS; + +/// +/// 16-byte buffer aligned on a 4-byte boundary. +/// An IPv4 or IPv6 internet protocol address. +/// +typedef union { + UINT32 Addr[4]; + EFI_IPv4_ADDRESS v4; + EFI_IPv6_ADDRESS v6; +} EFI_IP_ADDRESS; + + +/// +/// Enumeration of EFI_STATUS. +///@{ +#define EFI_SUCCESS RETURN_SUCCESS +#define EFI_LOAD_ERROR RETURN_LOAD_ERROR +#define EFI_INVALID_PARAMETER RETURN_INVALID_PARAMETER +#define EFI_UNSUPPORTED RETURN_UNSUPPORTED +#define EFI_BAD_BUFFER_SIZE RETURN_BAD_BUFFER_SIZE +#define EFI_BUFFER_TOO_SMALL RETURN_BUFFER_TOO_SMALL +#define EFI_NOT_READY RETURN_NOT_READY +#define EFI_DEVICE_ERROR RETURN_DEVICE_ERROR +#define EFI_WRITE_PROTECTED RETURN_WRITE_PROTECTED +#define EFI_OUT_OF_RESOURCES RETURN_OUT_OF_RESOURCES +#define EFI_VOLUME_CORRUPTED RETURN_VOLUME_CORRUPTED +#define EFI_VOLUME_FULL RETURN_VOLUME_FULL +#define EFI_NO_MEDIA RETURN_NO_MEDIA +#define EFI_MEDIA_CHANGED RETURN_MEDIA_CHANGED +#define EFI_NOT_FOUND RETURN_NOT_FOUND +#define EFI_ACCESS_DENIED RETURN_ACCESS_DENIED +#define EFI_NO_RESPONSE RETURN_NO_RESPONSE +#define EFI_NO_MAPPING RETURN_NO_MAPPING +#define EFI_TIMEOUT RETURN_TIMEOUT +#define EFI_NOT_STARTED RETURN_NOT_STARTED +#define EFI_ALREADY_STARTED RETURN_ALREADY_STARTED +#define EFI_ABORTED RETURN_ABORTED +#define EFI_ICMP_ERROR RETURN_ICMP_ERROR +#define EFI_TFTP_ERROR RETURN_TFTP_ERROR +#define EFI_PROTOCOL_ERROR RETURN_PROTOCOL_ERROR +#define EFI_INCOMPATIBLE_VERSION RETURN_INCOMPATIBLE_VERSION +#define EFI_SECURITY_VIOLATION RETURN_SECURITY_VIOLATION +#define EFI_CRC_ERROR RETURN_CRC_ERROR +#define EFI_END_OF_MEDIA RETURN_END_OF_MEDIA +#define EFI_END_OF_FILE RETURN_END_OF_FILE +#define EFI_INVALID_LANGUAGE RETURN_INVALID_LANGUAGE +#define EFI_COMPROMISED_DATA RETURN_COMPROMISED_DATA + +#define EFI_WARN_UNKNOWN_GLYPH RETURN_WARN_UNKNOWN_GLYPH +#define EFI_WARN_DELETE_FAILURE RETURN_WARN_DELETE_FAILURE +#define EFI_WARN_WRITE_FAILURE RETURN_WARN_WRITE_FAILURE +#define EFI_WARN_BUFFER_TOO_SMALL RETURN_WARN_BUFFER_TOO_SMALL +#define EFI_WARN_STALE_DATA RETURN_WARN_STALE_DATA +///@} + +/// +/// Define macro to encode the status code. +/// +#define EFIERR(_a) ENCODE_ERROR(_a) + +#define EFI_ERROR(A) RETURN_ERROR(A) + +/// +/// ICMP error definitions +///@{ +#define EFI_NETWORK_UNREACHABLE EFIERR(100) +#define EFI_HOST_UNREACHABLE EFIERR(101) +#define EFI_PROTOCOL_UNREACHABLE EFIERR(102) +#define EFI_PORT_UNREACHABLE EFIERR(103) +///@} + +/// +/// Tcp connection status definitions +///@{ +#define EFI_CONNECTION_FIN EFIERR(104) +#define EFI_CONNECTION_RESET EFIERR(105) +#define EFI_CONNECTION_REFUSED EFIERR(106) +///@} + +// +// The EFI memory allocation functions work in units of EFI_PAGEs that are +// 4KB. This should in no way be confused with the page size of the processor. +// An EFI_PAGE is just the quanta of memory in EFI. +// +#define EFI_PAGE_SIZE SIZE_4KB +#define EFI_PAGE_MASK 0xFFF +#define EFI_PAGE_SHIFT 12 + +/** + Macro that converts a size, in bytes, to a number of EFI_PAGESs. + + @param Size A size in bytes. This parameter is assumed to be type UINTN. + Passing in a parameter that is larger than UINTN may produce + unexpected results. + + @return The number of EFI_PAGESs associated with the number of bytes specified + by Size. + +**/ +#define EFI_SIZE_TO_PAGES(Size) (((Size) >> EFI_PAGE_SHIFT) + (((Size) & EFI_PAGE_MASK) ? 1 : 0)) + +/** + Macro that converts a number of EFI_PAGEs to a size in bytes. + + @param Pages The number of EFI_PAGES. This parameter is assumed to be + type UINTN. Passing in a parameter that is larger than + UINTN may produce unexpected results. + + @return The number of bytes associated with the number of EFI_PAGEs specified + by Pages. + +**/ +#define EFI_PAGES_TO_SIZE(Pages) ((Pages) << EFI_PAGE_SHIFT) + +/// +/// PE32+ Machine type for IA32 UEFI images. +/// +#define EFI_IMAGE_MACHINE_IA32 0x014C + +/// +/// PE32+ Machine type for IA64 UEFI images. +/// +#define EFI_IMAGE_MACHINE_IA64 0x0200 + +/// +/// PE32+ Machine type for EBC UEFI images. +/// +#define EFI_IMAGE_MACHINE_EBC 0x0EBC + +/// +/// PE32+ Machine type for X64 UEFI images. +/// +#define EFI_IMAGE_MACHINE_X64 0x8664 + +/// +/// PE32+ Machine type for ARM mixed ARM and Thumb/Thumb2 images. +/// +#define EFI_IMAGE_MACHINE_ARMTHUMB_MIXED 0x01C2 + +/// +/// PE32+ Machine type for AARCH64 A64 images. +/// +#define EFI_IMAGE_MACHINE_AARCH64 0xAA64 + + +#if defined (MDE_CPU_IA32) + +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ + (((Machine) == EFI_IMAGE_MACHINE_IA32) || ((Machine) == EFI_IMAGE_MACHINE_EBC)) + +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_X64) + +#elif defined (MDE_CPU_IPF) + +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ + (((Machine) == EFI_IMAGE_MACHINE_IA64) || ((Machine) == EFI_IMAGE_MACHINE_EBC)) + +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) + +#elif defined (MDE_CPU_X64) + +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ + (((Machine) == EFI_IMAGE_MACHINE_X64) || ((Machine) == EFI_IMAGE_MACHINE_EBC)) + +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_IA32) + +#elif defined (MDE_CPU_ARM) + +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ + (((Machine) == EFI_IMAGE_MACHINE_ARMTHUMB_MIXED) || ((Machine) == EFI_IMAGE_MACHINE_EBC)) + +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_ARMTHUMB_MIXED) + +#elif defined (MDE_CPU_AARCH64) + +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ + (((Machine) == EFI_IMAGE_MACHINE_AARCH64) || ((Machine) == EFI_IMAGE_MACHINE_EBC)) + +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) + +#elif defined (MDE_CPU_EBC) + +/// +/// This is just to make sure you can cross compile with the EBC compiler. +/// It does not make sense to have a PE loader coded in EBC. +/// +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_EBC) + +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) + +#else +#error Unknown Processor Type +#endif + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiGpt.h b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiGpt.h new file mode 100644 index 000000000..19acf55d4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiGpt.h @@ -0,0 +1,143 @@ +/** @file + EFI Guid Partition Table Format Definition. + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __UEFI_GPT_H__ +#define __UEFI_GPT_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// The primary GUID Partition Table Header must be +/// located in LBA 1 (i.e., the second logical block). +/// +#define PRIMARY_PART_HEADER_LBA 1 +/// +/// EFI Partition Table Signature: "EFI PART". +/// +#define EFI_PTAB_HEADER_ID SIGNATURE_64 ('E','F','I',' ','P','A','R','T') + +#pragma pack(1) + +/// +/// GPT Partition Table Header. +/// +typedef struct { + /// + /// The table header for the GPT partition Table. + /// This header contains EFI_PTAB_HEADER_ID. + /// + EFI_TABLE_HEADER Header; + /// + /// The LBA that contains this data structure. + /// + EFI_LBA MyLBA; + /// + /// LBA address of the alternate GUID Partition Table Header. + /// + EFI_LBA AlternateLBA; + /// + /// The first usable logical block that may be used + /// by a partition described by a GUID Partition Entry. + /// + EFI_LBA FirstUsableLBA; + /// + /// The last usable logical block that may be used + /// by a partition described by a GUID Partition Entry. + /// + EFI_LBA LastUsableLBA; + /// + /// GUID that can be used to uniquely identify the disk. + /// + EFI_GUID DiskGUID; + /// + /// The starting LBA of the GUID Partition Entry array. + /// + EFI_LBA PartitionEntryLBA; + /// + /// The number of Partition Entries in the GUID Partition Entry array. + /// + UINT32 NumberOfPartitionEntries; + /// + /// The size, in bytes, of each the GUID Partition + /// Entry structures in the GUID Partition Entry + /// array. This field shall be set to a value of 128 x 2^n where n is + /// an integer greater than or equal to zero (e.g., 128, 256, 512, etc.). + /// + UINT32 SizeOfPartitionEntry; + /// + /// The CRC32 of the GUID Partition Entry array. + /// Starts at PartitionEntryLBA and is + /// computed over a byte length of + /// NumberOfPartitionEntries * SizeOfPartitionEntry. + /// + UINT32 PartitionEntryArrayCRC32; +} EFI_PARTITION_TABLE_HEADER; + +/// +/// GPT Partition Entry. +/// +typedef struct { + /// + /// Unique ID that defines the purpose and type of this Partition. A value of + /// zero defines that this partition entry is not being used. + /// + EFI_GUID PartitionTypeGUID; + /// + /// GUID that is unique for every partition entry. Every partition ever + /// created will have a unique GUID. + /// This GUID must be assigned when the GUID Partition Entry is created. + /// + EFI_GUID UniquePartitionGUID; + /// + /// Starting LBA of the partition defined by this entry + /// + EFI_LBA StartingLBA; + /// + /// Ending LBA of the partition defined by this entry. + /// + EFI_LBA EndingLBA; + /// + /// Attribute bits, all bits reserved by UEFI + /// Bit 0: If this bit is set, the partition is required for the platform to function. The owner/creator of the + /// partition indicates that deletion or modification of the contents can result in loss of platform + /// features or failure for the platform to boot or operate. The system cannot function normally if + /// this partition is removed, and it should be considered part of the hardware of the system. + /// Actions such as running diagnostics, system recovery, or even OS install or boot, could + /// potentially stop working if this partition is removed. Unless OS software or firmware + /// recognizes this partition, it should never be removed or modified as the UEFI firmware or + /// platform hardware may become non-functional. + /// Bit 1: If this bit is set, then firmware must not produce an EFI_BLOCK_IO_PROTOCOL device for + /// this partition. By not producing an EFI_BLOCK_IO_PROTOCOL partition, file system + /// mappings will not be created for this partition in UEFI. + /// Bit 2: This bit is set aside to let systems with traditional PC-AT BIOS firmware implementations + /// inform certain limited, special-purpose software running on these systems that a GPT + /// partition may be bootable. The UEFI boot manager must ignore this bit when selecting + /// a UEFI-compliant application, e.g., an OS loader. + /// Bits 3-47: Undefined and must be zero. Reserved for expansion by future versions of the UEFI + /// specification. + /// Bits 48-63: Reserved for GUID specific use. The use of these bits will vary depending on the + /// PartitionTypeGUID. Only the owner of the PartitionTypeGUID is allowed + /// to modify these bits. They must be preserved if Bits 0-47 are modified.. + /// + UINT64 Attributes; + /// + /// Null-terminated name of the partition. + /// + CHAR16 PartitionName[36]; +} EFI_PARTITION_ENTRY; + +#pragma pack() +#endif + + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h new file mode 100644 index 000000000..19121dea7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h @@ -0,0 +1,2108 @@ +/** @file + This file defines the encoding for the VFR (Visual Form Representation) language. + IFR is primarily consumed by the EFI presentation engine, and produced by EFI + internal application and drivers as well as all add-in card option-ROM drivers + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + These definitions are from UEFI 2.1 and 2.2. + +**/ + +#ifndef __UEFI_INTERNAL_FORMREPRESENTATION_H__ +#define __UEFI_INTERNAL_FORMREPRESENTATION_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Guid/HiiFormMapMethodGuid.h> + +/// +/// The following types are currently defined: +/// +typedef VOID* EFI_HII_HANDLE; +typedef CHAR16* EFI_STRING; +typedef UINT16 EFI_IMAGE_ID; +typedef UINT16 EFI_QUESTION_ID; +typedef UINT16 EFI_STRING_ID; +typedef UINT16 EFI_FORM_ID; +typedef UINT16 EFI_VARSTORE_ID; +typedef UINT16 EFI_ANIMATION_ID; + +typedef UINT16 EFI_DEFAULT_ID; + +typedef UINT32 EFI_HII_FONT_STYLE; + + + +#pragma pack(1) + +// +// Definitions for Package Lists and Package Headers +// Section 27.3.1 +// + +/// +/// The header found at the start of each package list. +/// +typedef struct { + EFI_GUID PackageListGuid; + UINT32 PackageLength; +} EFI_HII_PACKAGE_LIST_HEADER; + +/// +/// The header found at the start of each package. +/// +typedef struct { + UINT32 Length:24; + UINT32 Type:8; + // UINT8 Data[...]; +} EFI_HII_PACKAGE_HEADER; + +// +// Value of HII package type +// +#define EFI_HII_PACKAGE_TYPE_ALL 0x00 +#define EFI_HII_PACKAGE_TYPE_GUID 0x01 +#define EFI_HII_PACKAGE_FORMS 0x02 +#define EFI_HII_PACKAGE_STRINGS 0x04 +#define EFI_HII_PACKAGE_FONTS 0x05 +#define EFI_HII_PACKAGE_IMAGES 0x06 +#define EFI_HII_PACKAGE_SIMPLE_FONTS 0x07 +#define EFI_HII_PACKAGE_DEVICE_PATH 0x08 +#define EFI_HII_PACKAGE_KEYBOARD_LAYOUT 0x09 +#define EFI_HII_PACKAGE_ANIMATIONS 0x0A +#define EFI_HII_PACKAGE_END 0xDF +#define EFI_HII_PACKAGE_TYPE_SYSTEM_BEGIN 0xE0 +#define EFI_HII_PACKAGE_TYPE_SYSTEM_END 0xFF + +// +// Definitions for Simplified Font Package +// + +/// +/// Contents of EFI_NARROW_GLYPH.Attributes. +///@{ +#define EFI_GLYPH_NON_SPACING 0x01 +#define EFI_GLYPH_WIDE 0x02 +#define EFI_GLYPH_HEIGHT 19 +#define EFI_GLYPH_WIDTH 8 +///@} + +/// +/// The EFI_NARROW_GLYPH has a preferred dimension (w x h) of 8 x 19 pixels. +/// +typedef struct { + /// + /// The Unicode representation of the glyph. The term weight is the + /// technical term for a character code. + /// + CHAR16 UnicodeWeight; + /// + /// The data element containing the glyph definitions. + /// + UINT8 Attributes; + /// + /// The column major glyph representation of the character. Bits + /// with values of one indicate that the corresponding pixel is to be + /// on when normally displayed; those with zero are off. + /// + UINT8 GlyphCol1[EFI_GLYPH_HEIGHT]; +} EFI_NARROW_GLYPH; + +/// +/// The EFI_WIDE_GLYPH has a preferred dimension (w x h) of 16 x 19 pixels, which is large enough +/// to accommodate logographic characters. +/// +typedef struct { + /// + /// The Unicode representation of the glyph. The term weight is the + /// technical term for a character code. + /// + CHAR16 UnicodeWeight; + /// + /// The data element containing the glyph definitions. + /// + UINT8 Attributes; + /// + /// The column major glyph representation of the character. Bits + /// with values of one indicate that the corresponding pixel is to be + /// on when normally displayed; those with zero are off. + /// + UINT8 GlyphCol1[EFI_GLYPH_HEIGHT]; + /// + /// The column major glyph representation of the character. Bits + /// with values of one indicate that the corresponding pixel is to be + /// on when normally displayed; those with zero are off. + /// + UINT8 GlyphCol2[EFI_GLYPH_HEIGHT]; + /// + /// Ensures that sizeof (EFI_WIDE_GLYPH) is twice the + /// sizeof (EFI_NARROW_GLYPH). The contents of Pad must + /// be zero. + /// + UINT8 Pad[3]; +} EFI_WIDE_GLYPH; + +/// +/// A simplified font package consists of a font header +/// followed by a series of glyph structures. +/// +typedef struct _EFI_HII_SIMPLE_FONT_PACKAGE_HDR { + EFI_HII_PACKAGE_HEADER Header; + UINT16 NumberOfNarrowGlyphs; + UINT16 NumberOfWideGlyphs; + // EFI_NARROW_GLYPH NarrowGlyphs[]; + // EFI_WIDE_GLYPH WideGlyphs[]; +} EFI_HII_SIMPLE_FONT_PACKAGE_HDR; + +// +// Definitions for Font Package +// Section 27.3.3 +// + +// +// Value for font style +// +#define EFI_HII_FONT_STYLE_NORMAL 0x00000000 +#define EFI_HII_FONT_STYLE_BOLD 0x00000001 +#define EFI_HII_FONT_STYLE_ITALIC 0x00000002 +#define EFI_HII_FONT_STYLE_EMBOSS 0x00010000 +#define EFI_HII_FONT_STYLE_OUTLINE 0x00020000 +#define EFI_HII_FONT_STYLE_SHADOW 0x00040000 +#define EFI_HII_FONT_STYLE_UNDERLINE 0x00080000 +#define EFI_HII_FONT_STYLE_DBL_UNDER 0x00100000 + +typedef struct _EFI_HII_GLYPH_INFO { + UINT16 Width; + UINT16 Height; + INT16 OffsetX; + INT16 OffsetY; + INT16 AdvanceX; +} EFI_HII_GLYPH_INFO; + +/// +/// The fixed header consists of a standard record header, +/// then the character values in this section, the flags +/// (including the encoding method) and the offsets of the glyph +/// information, the glyph bitmaps and the character map. +/// +typedef struct _EFI_HII_FONT_PACKAGE_HDR { + EFI_HII_PACKAGE_HEADER Header; + UINT32 HdrSize; + UINT32 GlyphBlockOffset; + EFI_HII_GLYPH_INFO Cell; + EFI_HII_FONT_STYLE FontStyle; + CHAR16 FontFamily[1]; +} EFI_HII_FONT_PACKAGE_HDR; + +// +// Value of different glyph info block types +// +#define EFI_HII_GIBT_END 0x00 +#define EFI_HII_GIBT_GLYPH 0x10 +#define EFI_HII_GIBT_GLYPHS 0x11 +#define EFI_HII_GIBT_GLYPH_DEFAULT 0x12 +#define EFI_HII_GIBT_GLYPHS_DEFAULT 0x13 +#define EFI_HII_GIBT_DUPLICATE 0x20 +#define EFI_HII_GIBT_SKIP2 0x21 +#define EFI_HII_GIBT_SKIP1 0x22 +#define EFI_HII_GIBT_DEFAULTS 0x23 +#define EFI_HII_GIBT_EXT1 0x30 +#define EFI_HII_GIBT_EXT2 0x31 +#define EFI_HII_GIBT_EXT4 0x32 + +typedef struct _EFI_HII_GLYPH_BLOCK { + UINT8 BlockType; +} EFI_HII_GLYPH_BLOCK; + +// +// Definition of different glyph info block types +// + +typedef struct _EFI_HII_GIBT_DEFAULTS_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + EFI_HII_GLYPH_INFO Cell; +} EFI_HII_GIBT_DEFAULTS_BLOCK; + +typedef struct _EFI_HII_GIBT_DUPLICATE_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + CHAR16 CharValue; +} EFI_HII_GIBT_DUPLICATE_BLOCK; + +typedef struct _EFI_GLYPH_GIBT_END_BLOCK { + EFI_HII_GLYPH_BLOCK Header; +} EFI_GLYPH_GIBT_END_BLOCK; + +typedef struct _EFI_HII_GIBT_EXT1_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + UINT8 BlockType2; + UINT8 Length; +} EFI_HII_GIBT_EXT1_BLOCK; + +typedef struct _EFI_HII_GIBT_EXT2_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + UINT8 BlockType2; + UINT16 Length; +} EFI_HII_GIBT_EXT2_BLOCK; + +typedef struct _EFI_HII_GIBT_EXT4_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + UINT8 BlockType2; + UINT32 Length; +} EFI_HII_GIBT_EXT4_BLOCK; + +typedef struct _EFI_HII_GIBT_GLYPH_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + EFI_HII_GLYPH_INFO Cell; + UINT8 BitmapData[1]; +} EFI_HII_GIBT_GLYPH_BLOCK; + +typedef struct _EFI_HII_GIBT_GLYPHS_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + EFI_HII_GLYPH_INFO Cell; + UINT16 Count; + UINT8 BitmapData[1]; +} EFI_HII_GIBT_GLYPHS_BLOCK; + +typedef struct _EFI_HII_GIBT_GLYPH_DEFAULT_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + UINT8 BitmapData[1]; +} EFI_HII_GIBT_GLYPH_DEFAULT_BLOCK; + +typedef struct _EFI_HII_GIBT_GLYPHS_DEFAULT_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + UINT16 Count; + UINT8 BitmapData[1]; +} EFI_HII_GIBT_GLYPHS_DEFAULT_BLOCK; + +typedef struct _EFI_HII_GIBT_SKIP1_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + UINT8 SkipCount; +} EFI_HII_GIBT_SKIP1_BLOCK; + +typedef struct _EFI_HII_GIBT_SKIP2_BLOCK { + EFI_HII_GLYPH_BLOCK Header; + UINT16 SkipCount; +} EFI_HII_GIBT_SKIP2_BLOCK; + +// +// Definitions for Device Path Package +// Section 27.3.4 +// + +/// +/// The device path package is used to carry a device path +/// associated with the package list. +/// +typedef struct _EFI_HII_DEVICE_PATH_PACKAGE_HDR { + EFI_HII_PACKAGE_HEADER Header; + // EFI_DEVICE_PATH_PROTOCOL DevicePath[]; +} EFI_HII_DEVICE_PATH_PACKAGE_HDR; + +// +// Definitions for GUID Package +// Section 27.3.5 +// + +/// +/// The GUID package is used to carry data where the format is defined by a GUID. +/// +typedef struct _EFI_HII_GUID_PACKAGE_HDR { + EFI_HII_PACKAGE_HEADER Header; + EFI_GUID Guid; + // Data per GUID definition may follow +} EFI_HII_GUID_PACKAGE_HDR; + +// +// Definitions for String Package +// Section 27.3.6 +// + +#define UEFI_CONFIG_LANG "x-UEFI" +#define UEFI_CONFIG_LANG_2 "x-i-UEFI" + +/// +/// The fixed header consists of a standard record header and then the string identifiers +/// contained in this section and the offsets of the string and language information. +/// +typedef struct _EFI_HII_STRING_PACKAGE_HDR { + EFI_HII_PACKAGE_HEADER Header; + UINT32 HdrSize; + UINT32 StringInfoOffset; + CHAR16 LanguageWindow[16]; + EFI_STRING_ID LanguageName; + CHAR8 Language[1]; +} EFI_HII_STRING_PACKAGE_HDR; + +typedef struct { + UINT8 BlockType; +} EFI_HII_STRING_BLOCK; + +// +// Value of different string information block types +// +#define EFI_HII_SIBT_END 0x00 +#define EFI_HII_SIBT_STRING_SCSU 0x10 +#define EFI_HII_SIBT_STRING_SCSU_FONT 0x11 +#define EFI_HII_SIBT_STRINGS_SCSU 0x12 +#define EFI_HII_SIBT_STRINGS_SCSU_FONT 0x13 +#define EFI_HII_SIBT_STRING_UCS2 0x14 +#define EFI_HII_SIBT_STRING_UCS2_FONT 0x15 +#define EFI_HII_SIBT_STRINGS_UCS2 0x16 +#define EFI_HII_SIBT_STRINGS_UCS2_FONT 0x17 +#define EFI_HII_SIBT_DUPLICATE 0x20 +#define EFI_HII_SIBT_SKIP2 0x21 +#define EFI_HII_SIBT_SKIP1 0x22 +#define EFI_HII_SIBT_EXT1 0x30 +#define EFI_HII_SIBT_EXT2 0x31 +#define EFI_HII_SIBT_EXT4 0x32 +#define EFI_HII_SIBT_FONT 0x40 + +// +// Definition of different string information block types +// + +typedef struct _EFI_HII_SIBT_DUPLICATE_BLOCK { + EFI_HII_STRING_BLOCK Header; + EFI_STRING_ID StringId; +} EFI_HII_SIBT_DUPLICATE_BLOCK; + +typedef struct _EFI_HII_SIBT_END_BLOCK { + EFI_HII_STRING_BLOCK Header; +} EFI_HII_SIBT_END_BLOCK; + +typedef struct _EFI_HII_SIBT_EXT1_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 BlockType2; + UINT8 Length; +} EFI_HII_SIBT_EXT1_BLOCK; + +typedef struct _EFI_HII_SIBT_EXT2_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 BlockType2; + UINT16 Length; +} EFI_HII_SIBT_EXT2_BLOCK; + +typedef struct _EFI_HII_SIBT_EXT4_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 BlockType2; + UINT32 Length; +} EFI_HII_SIBT_EXT4_BLOCK; + +typedef struct _EFI_HII_SIBT_FONT_BLOCK { + EFI_HII_SIBT_EXT2_BLOCK Header; + UINT8 FontId; + UINT16 FontSize; + EFI_HII_FONT_STYLE FontStyle; + CHAR16 FontName[1]; +} EFI_HII_SIBT_FONT_BLOCK; + +typedef struct _EFI_HII_SIBT_SKIP1_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 SkipCount; +} EFI_HII_SIBT_SKIP1_BLOCK; + +typedef struct _EFI_HII_SIBT_SKIP2_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT16 SkipCount; +} EFI_HII_SIBT_SKIP2_BLOCK; + +typedef struct _EFI_HII_SIBT_STRING_SCSU_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 StringText[1]; +} EFI_HII_SIBT_STRING_SCSU_BLOCK; + +typedef struct _EFI_HII_SIBT_STRING_SCSU_FONT_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 FontIdentifier; + UINT8 StringText[1]; +} EFI_HII_SIBT_STRING_SCSU_FONT_BLOCK; + +typedef struct _EFI_HII_SIBT_STRINGS_SCSU_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT16 StringCount; + UINT8 StringText[1]; +} EFI_HII_SIBT_STRINGS_SCSU_BLOCK; + +typedef struct _EFI_HII_SIBT_STRINGS_SCSU_FONT_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 FontIdentifier; + UINT16 StringCount; + UINT8 StringText[1]; +} EFI_HII_SIBT_STRINGS_SCSU_FONT_BLOCK; + +typedef struct _EFI_HII_SIBT_STRING_UCS2_BLOCK { + EFI_HII_STRING_BLOCK Header; + CHAR16 StringText[1]; +} EFI_HII_SIBT_STRING_UCS2_BLOCK; + +typedef struct _EFI_HII_SIBT_STRING_UCS2_FONT_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 FontIdentifier; + CHAR16 StringText[1]; +} EFI_HII_SIBT_STRING_UCS2_FONT_BLOCK; + +typedef struct _EFI_HII_SIBT_STRINGS_UCS2_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT16 StringCount; + CHAR16 StringText[1]; +} EFI_HII_SIBT_STRINGS_UCS2_BLOCK; + +typedef struct _EFI_HII_SIBT_STRINGS_UCS2_FONT_BLOCK { + EFI_HII_STRING_BLOCK Header; + UINT8 FontIdentifier; + UINT16 StringCount; + CHAR16 StringText[1]; +} EFI_HII_SIBT_STRINGS_UCS2_FONT_BLOCK; + +// +// Definitions for Image Package +// Section 27.3.7 +// + +typedef struct _EFI_HII_IMAGE_PACKAGE_HDR { + EFI_HII_PACKAGE_HEADER Header; + UINT32 ImageInfoOffset; + UINT32 PaletteInfoOffset; +} EFI_HII_IMAGE_PACKAGE_HDR; + +typedef struct _EFI_HII_IMAGE_BLOCK { + UINT8 BlockType; +} EFI_HII_IMAGE_BLOCK; + +// +// Value of different image information block types +// +#define EFI_HII_IIBT_END 0x00 +#define EFI_HII_IIBT_IMAGE_1BIT 0x10 +#define EFI_HII_IIBT_IMAGE_1BIT_TRANS 0x11 +#define EFI_HII_IIBT_IMAGE_4BIT 0x12 +#define EFI_HII_IIBT_IMAGE_4BIT_TRANS 0x13 +#define EFI_HII_IIBT_IMAGE_8BIT 0x14 +#define EFI_HII_IIBT_IMAGE_8BIT_TRANS 0x15 +#define EFI_HII_IIBT_IMAGE_24BIT 0x16 +#define EFI_HII_IIBT_IMAGE_24BIT_TRANS 0x17 +#define EFI_HII_IIBT_IMAGE_JPEG 0x18 +#define EFI_HII_IIBT_DUPLICATE 0x20 +#define EFI_HII_IIBT_SKIP2 0x21 +#define EFI_HII_IIBT_SKIP1 0x22 +#define EFI_HII_IIBT_EXT1 0x30 +#define EFI_HII_IIBT_EXT2 0x31 +#define EFI_HII_IIBT_EXT4 0x32 + +// +// Definition of different image information block types +// + +typedef struct _EFI_HII_IIBT_END_BLOCK { + EFI_HII_IMAGE_BLOCK Header; +} EFI_HII_IIBT_END_BLOCK; + +typedef struct _EFI_HII_IIBT_EXT1_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 BlockType2; + UINT8 Length; +} EFI_HII_IIBT_EXT1_BLOCK; + +typedef struct _EFI_HII_IIBT_EXT2_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 BlockType2; + UINT16 Length; +} EFI_HII_IIBT_EXT2_BLOCK; + +typedef struct _EFI_HII_IIBT_EXT4_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 BlockType2; + UINT32 Length; +} EFI_HII_IIBT_EXT4_BLOCK; + +typedef struct _EFI_HII_IIBT_IMAGE_1BIT_BASE { + UINT16 Width; + UINT16 Height; + UINT8 Data[1]; +} EFI_HII_IIBT_IMAGE_1BIT_BASE; + +typedef struct _EFI_HII_IIBT_IMAGE_1BIT_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 PaletteIndex; + EFI_HII_IIBT_IMAGE_1BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_1BIT_BLOCK; + +typedef struct _EFI_HII_IIBT_IMAGE_1BIT_TRANS_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 PaletteIndex; + EFI_HII_IIBT_IMAGE_1BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_1BIT_TRANS_BLOCK; + +typedef struct _EFI_HII_RGB_PIXEL { + UINT8 b; + UINT8 g; + UINT8 r; +} EFI_HII_RGB_PIXEL; + +typedef struct _EFI_HII_IIBT_IMAGE_24BIT_BASE { + UINT16 Width; + UINT16 Height; + EFI_HII_RGB_PIXEL Bitmap[1]; +} EFI_HII_IIBT_IMAGE_24BIT_BASE; + +typedef struct _EFI_HII_IIBT_IMAGE_24BIT_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + EFI_HII_IIBT_IMAGE_24BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_24BIT_BLOCK; + +typedef struct _EFI_HII_IIBT_IMAGE_24BIT_TRANS_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + EFI_HII_IIBT_IMAGE_24BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_24BIT_TRANS_BLOCK; + +typedef struct _EFI_HII_IIBT_IMAGE_4BIT_BASE { + UINT16 Width; + UINT16 Height; + UINT8 Data[1]; +} EFI_HII_IIBT_IMAGE_4BIT_BASE; + +typedef struct _EFI_HII_IIBT_IMAGE_4BIT_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 PaletteIndex; + EFI_HII_IIBT_IMAGE_4BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_4BIT_BLOCK; + +typedef struct _EFI_HII_IIBT_IMAGE_4BIT_TRANS_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 PaletteIndex; + EFI_HII_IIBT_IMAGE_4BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_4BIT_TRANS_BLOCK; + +typedef struct _EFI_HII_IIBT_IMAGE_8BIT_BASE { + UINT16 Width; + UINT16 Height; + UINT8 Data[1]; +} EFI_HII_IIBT_IMAGE_8BIT_BASE; + +typedef struct _EFI_HII_IIBT_IMAGE_8BIT_PALETTE_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 PaletteIndex; + EFI_HII_IIBT_IMAGE_8BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_8BIT_BLOCK; + +typedef struct _EFI_HII_IIBT_IMAGE_8BIT_TRANS_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 PaletteIndex; + EFI_HII_IIBT_IMAGE_8BIT_BASE Bitmap; +} EFI_HII_IIBT_IMAGE_8BIT_TRAN_BLOCK; + +typedef struct _EFI_HII_IIBT_DUPLICATE_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + EFI_IMAGE_ID ImageId; +} EFI_HII_IIBT_DUPLICATE_BLOCK; + +typedef struct _EFI_HII_IIBT_JPEG_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT32 Size; + UINT8 Data[1]; +} EFI_HII_IIBT_JPEG_BLOCK; + +typedef struct _EFI_HII_IIBT_SKIP1_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT8 SkipCount; +} EFI_HII_IIBT_SKIP1_BLOCK; + +typedef struct _EFI_HII_IIBT_SKIP2_BLOCK { + EFI_HII_IMAGE_BLOCK Header; + UINT16 SkipCount; +} EFI_HII_IIBT_SKIP2_BLOCK; + +// +// Definitions for Palette Information +// + +typedef struct _EFI_HII_IMAGE_PALETTE_INFO_HEADER { + UINT16 PaletteCount; +} EFI_HII_IMAGE_PALETTE_INFO_HEADER; + +typedef struct _EFI_HII_IMAGE_PALETTE_INFO { + UINT16 PaletteSize; + EFI_HII_RGB_PIXEL PaletteValue[1]; +} EFI_HII_IMAGE_PALETTE_INFO; + +// +// Definitions for Forms Package +// Section 27.3.8 +// + +/// +/// The Form package is used to carry form-based encoding data. +/// +typedef struct _EFI_HII_FORM_PACKAGE_HDR { + EFI_HII_PACKAGE_HEADER Header; + // EFI_IFR_OP_HEADER OpCodeHeader; + // More op-codes follow +} EFI_HII_FORM_PACKAGE_HDR; + +typedef struct { + UINT8 Hour; + UINT8 Minute; + UINT8 Second; +} EFI_HII_TIME; + +typedef struct { + UINT16 Year; + UINT8 Month; + UINT8 Day; +} EFI_HII_DATE; + +typedef struct { + EFI_QUESTION_ID QuestionId; + EFI_FORM_ID FormId; + EFI_GUID FormSetGuid; + EFI_STRING_ID DevicePath; +} EFI_HII_REF; + +typedef union { + UINT8 u8; + UINT16 u16; + UINT32 u32; + UINT64 u64; + BOOLEAN b; + EFI_HII_TIME time; + EFI_HII_DATE date; + EFI_STRING_ID string; ///< EFI_IFR_TYPE_STRING, EFI_IFR_TYPE_ACTION + EFI_HII_REF ref; ///< EFI_IFR_TYPE_REF + // UINT8 buffer[]; ///< EFI_IFR_TYPE_BUFFER +} EFI_IFR_TYPE_VALUE; + +// +// IFR Opcodes +// +#define EFI_IFR_FORM_OP 0x01 +#define EFI_IFR_SUBTITLE_OP 0x02 +#define EFI_IFR_TEXT_OP 0x03 +#define EFI_IFR_IMAGE_OP 0x04 +#define EFI_IFR_ONE_OF_OP 0x05 +#define EFI_IFR_CHECKBOX_OP 0x06 +#define EFI_IFR_NUMERIC_OP 0x07 +#define EFI_IFR_PASSWORD_OP 0x08 +#define EFI_IFR_ONE_OF_OPTION_OP 0x09 +#define EFI_IFR_SUPPRESS_IF_OP 0x0A +#define EFI_IFR_LOCKED_OP 0x0B +#define EFI_IFR_ACTION_OP 0x0C +#define EFI_IFR_RESET_BUTTON_OP 0x0D +#define EFI_IFR_FORM_SET_OP 0x0E +#define EFI_IFR_REF_OP 0x0F +#define EFI_IFR_NO_SUBMIT_IF_OP 0x10 +#define EFI_IFR_INCONSISTENT_IF_OP 0x11 +#define EFI_IFR_EQ_ID_VAL_OP 0x12 +#define EFI_IFR_EQ_ID_ID_OP 0x13 +#define EFI_IFR_EQ_ID_VAL_LIST_OP 0x14 +#define EFI_IFR_AND_OP 0x15 +#define EFI_IFR_OR_OP 0x16 +#define EFI_IFR_NOT_OP 0x17 +#define EFI_IFR_RULE_OP 0x18 +#define EFI_IFR_GRAY_OUT_IF_OP 0x19 +#define EFI_IFR_DATE_OP 0x1A +#define EFI_IFR_TIME_OP 0x1B +#define EFI_IFR_STRING_OP 0x1C +#define EFI_IFR_REFRESH_OP 0x1D +#define EFI_IFR_DISABLE_IF_OP 0x1E +#define EFI_IFR_ANIMATION_OP 0x1F +#define EFI_IFR_TO_LOWER_OP 0x20 +#define EFI_IFR_TO_UPPER_OP 0x21 +#define EFI_IFR_MAP_OP 0x22 +#define EFI_IFR_ORDERED_LIST_OP 0x23 +#define EFI_IFR_VARSTORE_OP 0x24 +#define EFI_IFR_VARSTORE_NAME_VALUE_OP 0x25 +#define EFI_IFR_VARSTORE_EFI_OP 0x26 +#define EFI_IFR_VARSTORE_DEVICE_OP 0x27 +#define EFI_IFR_VERSION_OP 0x28 +#define EFI_IFR_END_OP 0x29 +#define EFI_IFR_MATCH_OP 0x2A +#define EFI_IFR_GET_OP 0x2B +#define EFI_IFR_SET_OP 0x2C +#define EFI_IFR_READ_OP 0x2D +#define EFI_IFR_WRITE_OP 0x2E +#define EFI_IFR_EQUAL_OP 0x2F +#define EFI_IFR_NOT_EQUAL_OP 0x30 +#define EFI_IFR_GREATER_THAN_OP 0x31 +#define EFI_IFR_GREATER_EQUAL_OP 0x32 +#define EFI_IFR_LESS_THAN_OP 0x33 +#define EFI_IFR_LESS_EQUAL_OP 0x34 +#define EFI_IFR_BITWISE_AND_OP 0x35 +#define EFI_IFR_BITWISE_OR_OP 0x36 +#define EFI_IFR_BITWISE_NOT_OP 0x37 +#define EFI_IFR_SHIFT_LEFT_OP 0x38 +#define EFI_IFR_SHIFT_RIGHT_OP 0x39 +#define EFI_IFR_ADD_OP 0x3A +#define EFI_IFR_SUBTRACT_OP 0x3B +#define EFI_IFR_MULTIPLY_OP 0x3C +#define EFI_IFR_DIVIDE_OP 0x3D +#define EFI_IFR_MODULO_OP 0x3E +#define EFI_IFR_RULE_REF_OP 0x3F +#define EFI_IFR_QUESTION_REF1_OP 0x40 +#define EFI_IFR_QUESTION_REF2_OP 0x41 +#define EFI_IFR_UINT8_OP 0x42 +#define EFI_IFR_UINT16_OP 0x43 +#define EFI_IFR_UINT32_OP 0x44 +#define EFI_IFR_UINT64_OP 0x45 +#define EFI_IFR_TRUE_OP 0x46 +#define EFI_IFR_FALSE_OP 0x47 +#define EFI_IFR_TO_UINT_OP 0x48 +#define EFI_IFR_TO_STRING_OP 0x49 +#define EFI_IFR_TO_BOOLEAN_OP 0x4A +#define EFI_IFR_MID_OP 0x4B +#define EFI_IFR_FIND_OP 0x4C +#define EFI_IFR_TOKEN_OP 0x4D +#define EFI_IFR_STRING_REF1_OP 0x4E +#define EFI_IFR_STRING_REF2_OP 0x4F +#define EFI_IFR_CONDITIONAL_OP 0x50 +#define EFI_IFR_QUESTION_REF3_OP 0x51 +#define EFI_IFR_ZERO_OP 0x52 +#define EFI_IFR_ONE_OP 0x53 +#define EFI_IFR_ONES_OP 0x54 +#define EFI_IFR_UNDEFINED_OP 0x55 +#define EFI_IFR_LENGTH_OP 0x56 +#define EFI_IFR_DUP_OP 0x57 +#define EFI_IFR_THIS_OP 0x58 +#define EFI_IFR_SPAN_OP 0x59 +#define EFI_IFR_VALUE_OP 0x5A +#define EFI_IFR_DEFAULT_OP 0x5B +#define EFI_IFR_DEFAULTSTORE_OP 0x5C +#define EFI_IFR_FORM_MAP_OP 0x5D +#define EFI_IFR_CATENATE_OP 0x5E +#define EFI_IFR_GUID_OP 0x5F +#define EFI_IFR_SECURITY_OP 0x60 +#define EFI_IFR_MODAL_TAG_OP 0x61 +#define EFI_IFR_REFRESH_ID_OP 0x62 +#define EFI_IFR_WARNING_IF_OP 0x63 + +// +// Definitions of IFR Standard Headers +// Section 27.3.8.2 +// + +typedef struct _EFI_IFR_OP_HEADER { + UINT8 OpCode; + UINT8 Length:7; + UINT8 Scope:1; +} EFI_IFR_OP_HEADER; + +typedef struct _EFI_IFR_STATEMENT_HEADER { + EFI_STRING_ID Prompt; + EFI_STRING_ID Help; +} EFI_IFR_STATEMENT_HEADER; + +typedef struct _EFI_IFR_QUESTION_HEADER { + EFI_IFR_STATEMENT_HEADER Header; + EFI_QUESTION_ID QuestionId; + EFI_VARSTORE_ID VarStoreId; + union { + EFI_STRING_ID VarName; + UINT16 VarOffset; + } VarStoreInfo; + UINT8 Flags; +} EFI_IFR_QUESTION_HEADER; + +// +// Flag values of EFI_IFR_QUESTION_HEADER +// +#define EFI_IFR_FLAG_READ_ONLY 0x01 +#define EFI_IFR_FLAG_CALLBACK 0x04 +#define EFI_IFR_FLAG_RESET_REQUIRED 0x10 +#define EFI_IFR_FLAG_OPTIONS_ONLY 0x80 + +// +// Definition for Opcode Reference +// Section 27.3.8.3 +// +typedef struct _EFI_IFR_DEFAULTSTORE { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID DefaultName; + UINT16 DefaultId; +} EFI_IFR_DEFAULTSTORE; + +// +// Default Identifier of default store +// +#define EFI_HII_DEFAULT_CLASS_STANDARD 0x0000 +#define EFI_HII_DEFAULT_CLASS_MANUFACTURING 0x0001 +#define EFI_HII_DEFAULT_CLASS_SAFE 0x0002 +#define EFI_HII_DEFAULT_CLASS_PLATFORM_BEGIN 0x4000 +#define EFI_HII_DEFAULT_CLASS_PLATFORM_END 0x7fff +#define EFI_HII_DEFAULT_CLASS_HARDWARE_BEGIN 0x8000 +#define EFI_HII_DEFAULT_CLASS_HARDWARE_END 0xbfff +#define EFI_HII_DEFAULT_CLASS_FIRMWARE_BEGIN 0xc000 +#define EFI_HII_DEFAULT_CLASS_FIRMWARE_END 0xffff + +typedef struct _EFI_IFR_VARSTORE { + EFI_IFR_OP_HEADER Header; + EFI_GUID Guid; + EFI_VARSTORE_ID VarStoreId; + UINT16 Size; + UINT8 Name[1]; +} EFI_IFR_VARSTORE; + +typedef struct _EFI_IFR_VARSTORE_EFI { + EFI_IFR_OP_HEADER Header; + EFI_VARSTORE_ID VarStoreId; + EFI_GUID Guid; + UINT32 Attributes; + UINT16 Size; + UINT8 Name[1]; +} EFI_IFR_VARSTORE_EFI; + +typedef struct _EFI_IFR_VARSTORE_NAME_VALUE { + EFI_IFR_OP_HEADER Header; + EFI_VARSTORE_ID VarStoreId; + EFI_GUID Guid; +} EFI_IFR_VARSTORE_NAME_VALUE; + +typedef struct _EFI_IFR_FORM_SET { + EFI_IFR_OP_HEADER Header; + EFI_GUID Guid; + EFI_STRING_ID FormSetTitle; + EFI_STRING_ID Help; + UINT8 Flags; + // EFI_GUID ClassGuid[]; +} EFI_IFR_FORM_SET; + +typedef struct _EFI_IFR_END { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_END; + +typedef struct _EFI_IFR_FORM { + EFI_IFR_OP_HEADER Header; + UINT16 FormId; + EFI_STRING_ID FormTitle; +} EFI_IFR_FORM; + +typedef struct _EFI_IFR_IMAGE { + EFI_IFR_OP_HEADER Header; + EFI_IMAGE_ID Id; +} EFI_IFR_IMAGE; + +typedef struct _EFI_IFR_MODAL_TAG { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_MODAL_TAG; + +typedef struct _EFI_IFR_LOCKED { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_LOCKED; + +typedef struct _EFI_IFR_RULE { + EFI_IFR_OP_HEADER Header; + UINT8 RuleId; +} EFI_IFR_RULE; + +typedef struct _EFI_IFR_DEFAULT { + EFI_IFR_OP_HEADER Header; + UINT16 DefaultId; + UINT8 Type; + EFI_IFR_TYPE_VALUE Value; +} EFI_IFR_DEFAULT; + +typedef struct _EFI_IFR_DEFAULT_2 { + EFI_IFR_OP_HEADER Header; + UINT16 DefaultId; + UINT8 Type; +} EFI_IFR_DEFAULT_2; + +typedef struct _EFI_IFR_VALUE { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_VALUE; + +typedef struct _EFI_IFR_SUBTITLE { + EFI_IFR_OP_HEADER Header; + EFI_IFR_STATEMENT_HEADER Statement; + UINT8 Flags; +} EFI_IFR_SUBTITLE; + +#define EFI_IFR_FLAGS_HORIZONTAL 0x01 + +typedef struct _EFI_IFR_CHECKBOX { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT8 Flags; +} EFI_IFR_CHECKBOX; + +#define EFI_IFR_CHECKBOX_DEFAULT 0x01 +#define EFI_IFR_CHECKBOX_DEFAULT_MFG 0x02 + +typedef struct _EFI_IFR_TEXT { + EFI_IFR_OP_HEADER Header; + EFI_IFR_STATEMENT_HEADER Statement; + EFI_STRING_ID TextTwo; +} EFI_IFR_TEXT; + +typedef struct _EFI_IFR_REF { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + EFI_FORM_ID FormId; +} EFI_IFR_REF; + +typedef struct _EFI_IFR_REF2 { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + EFI_FORM_ID FormId; + EFI_QUESTION_ID QuestionId; +} EFI_IFR_REF2; + +typedef struct _EFI_IFR_REF3 { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + EFI_FORM_ID FormId; + EFI_QUESTION_ID QuestionId; + EFI_GUID FormSetId; +} EFI_IFR_REF3; + +typedef struct _EFI_IFR_REF4 { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + EFI_FORM_ID FormId; + EFI_QUESTION_ID QuestionId; + EFI_GUID FormSetId; + EFI_STRING_ID DevicePath; +} EFI_IFR_REF4; + +typedef struct _EFI_IFR_REF5 { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; +} EFI_IFR_REF5; + +typedef struct _EFI_IFR_RESET_BUTTON { + EFI_IFR_OP_HEADER Header; + EFI_IFR_STATEMENT_HEADER Statement; + EFI_DEFAULT_ID DefaultId; +} EFI_IFR_RESET_BUTTON; + +typedef struct _EFI_IFR_ACTION { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + EFI_STRING_ID QuestionConfig; +} EFI_IFR_ACTION; + +typedef struct _EFI_IFR_ACTION_1 { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; +} EFI_IFR_ACTION_1; + +typedef struct _EFI_IFR_DATE { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT8 Flags; +} EFI_IFR_DATE; + +// +// Flags that describe the behavior of the question. +// +#define EFI_QF_DATE_YEAR_SUPPRESS 0x01 +#define EFI_QF_DATE_MONTH_SUPPRESS 0x02 +#define EFI_QF_DATE_DAY_SUPPRESS 0x04 + +#define EFI_QF_DATE_STORAGE 0x30 +#define QF_DATE_STORAGE_NORMAL 0x00 +#define QF_DATE_STORAGE_TIME 0x10 +#define QF_DATE_STORAGE_WAKEUP 0x20 + +typedef union { + struct { + UINT8 MinValue; + UINT8 MaxValue; + UINT8 Step; + } u8; + struct { + UINT16 MinValue; + UINT16 MaxValue; + UINT16 Step; + } u16; + struct { + UINT32 MinValue; + UINT32 MaxValue; + UINT32 Step; + } u32; + struct { + UINT64 MinValue; + UINT64 MaxValue; + UINT64 Step; + } u64; +} MINMAXSTEP_DATA; + +typedef struct _EFI_IFR_NUMERIC { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT8 Flags; + MINMAXSTEP_DATA data; +} EFI_IFR_NUMERIC; + +// +// Flags related to the numeric question +// +#define EFI_IFR_NUMERIC_SIZE 0x03 +#define EFI_IFR_NUMERIC_SIZE_1 0x00 +#define EFI_IFR_NUMERIC_SIZE_2 0x01 +#define EFI_IFR_NUMERIC_SIZE_4 0x02 +#define EFI_IFR_NUMERIC_SIZE_8 0x03 + +#define EFI_IFR_DISPLAY 0x30 +#define EFI_IFR_DISPLAY_INT_DEC 0x00 +#define EFI_IFR_DISPLAY_UINT_DEC 0x10 +#define EFI_IFR_DISPLAY_UINT_HEX 0x20 + +typedef struct _EFI_IFR_ONE_OF { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT8 Flags; + MINMAXSTEP_DATA data; +} EFI_IFR_ONE_OF; + +typedef struct _EFI_IFR_STRING { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT8 MinSize; + UINT8 MaxSize; + UINT8 Flags; +} EFI_IFR_STRING; + +#define EFI_IFR_STRING_MULTI_LINE 0x01 + +typedef struct _EFI_IFR_PASSWORD { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT16 MinSize; + UINT16 MaxSize; +} EFI_IFR_PASSWORD; + +typedef struct _EFI_IFR_ORDERED_LIST { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT8 MaxContainers; + UINT8 Flags; +} EFI_IFR_ORDERED_LIST; + +#define EFI_IFR_UNIQUE_SET 0x01 +#define EFI_IFR_NO_EMPTY_SET 0x02 + +typedef struct _EFI_IFR_TIME { + EFI_IFR_OP_HEADER Header; + EFI_IFR_QUESTION_HEADER Question; + UINT8 Flags; +} EFI_IFR_TIME; + +// +// A bit-mask that determines which unique settings are active for this opcode. +// +#define QF_TIME_HOUR_SUPPRESS 0x01 +#define QF_TIME_MINUTE_SUPPRESS 0x02 +#define QF_TIME_SECOND_SUPPRESS 0x04 + +#define QF_TIME_STORAGE 0x30 +#define QF_TIME_STORAGE_NORMAL 0x00 +#define QF_TIME_STORAGE_TIME 0x10 +#define QF_TIME_STORAGE_WAKEUP 0x20 + +typedef struct _EFI_IFR_DISABLE_IF { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_DISABLE_IF; + +typedef struct _EFI_IFR_SUPPRESS_IF { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_SUPPRESS_IF; + +typedef struct _EFI_IFR_GRAY_OUT_IF { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_GRAY_OUT_IF; + +typedef struct _EFI_IFR_INCONSISTENT_IF { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID Error; +} EFI_IFR_INCONSISTENT_IF; + +typedef struct _EFI_IFR_NO_SUBMIT_IF { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID Error; +} EFI_IFR_NO_SUBMIT_IF; + +typedef struct _EFI_IFR_WARNING_IF { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID Warning; + UINT8 TimeOut; +} EFI_IFR_WARNING_IF; + +typedef struct _EFI_IFR_REFRESH { + EFI_IFR_OP_HEADER Header; + UINT8 RefreshInterval; +} EFI_IFR_REFRESH; + +typedef struct _EFI_IFR_VARSTORE_DEVICE { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID DevicePath; +} EFI_IFR_VARSTORE_DEVICE; + +typedef struct _EFI_IFR_ONE_OF_OPTION { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID Option; + UINT8 Flags; + UINT8 Type; + EFI_IFR_TYPE_VALUE Value; +} EFI_IFR_ONE_OF_OPTION; + +// +// Types of the option's value. +// +#define EFI_IFR_TYPE_NUM_SIZE_8 0x00 +#define EFI_IFR_TYPE_NUM_SIZE_16 0x01 +#define EFI_IFR_TYPE_NUM_SIZE_32 0x02 +#define EFI_IFR_TYPE_NUM_SIZE_64 0x03 +#define EFI_IFR_TYPE_BOOLEAN 0x04 +#define EFI_IFR_TYPE_TIME 0x05 +#define EFI_IFR_TYPE_DATE 0x06 +#define EFI_IFR_TYPE_STRING 0x07 +#define EFI_IFR_TYPE_OTHER 0x08 +#define EFI_IFR_TYPE_UNDEFINED 0x09 +#define EFI_IFR_TYPE_ACTION 0x0A +#define EFI_IFR_TYPE_BUFFER 0x0B +#define EFI_IFR_TYPE_REF 0x0C + +#define EFI_IFR_OPTION_DEFAULT 0x10 +#define EFI_IFR_OPTION_DEFAULT_MFG 0x20 + +typedef struct _EFI_IFR_GUID { + EFI_IFR_OP_HEADER Header; + EFI_GUID Guid; + //Optional Data Follows +} EFI_IFR_GUID; + +typedef struct _EFI_IFR_REFRESH_ID { + EFI_IFR_OP_HEADER Header; + EFI_GUID RefreshEventGroupId; +} EFI_IFR_REFRESH_ID; + +typedef struct _EFI_IFR_DUP { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_DUP; + +typedef struct _EFI_IFR_EQ_ID_ID { + EFI_IFR_OP_HEADER Header; + EFI_QUESTION_ID QuestionId1; + EFI_QUESTION_ID QuestionId2; +} EFI_IFR_EQ_ID_ID; + +typedef struct _EFI_IFR_EQ_ID_VAL { + EFI_IFR_OP_HEADER Header; + EFI_QUESTION_ID QuestionId; + UINT16 Value; +} EFI_IFR_EQ_ID_VAL; + +typedef struct _EFI_IFR_EQ_ID_VAL_LIST { + EFI_IFR_OP_HEADER Header; + EFI_QUESTION_ID QuestionId; + UINT16 ListLength; + UINT16 ValueList[1]; +} EFI_IFR_EQ_ID_VAL_LIST; + +typedef struct _EFI_IFR_UINT8 { + EFI_IFR_OP_HEADER Header; + UINT8 Value; +} EFI_IFR_UINT8; + +typedef struct _EFI_IFR_UINT16 { + EFI_IFR_OP_HEADER Header; + UINT16 Value; +} EFI_IFR_UINT16; + +typedef struct _EFI_IFR_UINT32 { + EFI_IFR_OP_HEADER Header; + UINT32 Value; +} EFI_IFR_UINT32; + +typedef struct _EFI_IFR_UINT64 { + EFI_IFR_OP_HEADER Header; + UINT64 Value; +} EFI_IFR_UINT64; + +typedef struct _EFI_IFR_QUESTION_REF1 { + EFI_IFR_OP_HEADER Header; + EFI_QUESTION_ID QuestionId; +} EFI_IFR_QUESTION_REF1; + +typedef struct _EFI_IFR_QUESTION_REF2 { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_QUESTION_REF2; + +typedef struct _EFI_IFR_QUESTION_REF3 { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_QUESTION_REF3; + +typedef struct _EFI_IFR_QUESTION_REF3_2 { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID DevicePath; +} EFI_IFR_QUESTION_REF3_2; + +typedef struct _EFI_IFR_QUESTION_REF3_3 { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID DevicePath; + EFI_GUID Guid; +} EFI_IFR_QUESTION_REF3_3; + +typedef struct _EFI_IFR_RULE_REF { + EFI_IFR_OP_HEADER Header; + UINT8 RuleId; +} EFI_IFR_RULE_REF; + +typedef struct _EFI_IFR_STRING_REF1 { + EFI_IFR_OP_HEADER Header; + EFI_STRING_ID StringId; +} EFI_IFR_STRING_REF1; + +typedef struct _EFI_IFR_STRING_REF2 { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_STRING_REF2; + +typedef struct _EFI_IFR_THIS { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_THIS; + +typedef struct _EFI_IFR_TRUE { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_TRUE; + +typedef struct _EFI_IFR_FALSE { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_FALSE; + +typedef struct _EFI_IFR_ONE { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_ONE; + +typedef struct _EFI_IFR_ONES { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_ONES; + +typedef struct _EFI_IFR_ZERO { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_ZERO; + +typedef struct _EFI_IFR_UNDEFINED { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_UNDEFINED; + +typedef struct _EFI_IFR_VERSION { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_VERSION; + +typedef struct _EFI_IFR_LENGTH { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_LENGTH; + +typedef struct _EFI_IFR_NOT { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_NOT; + +typedef struct _EFI_IFR_BITWISE_NOT { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_BITWISE_NOT; + +typedef struct _EFI_IFR_TO_BOOLEAN { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_TO_BOOLEAN; + +/// +/// For EFI_IFR_TO_STRING, when converting from +/// unsigned integers, these flags control the format: +/// 0 = unsigned decimal. +/// 1 = signed decimal. +/// 2 = hexadecimal (lower-case alpha). +/// 3 = hexadecimal (upper-case alpha). +///@{ +#define EFI_IFR_STRING_UNSIGNED_DEC 0 +#define EFI_IFR_STRING_SIGNED_DEC 1 +#define EFI_IFR_STRING_LOWERCASE_HEX 2 +#define EFI_IFR_STRING_UPPERCASE_HEX 3 +///@} + +/// +/// When converting from a buffer, these flags control the format: +/// 0 = ASCII. +/// 8 = Unicode. +///@{ +#define EFI_IFR_STRING_ASCII 0 +#define EFI_IFR_STRING_UNICODE 8 +///@} + +typedef struct _EFI_IFR_TO_STRING { + EFI_IFR_OP_HEADER Header; + UINT8 Format; +} EFI_IFR_TO_STRING; + +typedef struct _EFI_IFR_TO_UINT { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_TO_UINT; + +typedef struct _EFI_IFR_TO_UPPER { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_TO_UPPER; + +typedef struct _EFI_IFR_TO_LOWER { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_TO_LOWER; + +typedef struct _EFI_IFR_ADD { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_ADD; + +typedef struct _EFI_IFR_AND { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_AND; + +typedef struct _EFI_IFR_BITWISE_AND { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_BITWISE_AND; + +typedef struct _EFI_IFR_BITWISE_OR { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_BITWISE_OR; + +typedef struct _EFI_IFR_CATENATE { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_CATENATE; + +typedef struct _EFI_IFR_DIVIDE { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_DIVIDE; + +typedef struct _EFI_IFR_EQUAL { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_EQUAL; + +typedef struct _EFI_IFR_GREATER_EQUAL { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_GREATER_EQUAL; + +typedef struct _EFI_IFR_GREATER_THAN { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_GREATER_THAN; + +typedef struct _EFI_IFR_LESS_EQUAL { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_LESS_EQUAL; + +typedef struct _EFI_IFR_LESS_THAN { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_LESS_THAN; + +typedef struct _EFI_IFR_MATCH { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_MATCH; + +typedef struct _EFI_IFR_MULTIPLY { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_MULTIPLY; + +typedef struct _EFI_IFR_MODULO { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_MODULO; + +typedef struct _EFI_IFR_NOT_EQUAL { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_NOT_EQUAL; + +typedef struct _EFI_IFR_OR { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_OR; + +typedef struct _EFI_IFR_SHIFT_LEFT { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_SHIFT_LEFT; + +typedef struct _EFI_IFR_SHIFT_RIGHT { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_SHIFT_RIGHT; + +typedef struct _EFI_IFR_SUBTRACT { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_SUBTRACT; + +typedef struct _EFI_IFR_CONDITIONAL { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_CONDITIONAL; + +// +// Flags governing the matching criteria of EFI_IFR_FIND +// +#define EFI_IFR_FF_CASE_SENSITIVE 0x00 +#define EFI_IFR_FF_CASE_INSENSITIVE 0x01 + +typedef struct _EFI_IFR_FIND { + EFI_IFR_OP_HEADER Header; + UINT8 Format; +} EFI_IFR_FIND; + +typedef struct _EFI_IFR_MID { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_MID; + +typedef struct _EFI_IFR_TOKEN { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_TOKEN; + +// +// Flags specifying whether to find the first matching string +// or the first non-matching string. +// +#define EFI_IFR_FLAGS_FIRST_MATCHING 0x00 +#define EFI_IFR_FLAGS_FIRST_NON_MATCHING 0x01 + +typedef struct _EFI_IFR_SPAN { + EFI_IFR_OP_HEADER Header; + UINT8 Flags; +} EFI_IFR_SPAN; + +typedef struct _EFI_IFR_SECURITY { + /// + /// Standard opcode header, where Header.Op = EFI_IFR_SECURITY_OP. + /// + EFI_IFR_OP_HEADER Header; + /// + /// Security permission level. + /// + EFI_GUID Permissions; +} EFI_IFR_SECURITY; + +typedef struct _EFI_IFR_FORM_MAP_METHOD { + /// + /// The string identifier which provides the human-readable name of + /// the configuration method for this standards map form. + /// + EFI_STRING_ID MethodTitle; + /// + /// Identifier which uniquely specifies the configuration methods + /// associated with this standards map form. + /// + EFI_GUID MethodIdentifier; +} EFI_IFR_FORM_MAP_METHOD; + +typedef struct _EFI_IFR_FORM_MAP { + /// + /// The sequence that defines the type of opcode as well as the length + /// of the opcode being defined. Header.OpCode = EFI_IFR_FORM_MAP_OP. + /// + EFI_IFR_OP_HEADER Header; + /// + /// The unique identifier for this particular form. + /// + EFI_FORM_ID FormId; + /// + /// One or more configuration method's name and unique identifier. + /// + // EFI_IFR_FORM_MAP_METHOD Methods[]; +} EFI_IFR_FORM_MAP; + +typedef struct _EFI_IFR_SET { + /// + /// The sequence that defines the type of opcode as well as the length + /// of the opcode being defined. Header.OpCode = EFI_IFR_SET_OP. + /// + EFI_IFR_OP_HEADER Header; + /// + /// Specifies the identifier of a previously declared variable store to + /// use when storing the question's value. + /// + EFI_VARSTORE_ID VarStoreId; + union { + /// + /// A 16-bit Buffer Storage offset. + /// + EFI_STRING_ID VarName; + /// + /// A Name Value or EFI Variable name (VarName). + /// + UINT16 VarOffset; + } VarStoreInfo; + /// + /// Specifies the type used for storage. + /// + UINT8 VarStoreType; +} EFI_IFR_SET; + +typedef struct _EFI_IFR_GET { + /// + /// The sequence that defines the type of opcode as well as the length + /// of the opcode being defined. Header.OpCode = EFI_IFR_GET_OP. + /// + EFI_IFR_OP_HEADER Header; + /// + /// Specifies the identifier of a previously declared variable store to + /// use when retrieving the value. + /// + EFI_VARSTORE_ID VarStoreId; + union { + /// + /// A 16-bit Buffer Storage offset. + /// + EFI_STRING_ID VarName; + /// + /// A Name Value or EFI Variable name (VarName). + /// + UINT16 VarOffset; + } VarStoreInfo; + /// + /// Specifies the type used for storage. + /// + UINT8 VarStoreType; +} EFI_IFR_GET; + +typedef struct _EFI_IFR_READ { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_READ; + +typedef struct _EFI_IFR_WRITE { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_WRITE; + +typedef struct _EFI_IFR_MAP { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_MAP; +// +// Definitions for Keyboard Package +// Releated definitions are in Section of EFI_HII_DATABASE_PROTOCOL +// + +/// +/// Each enumeration values maps a physical key on a keyboard. +/// +typedef enum { + EfiKeyLCtrl, + EfiKeyA0, + EfiKeyLAlt, + EfiKeySpaceBar, + EfiKeyA2, + EfiKeyA3, + EfiKeyA4, + EfiKeyRCtrl, + EfiKeyLeftArrow, + EfiKeyDownArrow, + EfiKeyRightArrow, + EfiKeyZero, + EfiKeyPeriod, + EfiKeyEnter, + EfiKeyLShift, + EfiKeyB0, + EfiKeyB1, + EfiKeyB2, + EfiKeyB3, + EfiKeyB4, + EfiKeyB5, + EfiKeyB6, + EfiKeyB7, + EfiKeyB8, + EfiKeyB9, + EfiKeyB10, + EfiKeyRShift, + EfiKeyUpArrow, + EfiKeyOne, + EfiKeyTwo, + EfiKeyThree, + EfiKeyCapsLock, + EfiKeyC1, + EfiKeyC2, + EfiKeyC3, + EfiKeyC4, + EfiKeyC5, + EfiKeyC6, + EfiKeyC7, + EfiKeyC8, + EfiKeyC9, + EfiKeyC10, + EfiKeyC11, + EfiKeyC12, + EfiKeyFour, + EfiKeyFive, + EfiKeySix, + EfiKeyPlus, + EfiKeyTab, + EfiKeyD1, + EfiKeyD2, + EfiKeyD3, + EfiKeyD4, + EfiKeyD5, + EfiKeyD6, + EfiKeyD7, + EfiKeyD8, + EfiKeyD9, + EfiKeyD10, + EfiKeyD11, + EfiKeyD12, + EfiKeyD13, + EfiKeyDel, + EfiKeyEnd, + EfiKeyPgDn, + EfiKeySeven, + EfiKeyEight, + EfiKeyNine, + EfiKeyE0, + EfiKeyE1, + EfiKeyE2, + EfiKeyE3, + EfiKeyE4, + EfiKeyE5, + EfiKeyE6, + EfiKeyE7, + EfiKeyE8, + EfiKeyE9, + EfiKeyE10, + EfiKeyE11, + EfiKeyE12, + EfiKeyBackSpace, + EfiKeyIns, + EfiKeyHome, + EfiKeyPgUp, + EfiKeyNLck, + EfiKeySlash, + EfiKeyAsterisk, + EfiKeyMinus, + EfiKeyEsc, + EfiKeyF1, + EfiKeyF2, + EfiKeyF3, + EfiKeyF4, + EfiKeyF5, + EfiKeyF6, + EfiKeyF7, + EfiKeyF8, + EfiKeyF9, + EfiKeyF10, + EfiKeyF11, + EfiKeyF12, + EfiKeyPrint, + EfiKeySLck, + EfiKeyPause +} EFI_KEY; + +typedef struct { + /// + /// Used to describe a physical key on a keyboard. + /// + EFI_KEY Key; + /// + /// Unicode character code for the Key. + /// + CHAR16 Unicode; + /// + /// Unicode character code for the key with the shift key being held down. + /// + CHAR16 ShiftedUnicode; + /// + /// Unicode character code for the key with the Alt-GR being held down. + /// + CHAR16 AltGrUnicode; + /// + /// Unicode character code for the key with the Alt-GR and shift keys being held down. + /// + CHAR16 ShiftedAltGrUnicode; + /// + /// Modifier keys are defined to allow for special functionality that is not necessarily + /// accomplished by a printable character. Many of these modifier keys are flags to toggle + /// certain state bits on and off inside of a keyboard driver. + /// + UINT16 Modifier; + UINT16 AffectedAttribute; +} EFI_KEY_DESCRIPTOR; + +/// +/// A key which is affected by all the standard shift modifiers. +/// Most keys would be expected to have this bit active. +/// +#define EFI_AFFECTED_BY_STANDARD_SHIFT 0x0001 + +/// +/// This key is affected by the caps lock so that if a keyboard driver +/// would need to disambiguate between a key which had a "1" defined +/// versus an "a" character. Having this bit turned on would tell +/// the keyboard driver to use the appropriate shifted state or not. +/// +#define EFI_AFFECTED_BY_CAPS_LOCK 0x0002 + +/// +/// Similar to the case of CAPS lock, if this bit is active, the key +/// is affected by the num lock being turned on. +/// +#define EFI_AFFECTED_BY_NUM_LOCK 0x0004 + +typedef struct { + UINT16 LayoutLength; + EFI_GUID Guid; + UINT32 LayoutDescriptorStringOffset; + UINT8 DescriptorCount; + // EFI_KEY_DESCRIPTOR Descriptors[]; +} EFI_HII_KEYBOARD_LAYOUT; + +typedef struct { + EFI_HII_PACKAGE_HEADER Header; + UINT16 LayoutCount; + // EFI_HII_KEYBOARD_LAYOUT Layout[]; +} EFI_HII_KEYBOARD_PACKAGE_HDR; + +// +// Modifier values +// +#define EFI_NULL_MODIFIER 0x0000 +#define EFI_LEFT_CONTROL_MODIFIER 0x0001 +#define EFI_RIGHT_CONTROL_MODIFIER 0x0002 +#define EFI_LEFT_ALT_MODIFIER 0x0003 +#define EFI_RIGHT_ALT_MODIFIER 0x0004 +#define EFI_ALT_GR_MODIFIER 0x0005 +#define EFI_INSERT_MODIFIER 0x0006 +#define EFI_DELETE_MODIFIER 0x0007 +#define EFI_PAGE_DOWN_MODIFIER 0x0008 +#define EFI_PAGE_UP_MODIFIER 0x0009 +#define EFI_HOME_MODIFIER 0x000A +#define EFI_END_MODIFIER 0x000B +#define EFI_LEFT_SHIFT_MODIFIER 0x000C +#define EFI_RIGHT_SHIFT_MODIFIER 0x000D +#define EFI_CAPS_LOCK_MODIFIER 0x000E +#define EFI_NUM_LOCK_MODIFIER 0x000F +#define EFI_LEFT_ARROW_MODIFIER 0x0010 +#define EFI_RIGHT_ARROW_MODIFIER 0x0011 +#define EFI_DOWN_ARROW_MODIFIER 0x0012 +#define EFI_UP_ARROW_MODIFIER 0x0013 +#define EFI_NS_KEY_MODIFIER 0x0014 +#define EFI_NS_KEY_DEPENDENCY_MODIFIER 0x0015 +#define EFI_FUNCTION_KEY_ONE_MODIFIER 0x0016 +#define EFI_FUNCTION_KEY_TWO_MODIFIER 0x0017 +#define EFI_FUNCTION_KEY_THREE_MODIFIER 0x0018 +#define EFI_FUNCTION_KEY_FOUR_MODIFIER 0x0019 +#define EFI_FUNCTION_KEY_FIVE_MODIFIER 0x001A +#define EFI_FUNCTION_KEY_SIX_MODIFIER 0x001B +#define EFI_FUNCTION_KEY_SEVEN_MODIFIER 0x001C +#define EFI_FUNCTION_KEY_EIGHT_MODIFIER 0x001D +#define EFI_FUNCTION_KEY_NINE_MODIFIER 0x001E +#define EFI_FUNCTION_KEY_TEN_MODIFIER 0x001F +#define EFI_FUNCTION_KEY_ELEVEN_MODIFIER 0x0020 +#define EFI_FUNCTION_KEY_TWELVE_MODIFIER 0x0021 + +// +// Keys that have multiple control functions based on modifier +// settings are handled in the keyboard driver implementation. +// For instance, PRINT_KEY might have a modifier held down and +// is still a nonprinting character, but might have an alternate +// control function like SYSREQUEST +// +#define EFI_PRINT_MODIFIER 0x0022 +#define EFI_SYS_REQUEST_MODIFIER 0x0023 +#define EFI_SCROLL_LOCK_MODIFIER 0x0024 +#define EFI_PAUSE_MODIFIER 0x0025 +#define EFI_BREAK_MODIFIER 0x0026 + +#define EFI_LEFT_LOGO_MODIFIER 0x0027 +#define EFI_RIGHT_LOGO_MODIFIER 0x0028 +#define EFI_MENU_MODIFIER 0x0029 + +/// +/// Animation IFR opcode +/// +typedef struct _EFI_IFR_ANIMATION { + /// + /// Standard opcode header, where Header.OpCode is + /// EFI_IFR_ANIMATION_OP. + /// + EFI_IFR_OP_HEADER Header; + /// + /// Animation identifier in the HII database. + /// + EFI_ANIMATION_ID Id; +} EFI_IFR_ANIMATION; + +/// +/// HII animation package header. +/// +typedef struct _EFI_HII_ANIMATION_PACKAGE_HDR { + /// + /// Standard package header, where Header.Type = EFI_HII_PACKAGE_ANIMATIONS. + /// + EFI_HII_PACKAGE_HEADER Header; + /// + /// Offset, relative to this header, of the animation information. If + /// this is zero, then there are no animation sequences in the package. + /// + UINT32 AnimationInfoOffset; +} EFI_HII_ANIMATION_PACKAGE_HDR; + +/// +/// Animation information is encoded as a series of blocks, +/// with each block prefixed by a single byte header EFI_HII_ANIMATION_BLOCK. +/// +typedef struct _EFI_HII_ANIMATION_BLOCK { + UINT8 BlockType; + //UINT8 BlockBody[]; +} EFI_HII_ANIMATION_BLOCK; + +/// +/// Animation block types. +/// +#define EFI_HII_AIBT_END 0x00 +#define EFI_HII_AIBT_OVERLAY_IMAGES 0x10 +#define EFI_HII_AIBT_CLEAR_IMAGES 0x11 +#define EFI_HII_AIBT_RESTORE_SCRN 0x12 +#define EFI_HII_AIBT_OVERLAY_IMAGES_LOOP 0x18 +#define EFI_HII_AIBT_CLEAR_IMAGES_LOOP 0x19 +#define EFI_HII_AIBT_RESTORE_SCRN_LOOP 0x1A +#define EFI_HII_AIBT_DUPLICATE 0x20 +#define EFI_HII_AIBT_SKIP2 0x21 +#define EFI_HII_AIBT_SKIP1 0x22 +#define EFI_HII_AIBT_EXT1 0x30 +#define EFI_HII_AIBT_EXT2 0x31 +#define EFI_HII_AIBT_EXT4 0x32 + +/// +/// Extended block headers used for variable sized animation records +/// which need an explicit length. +/// + +typedef struct _EFI_HII_AIBT_EXT1_BLOCK { + /// + /// Standard animation header, where Header.BlockType = EFI_HII_AIBT_EXT1. + /// + EFI_HII_ANIMATION_BLOCK Header; + /// + /// The block type. + /// + UINT8 BlockType2; + /// + /// Size of the animation block, in bytes, including the animation block header. + /// + UINT8 Length; +} EFI_HII_AIBT_EXT1_BLOCK; + +typedef struct _EFI_HII_AIBT_EXT2_BLOCK { + /// + /// Standard animation header, where Header.BlockType = EFI_HII_AIBT_EXT2. + /// + EFI_HII_ANIMATION_BLOCK Header; + /// + /// The block type + /// + UINT8 BlockType2; + /// + /// Size of the animation block, in bytes, including the animation block header. + /// + UINT16 Length; +} EFI_HII_AIBT_EXT2_BLOCK; + +typedef struct _EFI_HII_AIBT_EXT4_BLOCK { + /// + /// Standard animation header, where Header.BlockType = EFI_HII_AIBT_EXT4. + /// + EFI_HII_ANIMATION_BLOCK Header; + /// + /// The block type + /// + UINT8 BlockType2; + /// + /// Size of the animation block, in bytes, including the animation block header. + /// + UINT32 Length; +} EFI_HII_AIBT_EXT4_BLOCK; + +typedef struct _EFI_HII_ANIMATION_CELL { + /// + /// The X offset from the upper left hand corner of the logical + /// window to position the indexed image. + /// + UINT16 OffsetX; + /// + /// The Y offset from the upper left hand corner of the logical + /// window to position the indexed image. + /// + UINT16 OffsetY; + /// + /// The image to display at the specified offset from the upper left + /// hand corner of the logical window. + /// + EFI_IMAGE_ID ImageId; + /// + /// The number of milliseconds to delay after displaying the indexed + /// image and before continuing on to the next linked image. If value + /// is zero, no delay. + /// + UINT16 Delay; +} EFI_HII_ANIMATION_CELL; + +/// +/// An animation block to describe an animation sequence that does not cycle, and +/// where one image is simply displayed over the previous image. +/// +typedef struct _EFI_HII_AIBT_OVERLAY_IMAGES_BLOCK { + /// + /// This is image that is to be reference by the image protocols, if the + /// animation function is not supported or disabled. This image can + /// be one particular image from the animation sequence (if any one + /// of the animation frames has a complete image) or an alternate + /// image that can be displayed alone. If the value is zero, no image + /// is displayed. + /// + EFI_IMAGE_ID DftImageId; + /// + /// The overall width of the set of images (logical window width). + /// + UINT16 Width; + /// + /// The overall height of the set of images (logical window height). + /// + UINT16 Height; + /// + /// The number of EFI_HII_ANIMATION_CELL contained in the + /// animation sequence. + /// + UINT16 CellCount; + /// + /// An array of CellCount animation cells. + /// + EFI_HII_ANIMATION_CELL AnimationCell[1]; +} EFI_HII_AIBT_OVERLAY_IMAGES_BLOCK; + +/// +/// An animation block to describe an animation sequence that does not cycle, +/// and where the logical window is cleared to the specified color before +/// the next image is displayed. +/// +typedef struct _EFI_HII_AIBT_CLEAR_IMAGES_BLOCK { + /// + /// This is image that is to be reference by the image protocols, if the + /// animation function is not supported or disabled. This image can + /// be one particular image from the animation sequence (if any one + /// of the animation frames has a complete image) or an alternate + /// image that can be displayed alone. If the value is zero, no image + /// is displayed. + /// + EFI_IMAGE_ID DftImageId; + /// + /// The overall width of the set of images (logical window width). + /// + UINT16 Width; + /// + /// The overall height of the set of images (logical window height). + /// + UINT16 Height; + /// + /// The number of EFI_HII_ANIMATION_CELL contained in the + /// animation sequence. + /// + UINT16 CellCount; + /// + /// The color to clear the logical window to before displaying the + /// indexed image. + /// + EFI_HII_RGB_PIXEL BackgndColor; + /// + /// An array of CellCount animation cells. + /// + EFI_HII_ANIMATION_CELL AnimationCell[1]; +} EFI_HII_AIBT_CLEAR_IMAGES_BLOCK; + +/// +/// An animation block to describe an animation sequence that does not cycle, +/// and where the screen is restored to the original state before the next +/// image is displayed. +/// +typedef struct _EFI_HII_AIBT_RESTORE_SCRN_BLOCK { + /// + /// This is image that is to be reference by the image protocols, if the + /// animation function is not supported or disabled. This image can + /// be one particular image from the animation sequence (if any one + /// of the animation frames has a complete image) or an alternate + /// image that can be displayed alone. If the value is zero, no image + /// is displayed. + /// + EFI_IMAGE_ID DftImageId; + /// + /// The overall width of the set of images (logical window width). + /// + UINT16 Width; + /// + /// The overall height of the set of images (logical window height). + /// + UINT16 Height; + /// + /// The number of EFI_HII_ANIMATION_CELL contained in the + /// animation sequence. + /// + UINT16 CellCount; + /// + /// An array of CellCount animation cells. + /// + EFI_HII_ANIMATION_CELL AnimationCell[1]; +} EFI_HII_AIBT_RESTORE_SCRN_BLOCK; + +/// +/// An animation block to describe an animation sequence that continuously cycles, +/// and where one image is simply displayed over the previous image. +/// +typedef EFI_HII_AIBT_OVERLAY_IMAGES_BLOCK EFI_HII_AIBT_OVERLAY_IMAGES_LOOP_BLOCK; + +/// +/// An animation block to describe an animation sequence that continuously cycles, +/// and where the logical window is cleared to the specified color before +/// the next image is displayed. +/// +typedef EFI_HII_AIBT_CLEAR_IMAGES_BLOCK EFI_HII_AIBT_CLEAR_IMAGES_LOOP_BLOCK; + +/// +/// An animation block to describe an animation sequence that continuously cycles, +/// and where the screen is restored to the original state before +/// the next image is displayed. +/// +typedef EFI_HII_AIBT_RESTORE_SCRN_BLOCK EFI_HII_AIBT_RESTORE_SCRN_LOOP_BLOCK; + +/// +/// Assigns a new character value to a previously defined animation sequence. +/// +typedef struct _EFI_HII_AIBT_DUPLICATE_BLOCK { + /// + /// The previously defined animation ID with the exact same + /// animation information. + /// + EFI_ANIMATION_ID AnimationId; +} EFI_HII_AIBT_DUPLICATE_BLOCK; + +/// +/// Skips animation IDs. +/// +typedef struct _EFI_HII_AIBT_SKIP1_BLOCK { + /// + /// The unsigned 8-bit value to add to AnimationIdCurrent. + /// + UINT8 SkipCount; +} EFI_HII_AIBT_SKIP1_BLOCK; + +/// +/// Skips animation IDs. +/// +typedef struct _EFI_HII_AIBT_SKIP2_BLOCK { + /// + /// The unsigned 16-bit value to add to AnimationIdCurrent. + /// + UINT16 SkipCount; +} EFI_HII_AIBT_SKIP2_BLOCK; + +#pragma pack() + + + +/// +/// References to string tokens must use this macro to enable scanning for +/// token usages. +/// +/// +/// STRING_TOKEN is not defined in UEFI specification. But it is placed +/// here for the easy access by C files and VFR source files. +/// +#define STRING_TOKEN(t) t + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiMultiPhase.h b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiMultiPhase.h new file mode 100644 index 000000000..678f3ebd6 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiMultiPhase.h @@ -0,0 +1,195 @@ +/** @file + This includes some definitions introduced in UEFI that will be used in both PEI and DXE phases. + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __UEFI_MULTIPHASE_H__ +#define __UEFI_MULTIPHASE_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Guid/WinCertificate.h> +/// +/// Enumeration of memory types introduced in UEFI. +/// +typedef enum { + /// + /// Not used. + /// + EfiReservedMemoryType, + /// + /// The code portions of a loaded application. + /// (Note that UEFI OS loaders are UEFI applications.) + /// + EfiLoaderCode, + /// + /// The data portions of a loaded application and the default data allocation + /// type used by an application to allocate pool memory. + /// + EfiLoaderData, + /// + /// The code portions of a loaded Boot Services Driver. + /// + EfiBootServicesCode, + /// + /// The data portions of a loaded Boot Serves Driver, and the default data + /// allocation type used by a Boot Services Driver to allocate pool memory. + /// + EfiBootServicesData, + /// + /// The code portions of a loaded Runtime Services Driver. + /// + EfiRuntimeServicesCode, + /// + /// The data portions of a loaded Runtime Services Driver and the default + /// data allocation type used by a Runtime Services Driver to allocate pool memory. + /// + EfiRuntimeServicesData, + /// + /// Free (unallocated) memory. + /// + EfiConventionalMemory, + /// + /// Memory in which errors have been detected. + /// + EfiUnusableMemory, + /// + /// Memory that holds the ACPI tables. + /// + EfiACPIReclaimMemory, + /// + /// Address space reserved for use by the firmware. + /// + EfiACPIMemoryNVS, + /// + /// Used by system firmware to request that a memory-mapped IO region + /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services. + /// + EfiMemoryMappedIO, + /// + /// System memory-mapped IO region that is used to translate memory + /// cycles to IO cycles by the processor. + /// + EfiMemoryMappedIOPortSpace, + /// + /// Address space reserved by the firmware for code that is part of the processor. + /// + EfiPalCode, + EfiMaxMemoryType +} EFI_MEMORY_TYPE; + +/// +/// Data structure that precedes all of the standard EFI table types. +/// +typedef struct { + /// + /// A 64-bit signature that identifies the type of table that follows. + /// Unique signatures have been generated for the EFI System Table, + /// the EFI Boot Services Table, and the EFI Runtime Services Table. + /// + UINT64 Signature; + /// + /// The revision of the EFI Specification to which this table + /// conforms. The upper 16 bits of this field contain the major + /// revision value, and the lower 16 bits contain the minor revision + /// value. The minor revision values are limited to the range of 00..99. + /// + UINT32 Revision; + /// + /// The size, in bytes, of the entire table including the EFI_TABLE_HEADER. + /// + UINT32 HeaderSize; + /// + /// The 32-bit CRC for the entire table. This value is computed by + /// setting this field to 0, and computing the 32-bit CRC for HeaderSize bytes. + /// + UINT32 CRC32; + /// + /// Reserved field that must be set to 0. + /// + UINT32 Reserved; +} EFI_TABLE_HEADER; + +/// +/// Attributes of variable. +/// +#define EFI_VARIABLE_NON_VOLATILE 0x00000001 +#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002 +#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004 +/// +/// This attribute is identified by the mnemonic 'HR' +/// elsewhere in this specification. +/// +#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x00000008 +/// +/// Attributes of Authenticated Variable +/// +#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x00000010 +#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x00000020 +#define EFI_VARIABLE_APPEND_WRITE 0x00000040 + + +/// +/// AuthInfo is a WIN_CERTIFICATE using the wCertificateType +/// WIN_CERTIFICATE_UEFI_GUID and the CertType +/// EFI_CERT_TYPE_RSA2048_SHA256_GUID. If the attribute specifies +/// authenticated access, then the Data buffer should begin with an +/// authentication descriptor prior to the data payload and DataSize +/// should reflect the the data.and descriptor size. The caller +/// shall digest the Monotonic Count value and the associated data +/// for the variable update using the SHA-256 1-way hash algorithm. +/// The ensuing the 32-byte digest will be signed using the private +/// key associated w/ the public/private 2048-bit RSA key-pair. The +/// WIN_CERTIFICATE shall be used to describe the signature of the +/// Variable data *Data. In addition, the signature will also +/// include the MonotonicCount value to guard against replay attacks. +/// +typedef struct { + /// + /// Included in the signature of + /// AuthInfo.Used to ensure freshness/no + /// replay. Incremented during each + /// "Write" access. + /// + UINT64 MonotonicCount; + /// + /// Provides the authorization for the variable + /// access. It is a signature across the + /// variable data and the Monotonic Count + /// value. Caller uses Private key that is + /// associated with a public key that has been + /// provisioned via the key exchange. + /// + WIN_CERTIFICATE_UEFI_GUID AuthInfo; +} EFI_VARIABLE_AUTHENTICATION; + +/// +/// When the attribute EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS is +/// set, then the Data buffer shall begin with an instance of a complete (and serialized) +/// EFI_VARIABLE_AUTHENTICATION_2 descriptor. The descriptor shall be followed by the new +/// variable value and DataSize shall reflect the combined size of the descriptor and the new +/// variable value. The authentication descriptor is not part of the variable data and is not +/// returned by subsequent calls to GetVariable(). +/// +typedef struct { + /// + /// For the TimeStamp value, components Pad1, Nanosecond, TimeZone, Daylight and + /// Pad2 shall be set to 0. This means that the time shall always be expressed in GMT. + /// + EFI_TIME TimeStamp; + /// + /// Only a CertType of EFI_CERT_TYPE_PKCS7_GUID is accepted. + /// + WIN_CERTIFICATE_UEFI_GUID AuthInfo; + } EFI_VARIABLE_AUTHENTICATION_2; + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiPxe.h b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiPxe.h new file mode 100644 index 000000000..5c0b2038f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiPxe.h @@ -0,0 +1,1774 @@ +/** @file + This header file contains all of the PXE type definitions, + structure prototypes, global variables and constants that + are needed for porting PXE to EFI. + +Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + @par Revision Reference: + 32/64-bit PXE specification: + alpha-4, 99-Dec-17. + +**/ + +#ifndef __EFI_PXE_H__ +#define __EFI_PXE_H__ + +FILE_LICENCE ( BSD3 ); + +#pragma pack(1) + +#define PXE_BUSTYPE(a, b, c, d) \ + ( \ + (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \ + ((PXE_UINT32) (a) & 0xFF) \ + ) + +/// +/// UNDI ROM ID and devive ID signature. +/// +#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E') + +/// +/// BUS ROM ID signatures. +/// +#define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R') +#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R') +#define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R') +#define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4') + +#define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8)) + +#define PXE_SWAP_UINT32(n) \ + ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \ + (((PXE_UINT32)(n) & 0x0000FF00) << 8) | \ + (((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \ + (((PXE_UINT32)(n) & 0xFF000000) >> 24)) + +#define PXE_SWAP_UINT64(n) \ + ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \ + (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \ + (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \ + (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8) | \ + (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8) | \ + (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \ + (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \ + (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56)) + + +#define PXE_CPBSIZE_NOT_USED 0 ///< zero +#define PXE_DBSIZE_NOT_USED 0 ///< zero +#define PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 ///< zero +#define PXE_DBADDR_NOT_USED (PXE_UINT64) 0 ///< zero +#define PXE_CONST CONST + +#define PXE_VOLATILE volatile + +typedef VOID PXE_VOID; +typedef UINT8 PXE_UINT8; +typedef UINT16 PXE_UINT16; +typedef UINT32 PXE_UINT32; +typedef UINTN PXE_UINTN; + +/// +/// Typedef unsigned long PXE_UINT64. +/// +typedef UINT64 PXE_UINT64; + +typedef PXE_UINT8 PXE_BOOL; +#define PXE_FALSE 0 ///< zero +#define PXE_TRUE (!PXE_FALSE) + +typedef PXE_UINT16 PXE_OPCODE; + +/// +/// Return UNDI operational state. +/// +#define PXE_OPCODE_GET_STATE 0x0000 + +/// +/// Change UNDI operational state from Stopped to Started. +/// +#define PXE_OPCODE_START 0x0001 + +/// +/// Change UNDI operational state from Started to Stopped. +/// +#define PXE_OPCODE_STOP 0x0002 + +/// +/// Get UNDI initialization information. +/// +#define PXE_OPCODE_GET_INIT_INFO 0x0003 + +/// +/// Get NIC configuration information. +/// +#define PXE_OPCODE_GET_CONFIG_INFO 0x0004 + +/// +/// Changed UNDI operational state from Started to Initialized. +/// +#define PXE_OPCODE_INITIALIZE 0x0005 + +/// +/// Re-initialize the NIC H/W. +/// +#define PXE_OPCODE_RESET 0x0006 + +/// +/// Change the UNDI operational state from Initialized to Started. +/// +#define PXE_OPCODE_SHUTDOWN 0x0007 + +/// +/// Read & change state of external interrupt enables. +/// +#define PXE_OPCODE_INTERRUPT_ENABLES 0x0008 + +/// +/// Read & change state of packet receive filters. +/// +#define PXE_OPCODE_RECEIVE_FILTERS 0x0009 + +/// +/// Read & change station MAC address. +/// +#define PXE_OPCODE_STATION_ADDRESS 0x000A + +/// +/// Read traffic statistics. +/// +#define PXE_OPCODE_STATISTICS 0x000B + +/// +/// Convert multicast IP address to multicast MAC address. +/// +#define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C + +/// +/// Read or change non-volatile storage on the NIC. +/// +#define PXE_OPCODE_NVDATA 0x000D + +/// +/// Get & clear interrupt status. +/// +#define PXE_OPCODE_GET_STATUS 0x000E + +/// +/// Fill media header in packet for transmit. +/// +#define PXE_OPCODE_FILL_HEADER 0x000F + +/// +/// Transmit packet(s). +/// +#define PXE_OPCODE_TRANSMIT 0x0010 + +/// +/// Receive packet. +/// +#define PXE_OPCODE_RECEIVE 0x0011 + +/// +/// Last valid PXE UNDI OpCode number. +/// +#define PXE_OPCODE_LAST_VALID 0x0011 + +typedef PXE_UINT16 PXE_OPFLAGS; + +#define PXE_OPFLAGS_NOT_USED 0x0000 + +// +// ////////////////////////////////////// +// UNDI Get State +// +// No OpFlags + +//////////////////////////////////////// +// UNDI Start +// +// No OpFlags + +//////////////////////////////////////// +// UNDI Stop +// +// No OpFlags + +//////////////////////////////////////// +// UNDI Get Init Info +// +// No Opflags + +//////////////////////////////////////// +// UNDI Get Config Info +// +// No Opflags + +/// +/// UNDI Initialize +/// +#define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001 +#define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000 +#define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001 + +/// +/// +/// UNDI Reset +/// +#define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001 +#define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002 + +/// +/// UNDI Shutdown. +/// +/// No OpFlags. + +/// +/// UNDI Interrupt Enables. +/// +/// +/// Select whether to enable or disable external interrupt signals. +/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS. +/// +#define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000 +#define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000 +#define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000 +#define PXE_OPFLAGS_INTERRUPT_READ 0x0000 + +/// +/// Enable receive interrupts. An external interrupt will be generated +/// after a complete non-error packet has been received. +/// +#define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001 + +/// +/// Enable transmit interrupts. An external interrupt will be generated +/// after a complete non-error packet has been transmitted. +/// +#define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002 + +/// +/// Enable command interrupts. An external interrupt will be generated +/// when command execution stops. +/// +#define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004 + +/// +/// Generate software interrupt. Setting this bit generates an external +/// interrupt, if it is supported by the hardware. +/// +#define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008 + +/// +/// UNDI Receive Filters. +/// +/// +/// Select whether to enable or disable receive filters. +/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE. +/// +#define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000 +#define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000 +#define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000 +#define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000 + +/// +/// To reset the contents of the multicast MAC address filter list, +/// set this OpFlag: +/// +#define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000 + +/// +/// Enable unicast packet receiving. Packets sent to the current station +/// MAC address will be received. +/// +#define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001 + +/// +/// Enable broadcast packet receiving. Packets sent to the broadcast +/// MAC address will be received. +/// +#define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002 + +/// +/// Enable filtered multicast packet receiving. Packets sent to any +/// of the multicast MAC addresses in the multicast MAC address filter +/// list will be received. If the filter list is empty, no multicast +/// +#define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 + +/// +/// Enable promiscuous packet receiving. All packets will be received. +/// +#define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008 + +/// +/// Enable promiscuous multicast packet receiving. All multicast +/// packets will be received. +/// +#define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010 + +/// +/// UNDI Station Address. +/// +#define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000 +#define PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000 +#define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001 + +/// +/// UNDI Statistics. +/// +#define PXE_OPFLAGS_STATISTICS_READ 0x0000 +#define PXE_OPFLAGS_STATISTICS_RESET 0x0001 + +/// +/// UNDI MCast IP to MAC. +/// +/// +/// Identify the type of IP address in the CPB. +/// +#define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003 +#define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000 +#define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001 + +/// +/// UNDI NvData. +/// +/// +/// Select the type of non-volatile data operation. +/// +#define PXE_OPFLAGS_NVDATA_OPMASK 0x0001 +#define PXE_OPFLAGS_NVDATA_READ 0x0000 +#define PXE_OPFLAGS_NVDATA_WRITE 0x0001 + +/// +/// UNDI Get Status. +/// +/// +/// Return current interrupt status. This will also clear any interrupts +/// that are currently set. This can be used in a polling routine. The +/// interrupt flags are still set and cleared even when the interrupts +/// are disabled. +/// +#define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001 + +/// +/// Return list of transmitted buffers for recycling. Transmit buffers +/// must not be changed or unallocated until they have recycled. After +/// issuing a transmit command, wait for a transmit complete interrupt. +/// When a transmit complete interrupt is received, read the transmitted +/// buffers. Do not plan on getting one buffer per interrupt. Some +/// NICs and UNDIs may transmit multiple buffers per interrupt. +/// +#define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002 + +/// +/// Return current media status. +/// +#define PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004 + +/// +/// UNDI Fill Header. +/// +#define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001 +#define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001 +#define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000 + +/// +/// UNDI Transmit. +/// +/// +/// S/W UNDI only. Return after the packet has been transmitted. A +/// transmit complete interrupt will still be generated and the transmit +/// buffer will have to be recycled. +/// +#define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001 +#define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001 +#define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000 + +#define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002 +#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002 +#define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000 + +/// +/// UNDI Receive. +/// +/// No OpFlags. +/// + +/// +/// PXE STATFLAGS. +/// +typedef PXE_UINT16 PXE_STATFLAGS; + +#define PXE_STATFLAGS_INITIALIZE 0x0000 + +/// +/// Common StatFlags that can be returned by all commands. +/// +/// +/// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be +/// implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs +/// that support command queuing. +/// +#define PXE_STATFLAGS_STATUS_MASK 0xC000 +#define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000 +#define PXE_STATFLAGS_COMMAND_FAILED 0x8000 +#define PXE_STATFLAGS_COMMAND_QUEUED 0x4000 + +/// +/// UNDI Get State. +/// +#define PXE_STATFLAGS_GET_STATE_MASK 0x0003 +#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002 +#define PXE_STATFLAGS_GET_STATE_STARTED 0x0001 +#define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000 + +/// +/// UNDI Start. +/// +/// No additional StatFlags. +/// + +/// +/// UNDI Get Init Info. +/// +#define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001 +#define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000 +#define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001 + +#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_MASK 0x0002 +#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_NOT_SUPPORTED 0x0000 +#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_SUPPORTED 0x0002 + +/// +/// UNDI Initialize. +/// +#define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001 + +/// +/// UNDI Reset. +/// +#define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001 + +/// +/// UNDI Shutdown. +/// +/// No additional StatFlags. + +/// +/// UNDI Interrupt Enables. +/// +/// +/// If set, receive interrupts are enabled. +/// +#define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001 + +/// +/// If set, transmit interrupts are enabled. +/// +#define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002 + +/// +/// If set, command interrupts are enabled. +/// +#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004 + +/// +/// UNDI Receive Filters. +/// + +/// +/// If set, unicast packets will be received. +/// +#define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001 + +/// +/// If set, broadcast packets will be received. +/// +#define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002 + +/// +/// If set, multicast packets that match up with the multicast address +/// filter list will be received. +/// +#define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 + +/// +/// If set, all packets will be received. +/// +#define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008 + +/// +/// If set, all multicast packets will be received. +/// +#define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010 + +/// +/// UNDI Station Address. +/// +/// No additional StatFlags. +/// + +/// +/// UNDI Statistics. +/// +/// No additional StatFlags. +/// + +/// +//// UNDI MCast IP to MAC. +//// +//// No additional StatFlags. + +/// +/// UNDI NvData. +/// +/// No additional StatFlags. +/// + +/// +/// UNDI Get Status. +/// + +/// +/// Use to determine if an interrupt has occurred. +/// +#define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F +#define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000 + +/// +/// If set, at least one receive interrupt occurred. +/// +#define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001 + +/// +/// If set, at least one transmit interrupt occurred. +/// +#define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002 + +/// +/// If set, at least one command interrupt occurred. +/// +#define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004 + +/// +/// If set, at least one software interrupt occurred. +/// +#define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008 + +/// +/// This flag is set if the transmitted buffer queue is empty. This flag +/// will be set if all transmitted buffer addresses get written into the DB. +/// +#define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010 + +/// +/// This flag is set if no transmitted buffer addresses were written +/// into the DB. (This could be because DBsize was too small.) +/// +#define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020 + +/// +/// This flag is set if there is no media detected. +/// +#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA 0x0040 + +/// +/// UNDI Fill Header. +/// +/// No additional StatFlags. +/// + +/// +/// UNDI Transmit. +/// +/// No additional StatFlags. + +/// +/// UNDI Receive +///. + +/// +/// No additional StatFlags. +/// +typedef PXE_UINT16 PXE_STATCODE; + +#define PXE_STATCODE_INITIALIZE 0x0000 + +/// +/// Common StatCodes returned by all UNDI commands, UNDI protocol functions +/// and BC protocol functions. +/// +#define PXE_STATCODE_SUCCESS 0x0000 + +#define PXE_STATCODE_INVALID_CDB 0x0001 +#define PXE_STATCODE_INVALID_CPB 0x0002 +#define PXE_STATCODE_BUSY 0x0003 +#define PXE_STATCODE_QUEUE_FULL 0x0004 +#define PXE_STATCODE_ALREADY_STARTED 0x0005 +#define PXE_STATCODE_NOT_STARTED 0x0006 +#define PXE_STATCODE_NOT_SHUTDOWN 0x0007 +#define PXE_STATCODE_ALREADY_INITIALIZED 0x0008 +#define PXE_STATCODE_NOT_INITIALIZED 0x0009 +#define PXE_STATCODE_DEVICE_FAILURE 0x000A +#define PXE_STATCODE_NVDATA_FAILURE 0x000B +#define PXE_STATCODE_UNSUPPORTED 0x000C +#define PXE_STATCODE_BUFFER_FULL 0x000D +#define PXE_STATCODE_INVALID_PARAMETER 0x000E +#define PXE_STATCODE_INVALID_UNDI 0x000F +#define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010 +#define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011 +#define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012 +#define PXE_STATCODE_NO_DATA 0x0013 + +typedef PXE_UINT16 PXE_IFNUM; + +/// +/// This interface number must be passed to the S/W UNDI Start command. +/// +#define PXE_IFNUM_START 0x0000 + +/// +/// This interface number is returned by the S/W UNDI Get State and +/// Start commands if information in the CDB, CPB or DB is invalid. +/// +#define PXE_IFNUM_INVALID 0x0000 + +typedef PXE_UINT16 PXE_CONTROL; + +/// +/// Setting this flag directs the UNDI to queue this command for later +/// execution if the UNDI is busy and it supports command queuing. +/// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error +/// is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL +/// error is returned. +/// +#define PXE_CONTROL_QUEUE_IF_BUSY 0x0002 + +/// +/// These two bit values are used to determine if there are more UNDI +/// CDB structures following this one. If the link bit is set, there +/// must be a CDB structure following this one. Execution will start +/// on the next CDB structure as soon as this one completes successfully. +/// If an error is generated by this command, execution will stop. +/// +#define PXE_CONTROL_LINK 0x0001 +#define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000 + +typedef PXE_UINT8 PXE_FRAME_TYPE; + +#define PXE_FRAME_TYPE_NONE 0x00 +#define PXE_FRAME_TYPE_UNICAST 0x01 +#define PXE_FRAME_TYPE_BROADCAST 0x02 +#define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03 +#define PXE_FRAME_TYPE_PROMISCUOUS 0x04 +#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05 + +#define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST + +typedef PXE_UINT32 PXE_IPV4; + +typedef PXE_UINT32 PXE_IPV6[4]; +#define PXE_MAC_LENGTH 32 + +typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH]; + +typedef PXE_UINT8 PXE_IFTYPE; +typedef UINT16 PXE_MEDIA_PROTOCOL; + +/// +/// This information is from the ARP section of RFC 1700. +/// +/// 1 Ethernet (10Mb) [JBP] +/// 2 Experimental Ethernet (3Mb) [JBP] +/// 3 Amateur Radio AX.25 [PXK] +/// 4 Proteon ProNET Token Ring [JBP] +/// 5 Chaos [GXP] +/// 6 IEEE 802 Networks [JBP] +/// 7 ARCNET [JBP] +/// 8 Hyperchannel [JBP] +/// 9 Lanstar [TU] +/// 10 Autonet Short Address [MXB1] +/// 11 LocalTalk [JKR1] +/// 12 LocalNet (IBM* PCNet or SYTEK* LocalNET) [JXM] +/// 13 Ultra link [RXD2] +/// 14 SMDS [GXC1] +/// 15 Frame Relay [AGM] +/// 16 Asynchronous Transmission Mode (ATM) [JXB2] +/// 17 HDLC [JBP] +/// 18 Fibre Channel [Yakov Rekhter] +/// 19 Asynchronous Transmission Mode (ATM) [Mark Laubach] +/// 20 Serial Line [JBP] +/// 21 Asynchronous Transmission Mode (ATM) [MXB1] +/// +/// * Other names and brands may be claimed as the property of others. +/// +#define PXE_IFTYPE_ETHERNET 0x01 +#define PXE_IFTYPE_TOKENRING 0x04 +#define PXE_IFTYPE_FIBRE_CHANNEL 0x12 + +typedef struct s_pxe_hw_undi { + PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE. + PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI). + PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero. + PXE_UINT8 Rev; ///< PXE_ROMID_REV. + PXE_UINT8 IFcnt; ///< physical connector count lower byte. + PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER. + PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER. + PXE_UINT8 IFcntExt; ///< physical connector count upper byte. + PXE_UINT8 reserved; ///< zero, not used. + PXE_UINT32 Implementation; ///< implementation flags. + ///< reserved ///< vendor use. + ///< UINT32 Status; ///< status port. + ///< UINT32 Command; ///< command port. + ///< UINT64 CDBaddr; ///< CDB address port. + ///< +} PXE_HW_UNDI; + +/// +/// Status port bit definitions. +/// + +/// +/// UNDI operation state. +/// +#define PXE_HWSTAT_STATE_MASK 0xC0000000 +#define PXE_HWSTAT_BUSY 0xC0000000 +#define PXE_HWSTAT_INITIALIZED 0x80000000 +#define PXE_HWSTAT_STARTED 0x40000000 +#define PXE_HWSTAT_STOPPED 0x00000000 + +/// +/// If set, last command failed. +/// +#define PXE_HWSTAT_COMMAND_FAILED 0x20000000 + +/// +/// If set, identifies enabled receive filters. +/// +#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000 +#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800 +#define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400 +#define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200 +#define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100 + +/// +/// If set, identifies enabled external interrupts. +/// +#define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080 +#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040 +#define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020 +#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010 + +/// +/// If set, identifies pending interrupts. +/// +#define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008 +#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004 +#define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002 +#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001 + +/// +/// Command port definitions. +/// + +/// +/// If set, CDB identified in CDBaddr port is given to UNDI. +/// If not set, other bits in this word will be processed. +/// +#define PXE_HWCMD_ISSUE_COMMAND 0x80000000 +#define PXE_HWCMD_INTS_AND_FILTS 0x00000000 + +/// +/// Use these to enable/disable receive filters. +/// +#define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000 +#define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800 +#define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400 +#define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200 +#define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100 + +/// +/// Use these to enable/disable external interrupts. +/// +#define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080 +#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040 +#define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020 +#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010 + +/// +/// Use these to clear pending external interrupts. +/// +#define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008 +#define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004 +#define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002 +#define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001 + +typedef struct s_pxe_sw_undi { + PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE. + PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI). + PXE_UINT8 Fudge; ///< makes 8-bit cksum zero. + PXE_UINT8 Rev; ///< PXE_ROMID_REV. + PXE_UINT8 IFcnt; ///< physical connector count lower byte. + PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER. + PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER. + PXE_UINT8 IFcntExt; ///< physical connector count upper byte. + PXE_UINT8 reserved1; ///< zero, not used. + PXE_UINT32 Implementation; ///< Implementation flags. + PXE_UINT64 EntryPoint; ///< API entry point. + PXE_UINT8 reserved2[3]; ///< zero, not used. + PXE_UINT8 BusCnt; ///< number of bustypes supported. + PXE_UINT32 BusType[1]; ///< list of supported bustypes. +} PXE_SW_UNDI; + +typedef union u_pxe_undi { + PXE_HW_UNDI hw; + PXE_SW_UNDI sw; +} PXE_UNDI; + +/// +/// Signature of !PXE structure. +/// +#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E') + +/// +/// !PXE structure format revision +///. +#define PXE_ROMID_REV 0x02 + +/// +/// UNDI command interface revision. These are the values that get sent +/// in option 94 (Client Network Interface Identifier) in the DHCP Discover +/// and PXE Boot Server Request packets. +/// +#define PXE_ROMID_MAJORVER 0x03 +#define PXE_ROMID_MINORVER 0x01 + +/// +/// Implementation flags. +/// +#define PXE_ROMID_IMP_HW_UNDI 0x80000000 +#define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000 +#define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000 +#define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000 +#define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000 +#define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000 +#define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000 +#define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00 +#define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00 +#define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800 +#define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400 +#define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000 +#define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200 +#define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100 +#define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080 +#define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040 +#define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020 +#define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010 +#define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008 +#define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004 +#define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002 +#define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001 + +typedef struct s_pxe_cdb { + PXE_OPCODE OpCode; + PXE_OPFLAGS OpFlags; + PXE_UINT16 CPBsize; + PXE_UINT16 DBsize; + PXE_UINT64 CPBaddr; + PXE_UINT64 DBaddr; + PXE_STATCODE StatCode; + PXE_STATFLAGS StatFlags; + PXE_UINT16 IFnum; + PXE_CONTROL Control; +} PXE_CDB; + +typedef union u_pxe_ip_addr { + PXE_IPV6 IPv6; + PXE_IPV4 IPv4; +} PXE_IP_ADDR; + +typedef union pxe_device { + /// + /// PCI and PC Card NICs are both identified using bus, device + /// and function numbers. For PC Card, this may require PC + /// Card services to be loaded in the BIOS or preboot + /// environment. + /// + struct { + /// + /// See S/W UNDI ROMID structure definition for PCI and + /// PCC BusType definitions. + /// + PXE_UINT32 BusType; + + /// + /// Bus, device & function numbers that locate this device. + /// + PXE_UINT16 Bus; + PXE_UINT8 Device; + PXE_UINT8 Function; + } + PCI, PCC; + +} PXE_DEVICE; + +/// +/// cpb and db definitions +/// +#define MAX_PCI_CONFIG_LEN 64 ///< # of dwords. +#define MAX_EEPROM_LEN 128 ///< # of dwords. +#define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done. +#define MAX_MCAST_ADDRESS_CNT 8 + +typedef struct s_pxe_cpb_start_30 { + /// + /// PXE_VOID Delay(UINTN microseconds); + /// + /// UNDI will never request a delay smaller than 10 microseconds + /// and will always request delays in increments of 10 microseconds. + /// The Delay() CallBack routine must delay between n and n + 10 + /// microseconds before returning control to the UNDI. + /// + /// This field cannot be set to zero. + /// + UINT64 Delay; + + /// + /// PXE_VOID Block(UINT32 enable); + /// + /// UNDI may need to block multi-threaded/multi-processor access to + /// critical code sections when programming or accessing the network + /// device. To this end, a blocking service is needed by the UNDI. + /// When UNDI needs a block, it will call Block() passing a non-zero + /// value. When UNDI no longer needs a block, it will call Block() + /// with a zero value. When called, if the Block() is already enabled, + /// do not return control to the UNDI until the previous Block() is + /// disabled. + /// + /// This field cannot be set to zero. + /// + UINT64 Block; + + /// + /// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr); + /// + /// UNDI will pass the virtual address of a buffer and the virtual + /// address of a 64-bit physical buffer. Convert the virtual address + /// to a physical address and write the result to the physical address + /// buffer. If virtual and physical addresses are the same, just + /// copy the virtual address to the physical address buffer. + /// + /// This field can be set to zero if virtual and physical addresses + /// are equal. + /// + UINT64 Virt2Phys; + /// + /// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port, + /// UINT64 buf_addr); + /// + /// UNDI will read or write the device io space using this call back + /// function. It passes the number of bytes as the len parameter and it + /// will be either 1,2,4 or 8. + /// + /// This field can not be set to zero. + /// + UINT64 Mem_IO; +} PXE_CPB_START_30; + +typedef struct s_pxe_cpb_start_31 { + /// + /// PXE_VOID Delay(UINT64 UnqId, UINTN microseconds); + /// + /// UNDI will never request a delay smaller than 10 microseconds + /// and will always request delays in increments of 10 microseconds. + /// The Delay() CallBack routine must delay between n and n + 10 + /// microseconds before returning control to the UNDI. + /// + /// This field cannot be set to zero. + /// + UINT64 Delay; + + /// + /// PXE_VOID Block(UINT64 unq_id, UINT32 enable); + /// + /// UNDI may need to block multi-threaded/multi-processor access to + /// critical code sections when programming or accessing the network + /// device. To this end, a blocking service is needed by the UNDI. + /// When UNDI needs a block, it will call Block() passing a non-zero + /// value. When UNDI no longer needs a block, it will call Block() + /// with a zero value. When called, if the Block() is already enabled, + /// do not return control to the UNDI until the previous Block() is + /// disabled. + /// + /// This field cannot be set to zero. + /// + UINT64 Block; + + /// + /// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr); + /// + /// UNDI will pass the virtual address of a buffer and the virtual + /// address of a 64-bit physical buffer. Convert the virtual address + /// to a physical address and write the result to the physical address + /// buffer. If virtual and physical addresses are the same, just + /// copy the virtual address to the physical address buffer. + /// + /// This field can be set to zero if virtual and physical addresses + /// are equal. + /// + UINT64 Virt2Phys; + /// + /// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port, + /// UINT64 buf_addr); + /// + /// UNDI will read or write the device io space using this call back + /// function. It passes the number of bytes as the len parameter and it + /// will be either 1,2,4 or 8. + /// + /// This field can not be set to zero. + /// + UINT64 Mem_IO; + /// + /// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size, + /// UINT32 Direction, UINT64 mapped_addr); + /// + /// UNDI will pass the virtual address of a buffer, direction of the data + /// flow from/to the mapped buffer (the constants are defined below) + /// and a place holder (pointer) for the mapped address. + /// This call will Map the given address to a physical DMA address and write + /// the result to the mapped_addr pointer. If there is no need to + /// map the given address to a lower address (i.e. the given address is + /// associated with a physical address that is already compatible to be + /// used with the DMA, it converts the given virtual address to it's + /// physical address and write that in the mapped address pointer. + /// + /// This field can be set to zero if there is no mapping service available. + /// + UINT64 Map_Mem; + + /// + /// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size, + /// UINT32 Direction, UINT64 mapped_addr); + /// + /// UNDI will pass the virtual and mapped addresses of a buffer. + /// This call will un map the given address. + /// + /// This field can be set to zero if there is no unmapping service available. + /// + UINT64 UnMap_Mem; + + /// + /// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual, + /// UINT32 size, UINT32 Direction, UINT64 mapped_addr); + /// + /// UNDI will pass the virtual and mapped addresses of a buffer. + /// This call will synchronize the contents of both the virtual and mapped. + /// buffers for the given Direction. + /// + /// This field can be set to zero if there is no service available. + /// + UINT64 Sync_Mem; + + /// + /// protocol driver can provide anything for this Unique_ID, UNDI remembers + /// that as just a 64bit value assocaited to the interface specified by + /// the ifnum and gives it back as a parameter to all the call-back routines + /// when calling for that interface! + /// + UINT64 Unique_ID; +} PXE_CPB_START_31; + +#define TO_AND_FROM_DEVICE 0 +#define FROM_DEVICE 1 +#define TO_DEVICE 2 + +#define PXE_DELAY_MILLISECOND 1000 +#define PXE_DELAY_SECOND 1000000 +#define PXE_IO_READ 0 +#define PXE_IO_WRITE 1 +#define PXE_MEM_READ 2 +#define PXE_MEM_WRITE 4 + +typedef struct s_pxe_db_get_init_info { + /// + /// Minimum length of locked memory buffer that must be given to + /// the Initialize command. Giving UNDI more memory will generally + /// give better performance. + /// + /// If MemoryRequired is zero, the UNDI does not need and will not + /// use system memory to receive and transmit packets. + /// + PXE_UINT32 MemoryRequired; + + /// + /// Maximum frame data length for Tx/Rx excluding the media header. + /// + PXE_UINT32 FrameDataLen; + + /// + /// Supported link speeds are in units of mega bits. Common ethernet + /// values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero + /// filled. + /// + PXE_UINT32 LinkSpeeds[4]; + + /// + /// Number of non-volatile storage items. + /// + PXE_UINT32 NvCount; + + /// + /// Width of non-volatile storage item in bytes. 0, 1, 2 or 4 + /// + PXE_UINT16 NvWidth; + + /// + /// Media header length. This is the typical media header length for + /// this UNDI. This information is needed when allocating receive + /// and transmit buffers. + /// + PXE_UINT16 MediaHeaderLen; + + /// + /// Number of bytes in the NIC hardware (MAC) address. + /// + PXE_UINT16 HWaddrLen; + + /// + /// Maximum number of multicast MAC addresses in the multicast + /// MAC address filter list. + /// + PXE_UINT16 MCastFilterCnt; + + /// + /// Default number and size of transmit and receive buffers that will + /// be allocated by the UNDI. If MemoryRequired is non-zero, this + /// allocation will come out of the memory buffer given to the Initialize + /// command. If MemoryRequired is zero, this allocation will come out of + /// memory on the NIC. + /// + PXE_UINT16 TxBufCnt; + PXE_UINT16 TxBufSize; + PXE_UINT16 RxBufCnt; + PXE_UINT16 RxBufSize; + + /// + /// Hardware interface types defined in the Assigned Numbers RFC + /// and used in DHCP and ARP packets. + /// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros. + /// + PXE_UINT8 IFtype; + + /// + /// Supported duplex. See PXE_DUPLEX_xxxxx #defines below. + /// + PXE_UINT8 SupportedDuplexModes; + + /// + /// Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below. + /// + PXE_UINT8 SupportedLoopBackModes; +} PXE_DB_GET_INIT_INFO; + +#define PXE_MAX_TXRX_UNIT_ETHER 1500 + +#define PXE_HWADDR_LEN_ETHER 0x0006 +#define PXE_MAC_HEADER_LEN_ETHER 0x000E + +#define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1 +#define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2 + +#define PXE_LOOPBACK_INTERNAL_SUPPORTED 1 +#define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2 + +typedef struct s_pxe_pci_config_info { + /// + /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union. + /// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI. + /// + UINT32 BusType; + + /// + /// This identifies the PCI network device that this UNDI interface. + /// is bound to. + /// + UINT16 Bus; + UINT8 Device; + UINT8 Function; + + /// + /// This is a copy of the PCI configuration space for this + /// network device. + /// + union { + UINT8 Byte[256]; + UINT16 Word[128]; + UINT32 Dword[64]; + } Config; +} PXE_PCI_CONFIG_INFO; + +typedef struct s_pxe_pcc_config_info { + /// + /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union. + /// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC. + /// + PXE_UINT32 BusType; + + /// + /// This identifies the PCC network device that this UNDI interface + /// is bound to. + /// + PXE_UINT16 Bus; + PXE_UINT8 Device; + PXE_UINT8 Function; + + /// + /// This is a copy of the PCC configuration space for this + /// network device. + /// + union { + PXE_UINT8 Byte[256]; + PXE_UINT16 Word[128]; + PXE_UINT32 Dword[64]; + } Config; +} PXE_PCC_CONFIG_INFO; + +typedef union u_pxe_db_get_config_info { + PXE_PCI_CONFIG_INFO pci; + PXE_PCC_CONFIG_INFO pcc; +} PXE_DB_GET_CONFIG_INFO; + +typedef struct s_pxe_cpb_initialize { + /// + /// Address of first (lowest) byte of the memory buffer. This buffer must + /// be in contiguous physical memory and cannot be swapped out. The UNDI + /// will be using this for transmit and receive buffering. + /// + PXE_UINT64 MemoryAddr; + + /// + /// MemoryLength must be greater than or equal to MemoryRequired + /// returned by the Get Init Info command. + /// + PXE_UINT32 MemoryLength; + + /// + /// Desired link speed in Mbit/sec. Common ethernet values are 10, 100 + /// and 1000. Setting a value of zero will auto-detect and/or use the + /// default link speed (operation depends on UNDI/NIC functionality). + /// + PXE_UINT32 LinkSpeed; + + /// + /// Suggested number and size of receive and transmit buffers to + /// allocate. If MemoryAddr and MemoryLength are non-zero, this + /// allocation comes out of the supplied memory buffer. If MemoryAddr + /// and MemoryLength are zero, this allocation comes out of memory + /// on the NIC. + /// + /// If these fields are set to zero, the UNDI will allocate buffer + /// counts and sizes as it sees fit. + /// + PXE_UINT16 TxBufCnt; + PXE_UINT16 TxBufSize; + PXE_UINT16 RxBufCnt; + PXE_UINT16 RxBufSize; + + /// + /// The following configuration parameters are optional and must be zero + /// to use the default values. + /// + PXE_UINT8 DuplexMode; + + PXE_UINT8 LoopBackMode; +} PXE_CPB_INITIALIZE; + +#define PXE_DUPLEX_DEFAULT 0x00 +#define PXE_FORCE_FULL_DUPLEX 0x01 +#define PXE_ENABLE_FULL_DUPLEX 0x02 +#define PXE_FORCE_HALF_DUPLEX 0x04 +#define PXE_DISABLE_FULL_DUPLEX 0x08 + +#define LOOPBACK_NORMAL 0 +#define LOOPBACK_INTERNAL 1 +#define LOOPBACK_EXTERNAL 2 + +typedef struct s_pxe_db_initialize { + /// + /// Actual amount of memory used from the supplied memory buffer. This + /// may be less that the amount of memory suppllied and may be zero if + /// the UNDI and network device do not use external memory buffers. + /// + /// Memory used by the UNDI and network device is allocated from the + /// lowest memory buffer address. + /// + PXE_UINT32 MemoryUsed; + + /// + /// Actual number and size of receive and transmit buffers that were + /// allocated. + /// + PXE_UINT16 TxBufCnt; + PXE_UINT16 TxBufSize; + PXE_UINT16 RxBufCnt; + PXE_UINT16 RxBufSize; +} PXE_DB_INITIALIZE; + +typedef struct s_pxe_cpb_receive_filters { + /// + /// List of multicast MAC addresses. This list, if present, will + /// replace the existing multicast MAC address filter list. + /// + PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT]; +} PXE_CPB_RECEIVE_FILTERS; + +typedef struct s_pxe_db_receive_filters { + /// + /// Filtered multicast MAC address list. + /// + PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT]; +} PXE_DB_RECEIVE_FILTERS; + +typedef struct s_pxe_cpb_station_address { + /// + /// If supplied and supported, the current station MAC address + /// will be changed. + /// + PXE_MAC_ADDR StationAddr; +} PXE_CPB_STATION_ADDRESS; + +typedef struct s_pxe_dpb_station_address { + /// + /// Current station MAC address. + /// + PXE_MAC_ADDR StationAddr; + + /// + /// Station broadcast MAC address. + /// + PXE_MAC_ADDR BroadcastAddr; + + /// + /// Permanent station MAC address. + /// + PXE_MAC_ADDR PermanentAddr; +} PXE_DB_STATION_ADDRESS; + +typedef struct s_pxe_db_statistics { + /// + /// Bit field identifying what statistic data is collected by the + /// UNDI/NIC. + /// If bit 0x00 is set, Data[0x00] is collected. + /// If bit 0x01 is set, Data[0x01] is collected. + /// If bit 0x20 is set, Data[0x20] is collected. + /// If bit 0x21 is set, Data[0x21] is collected. + /// Etc. + /// + PXE_UINT64 Supported; + + /// + /// Statistic data. + /// + PXE_UINT64 Data[64]; +} PXE_DB_STATISTICS; + +/// +/// Total number of frames received. Includes frames with errors and +/// dropped frames. +/// +#define PXE_STATISTICS_RX_TOTAL_FRAMES 0x00 + +/// +/// Number of valid frames received and copied into receive buffers. +/// +#define PXE_STATISTICS_RX_GOOD_FRAMES 0x01 + +/// +/// Number of frames below the minimum length for the media. +/// This would be <64 for ethernet. +/// +#define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02 + +/// +/// Number of frames longer than the maxminum length for the +/// media. This would be >1500 for ethernet. +/// +#define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03 + +/// +/// Valid frames that were dropped because receive buffers were full. +/// +#define PXE_STATISTICS_RX_DROPPED_FRAMES 0x04 + +/// +/// Number of valid unicast frames received and not dropped. +/// +#define PXE_STATISTICS_RX_UNICAST_FRAMES 0x05 + +/// +/// Number of valid broadcast frames received and not dropped. +/// +#define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06 + +/// +/// Number of valid mutlicast frames received and not dropped. +/// +#define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07 + +/// +/// Number of frames w/ CRC or alignment errors. +/// +#define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08 + +/// +/// Total number of bytes received. Includes frames with errors +/// and dropped frames. +/// +#define PXE_STATISTICS_RX_TOTAL_BYTES 0x09 + +/// +/// Transmit statistics. +/// +#define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A +#define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B +#define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C +#define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D +#define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E +#define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F +#define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10 +#define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11 +#define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12 +#define PXE_STATISTICS_TX_TOTAL_BYTES 0x13 + +/// +/// Number of collisions detection on this subnet. +/// +#define PXE_STATISTICS_COLLISIONS 0x14 + +/// +/// Number of frames destined for unsupported protocol. +/// +#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15 + +typedef struct s_pxe_cpb_mcast_ip_to_mac { + /// + /// Multicast IP address to be converted to multicast MAC address. + /// + PXE_IP_ADDR IP; +} PXE_CPB_MCAST_IP_TO_MAC; + +typedef struct s_pxe_db_mcast_ip_to_mac { + /// + /// Multicast MAC address. + /// + PXE_MAC_ADDR MAC; +} PXE_DB_MCAST_IP_TO_MAC; + +typedef struct s_pxe_cpb_nvdata_sparse { + /// + /// NvData item list. Only items in this list will be updated. + /// + struct { + /// + /// Non-volatile storage address to be changed. + /// + PXE_UINT32 Addr; + + /// + /// Data item to write into above storage address. + /// + union { + PXE_UINT8 Byte; + PXE_UINT16 Word; + PXE_UINT32 Dword; + } Data; + } Item[MAX_EEPROM_LEN]; +} PXE_CPB_NVDATA_SPARSE; + +/// +/// When using bulk update, the size of the CPB structure must be +/// the same size as the non-volatile NIC storage. +/// +typedef union u_pxe_cpb_nvdata_bulk { + /// + /// Array of byte-wide data items. + /// + PXE_UINT8 Byte[MAX_EEPROM_LEN << 2]; + + /// + /// Array of word-wide data items. + /// + PXE_UINT16 Word[MAX_EEPROM_LEN << 1]; + + /// + /// Array of dword-wide data items. + /// + PXE_UINT32 Dword[MAX_EEPROM_LEN]; +} PXE_CPB_NVDATA_BULK; + +typedef struct s_pxe_db_nvdata { + /// + /// Arrays of data items from non-volatile storage. + /// + union { + /// + /// Array of byte-wide data items. + /// + PXE_UINT8 Byte[MAX_EEPROM_LEN << 2]; + + /// + /// Array of word-wide data items. + /// + PXE_UINT16 Word[MAX_EEPROM_LEN << 1]; + + /// + /// Array of dword-wide data items. + /// + PXE_UINT32 Dword[MAX_EEPROM_LEN]; + } Data; +} PXE_DB_NVDATA; + +typedef struct s_pxe_db_get_status { + /// + /// Length of next receive frame (header + data). If this is zero, + /// there is no next receive frame available. + /// + PXE_UINT32 RxFrameLen; + + /// + /// Reserved, set to zero. + /// + PXE_UINT32 reserved; + + /// + /// Addresses of transmitted buffers that need to be recycled. + /// + PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS]; +} PXE_DB_GET_STATUS; + +typedef struct s_pxe_cpb_fill_header { + /// + /// Source and destination MAC addresses. These will be copied into + /// the media header without doing byte swapping. + /// + PXE_MAC_ADDR SrcAddr; + PXE_MAC_ADDR DestAddr; + + /// + /// Address of first byte of media header. The first byte of packet data + /// follows the last byte of the media header. + /// + PXE_UINT64 MediaHeader; + + /// + /// Length of packet data in bytes (not including the media header). + /// + PXE_UINT32 PacketLen; + + /// + /// Protocol type. This will be copied into the media header without + /// doing byte swapping. Protocol type numbers can be obtained from + /// the Assigned Numbers RFC 1700. + /// + PXE_UINT16 Protocol; + + /// + /// Length of the media header in bytes. + /// + PXE_UINT16 MediaHeaderLen; +} PXE_CPB_FILL_HEADER; + +#define PXE_PROTOCOL_ETHERNET_IP 0x0800 +#define PXE_PROTOCOL_ETHERNET_ARP 0x0806 +#define MAX_XMIT_FRAGMENTS 16 + +typedef struct s_pxe_cpb_fill_header_fragmented { + /// + /// Source and destination MAC addresses. These will be copied into + /// the media header without doing byte swapping. + /// + PXE_MAC_ADDR SrcAddr; + PXE_MAC_ADDR DestAddr; + + /// + /// Length of packet data in bytes (not including the media header). + /// + PXE_UINT32 PacketLen; + + /// + /// Protocol type. This will be copied into the media header without + /// doing byte swapping. Protocol type numbers can be obtained from + /// the Assigned Numbers RFC 1700. + /// + PXE_MEDIA_PROTOCOL Protocol; + + /// + /// Length of the media header in bytes. + /// + PXE_UINT16 MediaHeaderLen; + + /// + /// Number of packet fragment descriptors. + /// + PXE_UINT16 FragCnt; + + /// + /// Reserved, must be set to zero. + /// + PXE_UINT16 reserved; + + /// + /// Array of packet fragment descriptors. The first byte of the media + /// header is the first byte of the first fragment. + /// + struct { + /// + /// Address of this packet fragment. + /// + PXE_UINT64 FragAddr; + + /// + /// Length of this packet fragment. + /// + PXE_UINT32 FragLen; + + /// + /// Reserved, must be set to zero. + /// + PXE_UINT32 reserved; + } FragDesc[MAX_XMIT_FRAGMENTS]; +} +PXE_CPB_FILL_HEADER_FRAGMENTED; + +typedef struct s_pxe_cpb_transmit { + /// + /// Address of first byte of frame buffer. This is also the first byte + /// of the media header. + /// + PXE_UINT64 FrameAddr; + + /// + /// Length of the data portion of the frame buffer in bytes. Do not + /// include the length of the media header. + /// + PXE_UINT32 DataLen; + + /// + /// Length of the media header in bytes. + /// + PXE_UINT16 MediaheaderLen; + + /// + /// Reserved, must be zero. + /// + PXE_UINT16 reserved; +} PXE_CPB_TRANSMIT; + +typedef struct s_pxe_cpb_transmit_fragments { + /// + /// Length of packet data in bytes (not including the media header). + /// + PXE_UINT32 FrameLen; + + /// + /// Length of the media header in bytes. + /// + PXE_UINT16 MediaheaderLen; + + /// + /// Number of packet fragment descriptors. + /// + PXE_UINT16 FragCnt; + + /// + /// Array of frame fragment descriptors. The first byte of the first + /// fragment is also the first byte of the media header. + /// + struct { + /// + /// Address of this frame fragment. + /// + PXE_UINT64 FragAddr; + + /// + /// Length of this frame fragment. + /// + PXE_UINT32 FragLen; + + /// + /// Reserved, must be set to zero. + /// + PXE_UINT32 reserved; + } FragDesc[MAX_XMIT_FRAGMENTS]; +} +PXE_CPB_TRANSMIT_FRAGMENTS; + +typedef struct s_pxe_cpb_receive { + /// + /// Address of first byte of receive buffer. This is also the first byte + /// of the frame header. + /// + PXE_UINT64 BufferAddr; + + /// + /// Length of receive buffer. This must be large enough to hold the + /// received frame (media header + data). If the length of smaller than + /// the received frame, data will be lost. + /// + PXE_UINT32 BufferLen; + + /// + /// Reserved, must be set to zero. + /// + PXE_UINT32 reserved; +} PXE_CPB_RECEIVE; + +typedef struct s_pxe_db_receive { + /// + /// Source and destination MAC addresses from media header. + /// + PXE_MAC_ADDR SrcAddr; + PXE_MAC_ADDR DestAddr; + + /// + /// Length of received frame. May be larger than receive buffer size. + /// The receive buffer will not be overwritten. This is how to tell + /// if data was lost because the receive buffer was too small. + /// + PXE_UINT32 FrameLen; + + /// + /// Protocol type from media header. + /// + PXE_MEDIA_PROTOCOL Protocol; + + /// + /// Length of media header in received frame. + /// + PXE_UINT16 MediaHeaderLen; + + /// + /// Type of receive frame. + /// + PXE_FRAME_TYPE Type; + + /// + /// Reserved, must be zero. + /// + PXE_UINT8 reserved[7]; + +} PXE_DB_RECEIVE; + +#pragma pack() + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiSpec.h b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiSpec.h new file mode 100644 index 000000000..422b2f30e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/Uefi/UefiSpec.h @@ -0,0 +1,2146 @@ +/** @file + Include file that supports UEFI. + + This include file must contain things defined in the UEFI 2.4 specification. + If a code construct is defined in the UEFI 2.4 specification it must be included + by this include file. + +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __UEFI_SPEC_H__ +#define __UEFI_SPEC_H__ + +FILE_LICENCE ( BSD3 ); + +#include <ipxe/efi/Uefi/UefiMultiPhase.h> + +#include <ipxe/efi/Protocol/DevicePath.h> +#include <ipxe/efi/Protocol/SimpleTextIn.h> +#include <ipxe/efi/Protocol/SimpleTextInEx.h> +#include <ipxe/efi/Protocol/SimpleTextOut.h> + +/// +/// Enumeration of EFI memory allocation types. +/// +typedef enum { + /// + /// Allocate any available range of pages that satisfies the request. + /// + AllocateAnyPages, + /// + /// Allocate any available range of pages whose uppermost address is less than + /// or equal to a specified maximum address. + /// + AllocateMaxAddress, + /// + /// Allocate pages at a specified address. + /// + AllocateAddress, + /// + /// Maximum enumeration value that may be used for bounds checking. + /// + MaxAllocateType +} EFI_ALLOCATE_TYPE; + +// +// Bit definitions for EFI_TIME.Daylight +// +#define EFI_TIME_ADJUST_DAYLIGHT 0x01 +#define EFI_TIME_IN_DAYLIGHT 0x02 + +/// +/// Value definition for EFI_TIME.TimeZone. +/// +#define EFI_UNSPECIFIED_TIMEZONE 0x07FF + +// +// Memory cacheability attributes +// +#define EFI_MEMORY_UC 0x0000000000000001ULL +#define EFI_MEMORY_WC 0x0000000000000002ULL +#define EFI_MEMORY_WT 0x0000000000000004ULL +#define EFI_MEMORY_WB 0x0000000000000008ULL +#define EFI_MEMORY_UCE 0x0000000000000010ULL +// +// Physical memory protection attributes +// +#define EFI_MEMORY_WP 0x0000000000001000ULL +#define EFI_MEMORY_RP 0x0000000000002000ULL +#define EFI_MEMORY_XP 0x0000000000004000ULL +// +// Runtime memory attribute +// +#define EFI_MEMORY_RUNTIME 0x8000000000000000ULL + +/// +/// Memory descriptor version number. +/// +#define EFI_MEMORY_DESCRIPTOR_VERSION 1 + +/// +/// Definition of an EFI memory descriptor. +/// +typedef struct { + /// + /// Type of the memory region. See EFI_MEMORY_TYPE. + /// + UINT32 Type; + /// + /// Physical address of the first byte of the memory region. Must aligned + /// on a 4 KB boundary. + /// + EFI_PHYSICAL_ADDRESS PhysicalStart; + /// + /// Virtual address of the first byte of the memory region. Must aligned + /// on a 4 KB boundary. + /// + EFI_VIRTUAL_ADDRESS VirtualStart; + /// + /// Number of 4KB pages in the memory region. + /// + UINT64 NumberOfPages; + /// + /// Attributes of the memory region that describe the bit mask of capabilities + /// for that memory region, and not necessarily the current settings for that + /// memory region. + /// + UINT64 Attribute; +} EFI_MEMORY_DESCRIPTOR; + +/** + Allocates memory pages from the system. + + @param Type The type of allocation to perform. + @param MemoryType The type of memory to allocate. + @param Pages The number of contiguous 4 KB pages to allocate. + @param Memory The pointer to a physical address. On input, the way in which the address is + used depends on the value of Type. + + @retval EFI_SUCCESS The requested pages were allocated. + @retval EFI_INVALID_PARAMETER 1) Type is not AllocateAnyPages or + AllocateMaxAddress or AllocateAddress. + 2) MemoryType is in the range + 3) Memory is NULL. + EfiMaxMemoryType..0x7FFFFFFF. + @retval EFI_OUT_OF_RESOURCES The pages could not be allocated. + @retval EFI_NOT_FOUND The requested pages could not be found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ALLOCATE_PAGES)( + IN EFI_ALLOCATE_TYPE Type, + IN EFI_MEMORY_TYPE MemoryType, + IN UINTN Pages, + IN OUT EFI_PHYSICAL_ADDRESS *Memory + ); + +/** + Frees memory pages. + + @param Memory The base physical address of the pages to be freed. + @param Pages The number of contiguous 4 KB pages to free. + + @retval EFI_SUCCESS The requested pages were freed. + @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or Pages is invalid. + @retval EFI_NOT_FOUND The requested memory pages were not allocated with + AllocatePages(). + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FREE_PAGES)( + IN EFI_PHYSICAL_ADDRESS Memory, + IN UINTN Pages + ); + +/** + Returns the current memory map. + + @param MemoryMapSize A pointer to the size, in bytes, of the MemoryMap buffer. + On input, this is the size of the buffer allocated by the caller. + On output, it is the size of the buffer returned by the firmware if + the buffer was large enough, or the size of the buffer needed to contain + the map if the buffer was too small. + @param MemoryMap A pointer to the buffer in which firmware places the current memory + map. + @param MapKey A pointer to the location in which firmware returns the key for the + current memory map. + @param DescriptorSize A pointer to the location in which firmware returns the size, in bytes, of + an individual EFI_MEMORY_DESCRIPTOR. + @param DescriptorVersion A pointer to the location in which firmware returns the version number + associated with the EFI_MEMORY_DESCRIPTOR. + + @retval EFI_SUCCESS The memory map was returned in the MemoryMap buffer. + @retval EFI_BUFFER_TOO_SMALL The MemoryMap buffer was too small. The current buffer size + needed to hold the memory map is returned in MemoryMapSize. + @retval EFI_INVALID_PARAMETER 1) MemoryMapSize is NULL. + 2) The MemoryMap buffer is not too small and MemoryMap is + NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_MEMORY_MAP)( + IN OUT UINTN *MemoryMapSize, + IN OUT EFI_MEMORY_DESCRIPTOR *MemoryMap, + OUT UINTN *MapKey, + OUT UINTN *DescriptorSize, + OUT UINT32 *DescriptorVersion + ); + +/** + Allocates pool memory. + + @param PoolType The type of pool to allocate. + @param Size The number of bytes to allocate from the pool. + @param Buffer A pointer to a pointer to the allocated buffer if the call succeeds; + undefined otherwise. + + @retval EFI_SUCCESS The requested number of bytes was allocated. + @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated. + @retval EFI_INVALID_PARAMETER PoolType was invalid or Buffer is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_ALLOCATE_POOL)( + IN EFI_MEMORY_TYPE PoolType, + IN UINTN Size, + OUT VOID **Buffer + ); + +/** + Returns pool memory to the system. + + @param Buffer The pointer to the buffer to free. + + @retval EFI_SUCCESS The memory was returned to the system. + @retval EFI_INVALID_PARAMETER Buffer was invalid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_FREE_POOL)( + IN VOID *Buffer + ); + +/** + Changes the runtime addressing mode of EFI firmware from physical to virtual. + + @param MemoryMapSize The size in bytes of VirtualMap. + @param DescriptorSize The size in bytes of an entry in the VirtualMap. + @param DescriptorVersion The version of the structure entries in VirtualMap. + @param VirtualMap An array of memory descriptors which contain new virtual + address mapping information for all runtime ranges. + + @retval EFI_SUCCESS The virtual address map has been applied. + @retval EFI_UNSUPPORTED EFI firmware is not at runtime, or the EFI firmware is already in + virtual address mapped mode. + @retval EFI_INVALID_PARAMETER DescriptorSize or DescriptorVersion is invalid. + @retval EFI_NO_MAPPING A virtual address was not supplied for a range in the memory + map that requires a mapping. + @retval EFI_NOT_FOUND A virtual address was supplied for an address that is not found + in the memory map. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_VIRTUAL_ADDRESS_MAP)( + IN UINTN MemoryMapSize, + IN UINTN DescriptorSize, + IN UINT32 DescriptorVersion, + IN EFI_MEMORY_DESCRIPTOR *VirtualMap + ); + +/** + Connects one or more drivers to a controller. + + @param ControllerHandle The handle of the controller to which driver(s) are to be connected. + @param DriverImageHandle A pointer to an ordered list handles that support the + EFI_DRIVER_BINDING_PROTOCOL. + @param RemainingDevicePath A pointer to the device path that specifies a child of the + controller specified by ControllerHandle. + @param Recursive If TRUE, then ConnectController() is called recursively + until the entire tree of controllers below the controller specified + by ControllerHandle have been created. If FALSE, then + the tree of controllers is only expanded one level. + + @retval EFI_SUCCESS 1) One or more drivers were connected to ControllerHandle. + 2) No drivers were connected to ControllerHandle, but + RemainingDevicePath is not NULL, and it is an End Device + Path Node. + @retval EFI_INVALID_PARAMETER ControllerHandle is NULL. + @retval EFI_NOT_FOUND 1) There are no EFI_DRIVER_BINDING_PROTOCOL instances + present in the system. + 2) No drivers were connected to ControllerHandle. + @retval EFI_SECURITY_VIOLATION + The user has no permission to start UEFI device drivers on the device path + associated with the ControllerHandle or specified by the RemainingDevicePath. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CONNECT_CONTROLLER)( + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE *DriverImageHandle, OPTIONAL + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath, OPTIONAL + IN BOOLEAN Recursive + ); + +/** + Disconnects one or more drivers from a controller. + + @param ControllerHandle The handle of the controller from which driver(s) are to be disconnected. + @param DriverImageHandle The driver to disconnect from ControllerHandle. + If DriverImageHandle is NULL, then all the drivers currently managing + ControllerHandle are disconnected from ControllerHandle. + @param ChildHandle The handle of the child to destroy. + If ChildHandle is NULL, then all the children of ControllerHandle are + destroyed before the drivers are disconnected from ControllerHandle. + + @retval EFI_SUCCESS 1) One or more drivers were disconnected from the controller. + 2) On entry, no drivers are managing ControllerHandle. + 3) DriverImageHandle is not NULL, and on entry + DriverImageHandle is not managing ControllerHandle. + @retval EFI_INVALID_PARAMETER 1) ControllerHandle is NULL. + 2) DriverImageHandle is not NULL, and it is not a valid EFI_HANDLE. + 3) ChildHandle is not NULL, and it is not a valid EFI_HANDLE. + 4) DriverImageHandle does not support the EFI_DRIVER_BINDING_PROTOCOL. + @retval EFI_OUT_OF_RESOURCES There are not enough resources available to disconnect any drivers from + ControllerHandle. + @retval EFI_DEVICE_ERROR The controller could not be disconnected because of a device error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_DISCONNECT_CONTROLLER)( + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE DriverImageHandle, OPTIONAL + IN EFI_HANDLE ChildHandle OPTIONAL + ); + + + +// +// ConvertPointer DebugDisposition type. +// +#define EFI_OPTIONAL_PTR 0x00000001 + +/** + Determines the new virtual address that is to be used on subsequent memory accesses. + + @param DebugDisposition Supplies type information for the pointer being converted. + @param Address A pointer to a pointer that is to be fixed to be the value needed + for the new virtual address mappings being applied. + + @retval EFI_SUCCESS The pointer pointed to by Address was modified. + @retval EFI_INVALID_PARAMETER 1) Address is NULL. + 2) *Address is NULL and DebugDisposition does + not have the EFI_OPTIONAL_PTR bit set. + @retval EFI_NOT_FOUND The pointer pointed to by Address was not found to be part + of the current memory map. This is normally fatal. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CONVERT_POINTER)( + IN UINTN DebugDisposition, + IN OUT VOID **Address + ); + + +// +// These types can be ORed together as needed - for example, +// EVT_TIMER might be Ored with EVT_NOTIFY_WAIT or +// EVT_NOTIFY_SIGNAL. +// +#define EVT_TIMER 0x80000000 +#define EVT_RUNTIME 0x40000000 +#define EVT_NOTIFY_WAIT 0x00000100 +#define EVT_NOTIFY_SIGNAL 0x00000200 + +#define EVT_SIGNAL_EXIT_BOOT_SERVICES 0x00000201 +#define EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE 0x60000202 + +// +// The event's NotifyContext pointer points to a runtime memory +// address. +// The event is deprecated in UEFI2.0 and later specifications. +// +#define EVT_RUNTIME_CONTEXT 0x20000000 + + +/** + Invoke a notification event + + @param Event Event whose notification function is being invoked. + @param Context The pointer to the notification function's context, + which is implementation-dependent. + +**/ +typedef +VOID +(EFIAPI *EFI_EVENT_NOTIFY)( + IN EFI_EVENT Event, + IN VOID *Context + ); + +/** + Creates an event. + + @param Type The type of event to create and its mode and attributes. + @param NotifyTpl The task priority level of event notifications, if needed. + @param NotifyFunction The pointer to the event's notification function, if any. + @param NotifyContext The pointer to the notification function's context; corresponds to parameter + Context in the notification function. + @param Event The pointer to the newly created event if the call succeeds; undefined + otherwise. + + @retval EFI_SUCCESS The event structure was created. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The event could not be allocated. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CREATE_EVENT)( + IN UINT32 Type, + IN EFI_TPL NotifyTpl, + IN EFI_EVENT_NOTIFY NotifyFunction, + IN VOID *NotifyContext, + OUT EFI_EVENT *Event + ); + +/** + Creates an event in a group. + + @param Type The type of event to create and its mode and attributes. + @param NotifyTpl The task priority level of event notifications,if needed. + @param NotifyFunction The pointer to the event's notification function, if any. + @param NotifyContext The pointer to the notification function's context; corresponds to parameter + Context in the notification function. + @param EventGroup The pointer to the unique identifier of the group to which this event belongs. + If this is NULL, then the function behaves as if the parameters were passed + to CreateEvent. + @param Event The pointer to the newly created event if the call succeeds; undefined + otherwise. + + @retval EFI_SUCCESS The event structure was created. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The event could not be allocated. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CREATE_EVENT_EX)( + IN UINT32 Type, + IN EFI_TPL NotifyTpl, + IN EFI_EVENT_NOTIFY NotifyFunction OPTIONAL, + IN CONST VOID *NotifyContext OPTIONAL, + IN CONST EFI_GUID *EventGroup OPTIONAL, + OUT EFI_EVENT *Event + ); + +/// +/// Timer delay types +/// +typedef enum { + /// + /// An event's timer settings is to be cancelled and not trigger time is to be set/ + /// + TimerCancel, + /// + /// An event is to be signaled periodically at a specified interval from the current time. + /// + TimerPeriodic, + /// + /// An event is to be signaled once at a specified interval from the current time. + /// + TimerRelative +} EFI_TIMER_DELAY; + +/** + Sets the type of timer and the trigger time for a timer event. + + @param Event The timer event that is to be signaled at the specified time. + @param Type The type of time that is specified in TriggerTime. + @param TriggerTime The number of 100ns units until the timer expires. + A TriggerTime of 0 is legal. + If Type is TimerRelative and TriggerTime is 0, then the timer + event will be signaled on the next timer tick. + If Type is TimerPeriodic and TriggerTime is 0, then the timer + event will be signaled on every timer tick. + + @retval EFI_SUCCESS The event has been set to be signaled at the requested time. + @retval EFI_INVALID_PARAMETER Event or Type is not valid. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_TIMER)( + IN EFI_EVENT Event, + IN EFI_TIMER_DELAY Type, + IN UINT64 TriggerTime + ); + +/** + Signals an event. + + @param Event The event to signal. + + @retval EFI_SUCCESS The event has been signaled. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SIGNAL_EVENT)( + IN EFI_EVENT Event + ); + +/** + Stops execution until an event is signaled. + + @param NumberOfEvents The number of events in the Event array. + @param Event An array of EFI_EVENT. + @param Index The pointer to the index of the event which satisfied the wait condition. + + @retval EFI_SUCCESS The event indicated by Index was signaled. + @retval EFI_INVALID_PARAMETER 1) NumberOfEvents is 0. + 2) The event indicated by Index is of type + EVT_NOTIFY_SIGNAL. + @retval EFI_UNSUPPORTED The current TPL is not TPL_APPLICATION. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_WAIT_FOR_EVENT)( + IN UINTN NumberOfEvents, + IN EFI_EVENT *Event, + OUT UINTN *Index + ); + +/** + Closes an event. + + @param Event The event to close. + + @retval EFI_SUCCESS The event has been closed. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CLOSE_EVENT)( + IN EFI_EVENT Event + ); + +/** + Checks whether an event is in the signaled state. + + @param Event The event to check. + + @retval EFI_SUCCESS The event is in the signaled state. + @retval EFI_NOT_READY The event is not in the signaled state. + @retval EFI_INVALID_PARAMETER Event is of type EVT_NOTIFY_SIGNAL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CHECK_EVENT)( + IN EFI_EVENT Event + ); + + +// +// Task priority level +// +#define TPL_APPLICATION 4 +#define TPL_CALLBACK 8 +#define TPL_NOTIFY 16 +#define TPL_HIGH_LEVEL 31 + + +/** + Raises a task's priority level and returns its previous level. + + @param NewTpl The new task priority level. + + @return Previous task priority level + +**/ +typedef +EFI_TPL +(EFIAPI *EFI_RAISE_TPL)( + IN EFI_TPL NewTpl + ); + +/** + Restores a task's priority level to its previous value. + + @param OldTpl The previous task priority level to restore. + +**/ +typedef +VOID +(EFIAPI *EFI_RESTORE_TPL)( + IN EFI_TPL OldTpl + ); + +/** + Returns the value of a variable. + + @param VariableName A Null-terminated string that is the name of the vendor's + variable. + @param VendorGuid A unique identifier for the vendor. + @param Attributes If not NULL, a pointer to the memory location to return the + attributes bitmask for the variable. + @param DataSize On input, the size in bytes of the return Data buffer. + On output the size of data returned in Data. + @param Data The buffer to return the contents of the variable. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_NOT_FOUND The variable was not found. + @retval EFI_BUFFER_TOO_SMALL The DataSize is too small for the result. + @retval EFI_INVALID_PARAMETER VariableName is NULL. + @retval EFI_INVALID_PARAMETER VendorGuid is NULL. + @retval EFI_INVALID_PARAMETER DataSize is NULL. + @retval EFI_INVALID_PARAMETER The DataSize is not too small and Data is NULL. + @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error. + @retval EFI_SECURITY_VIOLATION The variable could not be retrieved due to an authentication failure. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_VARIABLE)( + IN CHAR16 *VariableName, + IN EFI_GUID *VendorGuid, + OUT UINT32 *Attributes, OPTIONAL + IN OUT UINTN *DataSize, + OUT VOID *Data + ); + +/** + Enumerates the current variable names. + + @param VariableNameSize The size of the VariableName buffer. + @param VariableName On input, supplies the last VariableName that was returned + by GetNextVariableName(). On output, returns the Nullterminated + string of the current variable. + @param VendorGuid On input, supplies the last VendorGuid that was returned by + GetNextVariableName(). On output, returns the + VendorGuid of the current variable. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_NOT_FOUND The next variable was not found. + @retval EFI_BUFFER_TOO_SMALL The VariableNameSize is too small for the result. + @retval EFI_INVALID_PARAMETER VariableNameSize is NULL. + @retval EFI_INVALID_PARAMETER VariableName is NULL. + @retval EFI_INVALID_PARAMETER VendorGuid is NULL. + @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_NEXT_VARIABLE_NAME)( + IN OUT UINTN *VariableNameSize, + IN OUT CHAR16 *VariableName, + IN OUT EFI_GUID *VendorGuid + ); + +/** + Sets the value of a variable. + + @param VariableName A Null-terminated string that is the name of the vendor's variable. + Each VariableName is unique for each VendorGuid. VariableName must + contain 1 or more characters. If VariableName is an empty string, + then EFI_INVALID_PARAMETER is returned. + @param VendorGuid A unique identifier for the vendor. + @param Attributes Attributes bitmask to set for the variable. + @param DataSize The size in bytes of the Data buffer. Unless the EFI_VARIABLE_APPEND_WRITE, + EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, or + EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS attribute is set, a size of zero + causes the variable to be deleted. When the EFI_VARIABLE_APPEND_WRITE attribute is + set, then a SetVariable() call with a DataSize of zero will not cause any change to + the variable value (the timestamp associated with the variable may be updated however + even if no new data value is provided,see the description of the + EFI_VARIABLE_AUTHENTICATION_2 descriptor below. In this case the DataSize will not + be zero since the EFI_VARIABLE_AUTHENTICATION_2 descriptor will be populated). + @param Data The contents for the variable. + + @retval EFI_SUCCESS The firmware has successfully stored the variable and its data as + defined by the Attributes. + @retval EFI_INVALID_PARAMETER An invalid combination of attribute bits, name, and GUID was supplied, or the + DataSize exceeds the maximum allowed. + @retval EFI_INVALID_PARAMETER VariableName is an empty string. + @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold the variable and its data. + @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error. + @retval EFI_WRITE_PROTECTED The variable in question is read-only. + @retval EFI_WRITE_PROTECTED The variable in question cannot be deleted. + @retval EFI_SECURITY_VIOLATION The variable could not be written due to EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS + or EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACESS being set, but the AuthInfo + does NOT pass the validation check carried out by the firmware. + + @retval EFI_NOT_FOUND The variable trying to be updated or deleted was not found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_VARIABLE)( + IN CHAR16 *VariableName, + IN EFI_GUID *VendorGuid, + IN UINT32 Attributes, + IN UINTN DataSize, + IN VOID *Data + ); + + +/// +/// This provides the capabilities of the +/// real time clock device as exposed through the EFI interfaces. +/// +typedef struct { + /// + /// Provides the reporting resolution of the real-time clock device in + /// counts per second. For a normal PC-AT CMOS RTC device, this + /// value would be 1 Hz, or 1, to indicate that the device only reports + /// the time to the resolution of 1 second. + /// + UINT32 Resolution; + /// + /// Provides the timekeeping accuracy of the real-time clock in an + /// error rate of 1E-6 parts per million. For a clock with an accuracy + /// of 50 parts per million, the value in this field would be + /// 50,000,000. + /// + UINT32 Accuracy; + /// + /// A TRUE indicates that a time set operation clears the device's + /// time below the Resolution reporting level. A FALSE + /// indicates that the state below the Resolution level of the + /// device is not cleared when the time is set. Normal PC-AT CMOS + /// RTC devices set this value to FALSE. + /// + BOOLEAN SetsToZero; +} EFI_TIME_CAPABILITIES; + +/** + Returns the current time and date information, and the time-keeping capabilities + of the hardware platform. + + @param Time A pointer to storage to receive a snapshot of the current time. + @param Capabilities An optional pointer to a buffer to receive the real time clock + device's capabilities. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER Time is NULL. + @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_TIME)( + OUT EFI_TIME *Time, + OUT EFI_TIME_CAPABILITIES *Capabilities OPTIONAL + ); + +/** + Sets the current local time and date information. + + @param Time A pointer to the current time. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER A time field is out of range. + @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_TIME)( + IN EFI_TIME *Time + ); + +/** + Returns the current wakeup alarm clock setting. + + @param Enabled Indicates if the alarm is currently enabled or disabled. + @param Pending Indicates if the alarm signal is pending and requires acknowledgement. + @param Time The current alarm setting. + + @retval EFI_SUCCESS The alarm settings were returned. + @retval EFI_INVALID_PARAMETER Enabled is NULL. + @retval EFI_INVALID_PARAMETER Pending is NULL. + @retval EFI_INVALID_PARAMETER Time is NULL. + @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error. + @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_WAKEUP_TIME)( + OUT BOOLEAN *Enabled, + OUT BOOLEAN *Pending, + OUT EFI_TIME *Time + ); + +/** + Sets the system wakeup alarm clock time. + + @param Enabled Enable or disable the wakeup alarm. + @param Time If Enable is TRUE, the time to set the wakeup alarm for. + If Enable is FALSE, then this parameter is optional, and may be NULL. + + @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If + Enable is FALSE, then the wakeup alarm was disabled. + @retval EFI_INVALID_PARAMETER A time field is out of range. + @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error. + @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_WAKEUP_TIME)( + IN BOOLEAN Enable, + IN EFI_TIME *Time OPTIONAL + ); + +/** + Loads an EFI image into memory. + + @param BootPolicy If TRUE, indicates that the request originates from the boot + manager, and that the boot manager is attempting to load + FilePath as a boot selection. Ignored if SourceBuffer is + not NULL. + @param ParentImageHandle The caller's image handle. + @param DevicePath The DeviceHandle specific file path from which the image is + loaded. + @param SourceBuffer If not NULL, a pointer to the memory location containing a copy + of the image to be loaded. + @param SourceSize The size in bytes of SourceBuffer. Ignored if SourceBuffer is NULL. + @param ImageHandle The pointer to the returned image handle that is created when the + image is successfully loaded. + + @retval EFI_SUCCESS Image was loaded into memory correctly. + @retval EFI_NOT_FOUND Both SourceBuffer and DevicePath are NULL. + @retval EFI_INVALID_PARAMETER One or more parametes are invalid. + @retval EFI_UNSUPPORTED The image type is not supported. + @retval EFI_OUT_OF_RESOURCES Image was not loaded due to insufficient resources. + @retval EFI_LOAD_ERROR Image was not loaded because the image format was corrupt or not + understood. + @retval EFI_DEVICE_ERROR Image was not loaded because the device returned a read error. + @retval EFI_ACCESS_DENIED Image was not loaded because the platform policy prohibits the + image from being loaded. NULL is returned in *ImageHandle. + @retval EFI_SECURITY_VIOLATION Image was loaded and an ImageHandle was created with a + valid EFI_LOADED_IMAGE_PROTOCOL. However, the current + platform policy specifies that the image should not be started. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IMAGE_LOAD)( + IN BOOLEAN BootPolicy, + IN EFI_HANDLE ParentImageHandle, + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + IN VOID *SourceBuffer OPTIONAL, + IN UINTN SourceSize, + OUT EFI_HANDLE *ImageHandle + ); + +/** + Transfers control to a loaded image's entry point. + + @param ImageHandle Handle of image to be started. + @param ExitDataSize The pointer to the size, in bytes, of ExitData. + @param ExitData The pointer to a pointer to a data buffer that includes a Null-terminated + string, optionally followed by additional binary data. + + @retval EFI_INVALID_PARAMETER ImageHandle is either an invalid image handle or the image + has already been initialized with StartImage. + @retval EFI_SECURITY_VIOLATION The current platform policy specifies that the image should not be started. + @return Exit code from image + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IMAGE_START)( + IN EFI_HANDLE ImageHandle, + OUT UINTN *ExitDataSize, + OUT CHAR16 **ExitData OPTIONAL + ); + +/** + Terminates a loaded EFI image and returns control to boot services. + + @param ImageHandle Handle that identifies the image. This parameter is passed to the + image on entry. + @param ExitStatus The image's exit code. + @param ExitDataSize The size, in bytes, of ExitData. Ignored if ExitStatus is EFI_SUCCESS. + @param ExitData The pointer to a data buffer that includes a Null-terminated string, + optionally followed by additional binary data. The string is a + description that the caller may use to further indicate the reason + for the image's exit. ExitData is only valid if ExitStatus + is something other than EFI_SUCCESS. The ExitData buffer + must be allocated by calling AllocatePool(). + + @retval EFI_SUCCESS The image specified by ImageHandle was unloaded. + @retval EFI_INVALID_PARAMETER The image specified by ImageHandle has been loaded and + started with LoadImage() and StartImage(), but the + image is not the currently executing image. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_EXIT)( + IN EFI_HANDLE ImageHandle, + IN EFI_STATUS ExitStatus, + IN UINTN ExitDataSize, + IN CHAR16 *ExitData OPTIONAL + ); + +/** + Unloads an image. + + @param ImageHandle Handle that identifies the image to be unloaded. + + @retval EFI_SUCCESS The image has been unloaded. + @retval EFI_INVALID_PARAMETER ImageHandle is not a valid image handle. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IMAGE_UNLOAD)( + IN EFI_HANDLE ImageHandle + ); + +/** + Terminates all boot services. + + @param ImageHandle Handle that identifies the exiting image. + @param MapKey Key to the latest memory map. + + @retval EFI_SUCCESS Boot services have been terminated. + @retval EFI_INVALID_PARAMETER MapKey is incorrect. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_EXIT_BOOT_SERVICES)( + IN EFI_HANDLE ImageHandle, + IN UINTN MapKey + ); + +/** + Induces a fine-grained stall. + + @param Microseconds The number of microseconds to stall execution. + + @retval EFI_SUCCESS Execution was stalled at least the requested number of + Microseconds. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_STALL)( + IN UINTN Microseconds + ); + +/** + Sets the system's watchdog timer. + + @param Timeout The number of seconds to set the watchdog timer to. + @param WatchdogCode The numeric code to log on a watchdog timer timeout event. + @param DataSize The size, in bytes, of WatchdogData. + @param WatchdogData A data buffer that includes a Null-terminated string, optionally + followed by additional binary data. + + @retval EFI_SUCCESS The timeout has been set. + @retval EFI_INVALID_PARAMETER The supplied WatchdogCode is invalid. + @retval EFI_UNSUPPORTED The system does not have a watchdog timer. + @retval EFI_DEVICE_ERROR The watchdog timer could not be programmed due to a hardware + error. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SET_WATCHDOG_TIMER)( + IN UINTN Timeout, + IN UINT64 WatchdogCode, + IN UINTN DataSize, + IN CHAR16 *WatchdogData OPTIONAL + ); + +/// +/// Enumeration of reset types. +/// +typedef enum { + /// + /// Used to induce a system-wide reset. This sets all circuitry within the + /// system to its initial state. This type of reset is asynchronous to system + /// operation and operates withgout regard to cycle boundaries. EfiColdReset + /// is tantamount to a system power cycle. + /// + EfiResetCold, + /// + /// Used to induce a system-wide initialization. The processors are set to their + /// initial state, and pending cycles are not corrupted. If the system does + /// not support this reset type, then an EfiResetCold must be performed. + /// + EfiResetWarm, + /// + /// Used to induce an entry into a power state equivalent to the ACPI G2/S5 or G3 + /// state. If the system does not support this reset type, then when the system + /// is rebooted, it should exhibit the EfiResetCold attributes. + /// + EfiResetShutdown, + /// + /// Used to induce a system-wide reset. The exact type of the reset is defined by + /// the EFI_GUID that follows the Null-terminated Unicode string passed into + /// ResetData. If the platform does not recognize the EFI_GUID in ResetData the + /// platform must pick a supported reset type to perform. The platform may + /// optionally log the parameters from any non-normal reset that occurs. + /// + EfiResetPlatformSpecific +} EFI_RESET_TYPE; + +/** + Resets the entire platform. + + @param ResetType The type of reset to perform. + @param ResetStatus The status code for the reset. + @param DataSize The size, in bytes, of WatchdogData. + @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or + EfiResetShutdown the data buffer starts with a Null-terminated + string, optionally followed by additional binary data. + +**/ +typedef +VOID +(EFIAPI *EFI_RESET_SYSTEM)( + IN EFI_RESET_TYPE ResetType, + IN EFI_STATUS ResetStatus, + IN UINTN DataSize, + IN VOID *ResetData OPTIONAL + ); + +/** + Returns a monotonically increasing count for the platform. + + @param Count The pointer to returned value. + + @retval EFI_SUCCESS The next monotonic count was returned. + @retval EFI_INVALID_PARAMETER Count is NULL. + @retval EFI_DEVICE_ERROR The device is not functioning properly. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_NEXT_MONOTONIC_COUNT)( + OUT UINT64 *Count + ); + +/** + Returns the next high 32 bits of the platform's monotonic counter. + + @param HighCount The pointer to returned value. + + @retval EFI_SUCCESS The next high monotonic count was returned. + @retval EFI_INVALID_PARAMETER HighCount is NULL. + @retval EFI_DEVICE_ERROR The device is not functioning properly. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_GET_NEXT_HIGH_MONO_COUNT)( + OUT UINT32 *HighCount + ); + +/** + Computes and returns a 32-bit CRC for a data buffer. + + @param Data A pointer to the buffer on which the 32-bit CRC is to be computed. + @param DataSize The number of bytes in the buffer Data. + @param Crc32 The 32-bit CRC that was computed for the data buffer specified by Data + and DataSize. + + @retval EFI_SUCCESS The 32-bit CRC was computed for the data buffer and returned in + Crc32. + @retval EFI_INVALID_PARAMETER Data is NULL. + @retval EFI_INVALID_PARAMETER Crc32 is NULL. + @retval EFI_INVALID_PARAMETER DataSize is 0. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CALCULATE_CRC32)( + IN VOID *Data, + IN UINTN DataSize, + OUT UINT32 *Crc32 + ); + +/** + Copies the contents of one buffer to another buffer. + + @param Destination The pointer to the destination buffer of the memory copy. + @param Source The pointer to the source buffer of the memory copy. + @param Length Number of bytes to copy from Source to Destination. + +**/ +typedef +VOID +(EFIAPI *EFI_COPY_MEM)( + IN VOID *Destination, + IN VOID *Source, + IN UINTN Length + ); + +/** + The SetMem() function fills a buffer with a specified value. + + @param Buffer The pointer to the buffer to fill. + @param Size Number of bytes in Buffer to fill. + @param Value Value to fill Buffer with. + +**/ +typedef +VOID +(EFIAPI *EFI_SET_MEM)( + IN VOID *Buffer, + IN UINTN Size, + IN UINT8 Value + ); + +/// +/// Enumeration of EFI Interface Types +/// +typedef enum { + /// + /// Indicates that the supplied protocol interface is supplied in native form. + /// + EFI_NATIVE_INTERFACE +} EFI_INTERFACE_TYPE; + +/** + Installs a protocol interface on a device handle. If the handle does not exist, it is created and added + to the list of handles in the system. InstallMultipleProtocolInterfaces() performs + more error checking than InstallProtocolInterface(), so it is recommended that + InstallMultipleProtocolInterfaces() be used in place of + InstallProtocolInterface() + + @param Handle A pointer to the EFI_HANDLE on which the interface is to be installed. + @param Protocol The numeric ID of the protocol interface. + @param InterfaceType Indicates whether Interface is supplied in native form. + @param Interface A pointer to the protocol interface. + + @retval EFI_SUCCESS The protocol interface was installed. + @retval EFI_OUT_OF_RESOURCES Space for a new handle could not be allocated. + @retval EFI_INVALID_PARAMETER Handle is NULL. + @retval EFI_INVALID_PARAMETER Protocol is NULL. + @retval EFI_INVALID_PARAMETER InterfaceType is not EFI_NATIVE_INTERFACE. + @retval EFI_INVALID_PARAMETER Protocol is already installed on the handle specified by Handle. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INSTALL_PROTOCOL_INTERFACE)( + IN OUT EFI_HANDLE *Handle, + IN EFI_GUID *Protocol, + IN EFI_INTERFACE_TYPE InterfaceType, + IN VOID *Interface + ); + +/** + Installs one or more protocol interfaces into the boot services environment. + + @param Handle The pointer to a handle to install the new protocol interfaces on, + or a pointer to NULL if a new handle is to be allocated. + @param ... A variable argument list containing pairs of protocol GUIDs and protocol + interfaces. + + @retval EFI_SUCCESS All the protocol interface was installed. + @retval EFI_OUT_OF_RESOURCES There was not enough memory in pool to install all the protocols. + @retval EFI_ALREADY_STARTED A Device Path Protocol instance was passed in that is already present in + the handle database. + @retval EFI_INVALID_PARAMETER Handle is NULL. + @retval EFI_INVALID_PARAMETER Protocol is already installed on the handle specified by Handle. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES)( + IN OUT EFI_HANDLE *Handle, + ... + ); + +/** + Reinstalls a protocol interface on a device handle. + + @param Handle Handle on which the interface is to be reinstalled. + @param Protocol The numeric ID of the interface. + @param OldInterface A pointer to the old interface. NULL can be used if a structure is not + associated with Protocol. + @param NewInterface A pointer to the new interface. + + @retval EFI_SUCCESS The protocol interface was reinstalled. + @retval EFI_NOT_FOUND The OldInterface on the handle was not found. + @retval EFI_ACCESS_DENIED The protocol interface could not be reinstalled, + because OldInterface is still being used by a + driver that will not release it. + @retval EFI_INVALID_PARAMETER Handle is NULL. + @retval EFI_INVALID_PARAMETER Protocol is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_REINSTALL_PROTOCOL_INTERFACE)( + IN EFI_HANDLE Handle, + IN EFI_GUID *Protocol, + IN VOID *OldInterface, + IN VOID *NewInterface + ); + +/** + Removes a protocol interface from a device handle. It is recommended that + UninstallMultipleProtocolInterfaces() be used in place of + UninstallProtocolInterface(). + + @param Handle The handle on which the interface was installed. + @param Protocol The numeric ID of the interface. + @param Interface A pointer to the interface. + + @retval EFI_SUCCESS The interface was removed. + @retval EFI_NOT_FOUND The interface was not found. + @retval EFI_ACCESS_DENIED The interface was not removed because the interface + is still being used by a driver. + @retval EFI_INVALID_PARAMETER Handle is NULL. + @retval EFI_INVALID_PARAMETER Protocol is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UNINSTALL_PROTOCOL_INTERFACE)( + IN EFI_HANDLE Handle, + IN EFI_GUID *Protocol, + IN VOID *Interface + ); + +/** + Removes one or more protocol interfaces into the boot services environment. + + @param Handle The handle to remove the protocol interfaces from. + @param ... A variable argument list containing pairs of protocol GUIDs and + protocol interfaces. + + @retval EFI_SUCCESS All the protocol interfaces were removed. + @retval EFI_INVALID_PARAMETER One of the protocol interfaces was not previously installed on Handle. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES)( + IN EFI_HANDLE Handle, + ... + ); + +/** + Queries a handle to determine if it supports a specified protocol. + + @param Handle The handle being queried. + @param Protocol The published unique identifier of the protocol. + @param Interface Supplies the address where a pointer to the corresponding Protocol + Interface is returned. + + @retval EFI_SUCCESS The interface information for the specified protocol was returned. + @retval EFI_UNSUPPORTED The device does not support the specified protocol. + @retval EFI_INVALID_PARAMETER Handle is NULL. + @retval EFI_INVALID_PARAMETER Protocol is NULL. + @retval EFI_INVALID_PARAMETER Interface is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_HANDLE_PROTOCOL)( + IN EFI_HANDLE Handle, + IN EFI_GUID *Protocol, + OUT VOID **Interface + ); + +#define EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL 0x00000001 +#define EFI_OPEN_PROTOCOL_GET_PROTOCOL 0x00000002 +#define EFI_OPEN_PROTOCOL_TEST_PROTOCOL 0x00000004 +#define EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER 0x00000008 +#define EFI_OPEN_PROTOCOL_BY_DRIVER 0x00000010 +#define EFI_OPEN_PROTOCOL_EXCLUSIVE 0x00000020 + +/** + Queries a handle to determine if it supports a specified protocol. If the protocol is supported by the + handle, it opens the protocol on behalf of the calling agent. + + @param Handle The handle for the protocol interface that is being opened. + @param Protocol The published unique identifier of the protocol. + @param Interface Supplies the address where a pointer to the corresponding Protocol + Interface is returned. + @param AgentHandle The handle of the agent that is opening the protocol interface + specified by Protocol and Interface. + @param ControllerHandle If the agent that is opening a protocol is a driver that follows the + UEFI Driver Model, then this parameter is the controller handle + that requires the protocol interface. If the agent does not follow + the UEFI Driver Model, then this parameter is optional and may + be NULL. + @param Attributes The open mode of the protocol interface specified by Handle + and Protocol. + + @retval EFI_SUCCESS An item was added to the open list for the protocol interface, and the + protocol interface was returned in Interface. + @retval EFI_UNSUPPORTED Handle does not support Protocol. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_ACCESS_DENIED Required attributes can't be supported in current environment. + @retval EFI_ALREADY_STARTED Item on the open list already has requierd attributes whose agent + handle is the same as AgentHandle. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_OPEN_PROTOCOL)( + IN EFI_HANDLE Handle, + IN EFI_GUID *Protocol, + OUT VOID **Interface, OPTIONAL + IN EFI_HANDLE AgentHandle, + IN EFI_HANDLE ControllerHandle, + IN UINT32 Attributes + ); + + +/** + Closes a protocol on a handle that was opened using OpenProtocol(). + + @param Handle The handle for the protocol interface that was previously opened + with OpenProtocol(), and is now being closed. + @param Protocol The published unique identifier of the protocol. + @param AgentHandle The handle of the agent that is closing the protocol interface. + @param ControllerHandle If the agent that opened a protocol is a driver that follows the + UEFI Driver Model, then this parameter is the controller handle + that required the protocol interface. + + @retval EFI_SUCCESS The protocol instance was closed. + @retval EFI_INVALID_PARAMETER 1) Handle is NULL. + 2) AgentHandle is NULL. + 3) ControllerHandle is not NULL and ControllerHandle is not a valid EFI_HANDLE. + 4) Protocol is NULL. + @retval EFI_NOT_FOUND 1) Handle does not support the protocol specified by Protocol. + 2) The protocol interface specified by Handle and Protocol is not + currently open by AgentHandle and ControllerHandle. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_CLOSE_PROTOCOL)( + IN EFI_HANDLE Handle, + IN EFI_GUID *Protocol, + IN EFI_HANDLE AgentHandle, + IN EFI_HANDLE ControllerHandle + ); + +/// +/// EFI Oprn Protocol Information Entry +/// +typedef struct { + EFI_HANDLE AgentHandle; + EFI_HANDLE ControllerHandle; + UINT32 Attributes; + UINT32 OpenCount; +} EFI_OPEN_PROTOCOL_INFORMATION_ENTRY; + +/** + Retrieves the list of agents that currently have a protocol interface opened. + + @param Handle The handle for the protocol interface that is being queried. + @param Protocol The published unique identifier of the protocol. + @param EntryBuffer A pointer to a buffer of open protocol information in the form of + EFI_OPEN_PROTOCOL_INFORMATION_ENTRY structures. + @param EntryCount A pointer to the number of entries in EntryBuffer. + + @retval EFI_SUCCESS The open protocol information was returned in EntryBuffer, and the + number of entries was returned EntryCount. + @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate EntryBuffer. + @retval EFI_NOT_FOUND Handle does not support the protocol specified by Protocol. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_OPEN_PROTOCOL_INFORMATION)( + IN EFI_HANDLE Handle, + IN EFI_GUID *Protocol, + OUT EFI_OPEN_PROTOCOL_INFORMATION_ENTRY **EntryBuffer, + OUT UINTN *EntryCount + ); + +/** + Retrieves the list of protocol interface GUIDs that are installed on a handle in a buffer allocated + from pool. + + @param Handle The handle from which to retrieve the list of protocol interface + GUIDs. + @param ProtocolBuffer A pointer to the list of protocol interface GUID pointers that are + installed on Handle. + @param ProtocolBufferCount A pointer to the number of GUID pointers present in + ProtocolBuffer. + + @retval EFI_SUCCESS The list of protocol interface GUIDs installed on Handle was returned in + ProtocolBuffer. The number of protocol interface GUIDs was + returned in ProtocolBufferCount. + @retval EFI_OUT_OF_RESOURCES There is not enough pool memory to store the results. + @retval EFI_INVALID_PARAMETER Handle is NULL. + @retval EFI_INVALID_PARAMETER Handle is not a valid EFI_HANDLE. + @retval EFI_INVALID_PARAMETER ProtocolBuffer is NULL. + @retval EFI_INVALID_PARAMETER ProtocolBufferCount is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PROTOCOLS_PER_HANDLE)( + IN EFI_HANDLE Handle, + OUT EFI_GUID ***ProtocolBuffer, + OUT UINTN *ProtocolBufferCount + ); + +/** + Creates an event that is to be signaled whenever an interface is installed for a specified protocol. + + @param Protocol The numeric ID of the protocol for which the event is to be registered. + @param Event Event that is to be signaled whenever a protocol interface is registered + for Protocol. + @param Registration A pointer to a memory location to receive the registration value. + + @retval EFI_SUCCESS The notification event has been registered. + @retval EFI_OUT_OF_RESOURCES Space for the notification event could not be allocated. + @retval EFI_INVALID_PARAMETER Protocol is NULL. + @retval EFI_INVALID_PARAMETER Event is NULL. + @retval EFI_INVALID_PARAMETER Registration is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_REGISTER_PROTOCOL_NOTIFY)( + IN EFI_GUID *Protocol, + IN EFI_EVENT Event, + OUT VOID **Registration + ); + +/// +/// Enumeration of EFI Locate Search Types +/// +typedef enum { + /// + /// Retrieve all the handles in the handle database. + /// + AllHandles, + /// + /// Retrieve the next handle fron a RegisterProtocolNotify() event. + /// + ByRegisterNotify, + /// + /// Retrieve the set of handles from the handle database that support a + /// specified protocol. + /// + ByProtocol +} EFI_LOCATE_SEARCH_TYPE; + +/** + Returns an array of handles that support a specified protocol. + + @param SearchType Specifies which handle(s) are to be returned. + @param Protocol Specifies the protocol to search by. + @param SearchKey Specifies the search key. + @param BufferSize On input, the size in bytes of Buffer. On output, the size in bytes of + the array returned in Buffer (if the buffer was large enough) or the + size, in bytes, of the buffer needed to obtain the array (if the buffer was + not large enough). + @param Buffer The buffer in which the array is returned. + + @retval EFI_SUCCESS The array of handles was returned. + @retval EFI_NOT_FOUND No handles match the search. + @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small for the result. + @retval EFI_INVALID_PARAMETER SearchType is not a member of EFI_LOCATE_SEARCH_TYPE. + @retval EFI_INVALID_PARAMETER SearchType is ByRegisterNotify and SearchKey is NULL. + @retval EFI_INVALID_PARAMETER SearchType is ByProtocol and Protocol is NULL. + @retval EFI_INVALID_PARAMETER One or more matches are found and BufferSize is NULL. + @retval EFI_INVALID_PARAMETER BufferSize is large enough for the result and Buffer is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_LOCATE_HANDLE)( + IN EFI_LOCATE_SEARCH_TYPE SearchType, + IN EFI_GUID *Protocol, OPTIONAL + IN VOID *SearchKey, OPTIONAL + IN OUT UINTN *BufferSize, + OUT EFI_HANDLE *Buffer + ); + +/** + Locates the handle to a device on the device path that supports the specified protocol. + + @param Protocol Specifies the protocol to search for. + @param DevicePath On input, a pointer to a pointer to the device path. On output, the device + path pointer is modified to point to the remaining part of the device + path. + @param Device A pointer to the returned device handle. + + @retval EFI_SUCCESS The resulting handle was returned. + @retval EFI_NOT_FOUND No handles match the search. + @retval EFI_INVALID_PARAMETER Protocol is NULL. + @retval EFI_INVALID_PARAMETER DevicePath is NULL. + @retval EFI_INVALID_PARAMETER A handle matched the search and Device is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_LOCATE_DEVICE_PATH)( + IN EFI_GUID *Protocol, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath, + OUT EFI_HANDLE *Device + ); + +/** + Adds, updates, or removes a configuration table entry from the EFI System Table. + + @param Guid A pointer to the GUID for the entry to add, update, or remove. + @param Table A pointer to the configuration table for the entry to add, update, or + remove. May be NULL. + + @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed. + @retval EFI_NOT_FOUND An attempt was made to delete a nonexistent entry. + @retval EFI_INVALID_PARAMETER Guid is NULL. + @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_INSTALL_CONFIGURATION_TABLE)( + IN EFI_GUID *Guid, + IN VOID *Table + ); + +/** + Returns an array of handles that support the requested protocol in a buffer allocated from pool. + + @param SearchType Specifies which handle(s) are to be returned. + @param Protocol Provides the protocol to search by. + This parameter is only valid for a SearchType of ByProtocol. + @param SearchKey Supplies the search key depending on the SearchType. + @param NoHandles The number of handles returned in Buffer. + @param Buffer A pointer to the buffer to return the requested array of handles that + support Protocol. + + @retval EFI_SUCCESS The array of handles was returned in Buffer, and the number of + handles in Buffer was returned in NoHandles. + @retval EFI_NOT_FOUND No handles match the search. + @retval EFI_OUT_OF_RESOURCES There is not enough pool memory to store the matching results. + @retval EFI_INVALID_PARAMETER NoHandles is NULL. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_LOCATE_HANDLE_BUFFER)( + IN EFI_LOCATE_SEARCH_TYPE SearchType, + IN EFI_GUID *Protocol, OPTIONAL + IN VOID *SearchKey, OPTIONAL + IN OUT UINTN *NoHandles, + OUT EFI_HANDLE **Buffer + ); + +/** + Returns the first protocol instance that matches the given protocol. + + @param Protocol Provides the protocol to search for. + @param Registration Optional registration key returned from + RegisterProtocolNotify(). + @param Interface On return, a pointer to the first interface that matches Protocol and + Registration. + + @retval EFI_SUCCESS A protocol instance matching Protocol was found and returned in + Interface. + @retval EFI_NOT_FOUND No protocol instances were found that match Protocol and + Registration. + @retval EFI_INVALID_PARAMETER Interface is NULL. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_LOCATE_PROTOCOL)( + IN EFI_GUID *Protocol, + IN VOID *Registration, OPTIONAL + OUT VOID **Interface + ); + +/// +/// EFI Capsule Block Descriptor +/// +typedef struct { + /// + /// Length in bytes of the data pointed to by DataBlock/ContinuationPointer. + /// + UINT64 Length; + union { + /// + /// Physical address of the data block. This member of the union is + /// used if Length is not equal to zero. + /// + EFI_PHYSICAL_ADDRESS DataBlock; + /// + /// Physical address of another block of + /// EFI_CAPSULE_BLOCK_DESCRIPTOR structures. This + /// member of the union is used if Length is equal to zero. If + /// ContinuationPointer is zero this entry represents the end of the list. + /// + EFI_PHYSICAL_ADDRESS ContinuationPointer; + } Union; +} EFI_CAPSULE_BLOCK_DESCRIPTOR; + +/// +/// EFI Capsule Header. +/// +typedef struct { + /// + /// A GUID that defines the contents of a capsule. + /// + EFI_GUID CapsuleGuid; + /// + /// The size of the capsule header. This may be larger than the size of + /// the EFI_CAPSULE_HEADER since CapsuleGuid may imply + /// extended header entries + /// + UINT32 HeaderSize; + /// + /// Bit-mapped list describing the capsule attributes. The Flag values + /// of 0x0000 - 0xFFFF are defined by CapsuleGuid. Flag values + /// of 0x10000 - 0xFFFFFFFF are defined by this specification + /// + UINT32 Flags; + /// + /// Size in bytes of the capsule. + /// + UINT32 CapsuleImageSize; +} EFI_CAPSULE_HEADER; + +/// +/// The EFI System Table entry must point to an array of capsules +/// that contain the same CapsuleGuid value. The array must be +/// prefixed by a UINT32 that represents the size of the array of capsules. +/// +typedef struct { + /// + /// the size of the array of capsules. + /// + UINT32 CapsuleArrayNumber; + /// + /// Point to an array of capsules that contain the same CapsuleGuid value. + /// + VOID* CapsulePtr[1]; +} EFI_CAPSULE_TABLE; + +#define CAPSULE_FLAGS_PERSIST_ACROSS_RESET 0x00010000 +#define CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE 0x00020000 +#define CAPSULE_FLAGS_INITIATE_RESET 0x00040000 + +/** + Passes capsules to the firmware with both virtual and physical mapping. Depending on the intended + consumption, the firmware may process the capsule immediately. If the payload should persist + across a system reset, the reset value returned from EFI_QueryCapsuleCapabilities must + be passed into ResetSystem() and will cause the capsule to be processed by the firmware as + part of the reset process. + + @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules + being passed into update capsule. + @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in + CaspuleHeaderArray. + @param ScatterGatherList Physical pointer to a set of + EFI_CAPSULE_BLOCK_DESCRIPTOR that describes the + location in physical memory of a set of capsules. + + @retval EFI_SUCCESS Valid capsule was passed. If + CAPSULE_FLAGS_PERSIT_ACROSS_RESET is not set, the + capsule has been successfully processed by the firmware. + @retval EFI_INVALID_PARAMETER CapsuleSize is NULL, or an incompatible set of flags were + set in the capsule header. + @retval EFI_INVALID_PARAMETER CapsuleCount is 0. + @retval EFI_DEVICE_ERROR The capsule update was started, but failed due to a device error. + @retval EFI_UNSUPPORTED The capsule type is not supported on this platform. + @retval EFI_OUT_OF_RESOURCES When ExitBootServices() has been previously called this error indicates the capsule + is compatible with this platform but is not capable of being submitted or processed + in runtime. The caller may resubmit the capsule prior to ExitBootServices(). + @retval EFI_OUT_OF_RESOURCES When ExitBootServices() has not been previously called then this error indicates + the capsule is compatible with this platform but there are insufficient resources to process. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_UPDATE_CAPSULE)( + IN EFI_CAPSULE_HEADER **CapsuleHeaderArray, + IN UINTN CapsuleCount, + IN EFI_PHYSICAL_ADDRESS ScatterGatherList OPTIONAL + ); + +/** + Returns if the capsule can be supported via UpdateCapsule(). + + @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules + being passed into update capsule. + @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in + CaspuleHeaderArray. + @param MaxiumCapsuleSize On output the maximum size that UpdateCapsule() can + support as an argument to UpdateCapsule() via + CapsuleHeaderArray and ScatterGatherList. + @param ResetType Returns the type of reset required for the capsule update. + + @retval EFI_SUCCESS Valid answer returned. + @retval EFI_UNSUPPORTED The capsule type is not supported on this platform, and + MaximumCapsuleSize and ResetType are undefined. + @retval EFI_INVALID_PARAMETER MaximumCapsuleSize is NULL. + @retval EFI_OUT_OF_RESOURCES When ExitBootServices() has been previously called this error indicates the capsule + is compatible with this platform but is not capable of being submitted or processed + in runtime. The caller may resubmit the capsule prior to ExitBootServices(). + @retval EFI_OUT_OF_RESOURCES When ExitBootServices() has not been previously called then this error indicates + the capsule is compatible with this platform but there are insufficient resources to process. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_QUERY_CAPSULE_CAPABILITIES)( + IN EFI_CAPSULE_HEADER **CapsuleHeaderArray, + IN UINTN CapsuleCount, + OUT UINT64 *MaximumCapsuleSize, + OUT EFI_RESET_TYPE *ResetType + ); + +/** + Returns information about the EFI variables. + + @param Attributes Attributes bitmask to specify the type of variables on + which to return information. + @param MaximumVariableStorageSize On output the maximum size of the storage space + available for the EFI variables associated with the + attributes specified. + @param RemainingVariableStorageSize Returns the remaining size of the storage space + available for the EFI variables associated with the + attributes specified. + @param MaximumVariableSize Returns the maximum size of the individual EFI + variables associated with the attributes specified. + + @retval EFI_SUCCESS Valid answer returned. + @retval EFI_INVALID_PARAMETER An invalid combination of attribute bits was supplied + @retval EFI_UNSUPPORTED The attribute is not supported on this platform, and the + MaximumVariableStorageSize, + RemainingVariableStorageSize, MaximumVariableSize + are undefined. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_QUERY_VARIABLE_INFO)( + IN UINT32 Attributes, + OUT UINT64 *MaximumVariableStorageSize, + OUT UINT64 *RemainingVariableStorageSize, + OUT UINT64 *MaximumVariableSize + ); + +// +// Firmware should stop at a firmware user interface on next boot +// +#define EFI_OS_INDICATIONS_BOOT_TO_FW_UI 0x0000000000000001 +#define EFI_OS_INDICATIONS_TIMESTAMP_REVOCATION 0x0000000000000002 +#define EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED 0x0000000000000004 +#define EFI_OS_INDICATIONS_FMP_CAPSULE_SUPPORTED 0x0000000000000008 +#define EFI_OS_INDICATIONS_CAPSULE_RESULT_VAR_SUPPORTED 0x0000000000000010 + +// +// EFI Runtime Services Table +// +#define EFI_SYSTEM_TABLE_SIGNATURE SIGNATURE_64 ('I','B','I',' ','S','Y','S','T') +#define EFI_2_40_SYSTEM_TABLE_REVISION ((2 << 16) | (40)) +#define EFI_2_31_SYSTEM_TABLE_REVISION ((2 << 16) | (31)) +#define EFI_2_30_SYSTEM_TABLE_REVISION ((2 << 16) | (30)) +#define EFI_2_20_SYSTEM_TABLE_REVISION ((2 << 16) | (20)) +#define EFI_2_10_SYSTEM_TABLE_REVISION ((2 << 16) | (10)) +#define EFI_2_00_SYSTEM_TABLE_REVISION ((2 << 16) | (00)) +#define EFI_1_10_SYSTEM_TABLE_REVISION ((1 << 16) | (10)) +#define EFI_1_02_SYSTEM_TABLE_REVISION ((1 << 16) | (02)) +#define EFI_SYSTEM_TABLE_REVISION EFI_2_40_SYSTEM_TABLE_REVISION +#define EFI_SPECIFICATION_VERSION EFI_SYSTEM_TABLE_REVISION + +#define EFI_RUNTIME_SERVICES_SIGNATURE SIGNATURE_64 ('R','U','N','T','S','E','R','V') +#define EFI_RUNTIME_SERVICES_REVISION EFI_SPECIFICATION_VERSION + +/// +/// EFI Runtime Services Table. +/// +typedef struct { + /// + /// The table header for the EFI Runtime Services Table. + /// + EFI_TABLE_HEADER Hdr; + + // + // Time Services + // + EFI_GET_TIME GetTime; + EFI_SET_TIME SetTime; + EFI_GET_WAKEUP_TIME GetWakeupTime; + EFI_SET_WAKEUP_TIME SetWakeupTime; + + // + // Virtual Memory Services + // + EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap; + EFI_CONVERT_POINTER ConvertPointer; + + // + // Variable Services + // + EFI_GET_VARIABLE GetVariable; + EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName; + EFI_SET_VARIABLE SetVariable; + + // + // Miscellaneous Services + // + EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount; + EFI_RESET_SYSTEM ResetSystem; + + // + // UEFI 2.0 Capsule Services + // + EFI_UPDATE_CAPSULE UpdateCapsule; + EFI_QUERY_CAPSULE_CAPABILITIES QueryCapsuleCapabilities; + + // + // Miscellaneous UEFI 2.0 Service + // + EFI_QUERY_VARIABLE_INFO QueryVariableInfo; +} EFI_RUNTIME_SERVICES; + + +#define EFI_BOOT_SERVICES_SIGNATURE SIGNATURE_64 ('B','O','O','T','S','E','R','V') +#define EFI_BOOT_SERVICES_REVISION EFI_SPECIFICATION_VERSION + +/// +/// EFI Boot Services Table. +/// +typedef struct { + /// + /// The table header for the EFI Boot Services Table. + /// + EFI_TABLE_HEADER Hdr; + + // + // Task Priority Services + // + EFI_RAISE_TPL RaiseTPL; + EFI_RESTORE_TPL RestoreTPL; + + // + // Memory Services + // + EFI_ALLOCATE_PAGES AllocatePages; + EFI_FREE_PAGES FreePages; + EFI_GET_MEMORY_MAP GetMemoryMap; + EFI_ALLOCATE_POOL AllocatePool; + EFI_FREE_POOL FreePool; + + // + // Event & Timer Services + // + EFI_CREATE_EVENT CreateEvent; + EFI_SET_TIMER SetTimer; + EFI_WAIT_FOR_EVENT WaitForEvent; + EFI_SIGNAL_EVENT SignalEvent; + EFI_CLOSE_EVENT CloseEvent; + EFI_CHECK_EVENT CheckEvent; + + // + // Protocol Handler Services + // + EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface; + EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface; + EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface; + EFI_HANDLE_PROTOCOL HandleProtocol; + VOID *Reserved; + EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify; + EFI_LOCATE_HANDLE LocateHandle; + EFI_LOCATE_DEVICE_PATH LocateDevicePath; + EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable; + + // + // Image Services + // + EFI_IMAGE_LOAD LoadImage; + EFI_IMAGE_START StartImage; + EFI_EXIT Exit; + EFI_IMAGE_UNLOAD UnloadImage; + EFI_EXIT_BOOT_SERVICES ExitBootServices; + + // + // Miscellaneous Services + // + EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount; + EFI_STALL Stall; + EFI_SET_WATCHDOG_TIMER SetWatchdogTimer; + + // + // DriverSupport Services + // + EFI_CONNECT_CONTROLLER ConnectController; + EFI_DISCONNECT_CONTROLLER DisconnectController; + + // + // Open and Close Protocol Services + // + EFI_OPEN_PROTOCOL OpenProtocol; + EFI_CLOSE_PROTOCOL CloseProtocol; + EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation; + + // + // Library Services + // + EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle; + EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer; + EFI_LOCATE_PROTOCOL LocateProtocol; + EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces; + EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces; + + // + // 32-bit CRC Services + // + EFI_CALCULATE_CRC32 CalculateCrc32; + + // + // Miscellaneous Services + // + EFI_COPY_MEM CopyMem; + EFI_SET_MEM SetMem; + EFI_CREATE_EVENT_EX CreateEventEx; +} EFI_BOOT_SERVICES; + +/// +/// Contains a set of GUID/pointer pairs comprised of the ConfigurationTable field in the +/// EFI System Table. +/// +typedef struct { + /// + /// The 128-bit GUID value that uniquely identifies the system configuration table. + /// + EFI_GUID VendorGuid; + /// + /// A pointer to the table associated with VendorGuid. + /// + VOID *VendorTable; +} EFI_CONFIGURATION_TABLE; + +/// +/// EFI System Table +/// +typedef struct { + /// + /// The table header for the EFI System Table. + /// + EFI_TABLE_HEADER Hdr; + /// + /// A pointer to a null terminated string that identifies the vendor + /// that produces the system firmware for the platform. + /// + CHAR16 *FirmwareVendor; + /// + /// A firmware vendor specific value that identifies the revision + /// of the system firmware for the platform. + /// + UINT32 FirmwareRevision; + /// + /// The handle for the active console input device. This handle must support + /// EFI_SIMPLE_TEXT_INPUT_PROTOCOL and EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL. + /// + EFI_HANDLE ConsoleInHandle; + /// + /// A pointer to the EFI_SIMPLE_TEXT_INPUT_PROTOCOL interface that is + /// associated with ConsoleInHandle. + /// + EFI_SIMPLE_TEXT_INPUT_PROTOCOL *ConIn; + /// + /// The handle for the active console output device. + /// + EFI_HANDLE ConsoleOutHandle; + /// + /// A pointer to the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL interface + /// that is associated with ConsoleOutHandle. + /// + EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *ConOut; + /// + /// The handle for the active standard error console device. + /// This handle must support the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL. + /// + EFI_HANDLE StandardErrorHandle; + /// + /// A pointer to the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL interface + /// that is associated with StandardErrorHandle. + /// + EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *StdErr; + /// + /// A pointer to the EFI Runtime Services Table. + /// + EFI_RUNTIME_SERVICES *RuntimeServices; + /// + /// A pointer to the EFI Boot Services Table. + /// + EFI_BOOT_SERVICES *BootServices; + /// + /// The number of system configuration tables in the buffer ConfigurationTable. + /// + UINTN NumberOfTableEntries; + /// + /// A pointer to the system configuration tables. + /// The number of entries in the table is NumberOfTableEntries. + /// + EFI_CONFIGURATION_TABLE *ConfigurationTable; +} EFI_SYSTEM_TABLE; + +/** + This is the declaration of an EFI image entry point. This entry point is + the same for UEFI Applications, UEFI OS Loaders, and UEFI Drivers including + both device drivers and bus drivers. + + @param ImageHandle The firmware allocated handle for the UEFI image. + @param SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The operation completed successfully. + @retval Others An unexpected error occurred. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_IMAGE_ENTRY_POINT)( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +// +// EFI Load Options Attributes +// +#define LOAD_OPTION_ACTIVE 0x00000001 +#define LOAD_OPTION_FORCE_RECONNECT 0x00000002 +#define LOAD_OPTION_HIDDEN 0x00000008 +#define LOAD_OPTION_CATEGORY 0x00001F00 + +#define LOAD_OPTION_CATEGORY_BOOT 0x00000000 +#define LOAD_OPTION_CATEGORY_APP 0x00000100 + +#define EFI_BOOT_OPTION_SUPPORT_KEY 0x00000001 +#define EFI_BOOT_OPTION_SUPPORT_APP 0x00000002 +#define EFI_BOOT_OPTION_SUPPORT_COUNT 0x00000300 + +/// +/// EFI Boot Key Data +/// +typedef union { + struct { + /// + /// Indicates the revision of the EFI_KEY_OPTION structure. This revision level should be 0. + /// + UINT32 Revision : 8; + /// + /// Either the left or right Shift keys must be pressed (1) or must not be pressed (0). + /// + UINT32 ShiftPressed : 1; + /// + /// Either the left or right Control keys must be pressed (1) or must not be pressed (0). + /// + UINT32 ControlPressed : 1; + /// + /// Either the left or right Alt keys must be pressed (1) or must not be pressed (0). + /// + UINT32 AltPressed : 1; + /// + /// Either the left or right Logo keys must be pressed (1) or must not be pressed (0). + /// + UINT32 LogoPressed : 1; + /// + /// The Menu key must be pressed (1) or must not be pressed (0). + /// + UINT32 MenuPressed : 1; + /// + /// The SysReq key must be pressed (1) or must not be pressed (0). + /// + UINT32 SysReqPressed : 1; + UINT32 Reserved : 16; + /// + /// Specifies the actual number of entries in EFI_KEY_OPTION.Keys, from 0-3. If + /// zero, then only the shift state is considered. If more than one, then the boot option will + /// only be launched if all of the specified keys are pressed with the same shift state. + /// + UINT32 InputKeyCount : 2; + } Options; + UINT32 PackedValue; +} EFI_BOOT_KEY_DATA; + +/// +/// EFI Key Option. +/// +#pragma pack(1) +typedef struct { + /// + /// Specifies options about how the key will be processed. + /// + EFI_BOOT_KEY_DATA KeyData; + /// + /// The CRC-32 which should match the CRC-32 of the entire EFI_LOAD_OPTION to + /// which BootOption refers. If the CRC-32s do not match this value, then this key + /// option is ignored. + /// + UINT32 BootOptionCrc; + /// + /// The Boot#### option which will be invoked if this key is pressed and the boot option + /// is active (LOAD_OPTION_ACTIVE is set). + /// + UINT16 BootOption; + /// + /// The key codes to compare against those returned by the + /// EFI_SIMPLE_TEXT_INPUT and EFI_SIMPLE_TEXT_INPUT_EX protocols. + /// The number of key codes (0-3) is specified by the EFI_KEY_CODE_COUNT field in KeyOptions. + /// + //EFI_INPUT_KEY Keys[]; +} EFI_KEY_OPTION; +#pragma pack() + +// +// EFI File location to boot from on removable media devices +// +#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI" +#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI" +#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI" +#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI" +#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI" + +#if defined (MDE_CPU_IA32) + #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 +#elif defined (MDE_CPU_IPF) + #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 +#elif defined (MDE_CPU_X64) + #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_X64 +#elif defined (MDE_CPU_EBC) +#elif defined (MDE_CPU_ARM) + #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_ARM +#elif defined (MDE_CPU_AARCH64) + #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 +#else + #error Unknown Processor Type +#endif + +#include <ipxe/efi/Uefi/UefiPxe.h> +#include <ipxe/efi/Uefi/UefiGpt.h> +#include <ipxe/efi/Uefi/UefiInternalFormRepresentation.h> + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/X64/ProcessorBind.h b/qemu/roms/ipxe/src/include/ipxe/efi/X64/ProcessorBind.h new file mode 100644 index 000000000..4f21bb8de --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/X64/ProcessorBind.h @@ -0,0 +1,300 @@ +/** @file + Processor or Compiler specific defines and types x64 (Intel 64, AMD64). + + Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PROCESSOR_BIND_H__ +#define __PROCESSOR_BIND_H__ + +FILE_LICENCE ( BSD3 ); + +/// +/// Define the processor type so other code can make processor based choices +/// +#define MDE_CPU_X64 + +// +// Make sure we are using the correct packing rules per EFI specification +// +#if !defined(__GNUC__) +#pragma pack() +#endif + + +#if defined(__INTEL_COMPILER) +// +// Disable ICC's remark #869: "Parameter" was never referenced warning. +// This is legal ANSI C code so we disable the remark that is turned on with -Wall +// +#pragma warning ( disable : 869 ) + +// +// Disable ICC's remark #1418: external function definition with no prior declaration. +// This is legal ANSI C code so we disable the remark that is turned on with /W4 +// +#pragma warning ( disable : 1418 ) + +// +// Disable ICC's remark #1419: external declaration in primary source file +// This is legal ANSI C code so we disable the remark that is turned on with /W4 +// +#pragma warning ( disable : 1419 ) + +// +// Disable ICC's remark #593: "Variable" was set but never used. +// This is legal ANSI C code so we disable the remark that is turned on with /W4 +// +#pragma warning ( disable : 593 ) + +#endif + + +#if defined(_MSC_EXTENSIONS) + +// +// Disable warning that make it impossible to compile at /W4 +// This only works for Microsoft* tools +// + +// +// Disabling bitfield type checking warnings. +// +#pragma warning ( disable : 4214 ) + +// +// Disabling the unreferenced formal parameter warnings. +// +#pragma warning ( disable : 4100 ) + +// +// Disable slightly different base types warning as CHAR8 * can not be set +// to a constant string. +// +#pragma warning ( disable : 4057 ) + +// +// ASSERT(FALSE) or while (TRUE) are legal constructes so supress this warning +// +#pragma warning ( disable : 4127 ) + +// +// This warning is caused by functions defined but not used. For precompiled header only. +// +#pragma warning ( disable : 4505 ) + +// +// This warning is caused by empty (after preprocessing) source file. For precompiled header only. +// +#pragma warning ( disable : 4206 ) + +#endif + + +#if defined(_MSC_EXTENSIONS) + // + // use Microsoft C complier dependent integer width types + // + + /// + /// 8-byte unsigned value + /// + typedef unsigned __int64 UINT64; + /// + /// 8-byte signed value + /// + typedef __int64 INT64; + /// + /// 4-byte unsigned value + /// + typedef unsigned __int32 UINT32; + /// + /// 4-byte signed value + /// + typedef __int32 INT32; + /// + /// 2-byte unsigned value + /// + typedef unsigned short UINT16; + /// + /// 2-byte Character. Unless otherwise specified all strings are stored in the + /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards. + /// + typedef unsigned short CHAR16; + /// + /// 2-byte signed value + /// + typedef short INT16; + /// + /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other + /// values are undefined. + /// + typedef unsigned char BOOLEAN; + /// + /// 1-byte unsigned value + /// + typedef unsigned char UINT8; + /// + /// 1-byte Character + /// + typedef char CHAR8; + /// + /// 1-byte signed value + /// + typedef signed char INT8; +#else + /// + /// 8-byte unsigned value + /// + typedef unsigned long long UINT64; + /// + /// 8-byte signed value + /// + typedef long long INT64; + /// + /// 4-byte unsigned value + /// + typedef unsigned int UINT32; + /// + /// 4-byte signed value + /// + typedef int INT32; + /// + /// 2-byte unsigned value + /// + typedef unsigned short UINT16; + /// + /// 2-byte Character. Unless otherwise specified all strings are stored in the + /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards. + /// + typedef unsigned short CHAR16; + /// + /// 2-byte signed value + /// + typedef short INT16; + /// + /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other + /// values are undefined. + /// + typedef unsigned char BOOLEAN; + /// + /// 1-byte unsigned value + /// + typedef unsigned char UINT8; + /// + /// 1-byte Character + /// + typedef char CHAR8; + /// + /// 1-byte signed value + /// + typedef signed char INT8; +#endif + +/// +/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions, +/// 8 bytes on supported 64-bit processor instructions) +/// +typedef UINT64 UINTN; +/// +/// Signed value of native width. (4 bytes on supported 32-bit processor instructions, +/// 8 bytes on supported 64-bit processor instructions) +/// +typedef INT64 INTN; + + +// +// Processor specific defines +// + +/// +/// A value of native width with the highest bit set. +/// +#define MAX_BIT 0x8000000000000000ULL +/// +/// A value of native width with the two highest bits set. +/// +#define MAX_2_BITS 0xC000000000000000ULL + +/// +/// Maximum legal x64 address +/// +#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL + +/// +/// Maximum legal x64 INTN and UINTN values. +/// +#define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL) +#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL) + +/// +/// The stack alignment required for x64 +/// +#define CPU_STACK_ALIGNMENT 16 + +// +// Modifier to ensure that all protocol member functions and EFI intrinsics +// use the correct C calling convention. All protocol member functions and +// EFI intrinsics are required to modify their member functions with EFIAPI. +// +#ifdef EFIAPI + /// + /// If EFIAPI is already defined, then we use that definition. + /// +#elif defined(_MSC_EXTENSIONS) + /// + /// Microsoft* compiler specific method for EFIAPI calling convension + /// + #define EFIAPI __cdecl +#elif defined(__GNUC__) + /// + /// Define the standard calling convention reguardless of optimization level. + /// The GCC support assumes a GCC compiler that supports the EFI ABI. The EFI + /// ABI is much closer to the x64 Microsoft* ABI than standard x64 (x86-64) + /// GCC ABI. Thus a standard x64 (x86-64) GCC compiler can not be used for + /// x64. Warning the assembly code in the MDE x64 does not follow the correct + /// ABI for the standard x64 (x86-64) GCC. + /// + #define EFIAPI +#else + /// + /// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI + /// is the standard. + /// + #define EFIAPI +#endif + +#if defined(__GNUC__) + /// + /// For GNU assembly code, .global or .globl can declare global symbols. + /// Define this macro to unify the usage. + /// + #define ASM_GLOBAL .globl +#endif + +/** + Return the pointer to the first instruction of a function given a function pointer. + On x64 CPU architectures, these two pointer values are the same, + so the implementation of this macro is very simple. + + @param FunctionPointer A pointer to a function. + + @return The pointer to the first instruction of a function given a function pointer. + +**/ +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer) + +#ifndef __USER_LABEL_PREFIX__ +#define __USER_LABEL_PREFIX__ +#endif + +#endif + diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi.h new file mode 100644 index 000000000..ab52dd9e0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi.h @@ -0,0 +1,248 @@ +#ifndef _IPXE_EFI_H +#define _IPXE_EFI_H + +/** @file + * + * EFI API + * + * The intention is to include near-verbatim copies of the EFI headers + * required by iPXE. This is achieved using the import.pl script in + * this directory. Run the import script to update the local copies + * of the headers: + * + * ./import.pl /path/to/edk2/edk2 + * + * where /path/to/edk2/edk2 is the path to your local checkout of the + * EFI Development Kit. + * + * Note that import.pl will modify any #include lines in each imported + * header to reflect its new location within the iPXE tree. It will + * also tidy up the file by removing carriage return characters and + * trailing whitespace. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* EFI headers rudely redefine NULL */ +#undef NULL + +/* EFI headers expect ICC to define __GNUC__ */ +#if defined ( __ICC ) && ! defined ( __GNUC__ ) +#define __GNUC__ 1 +#endif + +/* EFI headers think your compiler uses the MS ABI by default on X64 */ +#if __x86_64__ +#define EFIAPI __attribute__((ms_abi)) +#endif + +/* EFI headers assume regparm(0) on i386, but that is not the case for iPXE */ +#if __i386__ +#define EFIAPI __attribute__((cdecl,regparm(0))) +#endif + +/* EFI headers define EFI_HANDLE as a void pointer, which renders type + * checking somewhat useless. Work around this bizarre sabotage + * attempt by redefining EFI_HANDLE as a pointer to an anonymous + * structure. + */ +#define EFI_HANDLE STUPID_EFI_HANDLE +#include <ipxe/efi/Uefi/UefiBaseType.h> +#undef EFI_HANDLE +typedef struct {} *EFI_HANDLE; + +/* Include the top-level EFI header files */ +#include <ipxe/efi/Uefi.h> +#include <ipxe/efi/PiDxe.h> +#include <ipxe/efi/Protocol/LoadedImage.h> + +/* Reset any trailing #pragma pack directives */ +#pragma pack(1) +#pragma pack() + +#include <ipxe/tables.h> +#include <ipxe/uuid.h> + +/** An EFI protocol used by iPXE */ +struct efi_protocol { + /** GUID */ + EFI_GUID guid; + /** Variable containing pointer to protocol structure */ + void **protocol; + /** Protocol is required */ + int required; +}; + +/** EFI protocol table */ +#define EFI_PROTOCOLS __table ( struct efi_protocol, "efi_protocols" ) + +/** Declare an EFI protocol used by iPXE */ +#define __efi_protocol __table_entry ( EFI_PROTOCOLS, 01 ) + +/** Declare an EFI protocol to be required by iPXE + * + * @v _protocol EFI protocol name + * @v _ptr Pointer to protocol instance + */ +#define EFI_REQUIRE_PROTOCOL( _protocol, _ptr ) \ + struct efi_protocol __ ## _protocol __efi_protocol = { \ + .guid = _protocol ## _GUID, \ + .protocol = ( ( void ** ) ( void * ) \ + ( ( (_ptr) == ( ( _protocol ** ) (_ptr) ) ) ? \ + (_ptr) : (_ptr) ) ), \ + .required = 1, \ + } + +/** Declare an EFI protocol to be requested by iPXE + * + * @v _protocol EFI protocol name + * @v _ptr Pointer to protocol instance + */ +#define EFI_REQUEST_PROTOCOL( _protocol, _ptr ) \ + struct efi_protocol __ ## _protocol __efi_protocol = { \ + .guid = _protocol ## _GUID, \ + .protocol = ( ( void ** ) ( void * ) \ + ( ( (_ptr) == ( ( _protocol ** ) (_ptr) ) ) ? \ + (_ptr) : (_ptr) ) ), \ + .required = 0, \ + } + +/** An EFI configuration table used by iPXE */ +struct efi_config_table { + /** GUID */ + EFI_GUID guid; + /** Variable containing pointer to configuration table */ + void **table; + /** Table is required for operation */ + int required; +}; + +/** EFI configuration table table */ +#define EFI_CONFIG_TABLES \ + __table ( struct efi_config_table, "efi_config_tables" ) + +/** Declare an EFI configuration table used by iPXE */ +#define __efi_config_table __table_entry ( EFI_CONFIG_TABLES, 01 ) + +/** Declare an EFI configuration table to be used by iPXE + * + * @v _table EFI configuration table name + * @v _ptr Pointer to configuration table + * @v _required Table is required for operation + */ +#define EFI_USE_TABLE( _table, _ptr, _required ) \ + struct efi_config_table __ ## _table __efi_config_table = { \ + .guid = _table ## _GUID, \ + .table = ( ( void ** ) ( void * ) (_ptr) ), \ + .required = (_required), \ + } + +/** + * Convert an iPXE status code to an EFI status code + * + * @v rc iPXE status code + * @ret efirc EFI status code + */ +#define EFIRC( rc ) ERRNO_TO_PLATFORM ( -(rc) ) + +/** + * Convert an EFI status code to an iPXE status code + * + * @v efirc EFI status code + * @ret rc iPXE status code (before negation) + */ +#define EEFI( efirc ) EPLATFORM ( EINFO_EPLATFORM, efirc ) + +extern EFI_GUID efi_arp_protocol_guid; +extern EFI_GUID efi_arp_service_binding_protocol_guid; +extern EFI_GUID efi_block_io_protocol_guid; +extern EFI_GUID efi_bus_specific_driver_override_protocol_guid; +extern EFI_GUID efi_component_name_protocol_guid; +extern EFI_GUID efi_component_name2_protocol_guid; +extern EFI_GUID efi_device_path_protocol_guid; +extern EFI_GUID efi_dhcp4_protocol_guid; +extern EFI_GUID efi_dhcp4_service_binding_protocol_guid; +extern EFI_GUID efi_disk_io_protocol_guid; +extern EFI_GUID efi_driver_binding_protocol_guid; +extern EFI_GUID efi_graphics_output_protocol_guid; +extern EFI_GUID efi_hii_config_access_protocol_guid; +extern EFI_GUID efi_ip4_protocol_guid; +extern EFI_GUID efi_ip4_config_protocol_guid; +extern EFI_GUID efi_ip4_service_binding_protocol_guid; +extern EFI_GUID efi_load_file_protocol_guid; +extern EFI_GUID efi_load_file2_protocol_guid; +extern EFI_GUID efi_loaded_image_protocol_guid; +extern EFI_GUID efi_loaded_image_device_path_protocol_guid; +extern EFI_GUID efi_managed_network_protocol_guid; +extern EFI_GUID efi_managed_network_service_binding_protocol_guid; +extern EFI_GUID efi_mtftp4_protocol_guid; +extern EFI_GUID efi_mtftp4_service_binding_protocol_guid; +extern EFI_GUID efi_nii_protocol_guid; +extern EFI_GUID efi_nii31_protocol_guid; +extern EFI_GUID efi_pci_io_protocol_guid; +extern EFI_GUID efi_pci_root_bridge_io_protocol_guid; +extern EFI_GUID efi_pxe_base_code_protocol_guid; +extern EFI_GUID efi_simple_file_system_protocol_guid; +extern EFI_GUID efi_simple_network_protocol_guid; +extern EFI_GUID efi_tcg_protocol_guid; +extern EFI_GUID efi_tcp4_protocol_guid; +extern EFI_GUID efi_tcp4_service_binding_protocol_guid; +extern EFI_GUID efi_udp4_protocol_guid; +extern EFI_GUID efi_udp4_service_binding_protocol_guid; +extern EFI_GUID efi_vlan_config_protocol_guid; + +extern EFI_HANDLE efi_image_handle; +extern EFI_LOADED_IMAGE_PROTOCOL *efi_loaded_image; +extern EFI_DEVICE_PATH_PROTOCOL *efi_loaded_image_path; +extern EFI_SYSTEM_TABLE *efi_systab; + +extern const char * efi_guid_ntoa ( EFI_GUID *guid ); +extern const char * efi_devpath_text ( EFI_DEVICE_PATH_PROTOCOL *path ); +extern const char * efi_handle_name ( EFI_HANDLE handle ); + +extern void dbg_efi_openers ( EFI_HANDLE handle, EFI_GUID *protocol ); +extern void dbg_efi_protocols ( EFI_HANDLE handle ); + +#define DBG_EFI_OPENERS_IF( level, handle, protocol ) do { \ + if ( DBG_ ## level ) { \ + dbg_efi_openers ( handle, protocol ); \ + } \ + } while ( 0 ) + +#define DBG_EFI_PROTOCOLS_IF( level, handle ) do { \ + if ( DBG_ ## level ) { \ + dbg_efi_protocols ( handle ); \ + } \ + } while ( 0 ) + +#define DBGC_EFI_OPENERS_IF( level, id, ... ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_EFI_OPENERS_IF ( level, __VA_ARGS__ ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_EFI_PROTOCOLS_IF( level, id, ... ) do { \ + DBG_AC_IF ( level, id ); \ + DBG_EFI_PROTOCOLS_IF ( level, __VA_ARGS__ ); \ + DBG_DC_IF ( level ); \ + } while ( 0 ) + +#define DBGC_EFI_OPENERS( ... ) \ + DBGC_EFI_OPENERS_IF ( LOG, ##__VA_ARGS__ ) +#define DBGC_EFI_PROTOCOLS( ... ) \ + DBGC_EFI_PROTOCOLS_IF ( LOG, ##__VA_ARGS__ ) + +#define DBGC2_EFI_OPENERS( ... ) \ + DBGC_EFI_OPENERS_IF ( EXTRA, ##__VA_ARGS__ ) +#define DBGC2_EFI_PROTOCOLS( ... ) \ + DBGC_EFI_PROTOCOLS_IF ( EXTRA, ##__VA_ARGS__ ) + +#define DBGCP_EFI_OPENERS( ... ) \ + DBGC_EFI_OPENERS_IF ( PROFILE, ##__VA_ARGS__ ) +#define DBGCP_EFI_PROTOCOLS( ... ) \ + DBGC_EFI_PROTOCOLS_IF ( PROFILE, ##__VA_ARGS__ ) + +extern EFI_STATUS efi_init ( EFI_HANDLE image_handle, + EFI_SYSTEM_TABLE *systab ); + +#endif /* _IPXE_EFI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_autoboot.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_autoboot.h new file mode 100644 index 000000000..d4a26850c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_autoboot.h @@ -0,0 +1,14 @@ +#ifndef _IPXE_EFI_AUTOBOOT_H +#define _IPXE_EFI_AUTOBOOT_H + +/** @file + * + * EFI autoboot device + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern void efi_set_autoboot ( void ); + +#endif /* _IPXE_EFI_AUTOBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_download.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_download.h new file mode 100644 index 000000000..740fcadf5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_download.h @@ -0,0 +1,157 @@ +#ifndef _IPXE_DOWNLOAD_H +#define _IPXE_DOWNLOAD_H + +/* + * Copyright (C) 2010 VMware, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** @file + * + * iPXE Download Protocol + * + * EFI applications started by iPXE may use this interface to download files. + */ + +typedef struct _IPXE_DOWNLOAD_PROTOCOL IPXE_DOWNLOAD_PROTOCOL; + +/** Token to represent a currently downloading file */ +typedef VOID *IPXE_DOWNLOAD_FILE; + +/** + * Callback function that is invoked when data arrives for a particular file. + * + * Not all protocols will deliver data in order. Clients should not rely on the + * order of data delivery matching the order in the file. + * + * Some protocols are capable of determining the file size near the beginning + * of data transfer. To allow the client to allocate memory more efficiently, + * iPXE may give a hint about the file size by calling the Data callback with + * a zero BufferLength and the file size in FileOffset. Clients should be + * prepared to deal with more or less data than the hint actually arriving. + * + * @v Context Context provided to the Start function + * @v Buffer New data + * @v BufferLength Length of new data in bytes + * @v FileOffset Offset of new data in the file + * @ret Status EFI_SUCCESS to continue the download, + * or any error code to abort. + */ +typedef +EFI_STATUS +(EFIAPI *IPXE_DOWNLOAD_DATA_CALLBACK)( + IN VOID *Context, + IN VOID *Buffer, + IN UINTN BufferLength, + IN UINTN FileOffset + ); + +/** + * Callback function that is invoked when the file is finished downloading, or + * when a connection unexpectedly closes or times out. + * + * The finish callback is also called when a download is aborted by the Abort + * function (below). + * + * @v Context Context provided to the Start function + * @v Status Reason for termination: EFI_SUCCESS when the entire + * file was transferred successfully, or an error + * otherwise + */ +typedef +void +(EFIAPI *IPXE_DOWNLOAD_FINISH_CALLBACK)( + IN VOID *Context, + IN EFI_STATUS Status + ); + +/** + * Start downloading a file, and register callback functions to handle the + * download. + * + * @v This iPXE Download Protocol instance + * @v Url URL to download from + * @v DataCallback Callback that will be invoked when data arrives + * @v FinishCallback Callback that will be invoked when the download ends + * @v Context Context passed to the Data and Finish callbacks + * @v File Token that can be used to abort the download + * @ret Status EFI status code + */ +typedef +EFI_STATUS +(EFIAPI *IPXE_DOWNLOAD_START)( + IN IPXE_DOWNLOAD_PROTOCOL *This, + IN CHAR8 *Url, + IN IPXE_DOWNLOAD_DATA_CALLBACK DataCallback, + IN IPXE_DOWNLOAD_FINISH_CALLBACK FinishCallback, + IN VOID *Context, + OUT IPXE_DOWNLOAD_FILE *File + ); + +/** + * Forcibly abort downloading a file that is currently in progress. + * + * It is not safe to call this function after the Finish callback has executed. + * + * @v This iPXE Download Protocol instance + * @v File Token obtained from Start + * @v Status Reason for aborting the download + * @ret Status EFI status code + */ +typedef +EFI_STATUS +(EFIAPI *IPXE_DOWNLOAD_ABORT)( + IN IPXE_DOWNLOAD_PROTOCOL *This, + IN IPXE_DOWNLOAD_FILE File, + IN EFI_STATUS Status + ); + +/** + * Poll for more data from iPXE. This function will invoke the registered + * callbacks if data is available or if downloads complete. + * + * @v This iPXE Download Protocol instance + * @ret Status EFI status code + */ +typedef +EFI_STATUS +(EFIAPI *IPXE_DOWNLOAD_POLL)( + IN IPXE_DOWNLOAD_PROTOCOL *This + ); + +/** + * The iPXE Download Protocol. + * + * iPXE will attach a iPXE Download Protocol to the DeviceHandle in the Loaded + * Image Protocol of all child EFI applications. + */ +struct _IPXE_DOWNLOAD_PROTOCOL { + IPXE_DOWNLOAD_START Start; + IPXE_DOWNLOAD_ABORT Abort; + IPXE_DOWNLOAD_POLL Poll; +}; + +#define IPXE_DOWNLOAD_PROTOCOL_GUID \ + { \ + 0x3eaeaebd, 0xdecf, 0x493b, { 0x9b, 0xd1, 0xcd, 0xb2, 0xde, 0xca, 0xe7, 0x19 } \ + } + +extern int efi_download_install ( EFI_HANDLE handle ); +extern void efi_download_uninstall ( EFI_HANDLE handle ); + +#endif /* _IPXE_DOWNLOAD_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_driver.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_driver.h new file mode 100644 index 000000000..e16a24daa --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_driver.h @@ -0,0 +1,92 @@ +#ifndef _IPXE_EFI_DRIVER_H +#define _IPXE_EFI_DRIVER_H + +/** @file + * + * EFI driver interface + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/device.h> +#include <ipxe/tables.h> +#include <ipxe/efi/efi.h> +#include <ipxe/efi/Protocol/DevicePath.h> + +/** An EFI device */ +struct efi_device { + /** Generic device */ + struct device dev; + /** EFI device handle */ + EFI_HANDLE device; + /** Driver for this device */ + struct efi_driver *driver; + /** Driver-private data */ + void *priv; +}; + +/** An EFI driver */ +struct efi_driver { + /** Name */ + const char *name; + /** + * Check if driver supports device + * + * @v device EFI device handle + * @ret rc Return status code + */ + int ( * supported ) ( EFI_HANDLE device ); + /** + * Attach driver to device + * + * @v efidev EFI device + * @ret rc Return status code + */ + int ( * start ) ( struct efi_device *efidev ); + /** + * Detach driver from device + * + * @v efidev EFI device + */ + void ( * stop ) ( struct efi_device *efidev ); +}; + +/** EFI driver table */ +#define EFI_DRIVERS __table ( struct efi_driver, "efi_drivers" ) + +/** Declare an EFI driver */ +#define __efi_driver( order ) __table_entry ( EFI_DRIVERS, order ) + +#define EFI_DRIVER_EARLY 01 /**< Early drivers */ +#define EFI_DRIVER_NORMAL 02 /**< Normal drivers */ +#define EFI_DRIVER_LATE 03 /**< Late drivers */ + +/** + * Set EFI driver-private data + * + * @v efidev EFI device + * @v priv Private data + */ +static inline void efidev_set_drvdata ( struct efi_device *efidev, + void *priv ) { + efidev->priv = priv; +} + +/** + * Get EFI driver-private data + * + * @v efidev EFI device + * @ret priv Private data + */ +static inline void * efidev_get_drvdata ( struct efi_device *efidev ) { + return efidev->priv; +} + +extern struct efi_device * efidev_parent ( struct device *dev ); +extern int efi_driver_install ( void ); +extern void efi_driver_uninstall ( void ); +extern int efi_driver_connect_all ( void ); +extern void efi_driver_disconnect_all ( void ); +extern void efi_driver_reconnect_all ( void ); + +#endif /* _IPXE_EFI_DRIVER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_file.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_file.h new file mode 100644 index 000000000..e4db0305a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_file.h @@ -0,0 +1,13 @@ +#ifndef _IPXE_EFI_FILE_H +#define _IPXE_EFI_FILE_H + +/** @file + * + * EFI file protocols + * + */ + +extern int efi_file_install ( EFI_HANDLE handle ); +extern void efi_file_uninstall ( EFI_HANDLE handle ); + +#endif /* _IPXE_EFI_FILE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_hii.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_hii.h new file mode 100644 index 000000000..8e94bbe7e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_hii.h @@ -0,0 +1,96 @@ +#ifndef _IPXE_EFI_HII_H +#define _IPXE_EFI_HII_H + +/** @file + * + * EFI human interface infrastructure + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <string.h> +#include <ipxe/efi/Uefi/UefiInternalFormRepresentation.h> +#include <ipxe/efi/Guid/MdeModuleHii.h> + +/** GUID indicating formset compliance for IBM Unified Configuration Manager */ +#define EFI_HII_IBM_UCM_COMPLIANT_FORMSET_GUID \ + { 0x5c8e9746, 0xa5f7, 0x4593, \ + { 0xaf, 0x1f, 0x66, 0xa8, 0x2a, 0xa1, 0x9c, 0xb1 } } + +/** An EFI IFR builder */ +struct efi_ifr_builder { + /** IFR opcodes */ + EFI_IFR_OP_HEADER *ops; + /** Length of IFR opcodes */ + size_t ops_len; + /** Strings */ + EFI_HII_STRING_BLOCK *strings; + /** Length of strings */ + size_t strings_len; + /** Current string identifier */ + unsigned int string_id; + /** Current variable store identifier */ + unsigned int varstore_id; + /** Current form identifier */ + unsigned int form_id; + /** An allocation has failed */ + int failed; +}; + +/** + * Initialise IFR builder + * + * @v ifr IFR builder + * + * The caller must eventually call efi_ifr_free() to free the dynamic + * storage associated with the IFR builder. + */ +static inline void efi_ifr_init ( struct efi_ifr_builder *ifr ) { + memset ( ifr, 0, sizeof ( *ifr ) ); +} + +extern unsigned int efi_ifr_string ( struct efi_ifr_builder *ifr, + const char *fmt, ... ); +extern void efi_ifr_end_op ( struct efi_ifr_builder *ifr ); +extern void efi_ifr_false_op ( struct efi_ifr_builder *ifr ); +extern unsigned int efi_ifr_form_op ( struct efi_ifr_builder *ifr, + unsigned int title_id ); +extern void efi_ifr_form_set_op ( struct efi_ifr_builder *ifr, + const EFI_GUID *guid, + unsigned int title_id, unsigned int help_id, + ... ); +void efi_ifr_get_op ( struct efi_ifr_builder *ifr, unsigned int varstore_id, + unsigned int varstore_info, unsigned int varstore_type ); +extern void efi_ifr_guid_class_op ( struct efi_ifr_builder *ifr, + unsigned int class ); +extern void efi_ifr_guid_subclass_op ( struct efi_ifr_builder *ifr, + unsigned int subclass ); +extern void efi_ifr_numeric_op ( struct efi_ifr_builder *ifr, + unsigned int prompt_id, + unsigned int help_id, unsigned int question_id, + unsigned int varstore_id, + unsigned int varstore_info, + unsigned int vflags, unsigned long min_value, + unsigned long max_value, unsigned int step, + unsigned int flags ); +extern void efi_ifr_string_op ( struct efi_ifr_builder *ifr, + unsigned int prompt_id, unsigned int help_id, + unsigned int question_id, + unsigned int varstore_id, + unsigned int varstore_info, unsigned int vflags, + unsigned int min_size, unsigned int max_size, + unsigned int flags ); +extern void efi_ifr_suppress_if_op ( struct efi_ifr_builder *ifr ); +extern void efi_ifr_text_op ( struct efi_ifr_builder *ifr, + unsigned int prompt_id, unsigned int help_id, + unsigned int text_id ); +extern void efi_ifr_true_op ( struct efi_ifr_builder *ifr ); +extern unsigned int +efi_ifr_varstore_name_value_op ( struct efi_ifr_builder *ifr, + const EFI_GUID *guid ); +extern void efi_ifr_free ( struct efi_ifr_builder *ifr ); +extern EFI_HII_PACKAGE_LIST_HEADER * +efi_ifr_package ( struct efi_ifr_builder *ifr, const EFI_GUID *guid, + const char *language, unsigned int language_id ); + +#endif /* _IPXE_EFI_HII_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_pci.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_pci.h new file mode 100644 index 000000000..af36613d9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_pci.h @@ -0,0 +1,25 @@ +#ifndef _IPXE_EFI_PCI_H +#define _IPXE_EFI_PCI_H + +/** @file + * + * EFI driver interface + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/pci.h> +#include <ipxe/efi/efi.h> +#include <ipxe/efi/Protocol/PciIo.h> + +/* PciRootBridgeIo.h uses LShiftU64(), which isn't defined anywhere else */ +static inline EFIAPI uint64_t LShiftU64 ( UINT64 value, UINTN shift ) { + return ( value << shift ); +} + +extern int efipci_open ( EFI_HANDLE device, UINT32 attributes, + struct pci_device *pci ); +extern void efipci_close ( EFI_HANDLE device ); +extern int efipci_info ( EFI_HANDLE device, struct pci_device *pci ); + +#endif /* _IPXE_EFI_PCI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_pci_api.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_pci_api.h new file mode 100644 index 000000000..498a0388b --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_pci_api.h @@ -0,0 +1,151 @@ +#ifndef _IPXE_EFI_PCI_API_H +#define _IPXE_EFI_PCI_API_H + +/** @file + * + * iPXE PCI I/O API for EFI + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef PCIAPI_EFI +#define PCIAPI_PREFIX_efi +#else +#define PCIAPI_PREFIX_efi __efi_ +#endif + +/* EFI PCI width codes defined by EFI spec */ +#define EFIPCI_WIDTH_BYTE 0 +#define EFIPCI_WIDTH_WORD 1 +#define EFIPCI_WIDTH_DWORD 2 + +#define EFIPCI_LOCATION( _offset, _width ) \ + ( (_offset) | ( (_width) << 16 ) ) +#define EFIPCI_OFFSET( _location ) ( (_location) & 0xffff ) +#define EFIPCI_WIDTH( _location ) ( (_location) >> 16 ) + +struct pci_device; + +extern int efipci_read ( struct pci_device *pci, unsigned long location, + void *value ); +extern int efipci_write ( struct pci_device *pci, unsigned long location, + unsigned long value ); + +/** + * Determine number of PCI buses within system + * + * @ret num_bus Number of buses + */ +static inline __always_inline int +PCIAPI_INLINE ( efi, pci_num_bus ) ( void ) { + /* EFI does not want us to scan the PCI bus ourselves */ + return 0; +} + +/** + * Read byte from PCI configuration space via EFI + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( efi, pci_read_config_byte ) ( struct pci_device *pci, + unsigned int where, + uint8_t *value ) { + *value = 0xff; + return efipci_read ( pci, + EFIPCI_LOCATION ( where, EFIPCI_WIDTH_BYTE ), + value ); +} + +/** + * Read word from PCI configuration space via EFI + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( efi, pci_read_config_word ) ( struct pci_device *pci, + unsigned int where, + uint16_t *value ) { + *value = 0xffff; + return efipci_read ( pci, + EFIPCI_LOCATION ( where, EFIPCI_WIDTH_WORD ), + value ); +} + +/** + * Read dword from PCI configuration space via EFI + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( efi, pci_read_config_dword ) ( struct pci_device *pci, + unsigned int where, + uint32_t *value ) { + *value = 0xffffffffUL; + return efipci_read ( pci, + EFIPCI_LOCATION ( where, EFIPCI_WIDTH_DWORD ), + value ); +} + +/** + * Write byte to PCI configuration space via EFI + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( efi, pci_write_config_byte ) ( struct pci_device *pci, + unsigned int where, + uint8_t value ) { + return efipci_write ( pci, + EFIPCI_LOCATION ( where, EFIPCI_WIDTH_BYTE ), + value ); +} + +/** + * Write word to PCI configuration space via EFI + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( efi, pci_write_config_word ) ( struct pci_device *pci, + unsigned int where, + uint16_t value ) { + return efipci_write ( pci, + EFIPCI_LOCATION ( where, EFIPCI_WIDTH_WORD ), + value ); +} + +/** + * Write dword to PCI configuration space via EFI + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( efi, pci_write_config_dword ) ( struct pci_device *pci, + unsigned int where, + uint32_t value ) { + return efipci_write ( pci, + EFIPCI_LOCATION ( where, EFIPCI_WIDTH_DWORD ), + value ); +} + +#endif /* _IPXE_EFI_PCI_API_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_reboot.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_reboot.h new file mode 100644 index 000000000..33921b913 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_reboot.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_EFI_REBOOT_H +#define _IPXE_EFI_REBOOT_H + +/** @file + * + * iPXE reboot API for EFI + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef REBOOT_EFI +#define REBOOT_PREFIX_efi +#else +#define REBOOT_PREFIX_efi __efi_ +#endif + +#endif /* _IPXE_EFI_REBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_smbios.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_smbios.h new file mode 100644 index 000000000..7642e5bc5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_smbios.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_EFI_SMBIOS_H +#define _IPXE_EFI_SMBIOS_H + +/** @file + * + * iPXE SMBIOS API for EFI + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef SMBIOS_EFI +#define SMBIOS_PREFIX_efi +#else +#define SMBIOS_PREFIX_efi __efi_ +#endif + +#endif /* _IPXE_EFI_SMBIOS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_snp.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_snp.h new file mode 100644 index 000000000..a18bced5f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_snp.h @@ -0,0 +1,95 @@ +#ifndef _IPXE_EFI_SNP_H +#define _IPXE_EFI_SNP_H + +/** @file + * + * iPXE EFI SNP interface + * + */ + +#include <ipxe/list.h> +#include <ipxe/netdevice.h> +#include <ipxe/efi/efi.h> +#include <ipxe/efi/Protocol/SimpleNetwork.h> +#include <ipxe/efi/Protocol/NetworkInterfaceIdentifier.h> +#include <ipxe/efi/Protocol/ComponentName2.h> +#include <ipxe/efi/Protocol/DevicePath.h> +#include <ipxe/efi/Protocol/HiiConfigAccess.h> +#include <ipxe/efi/Protocol/HiiDatabase.h> +#include <ipxe/efi/Protocol/LoadFile.h> + +/** An SNP device */ +struct efi_snp_device { + /** List of SNP devices */ + struct list_head list; + /** The underlying iPXE network device */ + struct net_device *netdev; + /** The underlying EFI device */ + struct efi_device *efidev; + /** EFI device handle */ + EFI_HANDLE handle; + /** The SNP structure itself */ + EFI_SIMPLE_NETWORK_PROTOCOL snp; + /** The SNP "mode" (parameters) */ + EFI_SIMPLE_NETWORK_MODE mode; + /** Started flag */ + int started; + /** Outstanding TX packet count (via "interrupt status") + * + * Used in order to generate TX completions. + */ + unsigned int tx_count_interrupts; + /** Outstanding TX packet count (via "recycled tx buffers") + * + * Used in order to generate TX completions. + */ + unsigned int tx_count_txbufs; + /** Outstanding RX packet count (via "interrupt status") */ + unsigned int rx_count_interrupts; + /** Outstanding RX packet count (via WaitForPacket event) */ + unsigned int rx_count_events; + /** The network interface identifier */ + EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL nii; + /** Component name protocol */ + EFI_COMPONENT_NAME2_PROTOCOL name2; + /** Load file protocol handle */ + EFI_LOAD_FILE_PROTOCOL load_file; + /** HII configuration access protocol */ + EFI_HII_CONFIG_ACCESS_PROTOCOL hii; + /** HII package list */ + EFI_HII_PACKAGE_LIST_HEADER *package_list; + /** HII handle */ + EFI_HII_HANDLE hii_handle; + /** Device name */ + wchar_t name[ sizeof ( ( ( struct net_device * ) NULL )->name ) ]; + /** Driver name */ + wchar_t driver_name[16]; + /** Controller name */ + wchar_t controller_name[64]; + /** The device path */ + EFI_DEVICE_PATH_PROTOCOL *path; +}; + +extern int efi_snp_hii_install ( struct efi_snp_device *snpdev ); +extern void efi_snp_hii_uninstall ( struct efi_snp_device *snpdev ); +extern struct efi_snp_device * find_snpdev ( EFI_HANDLE handle ); +extern struct efi_snp_device * last_opened_snpdev ( void ); +extern void efi_snp_set_claimed ( int claimed ); + +/** + * Claim network devices for use by iPXE + * + */ +static inline void efi_snp_claim ( void ) { + efi_snp_set_claimed ( 1 ); +} + +/** + * Release network devices for use via SNP + * + */ +static inline void efi_snp_release ( void ) { + efi_snp_set_claimed ( 0 ); +} + +#endif /* _IPXE_EFI_SNP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_strings.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_strings.h new file mode 100644 index 000000000..023ccda07 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_strings.h @@ -0,0 +1,23 @@ +#ifndef _IPXE_EFI_STRINGS_H +#define _IPXE_EFI_STRINGS_H + +/** @file + * + * EFI strings + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <stdint.h> +#include <stdarg.h> + +extern int efi_vsnprintf ( wchar_t *wbuf, size_t wsize, const char *fmt, + va_list args ); +extern int efi_snprintf ( wchar_t *wbuf, size_t wsize, const char *fmt, ... ); +extern int efi_vssnprintf ( wchar_t *wbuf, ssize_t swsize, const char *fmt, + va_list args ); +extern int efi_ssnprintf ( wchar_t *wbuf, ssize_t swsize, + const char *fmt, ... ); + +#endif /* _IPXE_EFI_STRINGS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_timer.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_timer.h new file mode 100644 index 000000000..b10543d6c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_timer.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_EFI_TIMER_H +#define _IPXE_EFI_TIMER_H + +/** @file + * + * iPXE timer API for EFI + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef TIMER_EFI +#define TIMER_PREFIX_efi +#else +#define TIMER_PREFIX_efi __efi_ +#endif + +#endif /* _IPXE_EFI_TIMER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_uaccess.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_uaccess.h new file mode 100644 index 000000000..870a089b2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_uaccess.h @@ -0,0 +1,103 @@ +#ifndef _IPXE_EFI_UACCESS_H +#define _IPXE_EFI_UACCESS_H + +/** @file + * + * iPXE user access API for EFI + * + * EFI runs with flat physical addressing, so the various mappings + * between virtual addresses, I/O addresses and bus addresses are all + * no-ops. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef UACCESS_EFI +#define UACCESS_PREFIX_efi +#else +#define UACCESS_PREFIX_efi __efi_ +#endif + +/** + * Convert physical address to user pointer + * + * @v phys_addr Physical address + * @ret userptr User pointer + */ +static inline __always_inline userptr_t +UACCESS_INLINE ( efi, phys_to_user ) ( unsigned long phys_addr ) { + return phys_addr; +} + +/** + * Convert user buffer to physical address + * + * @v userptr User pointer + * @v offset Offset from user pointer + * @ret phys_addr Physical address + */ +static inline __always_inline unsigned long +UACCESS_INLINE ( efi, user_to_phys ) ( userptr_t userptr, off_t offset ) { + return ( userptr + offset ); +} + +static inline __always_inline userptr_t +UACCESS_INLINE ( efi, virt_to_user ) ( volatile const void *addr ) { + return trivial_virt_to_user ( addr ); +} + +static inline __always_inline void * +UACCESS_INLINE ( efi, user_to_virt ) ( userptr_t userptr, off_t offset ) { + return trivial_user_to_virt ( userptr, offset ); +} + +static inline __always_inline userptr_t +UACCESS_INLINE ( efi, userptr_add ) ( userptr_t userptr, off_t offset ) { + return trivial_userptr_add ( userptr, offset ); +} + +static inline __always_inline off_t +UACCESS_INLINE ( efi, userptr_sub ) ( userptr_t userptr, + userptr_t subtrahend ) { + return trivial_userptr_sub ( userptr, subtrahend ); +} + +static inline __always_inline void +UACCESS_INLINE ( efi, memcpy_user ) ( userptr_t dest, off_t dest_off, + userptr_t src, off_t src_off, + size_t len ) { + trivial_memcpy_user ( dest, dest_off, src, src_off, len ); +} + +static inline __always_inline void +UACCESS_INLINE ( efi, memmove_user ) ( userptr_t dest, off_t dest_off, + userptr_t src, off_t src_off, + size_t len ) { + trivial_memmove_user ( dest, dest_off, src, src_off, len ); +} + +static inline __always_inline int +UACCESS_INLINE ( efi, memcmp_user ) ( userptr_t first, off_t first_off, + userptr_t second, off_t second_off, + size_t len ) { + return trivial_memcmp_user ( first, first_off, second, second_off, len); +} + +static inline __always_inline void +UACCESS_INLINE ( efi, memset_user ) ( userptr_t buffer, off_t offset, + int c, size_t len ) { + trivial_memset_user ( buffer, offset, c, len ); +} + +static inline __always_inline size_t +UACCESS_INLINE ( efi, strlen_user ) ( userptr_t buffer, off_t offset ) { + return trivial_strlen_user ( buffer, offset ); +} + +static inline __always_inline off_t +UACCESS_INLINE ( efi, memchr_user ) ( userptr_t buffer, off_t offset, + int c, size_t len ) { + return trivial_memchr_user ( buffer, offset, c, len ); +} + +#endif /* _IPXE_EFI_UACCESS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_umalloc.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_umalloc.h new file mode 100644 index 000000000..911e69a96 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_umalloc.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_EFI_UMALLOC_H +#define _IPXE_EFI_UMALLOC_H + +/** @file + * + * iPXE user memory allocation API for EFI + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef UMALLOC_EFI +#define UMALLOC_PREFIX_efi +#else +#define UMALLOC_PREFIX_efi __efi_ +#endif + +#endif /* _IPXE_EFI_UMALLOC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_utils.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_utils.h new file mode 100644 index 000000000..9164be190 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_utils.h @@ -0,0 +1,25 @@ +#ifndef _IPXE_EFI_UTILS_H +#define _IPXE_EFI_UTILS_H + +/** @file + * + * EFI utilities + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/efi/efi.h> +#include <ipxe/efi/Protocol/DevicePath.h> + +struct device; + +extern EFI_DEVICE_PATH_PROTOCOL * +efi_devpath_end ( EFI_DEVICE_PATH_PROTOCOL *path ); +extern int efi_locate_device ( EFI_HANDLE device, EFI_GUID *protocol, + EFI_HANDLE *parent ); +extern int efi_child_add ( EFI_HANDLE parent, EFI_HANDLE child ); +extern void efi_child_del ( EFI_HANDLE parent, EFI_HANDLE child ); +extern void efi_device_info ( EFI_HANDLE device, const char *prefix, + struct device *dev ); + +#endif /* _IPXE_EFI_UTILS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/efi_wrap.h b/qemu/roms/ipxe/src/include/ipxe/efi/efi_wrap.h new file mode 100644 index 000000000..7579e0fe9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/efi_wrap.h @@ -0,0 +1,15 @@ +#ifndef _IPXE_EFI_WRAP_H +#define _IPXE_EFI_WRAP_H + +/** @file + * + * EFI driver interface + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/efi/efi.h> + +extern void efi_wrap ( EFI_HANDLE handle ); + +#endif /* _IPXE_EFI_WRAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/efi/import.pl b/qemu/roms/ipxe/src/include/ipxe/efi/import.pl new file mode 100755 index 000000000..f5a3f546f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/efi/import.pl @@ -0,0 +1,141 @@ +#!/usr/bin/perl -w + +=head1 NAME + +import.pl + +=head1 SYNOPSIS + +import.pl [options] /path/to/edk2/edk2 + +Options: + + -h,--help Display brief help message + -v,--verbose Increase verbosity + -q,--quiet Decrease verbosity + +=cut + +use File::Spec::Functions qw ( :ALL ); +use File::Find; +use File::Path; +use Getopt::Long; +use Pod::Usage; +use FindBin; +use strict; +use warnings; + +my $verbosity = 0; + +sub try_import_file { + my $ipxedir = shift; + my $edktop = shift; + my $edkdirs = shift; + my $filename = shift; + + # Skip everything except headers + return unless $filename =~ /\.h$/; + + # Skip files that are iPXE native headers + my $outfile = catfile ( $ipxedir, $filename ); + if ( -s $outfile ) { + open my $outfh, "<$outfile" or die "Could not open $outfile: $!\n"; + my $line = <$outfh>; + close $outfh; + chomp $line; + return if $line =~ /^\#ifndef\s+_IPXE_\S+_H$/; + } + + # Search for importable header + foreach my $edkdir ( @$edkdirs ) { + my $infile = catfile ( $edktop, $edkdir, $filename ); + if ( -e $infile ) { + # We have found a matching source file - import it + print "$filename <- ".catfile ( $edkdir, $filename )."\n" + if $verbosity >= 1; + open my $infh, "<$infile" or die "Could not open $infile: $!\n"; + ( undef, my $outdir, undef ) = splitpath ( $outfile ); + mkpath ( $outdir ); + open my $outfh, ">$outfile" or die "Could not open $outfile: $!\n"; + my @dependencies = (); + my $licence; + my $maybe_guard; + my $guard; + while ( <$infh> ) { + # Strip CR and trailing whitespace + s/\r//g; + s/\s*$//g; + chomp; + # Update include lines, and record included files + if ( s/^\#include\s+[<\"](\S+)[>\"]/\#include <ipxe\/efi\/$1>/ ) { + push @dependencies, $1; + } + # Check for BSD licence statement + if ( /^\s*THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE/ ) { + die "Licence detected after header guard\n" if $guard; + $licence = "BSD3"; + } + # Write out line + print $outfh "$_\n"; + # Apply FILE_LICENCE() immediately after include guard + if ( defined $maybe_guard && ! defined $guard ) { + if ( /^\#define\s+_?_${maybe_guard}_?_$/ ) { + $guard = $maybe_guard; + print $outfh "\nFILE_LICENCE ( $licence );\n" if $licence; + } + undef $maybe_guard; + } + if ( /^#ifndef\s+_?_(\S+)_?_/ ) { + $maybe_guard = $1; + } + } + close $outfh; + close $infh; + # Warn if no licence was detected + warn "Cannot detect licence in $infile\n" unless $licence; + warn "Cannot detect header guard in $infile\n" unless $guard; + # Recurse to handle any included files that we don't already have + foreach my $dependency ( @dependencies ) { + if ( ! -e catfile ( $ipxedir, $dependency ) ) { + print "...following dependency on $dependency\n" if $verbosity >= 1; + try_import_file ( $ipxedir, $edktop, $edkdirs, $dependency ); + } + } + return; + } + } + die "$filename has no equivalent in $edktop\n"; +} + +# Parse command-line options +Getopt::Long::Configure ( 'bundling', 'auto_abbrev' ); +GetOptions ( + 'verbose|v+' => sub { $verbosity++; }, + 'quiet|q+' => sub { $verbosity--; }, + 'help|h' => sub { pod2usage ( 1 ); }, +) or die "Could not parse command-line options\n"; +pod2usage ( 1 ) unless @ARGV == 1; +my $edktop = shift; + +# Identify edk import directories +my $edkdirs = [ "MdePkg/Include", "IntelFrameworkPkg/Include", + "MdeModulePkg/Include", "EdkCompatibilityPkg/Foundation" ]; +foreach my $edkdir ( @$edkdirs ) { + die "Directory \"$edktop\" does not appear to contain the EFI EDK2 " + ."(missing \"$edkdir\")\n" unless -d catdir ( $edktop, $edkdir ); +} + +# Identify iPXE EFI includes directory +my $ipxedir = $FindBin::Bin; +die "Directory \"$ipxedir\" does not appear to contain the iPXE EFI includes\n" + unless -e catfile ( $ipxedir, "../../../include/ipxe/efi" ); + +if ( $verbosity >= 1 ) { + print "Importing EFI headers into $ipxedir\nfrom "; + print join ( "\n and ", map { catdir ( $edktop, $_ ) } @$edkdirs )."\n"; +} + +# Import headers +find ( { wanted => sub { + try_import_file ( $ipxedir, $edktop, $edkdirs, abs2rel ( $_, $ipxedir ) ); +}, no_chdir => 1 }, $ipxedir ); diff --git a/qemu/roms/ipxe/src/include/ipxe/eisa.h b/qemu/roms/ipxe/src/include/ipxe/eisa.h new file mode 100644 index 000000000..22a1ed94e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/eisa.h @@ -0,0 +1,128 @@ +#ifndef EISA_H +#define EISA_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/isa_ids.h> +#include <ipxe/device.h> +#include <ipxe/tables.h> + +/* + * EISA constants + * + */ + +#define EISA_MIN_SLOT (0x1) +#define EISA_MAX_SLOT (0xf) /* Must be 2^n - 1 */ +#define EISA_SLOT_BASE( n ) ( 0x1000 * (n) ) + +#define EISA_VENDOR_ID ( 0xc80 ) +#define EISA_PROD_ID ( 0xc82 ) +#define EISA_GLOBAL_CONFIG ( 0xc84 ) + +#define EISA_CMD_RESET ( 1 << 2 ) +#define EISA_CMD_ENABLE ( 1 << 0 ) + +/** An EISA device ID list entry */ +struct eisa_device_id { + /** Name */ + const char *name; + /** Manufacturer ID */ + uint16_t vendor_id; + /** Product ID */ + uint16_t prod_id; +}; + +/** An EISA device */ +struct eisa_device { + /** Generic device */ + struct device dev; + /** Slot number */ + unsigned int slot; + /** I/O address */ + uint16_t ioaddr; + /** Manufacturer ID */ + uint16_t vendor_id; + /** Product ID */ + uint16_t prod_id; + /** Driver for this device */ + struct eisa_driver *driver; + /** Driver-private data + * + * Use eisa_set_drvdata() and eisa_get_drvdata() to access + * this field. + */ + void *priv; +}; + +/** An EISA driver */ +struct eisa_driver { + /** EISA ID table */ + struct eisa_device_id *ids; + /** Number of entries in EISA ID table */ + unsigned int id_count; + /** + * Probe device + * + * @v eisa EISA device + * @v id Matching entry in ID table + * @ret rc Return status code + */ + int ( * probe ) ( struct eisa_device *eisa, + const struct eisa_device_id *id ); + /** + * Remove device + * + * @v eisa EISA device + */ + void ( * remove ) ( struct eisa_device *eisa ); +}; + +/** EISA driver table */ +#define EISA_DRIVERS __table ( struct eisa_driver, "eisa_drivers" ) + +/** Declare an EISA driver */ +#define __eisa_driver __table_entry ( EISA_DRIVERS, 01 ) + +extern void eisa_device_enabled ( struct eisa_device *eisa, int enabled ); + +/** + * Enable EISA device + * + * @v eisa EISA device + */ +static inline void enable_eisa_device ( struct eisa_device *eisa ) { + eisa_device_enabled ( eisa, 1 ); +} + +/** + * Disable EISA device + * + * @v eisa EISA device + */ +static inline void disable_eisa_device ( struct eisa_device *eisa ) { + eisa_device_enabled ( eisa, 0 ); +} + +/** + * Set EISA driver-private data + * + * @v eisa EISA device + * @v priv Private data + */ +static inline void eisa_set_drvdata ( struct eisa_device *eisa, void *priv ) { + eisa->priv = priv; +} + +/** + * Get EISA driver-private data + * + * @v eisa EISA device + * @ret priv Private data + */ +static inline void * eisa_get_drvdata ( struct eisa_device *eisa ) { + return eisa->priv; +} + +#endif /* EISA_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/elf.h b/qemu/roms/ipxe/src/include/ipxe/elf.h new file mode 100644 index 000000000..ec675c047 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/elf.h @@ -0,0 +1,17 @@ +#ifndef _IPXE_ELF_H +#define _IPXE_ELF_H + +/** + * @file + * + * ELF image format + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <elf.h> + +extern int elf_load ( struct image *image, physaddr_t *entry, physaddr_t *max ); + +#endif /* _IPXE_ELF_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/eltorito.h b/qemu/roms/ipxe/src/include/ipxe/eltorito.h new file mode 100644 index 000000000..3302b38b6 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/eltorito.h @@ -0,0 +1,103 @@ +#ifndef _IPXE_ELTORITO_H +#define _IPXE_ELTORITO_H + +/** + * @file + * + * El Torito bootable CD-ROM specification + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/iso9660.h> + +/** An El Torito Boot Record Volume Descriptor (fixed portion) */ +struct eltorito_descriptor_fixed { + /** Descriptor type */ + uint8_t type; + /** Identifier ("CD001") */ + uint8_t id[5]; + /** Version, must be 1 */ + uint8_t version; + /** Boot system indicator; must be "EL TORITO SPECIFICATION" */ + uint8_t system_id[32]; +} __attribute__ (( packed )); + +/** An El Torito Boot Record Volume Descriptor */ +struct eltorito_descriptor { + /** Fixed portion */ + struct eltorito_descriptor_fixed fixed; + /** Unused */ + uint8_t unused[32]; + /** Boot catalog sector */ + uint32_t sector; +} __attribute__ (( packed )); + +/** El Torito Boot Record Volume Descriptor block address */ +#define ELTORITO_LBA 17 + +/** An El Torito Boot Catalog Validation Entry */ +struct eltorito_validation_entry { + /** Header ID; must be 1 */ + uint8_t header_id; + /** Platform ID + * + * 0 = 80x86 + * 1 = PowerPC + * 2 = Mac + */ + uint8_t platform_id; + /** Reserved */ + uint16_t reserved; + /** ID string */ + uint8_t id_string[24]; + /** Checksum word */ + uint16_t checksum; + /** Signature; must be 0xaa55 */ + uint16_t signature; +} __attribute__ (( packed )); + +/** El Torito platform IDs */ +enum eltorito_platform_id { + ELTORITO_PLATFORM_X86 = 0x00, + ELTORITO_PLATFORM_POWERPC = 0x01, + ELTORITO_PLATFORM_MAC = 0x02, +}; + +/** A bootable entry in the El Torito Boot Catalog */ +struct eltorito_boot_entry { + /** Boot indicator + * + * Must be @c ELTORITO_BOOTABLE for a bootable ISO image + */ + uint8_t indicator; + /** Media type + * + */ + uint8_t media_type; + /** Load segment */ + uint16_t load_segment; + /** System type */ + uint8_t filesystem; + /** Unused */ + uint8_t reserved_a; + /** Sector count */ + uint16_t length; + /** Starting sector */ + uint32_t start; + /** Unused */ + uint8_t reserved_b[20]; +} __attribute__ (( packed )); + +/** Boot indicator for a bootable ISO image */ +#define ELTORITO_BOOTABLE 0x88 + +/** El Torito media types */ +enum eltorito_media_type { + /** No emulation */ + ELTORITO_NO_EMULATION = 0, +}; + +#endif /* _IPXE_ELTORITO_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/entropy.h b/qemu/roms/ipxe/src/include/ipxe/entropy.h new file mode 100644 index 000000000..adf325e79 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/entropy.h @@ -0,0 +1,224 @@ +#ifndef _IPXE_ENTROPY_H +#define _IPXE_ENTROPY_H + +/** @file + * + * Entropy source + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <ipxe/api.h> +#include <ipxe/hash_df.h> +#include <ipxe/sha256.h> +#include <config/entropy.h> + +/** + * Calculate static inline entropy API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define ENTROPY_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( ENTROPY_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide a entropy API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_ENTROPY( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( ENTROPY_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline entropy API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_ENTROPY_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( ENTROPY_PREFIX_ ## _subsys, _api_func ) + +/** A noise sample */ +typedef uint8_t noise_sample_t; + +/** An entropy sample */ +typedef uint8_t entropy_sample_t; + +/* Include all architecture-independent entropy API headers */ +#include <ipxe/null_entropy.h> +#include <ipxe/linux/linux_entropy.h> + +/* Include all architecture-dependent entropy API headers */ +#include <bits/entropy.h> + +/** + * Enable entropy gathering + * + * @ret rc Return status code + */ +int entropy_enable ( void ); + +/** + * Disable entropy gathering + * + */ +void entropy_disable ( void ); + +/** + * min-entropy per sample + * + * @ret min_entropy min-entropy of each sample + * + * min-entropy is defined in ANS X9.82 Part 1-2006 Section 8.3 and in + * NIST SP 800-90 Appendix C.3 as + * + * H_min = -log2 ( p_max ) + * + * where p_max is the probability of the most likely sample value. + * + * This must be a compile-time constant. + */ +double min_entropy_per_sample ( void ); + +/** + * Get noise sample + * + * @ret noise Noise sample + * @ret rc Return status code + * + * This is the GetNoise function defined in ANS X9.82 Part 2 + * (October 2011 Draft) Section 6.5.2. + */ +int get_noise ( noise_sample_t *noise ); + +extern int get_entropy_input_tmp ( unsigned int num_samples, + uint8_t *tmp, size_t tmp_len ); + +/** Use SHA-256 as the underlying hash algorithm for Hash_df + * + * Hash_df using SHA-256 is an Approved algorithm in ANS X9.82. + */ +#define entropy_hash_df_algorithm sha256_algorithm + +/** Underlying hash algorithm output length (in bytes) */ +#define ENTROPY_HASH_DF_OUTLEN_BYTES SHA256_DIGEST_SIZE + +/** + * Obtain entropy input + * + * @v min_entropy_bits Minimum amount of entropy, in bits + * @v data Data buffer + * @v min_len Minimum length of entropy input, in bytes + * @v max_len Maximum length of entropy input, in bytes + * @ret len Length of entropy input, in bytes, or negative error + * + * This is the implementation of the Get_entropy_input function (using + * an entropy source as the source of entropy input and condensing + * each entropy source output after each GetEntropy call) as defined + * in ANS X9.82 Part 4 (April 2011 Draft) Section 13.3.4.2. + * + * To minimise code size, the number of samples required is calculated + * at compilation time. + */ +static inline __attribute__ (( always_inline )) int +get_entropy_input ( unsigned int min_entropy_bits, void *data, size_t min_len, + size_t max_len ) { + size_t tmp_len = ( ( ( min_entropy_bits * 2 ) + 7 ) / 8 ); + uint8_t tmp_buf[ tmp_len ]; + uint8_t *tmp = ( ( tmp_len > max_len ) ? tmp_buf : data ); + double min_samples; + unsigned int num_samples; + unsigned int n; + int rc; + + /* Sanity checks */ + linker_assert ( ( min_entropy_per_sample() <= + ( 8 * sizeof ( noise_sample_t ) ) ), + min_entropy_per_sample_is_impossibly_high ); + linker_assert ( ( min_entropy_bits <= ( 8 * max_len ) ), + entropy_buffer_too_small ); + + /* Round up minimum entropy to an integral number of bytes */ + min_entropy_bits = ( ( min_entropy_bits + 7 ) & ~7 ); + + /* Calculate number of samples required to contain sufficient entropy */ + min_samples = ( ( min_entropy_bits * 1.0 ) / min_entropy_per_sample() ); + + /* Round up to a whole number of samples. We don't have the + * ceil() function available, so do the rounding by hand. + */ + num_samples = min_samples; + if ( num_samples < min_samples ) + num_samples++; + linker_assert ( ( num_samples >= min_samples ), rounding_error ); + + /* Floating-point operations are not allowed in iPXE since we + * never set up a suitable environment. Abort the build + * unless the calculated number of samples is a compile-time + * constant. + */ + linker_assert ( __builtin_constant_p ( num_samples ), + num_samples_not_constant ); + + /* (Unnumbered). The output length of the hash function shall + * meet or exceed the security strength indicated by the + * min_entropy parameter. + */ + linker_assert ( ( ( 8 * ENTROPY_HASH_DF_OUTLEN_BYTES ) >= + min_entropy_bits ), hash_df_algorithm_too_weak ); + + /* 1. If ( min_length > max_length ), then return ( FAILURE, Null ) */ + linker_assert ( ( min_len <= max_len ), min_len_greater_than_max_len ); + + /* 2. n = 2 * min_entropy */ + n = ( 2 * min_entropy_bits ); + + /* 3. entropy_total = 0 + * 4. tmp = a fixed n-bit value, such as 0^n + * 5. While ( entropy_total < min_entropy ) + * 5.1. ( status, entropy_bitstring, assessed_entropy ) + * = GetEntropy() + * 5.2. If status indicates an error, return ( status, Null ) + * 5.3. nonce = MakeNextNonce() + * 5.4. tmp = tmp XOR df ( ( nonce || entropy_bitstring ), n ) + * 5.5. entropy_total = entropy_total + assessed_entropy + * + * (The implementation of these steps is inside the function + * get_entropy_input_tmp().) + */ + linker_assert ( __builtin_constant_p ( tmp_len ), + tmp_len_not_constant ); + linker_assert ( ( n == ( 8 * tmp_len ) ), tmp_len_mismatch ); + if ( ( rc = get_entropy_input_tmp ( num_samples, tmp, tmp_len ) ) != 0 ) + return rc; + + /* 6. If ( n < min_length ), then tmp = tmp || 0^(min_length-n) + * 7. If ( n > max_length ), then tmp = df ( tmp, max_length ) + * 8. Return ( SUCCESS, tmp ) + */ + if ( tmp_len < min_len ) { + /* (Data is already in-place.) */ + linker_assert ( ( data == tmp ), data_not_inplace ); + memset ( ( data + tmp_len ), 0, ( min_len - tmp_len ) ); + return min_len; + } else if ( tmp_len > max_len ) { + linker_assert ( ( tmp == tmp_buf ), data_inplace ); + hash_df ( &entropy_hash_df_algorithm, tmp, tmp_len, + data, max_len ); + return max_len; + } else { + /* (Data is already in-place.) */ + linker_assert ( ( data == tmp ), data_not_inplace ); + return tmp_len; + } +} + +#endif /* _IPXE_ENTROPY_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/errfile.h b/qemu/roms/ipxe/src/include/ipxe/errfile.h new file mode 100644 index 000000000..f809337ff --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/errfile.h @@ -0,0 +1,314 @@ +#ifndef _IPXE_ERRFILE_H +#define _IPXE_ERRFILE_H + +/** @file + * + * Error file identifiers + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <bits/errfile.h> + +/** + * @defgroup errfilecat Error file identifier categories + * + * @{ + */ + +#define ERRFILE_CORE 0x00002000 /**< Core code */ +#define ERRFILE_DRIVER 0x00004000 /**< Driver code */ +#define ERRFILE_NET 0x00006000 /**< Networking code */ +#define ERRFILE_IMAGE 0x00008000 /**< Image code */ +#define ERRFILE_OTHER 0x0000e000 /**< Any other code */ + +/** @} */ + +/** Flag for architecture-dependent error files */ +#define ERRFILE_ARCH 0x00800000 + +/** + * @defgroup errfile Error file identifiers + * + * These values are automatically incorporated into the definitions + * for error numbers such as EINVAL. + * + * @{ + */ + +#define ERRFILE_asprintf ( ERRFILE_CORE | 0x00000000 ) +#define ERRFILE_downloader ( ERRFILE_CORE | 0x00010000 ) +#define ERRFILE_exec ( ERRFILE_CORE | 0x00020000 ) +#define ERRFILE_hw ( ERRFILE_CORE | 0x00030000 ) +#define ERRFILE_iobuf ( ERRFILE_CORE | 0x00040000 ) +#define ERRFILE_job ( ERRFILE_CORE | 0x00050000 ) +#define ERRFILE_linebuf ( ERRFILE_CORE | 0x00060000 ) +#define ERRFILE_monojob ( ERRFILE_CORE | 0x00070000 ) +#define ERRFILE_nvo ( ERRFILE_CORE | 0x00080000 ) +#define ERRFILE_open ( ERRFILE_CORE | 0x00090000 ) +#define ERRFILE_posix_io ( ERRFILE_CORE | 0x000a0000 ) +#define ERRFILE_resolv ( ERRFILE_CORE | 0x000b0000 ) +#define ERRFILE_settings ( ERRFILE_CORE | 0x000c0000 ) +#define ERRFILE_vsprintf ( ERRFILE_CORE | 0x000d0000 ) +#define ERRFILE_xfer ( ERRFILE_CORE | 0x000e0000 ) +#define ERRFILE_bitmap ( ERRFILE_CORE | 0x000f0000 ) +#define ERRFILE_base64 ( ERRFILE_CORE | 0x00100000 ) +#define ERRFILE_base16 ( ERRFILE_CORE | 0x00110000 ) +#define ERRFILE_blockdev ( ERRFILE_CORE | 0x00120000 ) +#define ERRFILE_acpi ( ERRFILE_CORE | 0x00130000 ) +#define ERRFILE_null_sanboot ( ERRFILE_CORE | 0x00140000 ) +#define ERRFILE_edd ( ERRFILE_CORE | 0x00150000 ) +#define ERRFILE_parseopt ( ERRFILE_CORE | 0x00160000 ) +#define ERRFILE_test ( ERRFILE_CORE | 0x00170000 ) +#define ERRFILE_xferbuf ( ERRFILE_CORE | 0x00180000 ) +#define ERRFILE_pending ( ERRFILE_CORE | 0x00190000 ) +#define ERRFILE_null_reboot ( ERRFILE_CORE | 0x001a0000 ) +#define ERRFILE_pinger ( ERRFILE_CORE | 0x001b0000 ) +#define ERRFILE_fbcon ( ERRFILE_CORE | 0x001c0000 ) +#define ERRFILE_ansicol ( ERRFILE_CORE | 0x001d0000 ) +#define ERRFILE_ansicoldef ( ERRFILE_CORE | 0x001e0000 ) + +#define ERRFILE_eisa ( ERRFILE_DRIVER | 0x00000000 ) +#define ERRFILE_isa ( ERRFILE_DRIVER | 0x00010000 ) +#define ERRFILE_isapnp ( ERRFILE_DRIVER | 0x00020000 ) +#define ERRFILE_mca ( ERRFILE_DRIVER | 0x00030000 ) +#define ERRFILE_pci ( ERRFILE_DRIVER | 0x00040000 ) +#define ERRFILE_linux ( ERRFILE_DRIVER | 0x00050000 ) +#define ERRFILE_pcivpd ( ERRFILE_DRIVER | 0x00060000 ) + +#define ERRFILE_nvs ( ERRFILE_DRIVER | 0x00100000 ) +#define ERRFILE_spi ( ERRFILE_DRIVER | 0x00110000 ) +#define ERRFILE_i2c_bit ( ERRFILE_DRIVER | 0x00120000 ) +#define ERRFILE_spi_bit ( ERRFILE_DRIVER | 0x00130000 ) +#define ERRFILE_nvsvpd ( ERRFILE_DRIVER | 0x00140000 ) + +#define ERRFILE_3c509 ( ERRFILE_DRIVER | 0x00200000 ) +#define ERRFILE_bnx2 ( ERRFILE_DRIVER | 0x00210000 ) +#define ERRFILE_cs89x0 ( ERRFILE_DRIVER | 0x00220000 ) +#define ERRFILE_eepro ( ERRFILE_DRIVER | 0x00230000 ) +#define ERRFILE_etherfabric ( ERRFILE_DRIVER | 0x00240000 ) +#define ERRFILE_legacy ( ERRFILE_DRIVER | 0x00250000 ) +#define ERRFILE_natsemi ( ERRFILE_DRIVER | 0x00260000 ) +#define ERRFILE_pnic ( ERRFILE_DRIVER | 0x00270000 ) +#define ERRFILE_prism2_pci ( ERRFILE_DRIVER | 0x00280000 ) +#define ERRFILE_prism2_plx ( ERRFILE_DRIVER | 0x00290000 ) +#define ERRFILE_rtl8139 ( ERRFILE_DRIVER | 0x002a0000 ) +#define ERRFILE_smc9000 ( ERRFILE_DRIVER | 0x002b0000 ) +#define ERRFILE_tg3 ( ERRFILE_DRIVER | 0x002c0000 ) +#define ERRFILE_3c509_eisa ( ERRFILE_DRIVER | 0x002d0000 ) +#define ERRFILE_3c515 ( ERRFILE_DRIVER | 0x002e0000 ) +#define ERRFILE_3c529 ( ERRFILE_DRIVER | 0x002f0000 ) +#define ERRFILE_3c595 ( ERRFILE_DRIVER | 0x00300000 ) +#define ERRFILE_3c5x9 ( ERRFILE_DRIVER | 0x00310000 ) +#define ERRFILE_3c90x ( ERRFILE_DRIVER | 0x00320000 ) +#define ERRFILE_amd8111e ( ERRFILE_DRIVER | 0x00330000 ) +#define ERRFILE_davicom ( ERRFILE_DRIVER | 0x00340000 ) +#define ERRFILE_depca ( ERRFILE_DRIVER | 0x00350000 ) +#define ERRFILE_dmfe ( ERRFILE_DRIVER | 0x00360000 ) +#define ERRFILE_eepro100 ( ERRFILE_DRIVER | 0x00380000 ) +#define ERRFILE_epic100 ( ERRFILE_DRIVER | 0x00390000 ) +#define ERRFILE_forcedeth ( ERRFILE_DRIVER | 0x003a0000 ) +#define ERRFILE_mtd80x ( ERRFILE_DRIVER | 0x003b0000 ) +#define ERRFILE_ns83820 ( ERRFILE_DRIVER | 0x003c0000 ) +#define ERRFILE_ns8390 ( ERRFILE_DRIVER | 0x003d0000 ) +#define ERRFILE_pcnet32 ( ERRFILE_DRIVER | 0x003e0000 ) +#define ERRFILE_r8169 ( ERRFILE_DRIVER | 0x003f0000 ) +#define ERRFILE_sis900 ( ERRFILE_DRIVER | 0x00400000 ) +#define ERRFILE_sundance ( ERRFILE_DRIVER | 0x00410000 ) +#define ERRFILE_tlan ( ERRFILE_DRIVER | 0x00420000 ) +#define ERRFILE_tulip ( ERRFILE_DRIVER | 0x00430000 ) +#define ERRFILE_rhine ( ERRFILE_DRIVER | 0x00440000 ) +#define ERRFILE_velocity ( ERRFILE_DRIVER | 0x00450000 ) +#define ERRFILE_w89c840 ( ERRFILE_DRIVER | 0x00460000 ) +#define ERRFILE_ipoib ( ERRFILE_DRIVER | 0x00470000 ) +#define ERRFILE_e1000_main ( ERRFILE_DRIVER | 0x00480000 ) +#define ERRFILE_e1000e_main ( ERRFILE_DRIVER | 0x00490000 ) +#define ERRFILE_mtnic ( ERRFILE_DRIVER | 0x004a0000 ) +#define ERRFILE_phantom ( ERRFILE_DRIVER | 0x004b0000 ) +#define ERRFILE_ne2k_isa ( ERRFILE_DRIVER | 0x004c0000 ) +#define ERRFILE_b44 ( ERRFILE_DRIVER | 0x004d0000 ) +#define ERRFILE_rtl818x ( ERRFILE_DRIVER | 0x004e0000 ) +#define ERRFILE_sky2 ( ERRFILE_DRIVER | 0x004f0000 ) +#define ERRFILE_ath5k ( ERRFILE_DRIVER | 0x00500000 ) +#define ERRFILE_atl1e ( ERRFILE_DRIVER | 0x00510000 ) +#define ERRFILE_sis190 ( ERRFILE_DRIVER | 0x00520000 ) +#define ERRFILE_myri10ge ( ERRFILE_DRIVER | 0x00530000 ) +#define ERRFILE_skge ( ERRFILE_DRIVER | 0x00540000 ) +#define ERRFILE_vxge_main ( ERRFILE_DRIVER | 0x00550000 ) +#define ERRFILE_vxge_config ( ERRFILE_DRIVER | 0x00560000 ) +#define ERRFILE_vxge_traffic ( ERRFILE_DRIVER | 0x00570000 ) +#define ERRFILE_igb_main ( ERRFILE_DRIVER | 0x00580000 ) +#define ERRFILE_snpnet ( ERRFILE_DRIVER | 0x00590000 ) +#define ERRFILE_snponly ( ERRFILE_DRIVER | 0x005a0000 ) +#define ERRFILE_jme ( ERRFILE_DRIVER | 0x005b0000 ) +#define ERRFILE_virtio_net ( ERRFILE_DRIVER | 0x005c0000 ) +#define ERRFILE_tap ( ERRFILE_DRIVER | 0x005d0000 ) +#define ERRFILE_igbvf_main ( ERRFILE_DRIVER | 0x005e0000 ) +#define ERRFILE_ath9k ( ERRFILE_DRIVER | 0x005f0000 ) +#define ERRFILE_ath ( ERRFILE_DRIVER | 0x00600000 ) +#define ERRFILE_vmxnet3 ( ERRFILE_DRIVER | 0x00610000 ) +#define ERRFILE_mii ( ERRFILE_DRIVER | 0x00620000 ) +#define ERRFILE_realtek ( ERRFILE_DRIVER | 0x00630000 ) +#define ERRFILE_skeleton ( ERRFILE_DRIVER | 0x00640000 ) +#define ERRFILE_intel ( ERRFILE_DRIVER | 0x00650000 ) +#define ERRFILE_myson ( ERRFILE_DRIVER | 0x00660000 ) +#define ERRFILE_intelx ( ERRFILE_DRIVER | 0x00670000 ) +#define ERRFILE_snp ( ERRFILE_DRIVER | 0x00680000 ) +#define ERRFILE_netfront ( ERRFILE_DRIVER | 0x00690000 ) +#define ERRFILE_nii ( ERRFILE_DRIVER | 0x006a0000 ) + +#define ERRFILE_scsi ( ERRFILE_DRIVER | 0x00700000 ) +#define ERRFILE_arbel ( ERRFILE_DRIVER | 0x00710000 ) +#define ERRFILE_hermon ( ERRFILE_DRIVER | 0x00720000 ) +#define ERRFILE_linda ( ERRFILE_DRIVER | 0x00730000 ) +#define ERRFILE_ata ( ERRFILE_DRIVER | 0x00740000 ) +#define ERRFILE_srp ( ERRFILE_DRIVER | 0x00750000 ) +#define ERRFILE_qib7322 ( ERRFILE_DRIVER | 0x00760000 ) + +#define ERRFILE_aoe ( ERRFILE_NET | 0x00000000 ) +#define ERRFILE_arp ( ERRFILE_NET | 0x00010000 ) +#define ERRFILE_dhcpopts ( ERRFILE_NET | 0x00020000 ) +#define ERRFILE_ethernet ( ERRFILE_NET | 0x00030000 ) +#define ERRFILE_icmpv6 ( ERRFILE_NET | 0x00040000 ) +#define ERRFILE_ipv4 ( ERRFILE_NET | 0x00050000 ) +#define ERRFILE_ipv6 ( ERRFILE_NET | 0x00060000 ) +#define ERRFILE_ndp ( ERRFILE_NET | 0x00070000 ) +#define ERRFILE_netdevice ( ERRFILE_NET | 0x00080000 ) +#define ERRFILE_nullnet ( ERRFILE_NET | 0x00090000 ) +#define ERRFILE_tcp ( ERRFILE_NET | 0x000a0000 ) +#define ERRFILE_ftp ( ERRFILE_NET | 0x000b0000 ) +#define ERRFILE_httpcore ( ERRFILE_NET | 0x000c0000 ) +#define ERRFILE_iscsi ( ERRFILE_NET | 0x000d0000 ) +#define ERRFILE_tcpip ( ERRFILE_NET | 0x000e0000 ) +#define ERRFILE_udp ( ERRFILE_NET | 0x000f0000 ) +#define ERRFILE_dhcp ( ERRFILE_NET | 0x00100000 ) +#define ERRFILE_dns ( ERRFILE_NET | 0x00110000 ) +#define ERRFILE_tftp ( ERRFILE_NET | 0x00120000 ) +#define ERRFILE_infiniband ( ERRFILE_NET | 0x00130000 ) +#define ERRFILE_netdev_settings ( ERRFILE_NET | 0x00140000 ) +#define ERRFILE_dhcppkt ( ERRFILE_NET | 0x00150000 ) +#define ERRFILE_slam ( ERRFILE_NET | 0x00160000 ) +#define ERRFILE_ib_sma ( ERRFILE_NET | 0x00170000 ) +#define ERRFILE_ib_packet ( ERRFILE_NET | 0x00180000 ) +#define ERRFILE_icmpv4 ( ERRFILE_NET | 0x00190000 ) +#define ERRFILE_ib_qset ( ERRFILE_NET | 0x001a0000 ) +#define ERRFILE_ib_gma ( ERRFILE_NET | 0x001b0000 ) +#define ERRFILE_ib_pathrec ( ERRFILE_NET | 0x001c0000 ) +#define ERRFILE_ib_mcast ( ERRFILE_NET | 0x001d0000 ) +#define ERRFILE_ib_cm ( ERRFILE_NET | 0x001e0000 ) +#define ERRFILE_net80211 ( ERRFILE_NET | 0x001f0000 ) +#define ERRFILE_ib_mi ( ERRFILE_NET | 0x00200000 ) +#define ERRFILE_ib_cmrc ( ERRFILE_NET | 0x00210000 ) +#define ERRFILE_ib_srp ( ERRFILE_NET | 0x00220000 ) +#define ERRFILE_sec80211 ( ERRFILE_NET | 0x00230000 ) +#define ERRFILE_wep ( ERRFILE_NET | 0x00240000 ) +#define ERRFILE_eapol ( ERRFILE_NET | 0x00250000 ) +#define ERRFILE_wpa ( ERRFILE_NET | 0x00260000 ) +#define ERRFILE_wpa_psk ( ERRFILE_NET | 0x00270000 ) +#define ERRFILE_wpa_tkip ( ERRFILE_NET | 0x00280000 ) +#define ERRFILE_wpa_ccmp ( ERRFILE_NET | 0x00290000 ) +#define ERRFILE_eth_slow ( ERRFILE_NET | 0x002a0000 ) +#define ERRFILE_fc ( ERRFILE_NET | 0x002b0000 ) +#define ERRFILE_fcels ( ERRFILE_NET | 0x002c0000 ) +#define ERRFILE_fcp ( ERRFILE_NET | 0x002d0000 ) +#define ERRFILE_fcoe ( ERRFILE_NET | 0x002e0000 ) +#define ERRFILE_fcns ( ERRFILE_NET | 0x002f0000 ) +#define ERRFILE_vlan ( ERRFILE_NET | 0x00300000 ) +#define ERRFILE_oncrpc ( ERRFILE_NET | 0x00310000 ) +#define ERRFILE_portmap ( ERRFILE_NET | 0x00320000 ) +#define ERRFILE_nfs ( ERRFILE_NET | 0x00330000 ) +#define ERRFILE_nfs_open ( ERRFILE_NET | 0x00340000 ) +#define ERRFILE_mount ( ERRFILE_NET | 0x00350000 ) +#define ERRFILE_oncrpc_iob ( ERRFILE_NET | 0x00360000 ) +#define ERRFILE_neighbour ( ERRFILE_NET | 0x00370000 ) +#define ERRFILE_socket ( ERRFILE_NET | 0x00380000 ) +#define ERRFILE_icmp ( ERRFILE_NET | 0x00390000 ) +#define ERRFILE_ping ( ERRFILE_NET | 0x003a0000 ) +#define ERRFILE_dhcpv6 ( ERRFILE_NET | 0x003b0000 ) +#define ERRFILE_nfs_uri ( ERRFILE_NET | 0x003c0000 ) + +#define ERRFILE_image ( ERRFILE_IMAGE | 0x00000000 ) +#define ERRFILE_elf ( ERRFILE_IMAGE | 0x00010000 ) +#define ERRFILE_script ( ERRFILE_IMAGE | 0x00020000 ) +#define ERRFILE_segment ( ERRFILE_IMAGE | 0x00030000 ) +#define ERRFILE_efi_image ( ERRFILE_IMAGE | 0x00040000 ) +#define ERRFILE_embedded ( ERRFILE_IMAGE | 0x00050000 ) +#define ERRFILE_pnm ( ERRFILE_IMAGE | 0x00060000 ) +#define ERRFILE_png ( ERRFILE_IMAGE | 0x00070000 ) + +#define ERRFILE_asn1 ( ERRFILE_OTHER | 0x00000000 ) +#define ERRFILE_chap ( ERRFILE_OTHER | 0x00010000 ) +#define ERRFILE_aoeboot ( ERRFILE_OTHER | 0x00020000 ) +#define ERRFILE_autoboot ( ERRFILE_OTHER | 0x00030000 ) +#define ERRFILE_dhcpmgmt ( ERRFILE_OTHER | 0x00040000 ) +#define ERRFILE_imgmgmt ( ERRFILE_OTHER | 0x00050000 ) +#define ERRFILE_pxe_tftp ( ERRFILE_OTHER | 0x00060000 ) +#define ERRFILE_pxe_udp ( ERRFILE_OTHER | 0x00070000 ) +#define ERRFILE_axtls_aes ( ERRFILE_OTHER | 0x00080000 ) +#define ERRFILE_cipher ( ERRFILE_OTHER | 0x00090000 ) +#define ERRFILE_image_cmd ( ERRFILE_OTHER | 0x000a0000 ) +#define ERRFILE_uri_test ( ERRFILE_OTHER | 0x000b0000 ) +#define ERRFILE_ibft ( ERRFILE_OTHER | 0x000c0000 ) +#define ERRFILE_tls ( ERRFILE_OTHER | 0x000d0000 ) +#define ERRFILE_ifmgmt ( ERRFILE_OTHER | 0x000e0000 ) +#define ERRFILE_iscsiboot ( ERRFILE_OTHER | 0x000f0000 ) +#define ERRFILE_efi_pci ( ERRFILE_OTHER | 0x00100000 ) +#define ERRFILE_efi_snp ( ERRFILE_OTHER | 0x00110000 ) +#define ERRFILE_smbios ( ERRFILE_OTHER | 0x00120000 ) +#define ERRFILE_smbios_settings ( ERRFILE_OTHER | 0x00130000 ) +#define ERRFILE_efi_smbios ( ERRFILE_OTHER | 0x00140000 ) +#define ERRFILE_pxemenu ( ERRFILE_OTHER | 0x00150000 ) +#define ERRFILE_x509 ( ERRFILE_OTHER | 0x00160000 ) +#define ERRFILE_login_ui ( ERRFILE_OTHER | 0x00170000 ) +#define ERRFILE_ib_srpboot ( ERRFILE_OTHER | 0x00180000 ) +#define ERRFILE_iwmgmt ( ERRFILE_OTHER | 0x00190000 ) +#define ERRFILE_linux_smbios ( ERRFILE_OTHER | 0x001a0000 ) +#define ERRFILE_lotest ( ERRFILE_OTHER | 0x001b0000 ) +#define ERRFILE_config_cmd ( ERRFILE_OTHER | 0x001c0000 ) +#define ERRFILE_ifmgmt_cmd ( ERRFILE_OTHER | 0x001d0000 ) +#define ERRFILE_fcmgmt_cmd ( ERRFILE_OTHER | 0x001e0000 ) +#define ERRFILE_gdbstub_cmd ( ERRFILE_OTHER | 0x001f0000 ) +#define ERRFILE_sanboot_cmd ( ERRFILE_OTHER | 0x00200000 ) +#define ERRFILE_bofm ( ERRFILE_OTHER | 0x00210000 ) +#define ERRFILE_prompt ( ERRFILE_OTHER | 0x00220000 ) +#define ERRFILE_nvo_cmd ( ERRFILE_OTHER | 0x00230000 ) +#define ERRFILE_hmac_drbg ( ERRFILE_OTHER | 0x00240000 ) +#define ERRFILE_drbg ( ERRFILE_OTHER | 0x00250000 ) +#define ERRFILE_entropy ( ERRFILE_OTHER | 0x00260000 ) +#define ERRFILE_rsa ( ERRFILE_OTHER | 0x00270000 ) +#define ERRFILE_linux_entropy ( ERRFILE_OTHER | 0x00280000 ) +#define ERRFILE_x509_test ( ERRFILE_OTHER | 0x00290000 ) +#define ERRFILE_cms ( ERRFILE_OTHER | 0x002a0000 ) +#define ERRFILE_imgtrust ( ERRFILE_OTHER | 0x002b0000 ) +#define ERRFILE_menu_ui ( ERRFILE_OTHER | 0x002c0000 ) +#define ERRFILE_menu_cmd ( ERRFILE_OTHER | 0x002d0000 ) +#define ERRFILE_validator ( ERRFILE_OTHER | 0x002e0000 ) +#define ERRFILE_ocsp ( ERRFILE_OTHER | 0x002f0000 ) +#define ERRFILE_nslookup ( ERRFILE_OTHER | 0x00300000 ) +#define ERRFILE_efi_snp_hii ( ERRFILE_OTHER | 0x00310000 ) +#define ERRFILE_readline ( ERRFILE_OTHER | 0x00320000 ) +#define ERRFILE_efi_bofm ( ERRFILE_OTHER | 0x00330000 ) +#define ERRFILE_efi_console ( ERRFILE_OTHER | 0x00340000 ) +#define ERRFILE_efi_debug ( ERRFILE_OTHER | 0x00350000 ) +#define ERRFILE_efi_download ( ERRFILE_OTHER | 0x00360000 ) +#define ERRFILE_efi_driver ( ERRFILE_OTHER | 0x00370000 ) +#define ERRFILE_efi_file ( ERRFILE_OTHER | 0x00380000 ) +#define ERRFILE_efi_init ( ERRFILE_OTHER | 0x00390000 ) +#define ERRFILE_efi_timer ( ERRFILE_OTHER | 0x003a0000 ) +#define ERRFILE_efi_umalloc ( ERRFILE_OTHER | 0x003b0000 ) +#define ERRFILE_linux_pci ( ERRFILE_OTHER | 0x003c0000 ) +#define ERRFILE_pci_settings ( ERRFILE_OTHER | 0x003d0000 ) +#define ERRFILE_efi_reboot ( ERRFILE_OTHER | 0x003e0000 ) +#define ERRFILE_memmap_settings ( ERRFILE_OTHER | 0x003f0000 ) +#define ERRFILE_param_cmd ( ERRFILE_OTHER | 0x00400000 ) +#define ERRFILE_deflate ( ERRFILE_OTHER | 0x00410000 ) +#define ERRFILE_xenstore ( ERRFILE_OTHER | 0x00420000 ) +#define ERRFILE_xenbus ( ERRFILE_OTHER | 0x00430000 ) +#define ERRFILE_xengrant ( ERRFILE_OTHER | 0x00440000 ) +#define ERRFILE_efi_utils ( ERRFILE_OTHER | 0x00450000 ) +#define ERRFILE_efi_wrap ( ERRFILE_OTHER | 0x00460000 ) + +/** @} */ + +#endif /* _IPXE_ERRFILE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/errno/efi.h b/qemu/roms/ipxe/src/include/ipxe/errno/efi.h new file mode 100644 index 000000000..2d2c50176 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/errno/efi.h @@ -0,0 +1,134 @@ +#ifndef _IPXE_ERRNO_EFI_H +#define _IPXE_ERRNO_EFI_H + +/** + * @file + * + * EFI platform error codes + * + * We derive our platform error codes from the possible values for + * EFI_STATUS defined in the UEFI specification. + * + * EFI_STATUS codes are 32/64-bit values consisting of a top bit which + * is set for errors and clear for warnings, and a mildly undefined + * code of low bits indicating the precise error/warning code. Errors + * and warnings have completely separate namespaces. + * + * We assume that no EFI_STATUS code will ever be defined which uses + * more than bits 0-6 of the low bits. We then choose to encode our + * platform-specific error by mapping bit 31/63 of the EFI_STATUS to + * bit 7 of the platform-specific error code, and preserving bits 0-6 + * as-is. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/efi/efi.h> +#include <ipxe/efi/Uefi/UefiBaseType.h> + +/** Bit shift for EFI error/warning bit */ +#define EFI_ERR_SHIFT ( 8 * ( sizeof ( EFI_STATUS ) - 1 ) ) + +/** + * Convert platform error code to platform component of iPXE error code + * + * @v platform Platform error code + * @ret errno Platform component of iPXE error code + */ +#define PLATFORM_TO_ERRNO( platform ) \ + ( ( (platform) | \ + ( ( ( EFI_STATUS ) (platform) ) >> EFI_ERR_SHIFT ) ) & 0xff ) + +/** + * Convert iPXE error code to platform error code + * + * @v errno iPXE error code + * @ret platform Platform error code + */ +#define ERRNO_TO_PLATFORM( errno ) \ + ( ( ( ( EFI_STATUS ) (errno) & 0x80 ) << EFI_ERR_SHIFT ) | \ + ( (errno) & 0x7f ) ) + +/* Platform-specific error codes */ +#define PLATFORM_ENOERR EFI_SUCCESS +#define PLATFORM_E2BIG EFI_BUFFER_TOO_SMALL +#define PLATFORM_EACCES EFI_ACCESS_DENIED +#define PLATFORM_EADDRINUSE EFI_ALREADY_STARTED +#define PLATFORM_EADDRNOTAVAIL EFI_NOT_READY +#define PLATFORM_EAFNOSUPPORT EFI_UNSUPPORTED +#define PLATFORM_EAGAIN EFI_NOT_READY +#define PLATFORM_EALREADY EFI_ALREADY_STARTED +#define PLATFORM_EBADF EFI_INVALID_PARAMETER +#define PLATFORM_EBADMSG EFI_PROTOCOL_ERROR +#define PLATFORM_EBUSY EFI_NO_RESPONSE +#define PLATFORM_ECANCELED EFI_ABORTED +#define PLATFORM_ECHILD EFI_NOT_FOUND +#define PLATFORM_ECONNABORTED EFI_ABORTED +#define PLATFORM_ECONNREFUSED EFI_NO_RESPONSE +#define PLATFORM_ECONNRESET EFI_ABORTED +#define PLATFORM_EDEADLK EFI_NOT_READY +#define PLATFORM_EDESTADDRREQ EFI_PROTOCOL_ERROR +#define PLATFORM_EDOM EFI_INVALID_PARAMETER +#define PLATFORM_EDQUOT EFI_VOLUME_FULL +#define PLATFORM_EEXIST EFI_WRITE_PROTECTED +#define PLATFORM_EFAULT EFI_INVALID_PARAMETER +#define PLATFORM_EFBIG EFI_END_OF_MEDIA +#define PLATFORM_EHOSTUNREACH EFI_NO_RESPONSE +#define PLATFORM_EIDRM EFI_INVALID_PARAMETER +#define PLATFORM_EILSEQ EFI_INVALID_PARAMETER +#define PLATFORM_EINPROGRESS EFI_ALREADY_STARTED +#define PLATFORM_EINTR EFI_NOT_READY +#define PLATFORM_EINVAL EFI_INVALID_PARAMETER +#define PLATFORM_EIO EFI_PROTOCOL_ERROR +#define PLATFORM_EISCONN EFI_ALREADY_STARTED +#define PLATFORM_EISDIR EFI_PROTOCOL_ERROR +#define PLATFORM_ELOOP EFI_VOLUME_CORRUPTED +#define PLATFORM_EMFILE EFI_OUT_OF_RESOURCES +#define PLATFORM_EMLINK EFI_OUT_OF_RESOURCES +#define PLATFORM_EMSGSIZE EFI_BAD_BUFFER_SIZE +#define PLATFORM_EMULTIHOP EFI_INVALID_PARAMETER +#define PLATFORM_ENAMETOOLONG EFI_INVALID_PARAMETER +#define PLATFORM_ENETDOWN EFI_NO_RESPONSE +#define PLATFORM_ENETRESET EFI_ABORTED +#define PLATFORM_ENETUNREACH EFI_NO_RESPONSE +#define PLATFORM_ENFILE EFI_OUT_OF_RESOURCES +#define PLATFORM_ENOBUFS EFI_OUT_OF_RESOURCES +#define PLATFORM_ENODATA EFI_NO_RESPONSE +#define PLATFORM_ENODEV EFI_DEVICE_ERROR +#define PLATFORM_ENOENT EFI_NOT_FOUND +#define PLATFORM_ENOEXEC EFI_LOAD_ERROR +#define PLATFORM_ENOLCK EFI_OUT_OF_RESOURCES +#define PLATFORM_ENOLINK EFI_OUT_OF_RESOURCES +#define PLATFORM_ENOMEM EFI_OUT_OF_RESOURCES +#define PLATFORM_ENOMSG EFI_PROTOCOL_ERROR +#define PLATFORM_ENOPROTOOPT EFI_UNSUPPORTED +#define PLATFORM_ENOSPC EFI_VOLUME_FULL +#define PLATFORM_ENOSR EFI_OUT_OF_RESOURCES +#define PLATFORM_ENOSTR EFI_PROTOCOL_ERROR +#define PLATFORM_ENOSYS EFI_UNSUPPORTED +#define PLATFORM_ENOTCONN EFI_NOT_STARTED +#define PLATFORM_ENOTDIR EFI_VOLUME_CORRUPTED +#define PLATFORM_ENOTEMPTY EFI_VOLUME_CORRUPTED +#define PLATFORM_ENOTSOCK EFI_INVALID_PARAMETER +#define PLATFORM_ENOTSUP EFI_UNSUPPORTED +#define PLATFORM_ENOTTY EFI_UNSUPPORTED +#define PLATFORM_ENXIO EFI_NOT_FOUND +#define PLATFORM_EOPNOTSUPP EFI_UNSUPPORTED +#define PLATFORM_EOVERFLOW EFI_BUFFER_TOO_SMALL +#define PLATFORM_EPERM EFI_ACCESS_DENIED +#define PLATFORM_EPIPE EFI_ABORTED +#define PLATFORM_EPROTO EFI_PROTOCOL_ERROR +#define PLATFORM_EPROTONOSUPPORT EFI_UNSUPPORTED +#define PLATFORM_EPROTOTYPE EFI_INVALID_PARAMETER +#define PLATFORM_ERANGE EFI_BUFFER_TOO_SMALL +#define PLATFORM_EROFS EFI_WRITE_PROTECTED +#define PLATFORM_ESPIPE EFI_END_OF_FILE +#define PLATFORM_ESRCH EFI_NOT_STARTED +#define PLATFORM_ESTALE EFI_PROTOCOL_ERROR +#define PLATFORM_ETIME EFI_TIMEOUT +#define PLATFORM_ETIMEDOUT EFI_TIMEOUT +#define PLATFORM_ETXTBSY EFI_MEDIA_CHANGED +#define PLATFORM_EWOULDBLOCK EFI_NOT_READY +#define PLATFORM_EXDEV EFI_VOLUME_CORRUPTED + +#endif /* _IPXE_ERRNO_EFI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/errno/linux.h b/qemu/roms/ipxe/src/include/ipxe/errno/linux.h new file mode 100644 index 000000000..11309b4ad --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/errno/linux.h @@ -0,0 +1,113 @@ +#ifndef _IPXE_ERRNO_LINUX_H +#define _IPXE_ERRNO_LINUX_H + +/** + * @file + * + * Linux platform error codes + * + * Linux error codes all fit inside 8 bits, so we just use them + * directly as our platform error codes. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * Convert platform error code to platform component of iPXE error code + * + * @v platform Platform error code + * @ret errno Platform component of iPXE error code + */ +#define PLATFORM_TO_ERRNO( platform ) ( (platform) & 0xff ) + +/** + * Convert iPXE error code to platform error code + * + * @v errno iPXE error code + * @ret platform Platform error code + */ +#define ERRNO_TO_PLATFORM( errno ) ( (errno) & 0xff ) + +/* Platform-specific error codes */ +#define PLATFORM_ENOERR 0 +#define PLATFORM_E2BIG 7 +#define PLATFORM_EACCES 13 +#define PLATFORM_EADDRINUSE 98 +#define PLATFORM_EADDRNOTAVAIL 99 +#define PLATFORM_EAFNOSUPPORT 97 +#define PLATFORM_EAGAIN 11 +#define PLATFORM_EALREADY 114 +#define PLATFORM_EBADF 9 +#define PLATFORM_EBADMSG 74 +#define PLATFORM_EBUSY 16 +#define PLATFORM_ECANCELED 125 +#define PLATFORM_ECHILD 10 +#define PLATFORM_ECONNABORTED 103 +#define PLATFORM_ECONNREFUSED 111 +#define PLATFORM_ECONNRESET 104 +#define PLATFORM_EDEADLK 35 +#define PLATFORM_EDESTADDRREQ 89 +#define PLATFORM_EDOM 33 +#define PLATFORM_EDQUOT 122 +#define PLATFORM_EEXIST 17 +#define PLATFORM_EFAULT 14 +#define PLATFORM_EFBIG 27 +#define PLATFORM_EHOSTUNREACH 113 +#define PLATFORM_EIDRM 43 +#define PLATFORM_EILSEQ 84 +#define PLATFORM_EINPROGRESS 115 +#define PLATFORM_EINTR 4 +#define PLATFORM_EINVAL 22 +#define PLATFORM_EIO 5 +#define PLATFORM_EISCONN 106 +#define PLATFORM_EISDIR 21 +#define PLATFORM_ELOOP 40 +#define PLATFORM_EMFILE 24 +#define PLATFORM_EMLINK 31 +#define PLATFORM_EMSGSIZE 90 +#define PLATFORM_EMULTIHOP 72 +#define PLATFORM_ENAMETOOLONG 36 +#define PLATFORM_ENETDOWN 100 +#define PLATFORM_ENETRESET 102 +#define PLATFORM_ENETUNREACH 101 +#define PLATFORM_ENFILE 23 +#define PLATFORM_ENOBUFS 105 +#define PLATFORM_ENODATA 61 +#define PLATFORM_ENODEV 19 +#define PLATFORM_ENOENT 2 +#define PLATFORM_ENOEXEC 8 +#define PLATFORM_ENOLCK 37 +#define PLATFORM_ENOLINK 67 +#define PLATFORM_ENOMEM 12 +#define PLATFORM_ENOMSG 42 +#define PLATFORM_ENOPROTOOPT 92 +#define PLATFORM_ENOSPC 28 +#define PLATFORM_ENOSR 63 +#define PLATFORM_ENOSTR 60 +#define PLATFORM_ENOSYS 38 +#define PLATFORM_ENOTCONN 107 +#define PLATFORM_ENOTDIR 20 +#define PLATFORM_ENOTEMPTY 39 +#define PLATFORM_ENOTSOCK 88 +#define PLATFORM_ENOTSUP PLATFORM_EOPNOTSUPP +#define PLATFORM_ENOTTY 25 +#define PLATFORM_ENXIO 6 +#define PLATFORM_EOPNOTSUPP 95 +#define PLATFORM_EOVERFLOW 75 +#define PLATFORM_EPERM 1 +#define PLATFORM_EPIPE 32 +#define PLATFORM_EPROTO 71 +#define PLATFORM_EPROTONOSUPPORT 93 +#define PLATFORM_EPROTOTYPE 91 +#define PLATFORM_ERANGE 34 +#define PLATFORM_EROFS 30 +#define PLATFORM_ESPIPE 29 +#define PLATFORM_ESRCH 3 +#define PLATFORM_ESTALE 116 +#define PLATFORM_ETIME 62 +#define PLATFORM_ETIMEDOUT 110 +#define PLATFORM_ETXTBSY 26 +#define PLATFORM_EWOULDBLOCK PLATFORM_EAGAIN +#define PLATFORM_EXDEV 18 + +#endif /* _IPXE_ERRNO_LINUX_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/errortab.h b/qemu/roms/ipxe/src/include/ipxe/errortab.h new file mode 100644 index 000000000..a2f6a70f5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/errortab.h @@ -0,0 +1,28 @@ +#ifndef _IPXE_ERRORTAB_H +#define _IPXE_ERRORTAB_H + +/** @file + * + * Error message tables + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tables.h> + +struct errortab { + int errno; + const char *text; +}; + +#define ERRORTAB __table ( struct errortab, "errortab" ) + +#define __errortab __table_entry ( ERRORTAB, 01 ) + +#define __einfo_errortab( einfo ) { \ + .errno = __einfo_errno ( einfo ), \ + .text = __einfo_desc ( einfo ), \ + } + +#endif /* _IPXE_ERRORTAB_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/eth_slow.h b/qemu/roms/ipxe/src/include/ipxe/eth_slow.h new file mode 100644 index 000000000..00509197d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/eth_slow.h @@ -0,0 +1,255 @@ +#ifndef _IPXE_ETH_SLOW_H +#define _IPXE_ETH_SLOW_H + +/** @file + * + * Ethernet slow protocols + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** Slow protocols header */ +struct eth_slow_header { + /** Slow protocols subtype */ + uint8_t subtype; + /** Subtype version number */ + uint8_t version; +} __attribute__ (( packed )); + +/** LACP subtype */ +#define ETH_SLOW_SUBTYPE_LACP 1 + +/** LACP version number */ +#define ETH_SLOW_LACP_VERSION 1 + +/** Marker subtype */ +#define ETH_SLOW_SUBTYPE_MARKER 2 + +/** Marker version number */ +#define ETH_SLOW_MARKER_VERSION 1 + +/** TLV (type, length, value) header */ +struct eth_slow_tlv_header { + /** Type + * + * This is an ETH_SLOW_TLV_XXX constant. + */ + uint8_t type; + /** Length + * + * The length includes the TLV header (except for a TLV + * terminator, which has a length of zero). + */ + uint8_t length; +} __attribute__ (( packed )); + +/** Terminator type */ +#define ETH_SLOW_TLV_TERMINATOR 0 + +/** Terminator length */ +#define ETH_SLOW_TLV_TERMINATOR_LEN 0 + +/** LACP actor type */ +#define ETH_SLOW_TLV_LACP_ACTOR 1 + +/** LACP actor length */ +#define ETH_SLOW_TLV_LACP_ACTOR_LEN \ + ( sizeof ( struct eth_slow_lacp_entity_tlv ) ) + +/** LACP partner type */ +#define ETH_SLOW_TLV_LACP_PARTNER 2 + +/** LACP partner length */ +#define ETH_SLOW_TLV_LACP_PARTNER_LEN \ + ( sizeof ( struct eth_slow_lacp_entity_tlv ) ) + +/** LACP collector type */ +#define ETH_SLOW_TLV_LACP_COLLECTOR 3 + +/** LACP collector length */ +#define ETH_SLOW_TLV_LACP_COLLECTOR_LEN \ + ( sizeof ( struct eth_slow_lacp_collector_tlv ) ) + +/** Marker request type */ +#define ETH_SLOW_TLV_MARKER_REQUEST 1 + +/** Marker request length */ +#define ETH_SLOW_TLV_MARKER_REQUEST_LEN \ + ( sizeof ( struct eth_slow_marker_tlv ) ) + +/** Marker response type */ +#define ETH_SLOW_TLV_MARKER_RESPONSE 2 + +/** Marker response length */ +#define ETH_SLOW_TLV_MARKER_RESPONSE_LEN \ + ( sizeof ( struct eth_slow_marker_tlv ) ) + +/** Terminator TLV */ +struct eth_slow_terminator_tlv { + /** TLV header */ + struct eth_slow_tlv_header tlv; +} __attribute__ (( packed )); + +/** LACP entity (actor or partner) TLV */ +struct eth_slow_lacp_entity_tlv { + /** TLV header */ + struct eth_slow_tlv_header tlv; + /** System priority + * + * Used to determine the order in which ports are selected for + * aggregation. + */ + uint16_t system_priority; + /** System identifier + * + * Used to uniquely identify the system (i.e. the entity with + * potentially multiple ports). + */ + uint8_t system[ETH_ALEN]; + /** Key + * + * Used to uniquely identify a group of aggregatable ports + * within a system. + */ + uint16_t key; + /** Port priority + * + * Used to determine the order in which ports are selected for + * aggregation. + */ + uint16_t port_priority; + /** Port identifier + * + * Used to uniquely identify a port within a system. + */ + uint16_t port; + /** State + * + * This is the bitwise OR of zero or more LACP_STATE_XXX + * constants. + */ + uint8_t state; + /** Reserved */ + uint8_t reserved[3]; +} __attribute__ (( packed )); + +/** Maximum system priority */ +#define LACP_SYSTEM_PRIORITY_MAX 0xffff + +/** Maximum port priority */ +#define LACP_PORT_PRIORITY_MAX 0xff + +/** LACP entity is active + * + * Represented by the state character "A"/"a" + */ +#define LACP_STATE_ACTIVE 0x01 + +/** LACP timeout is short + * + * Short timeout is one second, long timeout is 30s + * + * Represented by the state character "F"/"f" + */ +#define LACP_STATE_FAST 0x02 + +/** LACP link is aggregateable + * + * Represented by the state characters "G"/"g" + */ +#define LACP_STATE_AGGREGATABLE 0x04 + +/** LACP link is in synchronisation + * + * Represented by the state characters "S"/"s" + */ +#define LACP_STATE_IN_SYNC 0x08 + +/** LACP link is collecting (receiving) + * + * Represented by the state characters "C"/"c" + */ +#define LACP_STATE_COLLECTING 0x10 + +/** LACP link is distributing (transmitting) + * + * Represented by the state characters "D"/"d" + */ +#define LACP_STATE_DISTRIBUTING 0x20 + +/** LACP entity is using defaulted partner information + * + * Represented by the state characters "L"/"l" + */ +#define LACP_STATE_DEFAULTED 0x40 + +/** LACP entity receive state machine is in EXPIRED + * + * Represented by the state characters "X"/"x" + */ +#define LACP_STATE_EXPIRED 0x80 + +/** LACP collector TLV */ +struct eth_slow_lacp_collector_tlv { + /** TLV header */ + struct eth_slow_tlv_header tlv; + /** Maximum delay (in 10us increments) */ + uint16_t max_delay; + /** Reserved */ + uint8_t reserved[12]; +} __attribute__ (( packed )); + +/** Marker TLV */ +struct eth_slow_marker_tlv { + /** TLV header */ + struct eth_slow_tlv_header tlv; + /** Requester port */ + uint16_t port; + /** Requester system */ + uint8_t system[ETH_ALEN]; + /** Requester transaction ID */ + uint32_t xact; + /** Padding */ + uint16_t pad; +} __attribute__ (( packed )); + +/** LACP packet */ +struct eth_slow_lacp { + /** Slow protocols header */ + struct eth_slow_header header; + /** Actor information */ + struct eth_slow_lacp_entity_tlv actor; + /** Partner information */ + struct eth_slow_lacp_entity_tlv partner; + /** Collector information */ + struct eth_slow_lacp_collector_tlv collector; + /** Terminator */ + struct eth_slow_terminator_tlv terminator; + /** Reserved */ + uint8_t reserved[50]; +} __attribute__ (( packed )); + +/** Marker packet */ +struct eth_slow_marker { + /** Slow protocols header */ + struct eth_slow_header header; + /** Marker information */ + struct eth_slow_marker_tlv marker; + /** Terminator */ + struct eth_slow_terminator_tlv terminator; + /** Reserved */ + uint8_t reserved[90]; +} __attribute__ (( packed )); + +/** Slow protocols packet */ +union eth_slow_packet { + /** Slow protocols header */ + struct eth_slow_header header; + /** LACP packet */ + struct eth_slow_lacp lacp; + /** Marker packet */ + struct eth_slow_marker marker; +} __attribute__ (( packed )); + +#endif /* _IPXE_ETH_SLOW_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ethernet.h b/qemu/roms/ipxe/src/include/ipxe/ethernet.h new file mode 100644 index 000000000..d1263d7c3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ethernet.h @@ -0,0 +1,100 @@ +#ifndef _IPXE_ETHERNET_H +#define _IPXE_ETHERNET_H + +/** @file + * + * Ethernet protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/netdevice.h> +#include <ipxe/iobuf.h> + +/** + * Check if Ethernet address is all zeroes + * + * @v addr Ethernet address + * @ret is_zero Address is all zeroes + */ +static inline int is_zero_ether_addr ( const void *addr ) { + const uint8_t *addr_bytes = addr; + + return ( ! ( addr_bytes[0] | addr_bytes[1] | addr_bytes[2] | + addr_bytes[3] | addr_bytes[4] | addr_bytes[5] ) ); +} + +/** + * Check if Ethernet address is a multicast address + * + * @v addr Ethernet address + * @ret is_mcast Address is a multicast address + * + * Note that the broadcast address is also a multicast address. + */ +static inline int is_multicast_ether_addr ( const void *addr ) { + const uint8_t *addr_bytes = addr; + + return ( addr_bytes[0] & 0x01 ); +} + +/** + * Check if Ethernet address is locally assigned + * + * @v addr Ethernet address + * @ret is_local Address is locally assigned + */ +static inline int is_local_ether_addr ( const void *addr ) { + const uint8_t *addr_bytes = addr; + + return ( addr_bytes[0] & 0x02 ); +} + +/** + * Check if Ethernet address is the broadcast address + * + * @v addr Ethernet address + * @ret is_bcast Address is the broadcast address + */ +static inline int is_broadcast_ether_addr ( const void *addr ) { + const uint8_t *addr_bytes = addr; + + return ( ( addr_bytes[0] & addr_bytes[1] & addr_bytes[2] & + addr_bytes[3] & addr_bytes[4] & addr_bytes[5] ) == 0xff ); +} + +/** + * Check if Ethernet address is valid + * + * @v addr Ethernet address + * @ret is_valid Address is valid + * + * Check that the Ethernet address (MAC) is not 00:00:00:00:00:00, is + * not a multicast address, and is not ff:ff:ff:ff:ff:ff. + */ +static inline int is_valid_ether_addr ( const void *addr ) { + return ( ( ! is_multicast_ether_addr ( addr ) ) && + ( ! is_zero_ether_addr ( addr ) ) ); +} + +extern uint8_t eth_broadcast[]; +extern struct ll_protocol ethernet_protocol __ll_protocol; + +extern int eth_push ( struct net_device *netdev, struct io_buffer *iobuf, + const void *ll_dest, const void *ll_source, + uint16_t net_proto ); +extern int eth_pull ( struct net_device *netdev, struct io_buffer *iobuf, + const void **ll_dest, const void **ll_source, + uint16_t *net_proto, unsigned int *flags ); +extern void eth_init_addr ( const void *hw_addr, void *ll_addr ); +extern void eth_random_addr ( void *hw_addr ); +extern const char * eth_ntoa ( const void *ll_addr ); +extern int eth_mc_hash ( unsigned int af, const void *net_addr, + void *ll_addr ); +extern int eth_eth_addr ( const void *ll_addr, void *eth_addr ); +extern int eth_eui64 ( const void *ll_addr, void *eui64 ); +extern struct net_device * alloc_etherdev ( size_t priv_size ); + +#endif /* _IPXE_ETHERNET_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fakedhcp.h b/qemu/roms/ipxe/src/include/ipxe/fakedhcp.h new file mode 100644 index 000000000..ea06b06dc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fakedhcp.h @@ -0,0 +1,23 @@ +#ifndef _IPXE_FAKEDHCP_H +#define _IPXE_FAKEDHCP_H + +/** @file + * + * Fake DHCP packets + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +struct net_device; + +extern int create_fakedhcpdiscover ( struct net_device *netdev, + void *data, size_t max_len ); +extern int create_fakedhcpack ( struct net_device *netdev, + void *data, size_t max_len ); +extern int create_fakepxebsack ( struct net_device *netdev, + void *data, size_t max_len ); + +#endif /* _IPXE_FAKEDHCP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fbcon.h b/qemu/roms/ipxe/src/include/ipxe/fbcon.h new file mode 100644 index 000000000..0538449ac --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fbcon.h @@ -0,0 +1,155 @@ +#ifndef _IPXE_FBCON_H +#define _IPXE_FBCON_H + +/** @file + * + * Frame buffer console + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/ansiesc.h> +#include <ipxe/uaccess.h> + +struct pixel_buffer; + +/** Character width, in pixels */ +#define FBCON_CHAR_WIDTH 9 + +/** Character height, in pixels */ +#define FBCON_CHAR_HEIGHT 16 + +/** Bold colour modifier (RGB value) */ +#define FBCON_BOLD 0x555555 + +/** Transparent background magic colour (raw colour value) */ +#define FBCON_TRANSPARENT 0xffffffff + +/** A font glyph */ +struct fbcon_font_glyph { + /** Row bitmask */ + uint8_t bitmask[FBCON_CHAR_HEIGHT]; +} __attribute__ (( packed )); + +/** A font definition */ +struct fbcon_font { + /** Character glyphs */ + userptr_t start; +} __attribute__ (( packed )); + +/** A frame buffer geometry + * + * The geometry is defined in terms of "entities" (which can be either + * pixels or characters). + */ +struct fbcon_geometry { + /** Width (number of entities per displayed row) */ + unsigned int width; + /** Height (number of entities per displayed column) */ + unsigned int height; + /** Length of a single entity */ + size_t len; + /** Stride (offset between vertically adjacent entities) */ + size_t stride; +}; + +/** A frame buffer margin */ +struct fbcon_margin { + /** Left margin */ + unsigned int left; + /** Right margin */ + unsigned int right; + /** Top margin */ + unsigned int top; + /** Bottom margin */ + unsigned int bottom; +}; + +/** A frame buffer colour mapping */ +struct fbcon_colour_map { + /** Red scale (right shift amount from 24-bit RGB) */ + uint8_t red_scale; + /** Green scale (right shift amount from 24-bit RGB) */ + uint8_t green_scale; + /** Blue scale (right shift amount from 24-bit RGB) */ + uint8_t blue_scale; + /** Red LSB */ + uint8_t red_lsb; + /** Green LSB */ + uint8_t green_lsb; + /** Blue LSB */ + uint8_t blue_lsb; +}; + +/** A frame buffer text cell */ +struct fbcon_text_cell { + /** Foreground colour */ + uint32_t foreground; + /** Background colour */ + uint32_t background; + /** Character */ + unsigned int character; +}; + +/** A frame buffer text array */ +struct fbcon_text { + /** Stored text cells */ + userptr_t start; +}; + +/** A frame buffer background picture */ +struct fbcon_picture { + /** Start address */ + userptr_t start; +}; + +/** A frame buffer console */ +struct fbcon { + /** Start address */ + userptr_t start; + /** Length of one complete displayed screen */ + size_t len; + /** Pixel geometry */ + struct fbcon_geometry *pixel; + /** Character geometry */ + struct fbcon_geometry character; + /** Margin */ + struct fbcon_margin margin; + /** Indent to first character (in bytes) */ + size_t indent; + /** Colour mapping */ + struct fbcon_colour_map *map; + /** Font definition */ + struct fbcon_font *font; + /** Text foreground raw colour */ + uint32_t foreground; + /** Text background raw colour */ + uint32_t background; + /** Bold colour modifier raw colour */ + uint32_t bold; + /** Text cursor X position */ + unsigned int xpos; + /** Text cursor Y position */ + unsigned int ypos; + /** ANSI escape sequence context */ + struct ansiesc_context ctx; + /** Text array */ + struct fbcon_text text; + /** Background picture */ + struct fbcon_picture picture; + /** Display cursor */ + int show_cursor; +}; + +extern int fbcon_init ( struct fbcon *fbcon, userptr_t start, + struct fbcon_geometry *pixel, + struct fbcon_margin *margin, + struct fbcon_colour_map *map, + struct fbcon_font *font, + struct pixel_buffer *pixbuf ); +extern void fbcon_fini ( struct fbcon *fbcon ); +extern void fbcon_putchar ( struct fbcon *fbcon, int character ); + +#endif /* _IPXE_FBCON_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fc.h b/qemu/roms/ipxe/src/include/ipxe/fc.h new file mode 100644 index 000000000..6fdef092d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fc.h @@ -0,0 +1,538 @@ +#ifndef _IPXE_FC_H +#define _IPXE_FC_H + +/** + * @file + * + * Fibre Channel + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/refcnt.h> +#include <ipxe/list.h> +#include <ipxe/tables.h> +#include <ipxe/interface.h> +#include <ipxe/retry.h> +#include <ipxe/socket.h> + +/****************************************************************************** + * + * Fibre Channel Names and identifiers + * + ****************************************************************************** + */ + +/** A Fibre Channel name */ +struct fc_name { + uint8_t bytes[8]; +} __attribute__ (( packed )); + +/** Length of Fibre Channel name text */ +#define FC_NAME_STRLEN 23 /* "xx:xx:xx:xx:xx:xx:xx:xx" */ + +/** A Fibre Channel port identifier */ +struct fc_port_id { + uint8_t bytes[3]; +} __attribute__ (( packed )); + +/** Length of Fibre Channel port identifier next */ +#define FC_PORT_ID_STRLEN 9 /* "xx.xx.xx" */ + +/** + * Fibre Channel socket address + */ +struct sockaddr_fc { + /** Socket address family (part of struct @c sockaddr) + * + * Always set to @c AF_FC for Fibre Channel addresses + */ + sa_family_t sfc_family; + /** Port ID */ + struct fc_port_id sfc_port_id; + /** Padding + * + * This ensures that a struct @c sockaddr_tcpip is large + * enough to hold a socket address for any TCP/IP address + * family. + */ + char pad[ sizeof ( struct sockaddr ) - sizeof ( sa_family_t ) + - sizeof ( struct fc_port_id ) ]; +} __attribute__ (( packed, may_alias )); + +extern struct fc_port_id fc_empty_port_id; +extern struct fc_port_id fc_f_port_id; +extern struct fc_port_id fc_gs_port_id; +extern struct fc_port_id fc_ptp_low_port_id; +extern struct fc_port_id fc_ptp_high_port_id; + +extern const char * fc_id_ntoa ( const struct fc_port_id *id ); +extern int fc_id_aton ( const char *id_text, struct fc_port_id *id ); +extern const char * fc_ntoa ( const struct fc_name *wwn ); +extern int fc_aton ( const char *wwn_text, struct fc_name *wwn ); +extern struct sockaddr * fc_fill_sockaddr ( struct sockaddr_fc *sa_fc, + struct fc_port_id *id ); + +/****************************************************************************** + * + * Fibre Channel link state + * + ****************************************************************************** + */ + +/** Delay between failed link-up attempts */ +#define FC_LINK_RETRY_DELAY ( 2 * TICKS_PER_SEC ) + +/** A Fibre Channel link state nonitor */ +struct fc_link_state { + /** Retry timer */ + struct retry_timer timer; + /** Link state */ + int rc; + /** Examine link state + * + * @v link Fibre Channel link state monitor + */ + void ( * examine ) ( struct fc_link_state *link ); +}; + +/** + * Check Fibre Channel link state + * + * @v link Fibre Channel link state monitor + * @ret link_up Link is up + */ +static inline __attribute__ (( always_inline )) int +fc_link_ok ( struct fc_link_state *link ) { + return ( link->rc == 0 ); +} + +/****************************************************************************** + * + * Fibre Channel packet formats and exchanges + * + ****************************************************************************** + */ + +/** A Fibre Channel Frame Header */ +struct fc_frame_header { + /** Routing control + * + * This is the bitwise OR of one @c fc_r_ctl_routing value and + * one @c fc_r_ctl_info value. + */ + uint8_t r_ctl; + /** Destination ID */ + struct fc_port_id d_id; + /** Class-specific control / Priority */ + uint8_t cs_ctl_prio; + /** Source ID */ + struct fc_port_id s_id; + /** Data structure type */ + uint8_t type; + /** Frame control - exchange and sequence */ + uint8_t f_ctl_es; + /** Frame control - acknowledgements */ + uint8_t f_ctl_ack; + /** Frame control - miscellaneous */ + uint8_t f_ctl_misc; + /** Sequence ID */ + uint8_t seq_id; + /** Data field control */ + uint8_t df_ctl; + /** Sequence count */ + uint16_t seq_cnt; + /** Originator exchange ID */ + uint16_t ox_id; + /** Responder exchange ID */ + uint16_t rx_id; + /** Parameter + * + * Contains the relative offset when @c FC_F_CTL_MISC_REL_OFF + * is set. + */ + uint32_t parameter; +} __attribute__ (( packed )); + +/** Fibre Channel Routing Control Routing */ +enum fc_r_ctl_routing { + FC_R_CTL_DATA = 0x00, /**< Device Data */ + FC_R_CTL_ELS = 0x20, /**< Extended Link Services */ + FC_R_CTL_FC4_LINK = 0x30, /**< FC-4 Link Data */ + FC_R_CTL_VIDEO = 0x40, /**< Video Data */ + FC_R_CTL_EH = 0x50, /**< Extended Headers */ + FC_R_CTL_BLS = 0x80, /**< Basic Link Services */ + FC_R_CTL_LINK_CTRL = 0xc0, /**< Link Control */ + FC_R_CTL_EXT_ROUTE = 0xf0, /**< Extended Routing */ +}; + +/** Fibre Channel Routing Control Routing mask */ +#define FC_R_CTL_ROUTING_MASK 0xf0 + +/** Fibre Channel Routing Control Information */ +enum fc_r_ctl_info { + FC_R_CTL_UNCAT = 0x00, /**< Uncategorized */ + FC_R_CTL_SOL_DATA = 0x01, /**< Solicited Data */ + FC_R_CTL_UNSOL_CTRL = 0x02, /**< Unsolicited Control */ + FC_R_CTL_SOL_CTRL = 0x03, /**< Solicited Control */ + FC_R_CTL_UNSOL_DATA = 0x04, /**< Unsolicited Data */ + FC_R_CTL_DATA_DESC = 0x05, /**< Data Descriptor */ + FC_R_CTL_UNSOL_CMD = 0x06, /**< Unsolicited Command */ + FC_R_CTL_CMD_STAT = 0x07, /**< Command Status */ +}; + +/** Fibre Channel Routing Control Information mask */ +#define FC_R_CTL_INFO_MASK 0x07 + +/** Fibre Channel Data Structure Type */ +enum fc_type { + FC_TYPE_BLS = 0x00, /**< Basic Link Service */ + FC_TYPE_ELS = 0x01, /**< Extended Link Service */ + FC_TYPE_FCP = 0x08, /**< Fibre Channel Protocol */ + FC_TYPE_CT = 0x20, /**< Common Transport */ +}; + +/** Fibre Channel Frame Control - Exchange and Sequence */ +enum fc_f_ctl_es { + FC_F_CTL_ES_RESPONDER = 0x80, /**< Responder of Exchange */ + FC_F_CTL_ES_RECIPIENT = 0x40, /**< Sequence Recipient */ + FC_F_CTL_ES_FIRST = 0x20, /**< First Sequence of Exchange */ + FC_F_CTL_ES_LAST = 0x10, /**< Last Sequence of Exchange */ + FC_F_CTL_ES_END = 0x08, /**< Last Data Frame of Sequence */ + FC_F_CTL_ES_TRANSFER = 0x01, /**< Transfer Sequence Initiative */ +}; + +/** Fibre Channel Frame Control - Miscellaneous */ +enum fc_f_ctl_misc { + FC_F_CTL_MISC_REL_OFF = 0x08, /**< Relative Offset Present */ +}; + +/** Responder exchange identifier used before first response */ +#define FC_RX_ID_UNKNOWN 0xffff + +struct fc_port; + +extern int fc_xchg_originate ( struct interface *parent, struct fc_port *port, + struct fc_port_id *peer_port_id, + unsigned int type ); + +/** A Fibre Channel responder */ +struct fc_responder { + /** Type */ + unsigned int type; + /** Respond to exchange + * + * @v xchg Exchange interface + * @v port Fibre Channel port + * @v port_id Local port ID + * @v peer_port_id Peer port ID + * @ret rc Return status code + */ + int ( * respond ) ( struct interface *xchg, struct fc_port *port, + struct fc_port_id *port_id, + struct fc_port_id *peer_port_id ); +}; + +/** Fibre Channel responder table */ +#define FC_RESPONDERS __table ( struct fc_responder, "fc_responders" ) + +/** Declare a Fibre Channel responder */ +#define __fc_responder __table_entry ( FC_RESPONDERS, 01 ) + +/****************************************************************************** + * + * Fibre Channel ports + * + ****************************************************************************** + */ + +/** A Fibre Channel port */ +struct fc_port { + /** Reference count */ + struct refcnt refcnt; + /** List of all ports */ + struct list_head list; + /** Name of this port */ + char name[8]; + + /** Transport interface */ + struct interface transport; + /** Node name */ + struct fc_name node_wwn; + /** Port name */ + struct fc_name port_wwn; + /** Local port ID */ + struct fc_port_id port_id; + /** Flags */ + unsigned int flags; + + /** Link state monitor */ + struct fc_link_state link; + /** FLOGI interface */ + struct interface flogi; + /** Link node name */ + struct fc_name link_node_wwn; + /** Link port name */ + struct fc_name link_port_wwn; + /** Link port ID (for point-to-point links only) */ + struct fc_port_id ptp_link_port_id; + + /** Name server PLOGI interface */ + struct interface ns_plogi; + + /** List of active exchanges */ + struct list_head xchgs; +}; + +/** Fibre Channel port flags */ +enum fc_port_flags { + /** Port is attached to a fabric */ + FC_PORT_HAS_FABRIC = 0x0001, + /** Port is logged in to a name server */ + FC_PORT_HAS_NS = 0x0002, +}; + +/** + * Get reference to Fibre Channel port + * + * @v port Fibre Channel port + * @ret port Fibre Channel port + */ +static inline __attribute__ (( always_inline )) struct fc_port * +fc_port_get ( struct fc_port *port ) { + ref_get ( &port->refcnt ); + return port; +} + +/** + * Drop reference to Fibre Channel port + * + * @v port Fibre Channel port + */ +static inline __attribute__ (( always_inline )) void +fc_port_put ( struct fc_port *port ) { + ref_put ( &port->refcnt ); +} + +extern struct list_head fc_ports; + +extern int fc_port_login ( struct fc_port *port, struct fc_port_id *port_id, + const struct fc_name *link_node_wwn, + const struct fc_name *link_port_wwn, + int has_fabric ); +extern void fc_port_logout ( struct fc_port *port, int rc ); +extern int fc_port_open ( struct interface *transport, + const struct fc_name *node_wwn, + const struct fc_name *port_wwn, + const char *name ); +extern struct fc_port * fc_port_find ( const char *name ); + +/****************************************************************************** + * + * Fibre Channel peers + * + ****************************************************************************** + */ + +/** A Fibre Channel peer */ +struct fc_peer { + /** Reference count */ + struct refcnt refcnt; + /** List of all peers */ + struct list_head list; + + /** Port name */ + struct fc_name port_wwn; + + /** Link state monitor */ + struct fc_link_state link; + /** PLOGI interface */ + struct interface plogi; + /** Fibre Channel port, if known */ + struct fc_port *port; + /** Peer port ID, if known */ + struct fc_port_id port_id; + + /** List of upper-layer protocols */ + struct list_head ulps; + /** Active usage count + * + * A peer (and attached ULPs) may be created in response to + * unsolicited login requests received via the fabric. We + * track our own active usage count independently of the + * existence of the peer, so that if the peer becomes logged + * out (e.g. due to a link failure) then we know whether or + * not we should attempt to relogin. + */ + unsigned int usage; +}; + +/** + * Get reference to Fibre Channel peer + * + * @v peer Fibre Channel peer + * @ret peer Fibre Channel peer + */ +static inline __attribute__ (( always_inline )) struct fc_peer * +fc_peer_get ( struct fc_peer *peer ) { + ref_get ( &peer->refcnt ); + return peer; +} + +/** + * Drop reference to Fibre Channel peer + * + * @v peer Fibre Channel peer + */ +static inline __attribute__ (( always_inline )) void +fc_peer_put ( struct fc_peer *peer ) { + ref_put ( &peer->refcnt ); +} + +extern struct list_head fc_peers; + +extern struct fc_peer * fc_peer_get_wwn ( const struct fc_name *port_wwn ); +extern struct fc_peer * +fc_peer_get_port_id ( struct fc_port *port, + const struct fc_port_id *peer_port_id ); +extern int fc_peer_login ( struct fc_peer *peer, + struct fc_port *port, + struct fc_port_id *port_id ); +extern void fc_peer_logout ( struct fc_peer *peer, int rc ); + +/****************************************************************************** + * + * Fibre Channel upper-layer protocols + * + ****************************************************************************** + */ + +/** A Fibre Channel upper-layer protocol */ +struct fc_ulp { + /** Reference count */ + struct refcnt refcnt; + /** Fibre Channel peer */ + struct fc_peer *peer; + /** List of upper-layer protocols */ + struct list_head list; + + /** Type */ + unsigned int type; + /** Flags */ + unsigned int flags; + + /** Link state monitor */ + struct fc_link_state link; + /** PRLI interface */ + struct interface prli; + /** Service parameters, if any */ + void *param; + /** Service parameter length */ + size_t param_len; + + /** Active users of this upper-layer protocol + * + * As with peers, an upper-layer protocol may be created in + * response to an unsolicited login request received via the + * fabric. This list records the number of active users of + * the ULP; the number of entries in the list is equivalent to + * the peer usage count. + */ + struct list_head users; +}; + +/** Fibre Channel upper-layer protocol flags */ +enum fc_ulp_flags { + /** A login originated by us has succeeded */ + FC_ULP_ORIGINATED_LOGIN_OK = 0x0001, +}; + +/** A Fibre Channel upper-layer protocol user */ +struct fc_ulp_user { + /** Fibre Channel upper layer protocol */ + struct fc_ulp *ulp; + /** List of users */ + struct list_head list; + /** Containing object reference count, or NULL */ + struct refcnt *refcnt; + /** Examine link state + * + * @v user Fibre Channel upper-layer-protocol user + */ + void ( * examine ) ( struct fc_ulp_user *user ); +}; + +/** + * Get reference to Fibre Channel upper-layer protocol + * + * @v ulp Fibre Channel upper-layer protocol + * @ret ulp Fibre Channel upper-layer protocol + */ +static inline __attribute__ (( always_inline )) struct fc_ulp * +fc_ulp_get ( struct fc_ulp *ulp ) { + ref_get ( &ulp->refcnt ); + return ulp; +} + +/** + * Drop reference to Fibre Channel upper-layer protocol + * + * @v ulp Fibre Channel upper-layer protocol + */ +static inline __attribute__ (( always_inline )) void +fc_ulp_put ( struct fc_ulp *ulp ) { + ref_put ( &ulp->refcnt ); +} + +/** + * Get reference to Fibre Channel upper-layer protocol user + * + * @v user Fibre Channel upper-layer protocol user + * @ret user Fibre Channel upper-layer protocol user + */ +static inline __attribute__ (( always_inline )) struct fc_ulp_user * +fc_ulp_user_get ( struct fc_ulp_user *user ) { + ref_get ( user->refcnt ); + return user; +} + +/** + * Drop reference to Fibre Channel upper-layer protocol user + * + * @v user Fibre Channel upper-layer protocol user + */ +static inline __attribute__ (( always_inline )) void +fc_ulp_user_put ( struct fc_ulp_user *user ) { + ref_put ( user->refcnt ); +} + +/** + * Initialise Fibre Channel upper-layer protocol user + * + * @v user Fibre Channel upper-layer protocol user + * @v examine Examine link state method + * @v refcnt Containing object reference count, or NULL + */ +static inline __attribute__ (( always_inline )) void +fc_ulp_user_init ( struct fc_ulp_user *user, + void ( * examine ) ( struct fc_ulp_user *user ), + struct refcnt *refcnt ) { + user->examine = examine; + user->refcnt = refcnt; +} + +extern struct fc_ulp * fc_ulp_get_wwn_type ( const struct fc_name *port_wwn, + unsigned int type ); +extern struct fc_ulp * +fc_ulp_get_port_id_type ( struct fc_port *port, + const struct fc_port_id *peer_port_id, + unsigned int type ); +extern void fc_ulp_attach ( struct fc_ulp *ulp, struct fc_ulp_user *user ); +extern void fc_ulp_detach ( struct fc_ulp_user *user ); +extern int fc_ulp_login ( struct fc_ulp *ulp, const void *param, + size_t param_len, int originated ); +extern void fc_ulp_logout ( struct fc_ulp *ulp, int rc ); + +#endif /* _IPXE_FC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fcels.h b/qemu/roms/ipxe/src/include/ipxe/fcels.h new file mode 100644 index 000000000..45fa69a4a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fcels.h @@ -0,0 +1,445 @@ +#ifndef _IPXE_FCELS_H +#define _IPXE_FCELS_H + +/** + * @file + * + * Fibre Channel Extended Link Services + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/fc.h> +#include <ipxe/tables.h> +#include <ipxe/refcnt.h> +#include <ipxe/list.h> +#include <ipxe/process.h> +#include <ipxe/interface.h> + +/** Fibre Channel ELS frame common parameters */ +struct fc_els_frame_common { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved[3]; +} __attribute__ (( packed )); + +/** Fibre Channel ELS command codes */ +enum fc_els_command_code { + FC_ELS_LS_RJT = 0x01, /**< Link Service Reject */ + FC_ELS_LS_ACC = 0x02, /**< Link Service Accept */ + FC_ELS_PLOGI = 0x03, /**< Port Login */ + FC_ELS_FLOGI = 0x04, /**< Fabric Login */ + FC_ELS_LOGO = 0x05, /**< Logout */ + FC_ELS_RTV = 0x0e, /**< Read Timeout Value */ + FC_ELS_ECHO = 0x10, /**< Echo */ + FC_ELS_PRLI = 0x20, /**< Process Login */ + FC_ELS_PRLO = 0x21, /**< Process Logout */ +}; + +/** A Fibre Channel LS_RJT frame */ +struct fc_ls_rjt_frame { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved[4]; + /** Reason code */ + uint8_t reason; + /** Reason code explanation */ + uint8_t explanation; + /** Vendor unique */ + uint8_t vendor; +} __attribute__ (( packed )); + +/** Fibre Channel ELS rejection reason codes */ +enum fc_els_reject_reason { + /** Invalid ELS command code */ + FC_ELS_RJT_INVALID_COMMAND = 0x01, + /** Logical error */ + FC_ELS_RJT_ILLOGICAL = 0x03, + /** Logical busy */ + FC_ELS_RJT_BUSY = 0x05, + /** Protocol error */ + FC_ELS_RJT_PROTOCOL = 0x07, + /** Unable to perform command request */ + FC_ELS_RJT_UNABLE = 0x09, + /** Command not supported */ + FC_ELS_RJT_UNSUPPORTED = 0x0b, + /** Command already in progress */ + FC_ELS_RJT_IN_PROGRESS = 0x0e, +}; + +/** Fibre Channel "common" service parameters */ +struct fc_login_common { + /** Login version */ + uint16_t version; + /** Buffer-to-buffer credit */ + uint16_t credit; + /** Flags */ + uint16_t flags; + /** Receive size */ + uint16_t mtu; + /** "Common"?! */ + union { + struct { + /** Maximum number of concurrent sequences */ + uint16_t max_seq; + /** Relative offset by info category */ + uint16_t rel_offs; + } plogi; + struct { + /** Resource allocation timeout value */ + uint32_t r_a_tov; + } flogi; + } u; + /** Error detection timeout value */ + uint32_t e_d_tov; +} __attribute__ (( packed )); + +/** Fibre Channel default login version */ +#define FC_LOGIN_VERSION 0x2020 + +/** Fibre Channel default buffer-to-buffer credit */ +#define FC_LOGIN_DEFAULT_B2B 10 + +/** Continuously increasing relative offset */ +#define FC_LOGIN_CONTINUOUS_OFFSET 0x8000 + +/** Clean address */ +#define FC_LOGIN_CLEAN 0x8000 + +/** Multiple N_Port_ID support */ +#define FC_LOGIN_MULTI_N 0x8000 + +/** Random relative offset */ +#define FC_LOGIN_RANDOM_OFFSET 0x4000 + +/** Virtual fabrics */ +#define FC_LOGIN_VIRTUAL 0x4000 + +/** Vendor version level */ +#define FC_LOGIN_VENDOR 0x2000 + +/** Multiple N_Port_ID support */ +#define FC_LOGIN_MULTI_F 0x2000 + +/** Forwarder port */ +#define FC_LOGIN_F_PORT 0x1000 + +/** Alternative credit management */ +#define FC_LOGIN_ALT_CREDIT 0x0800 + +/** Name server session started */ +#define FC_LOGIN_NSS_STARTED 0x0800 + +/** Begin name server session */ +#define FC_LOGIN_NSS_BEGIN 0x0400 + +/** 1ns error detection timer resolution */ +#define FC_LOGIN_HIRES_E_D_TOV 0x0400 + +/** Broadcast supported */ +#define FC_LOGIN_BROADCAST 0x0100 + +/** Query buffer conditions */ +#define FC_LOGIN_QUERY_BUF 0x0040 + +/** Security */ +#define FC_LOGIN_SECURITY 0x0020 + +/** Clock sync primitive capable */ +#define FC_LOGIN_CLOCK_SYNC 0x0010 + +/** Short R_T timeout */ +#define FC_LOGIN_SHORT_R_T_TOV 0x0008 + +/** Dynamic half duplex */ +#define FC_LOGIN_DHD 0x0004 + +/** Continuously increasing sequence count */ +#define FC_LOGIN_CONTINUOUS_SEQ 0x0002 + +/** Payload */ +#define FC_LOGIN_PAYLOAD 0x0001 + +/** Fibre Channel default MTU */ +#define FC_LOGIN_DEFAULT_MTU 1452 + +/** Default maximum number of concurrent sequences */ +#define FC_LOGIN_DEFAULT_MAX_SEQ 255 + +/** Default relative offset by info category */ +#define FC_LOGIN_DEFAULT_REL_OFFS 0x1f + +/** Default E_D timeout value */ +#define FC_LOGIN_DEFAULT_E_D_TOV 2000 + +/** Fibre Channel class-specific login parameters */ +struct fc_login_class { + /** Flags */ + uint16_t flags; + /** Initiator flags */ + uint16_t init_flags; + /** Recipient flags */ + uint16_t recip_flags; + /** Receive data field size */ + uint16_t mtu; + /** Maximum number of concurrent sequences */ + uint16_t max_seq; + /** End-to-end credit */ + uint16_t credit; + /** Reserved */ + uint8_t reserved0; + /** Maximum number of open sequences per exchange */ + uint8_t max_seq_per_xchg; + /** Reserved */ + uint8_t reserved1[2]; +} __attribute__ (( packed )); + +/** Class valid */ +#define FC_LOGIN_CLASS_VALID 0x8000 + +/** Sequential delivery requested */ +#define FC_LOGIN_CLASS_SEQUENTIAL 0x0800 + +/** A Fibre Channel FLOGI/PLOGI frame */ +struct fc_login_frame { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved[3]; + /** Common service parameters */ + struct fc_login_common common; + /** Port name */ + struct fc_name port_wwn; + /** Node name */ + struct fc_name node_wwn; + /** Class 1 service parameters */ + struct fc_login_class class1; + /** Class 2 service parameters */ + struct fc_login_class class2; + /** Class 3 service parameters */ + struct fc_login_class class3; + /** Class 4 service parameters */ + struct fc_login_class class4; + /** Vendor version level */ + uint8_t vendor_version[16]; +} __attribute__ (( packed )); + +/** A Fibre Channel LOGO request frame */ +struct fc_logout_request_frame { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved[4]; + /** Port ID */ + struct fc_port_id port_id; + /** Port name */ + struct fc_name port_wwn; +} __attribute__ (( packed )); + +/** A Fibre Channel LOGO response frame */ +struct fc_logout_response_frame { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved[3]; +} __attribute__ (( packed )); + +/** A Fibre Channel PRLI service parameter page */ +struct fc_prli_page { + /** Type code */ + uint8_t type; + /** Type code extension */ + uint8_t type_ext; + /** Flags and response code */ + uint16_t flags; + /** Reserved */ + uint32_t reserved[2]; +} __attribute__ (( packed )); + +/** Establish image pair */ +#define FC_PRLI_ESTABLISH 0x2000 + +/** Response code mask */ +#define FC_PRLI_RESPONSE_MASK 0x0f00 + +/** Request was executed successfully */ +#define FC_PRLI_RESPONSE_SUCCESS 0x0100 + +/** A Fibre Channel PRLI frame */ +struct fc_prli_frame { + /** ELS command code */ + uint8_t command; + /** Page length */ + uint8_t page_len; + /** Payload length */ + uint16_t len; + /** Service parameter page */ + struct fc_prli_page page; +} __attribute__ (( packed )); + +/** A Fibre Channel RTV request frame */ +struct fc_rtv_request_frame { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved[3]; +} __attribute__ (( packed )); + +/** A Fibre Channel RTV response frame */ +struct fc_rtv_response_frame { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved0[3]; + /** Resource allocation timeout value */ + uint32_t r_a_tov; + /** Error detection timeout value */ + uint32_t e_d_tov; + /** Timeout qualifier */ + uint16_t flags; + /** Reserved */ + uint16_t reserved1; +} __attribute__ (( packed )); + +/** 1ns error detection timer resolution */ +#define FC_RTV_HIRES_E_D_TOV 0x0400 + +/** Short R_T timeout */ +#define FC_RTV_SHORT_R_T_TOV 0x0008 + +/** A Fibre Channel ECHO frame */ +struct fc_echo_frame_header { + /** ELS command code */ + uint8_t command; + /** Reserved */ + uint8_t reserved[3]; +} __attribute__ (( packed )); + +/** A Fibre Channel extended link services transaction */ +struct fc_els { + /** Reference count */ + struct refcnt refcnt; + /** Job control interface */ + struct interface job; + /** Fibre Channel exchange */ + struct interface xchg; + /** Request sending process */ + struct process process; + + /** Fibre Channel port */ + struct fc_port *port; + /** Local port ID */ + struct fc_port_id port_id; + /** Peer port ID */ + struct fc_port_id peer_port_id; + /** ELS handler, if known */ + struct fc_els_handler *handler; + /** Flags */ + unsigned int flags; +}; + +/** Fibre Channel extended link services transaction flags */ +enum fc_els_flags { + /** ELS transaction is a request */ + FC_ELS_REQUEST = 0x0001, +}; + +/** A Fibre Channel extended link services handler */ +struct fc_els_handler { + /** Name */ + const char *name; + /** Transmit ELS frame + * + * @v els Fibre Channel ELS transaction + * @ret rc Return status code + */ + int ( * tx ) ( struct fc_els *els ); + /** Receive ELS frame + * + * @v els Fibre Channel ELS transaction + * @v data ELS frame + * @v len Length of ELS frame + * @ret rc Return status code + */ + int ( * rx ) ( struct fc_els *els, void *data, size_t len ); + /** Detect ELS frame + * + * @v els Fibre Channel ELS transaction + * @v data ELS frame + * @v len Length of ELS frame + * @ret rc Return status code + */ + int ( * detect ) ( struct fc_els *els, const void *data, size_t len ); +}; + +/** Fibre Channel ELS handler table */ +#define FC_ELS_HANDLERS __table ( struct fc_els_handler, "fc_els_handlers" ) + +/** Declare a Fibre Channel ELS handler */ +#define __fc_els_handler __table_entry ( FC_ELS_HANDLERS, 01 ) + +/** A Fibre Channel ELS PRLI descriptor */ +struct fc_els_prli_descriptor { + /** Upper-layer protocol type */ + unsigned int type; + /** Service parameter length */ + size_t param_len; + /** Fibre Channel ELS handler */ + struct fc_els_handler *handler; +}; + +/** Fibre Channel ELS PRLI descriptor table */ +#define FC_ELS_PRLI_DESCRIPTORS \ + __table ( struct fc_els_prli_descriptor, "fc_els_prli_descriptors" ) + +/** Declare a Fibre Channel ELS PRLI descriptor */ +#define __fc_els_prli_descriptor __table_entry ( FC_ELS_PRLI_DESCRIPTORS, 01 ) + +/** + * Check if Fibre Channel ELS transaction is a request + * + * @v els Fibre Channel ELS transaction + * @ret is_request ELS transaction is a request + */ +static inline int fc_els_is_request ( struct fc_els *els ) { + return ( els->flags & FC_ELS_REQUEST ); +} + +/** + * Calculate ELS command to transmit + * + * @v els Fibre Channel ELS transaction + * @v request_command Command for requests + * @v command Command to transmit + */ +static inline unsigned int fc_els_tx_command ( struct fc_els *els, + unsigned int request_command ) { + return ( fc_els_is_request ( els ) ? request_command : FC_ELS_LS_ACC ); +} + +extern int fc_els_tx ( struct fc_els *els, const void *data, size_t len ); +extern int fc_els_request ( struct interface *job, struct fc_port *port, + struct fc_port_id *peer_port_id, + struct fc_els_handler *handler ); +extern int fc_els_flogi ( struct interface *parent, struct fc_port *port ); +extern int fc_els_plogi ( struct interface *parent, struct fc_port *port, + struct fc_port_id *peer_port_id ); +extern int fc_els_logo ( struct interface *parent, struct fc_port *port, + struct fc_port_id *peer_port_id ); +extern int fc_els_prli ( struct interface *parent, struct fc_port *port, + struct fc_port_id *peer_port_id, unsigned int type ); +extern int fc_els_prli_tx ( struct fc_els *els, + struct fc_els_prli_descriptor *descriptor, + void *param ); +extern int fc_els_prli_rx ( struct fc_els *els, + struct fc_els_prli_descriptor *descriptor, + void *data, size_t len ); +extern int fc_els_prli_detect ( struct fc_els *els __unused, + struct fc_els_prli_descriptor *descriptor, + const void *data, size_t len ); + +#endif /* _IPXE_FCELS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fcns.h b/qemu/roms/ipxe/src/include/ipxe/fcns.h new file mode 100644 index 000000000..e25d9b9d5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fcns.h @@ -0,0 +1,217 @@ +#ifndef _IPXE_FCNS_H +#define _IPXE_FCNS_H + +/** + * @file + * + * Fibre Channel name server lookups + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/fc.h> + +/** A Fibre Channel Common Transport header */ +struct fc_ct_header { + /** Revision */ + uint8_t revision; + /** Original requestor ID */ + struct fc_port_id in_id; + /** Generic service type */ + uint8_t type; + /** Generic service subtype */ + uint8_t subtype; + /** Options */ + uint8_t options; + /** Reserved */ + uint8_t reserved; + /** Command/response code */ + uint16_t code; + /** Maximum/residual size */ + uint16_t size; + /** Fragment ID */ + uint8_t fragment; + /** Reason code */ + uint8_t reason; + /** Reason code explanation */ + uint8_t explanation; + /** Vendor specific */ + uint8_t vendor; +} __attribute__ (( packed )); + +/** Fibre Channel Common Transport revision */ +#define FC_CT_REVISION 1 + +/** Fibre Channel generic service type */ +enum fc_gs_type { + /** Directory service */ + FC_GS_TYPE_DS = 0xfc, +}; + +/** Fibre Channel generic service response codes */ +enum fc_gs_response_code { + /** Accepted */ + FC_GS_ACCEPT = 0x8002, + /** Rejected */ + FC_GS_REJECT = 0x8001, +}; + +/** Fibre Channel generic service rejection reason codes */ +enum fc_gs_reason_code { + /** Invalid command code */ + FC_GS_BAD_COMMAND = 0x01, + /** Invalid version level */ + FC_GS_BAD_VERSION = 0x02, + /** Logical error */ + FC_GS_ERROR = 0x03, + /** Invalid CT_IU size */ + FC_GS_BAD_SIZE = 0x04, + /** Logical busy */ + FC_GS_BUSY = 0x05, + /** Protocol error */ + FC_GS_EPROTO = 0x07, + /** Unable to perform command request */ + FC_GS_UNABLE = 0x09, + /** Command not supported */ + FC_GS_ENOTSUP = 0x0b, + /** Server not available */ + FC_GS_UNAVAILABLE = 0x0d, + /** Session could not be established */ + FC_GS_SESSION = 0x0e, +}; + +/** Fibre Channel directory service subtype */ +enum fc_ds_subtype { + /** Name server */ + FC_DS_SUBTYPE_NAME = 0x02, +}; + +/** Fibre Channel name server commands */ +enum fc_ns_command_nibble { + /** Get */ + FC_NS_GET = 0x1, + /** Register */ + FC_NS_REGISTER = 0x2, + /** De-register */ + FC_NS_DEREGISTER = 0x3, +}; + +/** Fibre Channel name server objects */ +enum fc_ns_object_nibble { + /** Port ID */ + FC_NS_PORT_ID = 0x1, + /** Port name */ + FC_NS_PORT_NAME = 0x2, + /** Node name */ + FC_NS_NODE_NAME = 0x3, + /** FC-4 types */ + FC_NS_FC4_TYPES = 0x7, + /** Symbolic port name */ + FC_NS_SYM_PORT_NAME = 0x8, + /** Symbolic node name */ + FC_NS_SYM_NODE_NAME = 0x9, + /** FC-4 features */ + FC_NS_FC4_FEATURES = 0xf, +}; + +/** Construct Fibre Channel name server command code + * + * @v command Name server command + * @v key Name server key + * @v value Name server value + * @ret code Name server command code + */ +#define FC_NS_CODE( command, key, value ) \ + ( ( (command) << 8 ) | ( (key) << 4 ) | ( (value) << 0 ) ) + +/** Construct Fibre Channel name server "get" command code + * + * @v key Name server key + * @v value Name server value to get + * @ret code Name server command code + */ +#define FC_NS_GET( key, value ) FC_NS_CODE ( FC_NS_GET, key, value ) + +/** Construct Fibre Channel name server "register" command code + * + * @v key Name server key + * @v value Name server value to register + * @ret code Name server command code + */ +#define FC_NS_REGISTER( key, value ) FC_NS_CODE ( FC_NS_REGISTER, key, value ) + +/** Extract Fibre Channel name server command + * + * @v code Name server command code + * @ret command Name server command + */ +#define FC_NS_COMMAND( code ) ( ( (code) >> 8 ) & 0xf ) + +/** Extract Fibre Channel name server key + * + * @v code Name server command code + * @ret key Name server key + */ +#define FC_NS_KEY( code ) ( ( (code) >> 4 ) & 0xf ) + +/** Extract Fibre Channel name server value + * + * @v code Name server command code + * @ret value NAme server value + */ +#define FC_NS_VALUE( code ) ( ( (code) >> 0 ) & 0xf ) + +/** A Fibre Channel name server port ID */ +struct fc_ns_port_id { + /** Reserved */ + uint8_t reserved; + /** Port ID */ + struct fc_port_id port_id; +} __attribute__ (( packed )); + +/** A Fibre Channel name server GID_PN request */ +struct fc_ns_gid_pn_request { + /** Common Transport header */ + struct fc_ct_header ct; + /** Port name */ + struct fc_name port_wwn; +} __attribute__ (( packed )); + +/** A Fibre Channel name server request */ +union fc_ns_request { + /** Get ID by port name */ + struct fc_ns_gid_pn_request gid_pn; +}; + +/** A Fibre Channel name server rejection response */ +struct fc_ns_reject_response { + /** Common Transport header */ + struct fc_ct_header ct; +} __attribute__ (( packed )); + +/** A Fibre Channel name server GID_PN response */ +struct fc_ns_gid_pn_response { + /** Common Transport header */ + struct fc_ct_header ct; + /** Port ID */ + struct fc_ns_port_id port_id; +} __attribute__ (( packed )); + +/** A Fibre Channel name server response */ +union fc_ns_response { + /** Common Transport header */ + struct fc_ct_header ct; + /** Rejection */ + struct fc_ns_reject_response reject; + /** Get ID by port name */ + struct fc_ns_gid_pn_response gid_pn; +}; + +extern int fc_ns_query ( struct fc_peer *peer, struct fc_port *port, + int ( * done ) ( struct fc_peer *peer, + struct fc_port *port, + struct fc_port_id *peer_port_id ) ); + +#endif /* _IPXE_FCNS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fcoe.h b/qemu/roms/ipxe/src/include/ipxe/fcoe.h new file mode 100644 index 000000000..6ba5b406a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fcoe.h @@ -0,0 +1,92 @@ +#ifndef _IPXE_FCOE_H +#define _IPXE_FCOE_H + +/** + * @file + * + * Fibre Channel over Ethernet + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/fc.h> +#include <ipxe/if_ether.h> + +/** An FCoE name */ +union fcoe_name { + /** Fibre Channel name */ + struct fc_name fc; + /** FCoE name */ + struct { + /** Naming authority */ + uint16_t authority; + /** MAC address */ + uint8_t mac[ETH_ALEN]; + } __attribute__ (( packed )) fcoe; +}; + +/** IEEE 48-bit address */ +#define FCOE_AUTHORITY_IEEE 0x1000 + +/** IEEE extended */ +#define FCOE_AUTHORITY_IEEE_EXTENDED 0x2000 + +/** An FCoE MAC address prefix (FC-MAP) */ +struct fcoe_map { + uint8_t bytes[3]; +} __attribute__ (( packed )); + +/** An FCoE (fabric-assigned) MAC address */ +struct fcoe_mac { + /** MAC address prefix */ + struct fcoe_map map; + /** Port ID */ + struct fc_port_id port_id; +} __attribute__ (( packed )); + +/** An FCoE header */ +struct fcoe_header { + /** FCoE frame version */ + uint8_t version; + /** Reserved */ + uint8_t reserved[12]; + /** Start of Frame marker */ + uint8_t sof; +} __attribute__ (( packed )); + +/** FCoE frame version */ +#define FCOE_FRAME_VER 0x00 + +/** Start of Frame marker values */ +enum fcoe_sof { + FCOE_SOF_F = 0x28, /**< Start of Frame Class F */ + FCOE_SOF_I2 = 0x2d, /**< Start of Frame Initiate Class 2 */ + FCOE_SOF_N2 = 0x35, /**< Start of Frame Normal Class 2 */ + FCOE_SOF_I3 = 0x2e, /**< Start of Frame Initiate Class 3 */ + FCOE_SOF_N3 = 0x36, /**< Start of Frame Normal Class 3 */ +}; + +/** An FCoE footer */ +struct fcoe_footer { + /** CRC */ + uint32_t crc; + /** End of frame marker */ + uint8_t eof; + /** Reserved */ + uint8_t reserved[3]; +} __attribute__ (( packed )); + +/** End of Frame marker value */ +enum fcoe_eof { + FCOE_EOF_N = 0x41, /**< End of Frame Normal */ + FCOE_EOF_T = 0x42, /**< End of Frame Terminate */ + FCOE_EOF_NI = 0x49, /**< End of Frame Invalid */ + FCOE_EOF_A = 0x50, /**< End of Frame Abort */ +}; + +/** FCoE VLAN priority */ +#define FCOE_VLAN_PRIORITY 3 + +#endif /* _IPXE_FCOE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fcp.h b/qemu/roms/ipxe/src/include/ipxe/fcp.h new file mode 100644 index 000000000..f6922bc7c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fcp.h @@ -0,0 +1,166 @@ +#ifndef _IPXE_FCP_H +#define _IPXE_FCP_H + +/** + * @file + * + * Fibre Channel Protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/fc.h> +#include <ipxe/fcels.h> +#include <ipxe/scsi.h> + +/** An FCP command IU */ +struct fcp_cmnd { + /** SCSI LUN */ + struct scsi_lun lun; + /** Command reference number */ + uint8_t ref; + /** Priority and task attributes */ + uint8_t priority; + /** Task management flags */ + uint8_t flags; + /** Direction */ + uint8_t dirn; + /** SCSI CDB */ + union scsi_cdb cdb; + /** Data length */ + uint32_t len; +} __attribute__ (( packed )); + +/** Command includes data-out */ +#define FCP_CMND_WRDATA 0x01 + +/** Command includes data-in */ +#define FCP_CMND_RDDATA 0x02 + +/** FCP tag magic marker */ +#define FCP_TAG_MAGIC 0x18ae0000 + +/** An FCP transfer ready IU */ +struct fcp_xfer_rdy { + /** Relative offset of data */ + uint32_t offset; + /** Burst length */ + uint32_t len; + /** Reserved */ + uint32_t reserved; +} __attribute__ (( packed )); + +/** An FCP response IU */ +struct fcp_rsp { + /** Reserved */ + uint8_t reserved[8]; + /** Retry delay timer */ + uint16_t retry_delay; + /** Flags */ + uint8_t flags; + /** SCSI status code */ + uint8_t status; + /** Residual data count */ + uint32_t residual; + /** Sense data length */ + uint32_t sense_len; + /** Response data length */ + uint32_t response_len; +} __attribute__ (( packed )); + +/** Response length field is valid */ +#define FCP_RSP_RESPONSE_LEN_VALID 0x01 + +/** Sense length field is valid */ +#define FCP_RSP_SENSE_LEN_VALID 0x02 + +/** Residual represents overrun */ +#define FCP_RSP_RESIDUAL_OVERRUN 0x04 + +/** Residual represents underrun */ +#define FCP_RSP_RESIDUAL_UNDERRUN 0x08 + +/** + * Get response data portion of FCP response + * + * @v rsp FCP response + * @ret response_data Response data, or NULL if not present + */ +static inline void * fcp_rsp_response_data ( struct fcp_rsp *rsp ) { + return ( ( rsp->flags & FCP_RSP_RESPONSE_LEN_VALID ) ? + ( ( ( void * ) rsp ) + sizeof ( *rsp ) ) : NULL ); +} + +/** + * Get length of response data portion of FCP response + * + * @v rsp FCP response + * @ret response_data_len Response data length + */ +static inline size_t fcp_rsp_response_data_len ( struct fcp_rsp *rsp ) { + return ( ( rsp->flags & FCP_RSP_RESPONSE_LEN_VALID ) ? + ntohl ( rsp->response_len ) : 0 ); +} + +/** + * Get sense data portion of FCP response + * + * @v rsp FCP response + * @ret sense_data Sense data, or NULL if not present + */ +static inline void * fcp_rsp_sense_data ( struct fcp_rsp *rsp ) { + return ( ( rsp->flags & FCP_RSP_SENSE_LEN_VALID ) ? + ( ( ( void * ) rsp ) + sizeof ( *rsp ) + + fcp_rsp_response_data_len ( rsp ) ) : NULL ); +} + +/** + * Get length of sense data portion of FCP response + * + * @v rsp FCP response + * @ret sense_data_len Sense data length + */ +static inline size_t fcp_rsp_sense_data_len ( struct fcp_rsp *rsp ) { + return ( ( rsp->flags & FCP_RSP_SENSE_LEN_VALID ) ? + ntohl ( rsp->sense_len ) : 0 ); +} + +/** An FCP PRLI service parameter page */ +struct fcp_prli_service_parameters { + /** Flags */ + uint32_t flags; +} __attribute__ (( packed )); + +/** Write FCP_XFER_RDY disabled */ +#define FCP_PRLI_NO_WRITE_RDY 0x0001 + +/** Read FCP_XFER_RDY disabled */ +#define FCP_PRLI_NO_READ_RDY 0x0002 + +/** Has target functionality */ +#define FCP_PRLI_TARGET 0x0010 + +/** Has initiator functionality */ +#define FCP_PRLI_INITIATOR 0x0020 + +/** Data overlay allowed */ +#define FCP_PRLI_OVERLAY 0x0040 + +/** Confirm completion allowed */ +#define FCP_PRLI_CONF 0x0080 + +/** Retransmission supported */ +#define FCP_PRLI_RETRY 0x0100 + +/** Task retry identification */ +#define FCP_PRLI_TASK_RETRY 0x0200 + +/** REC ELS supported */ +#define FCP_PRLI_REC 0x0400 + +/** Enhanced discovery supported */ +#define FCP_PRLI_ENH_DISC 0x0800 + +#endif /* _IPXE_FCP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/features.h b/qemu/roms/ipxe/src/include/ipxe/features.h new file mode 100644 index 000000000..d8b8b2184 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/features.h @@ -0,0 +1,108 @@ +#ifndef _IPXE_FEATURES_H +#define _IPXE_FEATURES_H + +#include <stdint.h> +#include <ipxe/tables.h> +#include <ipxe/dhcp.h> + +/** @file + * + * Feature list + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * @defgroup featurecat Feature categories + * @{ + */ + +#define FEATURE_PROTOCOL 01 /**< Network protocols */ +#define FEATURE_IMAGE 02 /**< Image formats */ +#define FEATURE_MISC 03 /**< Miscellaneous */ + +/** @} */ + +/** + * @defgroup dhcpfeatures DHCP feature option tags + * + * DHCP feature option tags are Etherboot encapsulated options in the + * range 0x10-0x7f. + * + * @{ + */ + +#define DHCP_EB_FEATURE_PXE_EXT 0x10 /**< PXE API extensions */ +#define DHCP_EB_FEATURE_ISCSI 0x11 /**< iSCSI protocol */ +#define DHCP_EB_FEATURE_AOE 0x12 /**< AoE protocol */ +#define DHCP_EB_FEATURE_HTTP 0x13 /**< HTTP protocol */ +#define DHCP_EB_FEATURE_HTTPS 0x14 /**< HTTPS protocol */ +#define DHCP_EB_FEATURE_TFTP 0x15 /**< TFTP protocol */ +#define DHCP_EB_FEATURE_FTP 0x16 /**< FTP protocol */ +#define DHCP_EB_FEATURE_DNS 0x17 /**< DNS protocol */ +#define DHCP_EB_FEATURE_BZIMAGE 0x18 /**< bzImage format */ +#define DHCP_EB_FEATURE_MULTIBOOT 0x19 /**< Multiboot format */ +#define DHCP_EB_FEATURE_SLAM 0x1a /**< SLAM protocol */ +#define DHCP_EB_FEATURE_SRP 0x1b /**< SRP protocol */ +#define DHCP_EB_FEATURE_NBI 0x20 /**< NBI format */ +#define DHCP_EB_FEATURE_PXE 0x21 /**< PXE format */ +#define DHCP_EB_FEATURE_ELF 0x22 /**< ELF format */ +#define DHCP_EB_FEATURE_COMBOOT 0x23 /**< COMBOOT format */ +#define DHCP_EB_FEATURE_EFI 0x24 /**< EFI format */ +#define DHCP_EB_FEATURE_FCOE 0x25 /**< FCoE protocol */ +#define DHCP_EB_FEATURE_VLAN 0x26 /**< VLAN support */ +#define DHCP_EB_FEATURE_MENU 0x27 /**< Menu support */ +#define DHCP_EB_FEATURE_SDI 0x28 /**< SDI image support */ +#define DHCP_EB_FEATURE_NFS 0x29 /**< NFS protocol */ + +/** @} */ + +/** DHCP feature table */ +#define DHCP_FEATURES __table ( uint8_t, "dhcp_features" ) + +/** Declare a feature code for DHCP */ +#define __dhcp_feature __table_entry ( DHCP_FEATURES, 01 ) + +/** Construct a DHCP feature table entry */ +#define DHCP_FEATURE( feature_opt, ... ) \ + _DHCP_FEATURE ( OBJECT, feature_opt, __VA_ARGS__ ) +#define _DHCP_FEATURE( _name, feature_opt, ... ) \ + __DHCP_FEATURE ( _name, feature_opt, __VA_ARGS__ ) +#define __DHCP_FEATURE( _name, feature_opt, ... ) \ + uint8_t __dhcp_feature_ ## _name [] __dhcp_feature = { \ + feature_opt, DHCP_OPTION ( __VA_ARGS__ ) \ + }; + +/** A named feature */ +struct feature { + /** Feature name */ + char *name; +}; + +/** Named feature table */ +#define FEATURES __table ( struct feature, "features" ) + +/** Declare a named feature */ +#define __feature_name( category ) __table_entry ( FEATURES, category ) + +/** Construct a named feature */ +#define FEATURE_NAME( category, text ) \ + _FEATURE_NAME ( category, OBJECT, text ) +#define _FEATURE_NAME( category, _name, text ) \ + __FEATURE_NAME ( category, _name, text ) +#define __FEATURE_NAME( category, _name, text ) \ + struct feature __feature_ ## _name __feature_name ( category ) = { \ + .name = text, \ + }; + +/** Declare a feature */ +#define FEATURE( category, text, feature_opt, version ) \ + FEATURE_NAME ( category, text ); \ + DHCP_FEATURE ( feature_opt, version ); + +/** Declare the version number feature */ +#define FEATURE_VERSION( ... ) \ + DHCP_FEATURE ( DHCP_ENCAPSULATED ( DHCP_EB_VERSION ), __VA_ARGS__ ) + +#endif /* _IPXE_FEATURES_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fip.h b/qemu/roms/ipxe/src/include/ipxe/fip.h new file mode 100644 index 000000000..872923375 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fip.h @@ -0,0 +1,451 @@ +#ifndef _IPXE_FIP_H +#define _IPXE_FIP_H + +/* + * Copyright (C) 2010 Michael Brown <mbrown@fensystems.co.uk>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#include <stdint.h> +#include <ipxe/fc.h> +#include <ipxe/fcels.h> +#include <ipxe/fcoe.h> + +/** A FIP frame header */ +struct fip_header { + /** Frame version */ + uint8_t version; + /** Reserved */ + uint8_t reserved_a; + /** Protocol code */ + uint16_t code; + /** Reserved */ + uint8_t reserved_b; + /** Subcode */ + uint8_t subcode; + /** Descriptor list length in 32-bit words */ + uint16_t len; + /** Flags */ + uint16_t flags; +} __attribute__ (( packed )); + +/** FIP frame version */ +#define FIP_VERSION 0x10 + +/** FIP protocol code */ +enum fip_code { + FIP_CODE_DISCOVERY = 0x0001, /**< Discovery */ + FIP_CODE_ELS = 0x0002, /**< Extended link services */ + FIP_CODE_MAINTAIN = 0x0003, /**< Maintain virtual links */ + FIP_CODE_VLAN = 0x0004, /**< VLAN */ +}; + +/** FIP protocol subcode for discovery */ +enum fip_discovery_subcode { + FIP_DISCOVERY_SOLICIT = 0x01, /**< Discovery solicitation */ + FIP_DISCOVERY_ADVERTISE = 0x02, /**< Discovery advertisement */ +}; + +/** FIP protocol subcode for extended link services */ +enum fip_els_subcode { + FIP_ELS_REQUEST = 0x01, /**< ELS request */ + FIP_ELS_RESPONSE = 0x02, /**< ELS response */ +}; + +/** FIP protocol subcode for keep alive / clear links */ +enum fip_vitality_subcode { + FIP_MAINTAIN_KEEP_ALIVE = 0x01, /**< Keep alive */ + FIP_MAINTAIN_CLEAR_LINKS = 0x02,/**< Clear virtual links */ +}; + +/** FIP protocol subcode for VLAN */ +enum fip_vlan_subcode { + FIP_VLAN_REQUEST = 0x01, /**< VLAN request */ + FIP_VLAN_NOTIFY = 0x02, /**< VLAN notification */ +}; + +/** FIP flags */ +enum fip_flags { + FIP_FP = 0x8000, /**< Fabric-provided MAC address */ + FIP_SP = 0x4000, /**< Server-provided MAC address */ + FIP_A = 0x0004, /**< Available for login */ + FIP_S = 0x0002, /**< Solicited */ + FIP_F = 0x0001, /**< Forwarder */ +}; + +/** FIP descriptor common fields */ +struct fip_common { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; +} __attribute__ (( packed )); + +/** FIP descriptor types */ +enum fip_type { + FIP_RESERVED = 0x00, /**< Reserved */ + FIP_PRIORITY = 0x01, /**< Priority */ + FIP_MAC_ADDRESS = 0x02, /**< MAC address */ + FIP_FC_MAP = 0x03, /**< FC-MAP */ + FIP_NAME_ID = 0x04, /**< Name identifier */ + FIP_FABRIC = 0x05, /**< Fabric */ + FIP_MAX_FCOE_SIZE = 0x06, /**< Max FCoE size */ + FIP_FLOGI = 0x07, /**< FLOGI */ + FIP_NPIV_FDISC = 0x08, /**< NPIV FDISC */ + FIP_LOGO = 0x09, /**< LOGO */ + FIP_ELP = 0x0a, /**< ELP */ + FIP_VX_PORT_ID = 0x0b, /**< Vx port identification */ + FIP_FKA_ADV_P = 0x0c, /**< FKA ADV period */ + FIP_VENDOR_ID = 0x0d, /**< Vendor ID */ + FIP_VLAN = 0x0e, /**< VLAN */ + FIP_NUM_DESCRIPTOR_TYPES +}; + +/** FIP descriptor type is critical */ +#define FIP_IS_CRITICAL( type ) ( (type) <= 0x7f ) + +/** A FIP priority descriptor */ +struct fip_priority { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved; + /** Priority + * + * A higher value indicates a lower priority. + */ + uint8_t priority; +} __attribute__ (( packed )); + +/** Default FIP priority */ +#define FIP_DEFAULT_PRIORITY 128 + +/** Lowest FIP priority */ +#define FIP_LOWEST_PRIORITY 255 + +/** A FIP MAC address descriptor */ +struct fip_mac_address { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** MAC address */ + uint8_t mac[ETH_ALEN]; +} __attribute__ (( packed )); + +/** A FIP FC-MAP descriptor */ +struct fip_fc_map { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[3]; + /** FC-MAP */ + struct fcoe_map map; +} __attribute__ (( packed )); + +/** A FIP name identifier descriptor */ +struct fip_name_id { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Name identifier */ + struct fc_name name; +} __attribute__ (( packed )); + +/** A FIP fabric descriptor */ +struct fip_fabric { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Virtual Fabric ID, if any */ + uint16_t vf_id; + /** Reserved */ + uint8_t reserved; + /** FC-MAP */ + struct fcoe_map map; + /** Fabric name */ + struct fc_name name; +} __attribute__ (( packed )); + +/** A FIP max FCoE size descriptor */ +struct fip_max_fcoe_size { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Maximum FCoE size */ + uint16_t mtu; +} __attribute__ (( packed )); + +/** A FIP descriptor containing an encapsulated ELS frame */ +struct fip_els { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Fibre Channel frame header */ + struct fc_frame_header fc; + /** ELS frame */ + struct fc_els_frame_common els; +} __attribute__ (( packed )); + +/** A FIP descriptor containing an encapsulated login frame */ +struct fip_login { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Fibre Channel frame header */ + struct fc_frame_header fc; + /** ELS frame */ + struct fc_login_frame els; +} __attribute__ (( packed )); + +/** A FIP descriptor containing an encapsulated LOGO request frame */ +struct fip_logo_request { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Fibre Channel frame header */ + struct fc_frame_header fc; + /** ELS frame */ + struct fc_logout_request_frame els; +} __attribute__ (( packed )); + +/** A FIP descriptor containing an encapsulated LOGO response frame */ +struct fip_logo_response { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Fibre Channel frame header */ + struct fc_frame_header fc; + /** ELS frame */ + struct fc_logout_response_frame els; +} __attribute__ (( packed )); + +/** A FIP descriptor containing an encapsulated ELP frame */ +struct fip_elp { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Fibre Channel frame header */ + struct fc_frame_header fc; + /** ELS frame */ + struct fc_els_frame_common els; + /** Uninteresting content */ + uint32_t dull[25]; +} __attribute__ (( packed )); + +/** A FIP descriptor containing an encapsulated LS_RJT frame */ +struct fip_ls_rjt { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Fibre Channel frame header */ + struct fc_frame_header fc; + /** ELS frame */ + struct fc_ls_rjt_frame els; +} __attribute__ (( packed )); + +/** A FIP Vx port identification descriptor */ +struct fip_vx_port_id { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** MAC address */ + uint8_t mac[ETH_ALEN]; + /** Reserved */ + uint8_t reserved; + /** Address identifier */ + struct fc_port_id id; + /** Port name */ + struct fc_name name; +} __attribute__ (( packed )); + +/** A FIP FKA ADV period descriptor */ +struct fip_fka_adv_p { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved; + /** Flags */ + uint8_t flags; + /** Keep alive advertisement period in milliseconds */ + uint32_t period; +} __attribute__ (( packed )); + +/** FIP FKA ADV period flags */ +enum fip_fka_adv_p_flags { + FIP_NO_KEEPALIVE = 0x01, /**< Do not send keepalives */ +}; + +/** A FIP vendor ID descriptor */ +struct fip_vendor_id { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** Reserved */ + uint8_t reserved[2]; + /** Vendor ID */ + uint8_t vendor[8]; +} __attribute__ (( packed )); + +/** A FIP VLAN descriptor */ +struct fip_vlan { + /** Type */ + uint8_t type; + /** Length in 32-bit words */ + uint8_t len; + /** VLAN ID */ + uint16_t vlan; +} __attribute__ (( packed )); + +/** A FIP descriptor */ +union fip_descriptor { + /** Common fields */ + struct fip_common common; + /** Priority descriptor */ + struct fip_priority priority; + /** MAC address descriptor */ + struct fip_mac_address mac_address; + /** FC-MAP descriptor */ + struct fip_fc_map fc_map; + /** Name identifier descriptor */ + struct fip_name_id name_id; + /** Fabric descriptor */ + struct fip_fabric fabric; + /** Max FCoE size descriptor */ + struct fip_max_fcoe_size max_fcoe_size; + /** FLOGI descriptor */ + struct fip_els flogi; + /** FLOGI request descriptor */ + struct fip_login flogi_request; + /** FLOGI LS_ACC descriptor */ + struct fip_login flogi_ls_acc; + /** FLOGI LS_RJT descriptor */ + struct fip_ls_rjt flogi_ls_rjt; + /** NPIV FDISC descriptor */ + struct fip_els npiv_fdisc; + /** NPIV FDISC request descriptor */ + struct fip_login npiv_fdisc_request; + /** NPIV FDISC LS_ACC descriptor */ + struct fip_login npiv_fdisc_ls_acc; + /** NPIV FDISC LS_RJT descriptor */ + struct fip_ls_rjt npiv_fdisc_ls_rjt; + /** LOGO descriptor */ + struct fip_els logo; + /** LOGO request descriptor */ + struct fip_logo_request logo_request; + /** LOGO LS_ACC descriptor */ + struct fip_logo_response logo_ls_acc; + /** LOGO LS_RJT descriptor */ + struct fip_ls_rjt logo_ls_rjt; + /** ELS descriptor */ + struct fip_els elp; + /** ELP request descriptor */ + struct fip_elp elp_request; + /** ELP LS_ACC descriptor */ + struct fip_elp elp_ls_acc; + /** ELP LS_RJT descriptor */ + struct fip_ls_rjt elp_ls_rjt; + /** Vx port identification descriptor */ + struct fip_vx_port_id vx_port_id; + /** FKA ADV period descriptor */ + struct fip_fka_adv_p fka_adv_p; + /** Vendor ID descriptor */ + struct fip_vendor_id vendor_id; + /** VLAN descriptor */ + struct fip_vlan vlan; +} __attribute__ (( packed )); + +/** A FIP descriptor set */ +struct fip_descriptors { + /** Descriptors, indexed by type */ + union fip_descriptor *desc[FIP_NUM_DESCRIPTOR_TYPES]; +}; + +/** + * Define a function to extract a specific FIP descriptor type from a list + * + * @v type Descriptor type + * @v name Descriptor name + * @v finder Descriptor finder + */ +#define FIP_DESCRIPTOR( type, name ) \ + static inline __attribute__ (( always_inline )) \ + typeof ( ( ( union fip_descriptor * ) NULL )->name ) * \ + fip_ ## name ( struct fip_descriptors *descs ) { \ + return &(descs->desc[type]->name); \ + } +FIP_DESCRIPTOR ( FIP_PRIORITY, priority ); +FIP_DESCRIPTOR ( FIP_MAC_ADDRESS, mac_address ); +FIP_DESCRIPTOR ( FIP_FC_MAP, fc_map ); +FIP_DESCRIPTOR ( FIP_NAME_ID, name_id ); +FIP_DESCRIPTOR ( FIP_FABRIC, fabric ); +FIP_DESCRIPTOR ( FIP_MAX_FCOE_SIZE, max_fcoe_size ); +FIP_DESCRIPTOR ( FIP_FLOGI, flogi ); +FIP_DESCRIPTOR ( FIP_FLOGI, flogi_request ); +FIP_DESCRIPTOR ( FIP_FLOGI, flogi_ls_acc ); +FIP_DESCRIPTOR ( FIP_FLOGI, flogi_ls_rjt ); +FIP_DESCRIPTOR ( FIP_NPIV_FDISC, npiv_fdisc ); +FIP_DESCRIPTOR ( FIP_NPIV_FDISC, npiv_fdisc_request ); +FIP_DESCRIPTOR ( FIP_NPIV_FDISC, npiv_fdisc_ls_acc ); +FIP_DESCRIPTOR ( FIP_NPIV_FDISC, npiv_fdisc_ls_rjt ); +FIP_DESCRIPTOR ( FIP_LOGO, logo ); +FIP_DESCRIPTOR ( FIP_LOGO, logo_request ); +FIP_DESCRIPTOR ( FIP_LOGO, logo_ls_acc ); +FIP_DESCRIPTOR ( FIP_LOGO, logo_ls_rjt ); +FIP_DESCRIPTOR ( FIP_ELP, elp ); +FIP_DESCRIPTOR ( FIP_ELP, elp_request ); +FIP_DESCRIPTOR ( FIP_ELP, elp_ls_acc ); +FIP_DESCRIPTOR ( FIP_ELP, elp_ls_rjt ); +FIP_DESCRIPTOR ( FIP_VX_PORT_ID, vx_port_id ); +FIP_DESCRIPTOR ( FIP_FKA_ADV_P, fka_adv_p ); +FIP_DESCRIPTOR ( FIP_VENDOR_ID, vendor_id ); +FIP_DESCRIPTOR ( FIP_VLAN, vlan ); + +#endif /* _IPXE_FIP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/fragment.h b/qemu/roms/ipxe/src/include/ipxe/fragment.h new file mode 100644 index 000000000..e311ad1e4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/fragment.h @@ -0,0 +1,72 @@ +#ifndef _IPXE_FRAGMENT_H +#define _IPXE_FRAGMENT_H + +/** @file + * + * Fragment reassembly + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/list.h> +#include <ipxe/iobuf.h> +#include <ipxe/retry.h> + +/** Fragment reassembly timeout */ +#define FRAGMENT_TIMEOUT ( TICKS_PER_SEC / 2 ) + +/** A fragment reassembly buffer */ +struct fragment { + /* List of fragment reassembly buffers */ + struct list_head list; + /** Reassembled packet */ + struct io_buffer *iobuf; + /** Length of non-fragmentable portion of reassembled packet */ + size_t hdrlen; + /** Reassembly timer */ + struct retry_timer timer; + /** Fragment reassembler */ + struct fragment_reassembler *fragments; +}; + +/** A fragment reassembler */ +struct fragment_reassembler { + /** List of fragment reassembly buffers */ + struct list_head list; + /** + * Check if fragment matches fragment reassembly buffer + * + * @v fragment Fragment reassembly buffer + * @v iobuf I/O buffer + * @v hdrlen Length of non-fragmentable potion of I/O buffer + * @ret is_fragment Fragment matches this reassembly buffer + */ + int ( * is_fragment ) ( struct fragment *fragment, + struct io_buffer *iobuf, size_t hdrlen ); + /** + * Get fragment offset + * + * @v iobuf I/O buffer + * @v hdrlen Length of non-fragmentable potion of I/O buffer + * @ret offset Offset + */ + size_t ( * fragment_offset ) ( struct io_buffer *iobuf, size_t hdrlen ); + /** + * Check if more fragments exist + * + * @v iobuf I/O buffer + * @v hdrlen Length of non-fragmentable potion of I/O buffer + * @ret more_frags More fragments exist + */ + int ( * more_fragments ) ( struct io_buffer *iobuf, size_t hdrlen ); + /** Associated IP statistics */ + struct ip_statistics *stats; +}; + +extern struct io_buffer * +fragment_reassemble ( struct fragment_reassembler *fragments, + struct io_buffer *iobuf, size_t *hdrlen ); + +#endif /* _IPXE_FRAGMENT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ftp.h b/qemu/roms/ipxe/src/include/ipxe/ftp.h new file mode 100644 index 000000000..cbab12d2c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ftp.h @@ -0,0 +1,15 @@ +#ifndef _IPXE_FTP_H +#define _IPXE_FTP_H + +/** @file + * + * File transfer protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** FTP default port */ +#define FTP_PORT 21 + +#endif /* _IPXE_FTP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/gdbserial.h b/qemu/roms/ipxe/src/include/ipxe/gdbserial.h new file mode 100644 index 000000000..a3b56173c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/gdbserial.h @@ -0,0 +1,21 @@ +#ifndef _IPXE_GDBSERIAL_H +#define _IPXE_GDBSERIAL_H + +/** @file + * + * GDB remote debugging over serial + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct gdb_transport; + +/** + * Set up the serial transport + * + * @ret transport suitable for starting the GDB stub or NULL on error + */ +struct gdb_transport *gdbserial_configure ( void ); + +#endif /* _IPXE_GDBSERIAL_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/gdbstub.h b/qemu/roms/ipxe/src/include/ipxe/gdbstub.h new file mode 100644 index 000000000..319606747 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/gdbstub.h @@ -0,0 +1,77 @@ +#ifndef _IPXE_GDBSTUB_H +#define _IPXE_GDBSTUB_H + +/** @file + * + * GDB remote debugging + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/tables.h> +#include <gdbmach.h> + +/** + * A transport mechanism for the GDB protocol + * + */ +struct gdb_transport { + /** Transport name */ + const char *name; + /** + * Set up the transport given a list of arguments + * + * @v argc Number of arguments + * @v argv Argument list + * @ret Return status code + * + * Note that arguments start at argv[0]. + */ + int ( * init ) ( int argc, char **argv ); + /** + * Perform a blocking read + * + * @v buf Buffer + * @v len Size of buffer + * @ret Number of bytes read into buffer + */ + size_t ( * recv ) ( char *buf, size_t len ); + /** + * Write, may block + * + * @v buf Buffer + * @v len Size of buffer + */ + void ( * send ) ( const char *buf, size_t len ); +}; + +#define GDB_TRANSPORTS __table ( struct gdb_transport, "gdb_transports" ) + +#define __gdb_transport __table_entry ( GDB_TRANSPORTS, 01 ) + +/** + * Look up GDB transport by name + * + * @v name Name of transport + * @ret GDB transport or NULL + */ +extern struct gdb_transport *find_gdb_transport ( const char *name ); + +/** + * Break into the debugger using the given transport + * + * @v trans GDB transport + */ +extern void gdbstub_start ( struct gdb_transport *trans ); + +/** + * Interrupt handler + * + * @signo POSIX signal number + * @regs CPU register snapshot + **/ +extern void gdbstub_handler ( int signo, gdbreg_t *regs ); + +#endif /* _IPXE_GDBSTUB_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/gdbudp.h b/qemu/roms/ipxe/src/include/ipxe/gdbudp.h new file mode 100644 index 000000000..db7a451c9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/gdbudp.h @@ -0,0 +1,24 @@ +#ifndef _IPXE_GDBUDP_H +#define _IPXE_GDBUDP_H + +/** @file + * + * GDB remote debugging over UDP + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct sockaddr_in; +struct gdb_transport; + +/** + * Set up the UDP transport with network address + * + * @name network device name + * @addr IP address and UDP listen port, may be NULL and fields may be zero + * @ret transport suitable for starting the GDB stub or NULL on error + */ +struct gdb_transport *gdbudp_configure ( const char *name, struct sockaddr_in *addr ); + +#endif /* _IPXE_GDBUDP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/hash_df.h b/qemu/roms/ipxe/src/include/ipxe/hash_df.h new file mode 100644 index 000000000..607a4a610 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/hash_df.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_HASH_DF_H +#define _IPXE_HASH_DF_H + +/** @file + * + * Hash-based derivation function (Hash_df) + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/crypto.h> + +extern void hash_df ( struct digest_algorithm *hash, const void *input, + size_t input_len, void *output, size_t output_len ); + +#endif /* _IPXE_HASH_DF_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/hidemem.h b/qemu/roms/ipxe/src/include/ipxe/hidemem.h new file mode 100644 index 000000000..ddc9cd8b3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/hidemem.h @@ -0,0 +1,17 @@ +#ifndef _IPXE_HIDEMEM_H +#define _IPXE_HIDEMEM_H + +/** + * @file + * + * Hidden memory regions + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +extern void hide_umalloc ( physaddr_t start, physaddr_t end ); + +#endif /* _IPXE_HIDEMEM_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/hmac.h b/qemu/roms/ipxe/src/include/ipxe/hmac.h new file mode 100644 index 000000000..d5ec0868d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/hmac.h @@ -0,0 +1,32 @@ +#ifndef _IPXE_HMAC_H +#define _IPXE_HMAC_H + +/** @file + * + * Keyed-Hashing for Message Authentication + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/crypto.h> + +/** + * Update HMAC + * + * @v digest Digest algorithm to use + * @v digest_ctx Digest context + * @v data Data + * @v len Length of data + */ +static inline void hmac_update ( struct digest_algorithm *digest, + void *digest_ctx, const void *data, + size_t len ) { + digest_update ( digest, digest_ctx, data, len ); +} + +extern void hmac_init ( struct digest_algorithm *digest, void *digest_ctx, + void *key, size_t *key_len ); +extern void hmac_final ( struct digest_algorithm *digest, void *digest_ctx, + void *key, size_t *key_len, void *hmac ); + +#endif /* _IPXE_HMAC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/hmac_drbg.h b/qemu/roms/ipxe/src/include/ipxe/hmac_drbg.h new file mode 100644 index 000000000..8dfd2924f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/hmac_drbg.h @@ -0,0 +1,253 @@ +#ifndef _IPXE_HMAC_DRBG_H +#define _IPXE_HMAC_DRBG_H + +/** @file + * + * HMAC_DRBG algorithm + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/crypto.h> + +/** Declare an HMAC_DRBG algorithm + * + * @v hash Underlying hash algorithm + * @v max_security_strength Maxmimum security strength + * @v out_len_bits Output block length, in bits + * @ret hmac_drbg HMAC_DRBG algorithm + */ +#define HMAC_DRBG( hash, max_security_strength, out_len_bits ) \ + ( hash, max_security_strength, out_len_bits ) + +/** HMAC_DRBG using SHA-1 + * + * The maximum security strength of HMAC_DRBG using SHA-1 is 128 bits + * according to the list of maximum security strengths documented in + * NIST SP 800-57 Part 1 Section 5.6.1 Table 3. + * + * The output block length of HMAC_DRBG using SHA-1 is 160 bits + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP + * 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_SHA1 HMAC_DRBG ( &sha1_algorithm, 128, 160 ) + +/** HMAC_DRBG using SHA-224 + * + * The maximum security strength of HMAC_DRBG using SHA-224 is 192 + * bits according to the list of maximum security strengths documented + * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3. + * + * The output block length of HMAC_DRBG using SHA-224 is 224 bits + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP + * 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_SHA224 HMAC_DRBG ( &sha224_algorithm, 192, 224 ) + +/** HMAC_DRBG using SHA-256 + * + * The maximum security strength of HMAC_DRBG using SHA-256 is 256 + * bits according to the list of maximum security strengths documented + * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3. + * + * The output block length of HMAC_DRBG using SHA-256 is 256 bits + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP + * 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_SHA256 HMAC_DRBG ( &sha256_algorithm, 256, 256 ) + +/** HMAC_DRBG using SHA-384 + * + * The maximum security strength of HMAC_DRBG using SHA-384 is 256 + * bits according to the list of maximum security strengths documented + * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3. + * + * The output block length of HMAC_DRBG using SHA-384 is 384 bits + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP + * 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_SHA384 HMAC_DRBG ( &sha384_algorithm, 256, 384 ) + +/** HMAC_DRBG using SHA-512 + * + * The maximum security strength of HMAC_DRBG using SHA-512 is 256 + * bits according to the list of maximum security strengths documented + * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3. + * + * The output block length of HMAC_DRBG using SHA-512 is 512 bits + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP + * 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_SHA512 HMAC_DRBG ( &sha512_algorithm, 256, 512 ) + +/** Underlying hash algorithm + * + * @v hmac_drbg HMAC_DRBG algorithm + * @ret hash Underlying hash algorithm + */ +#define HMAC_DRBG_HASH( hmac_drbg ) \ + HMAC_DRBG_EXTRACT_HASH hmac_drbg +#define HMAC_DRBG_EXTRACT_HASH( hash, max_security_strength, out_len_bits ) \ + hash + +/** Maximum security strength + * + * @v hmac_drbg HMAC_DRBG algorithm + * @ret max_security_strength Maxmimum security strength + */ +#define HMAC_DRBG_MAX_SECURITY_STRENGTH( hmac_drbg ) \ + HMAC_DRBG_EXTRACT_MAX_SECURITY_STRENGTH hmac_drbg +#define HMAC_DRBG_EXTRACT_MAX_SECURITY_STRENGTH( hash, max_security_strength, \ + out_len_bits ) \ + max_security_strength + +/** Output block length, in bits + * + * @v hmac_drbg HMAC_DRBG algorithm + * @ret out_len_bits Output block length, in bits + */ +#define HMAC_DRBG_OUTLEN_BITS( hmac_drbg ) \ + HMAC_DRBG_EXTRACT_OUTLEN_BITS hmac_drbg +#define HMAC_DRBG_EXTRACT_OUTLEN_BITS( hash, max_security_strength, \ + out_len_bits ) \ + out_len_bits + +/** Output block length, in bytes + * + * @v hmac_drbg HMAC_DRBG algorithm + * @ret out_len_bytes Output block length, in bytes + */ +#define HMAC_DRBG_OUTLEN_BYTES( hmac_drbg ) \ + ( HMAC_DRBG_OUTLEN_BITS ( hmac_drbg ) / 8 ) + +/** Maximum output block length, in bytes + * + * The maximum output block length for HMAC_DRBG is 512 bits for + * SHA-512 according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 + * (NIST SP 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_MAX_OUTLEN_BYTES HMAC_DRBG_OUTLEN_BYTES ( HMAC_DRBG_SHA512 ) + +/** Required minimum entropy for instantiate and reseed + * + * @v security_strength Security strength + * @ret min_entropy Required minimum entropy + * + * The minimum required entropy for HMAC_DRBG is equal to the security + * strength according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 + * (NIST SP 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_MIN_ENTROPY( security_strength ) (security_strength) + +/** Minimum entropy input length + * + * @v security_strength Security strength + * @ret min_entropy_len_bytes Required minimum entropy length (in bytes) + * + * The minimum entropy input length for HMAC_DRBG is equal to the + * security strength according to ANS X9.82 Part 3-2007 Section 10.2.1 + * Table 2 (NIST SP 800-90 Section 10.1 Table 2). + */ +#define HMAC_DRBG_MIN_ENTROPY_LEN_BYTES( security_strength ) \ + ( (security_strength) / 8 ) + +/** Maximum entropy input length + * + * The maximum entropy input length for HMAC_DRBG is 2^35 bits + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP + * 800-90 Section 10.1 Table 2). + * + * We choose to allow up to 32 bytes. + */ +#define HMAC_DRBG_MAX_ENTROPY_LEN_BYTES 32 + +/** Maximum personalisation string length + * + * The maximum permitted personalisation string length for HMAC_DRBG + * is 2^35 bits according to ANS X9.82 Part 3-2007 Section 10.2.1 + * Table 1 (NIST SP 800-90 Section 10.1 Table 2). + * + * We choose to allow up to 2^32-1 bytes (i.e. 2^35-8 bits). + */ +#define HMAC_DRBG_MAX_PERSONAL_LEN_BYTES 0xffffffffUL + +/** Maximum additional input length + * + * The maximum permitted additional input length for HMAC_DRBG is 2^35 + * bits according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 1 + * (NIST SP 800-90 Section 10.1 Table 2). + * + * We choose to allow up to 2^32-1 bytes (i.e. 2^35-8 bits). + */ +#define HMAC_DRBG_MAX_ADDITIONAL_LEN_BYTES 0xffffffffUL + +/** Maximum length of generated pseudorandom data per request + * + * The maximum number of bits per request for HMAC_DRBG is 2^19 bits + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 1 (NIST SP + * 800-90 Section 10.1 Table 2). + * + * We choose to allow up to 2^16-1 bytes (i.e. 2^19-8 bits). + */ +#define HMAC_DRBG_MAX_GENERATED_LEN_BYTES 0x0000ffffUL + +/** Reseed interval + * + * The maximum permitted reseed interval for HMAC_DRBG is 2^48 + * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP + * 800-90 Section 10.1 Table 2). However, the sample implementation + * given in ANS X9.82 Part 3-2007 Annex E.2.1 (NIST SP 800-90 Appendix + * F.2) shows a reseed interval of 10000. + * + * We choose a very conservative reseed interval. + */ +#define HMAC_DRBG_RESEED_INTERVAL 1024 + +/** + * HMAC_DRBG internal state + * + * This structure is defined by ANS X9.82 Part 3-2007 Section + * 10.2.2.2.1 (NIST SP 800-90 Section 10.1.2.1). + * + * The "administrative information" portions (security_strength and + * prediction_resistance) are design-time constants and so are not + * present as fields in this structure. + */ +struct hmac_drbg_state { + /** Current value + * + * "The value V of outlen bits, which is updated each time + * another outlen bits of output are produced" + */ + uint8_t value[HMAC_DRBG_MAX_OUTLEN_BYTES]; + /** Current key + * + * "The outlen-bit Key, which is updated at least once each + * time that the DRBG mechanism generates pseudorandom bits." + */ + uint8_t key[HMAC_DRBG_MAX_OUTLEN_BYTES]; + /** Reseed counter + * + * "A counter (reseed_counter) that indicates the number of + * requests for pseudorandom bits since instantiation or + * reseeding" + */ + unsigned int reseed_counter; +}; + +extern void hmac_drbg_instantiate ( struct digest_algorithm *hash, + struct hmac_drbg_state *state, + const void *entropy, size_t entropy_len, + const void *personal, size_t personal_len ); +extern void hmac_drbg_reseed ( struct digest_algorithm *hash, + struct hmac_drbg_state *state, + const void *entropy, size_t entropy_len, + const void *additional, size_t additional_len ); +extern int hmac_drbg_generate ( struct digest_algorithm *hash, + struct hmac_drbg_state *state, + const void *additional, size_t additional_len, + void *data, size_t len ); + +#endif /* _IPXE_HMAC_DRBG_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/http.h b/qemu/roms/ipxe/src/include/ipxe/http.h new file mode 100644 index 000000000..cf8c0c7fa --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/http.h @@ -0,0 +1,24 @@ +#ifndef _IPXE_HTTP_H +#define _IPXE_HTTP_H + +/** @file + * + * Hyper Text Transport Protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** HTTP default port */ +#define HTTP_PORT 80 + +/** HTTPS default port */ +#define HTTPS_PORT 443 + +extern int http_open_filter ( struct interface *xfer, struct uri *uri, + unsigned int default_port, + int ( * filter ) ( struct interface *, + const char *, + struct interface ** ) ); + +#endif /* _IPXE_HTTP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/i2c.h b/qemu/roms/ipxe/src/include/ipxe/i2c.h new file mode 100644 index 000000000..c1f5a9bbd --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/i2c.h @@ -0,0 +1,171 @@ +#ifndef _IPXE_I2C_H +#define _IPXE_I2C_H + +/** @file + * + * I2C interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/bitbash.h> + +/** An I2C device + * + * An I2C device represents a specific slave device on an I2C bus. It + * is accessed via an I2C interface. + */ +struct i2c_device { + /** Address of this device + * + * The actual address sent on the bus will look like + * + * <start> <device address> <word address overflow> <r/w> + * + * The "word address overflow" is any excess bits from the + * word address, i.e. any portion that does not fit within the + * defined word address length. + */ + unsigned int dev_addr; + /** Device address length, in bytes + * + * This is the number of bytes that comprise the device + * address, defined to be the portion that terminates with the + * read/write bit. + */ + unsigned int dev_addr_len; + /** Word adddress length, in bytes + * + * This is the number of bytes that comprise the word address, + * defined to be the portion that starts after the read/write + * bit and ends before the first data byte. + * + * For some devices, this length will be zero (i.e. the word + * address is contained entirely within the "word address + * overflow"). + */ + unsigned int word_addr_len; +}; + +/** An I2C interface + * + * An I2C interface provides access to an I2C bus, via which I2C + * devices may be reached. + */ +struct i2c_interface { + /** + * Read data from I2C device + * + * @v i2c I2C interface + * @v i2cdev I2C device + * @v offset Starting offset within the device + * @v data Data buffer + * @v len Length of data buffer + * @ret rc Return status code + */ + int ( * read ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev, + unsigned int offset, uint8_t *data, + unsigned int len ); + /** + * Write data to I2C device + * + * @v i2c I2C interface + * @v i2cdev I2C device + * @v offset Starting offset within the device + * @v data Data buffer + * @v len Length of data buffer + * @ret rc Return status code + */ + int ( * write ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev, + unsigned int offset, const uint8_t *data, + unsigned int len ); +}; + +/** A bit-bashing I2C interface + * + * This provides a standardised way to construct I2C buses via a + * bit-bashing interface. + */ +struct i2c_bit_basher { + /** I2C interface */ + struct i2c_interface i2c; + /** Bit-bashing interface */ + struct bit_basher basher; +}; + +/** Ten-bit address marker + * + * This value is ORed with the I2C device address to indicate a + * ten-bit address format on the bus. + */ +#define I2C_TENBIT_ADDRESS 0x7800 + +/** An I2C write command */ +#define I2C_WRITE 0 + +/** An I2C read command */ +#define I2C_READ 1 + +/** Bit indices used for I2C bit-bashing interface */ +enum { + /** Serial clock */ + I2C_BIT_SCL = 0, + /** Serial data */ + I2C_BIT_SDA, +}; + +/** Delay required for bit-bashing operation */ +#define I2C_UDELAY 5 + +/** Maximum number of cycles to use when attempting a bus reset */ +#define I2C_RESET_MAX_CYCLES 32 + +/** + * Check presence of I2C device + * + * @v i2c I2C interface + * @v i2cdev I2C device + * @ret rc Return status code + * + * Checks for the presence of the device on the I2C bus by attempting + * a zero-length write. + */ +static inline int i2c_check_presence ( struct i2c_interface *i2c, + struct i2c_device *i2cdev ) { + return i2c->write ( i2c, i2cdev, 0, NULL, 0 ); +} + +extern int init_i2c_bit_basher ( struct i2c_bit_basher *i2cbit, + struct bit_basher_operations *bash_op ); + +/** + * Initialise generic I2C EEPROM device + * + * @v i2cdev I2C device + */ +static inline __always_inline void +init_i2c_eeprom ( struct i2c_device *i2cdev, unsigned int dev_addr ) { + i2cdev->dev_addr = dev_addr; + i2cdev->dev_addr_len = 1; + i2cdev->word_addr_len = 1; +} + +/** + * Initialise Atmel AT24C11 + * + * @v i2cdev I2C device + */ +static inline __always_inline void +init_at24c11 ( struct i2c_device *i2cdev ) { + /* This chip has no device address; it must be the only chip + * on the bus. The word address is contained entirely within + * the device address field. + */ + i2cdev->dev_addr = 0; + i2cdev->dev_addr_len = 1; + i2cdev->word_addr_len = 0; +} + +#endif /* _IPXE_I2C_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_cm.h b/qemu/roms/ipxe/src/include/ipxe/ib_cm.h new file mode 100644 index 000000000..7d08cd9b1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_cm.h @@ -0,0 +1,72 @@ +#ifndef _IPXE_IB_CM_H +#define _IPXE_IB_CM_H + +/** @file + * + * Infiniband communication management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/infiniband.h> +#include <ipxe/retry.h> + +struct ib_mad_transaction; +struct ib_connection; + +/** Infiniband connection operations */ +struct ib_connection_operations { + /** Handle change of connection status + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v conn Connection + * @v rc Connection status code + * @v private_data Private data, if available + * @v private_data_len Length of private data + */ + void ( * changed ) ( struct ib_device *ibdev, struct ib_queue_pair *qp, + struct ib_connection *conn, int rc, + void *private_data, size_t private_data_len ); +}; + +/** An Infiniband connection */ +struct ib_connection { + /** Infiniband device */ + struct ib_device *ibdev; + /** Queue pair */ + struct ib_queue_pair *qp; + /** Local communication ID */ + uint32_t local_id; + /** Remote communication ID */ + uint32_t remote_id; + /** Target service ID */ + union ib_guid service_id; + /** Connection operations */ + struct ib_connection_operations *op; + + /** List of connections */ + struct list_head list; + + /** Path to target */ + struct ib_path *path; + /** Connection request management transaction */ + struct ib_mad_transaction *madx; + + /** Length of connection request private data */ + size_t private_data_len; + /** Connection request private data */ + uint8_t private_data[0]; +}; + +extern struct ib_connection * +ib_create_conn ( struct ib_device *ibdev, struct ib_queue_pair *qp, + union ib_gid *dgid, union ib_guid *service_id, + void *req_private_data, size_t req_private_data_len, + struct ib_connection_operations *op ); +extern void ib_destroy_conn ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct ib_connection *conn ); + +#endif /* _IPXE_IB_CM_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_cmrc.h b/qemu/roms/ipxe/src/include/ipxe/ib_cmrc.h new file mode 100644 index 000000000..47ad27fa6 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_cmrc.h @@ -0,0 +1,20 @@ +#ifndef _IPXE_IB_CMRC_H +#define _IPXE_IB_CMRC_H + +/** @file + * + * Infiniband Communication-managed Reliable Connections + * + */ + +FILE_LICENCE ( BSD2 ); + +#include <ipxe/infiniband.h> +#include <ipxe/xfer.h> + +extern int ib_cmrc_open ( struct interface *xfer, + struct ib_device *ibdev, + union ib_gid *dgid, + union ib_guid *service_id ); + +#endif /* _IPXE_IB_CMRC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_mad.h b/qemu/roms/ipxe/src/include/ipxe/ib_mad.h new file mode 100644 index 000000000..b8694833e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_mad.h @@ -0,0 +1,591 @@ +#ifndef _IPXE_IB_MAD_H +#define _IPXE_IB_MAD_H + +/** @file + * + * Infiniband management datagrams + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/ib_packet.h> + +/***************************************************************************** + * + * Subnet management MADs + * + ***************************************************************************** + */ + +/** A subnet management header + * + * Defined in sections 14.2.1.1 and 14.2.1.2 of the IBA. + */ +struct ib_smp_hdr { + uint64_t mkey; + uint16_t slid; + uint16_t dlid; + uint8_t reserved[28]; +} __attribute__ (( packed )); + +/** Subnet management class version */ +#define IB_SMP_CLASS_VERSION 1 + +/** Subnet management direction bit + * + * This bit resides in the "status" field in the MAD header. + */ +#define IB_SMP_STATUS_D_INBOUND 0x8000 + +/* Subnet management attributes */ +#define IB_SMP_ATTR_NOTICE 0x0002 +#define IB_SMP_ATTR_NODE_DESC 0x0010 +#define IB_SMP_ATTR_NODE_INFO 0x0011 +#define IB_SMP_ATTR_SWITCH_INFO 0x0012 +#define IB_SMP_ATTR_GUID_INFO 0x0014 +#define IB_SMP_ATTR_PORT_INFO 0x0015 +#define IB_SMP_ATTR_PKEY_TABLE 0x0016 +#define IB_SMP_ATTR_SL_TO_VL_TABLE 0x0017 +#define IB_SMP_ATTR_VL_ARB_TABLE 0x0018 +#define IB_SMP_ATTR_LINEAR_FORWARD_TABLE 0x0019 +#define IB_SMP_ATTR_RANDOM_FORWARD_TABLE 0x001A +#define IB_SMP_ATTR_MCAST_FORWARD_TABLE 0x001B +#define IB_SMP_ATTR_SM_INFO 0x0020 +#define IB_SMP_ATTR_VENDOR_DIAG 0x0030 +#define IB_SMP_ATTR_LED_INFO 0x0031 +#define IB_SMP_ATTR_VENDOR_MASK 0xFF00 + +/** + * A Node Description attribute + * + * Defined in section 14.2.5.2 of the IBA + */ +struct ib_node_desc { + char node_string[64]; +} __attribute__ (( packed )); + +/** A Node Information attribute + * + * Defined in section 14.2.5.3 of the IBA. + */ +struct ib_node_info { + uint8_t base_version; + uint8_t class_version; + uint8_t node_type; + uint8_t num_ports; + union ib_guid sys_guid; + union ib_guid node_guid; + union ib_guid port_guid; + uint16_t partition_cap; + uint16_t device_id; + uint32_t revision; + uint8_t local_port_num; + uint8_t vendor_id[3]; +} __attribute__ ((packed)); + +#define IB_NODE_TYPE_HCA 0x01 +#define IB_NODE_TYPE_SWITCH 0x02 +#define IB_NODE_TYPE_ROUTER 0x03 + +/** A GUID Information attribute + * + * Defined in section 14.2.5.5 of the IBA. + */ +struct ib_guid_info { + uint8_t guid[8][8]; +} __attribute__ (( packed )); + +/** A Port Information attribute + * + * Defined in section 14.2.5.6 of the IBA. + */ +struct ib_port_info { + uint64_t mkey; + uint8_t gid_prefix[8]; + uint16_t lid; + uint16_t mastersm_lid; + uint32_t cap_mask; + uint16_t diag_code; + uint16_t mkey_lease_period; + uint8_t local_port_num; + uint8_t link_width_enabled; + uint8_t link_width_supported; + uint8_t link_width_active; + uint8_t link_speed_supported__port_state; + uint8_t port_phys_state__link_down_def_state; + uint8_t mkey_prot_bits__lmc; + uint8_t link_speed_active__link_speed_enabled; + uint8_t neighbour_mtu__mastersm_sl; + uint8_t vl_cap__init_type; + uint8_t vl_high_limit; + uint8_t vl_arbitration_high_cap; + uint8_t vl_arbitration_low_cap; + uint8_t init_type_reply__mtu_cap; + uint8_t vl_stall_count__hoq_life; + uint8_t operational_vls__enforcement; + uint16_t mkey_violations; + uint16_t pkey_violations; + uint16_t qkey_violations; + uint8_t guid_cap; + uint8_t client_reregister__subnet_timeout; + uint8_t resp_time_value; + uint8_t local_phy_errors__overrun_errors; + uint16_t max_credit_hint; + uint32_t link_round_trip_latency; +} __attribute__ (( packed )); + +#define IB_LINK_WIDTH_1X 0x01 +#define IB_LINK_WIDTH_4X 0x02 +#define IB_LINK_WIDTH_8X 0x04 +#define IB_LINK_WIDTH_12X 0x08 + +#define IB_LINK_SPEED_SDR 0x01 +#define IB_LINK_SPEED_DDR 0x02 +#define IB_LINK_SPEED_QDR 0x04 + +#define IB_PORT_STATE_DOWN 0x01 +#define IB_PORT_STATE_INIT 0x02 +#define IB_PORT_STATE_ARMED 0x03 +#define IB_PORT_STATE_ACTIVE 0x04 + +#define IB_PORT_PHYS_STATE_SLEEP 0x01 +#define IB_PORT_PHYS_STATE_POLLING 0x02 + +#define IB_MTU_256 0x01 +#define IB_MTU_512 0x02 +#define IB_MTU_1024 0x03 +#define IB_MTU_2048 0x04 +#define IB_MTU_4096 0x05 + +#define IB_VL_0 0x01 +#define IB_VL_0_1 0x02 +#define IB_VL_0_3 0x03 +#define IB_VL_0_7 0x04 +#define IB_VL_0_14 0x05 + +/** A Partition Key Table attribute + * + * Defined in section 14.2.5.7 of the IBA. + */ +struct ib_pkey_table { + uint16_t pkey[32]; +} __attribute__ (( packed )); + +/** A subnet management attribute */ +union ib_smp_data { + struct ib_node_desc node_desc; + struct ib_node_info node_info; + struct ib_guid_info guid_info; + struct ib_port_info port_info; + struct ib_pkey_table pkey_table; + uint8_t bytes[64]; +} __attribute__ (( packed )); + +/** A subnet management directed route path */ +struct ib_smp_dr_path { + uint8_t hops[64]; +} __attribute__ (( packed )); + +/** Subnet management MAD class-specific data */ +struct ib_smp_class_specific { + uint8_t hop_pointer; + uint8_t hop_count; +} __attribute__ (( packed )); + +/***************************************************************************** + * + * Subnet administration MADs + * + ***************************************************************************** + */ + +#define IB_SA_CLASS_VERSION 2 + +#define IB_SA_METHOD_DELETE_RESP 0x95 + +struct ib_rmpp_hdr { + uint32_t raw[3]; +} __attribute__ (( packed )); + +struct ib_sa_hdr { + uint32_t sm_key[2]; + uint16_t reserved; + uint16_t attrib_offset; + uint32_t comp_mask[2]; +} __attribute__ (( packed )); + +#define IB_SA_ATTR_MC_MEMBER_REC 0x38 +#define IB_SA_ATTR_PATH_REC 0x35 + +struct ib_path_record { + uint32_t reserved0[2]; + union ib_gid dgid; + union ib_gid sgid; + uint16_t dlid; + uint16_t slid; + uint32_t hop_limit__flow_label__raw_traffic; + uint32_t pkey__numb_path__reversible__tclass; + uint8_t reserved1; + uint8_t reserved__sl; + uint8_t mtu_selector__mtu; + uint8_t rate_selector__rate; + uint32_t preference__packet_lifetime__packet_lifetime_selector; + uint32_t reserved2[35]; +} __attribute__ (( packed )); + +#define IB_SA_PATH_REC_DGID (1<<2) +#define IB_SA_PATH_REC_SGID (1<<3) + +struct ib_mc_member_record { + union ib_gid mgid; + union ib_gid port_gid; + uint32_t qkey; + uint16_t mlid; + uint8_t mtu_selector__mtu; + uint8_t tclass; + uint16_t pkey; + uint8_t rate_selector__rate; + uint8_t packet_lifetime_selector__packet_lifetime; + uint32_t sl__flow_label__hop_limit; + uint8_t scope__join_state; + uint8_t proxy_join__reserved; + uint16_t reserved0; + uint32_t reserved1[37]; +} __attribute__ (( packed )); + +#define IB_SA_MCMEMBER_REC_MGID (1<<0) +#define IB_SA_MCMEMBER_REC_PORT_GID (1<<1) +#define IB_SA_MCMEMBER_REC_QKEY (1<<2) +#define IB_SA_MCMEMBER_REC_MLID (1<<3) +#define IB_SA_MCMEMBER_REC_MTU_SELECTOR (1<<4) +#define IB_SA_MCMEMBER_REC_MTU (1<<5) +#define IB_SA_MCMEMBER_REC_TRAFFIC_CLASS (1<<6) +#define IB_SA_MCMEMBER_REC_PKEY (1<<7) +#define IB_SA_MCMEMBER_REC_RATE_SELECTOR (1<<8) +#define IB_SA_MCMEMBER_REC_RATE (1<<9) +#define IB_SA_MCMEMBER_REC_PACKET_LIFE_TIME_SELECTOR (1<<10) +#define IB_SA_MCMEMBER_REC_PACKET_LIFE_TIME (1<<11) +#define IB_SA_MCMEMBER_REC_SL (1<<12) +#define IB_SA_MCMEMBER_REC_FLOW_LABEL (1<<13) +#define IB_SA_MCMEMBER_REC_HOP_LIMIT (1<<14) +#define IB_SA_MCMEMBER_REC_SCOPE (1<<15) +#define IB_SA_MCMEMBER_REC_JOIN_STATE (1<<16) +#define IB_SA_MCMEMBER_REC_PROXY_JOIN (1<<17) + +union ib_sa_data { + struct ib_path_record path_record; + struct ib_mc_member_record mc_member_record; +} __attribute__ (( packed )); + +/***************************************************************************** + * + * Communication management MADs + * + ***************************************************************************** + */ + +/** Communication management class version */ +#define IB_CM_CLASS_VERSION 2 + +/* Communication management attributes */ +#define IB_CM_ATTR_CLASS_PORT_INFO 0x0001 +#define IB_CM_ATTR_CONNECT_REQUEST 0x0010 +#define IB_CM_ATTR_MSG_RCPT_ACK 0x0011 +#define IB_CM_ATTR_CONNECT_REJECT 0x0012 +#define IB_CM_ATTR_CONNECT_REPLY 0x0013 +#define IB_CM_ATTR_READY_TO_USE 0x0014 +#define IB_CM_ATTR_DISCONNECT_REQUEST 0x0015 +#define IB_CM_ATTR_DISCONNECT_REPLY 0x0016 +#define IB_CM_ATTR_SERVICE_ID_RES_REQ 0x0016 +#define IB_CM_ATTR_SERVICE_ID_RES_REQ_RESP 0x0018 +#define IB_CM_ATTR_LOAD_ALTERNATE_PATH 0x0019 +#define IB_CM_ATTR_ALTERNATE_PATH_RESPONSE 0x001a + +/** Communication management common fields */ +struct ib_cm_common { + /** Local communication ID */ + uint32_t local_id; + /** Remote communication ID */ + uint32_t remote_id; + /** Reserved */ + uint8_t reserved[224]; +} __attribute__ (( packed )); + +/** A communication management path */ +struct ib_cm_path { + /** Local port LID */ + uint16_t local_lid; + /** Remote port LID */ + uint16_t remote_lid; + /** Local port GID */ + union ib_gid local_gid; + /** Remote port GID */ + union ib_gid remote_gid; + /** Flow label and rate */ + uint32_t flow_label__rate; + /** Traffic class */ + uint8_t tc; + /** Hop limit */ + uint8_t hop_limit; + /** SL and subnet local*/ + uint8_t sl__subnet_local; + /** Local ACK timeout */ + uint8_t local_ack_timeout; +} __attribute__ (( packed )); + +/** A communication management connection request + * + * Defined in section 12.6.5 of the IBA. + */ +struct ib_cm_connect_request { + /** Local communication ID */ + uint32_t local_id; + /** Reserved */ + uint32_t reserved0[1]; + /** Service ID */ + union ib_guid service_id; + /** Local CA GUID */ + union ib_guid local_ca; + /** Reserved */ + uint32_t reserved1[1]; + /** Local queue key */ + uint32_t local_qkey; + /** Local QPN and responder resources*/ + uint32_t local_qpn__responder_resources; + /** Local EECN and initiator depth */ + uint32_t local_eecn__initiator_depth; + /** Remote EECN, remote CM response timeout, transport service + * type, EE flow control + */ + uint32_t remote_eecn__remote_timeout__service_type__ee_flow_ctrl; + /** Starting PSN, local CM response timeout and retry count */ + uint32_t starting_psn__local_timeout__retry_count; + /** Partition key */ + uint16_t pkey; + /** Path packet payload MTU, RDC exists, RNR retry count */ + uint8_t payload_mtu__rdc_exists__rnr_retry; + /** Max CM retries and SRQ */ + uint8_t max_cm_retries__srq; + /** Primary path */ + struct ib_cm_path primary; + /** Alternate path */ + struct ib_cm_path alternate; + /** Private data */ + uint8_t private_data[92]; +} __attribute__ (( packed )); + +/** CM transport types */ +#define IB_CM_TRANSPORT_RC 0 +#define IB_CM_TRANSPORT_UC 1 +#define IB_CM_TRANSPORT_RD 2 + +/** A communication management connection rejection + * + * Defined in section 12.6.7 of the IBA. + */ +struct ib_cm_connect_reject { + /** Local communication ID */ + uint32_t local_id; + /** Remote communication ID */ + uint32_t remote_id; + /** Message rejected */ + uint8_t message; + /** Reject information length */ + uint8_t info_len; + /** Rejection reason */ + uint16_t reason; + /** Additional rejection information */ + uint8_t info[72]; + /** Private data */ + uint8_t private_data[148]; +} __attribute__ (( packed )); + +/** CM rejection reasons */ +#define IB_CM_REJECT_BAD_SERVICE_ID 8 +#define IB_CM_REJECT_STALE_CONN 10 +#define IB_CM_REJECT_CONSUMER 28 + +/** A communication management connection reply + * + * Defined in section 12.6.8 of the IBA. + */ +struct ib_cm_connect_reply { + /** Local communication ID */ + uint32_t local_id; + /** Remote communication ID */ + uint32_t remote_id; + /** Local queue key */ + uint32_t local_qkey; + /** Local QPN */ + uint32_t local_qpn; + /** Local EECN */ + uint32_t local_eecn; + /** Starting PSN */ + uint32_t starting_psn; + /** Responder resources */ + uint8_t responder_resources; + /** Initiator depth */ + uint8_t initiator_depth; + /** Target ACK delay, failover accepted, and end-to-end flow control */ + uint8_t target_ack_delay__failover_accepted__ee_flow_ctrl; + /** RNR retry count, SRQ */ + uint8_t rnr_retry__srq; + /** Local CA GUID */ + union ib_guid local_ca; + /** Private data */ + uint8_t private_data[196]; +} __attribute__ (( packed )); + +/** A communication management ready to use reply + * + * Defined in section 12.6.9 of the IBA. + */ +struct ib_cm_ready_to_use { + /** Local communication ID */ + uint32_t local_id; + /** Remote communication ID */ + uint32_t remote_id; + /** Private data */ + uint8_t private_data[224]; +} __attribute__ (( packed )); + +/** A communication management disconnection request + * + * Defined in section 12.6.10 of the IBA. + */ +struct ib_cm_disconnect_request { + /** Local communication ID */ + uint32_t local_id; + /** Remote communication ID */ + uint32_t remote_id; + /** Remote QPN/EECN */ + uint32_t remote_qpn_eecn; + /** Private data */ + uint8_t private_data[220]; +} __attribute__ (( packed )); + +/** A communication management disconnection reply + * + * Defined in section 12.6.11 of the IBA. + */ +struct ib_cm_disconnect_reply { + /** Local communication ID */ + uint32_t local_id; + /** Remote communication ID */ + uint32_t remote_id; + /** Private data */ + uint8_t private_data[224]; +} __attribute__ (( packed )); + +/** A communication management attribute */ +union ib_cm_data { + struct ib_cm_common common; + struct ib_cm_connect_request connect_request; + struct ib_cm_connect_reject connect_reject; + struct ib_cm_connect_reply connect_reply; + struct ib_cm_ready_to_use ready_to_use; + struct ib_cm_disconnect_request disconnect_request; + struct ib_cm_disconnect_reply disconnect_reply; + uint8_t bytes[232]; +} __attribute__ (( packed )); + +/***************************************************************************** + * + * MADs + * + ***************************************************************************** + */ + +/** Management datagram class_specific data */ +union ib_mad_class_specific { + uint16_t raw; + struct ib_smp_class_specific smp; +} __attribute__ (( packed )); + +/** A management datagram common header + * + * Defined in section 13.4.2 of the IBA. + */ +struct ib_mad_hdr { + uint8_t base_version; + uint8_t mgmt_class; + uint8_t class_version; + uint8_t method; + uint16_t status; + union ib_mad_class_specific class_specific; + uint32_t tid[2]; + uint16_t attr_id; + uint8_t reserved[2]; + uint32_t attr_mod; +} __attribute__ (( packed )); + +/* Management base version */ +#define IB_MGMT_BASE_VERSION 1 + +/* Management classes */ +#define IB_MGMT_CLASS_SUBN_LID_ROUTED 0x01 +#define IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE 0x81 +#define IB_MGMT_CLASS_SUBN_ADM 0x03 +#define IB_MGMT_CLASS_PERF_MGMT 0x04 +#define IB_MGMT_CLASS_BM 0x05 +#define IB_MGMT_CLASS_DEVICE_MGMT 0x06 +#define IB_MGMT_CLASS_CM 0x07 +#define IB_MGMT_CLASS_SNMP 0x08 +#define IB_MGMT_CLASS_VENDOR_RANGE2_START 0x30 +#define IB_MGMT_CLASS_VENDOR_RANGE2_END 0x4f + +#define IB_MGMT_CLASS_MASK 0x7f + +/* Management methods */ +#define IB_MGMT_METHOD_GET 0x01 +#define IB_MGMT_METHOD_SET 0x02 +#define IB_MGMT_METHOD_GET_RESP 0x81 +#define IB_MGMT_METHOD_SEND 0x03 +#define IB_MGMT_METHOD_TRAP 0x05 +#define IB_MGMT_METHOD_REPORT 0x06 +#define IB_MGMT_METHOD_REPORT_RESP 0x86 +#define IB_MGMT_METHOD_TRAP_REPRESS 0x07 +#define IB_MGMT_METHOD_DELETE 0x15 + +/* Status codes */ +#define IB_MGMT_STATUS_OK 0x0000 +#define IB_MGMT_STATUS_BAD_VERSION 0x0001 +#define IB_MGMT_STATUS_UNSUPPORTED_METHOD 0x0002 +#define IB_MGMT_STATUS_UNSUPPORTED_METHOD_ATTR 0x0003 +#define IB_MGMT_STATUS_INVALID_VALUE 0x0004 + +/** A subnet management MAD */ +struct ib_mad_smp { + struct ib_mad_hdr mad_hdr; + struct ib_smp_hdr smp_hdr; + union ib_smp_data smp_data; + struct ib_smp_dr_path initial_path; + struct ib_smp_dr_path return_path; +} __attribute__ (( packed )); + +/** A subnet administration MAD */ +struct ib_mad_sa { + struct ib_mad_hdr mad_hdr; + struct ib_rmpp_hdr rmpp_hdr; + struct ib_sa_hdr sa_hdr; + union ib_sa_data sa_data; +} __attribute__ (( packed )); + +/** A communication management MAD */ +struct ib_mad_cm { + struct ib_mad_hdr mad_hdr; + union ib_cm_data cm_data; +} __attribute__ (( packed )); + +/** A management datagram */ +union ib_mad { + struct ib_mad_hdr hdr; + struct ib_mad_smp smp; + struct ib_mad_sa sa; + struct ib_mad_cm cm; + uint8_t bytes[256]; +} __attribute__ (( packed )); + +#endif /* _IPXE_IB_MAD_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_mcast.h b/qemu/roms/ipxe/src/include/ipxe/ib_mcast.h new file mode 100644 index 000000000..a5c22a03e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_mcast.h @@ -0,0 +1,48 @@ +#ifndef _IPXE_IB_MCAST_H +#define _IPXE_IB_MCAST_H + +/** @file + * + * Infiniband multicast groups + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/infiniband.h> + +struct ib_mad_transaction; + +/** An Infiniband multicast group membership */ +struct ib_mc_membership { + /** Queue pair */ + struct ib_queue_pair *qp; + /** Multicast GID */ + union ib_gid gid; + /** Multicast group join transaction */ + struct ib_mad_transaction *madx; + /** Handle join success/failure + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v membership Multicast group membership + * @v rc Status code + * @v mad Response MAD (or NULL on error) + */ + void ( * complete ) ( struct ib_device *ibdev, struct ib_queue_pair *qp, + struct ib_mc_membership *membership, int rc, + union ib_mad *mad ); +}; + +extern int ib_mcast_join ( struct ib_device *ibdev, struct ib_queue_pair *qp, + struct ib_mc_membership *membership, + union ib_gid *gid, + void ( * joined ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct ib_mc_membership *memb, + int rc, union ib_mad *mad ) ); + +extern void ib_mcast_leave ( struct ib_device *ibdev, struct ib_queue_pair *qp, + struct ib_mc_membership *membership ); + +#endif /* _IPXE_IB_MCAST_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_mi.h b/qemu/roms/ipxe/src/include/ipxe/ib_mi.h new file mode 100644 index 000000000..5c5415b71 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_mi.h @@ -0,0 +1,135 @@ +#ifndef _IPXE_IB_MI_H +#define _IPXE_IB_MI_H + +/** @file + * + * Infiniband management interfaces + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/list.h> +#include <ipxe/retry.h> +#include <ipxe/tables.h> +#include <ipxe/infiniband.h> + +struct ib_mad_interface; +struct ib_mad_transaction; + +/** An Infiniband management agent */ +struct ib_mad_agent { + /** Management class */ + uint8_t mgmt_class; + /** Class version */ + uint8_t class_version; + /** Attribute (in network byte order) */ + uint16_t attr_id; + /** Handle MAD + * + * @v ibdev Infiniband device + * @v mi Management interface + * @v mad Received MAD + * @v av Source address vector + * @ret rc Return status code + */ + void ( * handle ) ( struct ib_device *ibdev, + struct ib_mad_interface *mi, + union ib_mad *mad, + struct ib_address_vector *av ); +}; + +/** Infiniband management agents */ +#define IB_MAD_AGENTS __table ( struct ib_mad_agent, "ib_mad_agents" ) + +/** Declare an Infiniband management agent */ +#define __ib_mad_agent __table_entry ( IB_MAD_AGENTS, 01 ) + +/** Infiniband management transaction operations */ +struct ib_mad_transaction_operations { + /** Handle transaction completion + * + * @v ibdev Infiniband device + * @v mi Management interface + * @v madx Management transaction + * @v rc Status code + * @v mad Received MAD (or NULL on error) + * @v av Source address vector (or NULL on error) + * + * The completion handler should in most cases call + * ib_destroy_madx() to free up the completed transaction. + */ + void ( * complete ) ( struct ib_device *ibdev, + struct ib_mad_interface *mi, + struct ib_mad_transaction *madx, + int rc, union ib_mad *mad, + struct ib_address_vector *av ); +}; + +/** An Infiniband management transaction */ +struct ib_mad_transaction { + /** Associated management interface */ + struct ib_mad_interface *mi; + /** List of transactions */ + struct list_head list; + /** Retry timer */ + struct retry_timer timer; + /** Destination address vector */ + struct ib_address_vector av; + /** MAD being sent */ + union ib_mad mad; + /** Transaction operations */ + struct ib_mad_transaction_operations *op; + /** Owner private data */ + void *owner_priv; +}; + +/** An Infiniband management interface */ +struct ib_mad_interface { + /** Infiniband device */ + struct ib_device *ibdev; + /** Completion queue */ + struct ib_completion_queue *cq; + /** Queue pair */ + struct ib_queue_pair *qp; + /** List of management transactions */ + struct list_head madx; +}; + +/** + * Set Infiniband management transaction owner-private data + * + * @v madx Management transaction + * @v priv Private data + */ +static inline __always_inline void +ib_madx_set_ownerdata ( struct ib_mad_transaction *madx, void *priv ) { + madx->owner_priv = priv; +} + +/** + * Get Infiniband management transaction owner-private data + * + * @v madx Management transaction + * @ret priv Private data + */ +static inline __always_inline void * +ib_madx_get_ownerdata ( struct ib_mad_transaction *madx ) { + return madx->owner_priv; +} + +extern int ib_mi_send ( struct ib_device *ibdev, struct ib_mad_interface *mi, + union ib_mad *mad, struct ib_address_vector *av ); +extern struct ib_mad_transaction * +ib_create_madx ( struct ib_device *ibdev, struct ib_mad_interface *mi, + union ib_mad *mad, struct ib_address_vector *av, + struct ib_mad_transaction_operations *op ); +extern void ib_destroy_madx ( struct ib_device *ibdev, + struct ib_mad_interface *mi, + struct ib_mad_transaction *madx ); +extern struct ib_mad_interface * ib_create_mi ( struct ib_device *ibdev, + enum ib_queue_pair_type type ); +extern void ib_destroy_mi ( struct ib_device *ibdev, + struct ib_mad_interface *mi ); + +#endif /* _IPXE_IB_MI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_packet.h b/qemu/roms/ipxe/src/include/ipxe/ib_packet.h new file mode 100644 index 000000000..a959967cb --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_packet.h @@ -0,0 +1,161 @@ +#ifndef _IPXE_IB_PACKET_H +#define _IPXE_IB_PACKET_H + +/** @file + * + * Infiniband packet format + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct ib_device; +struct ib_queue_pair; +struct ib_address_vector; +struct io_buffer; + +/** An Infiniband Globally Unique Identifier */ +union ib_guid { + uint8_t bytes[8]; + uint16_t words[4]; + uint32_t dwords[2]; +}; + +/** Infiniband Globally Unique Identifier debug message format */ +#define IB_GUID_FMT "%08x:%08x" + +/** Infiniband Globally Unique Identifier debug message arguments */ +#define IB_GUID_ARGS( guid ) \ + ntohl ( (guid)->dwords[0] ), ntohl ( (guid)->dwords[1] ) + +/** An Infiniband Global Identifier */ +union ib_gid { + uint8_t bytes[16]; + uint16_t words[8]; + uint32_t dwords[4]; + struct { + union ib_guid prefix; + union ib_guid guid; + } s; +}; + +/** Infiniband Global Identifier debug message format */ +#define IB_GID_FMT IB_GUID_FMT ":" IB_GUID_FMT + +/** Infiniband Global Identifier debug message arguments */ +#define IB_GID_ARGS( gid ) \ + IB_GUID_ARGS ( &(gid)->s.prefix ), IB_GUID_ARGS ( &(gid)->s.guid ) + +/** An Infiniband Local Route Header */ +struct ib_local_route_header { + /** Virtual lane and link version */ + uint8_t vl__lver; + /** Service level and next link header */ + uint8_t sl__lnh; + /** Destination LID */ + uint16_t dlid; + /** Packet length */ + uint16_t length; + /** Source LID */ + uint16_t slid; +} __attribute__ (( packed )); + +/** Infiniband virtual lanes */ +enum ib_vl { + IB_VL_DEFAULT = 0, + IB_VL_SMP = 15, +}; + +/** An Infiniband Link Next Header value */ +enum ib_lnh { + IB_LNH_RAW = 0, + IB_LNH_IPv6 = 1, + IB_LNH_BTH = 2, + IB_LNH_GRH = 3 +}; + +/** Default Infiniband LID */ +#define IB_LID_NONE 0xffff + +/** Test for multicast LID */ +#define IB_LID_MULTICAST( lid ) ( ( (lid) >= 0xc000 ) && ( (lid) <= 0xfffe ) ) + +/** An Infiniband Global Route Header */ +struct ib_global_route_header { + /** IP version, traffic class, and flow label + * + * 4 bits : Version of the GRH + * 8 bits : Traffic class + * 20 bits : Flow label + */ + uint32_t ipver__tclass__flowlabel; + /** Payload length */ + uint16_t paylen; + /** Next header */ + uint8_t nxthdr; + /** Hop limit */ + uint8_t hoplmt; + /** Source GID */ + union ib_gid sgid; + /** Destiniation GID */ + union ib_gid dgid; +} __attribute__ (( packed )); + +#define IB_GRH_IPVER_IPv6 0x06 +#define IB_GRH_NXTHDR_IBA 0x1b + +/** An Infiniband Base Transport Header */ +struct ib_base_transport_header { + /** Opcode */ + uint8_t opcode; + /** Transport header version, pad count, migration and solicitation */ + uint8_t se__m__padcnt__tver; + /** Partition key */ + uint16_t pkey; + /** Destination queue pair */ + uint32_t dest_qp; + /** Packet sequence number and acknowledge request */ + uint32_t ack__psn; +} __attribute__ (( packed )); + +/** An Infiniband BTH opcode */ +enum ib_bth_opcode { + BTH_OPCODE_UD_SEND = 0x64, +}; + +/** An Infiniband Datagram Extended Transport Header */ +struct ib_datagram_extended_transport_header { + /** Queue key */ + uint32_t qkey; + /** Source queue pair */ + uint32_t src_qp; +} __attribute__ (( packed )); + +/** All known IB header formats */ +union ib_headers { + struct ib_local_route_header lrh; + struct { + struct ib_local_route_header lrh; + struct ib_global_route_header grh; + struct ib_base_transport_header bth; + struct ib_datagram_extended_transport_header deth; + } __attribute__ (( packed )) lrh__grh__bth__deth; + struct { + struct ib_local_route_header lrh; + struct ib_base_transport_header bth; + struct ib_datagram_extended_transport_header deth; + } __attribute__ (( packed )) lrh__bth__deth; +} __attribute__ (( packed )); + +/** Maximum size required for IB headers */ +#define IB_MAX_HEADER_SIZE sizeof ( union ib_headers ) + +extern int ib_push ( struct ib_device *ibdev, struct io_buffer *iobuf, + struct ib_queue_pair *qp, size_t payload_len, + const struct ib_address_vector *dest ); +extern int ib_pull ( struct ib_device *ibdev, struct io_buffer *iobuf, + struct ib_queue_pair **qp, size_t *payload_len, + struct ib_address_vector *dest, + struct ib_address_vector *source ); + +#endif /* _IPXE_IB_PACKET_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_pathrec.h b/qemu/roms/ipxe/src/include/ipxe/ib_pathrec.h new file mode 100644 index 000000000..1fe67f87d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_pathrec.h @@ -0,0 +1,76 @@ +#ifndef _IPXE_IB_PATHREC_H +#define _IPXE_IB_PATHREC_H + +/** @file + * + * Infiniband path records + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/infiniband.h> + +struct ib_mad_transaction; +struct ib_path; + +/** Infiniband path operations */ +struct ib_path_operations { + /** Handle path transaction completion + * + * @v ibdev Infiniband device + * @v path Path + * @v rc Status code + * @v av Address vector, or NULL on error + */ + void ( * complete ) ( struct ib_device *ibdev, + struct ib_path *path, int rc, + struct ib_address_vector *av ); +}; + +/** An Infiniband path */ +struct ib_path { + /** Infiniband device */ + struct ib_device *ibdev; + /** Address vector */ + struct ib_address_vector av; + /** Management transaction */ + struct ib_mad_transaction *madx; + /** Path operations */ + struct ib_path_operations *op; + /** Owner private data */ + void *owner_priv; +}; + +/** + * Set Infiniband path owner-private data + * + * @v path Path + * @v priv Private data + */ +static inline __always_inline void +ib_path_set_ownerdata ( struct ib_path *path, void *priv ) { + path->owner_priv = priv; +} + +/** + * Get Infiniband path owner-private data + * + * @v path Path + * @ret priv Private data + */ +static inline __always_inline void * +ib_path_get_ownerdata ( struct ib_path *path ) { + return path->owner_priv; +} + +extern struct ib_path * +ib_create_path ( struct ib_device *ibdev, struct ib_address_vector *av, + struct ib_path_operations *op ); +extern void ib_destroy_path ( struct ib_device *ibdev, + struct ib_path *path ); + +extern int ib_resolve_path ( struct ib_device *ibdev, + struct ib_address_vector *av ); + +#endif /* _IPXE_IB_PATHREC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_sma.h b/qemu/roms/ipxe/src/include/ipxe/ib_sma.h new file mode 100644 index 000000000..fa355c652 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_sma.h @@ -0,0 +1,20 @@ +#ifndef _IPXE_IB_SMA_H +#define _IPXE_IB_SMA_H + +/** @file + * + * Infiniband subnet management agent + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct ib_device; +struct ib_mad_interface; + +extern int ib_create_sma ( struct ib_device *ibdev, + struct ib_mad_interface *mi ); +extern void ib_destroy_sma ( struct ib_device *ibdev, + struct ib_mad_interface *mi ); + +#endif /* _IPXE_IB_SMA_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_smc.h b/qemu/roms/ipxe/src/include/ipxe/ib_smc.h new file mode 100644 index 000000000..259d2cde1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_smc.h @@ -0,0 +1,20 @@ +#ifndef _IPXE_IB_SMC_H +#define _IPXE_IB_SMC_H + +/** @file + * + * Infiniband Subnet Management Client + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/infiniband.h> + +typedef int ( * ib_local_mad_t ) ( struct ib_device *ibdev, + union ib_mad *mad ); + +extern int ib_smc_init ( struct ib_device *ibdev, ib_local_mad_t local_mad ); +extern int ib_smc_update ( struct ib_device *ibdev, ib_local_mad_t local_mad ); + +#endif /* _IPXE_IB_SMC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ib_srp.h b/qemu/roms/ipxe/src/include/ipxe/ib_srp.h new file mode 100644 index 000000000..ad407b0cf --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ib_srp.h @@ -0,0 +1,58 @@ +#ifndef _IPXE_IB_SRP_H +#define _IPXE_IB_SRP_H + +/** @file + * + * SCSI RDMA Protocol over Infiniband + * + */ + +FILE_LICENCE ( BSD2 ); + +#include <stdint.h> +#include <ipxe/infiniband.h> +#include <ipxe/srp.h> + +/** SRP initiator port identifier for Infiniband */ +union ib_srp_initiator_port_id { + /** SRP version of port identifier */ + union srp_port_id srp; + /** Infiniband version of port identifier */ + struct { + /** Identifier extension */ + union ib_guid id_ext; + /** IB channel adapter GUID */ + union ib_guid hca_guid; + } __attribute__ (( packed )) ib; +}; + +/** SRP target port identifier for Infiniband */ +union ib_srp_target_port_id { + /** SRP version of port identifier */ + union srp_port_id srp; + /** Infiniband version of port identifier */ + struct { + /** Identifier extension */ + union ib_guid id_ext; + /** I/O controller GUID */ + union ib_guid ioc_guid; + } __attribute__ (( packed )) ib; +}; + +/** + * sBFT Infiniband subtable + */ +struct sbft_ib_subtable { + /** Source GID */ + union ib_gid sgid; + /** Destination GID */ + union ib_gid dgid; + /** Service ID */ + union ib_guid service_id; + /** Partition key */ + uint16_t pkey; + /** Reserved */ + uint8_t reserved[6]; +} __attribute__ (( packed )); + +#endif /* _IPXE_IB_SRP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ibft.h b/qemu/roms/ipxe/src/include/ipxe/ibft.h new file mode 100644 index 000000000..35f15105c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ibft.h @@ -0,0 +1,279 @@ +#ifndef _IPXE_IBFT_H +#define _IPXE_IBFT_H + +/* + * Copyright Fen Systems Ltd. 2007. Portions of this code are derived + * from IBM Corporation Sample Programs. Copyright IBM Corporation + * 2004, 2007. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +FILE_LICENCE ( BSD2 ); + +/** @file + * + * iSCSI boot firmware table + * + * The information in this file is derived from the document "iSCSI + * Boot Firmware Table (iBFT)" as published by IBM at + * + * ftp://ftp.software.ibm.com/systems/support/system_x_pdf/ibm_iscsi_boot_firmware_table_v1.02.pdf + * + */ + +#include <stdint.h> +#include <ipxe/acpi.h> +#include <ipxe/scsi.h> +#include <ipxe/in.h> + +/** iSCSI Boot Firmware Table signature */ +#define IBFT_SIG ACPI_SIGNATURE ( 'i', 'B', 'F', 'T' ) + +/** An offset from the start of the iBFT */ +typedef uint16_t ibft_off_t; + +/** Length of a string within the iBFT (excluding terminating NUL) */ +typedef uint16_t ibft_size_t; + +/** A string within the iBFT */ +struct ibft_string { + /** Length of string */ + ibft_size_t len; + /** Offset to string */ + ibft_off_t offset; +} __attribute__ (( packed )); + +/** An IP address within the iBFT */ +struct ibft_ipaddr { + /** Reserved; must be zero */ + uint16_t zeroes[5]; + /** Must be 0xffff if IPv4 address is present, otherwise zero */ + uint16_t ones; + /** The IPv4 address, or zero if not present */ + struct in_addr in; +} __attribute__ (( packed )); + +/** + * iBFT structure header + * + * This structure is common to several sections within the iBFT. + */ +struct ibft_header { + /** Structure ID + * + * This is an IBFT_STRUCTURE_ID_XXX constant + */ + uint8_t structure_id; + /** Version (always 1) */ + uint8_t version; + /** Length, including this header */ + uint16_t length; + /** Index + * + * This is the number of the NIC or Target, when applicable. + */ + uint8_t index; + /** Flags */ + uint8_t flags; +} __attribute__ (( packed )); + +/** + * iBFT Control structure + * + */ +struct ibft_control { + /** Common header */ + struct ibft_header header; + /** Extensions */ + uint16_t extensions; + /** Offset to Initiator structure */ + ibft_off_t initiator; + /** Offset to NIC structure for NIC 0 */ + ibft_off_t nic_0; + /** Offset to Target structure for target 0 */ + ibft_off_t target_0; + /** Offset to NIC structure for NIC 1 */ + ibft_off_t nic_1; + /** Offset to Target structure for target 1 */ + ibft_off_t target_1; +} __attribute__ (( packed )); + +/** Structure ID for Control section */ +#define IBFT_STRUCTURE_ID_CONTROL 0x01 + +/** Attempt login only to specified target + * + * If this flag is not set, all targets will be logged in to. + */ +#define IBFT_FL_CONTROL_SINGLE_LOGIN_ONLY 0x01 + +/** + * iBFT Initiator structure + * + */ +struct ibft_initiator { + /** Common header */ + struct ibft_header header; + /** iSNS server */ + struct ibft_ipaddr isns_server; + /** SLP server */ + struct ibft_ipaddr slp_server; + /** Primary and secondary Radius servers */ + struct ibft_ipaddr radius[2]; + /** Initiator name */ + struct ibft_string initiator_name; +} __attribute__ (( packed )); + +/** Structure ID for Initiator section */ +#define IBFT_STRUCTURE_ID_INITIATOR 0x02 + +/** Initiator block valid */ +#define IBFT_FL_INITIATOR_BLOCK_VALID 0x01 + +/** Initiator firmware boot selected */ +#define IBFT_FL_INITIATOR_FIRMWARE_BOOT_SELECTED 0x02 + +/** + * iBFT NIC structure + * + */ +struct ibft_nic { + /** Common header */ + struct ibft_header header; + /** IP address */ + struct ibft_ipaddr ip_address; + /** Subnet mask + * + * This is the length of the subnet mask in bits (e.g. /24). + */ + uint8_t subnet_mask_prefix; + /** Origin */ + uint8_t origin; + /** Default gateway */ + struct ibft_ipaddr gateway; + /** Primary and secondary DNS servers */ + struct ibft_ipaddr dns[2]; + /** DHCP server */ + struct ibft_ipaddr dhcp; + /** VLAN tag */ + uint16_t vlan; + /** MAC address */ + uint8_t mac_address[6]; + /** PCI bus:dev:fn */ + uint16_t pci_bus_dev_func; + /** Hostname */ + struct ibft_string hostname; +} __attribute__ (( packed )); + +/** Structure ID for NIC section */ +#define IBFT_STRUCTURE_ID_NIC 0x03 + +/** NIC block valid */ +#define IBFT_FL_NIC_BLOCK_VALID 0x01 + +/** NIC firmware boot selected */ +#define IBFT_FL_NIC_FIRMWARE_BOOT_SELECTED 0x02 + +/** NIC global / link local */ +#define IBFT_FL_NIC_GLOBAL 0x04 + +/** NIC IP address origin */ +#define IBFT_NIC_ORIGIN_OTHER 0x00 +#define IBFT_NIC_ORIGIN_MANUAL 0x01 +#define IBFT_NIC_ORIGIN_WELLKNOWN 0x02 +#define IBFT_NIC_ORIGIN_DHCP 0x03 +#define IBFT_NIC_ORIGIN_RA 0x04 +#define IBFT_NIC_ORIGIN_UNCHANGED 0x0f + +/** + * iBFT Target structure + * + */ +struct ibft_target { + /** Common header */ + struct ibft_header header; + /** IP address */ + struct ibft_ipaddr ip_address; + /** TCP port */ + uint16_t socket; + /** Boot LUN */ + struct scsi_lun boot_lun; + /** CHAP type + * + * This is an IBFT_CHAP_XXX constant. + */ + uint8_t chap_type; + /** NIC association */ + uint8_t nic_association; + /** Target name */ + struct ibft_string target_name; + /** CHAP name */ + struct ibft_string chap_name; + /** CHAP secret */ + struct ibft_string chap_secret; + /** Reverse CHAP name */ + struct ibft_string reverse_chap_name; + /** Reverse CHAP secret */ + struct ibft_string reverse_chap_secret; +} __attribute__ (( packed )); + +/** Structure ID for Target section */ +#define IBFT_STRUCTURE_ID_TARGET 0x04 + +/** Target block valid */ +#define IBFT_FL_TARGET_BLOCK_VALID 0x01 + +/** Target firmware boot selected */ +#define IBFT_FL_TARGET_FIRMWARE_BOOT_SELECTED 0x02 + +/** Target use Radius CHAP */ +#define IBFT_FL_TARGET_USE_CHAP 0x04 + +/** Target use Radius rCHAP */ +#define IBFT_FL_TARGET_USE_RCHAP 0x08 + +/* Values for chap_type */ +#define IBFT_CHAP_NONE 0 /**< No CHAP authentication */ +#define IBFT_CHAP_ONE_WAY 1 /**< One-way CHAP */ +#define IBFT_CHAP_MUTUAL 2 /**< Mutual CHAP */ + +/** + * iSCSI Boot Firmware Table (iBFT) + */ +struct ibft_table { + /** ACPI header */ + struct acpi_description_header acpi; + /** Reserved */ + uint8_t reserved[12]; + /** Control structure */ + struct ibft_control control; +} __attribute__ (( packed )); + +struct iscsi_session; +struct net_device; + +extern int ibft_describe ( struct iscsi_session *iscsi, + struct acpi_description_header *acpi, + size_t len ); + +#endif /* _IPXE_IBFT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/icmp.h b/qemu/roms/ipxe/src/include/ipxe/icmp.h new file mode 100644 index 000000000..0480ddfaf --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/icmp.h @@ -0,0 +1,73 @@ +#ifndef _IPXE_ICMP_H +#define _IPXE_ICMP_H + +/** @file + * + * ICMP protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/iobuf.h> +#include <ipxe/socket.h> +#include <ipxe/tcpip.h> +#include <ipxe/tables.h> + +/** An ICMP header */ +struct icmp_header { + /** Type */ + uint8_t type; + /** Code */ + uint8_t code; + /** Checksum */ + uint16_t chksum; +} __attribute__ (( packed )); + +/** An ICMP echo request/reply */ +struct icmp_echo { + /** ICMPv6 header */ + struct icmp_header icmp; + /** Identifier */ + uint16_t ident; + /** Sequence number */ + uint16_t sequence; + /** Data */ + uint8_t data[0]; +} __attribute__ (( packed )); + +/** An ICMP echo protocol */ +struct icmp_echo_protocol { + /** Address family */ + sa_family_t family; + /** Request type */ + uint8_t request; + /** Reply type */ + uint8_t reply; + /** TCP/IP protocol */ + struct tcpip_protocol *tcpip_protocol; + /** Include network-layer checksum within packet */ + int net_checksum; +}; + +/** ICMP echo protocol table */ +#define ICMP_ECHO_PROTOCOLS \ + __table ( struct icmp_echo_protocol, "icmp_echo_protocols" ) + +/** Declare an ICMP echo protocol */ +#define __icmp_echo_protocol __table_entry ( ICMP_ECHO_PROTOCOLS, 01 ) + +#define ICMP_ECHO_REPLY 0 +#define ICMP_ECHO_REQUEST 8 + +extern int icmp_tx_echo_request ( struct io_buffer *iobuf, + struct sockaddr_tcpip *st_dest ); + +extern int icmp_rx_echo_request ( struct io_buffer *iobuf, + struct sockaddr_tcpip *st_src, + struct icmp_echo_protocol *echo_protocol ); +extern int icmp_rx_echo_reply ( struct io_buffer *iobuf, + struct sockaddr_tcpip *st_src ); + +#endif /* _IPXE_ICMP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/icmpv6.h b/qemu/roms/ipxe/src/include/ipxe/icmpv6.h new file mode 100644 index 000000000..b5ea54eab --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/icmpv6.h @@ -0,0 +1,63 @@ +#ifndef _IPXE_ICMP6_H +#define _IPXE_ICMP6_H + +/** @file + * + * ICMPv6 protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/tables.h> +#include <ipxe/iobuf.h> +#include <ipxe/netdevice.h> +#include <ipxe/icmp.h> + +/** An ICMPv6 handler */ +struct icmpv6_handler { + /** Type */ + unsigned int type; + /** Process received packet + * + * @v iobuf I/O buffer + * @v netdev Network device + * @v sin6_src Source socket address + * @v sin6_dest Destination socket address + * @ret rc Return status code + * + * This function takes ownership of the I/O buffer. + */ + int ( * rx ) ( struct io_buffer *iobuf, struct net_device *netdev, + struct sockaddr_in6 *sin6_src, + struct sockaddr_in6 *sin6_dest ); +}; + +/** ICMPv6 handler table */ +#define ICMPV6_HANDLERS __table ( struct icmpv6_handler, "icmpv6_handlers" ) + +/** Declare an ICMPv6 handler */ +#define __icmpv6_handler __table_entry ( ICMPV6_HANDLERS, 01 ) + +/** ICMPv6 echo request */ +#define ICMPV6_ECHO_REQUEST 128 + +/** ICMPv6 echo reply */ +#define ICMPV6_ECHO_REPLY 129 + +/** ICMPv6 router solicitation */ +#define ICMPV6_ROUTER_SOLICITATION 133 + +/** ICMPv6 router advertisement */ +#define ICMPV6_ROUTER_ADVERTISEMENT 134 + +/** ICMPv6 neighbour solicitation */ +#define ICMPV6_NEIGHBOUR_SOLICITATION 135 + +/** ICMPv6 neighbour advertisement */ +#define ICMPV6_NEIGHBOUR_ADVERTISEMENT 136 + +extern struct tcpip_protocol icmpv6_protocol __tcpip_protocol; + +#endif /* _IPXE_ICMP6_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ieee80211.h b/qemu/roms/ipxe/src/include/ipxe/ieee80211.h new file mode 100644 index 000000000..4e44f4349 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ieee80211.h @@ -0,0 +1,1161 @@ +#ifndef _IPXE_IEEE80211_H +#define _IPXE_IEEE80211_H + +#include <stddef.h> +#include <ipxe/if_ether.h> /* for ETH_ALEN */ +#include <endian.h> + +/** @file + * Constants and data structures defined in IEEE 802.11, subsetted + * according to what iPXE knows how to use. + */ + +FILE_LICENCE(GPL2_OR_LATER); + +/* ---------- Maximum lengths of things ---------- */ + +/** + * @defgroup ieee80211_maxlen Maximum lengths in the 802.11 protocol + * @{ + */ + +/** Maximum length of frame payload + * + * This does not include cryptographic overhead, which can be up to 20 + * bytes, but it DOES include the 802.2 LLC/SNAP headers that are used + * on data frames (but not management frames). + */ +#define IEEE80211_MAX_DATA_LEN 2304 + +/** Length of LLC/SNAP headers on data frames */ +#define IEEE80211_LLC_HEADER_LEN 8 + +/** Maximum cryptographic overhead before encrypted data */ +#define IEEE80211_MAX_CRYPTO_HEADER 8 + +/** Maximum cryptographic overhead after encrypted data + * + * This does not count the MIC in TKIP frames, since that is + * considered to be part of the MSDU and thus contributes to the size + * of the data field. + * + * It @e does count the MIC in CCMP frames, which is considered part + * of the MPDU (outside the data field). + */ +#define IEEE80211_MAX_CRYPTO_TRAILER 8 + +/** Total maximum cryptographic overhead */ +#define IEEE80211_MAX_CRYPTO_OVERHEAD 16 + +/** Bytes of network-layer data that can go into a regular data frame */ +#define IEEE80211_MAX_FRAME_DATA 2296 + +/** Frame header length for frames we might work with + * + * QoS adds a two-byte field on top of this, and APs communicating + * with each other in Wireless Distribution System (WDS) mode add an + * extra 6-byte MAC address field, but we do not work with such + * frames. + */ +#define IEEE80211_TYP_FRAME_HEADER_LEN 24 + +/** Theoretical maximum frame header length + * + * This includes the QoS and WDS Addr4 fields that we should never + * see. + */ +#define IEEE80211_MAX_FRAME_HEADER_LEN 32 + +/** Maximum combined frame length + * + * The biggest frame will include 32 frame header bytes, 16 bytes of + * crypto overhead, and 2304 data bytes. + */ +#define IEEE80211_MAX_FRAME_LEN 2352 + +/** Maximum length of an ESSID */ +#define IEEE80211_MAX_SSID_LEN 32 + +/** @} */ + + +/* ---------- Frame Control defines ---------- */ + +/** + * @defgroup ieee80211_fc 802.11 Frame Control field bits + * @{ + */ + +/** 802.11 Frame Control field, Version bitmask */ +#define IEEE80211_FC_VERSION 0x0003 + +/** Expected value of Version bits in Frame Control */ +#define IEEE80211_THIS_VERSION 0x0000 + + +/** 802.11 Frame Control field, Frame Type bitmask */ +#define IEEE80211_FC_TYPE 0x000C + +/** Type value for management (layer-2) frames */ +#define IEEE80211_TYPE_MGMT 0x0000 + +/** Type value for control (layer-1, hardware-managed) frames */ +#define IEEE80211_TYPE_CTRL 0x0004 + +/** Type value for data frames */ +#define IEEE80211_TYPE_DATA 0x0008 + + +/** 802.11 Frame Control field, Frame Subtype bitmask */ +#define IEEE80211_FC_SUBTYPE 0x00F0 + +/** Subtype value for association-request management frames + * + * Association request frames are sent after authentication from the + * client to the Access Point to establish the client as part of the + * Access Point's network. + */ +#define IEEE80211_STYPE_ASSOC_REQ 0x0000 + +/** Subtype value for association-response management frames + * + * Association response frames are sent by the Access Point to confirm + * or deny the association requested in an association request frame. + */ +#define IEEE80211_STYPE_ASSOC_RESP 0x0010 + +/** Subtype value for reassociation-request management frames + * + * Reassociation request frames are sent by clients wishing to change + * from one Access Point to another while roaming within the same + * extended network (same ESSID). + */ +#define IEEE80211_STYPE_REASSOC_REQ 0x0020 + +/** Subtype value for reassociation-response management frames + * + * Reassociation response frames are sent by the Access Point to + * confirm or deny the swap requested in a reassociation request + * frame. + */ +#define IEEE80211_STYPE_REASSOC_RESP 0x0030 + +/** Subtype value for probe-request management frames + * + * Probe request frames are sent by clients to request that all Access + * Points on the sending channel, or all belonging to a particular + * ESSID, identify themselves by BSSID, supported transfer rates, RF + * configuration, and other capabilities. + */ +#define IEEE80211_STYPE_PROBE_REQ 0x0040 + +/** Subtype value for probe-response management frames + * + * Probe response frames are sent by Access Points in response to + * probe request frames, providing the requested information. + */ +#define IEEE80211_STYPE_PROBE_RESP 0x0050 + +/** Subtype value for beacon management frames + * + * Beacon frames are sent by Access Points at regular intervals, + * usually ten per second, on the channel on which they communicate. + * They can be used to probe passively for access points on a channel + * where local regulatory restrictions prohibit active scanning, or + * due to their regularity as a mechanism to determine the fraction of + * packets that are being dropped. + */ +#define IEEE80211_STYPE_BEACON 0x0080 + +/** Subtype value for disassociation management frames + * + * Disassociation frames are sent by either a client or an Access + * Point to unequivocally terminate the association between the two. + * They may be sent by clients upon leaving the network, or by an + * Access Point upon reconfiguration, among other reasons; they are + * usually more "polite" than deauthentication frames. + */ +#define IEEE80211_STYPE_DISASSOC 0x00A0 + +/** Subtype value for authentication management frames + * + * Authentication frames are exchanged between a client and an Access + * Point before association may be performed. Confusingly, in the most + * common authentication method (Open System) no security tokens are + * exchanged at all. Modern 802.11 security handshaking takes place + * after association. + */ +#define IEEE80211_STYPE_AUTH 0x00B0 + +/** Subtype value for deauthentication management frames + * + * Deauthentication frames are sent by either a client or an Access + * Point to terminate the authentication (and therefore also the + * association) between the two. They are generally more forceful than + * disassociation frames, sent for such reasons as a failure to + * set up security properly after associating. + */ +#define IEEE80211_STYPE_DEAUTH 0x00C0 + +/** Subtype value for action management frames + * + * Action frames are used to implement spectrum management and QoS + * features that iPXE currently does not support. + */ +#define IEEE80211_STYPE_ACTION 0x00D0 + + +/** Subtype value for RTS (request to send) control frames */ +#define IEEE80211_STYPE_RTS 0x00B0 + +/** Subtype value for CTS (clear to send) control frames */ +#define IEEE80211_STYPE_CTS 0x00C0 + +/** Subtype value for ACK (acknowledgement) control frames */ +#define IEEE80211_STYPE_ACK 0x00D0 + + +/** Subtype value for ordinary data frames, with no QoS or CF add-ons */ +#define IEEE80211_STYPE_DATA 0x0000 + +/** Subtype value for data frames containing no data */ +#define IEEE80211_STYPE_NODATA 0x0040 + + +/** 802.11 Frame Control field: To Data System flag + * + * This is set on data frames sent to an Access Point. + */ +#define IEEE80211_FC_TODS 0x0100 + +/** 802.11 Frame Control field: From Data System flag + * + * This is set on data frames sent from an Access Point. If both TODS + * and FROMDS are set, the frame header is a 4-address format used for + * inter-Access Point communication. + */ +#define IEEE80211_FC_FROMDS 0x0200 + +/** 802.11 Frame Control field: More Fragments flag */ +#define IEEE80211_FC_MORE_FRAG 0x0400 + +/** 802.11 Frame Control field: Retransmission flag */ +#define IEEE80211_FC_RETRY 0x0800 + +/** 802.11 Frame Control field: Power Managed flag + * + * This is set on any frame sent by a low-power station that will go + * into a power-saving mode immediately after this frame. Access + * Points are not allowed to act as low-power stations. + */ +#define IEEE80211_FC_PWR_MGMT 0x1000 + +/** 802.11 Frame Control field: More Data flag + * + * This is set on any frame sent by a station that has more data + * queued to be sent than is in the frame. + */ +#define IEEE80211_FC_MORE_DATA 0x2000 + +/** 802.11 Frame Control field: Protected flag + * + * This is set on frames in which data is encrypted (by any method). + */ +#define IEEE80211_FC_PROTECTED 0x4000 + +/** 802.11 Frame Control field: Ordered flag [?] */ +#define IEEE80211_FC_ORDER 0x8000 + +/** @} */ + + +/* ---------- Sequence Control defines ---------- */ + +/** + * @defgroup ieee80211_seq 802.11 Sequence Control field handling + * @{ + */ + +/** Extract sequence number from 802.11 Sequence Control field */ +#define IEEE80211_SEQNR( seq ) ( ( seq ) >> 4 ) + +/** Extract fragment number from 802.11 Sequence Control field */ +#define IEEE80211_FRAG( seq ) ( ( seq ) & 0x000F ) + +/** Make 802.11 Sequence Control field from sequence and fragment numbers */ +#define IEEE80211_MAKESEQ( seqnr, frag ) \ + ( ( ( ( seqnr ) & 0xFFF ) << 4 ) | ( ( frag ) & 0xF ) ) + +/** @} */ + + +/* ---------- Frame header formats ---------- */ + +/** + * @defgroup ieee80211_hdr 802.11 frame header formats + * @{ + */ + +/** An 802.11 data or management frame without QoS or WDS header fields */ +struct ieee80211_frame +{ + u16 fc; /**< 802.11 Frame Control field */ + u16 duration; /**< Microseconds to reserve link */ + u8 addr1[ETH_ALEN]; /**< Address 1 (immediate receiver) */ + u8 addr2[ETH_ALEN]; /**< Address 2 (immediate sender) */ + u8 addr3[ETH_ALEN]; /**< Address 3 (often "forward to") */ + u16 seq; /**< 802.11 Sequence Control field */ + u8 data[0]; /**< Beginning of frame data */ +} __attribute__((packed)); + +/** The 802.2 LLC/SNAP header sent before actual data in a data frame + * + * This header is not acknowledged in the 802.11 standard at all; it + * is treated just like data for MAC-layer purposes, including + * fragmentation and encryption. It is actually two headers + * concatenated: a three-byte 802.2 LLC header indicating Subnetwork + * Accesss Protocol (SNAP) in both source and destination Service + * Access Point (SAP) fields, and a five-byte SNAP header indicating a + * zero OUI and two-byte Ethernet protocol type field. + * + * Thus, an eight-byte header in which six of the bytes are redundant. + * Lovely, isn't it? + */ +struct ieee80211_llc_snap_header +{ + /* LLC part: */ + u8 dsap; /**< Destination SAP ID */ + u8 ssap; /**< Source SAP ID */ + u8 ctrl; /**< Control information */ + + /* SNAP part: */ + u8 oui[3]; /**< Organization code, usually 0 */ + u16 ethertype; /**< Ethernet Type field */ +} __attribute__((packed)); + +/** Value for DSAP field in 802.2 LLC header for 802.11 frames: SNAP */ +#define IEEE80211_LLC_DSAP 0xAA + +/** Value for SSAP field in 802.2 LLC header for 802.11 frames: SNAP */ +#define IEEE80211_LLC_SSAP 0xAA + +/** Value for control field in 802.2 LLC header for 802.11 frames + * + * "Unnumbered Information". + */ +#define IEEE80211_LLC_CTRL 0x03 + + +/** 16-byte RTS frame format, with abbreviated header */ +struct ieee80211_rts +{ + u16 fc; /**< 802.11 Frame Control field */ + u16 duration; /**< Microseconds to reserve link */ + u8 addr1[ETH_ALEN]; /**< Address 1 (immediate receiver) */ + u8 addr2[ETH_ALEN]; /**< Address 2 (immediate sender) */ +} __attribute__((packed)); + +/** Length of 802.11 RTS control frame */ +#define IEEE80211_RTS_LEN 16 + +/** 10-byte CTS or ACK frame format, with abbreviated header */ +struct ieee80211_cts_or_ack +{ + u16 fc; /**< 802.11 Frame Control field */ + u16 duration; /**< Microseconds to reserve link */ + u8 addr1[ETH_ALEN]; /**< Address 1 (immediate receiver) */ +} __attribute__((packed)); + +#define ieee80211_cts ieee80211_cts_or_ack +#define ieee80211_ack ieee80211_cts_or_ack + +/** Length of 802.11 CTS control frame */ +#define IEEE80211_CTS_LEN 10 + +/** Length of 802.11 ACK control frame */ +#define IEEE80211_ACK_LEN 10 + +/** @} */ + + +/* ---------- Capability bits, status and reason codes ---------- */ + +/** + * @defgroup ieee80211_capab 802.11 management frame capability field bits + * @{ + */ + +/** Set if using an Access Point (managed mode) */ +#define IEEE80211_CAPAB_MANAGED 0x0001 + +/** Set if operating in IBSS (no-AP, "Ad-Hoc") mode */ +#define IEEE80211_CAPAB_ADHOC 0x0002 + +/** Set if we support Contention-Free Period operation */ +#define IEEE80211_CAPAB_CFPOLL 0x0004 + +/** Set if we wish to be polled for Contention-Free operation */ +#define IEEE80211_CAPAB_CFPR 0x0008 + +/** Set if the network is encrypted (by any method) */ +#define IEEE80211_CAPAB_PRIVACY 0x0010 + +/** Set if PHY supports short preambles on 802.11b */ +#define IEEE80211_CAPAB_SHORT_PMBL 0x0020 + +/** Set if PHY supports PBCC modulation */ +#define IEEE80211_CAPAB_PBCC 0x0040 + +/** Set if we support Channel Agility */ +#define IEEE80211_CAPAB_CHAN_AGILITY 0x0080 + +/** Set if we support spectrum management (DFS and TPC) on the 5GHz band */ +#define IEEE80211_CAPAB_SPECTRUM_MGMT 0x0100 + +/** Set if we support Quality of Service enhancements */ +#define IEEE80211_CAPAB_QOS 0x0200 + +/** Set if PHY supports short slot time on 802.11g */ +#define IEEE80211_CAPAB_SHORT_SLOT 0x0400 + +/** Set if PHY supports APSD option */ +#define IEEE80211_CAPAB_APSD 0x0800 + +/** Set if PHY supports DSSS/OFDM modulation (one way of 802.11 b/g mixing) */ +#define IEEE80211_CAPAB_DSSS_OFDM 0x2000 + +/** Set if we support delayed block ACK */ +#define IEEE80211_CAPAB_DELAYED_BACK 0x4000 + +/** Set if we support immediate block ACK */ +#define IEEE80211_CAPAB_IMMED_BACK 0x8000 + +/** @} */ + + +/** + * @defgroup ieee80211_status 802.11 status codes + * + * These are returned to indicate an immediate denial of + * authentication or association. In iPXE, the lower 5 bits of the + * status code are encoded into the file-unique portion of an error + * code, the ERRFILE portion is always @c ERRFILE_net80211, and the + * POSIX error code is @c ECONNREFUSED for status 0-31 or @c + * EHOSTUNREACH for status 32-63. + * + * For a complete table with non-abbreviated error messages, see IEEE + * Std 802.11-2007, Table 7-23, p.94. + * + * @{ + */ + +#define IEEE80211_STATUS_SUCCESS 0 +#define IEEE80211_STATUS_FAILURE 1 +#define IEEE80211_STATUS_CAPAB_UNSUPP 10 +#define IEEE80211_STATUS_REASSOC_INVALID 11 +#define IEEE80211_STATUS_ASSOC_DENIED 12 +#define IEEE80211_STATUS_AUTH_ALGO_UNSUPP 13 +#define IEEE80211_STATUS_AUTH_SEQ_INVALID 14 +#define IEEE80211_STATUS_AUTH_CHALL_INVALID 15 +#define IEEE80211_STATUS_AUTH_TIMEOUT 16 +#define IEEE80211_STATUS_ASSOC_NO_ROOM 17 +#define IEEE80211_STATUS_ASSOC_NEED_RATE 18 +#define IEEE80211_STATUS_ASSOC_NEED_SHORT_PMBL 19 +#define IEEE80211_STATUS_ASSOC_NEED_PBCC 20 +#define IEEE80211_STATUS_ASSOC_NEED_CHAN_AGILITY 21 +#define IEEE80211_STATUS_ASSOC_NEED_SPECTRUM_MGMT 22 +#define IEEE80211_STATUS_ASSOC_BAD_POWER 23 +#define IEEE80211_STATUS_ASSOC_BAD_CHANNELS 24 +#define IEEE80211_STATUS_ASSOC_NEED_SHORT_SLOT 25 +#define IEEE80211_STATUS_ASSOC_NEED_DSSS_OFDM 26 +#define IEEE80211_STATUS_QOS_FAILURE 32 +#define IEEE80211_STATUS_QOS_NO_ROOM 33 +#define IEEE80211_STATUS_LINK_IS_HORRIBLE 34 +#define IEEE80211_STATUS_ASSOC_NEED_QOS 35 +#define IEEE80211_STATUS_REQUEST_DECLINED 37 +#define IEEE80211_STATUS_REQUEST_INVALID 38 +#define IEEE80211_STATUS_TS_NOT_CREATED_AGAIN 39 +#define IEEE80211_STATUS_INVALID_IE 40 +#define IEEE80211_STATUS_GROUP_CIPHER_INVALID 41 +#define IEEE80211_STATUS_PAIR_CIPHER_INVALID 42 +#define IEEE80211_STATUS_AKMP_INVALID 43 +#define IEEE80211_STATUS_RSN_VERSION_UNSUPP 44 +#define IEEE80211_STATUS_RSN_CAPAB_INVALID 45 +#define IEEE80211_STATUS_CIPHER_REJECTED 46 +#define IEEE80211_STATUS_TS_NOT_CREATED_WAIT 47 +#define IEEE80211_STATUS_DIRECT_LINK_FORBIDDEN 48 +#define IEEE80211_STATUS_DEST_NOT_PRESENT 49 +#define IEEE80211_STATUS_DEST_NOT_QOS 50 +#define IEEE80211_STATUS_ASSOC_LISTEN_TOO_HIGH 51 + +/** @} */ + + + +/** + * @defgroup ieee80211_reason 802.11 reason codes + * + * These are returned to indicate the reason for a deauthentication or + * disassociation sent (usually) after authentication or association + * had succeeded. In iPXE, the lower 5 bits of the reason code are + * encoded into the file-unique portion of an error code, the ERRFILE + * portion is always @c ERRFILE_net80211, and the POSIX error code is + * @c ECONNRESET for reason 0-31 or @c ENETRESET for reason 32-63. + * + * For a complete table with non-abbreviated error messages, see IEEE + * Std 802.11-2007, Table 7-22, p.92. + * + * @{ + */ + +#define IEEE80211_REASON_NONE 0 +#define IEEE80211_REASON_UNSPECIFIED 1 +#define IEEE80211_REASON_AUTH_NO_LONGER_VALID 2 +#define IEEE80211_REASON_LEAVING 3 +#define IEEE80211_REASON_INACTIVITY 4 +#define IEEE80211_REASON_OUT_OF_RESOURCES 5 +#define IEEE80211_REASON_NEED_AUTH 6 +#define IEEE80211_REASON_NEED_ASSOC 7 +#define IEEE80211_REASON_LEAVING_TO_ROAM 8 +#define IEEE80211_REASON_REASSOC_INVALID 9 +#define IEEE80211_REASON_BAD_POWER 10 +#define IEEE80211_REASON_BAD_CHANNELS 11 +#define IEEE80211_REASON_INVALID_IE 13 +#define IEEE80211_REASON_MIC_FAILURE 14 +#define IEEE80211_REASON_4WAY_TIMEOUT 15 +#define IEEE80211_REASON_GROUPKEY_TIMEOUT 16 +#define IEEE80211_REASON_4WAY_INVALID 17 +#define IEEE80211_REASON_GROUP_CIPHER_INVALID 18 +#define IEEE80211_REASON_PAIR_CIPHER_INVALID 19 +#define IEEE80211_REASON_AKMP_INVALID 20 +#define IEEE80211_REASON_RSN_VERSION_INVALID 21 +#define IEEE80211_REASON_RSN_CAPAB_INVALID 22 +#define IEEE80211_REASON_8021X_FAILURE 23 +#define IEEE80211_REASON_CIPHER_REJECTED 24 +#define IEEE80211_REASON_QOS_UNSPECIFIED 32 +#define IEEE80211_REASON_QOS_OUT_OF_RESOURCES 33 +#define IEEE80211_REASON_LINK_IS_HORRIBLE 34 +#define IEEE80211_REASON_INVALID_TXOP 35 +#define IEEE80211_REASON_REQUESTED_LEAVING 36 +#define IEEE80211_REASON_REQUESTED_NO_USE 37 +#define IEEE80211_REASON_REQUESTED_NEED_SETUP 38 +#define IEEE80211_REASON_REQUESTED_TIMEOUT 39 +#define IEEE80211_REASON_CIPHER_UNSUPPORTED 45 + +/** @} */ + +/* ---------- Information element declarations ---------- */ + +/** + * @defgroup ieee80211_ie 802.11 information elements + * + * Many management frames include a section that amounts to a + * concatenation of these information elements, so that the sender can + * choose which information to send and the receiver can ignore the + * parts it doesn't understand. Each IE contains a two-byte header, + * one byte ID and one byte length, followed by IE-specific data. The + * length does not include the two-byte header. Information elements + * are required to be sorted by ID, but iPXE does not require that in + * those it receives. + * + * This group also includes a few inline functions to simplify common + * tasks in IE processing. + * + * @{ + */ + +/** Generic 802.11 information element header */ +struct ieee80211_ie_header { + u8 id; /**< Information element ID */ + u8 len; /**< Information element length */ +} __attribute__ ((packed)); + + +/** 802.11 SSID information element */ +struct ieee80211_ie_ssid { + u8 id; /**< SSID ID: 0 */ + u8 len; /**< SSID length */ + char ssid[0]; /**< SSID data, not NUL-terminated */ +} __attribute__ ((packed)); + +/** Information element ID for SSID information element */ +#define IEEE80211_IE_SSID 0 + + +/** 802.11 rates information element + * + * The first 8 rates go in an IE of type RATES (1), and any more rates + * go in one of type EXT_RATES (50). Each rate is a byte with the low + * 7 bits equal to the rate in units of 500 kbps, and the high bit set + * if and only if the rate is "basic" (must be supported by all + * connected stations). + */ +struct ieee80211_ie_rates { + u8 id; /**< Rates ID: 1 or 50 */ + u8 len; /**< Number of rates */ + u8 rates[0]; /**< Rates data, one rate per byte */ +} __attribute__ ((packed)); + +/** Information element ID for rates information element */ +#define IEEE80211_IE_RATES 1 + +/** Information element ID for extended rates information element */ +#define IEEE80211_IE_EXT_RATES 50 + + +/** 802.11 Direct Spectrum parameter information element + * + * This just contains the channel number. It has the fancy name + * because IEEE 802.11 also defines a frequency-hopping PHY that + * changes channels at regular intervals following a predetermined + * pattern; in practice nobody uses the FH PHY. + */ +struct ieee80211_ie_ds_param { + u8 id; /**< DS parameter ID: 3 */ + u8 len; /**< DS parameter length: 1 */ + u8 current_channel; /**< Current channel number, 1-14 */ +} __attribute__ ((packed)); + +/** Information element ID for Direct Spectrum parameter information element */ +#define IEEE80211_IE_DS_PARAM 3 + + +/** 802.11 Country information element regulatory extension triplet */ +struct ieee80211_ie_country_ext_triplet { + u8 reg_ext_id; /**< Regulatory extension ID */ + u8 reg_class_id; /**< Regulatory class ID */ + u8 coverage_class; /**< Coverage class */ +} __attribute__ ((packed)); + +/** 802.11 Country information element regulatory band triplet */ +struct ieee80211_ie_country_band_triplet { + u8 first_channel; /**< Channel number for first channel in band */ + u8 nr_channels; /**< Number of contiguous channels in band */ + u8 max_txpower; /**< Maximum TX power in dBm */ +} __attribute__ ((packed)); + +/** 802.11 Country information element regulatory triplet + * + * It is a band triplet if the first byte is 200 or less, and a + * regulatory extension triplet otherwise. + */ +union ieee80211_ie_country_triplet { + /** Differentiator between band and ext triplets */ + u8 first; + + /** Information about a band of channels */ + struct ieee80211_ie_country_band_triplet band; + + /** Regulatory extension information */ + struct ieee80211_ie_country_ext_triplet ext; +}; + +/** 802.11 Country information element + * + * This contains some data about RF regulations. + */ +struct ieee80211_ie_country { + u8 id; /**< Country information ID: 7 */ + u8 len; /**< Country information length: varies */ + char name[2]; /**< ISO Alpha2 country code */ + char in_out; /**< 'I' for indoor, 'O' for outdoor */ + + /** List of regulatory triplets */ + union ieee80211_ie_country_triplet triplet[0]; +} __attribute__ ((packed)); + +/** Information element ID for Country information element */ +#define IEEE80211_IE_COUNTRY 7 + + +/** 802.11 Request information element + * + * This contains a list of information element types we would like to + * be included in probe response frames. + */ +struct ieee80211_ie_request { + u8 id; /**< Request ID: 10 */ + u8 len; /**< Number of IEs requested */ + u8 request[0]; /**< List of IEs requested */ +} __attribute__ ((packed)); + +/** Information element ID for Request information element */ +#define IEEE80211_IE_REQUEST 10 + + +/** 802.11 Challenge Text information element + * + * This is used in authentication frames under Shared Key + * authentication. + */ +struct ieee80211_ie_challenge_text { + u8 id; /**< Challenge Text ID: 16 */ + u8 len; /**< Challenge Text length: usually 128 */ + u8 challenge_text[0]; /**< Challenge Text data */ +} __attribute__ ((packed)); + +/** Information element ID for Challenge Text information element */ +#define IEEE80211_IE_CHALLENGE_TEXT 16 + + +/** 802.11 Power Constraint information element + * + * This is used to specify an additional power limitation on top of + * the Country requirements. + */ +struct ieee80211_ie_power_constraint { + u8 id; /**< Power Constraint ID: 52 */ + u8 len; /**< Power Constraint length: 1 */ + u8 power_constraint; /**< Decrease in allowed TX power, dBm */ +} __attribute__ ((packed)); + +/** Information element ID for Power Constraint information element */ +#define IEEE80211_IE_POWER_CONSTRAINT 52 + + +/** 802.11 Power Capability information element + * + * This is used in association request frames to indicate the extremes + * of our TX power abilities. It is required only if we indicate + * support for spectrum management. + */ +struct ieee80211_ie_power_capab { + u8 id; /**< Power Capability ID: 33 */ + u8 len; /**< Power Capability length: 2 */ + u8 min_txpower; /**< Minimum possible TX power, dBm */ + u8 max_txpower; /**< Maximum possible TX power, dBm */ +} __attribute__ ((packed)); + +/** Information element ID for Power Capability information element */ +#define IEEE80211_IE_POWER_CAPAB 33 + + +/** 802.11 Channels information element channel band tuple */ +struct ieee80211_ie_channels_channel_band { + u8 first_channel; /**< Channel number of first channel in band */ + u8 nr_channels; /**< Number of channels in band */ +} __attribute__ ((packed)); + +/** 802.11 Channels information element + * + * This is used in association frames to indicate the channels we can + * use. It is required only if we indicate support for spectrum + * management. + */ +struct ieee80211_ie_channels { + u8 id; /**< Channels ID: 36 */ + u8 len; /**< Channels length: 2 */ + + /** List of (start, length) channel bands we can use */ + struct ieee80211_ie_channels_channel_band channels[0]; +} __attribute__ ((packed)); + +/** Information element ID for Channels information element */ +#define IEEE80211_IE_CHANNELS 36 + + +/** 802.11 ERP Information information element + * + * This is used to communicate some PHY-level flags. + */ +struct ieee80211_ie_erp_info { + u8 id; /**< ERP Information ID: 42 */ + u8 len; /**< ERP Information length: 1 */ + u8 erp_info; /**< ERP flags */ +} __attribute__ ((packed)); + +/** Information element ID for ERP Information information element */ +#define IEEE80211_IE_ERP_INFO 42 + +/** ERP information element: Flag set if 802.11b stations are present */ +#define IEEE80211_ERP_NONERP_PRESENT 0x01 + +/** ERP information element: Flag set if CTS protection must be used */ +#define IEEE80211_ERP_USE_PROTECTION 0x02 + +/** ERP information element: Flag set if long preambles must be used */ +#define IEEE80211_ERP_BARKER_LONG 0x04 + + +/** 802.11 Robust Security Network ("WPA") information element + * + * Showing once again a striking clarity of design, the IEEE folks put + * dynamically-sized data in the middle of this structure. As such, + * the below structure definition only works for IEs we create + * ourselves, which always have one pairwise cipher and one AKM; + * received IEs should be parsed piecemeal. + * + * Also inspired was IEEE's choice of 16-bit fields to count the + * number of 4-byte elements in a structure with a maximum length of + * 255 bytes. + * + * Many fields reference a cipher or authentication-type ID; this is a + * three-byte OUI followed by one byte identifying the cipher with + * respect to that OUI. For all standard ciphers the OUI is 00:0F:AC, + * except in old-style WPA IEs encapsulated in vendor-specific IEs, + * where it's 00:50:F2. + */ +struct ieee80211_ie_rsn { + /** Information element ID */ + u8 id; + + /** Information element length */ + u8 len; + + /** RSN information element version */ + u16 version; + + /** Cipher ID for the cipher used in multicast/broadcast frames */ + u32 group_cipher; + + /** Number of unicast ciphers supported */ + u16 pairwise_count; + + /** List of cipher IDs for supported unicast frame ciphers */ + u32 pairwise_cipher[1]; + + /** Number of authentication types supported */ + u16 akm_count; + + /** List of authentication type IDs for supported types */ + u32 akm_list[1]; + + /** Security capabilities field (RSN only) */ + u16 rsn_capab; + + /** Number of PMKIDs included (present only in association frames) */ + u16 pmkid_count; + + /** List of PMKIDs included, each a 16-byte SHA1 hash */ + u8 pmkid_list[0]; +} __attribute__((packed)); + +/** Information element ID for Robust Security Network information element */ +#define IEEE80211_IE_RSN 48 + +/** Calculate necessary size of RSN information element + * + * @v npair Number of pairwise ciphers supported + * @v nauth Number of authentication types supported + * @v npmkid Number of PMKIDs to include + * @v is_rsn If TRUE, calculate RSN IE size; if FALSE, calculate WPA IE size + * @ret size Necessary size of IE, including header bytes + */ +static inline size_t ieee80211_rsn_size ( int npair, int nauth, int npmkid, + int rsn_ie ) { + return 16 + 4 * ( npair + nauth ) + 16 * npmkid - 4 * ! rsn_ie; +} + +/** Make OUI plus type byte into 32-bit integer for easy comparison */ +#if __BYTE_ORDER == __BIG_ENDIAN +#define _MKOUI( a, b, c, t ) \ + ( ( ( a ) << 24 ) | ( ( b ) << 16 ) | ( ( c ) << 8 ) | ( d ) ) +#define OUI_ORG_MASK 0xFFFFFF00 +#define OUI_TYPE_MASK 0x000000FF +#else +#define _MKOUI( a, b, c, t ) \ + ( ( ( t ) << 24 ) | ( ( c ) << 16 ) | ( ( b ) << 8 ) | ( a ) ) +#define OUI_ORG_MASK 0x00FFFFFF +#define OUI_TYPE_MASK 0xFF000000 +#endif + +/** Organization part for OUIs in standard RSN IE */ +#define IEEE80211_RSN_OUI _MKOUI ( 0x00, 0x0F, 0xAC, 0 ) + +/** Organization part for OUIs in old WPA IE */ +#define IEEE80211_WPA_OUI _MKOUI ( 0x00, 0x50, 0xF2, 0 ) + +/** Old vendor-type WPA IE OUI type + subtype */ +#define IEEE80211_WPA_OUI_VEN _MKOUI ( 0x00, 0x50, 0xF2, 0x01 ) + + +/** 802.11 RSN IE: expected version number */ +#define IEEE80211_RSN_VERSION 1 + +/** 802.11 RSN IE: cipher type for 40-bit WEP */ +#define IEEE80211_RSN_CTYPE_WEP40 _MKOUI ( 0, 0, 0, 0x01 ) + +/** 802.11 RSN IE: cipher type for 104-bit WEP */ +#define IEEE80211_RSN_CTYPE_WEP104 _MKOUI ( 0, 0, 0, 0x05 ) + +/** 802.11 RSN IE: cipher type for TKIP ("WPA") */ +#define IEEE80211_RSN_CTYPE_TKIP _MKOUI ( 0, 0, 0, 0x02 ) + +/** 802.11 RSN IE: cipher type for CCMP ("WPA2") */ +#define IEEE80211_RSN_CTYPE_CCMP _MKOUI ( 0, 0, 0, 0x04 ) + +/** 802.11 RSN IE: cipher type for "use group" + * + * This can only appear as a pairwise cipher, and means unicast frames + * should be encrypted in the same way as broadcast/multicast frames. + */ +#define IEEE80211_RSN_CTYPE_USEGROUP _MKOUI ( 0, 0, 0, 0x00 ) + +/** 802.11 RSN IE: auth method type for using an 802.1X server */ +#define IEEE80211_RSN_ATYPE_8021X _MKOUI ( 0, 0, 0, 0x01 ) + +/** 802.11 RSN IE: auth method type for using a pre-shared key */ +#define IEEE80211_RSN_ATYPE_PSK _MKOUI ( 0, 0, 0, 0x02 ) + +/** 802.11 RSN IE capabilities: AP supports pre-authentication */ +#define IEEE80211_RSN_CAPAB_PREAUTH 0x001 + +/** 802.11 RSN IE capabilities: Node has conflict between TKIP and WEP + * + * This is a legacy issue; APs always set it to 0, and iPXE sets it to + * 0. + */ +#define IEEE80211_RSN_CAPAB_NO_PAIRWISE 0x002 + +/** 802.11 RSN IE capabilities: Number of PTKSA replay counters + * + * A value of 0 means one replay counter, 1 means two, 2 means four, + * and 3 means sixteen. + */ +#define IEEE80211_RSN_CAPAB_PTKSA_REPLAY 0x00C + +/** 802.11 RSN IE capabilities: Number of GTKSA replay counters + * + * A value of 0 means one replay counter, 1 means two, 2 means four, + * and 3 means sixteen. + */ +#define IEEE80211_RSN_CAPAB_GTKSA_REPLAY 0x030 + +/** 802.11 RSN IE capabilities: PeerKey Handshaking is suported */ +#define IEEE80211_RSN_CAPAB_PEERKEY 0x200 + + +/** 802.11 RSN IE capabilities: One replay counter + * + * This should be AND'ed with @c IEEE80211_RSN_CAPAB_PTKSA_REPLAY or + * @c IEEE80211_RSN_CAPAB_GTKSA_REPLAY (or both) to produce a value + * which can be OR'ed into the capabilities field. + */ +#define IEEE80211_RSN_1_CTR 0x000 + +/** 802.11 RSN IE capabilities: Two replay counters */ +#define IEEE80211_RSN_2_CTR 0x014 + +/** 802.11 RSN IE capabilities: Four replay counters */ +#define IEEE80211_RSN_4_CTR 0x028 + +/** 802.11 RSN IE capabilities: 16 replay counters */ +#define IEEE80211_RSN_16_CTR 0x03C + + +/** 802.11 Vendor Specific information element + * + * One often sees the RSN IE masquerading as vendor-specific on + * devices that were produced prior to 802.11i (the WPA amendment) + * being finalized. + */ +struct ieee80211_ie_vendor { + u8 id; /**< Vendor-specific ID: 221 */ + u8 len; /**< Vendor-specific length: variable */ + u32 oui; /**< OUI and vendor-specific type byte */ + u8 data[0]; /**< Vendor-specific data */ +} __attribute__ ((packed)); + +/** Information element ID for Vendor Specific information element */ +#define IEEE80211_IE_VENDOR 221 + + + + +/** Any 802.11 information element + * + * This is formatted for ease of use, so IEs with complex structures + * get referenced in full, while those with only one byte of data or a + * simple array are pulled in to avoid a layer of indirection like + * ie->channels.channels[0]. + */ +union ieee80211_ie +{ + /** Generic and simple information element info */ + struct { + u8 id; /**< Information element ID */ + u8 len; /**< Information element data length */ + union { + char ssid[0]; /**< SSID text */ + u8 rates[0]; /**< Rates data */ + u8 request[0]; /**< Request list */ + u8 challenge_text[0]; /**< Challenge text data */ + u8 power_constraint; /**< Power constraint, dBm */ + u8 erp_info; /**< ERP information flags */ + /** List of channels */ + struct ieee80211_ie_channels_channel_band channels[0]; + }; + }; + + /** DS parameter set */ + struct ieee80211_ie_ds_param ds_param; + + /** Country information */ + struct ieee80211_ie_country country; + + /** Power capability */ + struct ieee80211_ie_power_capab power_capab; + + /** Security information */ + struct ieee80211_ie_rsn rsn; + + /** Vendor-specific */ + struct ieee80211_ie_vendor vendor; +}; + +/** Check that 802.11 information element is bounded by buffer + * + * @v ie Information element + * @v end End of buffer in which information element is stored + * @ret ok TRUE if the IE is completely contained within the buffer + */ +static inline int ieee80211_ie_bound ( union ieee80211_ie *ie, void *end ) +{ + void *iep = ie; + return ( iep + 2 <= end && iep + 2 + ie->len <= end ); +} + +/** Advance to next 802.11 information element + * + * @v ie Current information element pointer + * @v end Pointer to first byte not in information element space + * @ret next Pointer to next information element, or NULL if no more + * + * When processing received IEs, @a end should be set to the I/O + * buffer tail pointer; when marshalling IEs for sending, @a end + * should be NULL. + */ +static inline union ieee80211_ie * ieee80211_next_ie ( union ieee80211_ie *ie, + void *end ) +{ + void *next_ie_byte = ( void * ) ie + ie->len + 2; + union ieee80211_ie *next_ie = next_ie_byte; + + if ( ! end ) + return next_ie; + + if ( ieee80211_ie_bound ( next_ie, end ) ) + return next_ie; + + return NULL; +} + +/** @} */ + + +/* ---------- Management frame data formats ---------- */ + +/** + * @defgroup ieee80211_mgmt_data Management frame data payloads + * @{ + */ + +/** Beacon or probe response frame data */ +struct ieee80211_beacon_or_probe_resp +{ + /** 802.11 TSFT value at frame send */ + u64 timestamp; + + /** Interval at which beacons are sent, in units of 1024 us */ + u16 beacon_interval; + + /** Capability flags */ + u16 capability; + + /** List of information elements */ + union ieee80211_ie info_element[0]; +} __attribute__((packed)); + +#define ieee80211_beacon ieee80211_beacon_or_probe_resp +#define ieee80211_probe_resp ieee80211_beacon_or_probe_resp + +/** Disassociation or deauthentication frame data */ +struct ieee80211_disassoc_or_deauth +{ + /** Reason code */ + u16 reason; +} __attribute__((packed)); + +#define ieee80211_disassoc ieee80211_disassoc_or_deauth +#define ieee80211_deauth ieee80211_disassoc_or_deauth + +/** Association request frame data */ +struct ieee80211_assoc_req +{ + /** Capability flags */ + u16 capability; + + /** Interval at which we wake up, in units of the beacon interval */ + u16 listen_interval; + + /** List of information elements */ + union ieee80211_ie info_element[0]; +} __attribute__((packed)); + +/** Association or reassociation response frame data */ +struct ieee80211_assoc_or_reassoc_resp +{ + /** Capability flags */ + u16 capability; + + /** Status code */ + u16 status; + + /** Association ID */ + u16 aid; + + /** List of information elements */ + union ieee80211_ie info_element[0]; +} __attribute__((packed)); + +#define ieee80211_assoc_resp ieee80211_assoc_or_reassoc_resp +#define ieee80211_reassoc_resp ieee80211_assoc_or_reassoc_resp + +/** Reassociation request frame data */ +struct ieee80211_reassoc_req +{ + /** Capability flags */ + u16 capability; + + /** Interval at which we wake up, in units of the beacon interval */ + u16 listen_interval; + + /** MAC address of current Access Point */ + u8 current_addr[ETH_ALEN]; + + /** List of information elements */ + union ieee80211_ie info_element[0]; +} __attribute__((packed)); + +/** Probe request frame data */ +struct ieee80211_probe_req +{ + /** List of information elements */ + union ieee80211_ie info_element[0]; +} __attribute__((packed)); + +/** Authentication frame data */ +struct ieee80211_auth +{ + /** Authentication algorithm (Open System or Shared Key) */ + u16 algorithm; + + /** Sequence number of this frame; first from client to AP is 1 */ + u16 tx_seq; + + /** Status code */ + u16 status; + + /** List of information elements */ + union ieee80211_ie info_element[0]; +} __attribute__((packed)); + +/** Open System authentication algorithm */ +#define IEEE80211_AUTH_OPEN_SYSTEM 0 + +/** Shared Key authentication algorithm */ +#define IEEE80211_AUTH_SHARED_KEY 1 + +/** @} */ + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/if_arp.h b/qemu/roms/ipxe/src/include/ipxe/if_arp.h new file mode 100644 index 000000000..fd36e9c67 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/if_arp.h @@ -0,0 +1,102 @@ +#ifndef _IPXE_IF_ARP_H +#define _IPXE_IF_ARP_H + +/** @file + * + * Address Resolution Protocol constants and types + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +/* ARP protocol HARDWARE identifiers. */ +#define ARPHRD_NETROM 0 /**< from KA9Q: NET/ROM pseudo */ +#define ARPHRD_ETHER 1 /**< Ethernet 10Mbps */ +#define ARPHRD_EETHER 2 /**< Experimental Ethernet */ +#define ARPHRD_AX25 3 /**< AX.25 Level 2 */ +#define ARPHRD_PRONET 4 /**< PROnet token ring */ +#define ARPHRD_CHAOS 5 /**< Chaosnet */ +#define ARPHRD_IEEE802 6 /**< IEEE 802.2 Ethernet/TR/TB */ +#define ARPHRD_ARCNET 7 /**< ARCnet */ +#define ARPHRD_APPLETLK 8 /**< APPLEtalk */ +#define ARPHRD_DLCI 15 /**< Frame Relay DLCI */ +#define ARPHRD_ATM 19 /**< ATM */ +#define ARPHRD_METRICOM 23 /**< Metricom STRIP (new IANA id) */ +#define ARPHRD_IEEE1394 24 /**< IEEE 1394 IPv4 - RFC 2734 */ +#define ARPHRD_EUI64 27 /**< EUI-64 */ +#define ARPHRD_INFINIBAND 32 /**< InfiniBand */ + +/* ARP protocol opcodes. */ +#define ARPOP_REQUEST 1 /**< ARP request */ +#define ARPOP_REPLY 2 /**< ARP reply */ +#define ARPOP_RREQUEST 3 /**< RARP request */ +#define ARPOP_RREPLY 4 /**< RARP reply */ +#define ARPOP_InREQUEST 8 /**< InARP request */ +#define ARPOP_InREPLY 9 /**< InARP reply */ +#define ARPOP_NAK 10 /**< (ATM)ARP NAK */ + +/** + * An ARP header + * + * This contains only the fixed-size portions of an ARP header; for + * other fields use the arp_{sender,target}_{ha,pa} family of + * functions. + */ +struct arphdr { + /** Link-layer protocol + * + * This is an ARPHRD_XXX constant + */ + uint16_t ar_hrd; + /** Network-layer protocol + * + * This is, for Ethernet, an ETH_P_XXX constant. + */ + uint16_t ar_pro; + /** Link-layer address length */ + uint8_t ar_hln; + /** Network-layer address length */ + uint8_t ar_pln; + /** ARP opcode */ + uint16_t ar_op; +} __attribute__ (( packed )); + +/** ARP packet sender hardware address + * + * @v arphdr ARP header + * @ret ar_sha Sender hardware address + */ +static inline void * arp_sender_ha ( struct arphdr *arphdr ) { + return ( ( ( void * ) arphdr ) + sizeof ( *arphdr ) ); +} + +/** ARP packet sender protocol address + * + * @v arphdr ARP header + * @ret ar_spa Sender protocol address + */ +static inline void * arp_sender_pa ( struct arphdr *arphdr ) { + return ( arp_sender_ha ( arphdr ) + arphdr->ar_hln ); +} + +/** ARP packet target hardware address + * + * @v arphdr ARP header + * @ret ar_tha Target hardware address + */ +static inline void * arp_target_ha ( struct arphdr *arphdr ) { + return ( arp_sender_pa ( arphdr ) + arphdr->ar_pln ); +} + +/** ARP packet target protocol address + * + * @v arphdr ARP header + * @ret ar_tpa Target protocol address + */ +static inline void * arp_target_pa ( struct arphdr *arphdr ) { + return ( arp_target_ha ( arphdr ) + arphdr->ar_hln ); +} + +#endif /* _IPXE_IF_ARP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/if_ether.h b/qemu/roms/ipxe/src/include/ipxe/if_ether.h new file mode 100644 index 000000000..a7e237349 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/if_ether.h @@ -0,0 +1,39 @@ +#ifndef _IPXE_IF_ETHER_H +#define _IPXE_IF_ETHER_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +#define ETH_ALEN 6 /* Size of Ethernet address */ +#define ETH_HLEN 14 /* Size of ethernet header */ +#define ETH_ZLEN 60 /* Minimum packet */ +#define ETH_FRAME_LEN 1514 /* Maximum packet */ +#define ETH_DATA_ALIGN 2 /* Amount needed to align the data after an ethernet header */ +#ifndef ETH_MAX_MTU +#define ETH_MAX_MTU (ETH_FRAME_LEN-ETH_HLEN) +#endif + +#define ETH_P_RAW 0x0000 /* Raw packet */ +#define ETH_P_IP 0x0800 /* Internet Protocl Packet */ +#define ETH_P_ARP 0x0806 /* Address Resolution Protocol */ +#define ETH_P_RARP 0x8035 /* Reverse Address resolution Protocol */ +#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ +#define ETH_P_IPV6 0x86DD /* IPv6 over blueblook */ +#define ETH_P_SLOW 0x8809 /* Ethernet slow protocols */ +#define ETH_P_EAPOL 0x888E /* 802.1X EAP over LANs */ +#define ETH_P_AOE 0x88A2 /* ATA over Ethernet */ +#define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */ +#define ETH_P_FIP 0x8914 /* FCoE Initialization Protocol */ + +/** An Ethernet link-layer header */ +struct ethhdr { + /** Destination MAC address */ + uint8_t h_dest[ETH_ALEN]; + /** Source MAC address */ + uint8_t h_source[ETH_ALEN]; + /** Protocol ID */ + uint16_t h_protocol; +} __attribute__ ((packed)); + +#endif /* _IPXE_IF_ETHER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/image.h b/qemu/roms/ipxe/src/include/ipxe/image.h new file mode 100644 index 000000000..5d7080a75 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/image.h @@ -0,0 +1,221 @@ +#ifndef _IPXE_IMAGE_H +#define _IPXE_IMAGE_H + +/** + * @file + * + * Executable images + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tables.h> +#include <ipxe/list.h> +#include <ipxe/uaccess.h> +#include <ipxe/refcnt.h> + +struct uri; +struct pixel_buffer; +struct image_type; + +/** An executable image */ +struct image { + /** Reference count */ + struct refcnt refcnt; + + /** List of registered images */ + struct list_head list; + + /** URI of image */ + struct uri *uri; + /** Name */ + char *name; + /** Flags */ + unsigned int flags; + + /** Command line to pass to image */ + char *cmdline; + /** Raw file image */ + userptr_t data; + /** Length of raw file image */ + size_t len; + + /** Image type, if known */ + struct image_type *type; + + /** Replacement image + * + * An image wishing to replace itself with another image (in a + * style similar to a Unix exec() call) should return from its + * exec() method with the replacement image set to point to + * the new image. + * + * If an image unregisters itself as a result of being + * executed, it must make sure that its replacement image (if + * any) is registered, otherwise the replacement is likely to + * be freed before it can be executed. + */ + struct image *replacement; +}; + +/** Image is registered */ +#define IMAGE_REGISTERED 0x00001 + +/** Image is selected for execution */ +#define IMAGE_SELECTED 0x0002 + +/** Image is trusted */ +#define IMAGE_TRUSTED 0x0004 + +/** Image will be automatically unregistered after execution */ +#define IMAGE_AUTO_UNREGISTER 0x0008 + +/** An executable image type */ +struct image_type { + /** Name of this image type */ + char *name; + /** + * Probe image + * + * @v image Image + * @ret rc Return status code + * + * Return success if the image is of this image type. + */ + int ( * probe ) ( struct image *image ); + /** + * Execute image + * + * @v image Image + * @ret rc Return status code + */ + int ( * exec ) ( struct image *image ); + /** + * Create pixel buffer from image + * + * @v image Image + * @v pixbuf Pixel buffer to fill in + * @ret rc Return status code + */ + int ( * pixbuf ) ( struct image *image, struct pixel_buffer **pixbuf ); +}; + +/** + * Multiboot image probe priority + * + * Multiboot images are also valid executables in another format + * (e.g. ELF), so we must perform the multiboot probe first. + */ +#define PROBE_MULTIBOOT 01 + +/** + * Normal image probe priority + */ +#define PROBE_NORMAL 02 + +/** + * PXE image probe priority + * + * PXE images have no signature checks, so will claim all image files. + * They must therefore be tried last in the probe order list. + */ +#define PROBE_PXE 03 + +/** Executable image type table */ +#define IMAGE_TYPES __table ( struct image_type, "image_types" ) + +/** An executable image type */ +#define __image_type( probe_order ) __table_entry ( IMAGE_TYPES, probe_order ) + +extern struct list_head images; +extern struct image *current_image; + +/** Iterate over all registered images */ +#define for_each_image( image ) \ + list_for_each_entry ( (image), &images, list ) + +/** Iterate over all registered images, safe against deletion */ +#define for_each_image_safe( image, tmp ) \ + list_for_each_entry_safe ( (image), (tmp), &images, list ) + +/** + * Test for existence of images + * + * @ret existence Some images exist + */ +static inline int have_images ( void ) { + return ( ! list_empty ( &images ) ); +} + +/** + * Retrieve first image + * + * @ret image Image, or NULL + */ +static inline struct image * first_image ( void ) { + return list_first_entry ( &images, struct image, list ); +} + +extern struct image * alloc_image ( struct uri *uri ); +extern int image_set_name ( struct image *image, const char *name ); +extern int image_set_cmdline ( struct image *image, const char *cmdline ); +extern int register_image ( struct image *image ); +extern void unregister_image ( struct image *image ); +struct image * find_image ( const char *name ); +extern int image_probe ( struct image *image ); +extern int image_exec ( struct image *image ); +extern int image_replace ( struct image *replacement ); +extern int image_select ( struct image *image ); +extern struct image * image_find_selected ( void ); +extern int image_set_trust ( int require_trusted, int permanent ); +extern int image_pixbuf ( struct image *image, struct pixel_buffer **pixbuf ); + +/** + * Increment reference count on an image + * + * @v image Image + * @ret image Image + */ +static inline struct image * image_get ( struct image *image ) { + ref_get ( &image->refcnt ); + return image; +} + +/** + * Decrement reference count on an image + * + * @v image Image + */ +static inline void image_put ( struct image *image ) { + ref_put ( &image->refcnt ); +} + +/** + * Clear image command line + * + * @v image Image + */ +static inline void image_clear_cmdline ( struct image *image ) { + image_set_cmdline ( image, NULL ); +} + +/** + * Set image as trusted + * + * @v image Image + */ +static inline void image_trust ( struct image *image ) { + image->flags |= IMAGE_TRUSTED; +} + +/** + * Set image as untrusted + * + * @v image Image + */ +static inline void image_untrust ( struct image *image ) { + image->flags &= ~IMAGE_TRUSTED; +} + +#endif /* _IPXE_IMAGE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/in.h b/qemu/roms/ipxe/src/include/ipxe/in.h new file mode 100644 index 000000000..de96ca22a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/in.h @@ -0,0 +1,132 @@ +#ifndef _IPXE_IN_H +#define _IPXE_IN_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/socket.h> + +/* Protocol numbers */ + +#define IP_ICMP 1 +#define IP_TCP 6 +#define IP_UDP 17 +#define IP_ICMP6 58 + +/* IP address constants */ + +#define INADDR_NONE 0xffffffff + +#define INADDR_BROADCAST 0xffffffff + +#define IN_CLASSA(addr) ( ( (addr) & 0x80000000 ) == 0x00000000 ) +#define IN_CLASSA_NET 0xff000000 +#define IN_CLASSB(addr) ( ( (addr) & 0xc0000000 ) == 0x80000000 ) +#define IN_CLASSB_NET 0xffff0000 +#define IN_CLASSC(addr) ( ( (addr) & 0xe0000000 ) == 0xc0000000 ) +#define IN_CLASSC_NET 0xffffff00 +#define IN_MULTICAST(addr) ( ( (addr) & 0xf0000000 ) == 0xe0000000 ) + +/** + * IP address structure + */ +struct in_addr { + uint32_t s_addr; +}; + +typedef struct in_addr in_addr; + +/** + * IP6 address structure + */ +struct in6_addr { + union { + uint8_t u6_addr8[16]; + uint16_t u6_addr16[8]; + uint32_t u6_addr32[4]; + } in6_u; +#define s6_addr in6_u.u6_addr8 +#define s6_addr16 in6_u.u6_addr16 +#define s6_addr32 in6_u.u6_addr32 +}; + +#define IN6_IS_ADDR_UNSPECIFIED( addr ) \ + ( ( ( ( ( const uint32_t * ) (addr) )[0] ) | \ + ( ( ( const uint32_t * ) (addr) )[1] ) | \ + ( ( ( const uint32_t * ) (addr) )[2] ) | \ + ( ( ( const uint32_t * ) (addr) )[3] ) ) == 0 ) + +#define IN6_IS_ADDR_MULTICAST( addr ) \ + ( *( ( const uint8_t * ) (addr) ) == 0xff ) + +#define IN6_IS_ADDR_LINKLOCAL( addr ) \ + ( ( *( ( const uint16_t * ) (addr) ) & htons ( 0xffc0 ) ) == \ + htons ( 0xfe80 ) ) + +/** + * IPv4 socket address + */ +struct sockaddr_in { + /** Socket address family (part of struct @c sockaddr) + * + * Always set to @c AF_INET for IPv4 addresses + */ + sa_family_t sin_family; + /** Flags (part of struct @c sockaddr_tcpip) */ + uint16_t sin_flags; + /** TCP/IP port (part of struct @c sockaddr_tcpip) */ + uint16_t sin_port; + /** IPv4 address */ + struct in_addr sin_addr; + /** Padding + * + * This ensures that a struct @c sockaddr_in is large enough + * to hold a socket address for any TCP/IP address family. + */ + char pad[ sizeof ( struct sockaddr ) - + ( sizeof ( sa_family_t ) /* sin_family */ + + sizeof ( uint16_t ) /* sin_flags */ + + sizeof ( uint16_t ) /* sin_port */ + + sizeof ( struct in_addr ) /* sin_addr */ ) ]; +} __attribute__ (( packed, may_alias )); + +/** + * IPv6 socket address + */ +struct sockaddr_in6 { + /** Socket address family (part of struct @c sockaddr) + * + * Always set to @c AF_INET6 for IPv6 addresses + */ + sa_family_t sin6_family; + /** Flags (part of struct @c sockaddr_tcpip) */ + uint16_t sin6_flags; + /** TCP/IP port (part of struct @c sockaddr_tcpip) */ + uint16_t sin6_port; + /** Scope ID + * + * For link-local addresses, this is the network device index. + */ + uint16_t sin6_scope_id; + /** IPv6 address */ + struct in6_addr sin6_addr; + /** Padding + * + * This ensures that a struct @c sockaddr_in6 is large + * enough to hold a socket address for any TCP/IP address + * family. + */ + char pad[ sizeof ( struct sockaddr ) - + ( sizeof ( sa_family_t ) /* sin6_family */ + + sizeof ( uint16_t ) /* sin6_flags */ + + sizeof ( uint16_t ) /* sin6_port */ + + sizeof ( uint16_t ) /* sin6_scope_id */ + + sizeof ( struct in6_addr ) /* sin6_addr */ ) ]; +} __attribute__ (( packed, may_alias )); + +extern int inet_aton ( const char *cp, struct in_addr *inp ); +extern char * inet_ntoa ( struct in_addr in ); +extern int inet6_aton ( const char *string, struct in6_addr *in ); +extern char * inet6_ntoa ( const struct in6_addr *in ); + +#endif /* _IPXE_IN_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/infiniband.h b/qemu/roms/ipxe/src/include/ipxe/infiniband.h new file mode 100644 index 000000000..f546ea61b --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/infiniband.h @@ -0,0 +1,720 @@ +#ifndef _IPXE_INFINIBAND_H +#define _IPXE_INFINIBAND_H + +/** @file + * + * Infiniband protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/refcnt.h> +#include <ipxe/device.h> +#include <ipxe/tables.h> +#include <ipxe/ib_packet.h> +#include <ipxe/ib_mad.h> + +/** Subnet management interface QPN */ +#define IB_QPN_SMI 0 + +/** Subnet management interface queue key */ +#define IB_QKEY_SMI 0 + +/** General service interface QPN */ +#define IB_QPN_GSI 1 + +/** General service interface queue key */ +#define IB_QKEY_GSI 0x80010000UL + +/** Broadcast QPN */ +#define IB_QPN_BROADCAST 0xffffffUL + +/** QPN mask */ +#define IB_QPN_MASK 0xffffffUL + +/** Default Infiniband partition key */ +#define IB_PKEY_DEFAULT 0xffff + +/** Infiniband partition key full membership flag */ +#define IB_PKEY_FULL 0x8000 + +/** + * Maximum payload size + * + * This is currently hard-coded in various places (drivers, subnet + * management agent, etc.) to 2048. + */ +#define IB_MAX_PAYLOAD_SIZE 2048 + +struct ib_device; +struct ib_queue_pair; +struct ib_address_vector; +struct ib_completion_queue; +struct ib_mad_interface; + +/** Infiniband transmission rates */ +enum ib_rate { + IB_RATE_2_5 = 2, + IB_RATE_10 = 3, + IB_RATE_30 = 4, + IB_RATE_5 = 5, + IB_RATE_20 = 6, + IB_RATE_40 = 7, + IB_RATE_60 = 8, + IB_RATE_80 = 9, + IB_RATE_120 = 10, +}; + +/** An Infiniband Address Vector */ +struct ib_address_vector { + /** Queue Pair Number */ + unsigned long qpn; + /** Queue key + * + * Not specified for received packets. + */ + unsigned long qkey; + /** Local ID */ + unsigned int lid; + /** Rate + * + * Not specified for received packets. + */ + enum ib_rate rate; + /** Service level */ + unsigned int sl; + /** GID is present */ + unsigned int gid_present; + /** GID, if present */ + union ib_gid gid; + /** VLAN is present */ + unsigned int vlan_present; + /** VLAN, if present */ + unsigned int vlan; +}; + +/** An Infiniband Work Queue */ +struct ib_work_queue { + /** Containing queue pair */ + struct ib_queue_pair *qp; + /** "Is a send queue" flag */ + int is_send; + /** Associated completion queue */ + struct ib_completion_queue *cq; + /** List of work queues on this completion queue */ + struct list_head list; + /** Packet sequence number */ + uint32_t psn; + /** Number of work queue entries */ + unsigned int num_wqes; + /** Number of occupied work queue entries */ + unsigned int fill; + /** Next work queue entry index + * + * This is the index of the next entry to be filled (i.e. the + * first empty entry). This value is not bounded by num_wqes; + * users must logical-AND with (num_wqes-1) to generate an + * array index. + */ + unsigned long next_idx; + /** I/O buffers assigned to work queue */ + struct io_buffer **iobufs; + /** Driver private data */ + void *drv_priv; +}; + +/** An Infiniband multicast GID */ +struct ib_multicast_gid { + /** List of multicast GIDs on this QP */ + struct list_head list; + /** Multicast GID */ + union ib_gid gid; +}; + +/** An Infiniband queue pair type */ +enum ib_queue_pair_type { + IB_QPT_SMI, + IB_QPT_GSI, + IB_QPT_UD, + IB_QPT_RC, + IB_QPT_ETH, +}; + +/** Infiniband queue pair operations */ +struct ib_queue_pair_operations { + /** Allocate receive I/O buffer + * + * @v len Maximum receive length + * @ret iobuf I/O buffer (or NULL if out of memory) + */ + struct io_buffer * ( * alloc_iob ) ( size_t len ); +}; + +/** An Infiniband Queue Pair */ +struct ib_queue_pair { + /** Containing Infiniband device */ + struct ib_device *ibdev; + /** List of queue pairs on this Infiniband device */ + struct list_head list; + /** Queue pair number */ + unsigned long qpn; + /** Externally-visible queue pair number + * + * This may differ from the real queue pair number (e.g. when + * the HCA cannot use the management QPNs 0 and 1 as hardware + * QPNs and needs to remap them). + */ + unsigned long ext_qpn; + /** Queue pair type */ + enum ib_queue_pair_type type; + /** Queue key */ + unsigned long qkey; + /** Send queue */ + struct ib_work_queue send; + /** Receive queue */ + struct ib_work_queue recv; + /** List of multicast GIDs */ + struct list_head mgids; + /** Address vector */ + struct ib_address_vector av; + /** Queue pair operations */ + struct ib_queue_pair_operations *op; + /** Driver private data */ + void *drv_priv; + /** Queue owner private data */ + void *owner_priv; +}; + +/** Infiniband completion queue operations */ +struct ib_completion_queue_operations { + /** + * Complete Send WQE + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v iobuf I/O buffer + * @v rc Completion status code + */ + void ( * complete_send ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct io_buffer *iobuf, int rc ); + /** + * Complete Receive WQE + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v dest Destination address vector, or NULL + * @v source Source address vector, or NULL + * @v iobuf I/O buffer + * @v rc Completion status code + */ + void ( * complete_recv ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct ib_address_vector *dest, + struct ib_address_vector *source, + struct io_buffer *iobuf, int rc ); +}; + +/** An Infiniband Completion Queue */ +struct ib_completion_queue { + /** Containing Infiniband device */ + struct ib_device *ibdev; + /** List of completion queues on this Infiniband device */ + struct list_head list; + /** Completion queue number */ + unsigned long cqn; + /** Number of completion queue entries */ + unsigned int num_cqes; + /** Next completion queue entry index + * + * This is the index of the next entry to be filled (i.e. the + * first empty entry). This value is not bounded by num_wqes; + * users must logical-AND with (num_wqes-1) to generate an + * array index. + */ + unsigned long next_idx; + /** List of work queues completing to this queue */ + struct list_head work_queues; + /** Completion queue operations */ + struct ib_completion_queue_operations *op; + /** Driver private data */ + void *drv_priv; +}; + +/** + * Infiniband device operations + * + * These represent a subset of the Infiniband Verbs. + */ +struct ib_device_operations { + /** Create completion queue + * + * @v ibdev Infiniband device + * @v cq Completion queue + * @ret rc Return status code + */ + int ( * create_cq ) ( struct ib_device *ibdev, + struct ib_completion_queue *cq ); + /** Destroy completion queue + * + * @v ibdev Infiniband device + * @v cq Completion queue + */ + void ( * destroy_cq ) ( struct ib_device *ibdev, + struct ib_completion_queue *cq ); + /** Create queue pair + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @ret rc Return status code + */ + int ( * create_qp ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp ); + /** Modify queue pair + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @ret rc Return status code + */ + int ( * modify_qp ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp ); + /** Destroy queue pair + * + * @v ibdev Infiniband device + * @v qp Queue pair + */ + void ( * destroy_qp ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp ); + /** Post send work queue entry + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v dest Destination address vector + * @v iobuf I/O buffer + * @ret rc Return status code + * + * If this method returns success, the I/O buffer remains + * owned by the queue pair. If this method returns failure, + * the I/O buffer is immediately released; the failure is + * interpreted as "failure to enqueue buffer". + */ + int ( * post_send ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct ib_address_vector *dest, + struct io_buffer *iobuf ); + /** Post receive work queue entry + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v iobuf I/O buffer + * @ret rc Return status code + * + * If this method returns success, the I/O buffer remains + * owned by the queue pair. If this method returns failure, + * the I/O buffer is immediately released; the failure is + * interpreted as "failure to enqueue buffer". + */ + int ( * post_recv ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct io_buffer *iobuf ); + /** Poll completion queue + * + * @v ibdev Infiniband device + * @v cq Completion queue + * + * The relevant completion handler (specified at completion + * queue creation time) takes ownership of the I/O buffer. + */ + void ( * poll_cq ) ( struct ib_device *ibdev, + struct ib_completion_queue *cq ); + /** + * Poll event queue + * + * @v ibdev Infiniband device + */ + void ( * poll_eq ) ( struct ib_device *ibdev ); + /** + * Open port + * + * @v ibdev Infiniband device + * @ret rc Return status code + */ + int ( * open ) ( struct ib_device *ibdev ); + /** + * Close port + * + * @v ibdev Infiniband device + */ + void ( * close ) ( struct ib_device *ibdev ); + /** Attach to multicast group + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v gid Multicast GID + * @ret rc Return status code + */ + int ( * mcast_attach ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + union ib_gid *gid ); + /** Detach from multicast group + * + * @v ibdev Infiniband device + * @v qp Queue pair + * @v gid Multicast GID + */ + void ( * mcast_detach ) ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + union ib_gid *gid ); + /** Set port information + * + * @v ibdev Infiniband device + * @v mad Set port information MAD + * + * This method is required only by adapters that do not have + * an embedded SMA. + */ + int ( * set_port_info ) ( struct ib_device *ibdev, union ib_mad *mad ); + /** Set partition key table + * + * @v ibdev Infiniband device + * @v mad Set partition key table MAD + * + * This method is required only by adapters that do not have + * an embedded SMA. + */ + int ( * set_pkey_table ) ( struct ib_device *ibdev, + union ib_mad *mad ); +}; + +/** An Infiniband device */ +struct ib_device { + /** Reference counter */ + struct refcnt refcnt; + /** List of Infiniband devices */ + struct list_head list; + /** List of open Infiniband devices */ + struct list_head open_list; + /** Underlying device */ + struct device *dev; + /** List of completion queues */ + struct list_head cqs; + /** List of queue pairs */ + struct list_head qps; + /** Infiniband operations */ + struct ib_device_operations *op; + /** Port number */ + unsigned int port; + /** Port open request counter */ + unsigned int open_count; + + /** Port state */ + uint8_t port_state; + /** Link width supported */ + uint8_t link_width_supported; + /** Link width enabled */ + uint8_t link_width_enabled; + /** Link width active */ + uint8_t link_width_active; + /** Link speed supported */ + uint8_t link_speed_supported; + /** Link speed enabled */ + uint8_t link_speed_enabled; + /** Link speed active */ + uint8_t link_speed_active; + /** Node GUID */ + union ib_guid node_guid; + /** Port GID (comprising GID prefix and port GUID) */ + union ib_gid gid; + /** Port LID */ + uint16_t lid; + /** Subnet manager LID */ + uint16_t sm_lid; + /** Subnet manager SL */ + uint8_t sm_sl; + /** Partition key */ + uint16_t pkey; + + /** RDMA key + * + * This is a single key allowing unrestricted access to + * memory. + */ + uint32_t rdma_key; + + /** Subnet management interface */ + struct ib_mad_interface *smi; + /** General services interface */ + struct ib_mad_interface *gsi; + + /** Driver private data */ + void *drv_priv; + /** Owner private data */ + void *owner_priv; +}; + +/** An Infiniband upper-layer driver */ +struct ib_driver { + /** Name */ + const char *name; + /** Probe device + * + * @v ibdev Infiniband device + * @ret rc Return status code + */ + int ( * probe ) ( struct ib_device *ibdev ); + /** Notify of device or link state change + * + * @v ibdev Infiniband device + */ + void ( * notify ) ( struct ib_device *ibdev ); + /** Remove device + * + * @v ibdev Infiniband device + */ + void ( * remove ) ( struct ib_device *ibdev ); +}; + +/** Infiniband driver table */ +#define IB_DRIVERS __table ( struct ib_driver, "ib_drivers" ) + +/** Declare an Infiniband driver */ +#define __ib_driver __table_entry ( IB_DRIVERS, 01 ) + +extern struct ib_completion_queue * +ib_create_cq ( struct ib_device *ibdev, unsigned int num_cqes, + struct ib_completion_queue_operations *op ); +extern void ib_destroy_cq ( struct ib_device *ibdev, + struct ib_completion_queue *cq ); +extern void ib_poll_cq ( struct ib_device *ibdev, + struct ib_completion_queue *cq ); +extern struct ib_queue_pair * +ib_create_qp ( struct ib_device *ibdev, enum ib_queue_pair_type type, + unsigned int num_send_wqes, struct ib_completion_queue *send_cq, + unsigned int num_recv_wqes, struct ib_completion_queue *recv_cq, + struct ib_queue_pair_operations *op ); +extern int ib_modify_qp ( struct ib_device *ibdev, struct ib_queue_pair *qp ); +extern void ib_destroy_qp ( struct ib_device *ibdev, + struct ib_queue_pair *qp ); +extern struct ib_queue_pair * ib_find_qp_qpn ( struct ib_device *ibdev, + unsigned long qpn ); +extern struct ib_queue_pair * ib_find_qp_mgid ( struct ib_device *ibdev, + union ib_gid *gid ); +extern struct ib_work_queue * ib_find_wq ( struct ib_completion_queue *cq, + unsigned long qpn, int is_send ); +extern int ib_post_send ( struct ib_device *ibdev, struct ib_queue_pair *qp, + struct ib_address_vector *dest, + struct io_buffer *iobuf ); +extern int ib_post_recv ( struct ib_device *ibdev, struct ib_queue_pair *qp, + struct io_buffer *iobuf ); +extern void ib_complete_send ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct io_buffer *iobuf, int rc ); +extern void ib_complete_recv ( struct ib_device *ibdev, + struct ib_queue_pair *qp, + struct ib_address_vector *dest, + struct ib_address_vector *source, + struct io_buffer *iobuf, int rc ); +extern void ib_refill_recv ( struct ib_device *ibdev, + struct ib_queue_pair *qp ); +extern int ib_open ( struct ib_device *ibdev ); +extern void ib_close ( struct ib_device *ibdev ); +extern int ib_link_rc ( struct ib_device *ibdev ); +extern int ib_mcast_attach ( struct ib_device *ibdev, struct ib_queue_pair *qp, + union ib_gid *gid ); +extern void ib_mcast_detach ( struct ib_device *ibdev, + struct ib_queue_pair *qp, union ib_gid *gid ); +extern int ib_count_ports ( struct ib_device *ibdev ); +extern int ib_set_port_info ( struct ib_device *ibdev, union ib_mad *mad ); +extern int ib_set_pkey_table ( struct ib_device *ibdev, union ib_mad *mad ); +extern struct ib_device * alloc_ibdev ( size_t priv_size ); +extern int register_ibdev ( struct ib_device *ibdev ); +extern void unregister_ibdev ( struct ib_device *ibdev ); +extern struct ib_device * find_ibdev ( union ib_gid *gid ); +extern struct ib_device * last_opened_ibdev ( void ); +extern void ib_link_state_changed ( struct ib_device *ibdev ); +extern void ib_poll_eq ( struct ib_device *ibdev ); +extern struct list_head ib_devices; + +/** Iterate over all network devices */ +#define for_each_ibdev( ibdev ) \ + list_for_each_entry ( (ibdev), &ib_devices, list ) + +/** + * Check link state of Infiniband device + * + * @v ibdev Infiniband device + * @ret link_up Link is up + */ +static inline __always_inline int +ib_link_ok ( struct ib_device *ibdev ) { + return ( ibdev->port_state == IB_PORT_STATE_ACTIVE ); +} + +/** + * Check whether or not Infiniband device is open + * + * @v ibdev Infiniband device + * @v is_open Infiniband device is open + */ +static inline __attribute__ (( always_inline )) int +ib_is_open ( struct ib_device *ibdev ) { + return ( ibdev->open_count > 0 ); +} + +/** + * Get reference to Infiniband device + * + * @v ibdev Infiniband device + * @ret ibdev Infiniband device + */ +static inline __always_inline struct ib_device * +ibdev_get ( struct ib_device *ibdev ) { + ref_get ( &ibdev->refcnt ); + return ibdev; +} + +/** + * Drop reference to Infiniband device + * + * @v ibdev Infiniband device + */ +static inline __always_inline void +ibdev_put ( struct ib_device *ibdev ) { + ref_put ( &ibdev->refcnt ); +} + +/** + * Set Infiniband work queue driver-private data + * + * @v wq Work queue + * @v priv Private data + */ +static inline __always_inline void +ib_wq_set_drvdata ( struct ib_work_queue *wq, void *priv ) { + wq->drv_priv = priv; +} + +/** + * Get Infiniband work queue driver-private data + * + * @v wq Work queue + * @ret priv Private data + */ +static inline __always_inline void * +ib_wq_get_drvdata ( struct ib_work_queue *wq ) { + return wq->drv_priv; +} + +/** + * Set Infiniband queue pair driver-private data + * + * @v qp Queue pair + * @v priv Private data + */ +static inline __always_inline void +ib_qp_set_drvdata ( struct ib_queue_pair *qp, void *priv ) { + qp->drv_priv = priv; +} + +/** + * Get Infiniband queue pair driver-private data + * + * @v qp Queue pair + * @ret priv Private data + */ +static inline __always_inline void * +ib_qp_get_drvdata ( struct ib_queue_pair *qp ) { + return qp->drv_priv; +} + +/** + * Set Infiniband queue pair owner-private data + * + * @v qp Queue pair + * @v priv Private data + */ +static inline __always_inline void +ib_qp_set_ownerdata ( struct ib_queue_pair *qp, void *priv ) { + qp->owner_priv = priv; +} + +/** + * Get Infiniband queue pair owner-private data + * + * @v qp Queue pair + * @ret priv Private data + */ +static inline __always_inline void * +ib_qp_get_ownerdata ( struct ib_queue_pair *qp ) { + return qp->owner_priv; +} + +/** + * Set Infiniband completion queue driver-private data + * + * @v cq Completion queue + * @v priv Private data + */ +static inline __always_inline void +ib_cq_set_drvdata ( struct ib_completion_queue *cq, void *priv ) { + cq->drv_priv = priv; +} + +/** + * Get Infiniband completion queue driver-private data + * + * @v cq Completion queue + * @ret priv Private data + */ +static inline __always_inline void * +ib_cq_get_drvdata ( struct ib_completion_queue *cq ) { + return cq->drv_priv; +} + +/** + * Set Infiniband device driver-private data + * + * @v ibdev Infiniband device + * @v priv Private data + */ +static inline __always_inline void +ib_set_drvdata ( struct ib_device *ibdev, void *priv ) { + ibdev->drv_priv = priv; +} + +/** + * Get Infiniband device driver-private data + * + * @v ibdev Infiniband device + * @ret priv Private data + */ +static inline __always_inline void * +ib_get_drvdata ( struct ib_device *ibdev ) { + return ibdev->drv_priv; +} + +/** + * Set Infiniband device owner-private data + * + * @v ibdev Infiniband device + * @v priv Private data + */ +static inline __always_inline void +ib_set_ownerdata ( struct ib_device *ibdev, void *priv ) { + ibdev->owner_priv = priv; +} + +/** + * Get Infiniband device owner-private data + * + * @v ibdev Infiniband device + * @ret priv Private data + */ +static inline __always_inline void * +ib_get_ownerdata ( struct ib_device *ibdev ) { + return ibdev->owner_priv; +} + +#endif /* _IPXE_INFINIBAND_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/init.h b/qemu/roms/ipxe/src/include/ipxe/init.h new file mode 100644 index 000000000..19c5925bf --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/init.h @@ -0,0 +1,88 @@ +#ifndef _IPXE_INIT_H +#define _IPXE_INIT_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tables.h> + +/** + * An initialisation function + * + * Initialisation functions are called exactly once, as part of the + * call to initialise(). + */ +struct init_fn { + void ( * initialise ) ( void ); +}; + +/** Initialisation function table */ +#define INIT_FNS __table ( struct init_fn, "init_fns" ) + +/** Declare an initialisation functon */ +#define __init_fn( init_order ) __table_entry ( INIT_FNS, init_order ) + +/** @defgroup initfn_order Initialisation function ordering + * @{ + */ + +#define INIT_EARLY 01 /**< Early initialisation */ +#define INIT_SERIAL 02 /**< Serial driver initialisation */ +#define INIT_CONSOLE 03 /**< Console initialisation */ +#define INIT_NORMAL 04 /**< Normal initialisation */ +#define INIT_LATE 05 /**< Late initialisation */ + +/** @} */ + +/** + * A startup/shutdown function + * + * Startup and shutdown functions may be called multiple times, as + * part of the calls to startup() and shutdown(). + */ +struct startup_fn { + void ( * startup ) ( void ); + void ( * shutdown ) ( int booting ); +}; + +/** Startup/shutdown function table */ +#define STARTUP_FNS __table ( struct startup_fn, "startup_fns" ) + +/** Declare a startup/shutdown function */ +#define __startup_fn( startup_order ) \ + __table_entry ( STARTUP_FNS, startup_order ) + +/** @defgroup startfn_order Startup/shutdown function ordering + * + * Shutdown functions are called in the reverse order to startup + * functions. + * + * @{ + */ + +#define STARTUP_EARLY 01 /**< Early startup */ +#define STARTUP_NORMAL 02 /**< Normal startup */ +#define STARTUP_LATE 03 /**< Late startup */ + +/** @} */ + +extern void initialise ( void ); +extern void startup ( void ); +extern void shutdown ( int booting ); + +/** + * Shut down system for OS boot + * + */ +static inline void shutdown_boot ( void ) { + shutdown ( 1 ); +} + +/** + * Shut down system for exit back to firmware + * + */ +static inline void shutdown_exit ( void ) { + shutdown ( 0 ); +} + +#endif /* _IPXE_INIT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/interface.h b/qemu/roms/ipxe/src/include/ipxe/interface.h new file mode 100644 index 000000000..a474aaad0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/interface.h @@ -0,0 +1,234 @@ +#ifndef _IPXE_INTERFACE_H +#define _IPXE_INTERFACE_H + +/** @file + * + * Object interfaces + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <ipxe/refcnt.h> + +/** An object interface operation */ +struct interface_operation { + /** Operation type */ + void *type; + /** Implementing method */ + void *func; +}; + +/** + * Define an object interface operation + * + * @v op_type Operation type + * @v object_type Implementing method's expected object type + * @v op_func Implementing method + * @ret op Object interface operation + */ +#define INTF_OP( op_type, object_type, op_func ) { \ + .type = op_type, \ + .func = ( ( ( ( typeof ( op_func ) * ) NULL ) == \ + ( ( op_type ## _TYPE ( object_type ) * ) NULL ) ) \ + ? op_func : op_func ), \ + } + +/** An object interface descriptor */ +struct interface_descriptor { + /** Offset of interface within containing object */ + size_t offset; + /** Number of interface operations */ + unsigned int num_op; + /** Object interface operations */ + struct interface_operation *op; + /** Offset to pass-through interface, if present */ + ssize_t passthru_offset; +}; + +#define intf_offset( object_type, intf ) \ + ( ( ( ( typeof ( ( ( object_type * ) NULL )->intf ) * ) NULL ) \ + == ( ( struct interface * ) NULL ) ) \ + ? offsetof ( object_type, intf ) \ + : offsetof ( object_type, intf ) ) + +/** + * Define an object interface descriptor + * + * @v object_type Containing object data type + * @v intf Interface name (i.e. field within object data type) + * @v operations Object interface operations array + * @ret desc Object interface descriptor + */ +#define INTF_DESC( object_type, intf, operations ) { \ + .offset = intf_offset ( object_type, intf ), \ + .op = operations, \ + .num_op = ( sizeof ( operations ) / \ + sizeof ( operations[0] ) ), \ + .passthru_offset = 0, \ + } + +/** + * Define an object interface descriptor with pass-through interface + * + * @v object_type Containing object data type + * @v intf Interface name (i.e. field within object data type) + * @v operations Object interface operations array + * @v passthru Pass-through interface name + * @ret desc Object interface descriptor + */ +#define INTF_DESC_PASSTHRU( object_type, intf, operations, passthru ) { \ + .offset = offsetof ( object_type, intf ), \ + .op = operations, \ + .num_op = ( sizeof ( operations ) / \ + sizeof ( operations[0] ) ), \ + .passthru_offset = ( intf_offset ( object_type, passthru ) - \ + intf_offset ( object_type, intf ) ), \ + } + +/** + * Define an object interface descriptor for a pure-interface object + * + * @v operations Object interface operations array + * @ret desc Object interface descriptor + * + * A pure-interface object is an object that consists solely of a + * single interface. + */ +#define INTF_DESC_PURE( operations ) { \ + .offset = 0, \ + .op = operations, \ + .num_op = ( sizeof ( operations ) / \ + sizeof ( operations[0] ) ), \ + .passthru_offset = 0, \ + } + +/** An object interface */ +struct interface { + /** Destination object interface + * + * When the containing object invokes an operation on this + * interface, it will be executed by the destination object. + * + * This pointer may never be NULL. When the interface is + * unplugged, it should point to the null interface. + */ + struct interface *dest; + /** Reference counter + * + * If this interface is not part of a reference-counted + * object, this field may be NULL. + */ + struct refcnt *refcnt; + /** Interface descriptor */ + struct interface_descriptor *desc; +}; + +extern void intf_plug ( struct interface *intf, struct interface *dest ); +extern void intf_plug_plug ( struct interface *a, struct interface *b ); +extern void intf_unplug ( struct interface *intf ); +extern void intf_nullify ( struct interface *intf ); +extern struct interface * intf_get ( struct interface *intf ); +extern void intf_put ( struct interface *intf ); +extern void * __attribute__ (( pure )) intf_object ( struct interface *intf ); +extern void * intf_get_dest_op_no_passthru_untyped ( struct interface *intf, + void *type, + struct interface **dest ); +extern void * intf_get_dest_op_untyped ( struct interface *intf, void *type, + struct interface **dest ); + +extern void intf_close ( struct interface *intf, int rc ); +#define intf_close_TYPE( object_type ) \ + typeof ( void ( object_type, int rc ) ) + +extern void intf_shutdown ( struct interface *intf, int rc ); +extern void intf_restart ( struct interface *intf, int rc ); + +extern struct interface_descriptor null_intf_desc; +extern struct interface null_intf; + +/** + * Initialise an object interface + * + * @v intf Object interface + * @v desc Object interface descriptor + * @v refcnt Containing object reference counter, or NULL + */ +static inline void intf_init ( struct interface *intf, + struct interface_descriptor *desc, + struct refcnt *refcnt ) { + intf->dest = &null_intf; + intf->refcnt = refcnt; + intf->desc = desc; +} + +/** + * Initialise a static object interface + * + * @v descriptor Object interface descriptor + */ +#define INTF_INIT( descriptor ) { \ + .dest = &null_intf, \ + .refcnt = NULL, \ + .desc = &(descriptor), \ + } + +/** + * Get object interface destination and operation method (without pass-through) + * + * @v intf Object interface + * @v type Operation type + * @ret dest Destination interface + * @ret func Implementing method, or NULL + */ +#define intf_get_dest_op_no_passthru( intf, type, dest ) \ + ( ( type ## _TYPE ( void * ) * ) \ + intf_get_dest_op_no_passthru_untyped ( intf, type, dest ) ) + +/** + * Get object interface destination and operation method + * + * @v intf Object interface + * @v type Operation type + * @ret dest Destination interface + * @ret func Implementing method, or NULL + */ +#define intf_get_dest_op( intf, type, dest ) \ + ( ( type ## _TYPE ( void * ) * ) \ + intf_get_dest_op_untyped ( intf, type, dest ) ) + +/** + * Find debugging colourisation for an object interface + * + * @v intf Object interface + * @ret col Debugging colourisation + * + * Use as the first argument to DBGC() or equivalent macro. + */ +#define INTF_COL( intf ) intf_object ( intf ) + +/** printf() format string for INTF_DBG() */ +#define INTF_FMT "%p+%zx" + +/** + * printf() arguments for representing an object interface + * + * @v intf Object interface + * @ret args printf() argument list corresponding to INTF_FMT + */ +#define INTF_DBG( intf ) intf_object ( intf ), (intf)->desc->offset + +/** printf() format string for INTF_INTF_DBG() */ +#define INTF_INTF_FMT INTF_FMT "->" INTF_FMT + +/** + * printf() arguments for representing an object interface pair + * + * @v intf Object interface + * @v dest Destination object interface + * @ret args printf() argument list corresponding to INTF_INTF_FMT + */ +#define INTF_INTF_DBG( intf, dest ) INTF_DBG ( intf ), INTF_DBG ( dest ) + +#endif /* _IPXE_INTERFACE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/io.h b/qemu/roms/ipxe/src/include/ipxe/io.h new file mode 100644 index 000000000..29ccfd1fa --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/io.h @@ -0,0 +1,537 @@ +#ifndef _IPXE_IO_H +#define _IPXE_IO_H + +/** @file + * + * iPXE I/O API + * + * The I/O API provides methods for reading from and writing to + * memory-mapped and I/O-mapped devices. + * + * The standard methods (readl()/writel() etc.) do not strictly check + * the type of the address parameter; this is because traditional + * usage does not necessarily provide the correct pointer type. For + * example, code written for ISA devices at fixed I/O addresses (such + * as the keyboard controller) tend to use plain integer constants for + * the address parameter. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/api.h> +#include <config/ioapi.h> +#include <ipxe/uaccess.h> + +/** Page size */ +#define PAGE_SIZE ( 1 << PAGE_SHIFT ) + +/** Page mask */ +#define PAGE_MASK ( PAGE_SIZE - 1 ) + +/** + * Calculate static inline I/O API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define IOAPI_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( IOAPI_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide an I/O API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_IOAPI( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( IOAPI_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline I/O API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_IOAPI_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( IOAPI_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent I/O API headers */ + +/* Include all architecture-dependent I/O API headers */ +#include <bits/io.h> + +/** + * Wrap an I/O read + * + * @v _func I/O API function + * @v _type Data type + * @v io_addr I/O address + * @v _prefix Prefix for address in debug message + * @v _ndigits Number of hex digits for this data type + */ +#define IOAPI_READ( _func, _type, io_addr, _prefix, _ndigits ) ( { \ + volatile _type *_io_addr = \ + ( ( volatile _type * ) ( intptr_t ) (io_addr) ); \ + _type _data = _func ( _io_addr ); \ + DBGIO ( "[" _prefix " %08lx] => %0" #_ndigits "llx\n", \ + io_to_bus ( _io_addr ), ( unsigned long long ) _data ); \ + _data; } ) + +/** + * Wrap an I/O write + * + * @v _func I/O API function + * @v _type Data type + * @v data Value to write + * @v io_addr I/O address + * @v _prefix Prefix for address in debug message + * @v _ndigits Number of hex digits for this data type + */ +#define IOAPI_WRITE( _func, _type, data, io_addr, _prefix, _ndigits ) do { \ + volatile _type *_io_addr = \ + ( ( volatile _type * ) ( intptr_t ) (io_addr) ); \ + _type _data = (data); \ + DBGIO ( "[" _prefix " %08lx] <= %0" #_ndigits "llx\n", \ + io_to_bus ( _io_addr ), ( unsigned long long ) _data ); \ + _func ( _data, _io_addr ); \ + } while ( 0 ) + +/** + * Wrap an I/O string read + * + * @v _func I/O API function + * @v _type Data type + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of elements to read + * @v _prefix Prefix for address in debug message + * @v _ndigits Number of hex digits for this data type + */ +#define IOAPI_READS( _func, _type, io_addr, data, count, _prefix, _ndigits ) \ + do { \ + volatile _type *_io_addr = \ + ( ( volatile _type * ) ( intptr_t ) (io_addr) ); \ + void *_data_void = (data); /* Check data is a pointer */ \ + _type * _data = ( ( _type * ) _data_void ); \ + const _type * _dbg_data = _data; \ + unsigned int _count = (count); \ + unsigned int _dbg_count = _count; \ + _func ( _io_addr, _data, _count ); \ + DBGIO ( "[" _prefix " %08lx] =>", io_to_bus ( _io_addr ) ); \ + while ( _dbg_count-- ) { \ + DBGIO ( " %0" #_ndigits "llx", \ + ( ( unsigned long long ) *(_dbg_data++) ) ); \ + } \ + DBGIO ( "\n" ); \ + } while ( 0 ) + +/** + * Wrap an I/O string write + * + * @v _func I/O API function + * @v _type Data type + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of elements to write + * @v _prefix Prefix for address in debug message + * @v _ndigits Number of hex digits for this data type + */ +#define IOAPI_WRITES( _func, _type, io_addr, data, count, _prefix, _ndigits ) \ + do { \ + volatile _type *_io_addr = \ + ( ( volatile _type * ) ( intptr_t ) (io_addr) ); \ + const void *_data_void = (data); /* Check data is a pointer */ \ + const _type * _data = ( ( const _type * ) _data_void ); \ + const _type * _dbg_data = _data; \ + unsigned int _count = (count); \ + unsigned int _dbg_count = _count; \ + DBGIO ( "[" _prefix " %08lx] <=", io_to_bus ( _io_addr ) ); \ + while ( _dbg_count-- ) { \ + DBGIO ( " %0" #_ndigits "llx", \ + ( ( unsigned long long ) *(_dbg_data++) ) ); \ + } \ + DBGIO ( "\n" ); \ + _func ( _io_addr, _data, _count ); \ + } while ( 0 ) + +/** + * Convert physical address to a bus address + * + * @v phys_addr Physical address + * @ret bus_addr Bus address + */ +unsigned long phys_to_bus ( unsigned long phys_addr ); + +/** + * Convert bus address to a physical address + * + * @v bus_addr Bus address + * @ret phys_addr Physical address + */ +unsigned long bus_to_phys ( unsigned long bus_addr ); + +/** + * Convert virtual address to a bus address + * + * @v addr Virtual address + * @ret bus_addr Bus address + */ +static inline __always_inline unsigned long +virt_to_bus ( volatile const void *addr ) { + return phys_to_bus ( virt_to_phys ( addr ) ); +} + +/** + * Convert bus address to a virtual address + * + * @v bus_addr Bus address + * @ret addr Virtual address + * + * This operation is not available under all memory models. + */ +static inline __always_inline void * bus_to_virt ( unsigned long bus_addr ) { + return phys_to_virt ( bus_to_phys ( bus_addr ) ); +} + +/** + * Map bus address as an I/O address + * + * @v bus_addr Bus address + * @v len Length of region + * @ret io_addr I/O address + */ +void * ioremap ( unsigned long bus_addr, size_t len ); + +/** + * Unmap I/O address + * + * @v io_addr I/O address + */ +void iounmap ( volatile const void *io_addr ); + +/** + * Convert I/O address to bus address (for debug only) + * + * @v io_addr I/O address + * @ret bus_addr Bus address + */ +unsigned long io_to_bus ( volatile const void *io_addr ); + +/** + * Read byte from memory-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +uint8_t readb ( volatile uint8_t *io_addr ); +#define readb( io_addr ) IOAPI_READ ( readb, uint8_t, io_addr, "MEM", 2 ) + +/** + * Read 16-bit word from memory-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +uint16_t readw ( volatile uint16_t *io_addr ); +#define readw( io_addr ) IOAPI_READ ( readw, uint16_t, io_addr, "MEM", 4 ) + +/** + * Read 32-bit dword from memory-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +uint32_t readl ( volatile uint32_t *io_addr ); +#define readl( io_addr ) IOAPI_READ ( readl, uint32_t, io_addr, "MEM", 8 ) + +/** + * Read 64-bit qword from memory-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +uint64_t readq ( volatile uint64_t *io_addr ); +#define readq( io_addr ) IOAPI_READ ( readq, uint64_t, io_addr, "MEM", 16 ) + +/** + * Write byte to memory-mapped device + * + * @v data Value to write + * @v io_addr I/O address + */ +void writeb ( uint8_t data, volatile uint8_t *io_addr ); +#define writeb( data, io_addr ) \ + IOAPI_WRITE ( writeb, uint8_t, data, io_addr, "MEM", 2 ) + +/** + * Write 16-bit word to memory-mapped device + * + * @v data Value to write + * @v io_addr I/O address + */ +void writew ( uint16_t data, volatile uint16_t *io_addr ); +#define writew( data, io_addr ) \ + IOAPI_WRITE ( writew, uint16_t, data, io_addr, "MEM", 4 ) + +/** + * Write 32-bit dword to memory-mapped device + * + * @v data Value to write + * @v io_addr I/O address + */ +void writel ( uint32_t data, volatile uint32_t *io_addr ); +#define writel( data, io_addr ) \ + IOAPI_WRITE ( writel, uint32_t, data, io_addr, "MEM", 8 ) + +/** + * Write 64-bit qword to memory-mapped device + * + * @v data Value to write + * @v io_addr I/O address + */ +void writeq ( uint64_t data, volatile uint64_t *io_addr ); +#define writeq( data, io_addr ) \ + IOAPI_WRITE ( writeq, uint64_t, data, io_addr, "MEM", 16 ) + +/** + * Read byte from I/O-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +uint8_t inb ( volatile uint8_t *io_addr ); +#define inb( io_addr ) IOAPI_READ ( inb, uint8_t, io_addr, "IO", 2 ) + +/** + * Read 16-bit word from I/O-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +uint16_t inw ( volatile uint16_t *io_addr ); +#define inw( io_addr ) IOAPI_READ ( inw, uint16_t, io_addr, "IO", 4 ) + +/** + * Read 32-bit dword from I/O-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +uint32_t inl ( volatile uint32_t *io_addr ); +#define inl( io_addr ) IOAPI_READ ( inl, uint32_t, io_addr, "IO", 8 ) + +/** + * Write byte to I/O-mapped device + * + * @v data Value to write + * @v io_addr I/O address + */ +void outb ( uint8_t data, volatile uint8_t *io_addr ); +#define outb( data, io_addr ) \ + IOAPI_WRITE ( outb, uint8_t, data, io_addr, "IO", 2 ) + +/** + * Write 16-bit word to I/O-mapped device + * + * @v data Value to write + * @v io_addr I/O address + */ +void outw ( uint16_t data, volatile uint16_t *io_addr ); +#define outw( data, io_addr ) \ + IOAPI_WRITE ( outw, uint16_t, data, io_addr, "IO", 4 ) + +/** + * Write 32-bit dword to I/O-mapped device + * + * @v data Value to write + * @v io_addr I/O address + */ +void outl ( uint32_t data, volatile uint32_t *io_addr ); +#define outl( data, io_addr ) \ + IOAPI_WRITE ( outl, uint32_t, data, io_addr, "IO", 8 ) + +/** + * Read bytes from I/O-mapped device + * + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of bytes to read + */ +void insb ( volatile uint8_t *io_addr, uint8_t *data, unsigned int count ); +#define insb( io_addr, data, count ) \ + IOAPI_READS ( insb, uint8_t, io_addr, data, count, "IO", 2 ) + +/** + * Read 16-bit words from I/O-mapped device + * + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of words to read + */ +void insw ( volatile uint16_t *io_addr, uint16_t *data, unsigned int count ); +#define insw( io_addr, data, count ) \ + IOAPI_READS ( insw, uint16_t, io_addr, data, count, "IO", 4 ) + +/** + * Read 32-bit words from I/O-mapped device + * + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of words to read + */ +void insl ( volatile uint32_t *io_addr, uint32_t *data, unsigned int count ); +#define insl( io_addr, data, count ) \ + IOAPI_READS ( insl, uint32_t, io_addr, data, count, "IO", 8 ) + +/** + * Write bytes to I/O-mapped device + * + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of bytes to write + */ +void outsb ( volatile uint8_t *io_addr, const uint8_t *data, + unsigned int count ); +#define outsb( io_addr, data, count ) \ + IOAPI_WRITES ( outsb, uint8_t, io_addr, data, count, "IO", 2 ) + +/** + * Write 16-bit words to I/O-mapped device + * + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of words to write + */ +void outsw ( volatile uint16_t *io_addr, const uint16_t *data, + unsigned int count ); +#define outsw( io_addr, data, count ) \ + IOAPI_WRITES ( outsw, uint16_t, io_addr, data, count, "IO", 4 ) + +/** + * Write 32-bit words to I/O-mapped device + * + * @v io_addr I/O address + * @v data Data buffer + * @v count Number of words to write + */ +void outsl ( volatile uint32_t *io_addr, const uint32_t *data, + unsigned int count ); +#define outsl( io_addr, data, count ) \ + IOAPI_WRITES ( outsl, uint32_t, io_addr, data, count, "IO", 8 ) + +/** + * Slow down I/O + * + */ +void iodelay ( void ); + +/** + * Read value from I/O-mapped device, slowly + * + * @v _func Function to use to read value + * @v data Value to write + * @v io_addr I/O address + */ +#define INX_P( _func, _type, io_addr ) ( { \ + _type _data = _func ( (io_addr) ); \ + iodelay(); \ + _data; } ) + +/** + * Read byte from I/O-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +#define inb_p( io_addr ) INX_P ( inb, uint8_t, io_addr ) + +/** + * Read 16-bit word from I/O-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +#define inw_p( io_addr ) INX_P ( inw, uint16_t, io_addr ) + +/** + * Read 32-bit dword from I/O-mapped device + * + * @v io_addr I/O address + * @ret data Value read + */ +#define inl_p( io_addr ) INX_P ( inl, uint32_t, io_addr ) + +/** + * Write value to I/O-mapped device, slowly + * + * @v _func Function to use to write value + * @v data Value to write + * @v io_addr I/O address + */ +#define OUTX_P( _func, data, io_addr ) do { \ + _func ( (data), (io_addr) ); \ + iodelay(); \ + } while ( 0 ) + +/** + * Write byte to I/O-mapped device, slowly + * + * @v data Value to write + * @v io_addr I/O address + */ +#define outb_p( data, io_addr ) OUTX_P ( outb, data, io_addr ) + +/** + * Write 16-bit word to I/O-mapped device, slowly + * + * @v data Value to write + * @v io_addr I/O address + */ +#define outw_p( data, io_addr ) OUTX_P ( outw, data, io_addr ) + +/** + * Write 32-bit dword to I/O-mapped device, slowly + * + * @v data Value to write + * @v io_addr I/O address + */ +#define outl_p( data, io_addr ) OUTX_P ( outl, data, io_addr ) + +/** + * Memory barrier + * + */ +void mb ( void ); +#define rmb() mb() +#define wmb() mb() + +/** A usable memory region */ +struct memory_region { + /** Physical start address */ + uint64_t start; + /** Physical end address */ + uint64_t end; +}; + +/** Maximum number of memory regions we expect to encounter */ +#define MAX_MEMORY_REGIONS 8 + +/** A memory map */ +struct memory_map { + /** Memory regions */ + struct memory_region regions[MAX_MEMORY_REGIONS]; + /** Number of used regions */ + unsigned int count; +}; + +/** + * Get memory map + * + * @v memmap Memory map to fill in + */ +void get_memmap ( struct memory_map *memmap ); + +#endif /* _IPXE_IO_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/iobuf.h b/qemu/roms/ipxe/src/include/ipxe/iobuf.h new file mode 100644 index 000000000..b2b0cb440 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/iobuf.h @@ -0,0 +1,221 @@ +#ifndef _IPXE_IOBUF_H +#define _IPXE_IOBUF_H + +/** @file + * + * I/O buffers + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <assert.h> +#include <ipxe/list.h> + +/** + * Minimum I/O buffer length + * + * alloc_iob() will round up the allocated length to this size if + * necessary. This is used on behalf of hardware that is not capable + * of auto-padding. + */ +#define IOB_ZLEN 64 + +/** + * A persistent I/O buffer + * + * This data structure encapsulates a long-lived I/O buffer. The + * buffer may be passed between multiple owners, queued for possible + * retransmission, etc. + */ +struct io_buffer { + /** List of which this buffer is a member + * + * The list must belong to the current owner of the buffer. + * Different owners may maintain different lists (e.g. a + * retransmission list for TCP). + */ + struct list_head list; + + /** Start of the buffer */ + void *head; + /** Start of data */ + void *data; + /** End of data */ + void *tail; + /** End of the buffer */ + void *end; +}; + +/** + * Reserve space at start of I/O buffer + * + * @v iobuf I/O buffer + * @v len Length to reserve + * @ret data Pointer to new start of buffer + */ +static inline void * iob_reserve ( struct io_buffer *iobuf, size_t len ) { + iobuf->data += len; + iobuf->tail += len; + return iobuf->data; +} +#define iob_reserve( iobuf, len ) ( { \ + void *__result; \ + __result = iob_reserve ( (iobuf), (len) ); \ + assert ( (iobuf)->tail <= (iobuf)->end ); \ + __result; } ) + +/** + * Add data to start of I/O buffer + * + * @v iobuf I/O buffer + * @v len Length to add + * @ret data Pointer to new start of buffer + */ +static inline void * iob_push ( struct io_buffer *iobuf, size_t len ) { + iobuf->data -= len; + return iobuf->data; +} +#define iob_push( iobuf, len ) ( { \ + void *__result; \ + __result = iob_push ( (iobuf), (len) ); \ + assert ( (iobuf)->data >= (iobuf)->head ); \ + __result; } ) + +/** + * Remove data from start of I/O buffer + * + * @v iobuf I/O buffer + * @v len Length to remove + * @ret data Pointer to new start of buffer + */ +static inline void * iob_pull ( struct io_buffer *iobuf, size_t len ) { + iobuf->data += len; + assert ( iobuf->data <= iobuf->tail ); + return iobuf->data; +} +#define iob_pull( iobuf, len ) ( { \ + void *__result; \ + __result = iob_pull ( (iobuf), (len) ); \ + assert ( (iobuf)->data <= (iobuf)->tail ); \ + __result; } ) + +/** + * Add data to end of I/O buffer + * + * @v iobuf I/O buffer + * @v len Length to add + * @ret data Pointer to newly added space + */ +static inline void * iob_put ( struct io_buffer *iobuf, size_t len ) { + void *old_tail = iobuf->tail; + iobuf->tail += len; + return old_tail; +} +#define iob_put( iobuf, len ) ( { \ + void *__result; \ + __result = iob_put ( (iobuf), (len) ); \ + assert ( (iobuf)->tail <= (iobuf)->end ); \ + __result; } ) + +/** + * Remove data from end of I/O buffer + * + * @v iobuf I/O buffer + * @v len Length to remove + */ +static inline void iob_unput ( struct io_buffer *iobuf, size_t len ) { + iobuf->tail -= len; +} +#define iob_unput( iobuf, len ) do { \ + iob_unput ( (iobuf), (len) ); \ + assert ( (iobuf)->tail >= (iobuf)->data ); \ + } while ( 0 ) + +/** + * Empty an I/O buffer + * + * @v iobuf I/O buffer + */ +static inline void iob_empty ( struct io_buffer *iobuf ) { + iobuf->tail = iobuf->data; +} + +/** + * Calculate length of data in an I/O buffer + * + * @v iobuf I/O buffer + * @ret len Length of data in buffer + */ +static inline size_t iob_len ( struct io_buffer *iobuf ) { + return ( iobuf->tail - iobuf->data ); +} + +/** + * Calculate available space at start of an I/O buffer + * + * @v iobuf I/O buffer + * @ret len Length of data available at start of buffer + */ +static inline size_t iob_headroom ( struct io_buffer *iobuf ) { + return ( iobuf->data - iobuf->head ); +} + +/** + * Calculate available space at end of an I/O buffer + * + * @v iobuf I/O buffer + * @ret len Length of data available at end of buffer + */ +static inline size_t iob_tailroom ( struct io_buffer *iobuf ) { + return ( iobuf->end - iobuf->tail ); +} + +/** + * Create a temporary I/O buffer + * + * @v iobuf I/O buffer + * @v data Data buffer + * @v len Length of data + * @v max_len Length of buffer + * + * It is sometimes useful to use the iob_xxx() methods on temporary + * data buffers. + */ +static inline void iob_populate ( struct io_buffer *iobuf, + void *data, size_t len, size_t max_len ) { + iobuf->head = iobuf->data = data; + iobuf->tail = ( data + len ); + iobuf->end = ( data + max_len ); +} + +/** + * Disown an I/O buffer + * + * @v iobuf I/O buffer + * + * There are many functions that take ownership of the I/O buffer they + * are passed as a parameter. The caller should not retain a pointer + * to the I/O buffer. Use iob_disown() to automatically nullify the + * caller's pointer, e.g.: + * + * xfer_deliver_iob ( xfer, iob_disown ( iobuf ) ); + * + * This will ensure that iobuf is set to NULL for any code after the + * call to xfer_deliver_iob(). + */ +#define iob_disown( iobuf ) ( { \ + struct io_buffer *__iobuf = (iobuf); \ + (iobuf) = NULL; \ + __iobuf; } ) + +extern struct io_buffer * __malloc alloc_iob_raw ( size_t len, size_t align, + size_t offset ); +extern struct io_buffer * __malloc alloc_iob ( size_t len ); +extern void free_iob ( struct io_buffer *iobuf ); +extern void iob_pad ( struct io_buffer *iobuf, size_t min_len ); +extern int iob_ensure_headroom ( struct io_buffer *iobuf, size_t len ); +extern struct io_buffer * iob_concatenate ( struct list_head *list ); + +#endif /* _IPXE_IOBUF_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ip.h b/qemu/roms/ipxe/src/include/ipxe/ip.h new file mode 100644 index 000000000..1a93a552e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ip.h @@ -0,0 +1,84 @@ +#ifndef _IPXE_IP_H +#define _IPXE_IP_H + +/** @file + * + * IP protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/in.h> +#include <ipxe/list.h> +#include <ipxe/retry.h> +#include <ipxe/netdevice.h> + +struct io_buffer; + +/* IP constants */ + +#define IP_VER 0x40U +#define IP_MASK_VER 0xf0U +#define IP_MASK_HLEN 0x0fU +#define IP_MASK_OFFSET 0x1fffU +#define IP_MASK_DONOTFRAG 0x4000U +#define IP_MASK_MOREFRAGS 0x2000U +#define IP_PSHLEN 12 + +/* IP header defaults */ +#define IP_TOS 0 +#define IP_TTL 64 + +/** An IPv4 packet header */ +struct iphdr { + uint8_t verhdrlen; + uint8_t service; + uint16_t len; + uint16_t ident; + uint16_t frags; + uint8_t ttl; + uint8_t protocol; + uint16_t chksum; + struct in_addr src; + struct in_addr dest; +} __attribute__ (( packed )); + +/** An IPv4 pseudo header */ +struct ipv4_pseudo_header { + struct in_addr src; + struct in_addr dest; + uint8_t zero_padding; + uint8_t protocol; + uint16_t len; +}; + +/** An IPv4 address/routing table entry */ +struct ipv4_miniroute { + /** List of miniroutes */ + struct list_head list; + + /** Network device */ + struct net_device *netdev; + + /** IPv4 address */ + struct in_addr address; + /** Subnet mask */ + struct in_addr netmask; + /** Gateway address */ + struct in_addr gateway; +}; + +extern struct list_head ipv4_miniroutes; + +extern struct net_protocol ipv4_protocol __net_protocol; + +extern int ipv4_has_any_addr ( struct net_device *netdev ); +extern int parse_ipv4_setting ( const struct setting_type *type, + const char *value, void *buf, size_t len ); +extern int format_ipv4_setting ( const struct setting_type *type, + const void *raw, size_t raw_len, char *buf, + size_t len ); + +#endif /* _IPXE_IP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ipoib.h b/qemu/roms/ipxe/src/include/ipxe/ipoib.h new file mode 100644 index 000000000..68ff8df49 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ipoib.h @@ -0,0 +1,66 @@ +#ifndef _IPXE_IPOIB_H +#define _IPXE_IPOIB_H + +/** @file + * + * IP over Infiniband + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/if_arp.h> +#include <ipxe/infiniband.h> + +/** IPoIB MAC address length */ +#define IPOIB_ALEN 20 + +/** An IPoIB MAC address */ +struct ipoib_mac { + /** Queue pair number + * + * MSB indicates support for IPoIB "connected mode". Lower 24 + * bits are the QPN. + */ + uint32_t flags__qpn; + /** Port GID */ + union ib_gid gid; +} __attribute__ (( packed )); + +/** IPoIB link-layer header length */ +#define IPOIB_HLEN 4 + +/** IPoIB link-layer header */ +struct ipoib_hdr { + /** Network-layer protocol */ + uint16_t proto; + /** Reserved, must be zero */ + uint16_t reserved; +} __attribute__ (( packed )); + +/** GUID mask used for constructing eIPoIB Local Ethernet MAC address (LEMAC) */ +#define IPOIB_GUID_MASK 0xe7 + +/** eIPoIB Remote Ethernet MAC address + * + * An eIPoIB REMAC address is an Ethernet-like (6 byte) link-layer + * pseudo-address used to look up a full IPoIB link-layer address. + */ +struct ipoib_remac { + /** Remote QPN + * + * Must be ORed with EIPOIB_QPN_LA so that eIPoIB REMAC + * addresses are considered as locally-assigned Ethernet MAC + * addreses. + */ + uint32_t qpn; + /** Remote LID */ + uint16_t lid; +} __attribute__ (( packed )); + +/** eIPoIB REMAC locally-assigned address indicator */ +#define EIPOIB_QPN_LA 0x02000000UL + +extern const char * ipoib_ntoa ( const void *ll_addr ); +extern struct net_device * alloc_ipoibdev ( size_t priv_size ); + +#endif /* _IPXE_IPOIB_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ipstat.h b/qemu/roms/ipxe/src/include/ipxe/ipstat.h new file mode 100644 index 000000000..c554c1859 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ipstat.h @@ -0,0 +1,187 @@ +#ifndef _IPXE_IPSTATS_H +#define _IPXE_IPSTATS_H + +/** @file + * + * IP statistics + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tables.h> + +struct io_buffer; + +/** IP system statistics + * + * Definitions are taken from the RFC4293 section 5 + * "ipSystemStatsEntry" table. + * + * To minimise code size, we use "unsigned long" as the counter + * variable type regardless of whether this type is 32-bit or 64-bit. + * On a 32-bit build (e.g. the standard BIOS build), this means that + * we omit the "high capacity" 64-bit counters (prefixed with "HC"). + * This reduces the code size required to maintain the counter values, + * and avoids the need to support the "%lld" format in vsprintf.c + * (which would require dragging in the 64-bit division library on a + * standard 32-bit build). Since total available memory in a 32-bit + * environment is limited to 4GB, it is unlikely that we will overflow + * even the 32-bit octet counters under normal operation. + * + * Counters relating to packet forwarding are omitted, since iPXE + * includes no functionality for acting as a router. + * + * Counters related to output fragmentation are omitted, since iPXE + * has no support for fragmenting transmitted packets. + * + * The ipSystemStatsInDiscards and ipSystemStatsOutDiscards counters + * are omitted, since they will always be zero. + * + * Separate octet counters for multicast packets are omitted to save + * code size. + */ +struct ip_statistics { + /** ipSystemStatsInReceives + * + * The total number of input IP datagrams received, including + * those received in error. + */ + unsigned long in_receives; + /** ipSystemStatsInOctets + * + * The total number of octets received in input IP datagrams, + * including those received in error. Octets from datagrams + * counted in ipSystemStatsInReceives MUST be counted here. + */ + unsigned long in_octets; + /** ipSystemStatsInHdrErrors + * + * The number of input IP datagrams discarded due to errors in + * their IP headers, including version number mismatch, other + * format errors, hop count exceeded, errors discovered in + * processing their IP options, etc. + */ + unsigned long in_hdr_errors; + /** ipSystemStatsInAddrErrors + * + * The number of input IP datagrams discarded because the IP + * address in their IP header's destination field was not a + * valid address to be received at this entity. This count + * includes invalid addresses (e.g., ::0). For entities that + * are not IP routers and therefore do not forward datagrams, + * this counter includes datagrams discarded because the + * destination address was not a local address. + */ + unsigned long in_addr_errors; + /** ipSystemStatsInUnknownProtos + * + * The number of locally-addressed IP datagrams received + * successfully but discarded because of an unknown or + * unsupported protocol. + */ + unsigned long in_unknown_protos; + /** ipSystemStatsInTruncatedPkts + * + * The number of input IP datagrams discarded because the + * datagram frame didn't carry enough data. + */ + unsigned long in_truncated_pkts; + /** ipSystemStatsReasmReqds + * + * The number of IP fragments received that needed to be + * reassembled at this interface. + */ + unsigned long reasm_reqds; + /** ipSystemStatsReasmOks + * + * The number of IP datagrams successfully reassembled. + */ + unsigned long reasm_oks; + /** ipSystemStatsReasmFails + * + * The number of failures detected by the IP re-assembly + * algorithm (for whatever reason: timed out, errors, etc.). + * Note that this is not necessarily a count of discarded IP + * fragments since some algorithms (notably the algorithm in + * RFC 815) can lose track of the number of fragments by + * combining them as they are received. + */ + unsigned long reasm_fails; + /** ipSystemStatsInDelivers + * + * The total number of datagrams successfully delivered to IP + * user-protocols (including ICMP). + */ + unsigned long in_delivers; + /** ipSystemStatsOutRequests + * + * The total number of IP datagrams that local IP user- + * protocols (including ICMP) supplied to IP in requests for + * transmission. + */ + unsigned long out_requests; + /** ipSystemStatsOutNoRoutes + * + * The number of locally generated IP datagrams discarded + * because no route could be found to transmit them to their + * destination. + */ + unsigned long out_no_routes; + /** ipSystemStatsOutTransmits + * + * The total number of IP datagrams that this entity supplied + * to the lower layers for transmission. This includes + * datagrams generated locally and those forwarded by this + * entity. + */ + unsigned long out_transmits; + /** ipSystemStatsOutOctets + * + * The total number of octets in IP datagrams delivered to the + * lower layers for transmission. Octets from datagrams + * counted in ipSystemStatsOutTransmits MUST be counted here. + */ + unsigned long out_octets; + /** ipSystemStatsInMcastPkts + * + * The number of IP multicast datagrams received. + */ + unsigned long in_mcast_pkts; + /** ipSystemStatsOutMcastPkts + * + * The number of IP multicast datagrams transmitted. + */ + unsigned long out_mcast_pkts; + /** ipSystemStatsInBcastPkts + * + * The number of IP broadcast datagrams received. + */ + unsigned long in_bcast_pkts; + /** ipSystemStatsOutBcastPkts + * + * The number of IP broadcast datagrams transmitted. + */ + unsigned long out_bcast_pkts; +}; + +/** An IP system statistics family */ +struct ip_statistics_family { + /** IP version */ + unsigned int version; + /** Statistics */ + struct ip_statistics *stats; +}; + +/** IP system statistics family table */ +#define IP_STATISTICS_FAMILIES \ + __table ( struct ip_statistics_family, "ip_statistics_families" ) + +/** Declare an IP system statistics family */ +#define __ip_statistics_family( order ) \ + __table_entry ( IP_STATISTICS_FAMILIES, order ) + +#define IP_STATISTICS_IPV4 01 +#define IP_STATISTICS_IPV6 02 + +#endif /* _IPXE_IPSTATS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ipv6.h b/qemu/roms/ipxe/src/include/ipxe/ipv6.h new file mode 100644 index 000000000..48aaf677e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ipv6.h @@ -0,0 +1,256 @@ +#ifndef _IPXE_IPV6_H +#define _IPXE_IPV6_H + +/** @file + * + * IPv6 protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <string.h> +#include <byteswap.h> +#include <ipxe/in.h> +#include <ipxe/list.h> +#include <ipxe/netdevice.h> + +/** IPv6 version */ +#define IPV6_VER 0x60000000UL + +/** IPv6 version mask */ +#define IPV6_MASK_VER 0xf0000000UL + +/** IPv6 maximum hop limit */ +#define IPV6_HOP_LIMIT 0xff + +/** IPv6 header */ +struct ipv6_header { + /** Version (4 bits), Traffic class (8 bits), Flow label (20 bits) */ + uint32_t ver_tc_label; + /** Payload length, including any extension headers */ + uint16_t len; + /** Next header type */ + uint8_t next_header; + /** Hop limit */ + uint8_t hop_limit; + /** Source address */ + struct in6_addr src; + /** Destination address */ + struct in6_addr dest; +} __attribute__ (( packed )); + +/** IPv6 extension header common fields */ +struct ipv6_extension_header_common { + /** Next header type */ + uint8_t next_header; + /** Header extension length (excluding first 8 bytes) */ + uint8_t len; +} __attribute__ (( packed )); + +/** IPv6 type-length-value options */ +struct ipv6_option { + /** Type */ + uint8_t type; + /** Length */ + uint8_t len; + /** Value */ + uint8_t value[0]; +} __attribute__ (( packed )); + +/** IPv6 option types */ +enum ipv6_option_type { + /** Pad1 */ + IPV6_OPT_PAD1 = 0x00, + /** PadN */ + IPV6_OPT_PADN = 0x01, +}; + +/** Test if IPv6 option can be safely ignored */ +#define IPV6_CAN_IGNORE_OPT( type ) ( ( (type) & 0xc0 ) == 0x00 ) + +/** IPv6 option-based extension header */ +struct ipv6_options_header { + /** Extension header common fields */ + struct ipv6_extension_header_common common; + /** Options */ + struct ipv6_option options[0]; +} __attribute__ (( packed )); + +/** IPv6 routing header */ +struct ipv6_routing_header { + /** Extension header common fields */ + struct ipv6_extension_header_common common; + /** Routing type */ + uint8_t type; + /** Segments left */ + uint8_t remaining; + /** Type-specific data */ + uint8_t data[0]; +} __attribute__ (( packed )); + +/** IPv6 fragment header */ +struct ipv6_fragment_header { + /** Extension header common fields */ + struct ipv6_extension_header_common common; + /** Fragment offset (13 bits), reserved, more fragments (1 bit) */ + uint16_t offset_more; + /** Identification */ + uint32_t ident; +} __attribute__ (( packed )); + +/** Fragment offset mask */ +#define IPV6_MASK_OFFSET 0xfff8 + +/** More fragments */ +#define IPV6_MASK_MOREFRAGS 0x0001 + +/** IPv6 extension header */ +union ipv6_extension_header { + /** Extension header common fields */ + struct ipv6_extension_header_common common; + /** Minimum size padding */ + uint8_t pad[8]; + /** Generic options header */ + struct ipv6_options_header options; + /** Hop-by-hop options header */ + struct ipv6_options_header hopbyhop; + /** Routing header */ + struct ipv6_routing_header routing; + /** Fragment header */ + struct ipv6_fragment_header fragment; + /** Destination options header */ + struct ipv6_options_header destination; +}; + +/** IPv6 header types */ +enum ipv6_header_type { + /** IPv6 hop-by-hop options header type */ + IPV6_HOPBYHOP = 0, + /** IPv6 routing header type */ + IPV6_ROUTING = 43, + /** IPv6 fragment header type */ + IPV6_FRAGMENT = 44, + /** IPv6 no next header type */ + IPV6_NO_HEADER = 59, + /** IPv6 destination options header type */ + IPV6_DESTINATION = 60, +}; + +/** IPv6 pseudo-header */ +struct ipv6_pseudo_header { + /** Source address */ + struct in6_addr src; + /** Destination address */ + struct in6_addr dest; + /** Upper-layer packet length */ + uint32_t len; + /** Zero padding */ + uint8_t zero[3]; + /** Next header */ + uint8_t next_header; +} __attribute__ (( packed )); + +/** An IPv6 address/routing table entry */ +struct ipv6_miniroute { + /** List of miniroutes */ + struct list_head list; + + /** Network device */ + struct net_device *netdev; + + /** IPv6 address (or prefix if no address is defined) */ + struct in6_addr address; + /** Prefix length */ + unsigned int prefix_len; + /** IPv6 prefix mask (derived from prefix length) */ + struct in6_addr prefix_mask; + /** Router address */ + struct in6_addr router; + /** Flags */ + unsigned int flags; +}; + +/** IPv6 address/routing table entry flags */ +enum ipv6_miniroute_flags { + /** Routing table entry address is valid */ + IPV6_HAS_ADDRESS = 0x0001, + /** Routing table entry router address is valid */ + IPV6_HAS_ROUTER = 0x0002, +}; + +/** + * Construct local IPv6 address via EUI-64 + * + * @v addr Prefix to be completed + * @v netdev Network device + * @ret prefix_len Prefix length, or negative error + */ +static inline int ipv6_eui64 ( struct in6_addr *addr, + struct net_device *netdev ) { + struct ll_protocol *ll_protocol = netdev->ll_protocol; + const void *ll_addr = netdev->ll_addr; + int rc; + + if ( ( rc = ll_protocol->eui64 ( ll_addr, &addr->s6_addr[8] ) ) != 0 ) + return rc; + addr->s6_addr[8] ^= 0x02; + return 64; +} + +/** + * Construct link-local address via EUI-64 + * + * @v addr Zeroed address to construct + * @v netdev Network device + * @ret prefix_len Prefix length, or negative error + */ +static inline int ipv6_link_local ( struct in6_addr *addr, + struct net_device *netdev ) { + + addr->s6_addr16[0] = htons ( 0xfe80 ); + return ipv6_eui64 ( addr, netdev ); +} + +/** + * Construct solicited-node multicast address + * + * @v addr Zeroed address to construct + * @v unicast Unicast address + */ +static inline void ipv6_solicited_node ( struct in6_addr *addr, + const struct in6_addr *unicast ) { + + addr->s6_addr16[0] = htons ( 0xff02 ); + addr->s6_addr[11] = 1; + addr->s6_addr[12] = 0xff; + memcpy ( &addr->s6_addr[13], &unicast->s6_addr[13], 3 ); +} + +/** + * Construct all-routers multicast address + * + * @v addr Zeroed address to construct + */ +static inline void ipv6_all_routers ( struct in6_addr *addr ) { + addr->s6_addr16[0] = htons ( 0xff02 ); + addr->s6_addr[15] = 2; +} + +extern struct list_head ipv6_miniroutes; + +extern struct net_protocol ipv6_protocol __net_protocol; + +extern int ipv6_has_addr ( struct net_device *netdev, struct in6_addr *addr ); +extern int ipv6_set_prefix ( struct net_device *netdev, struct in6_addr *prefix, + unsigned int prefix_len, struct in6_addr *router ); +extern int ipv6_set_address ( struct net_device *netdev, + struct in6_addr *address ); +extern int parse_ipv6_setting ( const struct setting_type *type, + const char *value, void *buf, size_t len ); +extern int format_ipv6_setting ( const struct setting_type *type, + const void *raw, size_t raw_len, char *buf, + size_t len ); + +#endif /* _IPXE_IPV6_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/isa.h b/qemu/roms/ipxe/src/include/ipxe/isa.h new file mode 100644 index 000000000..4e69fc6f7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/isa.h @@ -0,0 +1,95 @@ +#ifndef ISA_H +#define ISA_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/isa_ids.h> +#include <ipxe/device.h> +#include <ipxe/tables.h> + +/** An ISA device */ +struct isa_device { + /** Generic device */ + struct device dev; + /** I/O address */ + uint16_t ioaddr; + /** Driver for this device */ + struct isa_driver *driver; + /** Driver-private data + * + * Use isa_set_drvdata() and isa_get_drvdata() to access + * this field. + */ + void *priv; +}; + +/* + * An individual ISA device, identified by probe address + * + */ +typedef uint16_t isa_probe_addr_t; + +/** An ISA driver */ +struct isa_driver { + /** Name */ + const char *name; + /** Probe address list */ + isa_probe_addr_t *probe_addrs; + /** Number of entries in probe address list */ + unsigned int addr_count; + /** Manufacturer ID to be assumed for this device */ + uint16_t vendor_id; + /** Product ID to be assumed for this device */ + uint16_t prod_id; + /** + * Probe device + * + * @v isa ISA device + * @v id Matching entry in ID table + * @ret rc Return status code + */ + int ( * probe ) ( struct isa_device *isa ); + /** + * Remove device + * + * @v isa ISA device + */ + void ( * remove ) ( struct isa_device *isa ); +}; + +/** ISA driver table */ +#define ISA_DRIVERS __table ( struct isa_driver, "isa_drivers" ) + +/** Declare an ISA driver */ +#define __isa_driver __table_entry ( ISA_DRIVERS, 01 ) + +/** + * Set ISA driver-private data + * + * @v isa ISA device + * @v priv Private data + */ +static inline void isa_set_drvdata ( struct isa_device *isa, void *priv ) { + isa->priv = priv; +} + +/** + * Get ISA driver-private data + * + * @v isa ISA device + * @ret priv Private data + */ +static inline void * isa_get_drvdata ( struct isa_device *isa ) { + return isa->priv; +} + +/* + * ISA_ROM is parsed by parserom.pl to generate Makefile rules and + * files for rom-o-matic. + * + */ +#define ISA_ROM( IMAGE, DESCRIPTION ) + +#endif /* ISA_H */ + diff --git a/qemu/roms/ipxe/src/include/ipxe/isa_ids.h b/qemu/roms/ipxe/src/include/ipxe/isa_ids.h new file mode 100644 index 000000000..1faf1148d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/isa_ids.h @@ -0,0 +1,51 @@ +#ifndef ISA_IDS_H +#define ISA_IDS_H + +/* + * This file defines IDs as used by ISAPnP and EISA devices. These + * IDs have the format: + * + * vendor byte 0 bit 7 must be zero + * bits 6-2 first vendor char in compressed ASCII + * bits 1-0 second vendor char in compressed ASCII (bits 4-3) + * byte 1 bits 7-5 second vendor char in compressed ASCII (bits 2-0) + * bits 4-0 third vendor char in compressed ASCII + * product byte 0 bits 7-4 first hex digit of product number + * bits 3-0 second hex digit of product number + * byte 1 bits 7-4 third hex digit of product number + * bits 3-0 hex digit of revision level + * + * ISA IDs are always expressed in little-endian order, even though + * the underlying "meaning" is big-endian. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <byteswap.h> + +/* + * Construct a vendor ID from three ASCII characters + * + */ +#define ISA_VENDOR( a, b, c ) \ + bswap_16 ( ( ( ( (a) - 'A' + 1 ) & 0x1f ) << 10 ) | \ + ( ( ( (b) - 'A' + 1 ) & 0x1f ) << 5 ) | \ + ( ( ( (c) - 'A' + 1 ) & 0x1f ) << 0 ) ) + +#define ISAPNP_VENDOR( a, b, c ) ISA_VENDOR ( a, b, c ) +#define EISA_VENDOR( a, b, c ) ISA_VENDOR ( a, b, c ) + +#define GENERIC_ISAPNP_VENDOR ISAPNP_VENDOR ( 'P','N','P' ) + +/* + * Extract product ID and revision from combined product field + * + */ +#define ISA_PROD_ID_MASK ( 0xf0ff ) +#define ISA_PROD_ID(product) ( (product) & ISA_PROD_ID_MASK ) +#define ISA_PROD_REV(product) ( ( (product) & ~ISA_PROD_ID_MASK ) >> 8 ) + +/* Functions in isa_ids.c */ +extern char * isa_id_string ( unsigned int vendor, unsigned int product ); + +#endif /* ISA_IDS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/isapnp.h b/qemu/roms/ipxe/src/include/ipxe/isapnp.h new file mode 100644 index 000000000..b0b0e98d6 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/isapnp.h @@ -0,0 +1,277 @@ +/************************************************************************** +* +* isapnp.h -- Etherboot isapnp support for the 3Com 3c515 +* Written 2002-2003 by Timothy Legge <tlegge@rogers.com> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA +* 02110-1301, USA. +* +* Portions of this code: +* Copyright (C) 2001 P.J.H.Fox (fox@roestock.demon.co.uk) +* +* +* +* REVISION HISTORY: +* ================ +* Version 0.1 April 26, 2002 TJL +* Version 0.2 01/08/2003 TJL Renamed from 3c515_isapnp.h +* +* +* Generalised into an ISAPnP bus that can be used by more than just +* the 3c515 by Michael Brown <mbrown@fensystems.co.uk> +* +***************************************************************************/ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifndef ISAPNP_H +#define ISAPNP_H + +#include <stdint.h> +#include <ipxe/isa_ids.h> +#include <ipxe/device.h> +#include <ipxe/tables.h> + +/* + * ISAPnP constants + * + */ + +/* Port addresses */ +#define ISAPNP_ADDRESS 0x279 +#define ISAPNP_WRITE_DATA 0xa79 +#define ISAPNP_READ_PORT_MIN 0x203 +#define ISAPNP_READ_PORT_START 0x213 /* ISAPnP spec says 0x203, but + * Linux ISAPnP starts at + * 0x213 with no explanatory + * comment. 0x203 probably + * clashes with something. */ +#define ISAPNP_READ_PORT_MAX 0x3ff +#define ISAPNP_READ_PORT_STEP 0x10 /* Can be any multiple of 4 + * according to the spec, but + * since ISA I/O addresses are + * allocated in blocks of 16, + * it makes no sense to use + * any value less than 16. + */ + +/* Card select numbers */ +#define ISAPNP_CSN_MIN 0x01 +#define ISAPNP_CSN_MAX 0x0f + +/* Registers */ +#define ISAPNP_READPORT 0x00 +#define ISAPNP_SERIALISOLATION 0x01 +#define ISAPNP_CONFIGCONTROL 0x02 +#define ISAPNP_WAKE 0x03 +#define ISAPNP_RESOURCEDATA 0x04 +#define ISAPNP_STATUS 0x05 +#define ISAPNP_CARDSELECTNUMBER 0x06 +#define ISAPNP_LOGICALDEVICENUMBER 0x07 +#define ISAPNP_ACTIVATE 0x30 +#define ISAPNP_IORANGECHECK 0x31 +#define ISAPNP_IOBASE(n) ( 0x60 + ( (n) * 2 ) ) +#define ISAPNP_IRQNO(n) ( 0x70 + ( (n) * 2 ) ) +#define ISAPNP_IRQTYPE(n) ( 0x71 + ( (n) * 2 ) ) + +/* Bits in the CONFIGCONTROL register */ +#define ISAPNP_CONFIG_RESET ( 1 << 0 ) +#define ISAPNP_CONFIG_WAIT_FOR_KEY ( 1 << 1 ) +#define ISAPNP_CONFIG_RESET_CSN ( 1 << 2 ) +#define ISAPNP_CONFIG_RESET_DRV ( ISAPNP_CONFIG_RESET | \ + ISAPNP_CONFIG_WAIT_FOR_KEY | \ + ISAPNP_CONFIG_RESET_CSN ) + +/* The LFSR used for the initiation key and for checksumming */ +#define ISAPNP_LFSR_SEED 0x6a + +/* Small tags */ +#define ISAPNP_IS_SMALL_TAG(tag) ( ! ( (tag) & 0x80 ) ) +#define ISAPNP_SMALL_TAG_NAME(tag) ( ( (tag) >> 3 ) & 0xf ) +#define ISAPNP_SMALL_TAG_LEN(tag) ( ( (tag) & 0x7 ) ) +#define ISAPNP_TAG_PNPVERNO 0x01 +#define ISAPNP_TAG_LOGDEVID 0x02 +#define ISAPNP_TAG_COMPATDEVID 0x03 +#define ISAPNP_TAG_IRQ 0x04 +#define ISAPNP_TAG_DMA 0x05 +#define ISAPNP_TAG_STARTDEP 0x06 +#define ISAPNP_TAG_ENDDEP 0x07 +#define ISAPNP_TAG_IOPORT 0x08 +#define ISAPNP_TAG_FIXEDIO 0x09 +#define ISAPNP_TAG_RSVDSHORTA 0x0A +#define ISAPNP_TAG_RSVDSHORTB 0x0B +#define ISAPNP_TAG_RSVDSHORTC 0x0C +#define ISAPNP_TAG_RSVDSHORTD 0x0D +#define ISAPNP_TAG_VENDORSHORT 0x0E +#define ISAPNP_TAG_END 0x0F +/* Large tags */ +#define ISAPNP_IS_LARGE_TAG(tag) ( ( (tag) & 0x80 ) ) +#define ISAPNP_LARGE_TAG_NAME(tag) (tag) +#define ISAPNP_TAG_MEMRANGE 0x81 +#define ISAPNP_TAG_ANSISTR 0x82 +#define ISAPNP_TAG_UNICODESTR 0x83 +#define ISAPNP_TAG_VENDORLONG 0x84 +#define ISAPNP_TAG_MEM32RANGE 0x85 +#define ISAPNP_TAG_FIXEDMEM32RANGE 0x86 +#define ISAPNP_TAG_RSVDLONG0 0xF0 +#define ISAPNP_TAG_RSVDLONG1 0xF1 +#define ISAPNP_TAG_RSVDLONG2 0xF2 +#define ISAPNP_TAG_RSVDLONG3 0xF3 +#define ISAPNP_TAG_RSVDLONG4 0xF4 +#define ISAPNP_TAG_RSVDLONG5 0xF5 +#define ISAPNP_TAG_RSVDLONG6 0xF6 +#define ISAPNP_TAG_RSVDLONG7 0xF7 +#define ISAPNP_TAG_RSVDLONG8 0xF8 +#define ISAPNP_TAG_RSVDLONG9 0xF9 +#define ISAPNP_TAG_RSVDLONGA 0xFA +#define ISAPNP_TAG_RSVDLONGB 0xFB +#define ISAPNP_TAG_RSVDLONGC 0xFC +#define ISAPNP_TAG_RSVDLONGD 0xFD +#define ISAPNP_TAG_RSVDLONGE 0xFE +#define ISAPNP_TAG_RSVDLONGF 0xFF +#define ISAPNP_TAG_PSEUDO_NEWBOARD 0x100 + +/** An ISAPnP serial identifier */ +struct isapnp_identifier { + /** Vendor ID */ + uint16_t vendor_id; + /** Product ID */ + uint16_t prod_id; + /** Serial number */ + uint32_t serial; + /** Checksum */ + uint8_t checksum; +} __attribute__ (( packed )); + +/** An ISAPnP logical device ID structure */ +struct isapnp_logdevid { + /** Vendor ID */ + uint16_t vendor_id; + /** Product ID */ + uint16_t prod_id; + /** Flags */ + uint16_t flags; +} __attribute__ (( packed )); + +/** An ISAPnP device ID list entry */ +struct isapnp_device_id { + /** Name */ + const char *name; + /** Vendor ID */ + uint16_t vendor_id; + /** Product ID */ + uint16_t prod_id; +}; + +/** An ISAPnP device */ +struct isapnp_device { + /** Generic device */ + struct device dev; + /** Vendor ID */ + uint16_t vendor_id; + /** Product ID */ + uint16_t prod_id; + /** I/O address */ + uint16_t ioaddr; + /** Interrupt number */ + uint8_t irqno; + /** Card Select Number */ + uint8_t csn; + /** Logical Device ID */ + uint8_t logdev; + /** Driver for this device */ + struct isapnp_driver *driver; + /** Driver-private data + * + * Use isapnp_set_drvdata() and isapnp_get_drvdata() to access + * this field. + */ + void *priv; +}; + +/** An ISAPnP driver */ +struct isapnp_driver { + /** ISAPnP ID table */ + struct isapnp_device_id *ids; + /** Number of entries in ISAPnP ID table */ + unsigned int id_count; + /** + * Probe device + * + * @v isapnp ISAPnP device + * @v id Matching entry in ID table + * @ret rc Return status code + */ + int ( * probe ) ( struct isapnp_device *isapnp, + const struct isapnp_device_id *id ); + /** + * Remove device + * + * @v isapnp ISAPnP device + */ + void ( * remove ) ( struct isapnp_device *isapnp ); +}; + +/** ISAPnP driver table */ +#define ISAPNP_DRIVERS __table ( struct isapnp_driver, "isapnp_drivers" ) + +/** Declare an ISAPnP driver */ +#define __isapnp_driver __table_entry ( ISAPNP_DRIVERS, 01 ) + +extern uint16_t isapnp_read_port; + +extern void isapnp_device_activation ( struct isapnp_device *isapnp, + int activation ); + +/** + * Activate ISAPnP device + * + * @v isapnp ISAPnP device + */ +static inline void activate_isapnp_device ( struct isapnp_device *isapnp ) { + isapnp_device_activation ( isapnp, 1 ); +} + +/** + * Deactivate ISAPnP device + * + * @v isapnp ISAPnP device + */ +static inline void deactivate_isapnp_device ( struct isapnp_device *isapnp ) { + isapnp_device_activation ( isapnp, 0 ); +} + +/** + * Set ISAPnP driver-private data + * + * @v isapnp ISAPnP device + * @v priv Private data + */ +static inline void isapnp_set_drvdata ( struct isapnp_device *isapnp, + void *priv ) { + isapnp->priv = priv; +} + +/** + * Get ISAPnP driver-private data + * + * @v isapnp ISAPnP device + * @ret priv Private data + */ +static inline void * isapnp_get_drvdata ( struct isapnp_device *isapnp ) { + return isapnp->priv; +} + +#endif /* ISAPNP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/iscsi.h b/qemu/roms/ipxe/src/include/ipxe/iscsi.h new file mode 100644 index 000000000..be71360a0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/iscsi.h @@ -0,0 +1,700 @@ +#ifndef _IPXE_ISCSI_H +#define _IPXE_ISCSI_H + +/** @file + * + * iSCSI protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/socket.h> +#include <ipxe/scsi.h> +#include <ipxe/chap.h> +#include <ipxe/refcnt.h> +#include <ipxe/xfer.h> +#include <ipxe/process.h> + +/** Default iSCSI port */ +#define ISCSI_PORT 3260 + +/** + * iSCSI segment lengths + * + * iSCSI uses an icky structure with one one-byte field (a dword + * count) and one three-byte field (a byte count). This structure, + * and the accompanying macros, relieve some of the pain. + */ +union iscsi_segment_lengths { + struct { + /** The AHS length (measured in dwords) */ + uint8_t ahs_len; + /** The data length (measured in bytes), in network + * byte order + */ + uint8_t data_len[3]; + } bytes; + /** The data length (measured in bytes), in network byte + * order, with ahs_len as the first byte. + */ + uint32_t ahs_and_data_len; +}; + +/** The length of the additional header segment, in dwords */ +#define ISCSI_AHS_LEN( segment_lengths ) \ + ( (segment_lengths).bytes.ahs_len ) + +/** The length of the data segment, in bytes, excluding any padding */ +#define ISCSI_DATA_LEN( segment_lengths ) \ + ( ntohl ( (segment_lengths).ahs_and_data_len ) & 0xffffff ) + +/** The padding of the data segment, in bytes */ +#define ISCSI_DATA_PAD_LEN( segment_lengths ) \ + ( ( 0 - (segment_lengths).bytes.data_len[2] ) & 0x03 ) + +/** Set additional header and data segment lengths */ +#define ISCSI_SET_LENGTHS( segment_lengths, ahs_len, data_len ) do { \ + (segment_lengths).ahs_and_data_len = \ + htonl ( data_len | ( ahs_len << 24 ) ); \ + } while ( 0 ) + +/** + * iSCSI basic header segment common fields + * + */ +struct iscsi_bhs_common { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Fields specific to the PDU type */ + uint8_t other_a[2]; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Fields specific to the PDU type */ + uint8_t other_b[8]; + /** Initiator Task Tag */ + uint32_t itt; + /** Fields specific to the PDU type */ + uint8_t other_c[28]; +}; + +/** Opcode mask */ +#define ISCSI_OPCODE_MASK 0x3f + +/** Immediate delivery */ +#define ISCSI_FLAG_IMMEDIATE 0x40 + +/** Final PDU of a sequence */ +#define ISCSI_FLAG_FINAL 0x80 + +/** iSCSI tag magic marker */ +#define ISCSI_TAG_MAGIC 0x18ae0000 + +/** iSCSI reserved tag value */ +#define ISCSI_TAG_RESERVED 0xffffffff + +/** + * iSCSI basic header segment common request fields + * + */ +struct iscsi_bhs_common_response { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Fields specific to the PDU type */ + uint8_t other_a[2]; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Fields specific to the PDU type */ + uint8_t other_b[8]; + /** Initiator Task Tag */ + uint32_t itt; + /** Fields specific to the PDU type */ + uint8_t other_c[4]; + /** Status sequence number */ + uint32_t statsn; + /** Expected command sequence number */ + uint32_t expcmdsn; + /** Fields specific to the PDU type */ + uint8_t other_d[16]; +}; + +/** + * iSCSI login request basic header segment + * + */ +struct iscsi_bhs_login_request { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Maximum supported version number */ + uint8_t version_max; + /** Minimum supported version number */ + uint8_t version_min; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Initiator session ID (IANA format) enterprise number and flags */ + uint32_t isid_iana_en; + /** Initiator session ID (IANA format) qualifier */ + uint16_t isid_iana_qual; + /** Target session identifying handle */ + uint16_t tsih; + /** Initiator Task Tag */ + uint32_t itt; + /** Connection ID */ + uint16_t cid; + /** Reserved */ + uint16_t reserved_a; + /** Command sequence number */ + uint32_t cmdsn; + /** Expected status sequence number */ + uint32_t expstatsn; + /** Reserved */ + uint8_t reserved_b[16]; +}; + +/** Login request opcode */ +#define ISCSI_OPCODE_LOGIN_REQUEST 0x03 + +/** Willingness to transition to next stage */ +#define ISCSI_LOGIN_FLAG_TRANSITION 0x80 + +/** Key=value pairs continued in subsequent request */ +#define ISCSI_LOGIN_FLAG_CONTINUE 0x40 + +/* Current stage values and mask */ +#define ISCSI_LOGIN_CSG_MASK 0x0c +#define ISCSI_LOGIN_CSG_SECURITY_NEGOTIATION 0x00 +#define ISCSI_LOGIN_CSG_OPERATIONAL_NEGOTIATION 0x04 +#define ISCSI_LOGIN_CSG_FULL_FEATURE_PHASE 0x0c + +/* Next stage values and mask */ +#define ISCSI_LOGIN_NSG_MASK 0x03 +#define ISCSI_LOGIN_NSG_SECURITY_NEGOTIATION 0x00 +#define ISCSI_LOGIN_NSG_OPERATIONAL_NEGOTIATION 0x01 +#define ISCSI_LOGIN_NSG_FULL_FEATURE_PHASE 0x03 + +/** ISID IANA format marker */ +#define ISCSI_ISID_IANA 0x40000000 + +/** Fen Systems Ltd. IANA enterprise number + * + * Permission is hereby granted to use Fen Systems Ltd.'s IANA + * enterprise number with this iSCSI implementation. + */ +#define IANA_EN_FEN_SYSTEMS 10019 + +/** + * iSCSI login response basic header segment + * + */ +struct iscsi_bhs_login_response { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Maximum supported version number */ + uint8_t version_max; + /** Minimum supported version number */ + uint8_t version_min; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Initiator session ID (IANA format) enterprise number and flags */ + uint32_t isid_iana_en; + /** Initiator session ID (IANA format) qualifier */ + uint16_t isid_iana_qual; + /** Target session identifying handle */ + uint16_t tsih; + /** Initiator Task Tag */ + uint32_t itt; + /** Reserved */ + uint32_t reserved_a; + /** Status sequence number */ + uint32_t statsn; + /** Expected command sequence number */ + uint32_t expcmdsn; + /** Maximum command sequence number */ + uint32_t maxcmdsn; + /** Status class */ + uint8_t status_class; + /** Status detail */ + uint8_t status_detail; + /** Reserved */ + uint8_t reserved_b[10]; +}; + +/** Login response opcode */ +#define ISCSI_OPCODE_LOGIN_RESPONSE 0x23 + +/* Login response status codes */ +#define ISCSI_STATUS_SUCCESS 0x00 +#define ISCSI_STATUS_REDIRECT 0x01 +#define ISCSI_STATUS_INITIATOR_ERROR 0x02 +#define ISCSI_STATUS_INITIATOR_ERROR_AUTHENTICATION 0x01 +#define ISCSI_STATUS_INITIATOR_ERROR_AUTHORISATION 0x02 +#define ISCSI_STATUS_INITIATOR_ERROR_NOT_FOUND 0x03 +#define ISCSI_STATUS_INITIATOR_ERROR_REMOVED 0x04 +#define ISCSI_STATUS_TARGET_ERROR 0x03 +#define ISCSI_STATUS_TARGET_ERROR_UNAVAILABLE 0x01 +#define ISCSI_STATUS_TARGET_ERROR_NO_RESOURCES 0x02 + +/** + * iSCSI SCSI command basic header segment + * + */ +struct iscsi_bhs_scsi_command { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Reserved */ + uint16_t reserved_a; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** SCSI Logical Unit Number */ + struct scsi_lun lun; + /** Initiator Task Tag */ + uint32_t itt; + /** Expected data transfer length */ + uint32_t exp_len; + /** Command sequence number */ + uint32_t cmdsn; + /** Expected status sequence number */ + uint32_t expstatsn; + /** SCSI Command Descriptor Block (CDB) */ + union scsi_cdb cdb; +}; + +/** SCSI command opcode */ +#define ISCSI_OPCODE_SCSI_COMMAND 0x01 + +/** Command will read data */ +#define ISCSI_COMMAND_FLAG_READ 0x40 + +/** Command will write data */ +#define ISCSI_COMMAND_FLAG_WRITE 0x20 + +/* Task attributes */ +#define ISCSI_COMMAND_ATTR_UNTAGGED 0x00 +#define ISCSI_COMMAND_ATTR_SIMPLE 0x01 +#define ISCSI_COMMAND_ATTR_ORDERED 0x02 +#define ISCSI_COMMAND_ATTR_HEAD_OF_QUEUE 0x03 +#define ISCSI_COMMAND_ATTR_ACA 0x04 + +/** + * iSCSI SCSI response basic header segment + * + */ +struct iscsi_bhs_scsi_response { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Response code */ + uint8_t response; + /** SCSI status code */ + uint8_t status; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Reserved */ + uint8_t reserved_a[8]; + /** Initiator Task Tag */ + uint32_t itt; + /** SNACK tag */ + uint32_t snack; + /** Status sequence number */ + uint32_t statsn; + /** Expected command sequence number */ + uint32_t expcmdsn; + /** Maximum command sequence number */ + uint32_t maxcmdsn; + /** Expected data sequence number */ + uint32_t expdatasn; + /** Bidirectional read residual count */ + uint32_t bidi_residual_count; + /** Residual count */ + uint32_t residual_count; +}; + +/** SCSI response opcode */ +#define ISCSI_OPCODE_SCSI_RESPONSE 0x21 + +/** SCSI command completed at target */ +#define ISCSI_RESPONSE_COMMAND_COMPLETE 0x00 + +/** SCSI target failure */ +#define ISCSI_RESPONSE_TARGET_FAILURE 0x01 + +/** Data overflow occurred */ +#define ISCSI_RESPONSE_FLAG_OVERFLOW 0x20 + +/** Data underflow occurred */ +#define ISCSI_RESPONSE_FLAG_UNDERFLOW 0x40 + +/** + * iSCSI data-in basic header segment + * + */ +struct iscsi_bhs_data_in { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Reserved */ + uint8_t reserved_a; + /** SCSI status code */ + uint8_t status; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Logical Unit Number */ + struct scsi_lun lun; + /** Initiator Task Tag */ + uint32_t itt; + /** Target Transfer Tag */ + uint32_t ttt; + /** Status sequence number */ + uint32_t statsn; + /** Expected command sequence number */ + uint32_t expcmdsn; + /** Maximum command sequence number */ + uint32_t maxcmdsn; + /** Data sequence number */ + uint32_t datasn; + /** Buffer offset */ + uint32_t offset; + /** Residual count */ + uint32_t residual_count; +}; + +/** Data-in opcode */ +#define ISCSI_OPCODE_DATA_IN 0x25 + +/** Data requires acknowledgement */ +#define ISCSI_DATA_FLAG_ACKNOWLEDGE 0x40 + +/** Data overflow occurred */ +#define ISCSI_DATA_FLAG_OVERFLOW 0x04 + +/** Data underflow occurred */ +#define ISCSI_DATA_FLAG_UNDERFLOW 0x02 + +/** SCSI status code and overflow/underflow flags are valid */ +#define ISCSI_DATA_FLAG_STATUS 0x01 + +/** + * iSCSI data-out basic header segment + * + */ +struct iscsi_bhs_data_out { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Reserved */ + uint16_t reserved_a; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Logical Unit Number */ + struct scsi_lun lun; + /** Initiator Task Tag */ + uint32_t itt; + /** Target Transfer Tag */ + uint32_t ttt; + /** Reserved */ + uint32_t reserved_b; + /** Expected status sequence number */ + uint32_t expstatsn; + /** Reserved */ + uint32_t reserved_c; + /** Data sequence number */ + uint32_t datasn; + /** Buffer offset */ + uint32_t offset; + /** Reserved */ + uint32_t reserved_d; +}; + +/** Data-out opcode */ +#define ISCSI_OPCODE_DATA_OUT 0x05 + +/** + * iSCSI request to transfer basic header segment + * + */ +struct iscsi_bhs_r2t { + /** Opcode */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Reserved */ + uint16_t reserved_a; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Logical Unit Number */ + struct scsi_lun lun; + /** Initiator Task Tag */ + uint32_t itt; + /** Target Transfer Tag */ + uint32_t ttt; + /** Status sequence number */ + uint32_t statsn; + /** Expected command sequence number */ + uint32_t expcmdsn; + /** Maximum command sequence number */ + uint32_t maxcmdsn; + /** R2T sequence number */ + uint32_t r2tsn; + /** Buffer offset */ + uint32_t offset; + /** Desired data transfer length */ + uint32_t len; +}; + +/** R2T opcode */ +#define ISCSI_OPCODE_R2T 0x31 + +/** + * iSCSI NOP-In basic header segment + * + */ +struct iscsi_nop_in { + /** Opcode */ + uint8_t opcode; + /** Reserved */ + uint8_t reserved_a[3]; + /** Segment lengths */ + union iscsi_segment_lengths lengths; + /** Logical Unit Number */ + struct scsi_lun lun; + /** Initiator Task Tag */ + uint32_t itt; + /** Target Transfer Tag */ + uint32_t ttt; + /** Status sequence number */ + uint32_t statsn; + /** Expected command sequence number */ + uint32_t expcmdsn; + /** Maximum command sequence number */ + uint32_t maxcmdsn; + /** Reserved */ + uint8_t reserved_b[12]; +}; + +/** NOP-In opcode */ +#define ISCSI_OPCODE_NOP_IN 0x20 + +/** + * An iSCSI basic header segment + */ +union iscsi_bhs { + struct iscsi_bhs_common common; + struct iscsi_bhs_common_response common_response; + struct iscsi_bhs_login_request login_request; + struct iscsi_bhs_login_response login_response; + struct iscsi_bhs_scsi_command scsi_command; + struct iscsi_bhs_scsi_response scsi_response; + struct iscsi_bhs_data_in data_in; + struct iscsi_bhs_data_out data_out; + struct iscsi_bhs_r2t r2t; + struct iscsi_nop_in nop_in; + unsigned char bytes[ sizeof ( struct iscsi_bhs_common ) ]; +}; + +/** State of an iSCSI TX engine */ +enum iscsi_tx_state { + /** Nothing to send */ + ISCSI_TX_IDLE = 0, + /** Sending the basic header segment */ + ISCSI_TX_BHS, + /** Sending the additional header segment */ + ISCSI_TX_AHS, + /** Sending the data segment */ + ISCSI_TX_DATA, +}; + +/** State of an iSCSI RX engine */ +enum iscsi_rx_state { + /** Receiving the basic header segment */ + ISCSI_RX_BHS = 0, + /** Receiving the additional header segment */ + ISCSI_RX_AHS, + /** Receiving the data segment */ + ISCSI_RX_DATA, + /** Receiving the data segment padding */ + ISCSI_RX_DATA_PADDING, +}; + +/** An iSCSI session */ +struct iscsi_session { + /** Reference counter */ + struct refcnt refcnt; + + /** SCSI command-issuing interface */ + struct interface control; + /** SCSI command interface */ + struct interface data; + /** Transport-layer socket */ + struct interface socket; + + /** Initiator IQN */ + char *initiator_iqn; + /** Target address */ + char *target_address; + /** Target port */ + unsigned int target_port; + /** Target IQN */ + char *target_iqn; + + /** Session status + * + * This is the bitwise-OR of zero or more ISCSI_STATUS_XXX + * constants. + */ + int status; + + /** Initiator username (if any) */ + char *initiator_username; + /** Initiator password (if any) */ + char *initiator_password; + /** Target username (if any) */ + char *target_username; + /** Target password (if any) */ + char *target_password; + /** CHAP challenge (for target auth only) + * + * This is a block of random data; the first byte is used as + * the CHAP identifier (CHAP_I) and the remainder as the CHAP + * challenge (CHAP_C). + */ + unsigned char chap_challenge[17]; + /** CHAP response (used for both initiator and target auth) */ + struct chap_response chap; + + /** Initiator session ID (IANA format) qualifier + * + * This is part of the ISID. It is generated randomly + * whenever a new connection is opened. + */ + uint16_t isid_iana_qual; + /** Initiator task tag + * + * This is the tag of the current command. It is incremented + * whenever a new command is started. + */ + uint32_t itt; + /** Target transfer tag + * + * This is the tag attached to a sequence of data-out PDUs in + * response to an R2T. + */ + uint32_t ttt; + /** Transfer offset + * + * This is the offset for an in-progress sequence of data-out + * PDUs in response to an R2T. + */ + uint32_t transfer_offset; + /** Transfer length + * + * This is the length for an in-progress sequence of data-out + * PDUs in response to an R2T. + */ + uint32_t transfer_len; + /** Command sequence number + * + * This is the sequence number of the current command, used to + * fill out the CmdSN field in iSCSI request PDUs. It is + * updated with the value of the ExpCmdSN field whenever we + * receive an iSCSI response PDU containing such a field. + */ + uint32_t cmdsn; + /** Status sequence number + * + * This is the most recent status sequence number present in + * the StatSN field of an iSCSI response PDU containing such a + * field. Whenever we send an iSCSI request PDU, we fill out + * the ExpStatSN field with this value plus one. + */ + uint32_t statsn; + + /** Basic header segment for current TX PDU */ + union iscsi_bhs tx_bhs; + /** State of the TX engine */ + enum iscsi_tx_state tx_state; + /** TX process */ + struct process process; + + /** Basic header segment for current RX PDU */ + union iscsi_bhs rx_bhs; + /** State of the RX engine */ + enum iscsi_rx_state rx_state; + /** Byte offset within the current RX state */ + size_t rx_offset; + /** Length of the current RX state */ + size_t rx_len; + /** Buffer for received data (not always used) */ + void *rx_buffer; + + /** Current SCSI command, if any */ + struct scsi_cmd *command; + + /** Target socket address (for boot firmware table) */ + struct sockaddr target_sockaddr; + /** SCSI LUN (for boot firmware table) */ + struct scsi_lun lun; +}; + +/** iSCSI session is currently in the security negotiation phase */ +#define ISCSI_STATUS_SECURITY_NEGOTIATION_PHASE \ + ( ISCSI_LOGIN_CSG_SECURITY_NEGOTIATION | \ + ISCSI_LOGIN_NSG_OPERATIONAL_NEGOTIATION ) + +/** iSCSI session is currently in the operational parameter + * negotiation phase + */ +#define ISCSI_STATUS_OPERATIONAL_NEGOTIATION_PHASE \ + ( ISCSI_LOGIN_CSG_OPERATIONAL_NEGOTIATION | \ + ISCSI_LOGIN_NSG_FULL_FEATURE_PHASE ) + +/** iSCSI session is currently in the full feature phase */ +#define ISCSI_STATUS_FULL_FEATURE_PHASE ISCSI_LOGIN_CSG_FULL_FEATURE_PHASE + +/** Mask for all iSCSI session phases */ +#define ISCSI_STATUS_PHASE_MASK ( ISCSI_LOGIN_CSG_MASK | ISCSI_LOGIN_NSG_MASK ) + +/** iSCSI session needs to send the initial security negotiation strings */ +#define ISCSI_STATUS_STRINGS_SECURITY 0x0100 + +/** iSCSI session needs to send the CHAP_A string */ +#define ISCSI_STATUS_STRINGS_CHAP_ALGORITHM 0x0200 + +/** iSCSI session needs to send the CHAP response */ +#define ISCSI_STATUS_STRINGS_CHAP_RESPONSE 0x0400 + +/** iSCSI session needs to send the mutual CHAP challenge */ +#define ISCSI_STATUS_STRINGS_CHAP_CHALLENGE 0x0800 + +/** iSCSI session needs to send the operational negotiation strings */ +#define ISCSI_STATUS_STRINGS_OPERATIONAL 0x1000 + +/** Mask for all iSCSI "needs to send" flags */ +#define ISCSI_STATUS_STRINGS_MASK 0xff00 + +/** Target has requested forward (initiator) authentication */ +#define ISCSI_STATUS_AUTH_FORWARD_REQUIRED 0x00010000 + +/** Initiator requires target (reverse) authentication */ +#define ISCSI_STATUS_AUTH_REVERSE_REQUIRED 0x00020000 + +/** Target authenticated itself correctly */ +#define ISCSI_STATUS_AUTH_REVERSE_OK 0x00040000 + +/** Default initiator IQN prefix */ +#define ISCSI_DEFAULT_IQN_PREFIX "iqn.2010-04.org.ipxe" + +#endif /* _IPXE_ISCSI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/iso9660.h b/qemu/roms/ipxe/src/include/ipxe/iso9660.h new file mode 100644 index 000000000..02c2ae377 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/iso9660.h @@ -0,0 +1,44 @@ +#ifndef _IPXE_ISO9660_H +#define _IPXE_ISO9660_H + +/** + * @file + * + * ISO9660 CD-ROM specification + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +/** ISO9660 block size */ +#define ISO9660_BLKSIZE 2048 + +/** An ISO9660 Primary Volume Descriptor (fixed portion) */ +struct iso9660_primary_descriptor_fixed { + /** Descriptor type */ + uint8_t type; + /** Identifier ("CD001") */ + uint8_t id[5]; +} __attribute__ (( packed )); + +/** An ISO9660 Primary Volume Descriptor */ +struct iso9660_primary_descriptor { + /** Fixed portion */ + struct iso9660_primary_descriptor_fixed fixed; +} __attribute__ (( packed )); + +/** ISO9660 Primary Volume Descriptor type */ +#define ISO9660_TYPE_PRIMARY 0x01 + +/** ISO9660 Primary Volume Descriptor block address */ +#define ISO9660_PRIMARY_LBA 16 + +/** ISO9660 Boot Volume Descriptor type */ +#define ISO9660_TYPE_BOOT 0x00 + +/** ISO9660 identifier */ +#define ISO9660_ID "CD001" + +#endif /* _IPXE_ISO9660_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/isqrt.h b/qemu/roms/ipxe/src/include/ipxe/isqrt.h new file mode 100644 index 000000000..58ed42f0c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/isqrt.h @@ -0,0 +1,14 @@ +#ifndef _IPXE_ISQRT_H +#define _IPXE_ISQRT_H + +/** @file + * + * Integer square root + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern unsigned long isqrt ( unsigned long value ); + +#endif /* _IPXE_ISQRT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/job.h b/qemu/roms/ipxe/src/include/ipxe/job.h new file mode 100644 index 000000000..a2369f7c2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/job.h @@ -0,0 +1,38 @@ +#ifndef _IPXE_JOB_H +#define _IPXE_JOB_H + +/** @file + * + * Job control interfaces + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/interface.h> + +/** Job progress */ +struct job_progress { + /** Amount of operation completed so far + * + * The units for this quantity are arbitrary. @c completed + * divded by @total should give something which approximately + * represents the progress through the operation. For a + * download operation, using byte counts would make sense. + */ + unsigned long completed; + /** Total operation size + * + * See @c completed. A zero value means "total size unknown" + * and is explcitly permitted; users should take this into + * account before calculating @c completed/total. + */ + unsigned long total; +}; + +extern int job_progress ( struct interface *intf, + struct job_progress *progress ); +#define job_progress_TYPE( object_type ) \ + typeof ( int ( object_type, struct job_progress *progress ) ) + +#endif /* _IPXE_JOB_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/keymap.h b/qemu/roms/ipxe/src/include/ipxe/keymap.h new file mode 100644 index 000000000..9ac42a6b1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/keymap.h @@ -0,0 +1,30 @@ +#ifndef _IPXE_KEYMAP_H +#define _IPXE_KEYMAP_H + +/** + * @file + * + * Keyboard mappings + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/tables.h> + +/** A keyboard mapping */ +struct key_mapping { + /** Character read from keyboard */ + uint8_t from; + /** Character to be used instead */ + uint8_t to; +} __attribute__ (( packed )); + +/** Keyboard mapping table */ +#define KEYMAP __table ( struct key_mapping, "keymap" ) + +/** Define a keyboard mapping */ +#define __keymap __table_entry ( KEYMAP, 01 ) + +#endif /* _IPXE_KEYMAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/keys.h b/qemu/roms/ipxe/src/include/ipxe/keys.h new file mode 100644 index 000000000..8b13550b9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/keys.h @@ -0,0 +1,88 @@ +#ifndef _IPXE_KEYS_H +#define _IPXE_KEYS_H + +/** @file + * + * Key definitions + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* + * Symbolic names for some standard ASCII characters + * + */ + +#define NUL 0x00 +#define CTRL_A 0x01 +#define CTRL_B 0x02 +#define CTRL_C 0x03 +#define CTRL_D 0x04 +#define CTRL_E 0x05 +#define CTRL_F 0x06 +#define CTRL_G 0x07 +#define CTRL_H 0x08 +#define CTRL_I 0x09 +#define CTRL_J 0x0a +#define CTRL_K 0x0b +#define CTRL_L 0x0c +#define CTRL_M 0x0d +#define CTRL_N 0x0e +#define CTRL_O 0x0f +#define CTRL_P 0x10 +#define CTRL_Q 0x11 +#define CTRL_R 0x12 +#define CTRL_S 0x13 +#define CTRL_T 0x14 +#define CTRL_U 0x15 +#define CTRL_V 0x16 +#define CTRL_W 0x17 +#define CTRL_X 0x18 +#define CTRL_Y 0x19 +#define CTRL_Z 0x1a + +#define BACKSPACE CTRL_H +#define TAB CTRL_I +#define LF CTRL_J +#define CR CTRL_M +#define ESC 0x1b + +/* + * Special keys outside the normal ASCII range + * + * + * The names are chosen to match those used by curses. The values are + * chosen to facilitate easy conversion from a received ANSI escape + * sequence to a KEY_XXX constant. + */ + +#define KEY_ANSI( n, terminator ) ( 0x100 * ( (n) + 1 ) + (terminator) ) + +#define KEY_MIN 0x101 +#define KEY_UP KEY_ANSI ( 0, 'A' ) /**< Up arrow */ +#define KEY_DOWN KEY_ANSI ( 0, 'B' ) /**< Down arrow */ +#define KEY_RIGHT KEY_ANSI ( 0, 'C' ) /**< Right arrow */ +#define KEY_LEFT KEY_ANSI ( 0, 'D' ) /**< Left arrow */ +#define KEY_END KEY_ANSI ( 0, 'F' ) /**< End */ +#define KEY_HOME KEY_ANSI ( 0, 'H' ) /**< Home */ +#define KEY_IC KEY_ANSI ( 2, '~' ) /**< Insert */ +#define KEY_DC KEY_ANSI ( 3, '~' ) /**< Delete */ +#define KEY_PPAGE KEY_ANSI ( 5, '~' ) /**< Page up */ +#define KEY_NPAGE KEY_ANSI ( 6, '~' ) /**< Page down */ +#define KEY_F5 KEY_ANSI ( 15, '~' ) /**< F5 */ +#define KEY_F6 KEY_ANSI ( 17, '~' ) /**< F6 */ +#define KEY_F7 KEY_ANSI ( 18, '~' ) /**< F7 */ +#define KEY_F8 KEY_ANSI ( 19, '~' ) /**< F8 (for PXE) */ +#define KEY_F9 KEY_ANSI ( 20, '~' ) /**< F9 */ +#define KEY_F10 KEY_ANSI ( 21, '~' ) /**< F10 */ +#define KEY_F11 KEY_ANSI ( 23, '~' ) /**< F11 */ +#define KEY_F12 KEY_ANSI ( 24, '~' ) /**< F12 */ + +/* Not in the [KEY_MIN,KEY_MAX] range; terminals seem to send these as + * normal ASCII values. + */ +#define KEY_BACKSPACE BACKSPACE +#define KEY_ENTER LF + +#endif /* _IPXE_KEYS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linebuf.h b/qemu/roms/ipxe/src/include/ipxe/linebuf.h new file mode 100644 index 000000000..706ef2554 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linebuf.h @@ -0,0 +1,30 @@ +#ifndef _IPXE_LINEBUF_H +#define _IPXE_LINEBUF_H + +/** @file + * + * Line buffering + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stddef.h> + +/** A line buffer */ +struct line_buffer { + /** Current string in the buffer */ + char *data; + /** Length of current string, excluding the terminating NUL */ + size_t len; + /** String is ready to read */ + int ready; +}; + +extern char * buffered_line ( struct line_buffer *linebuf ); +extern ssize_t line_buffer ( struct line_buffer *linebuf, + const char *data, size_t len ); +extern void empty_line_buffer ( struct line_buffer *linebuf ); + +#endif /* _IPXE_LINEBUF_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/lineconsole.h b/qemu/roms/ipxe/src/include/ipxe/lineconsole.h new file mode 100644 index 000000000..925c0accc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/lineconsole.h @@ -0,0 +1,36 @@ +#ifndef _IPXE_LINECONSOLE_H +#define _IPXE_LINECONSOLE_H + +/** @file + * + * Line-based console + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/ansiesc.h> + +/** A line-based console */ +struct line_console { + /** Data buffer + * + * Must initially be filled with NULs + */ + char *buffer; + /** Current index within buffer */ + size_t index; + /** Length of buffer + * + * The final character of the buffer will only ever be used as + * a potential terminating NUL. + */ + size_t len; + /** ANSI escape sequence context */ + struct ansiesc_context ctx; +}; + +extern size_t line_putchar ( struct line_console *line, int character ); + +#endif /* _IPXE_LINECONSOLE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux.h b/qemu/roms/ipxe/src/include/ipxe/linux.h new file mode 100644 index 000000000..a01ace3de --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux.h @@ -0,0 +1,152 @@ +/* + * Copyright (C) 2010 Piotr Jaroszyński <p.jaroszynski@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef _IPXE_LINUX_H +#define _IPXE_LINUX_H + +FILE_LICENCE(GPL2_OR_LATER); + +/** @file + * + * Linux devices, drivers and device requests. + */ + +#include <ipxe/list.h> +#include <ipxe/device.h> +#include <ipxe/settings.h> + +/** + * Convert a Linux error number to an iPXE status code + * + * @v errno Linux error number + * @ret rc iPXE status code (before negation) + */ +#define ELINUX( errno ) EPLATFORM ( EINFO_EPLATFORM, errno ) + +/** A linux device */ +struct linux_device { + /** Generic device */ + struct device dev; + /** Driver that's handling the device */ + struct linux_driver *driver; + /** Private data used by drivers */ + void *priv; +}; + +struct linux_device_request; + +/** A linux driver */ +struct linux_driver { + /** Name */ + char *name; + /** Probe function */ + int (*probe)(struct linux_device *device, struct linux_device_request *request); + /** Remove function */ + void (*remove)(struct linux_device *device); + /** Can the driver probe any more devices? */ + int can_probe; +}; + +/** Linux driver table */ +#define LINUX_DRIVERS __table(struct linux_driver, "linux_drivers") + +/** Declare a Linux driver */ +#define __linux_driver __table_entry(LINUX_DRIVERS, 01) + +/** + * Set linux device driver-private data + * + * @v device Linux device + * @v priv Private data + */ +static inline void linux_set_drvdata(struct linux_device * device, void *priv) +{ + device->priv = priv; +} + +/** + * Get linux device driver-private data + * + * @v device Linux device + * @ret priv Private data + */ +static inline void *linux_get_drvdata(struct linux_device *device) +{ + return device->priv; +} + +/** + * A device request. + * + * To be created and filled by the UI code. + */ +struct linux_device_request { + /** Driver name. Compared to the linux drivers' names */ + char *driver; + /** List node */ + struct list_head list; + /** List of settings */ + struct list_head settings; +}; + +/** A device request setting */ +struct linux_setting { + /** Name */ + char *name; + /** Value */ + char *value; + /** Was the setting already applied? */ + int applied; + /** List node */ + struct list_head list; +}; + +/** + * List of requested devices. + * + * Filled by the UI code. Linux root_driver walks over this list looking for an + * appropriate driver to handle each request by matching the driver's name. + */ +extern struct list_head linux_device_requests; + +/** + * List of global settings to apply. + * + * Filled by the UI code. Linux root_driver applies these settings. + */ +extern struct list_head linux_global_settings; + +/** + * Look for the last occurrence of a setting with the specified name + * + * @v name Name of the setting to look for + * @v settings List of the settings to look through + */ +struct linux_setting *linux_find_setting(char *name, struct list_head *settings); + +/** + * Apply a list of linux settings to a settings block + * + * @v new_settings List of linux_setting's to apply + * @v settings_block Settings block to apply the settings to + * @ret rc 0 on success + */ +extern void linux_apply_settings(struct list_head *new_settings, struct settings *settings_block); + + +#endif /* _IPXE_LINUX_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_entropy.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_entropy.h new file mode 100644 index 000000000..bd89bd52f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_entropy.h @@ -0,0 +1,32 @@ +#ifndef _IPXE_LINUX_ENTROPY_H +#define _IPXE_LINUX_ENTROPY_H + +/** @file + * + * iPXE entropy API for linux + * + */ + +FILE_LICENCE(GPL2_OR_LATER); + +#ifdef ENTROPY_LINUX +#define ENTROPY_PREFIX_linux +#else +#define ENTROPY_PREFIX_linux __linux_ +#endif + +/** + * min-entropy per sample + * + * @ret min_entropy min-entropy of each sample + */ +static inline __always_inline double +ENTROPY_INLINE ( linux, min_entropy_per_sample ) ( void ) { + + /* We read single bytes from /dev/random and assume that each + * contains full entropy. + */ + return 8; +} + +#endif /* _IPXE_LINUX_ENTROPY_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_nap.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_nap.h new file mode 100644 index 000000000..5bac7242f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_nap.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_LINUX_NAP_H +#define _IPXE_LINUX_NAP_H + +/** @file + * + * Linux CPU sleeping + * + */ + +FILE_LICENCE(GPL2_OR_LATER); + +#ifdef NAP_LINUX +#define NAP_PREFIX_linux +#else +#define NAP_PREFIX_linux __linux_ +#endif + +#endif /* _IPXE_LINUX_NAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_pci.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_pci.h new file mode 100644 index 000000000..439166733 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_pci.h @@ -0,0 +1,130 @@ +#ifndef _IPXE_LINUX_PCI_H +#define _IPXE_LINUX_PCI_H + +/** @file + * + * iPXE PCI API for Linux + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef PCIAPI_LINUX +#define PCIAPI_PREFIX_linux +#else +#define PCIAPI_PREFIX_linux __linux_ +#endif + +struct pci_device; + +extern int linux_pci_read ( struct pci_device *pci, unsigned long where, + unsigned long *value, size_t len ); +extern int linux_pci_write ( struct pci_device *pci, unsigned long where, + unsigned long value, size_t len ); + +/** + * Read byte from PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( linux, pci_read_config_byte ) ( struct pci_device *pci, + unsigned int where, + uint8_t *value ) { + int rc; + unsigned long tmp; + + rc = linux_pci_read ( pci, where, &tmp, sizeof ( *value ) ); + *value = tmp; + return rc; +} + +/** + * Read word from PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( linux, pci_read_config_word ) ( struct pci_device *pci, + unsigned int where, + uint16_t *value ) { + int rc; + unsigned long tmp; + + rc = linux_pci_read ( pci, where, &tmp, sizeof ( *value ) ); + *value = tmp; + return rc; +} + +/** + * Read dword from PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( linux, pci_read_config_dword ) ( struct pci_device *pci, + unsigned int where, + uint32_t *value ) { + int rc; + unsigned long tmp; + + rc = linux_pci_read ( pci, where, &tmp, sizeof ( *value ) ); + *value = tmp; + return rc; +} + +/** + * Write byte to PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( linux, pci_write_config_byte ) ( struct pci_device *pci, + unsigned int where, + uint8_t value ) { + return linux_pci_write ( pci, where, value, sizeof ( value ) ); +} + +/** + * Write word to PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( linux, pci_write_config_word ) ( struct pci_device *pci, + unsigned int where, + uint16_t value ) { + return linux_pci_write ( pci, where, value, sizeof ( value ) ); +} + +/** + * Write dword to PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +static inline __always_inline int +PCIAPI_INLINE ( linux, pci_write_config_dword ) ( struct pci_device *pci, + unsigned int where, + uint32_t value ) { + return linux_pci_write ( pci, where, value, sizeof ( value ) ); +} + +#endif /* _IPXE_LINUX_PCI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_smbios.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_smbios.h new file mode 100644 index 000000000..6d51e13ba --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_smbios.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_LINUX_SMBIOS_H +#define _IPXE_LINUX_SMBIOS_H + +/** @file + * + * iPXE SMBIOS API for linux + * + */ + +FILE_LICENCE(GPL2_OR_LATER); + +#ifdef SMBIOS_LINUX +#define SMBIOS_PREFIX_linux +#else +#define SMBIOS_PREFIX_linux __linux_ +#endif + +#endif /* _IPXE_LINUX_SMBIOS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_time.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_time.h new file mode 100644 index 000000000..93a257730 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_time.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_LINUX_TIME_H +#define _IPXE_LINUX_TIME_H + +/** @file + * + * Linux time source + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef TIME_LINUX +#define TIME_PREFIX_linux +#else +#define TIME_PREFIX_linux __linux_ +#endif + +#endif /* _IPXE_LINUX_TIME_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_timer.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_timer.h new file mode 100644 index 000000000..379507417 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_timer.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_LINUX_TIMER_H +#define _IPXE_LINUX_TIMER_H + +/** @file + * + * iPXE timer API for Linux + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef TIMER_LINUX +#define TIMER_PREFIX_linux +#else +#define TIMER_PREFIX_linux __linux_ +#endif + +#endif /* _IPXE_LINUX_TIMER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_uaccess.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_uaccess.h new file mode 100644 index 000000000..e4d16d9e0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_uaccess.h @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2010 Piotr Jaroszyński <p.jaroszynski@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef _IPXE_LINUX_UACCESS_H +#define _IPXE_LINUX_UACCESS_H + +FILE_LICENCE(GPL2_OR_LATER); + +/** @file + * + * iPXE user access API for linux + * + * In linux userspace virtual == user == phys addresses. + * Physical addresses also being the same is wrong, but there is no general way + * of converting userspace addresses to physical as what appears to be + * contiguous in userspace is physically fragmented. + * Currently only the DMA memory is special-cased, but its conversion to bus + * addresses is done in phys_to_bus. + * This is known to break virtio as it is passing phys addresses to the virtual + * device. + */ + +#ifdef UACCESS_LINUX +#define UACCESS_PREFIX_linux +#else +#define UACCESS_PREFIX_linux __linux_ +#endif + +static inline __always_inline userptr_t +UACCESS_INLINE(linux, phys_to_user)(unsigned long phys_addr) +{ + return phys_addr; +} + +static inline __always_inline unsigned long +UACCESS_INLINE(linux, user_to_phys)(userptr_t userptr, off_t offset) +{ + return userptr + offset; +} + +static inline __always_inline userptr_t +UACCESS_INLINE(linux, virt_to_user)(volatile const void *addr) +{ + return trivial_virt_to_user(addr); +} + +static inline __always_inline void * +UACCESS_INLINE(linux, user_to_virt)(userptr_t userptr, off_t offset) +{ + return trivial_user_to_virt(userptr, offset); +} + +static inline __always_inline userptr_t +UACCESS_INLINE(linux, userptr_add)(userptr_t userptr, off_t offset) +{ + return trivial_userptr_add(userptr, offset); +} + +static inline __always_inline off_t +UACCESS_INLINE(linux, userptr_sub)(userptr_t userptr, userptr_t subtrahend) +{ + return trivial_userptr_sub ( userptr, subtrahend ); +} + +static inline __always_inline void +UACCESS_INLINE(linux, memcpy_user)(userptr_t dest, off_t dest_off, userptr_t src, off_t src_off, size_t len) +{ + trivial_memcpy_user(dest, dest_off, src, src_off, len); +} + +static inline __always_inline void +UACCESS_INLINE(linux, memmove_user)(userptr_t dest, off_t dest_off, userptr_t src, off_t src_off, size_t len) +{ + trivial_memmove_user(dest, dest_off, src, src_off, len); +} + +static inline __always_inline int +UACCESS_INLINE(linux, memcmp_user)(userptr_t first, off_t first_off, userptr_t second, off_t second_off, size_t len) +{ + return trivial_memcmp_user(first, first_off, second, second_off, len); +} + +static inline __always_inline void +UACCESS_INLINE(linux, memset_user)(userptr_t buffer, off_t offset, int c, size_t len) +{ + trivial_memset_user(buffer, offset, c, len); +} + +static inline __always_inline size_t +UACCESS_INLINE(linux, strlen_user)(userptr_t buffer, off_t offset) +{ + return trivial_strlen_user(buffer, offset); +} + +static inline __always_inline off_t +UACCESS_INLINE(linux, memchr_user)(userptr_t buffer, off_t offset, int c, size_t len) +{ + return trivial_memchr_user(buffer, offset, c, len); +} + +#endif /* _IPXE_LINUX_UACCESS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux/linux_umalloc.h b/qemu/roms/ipxe/src/include/ipxe/linux/linux_umalloc.h new file mode 100644 index 000000000..4de55ecf3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux/linux_umalloc.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_LINUX_UMALLOC_H +#define _IPXE_LINUX_UMALLOC_H + +FILE_LICENCE(GPL2_OR_LATER); + +/** @file + * + * iPXE user memory allocation API for linux + * + */ + +#ifdef UMALLOC_LINUX +#define UMALLOC_PREFIX_linux +#else +#define UMALLOC_PREFIX_linux __linux_ +#endif + +#endif /* _IPXE_LINUX_UMALLOC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/linux_compat.h b/qemu/roms/ipxe/src/include/ipxe/linux_compat.h new file mode 100644 index 000000000..6f6ed97d7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/linux_compat.h @@ -0,0 +1,27 @@ +#ifndef _IPXE_LINUX_COMPAT_H +#define _IPXE_LINUX_COMPAT_H + +/** @file + * + * Linux code compatibility + * + * This file exists to ease the building of Linux source code within + * iPXE. This is intended to facilitate quick testing; it is not + * intended to be a substitute for proper porting. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <errno.h> +#include <stdio.h> +#include <byteswap.h> +#include <ipxe/bitops.h> + +#define __init +#define __exit +#define __initdata +#define __exitdata +#define printk printf + +#endif /* _IPXE_LINUX_COMPAT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/list.h b/qemu/roms/ipxe/src/include/ipxe/list.h new file mode 100644 index 000000000..581ec9806 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/list.h @@ -0,0 +1,476 @@ +#ifndef _IPXE_LIST_H +#define _IPXE_LIST_H + +/** @file + * + * Linked lists + * + * This linked list handling code is based on the Linux kernel's + * list.h. + */ + +FILE_LICENCE ( GPL2_ONLY ); + +#include <stddef.h> +#include <assert.h> + +/** A doubly-linked list entry (or list head) */ +struct list_head { + /** Next list entry */ + struct list_head *next; + /** Previous list entry */ + struct list_head *prev; +}; + +/** + * Initialise a static list head + * + * @v list List head + */ +#define LIST_HEAD_INIT( list ) { &(list), &(list) } + +/** + * Declare a static list head + * + * @v list List head + */ +#define LIST_HEAD( list ) \ + struct list_head list = LIST_HEAD_INIT ( list ) + +/** + * Initialise a list head + * + * @v list List head + */ +#define INIT_LIST_HEAD( list ) do { \ + (list)->next = (list); \ + (list)->prev = (list); \ + } while ( 0 ) + +/** + * Check a list entry or list head is valid + * + * @v list List entry or head + */ +#define list_check( list ) ( { \ + assert ( (list) != NULL ); \ + assert ( (list)->prev != NULL ); \ + assert ( (list)->next != NULL ); \ + assert ( (list)->next->prev == (list) ); \ + assert ( (list)->prev->next == (list) ); \ + } ) + +/** + * Add a new entry to the head of a list + * + * @v new New entry to be added + * @v head List head, or entry after which to add the new entry + */ +#define list_add( new, head ) do { \ + list_check ( (head) ); \ + extern_list_add ( (new), (head) ); \ + list_check ( (head) ); \ + list_check ( (new) ); \ + } while ( 0 ) +static inline void inline_list_add ( struct list_head *new, + struct list_head *head ) { + struct list_head *prev = head; + struct list_head *next = head->next; + next->prev = (new); + (new)->next = next; + (new)->prev = prev; + prev->next = (new); +} +extern void extern_list_add ( struct list_head *new, + struct list_head *head ); + +/** + * Add a new entry to the tail of a list + * + * @v new New entry to be added + * @v head List head, or entry before which to add the new entry + */ +#define list_add_tail( new, head ) do { \ + list_check ( (head) ); \ + extern_list_add_tail ( (new), (head) ); \ + list_check ( (head) ); \ + list_check ( (new) ); \ + } while ( 0 ) +static inline void inline_list_add_tail ( struct list_head *new, + struct list_head *head ) { + struct list_head *prev = head->prev; + struct list_head *next = head; + next->prev = (new); + (new)->next = next; + (new)->prev = prev; + prev->next = (new); +} +extern void extern_list_add_tail ( struct list_head *new, + struct list_head *head ); + +/** + * Delete an entry from a list + * + * @v list List entry + * + * Note that list_empty() on entry does not return true after this; + * the entry is in an undefined state. + */ +#define list_del( list ) do { \ + list_check ( (list) ); \ + inline_list_del ( (list) ); \ + } while ( 0 ) +static inline void inline_list_del ( struct list_head *list ) { + struct list_head *next = (list)->next; + struct list_head *prev = (list)->prev; + next->prev = prev; + prev->next = next; +} +extern void extern_list_del ( struct list_head *list ); + +/** + * Test whether a list is empty + * + * @v list List head + */ +#define list_empty( list ) ( { \ + list_check ( (list) ); \ + inline_list_empty ( (list) ); } ) +static inline int inline_list_empty ( const struct list_head *list ) { + return ( list->next == list ); +} +extern int extern_list_empty ( const struct list_head *list ); + +/** + * Test whether a list has just one entry + * + * @v list List to test + */ +#define list_is_singular( list ) ( { \ + list_check ( (list) ); \ + inline_list_is_singular ( (list) ); } ) +static inline int inline_list_is_singular ( const struct list_head *list ) { + return ( ( ! list_empty ( list ) ) && ( list->next == list->prev ) ); +} +extern int extern_list_is_singular ( const struct list_head *list ); + +/** + * Test whether an entry is the last entry in list + * + * @v list List entry to test + * @v head List head + */ +#define list_is_last( list, head ) ( { \ + list_check ( (list) ); \ + list_check ( (head) ); \ + inline_list_is_last ( (list), (head) ); } ) +static inline int inline_list_is_last ( const struct list_head *list, + const struct list_head *head ) { + return ( list->next == head ); +} +extern int extern_list_is_last ( const struct list_head *list, + const struct list_head *head ); + +/** + * Cut a list into two + * + * @v new A new list to contain all removed entries + * @v list An existing list + * @v entry An entry within the existing list + * + * All entries from @c list up to and including @c entry are moved to + * @c new, which should be an empty list. @c entry may be equal to @c + * list, in which case no entries are moved. + */ +#define list_cut_position( new, list, entry ) do { \ + list_check ( (new) ); \ + assert ( list_empty ( (new) ) ); \ + list_check ( (list) ); \ + list_check ( (entry) ); \ + extern_list_cut_position ( (new), (list), (entry) ); \ + } while ( 0 ) +static inline void inline_list_cut_position ( struct list_head *new, + struct list_head *list, + struct list_head *entry ) { + struct list_head *first = entry->next; + + if ( list != entry ) { + new->next = list->next; + new->next->prev = new; + new->prev = entry; + new->prev->next = new; + list->next = first; + list->next->prev = list; + } +} +extern void extern_list_cut_position ( struct list_head *new, + struct list_head *list, + struct list_head *entry ); + +/** + * Move all entries from one list into another list + * + * @v list List of entries to add + * @v entry Entry after which to add the new entries + * + * All entries from @c list are inserted after @c entry. Note that @c + * list is left in an undefined state; use @c list_splice_init() if + * you want @c list to become an empty list. + */ +#define list_splice( list, entry ) do { \ + list_check ( (list) ); \ + list_check ( (entry) ); \ + extern_list_splice ( (list), (entry) ); \ + } while ( 0 ) +static inline void inline_list_splice ( const struct list_head *list, + struct list_head *entry ) { + struct list_head *first = list->next; + struct list_head *last = list->prev; + + if ( ! list_empty ( list ) ) { + last->next = entry->next; + last->next->prev = last; + first->prev = entry; + first->prev->next = first; + } +} +extern void extern_list_splice ( const struct list_head *list, + struct list_head *entry ); + +/** + * Move all entries from one list into another list + * + * @v list List of entries to add + * @v entry Entry before which to add the new entries + * + * All entries from @c list are inserted before @c entry. Note that @c + * list is left in an undefined state; use @c list_splice_tail_init() if + * you want @c list to become an empty list. + */ +#define list_splice_tail( list, entry ) do { \ + list_check ( (list) ); \ + list_check ( (entry) ); \ + extern_list_splice_tail ( (list), (entry) ); \ + } while ( 0 ) +static inline void inline_list_splice_tail ( const struct list_head *list, + struct list_head *entry ) { + struct list_head *first = list->next; + struct list_head *last = list->prev; + + if ( ! list_empty ( list ) ) { + first->prev = entry->prev; + first->prev->next = first; + last->next = entry; + last->next->prev = last; + } +} +extern void extern_list_splice_tail ( const struct list_head *list, + struct list_head *entry ); + +/** + * Move all entries from one list into another list and reinitialise empty list + * + * @v list List of entries to add + * @v entry Entry after which to add the new entries + * + * All entries from @c list are inserted after @c entry. + */ +#define list_splice_init( list, entry ) do { \ + list_check ( (list) ); \ + list_check ( (entry) ); \ + extern_list_splice_init ( (list), (entry) ); \ + } while ( 0 ) +static inline void inline_list_splice_init ( struct list_head *list, + struct list_head *entry ) { + list_splice ( list, entry ); + INIT_LIST_HEAD ( list ); +} +extern void extern_list_splice_init ( struct list_head *list, + struct list_head *entry ); + +/** + * Move all entries from one list into another list and reinitialise empty list + * + * @v list List of entries to add + * @v entry Entry before which to add the new entries + * + * All entries from @c list are inserted before @c entry. + */ +#define list_splice_tail_init( list, entry ) do { \ + list_check ( (list) ); \ + list_check ( (entry) ); \ + extern_list_splice_tail_init ( (list), (entry) ); \ + } while ( 0 ) + +static inline void inline_list_splice_tail_init ( struct list_head *list, + struct list_head *entry ) { + list_splice_tail ( list, entry ); + INIT_LIST_HEAD ( list ); +} +extern void extern_list_splice_tail_init ( struct list_head *list, + struct list_head *entry ); + +/** + * Get the container of a list entry + * + * @v list List entry + * @v type Containing type + * @v member Name of list field within containing type + * @ret container Containing object + */ +#define list_entry( list, type, member ) ( { \ + list_check ( (list) ); \ + container_of ( list, type, member ); } ) + +/** + * Get the container of the first entry in a list + * + * @v list List head + * @v type Containing type + * @v member Name of list field within containing type + * @ret first First list entry, or NULL + */ +#define list_first_entry( list, type, member ) \ + ( list_empty ( (list) ) ? \ + ( type * ) NULL : \ + list_entry ( (list)->next, type, member ) ) + +/** + * Get the container of the last entry in a list + * + * @v list List head + * @v type Containing type + * @v member Name of list field within containing type + * @ret first First list entry, or NULL + */ +#define list_last_entry( list, type, member ) \ + ( list_empty ( (list) ) ? \ + ( type * ) NULL : \ + list_entry ( (list)->prev, type, member ) ) + +/** + * Iterate over a list + * + * @v pos Iterator + * @v head List head + */ +#define list_for_each( pos, head ) \ + for ( list_check ( (head) ), \ + pos = (head)->next; \ + pos != (head); \ + pos = (pos)->next ) + +/** + * Iterate over entries in a list + * + * @v pos Iterator + * @v head List head + * @v member Name of list field within iterator's type + */ +#define list_for_each_entry( pos, head, member ) \ + for ( list_check ( (head) ), \ + pos = list_entry ( (head)->next, typeof ( *pos ), member ); \ + &pos->member != (head); \ + pos = list_entry ( pos->member.next, typeof ( *pos ), member ) ) + +/** + * Iterate over entries in a list in reverse order + * + * @v pos Iterator + * @v head List head + * @v member Name of list field within iterator's type + */ +#define list_for_each_entry_reverse( pos, head, member ) \ + for ( list_check ( (head) ), \ + pos = list_entry ( (head)->prev, typeof ( *pos ), member ); \ + &pos->member != (head); \ + pos = list_entry ( pos->member.prev, typeof ( *pos ), member ) ) + +/** + * Iterate over entries in a list, safe against deletion of the current entry + * + * @v pos Iterator + * @v tmp Temporary value (of same type as iterator) + * @v head List head + * @v member Name of list field within iterator's type + */ +#define list_for_each_entry_safe( pos, tmp, head, member ) \ + for ( list_check ( (head) ), \ + pos = list_entry ( (head)->next, typeof ( *pos ), member ), \ + tmp = list_entry ( pos->member.next, typeof ( *tmp ), member ); \ + &pos->member != (head); \ + pos = tmp, \ + tmp = list_entry ( tmp->member.next, typeof ( *tmp ), member ) ) + +/** + * Iterate over entries in a list, starting after current position + * + * @v pos Iterator + * @v head List head + * @v member Name of list field within iterator's type + */ +#define list_for_each_entry_continue( pos, head, member ) \ + for ( list_check ( (head) ), \ + pos = list_entry ( pos->member.next, typeof ( *pos ), member ); \ + &pos->member != (head); \ + pos = list_entry ( pos->member.next, typeof ( *pos ), member ) ) + +/** + * Iterate over entries in a list in reverse, starting after current position + * + * @v pos Iterator + * @v head List head + * @v member Name of list field within iterator's type + */ +#define list_for_each_entry_continue_reverse( pos, head, member ) \ + for ( list_check ( (head) ), \ + pos = list_entry ( pos->member.prev, typeof ( *pos ), member ); \ + &pos->member != (head); \ + pos = list_entry ( pos->member.prev, typeof ( *pos ), member ) ) + +/** + * Test if list contains a specified entry + * + * @v entry Entry + * @v head List head + * @ret present List contains specified entry + */ +#define list_contains( entry, head ) ( { \ + list_check ( (head) ); \ + list_check ( (entry) ); \ + extern_list_contains ( (entry), (head) ); } ) +static inline int inline_list_contains ( struct list_head *entry, + struct list_head *head ) { + struct list_head *tmp; + + list_for_each ( tmp, head ) { + if ( tmp == entry ) + return 1; + } + return 0; +} +extern int extern_list_contains ( struct list_head *entry, + struct list_head *head ); + +/** + * Test if list contains a specified entry + * + * @v entry Entry + * @v head List head + * @ret present List contains specified entry + */ +#define list_contains_entry( entry, head, member ) \ + list_contains ( &(entry)->member, (head) ) + +/** + * Check list contains a specified entry + * + * @v entry Entry + * @v head List head + * @v member Name of list field within iterator's type + */ +#define list_check_contains_entry( entry, head, member ) do { \ + assert ( list_contains_entry ( (entry), (head), member ) ); \ + } while ( 0 ) + +#endif /* _IPXE_LIST_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/login_ui.h b/qemu/roms/ipxe/src/include/ipxe/login_ui.h new file mode 100644 index 000000000..01e5479f7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/login_ui.h @@ -0,0 +1,14 @@ +#ifndef _IPXE_LOGIN_UI_H +#define _IPXE_LOGIN_UI_H + +/** @file + * + * Login UI + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern int login_ui ( void ); + +#endif /* _IPXE_LOGIN_UI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/malloc.h b/qemu/roms/ipxe/src/include/ipxe/malloc.h new file mode 100644 index 000000000..bbd6cb898 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/malloc.h @@ -0,0 +1,111 @@ +#ifndef _IPXE_MALLOC_H +#define _IPXE_MALLOC_H + +#include <stdint.h> + +/** @file + * + * Dynamic memory allocation + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* + * Prototypes for the standard functions (malloc() et al) are in + * stdlib.h. Include <ipxe/malloc.h> only if you need the + * non-standard functions, such as malloc_dma(). + * + */ +#include <stdlib.h> +#include <ipxe/tables.h> +#include <valgrind/memcheck.h> + +extern size_t freemem; + +extern void * __malloc alloc_memblock ( size_t size, size_t align, + size_t offset ); +extern void free_memblock ( void *ptr, size_t size ); +extern void mpopulate ( void *start, size_t len ); +extern void mdumpfree ( void ); + +/** + * Allocate memory for DMA + * + * @v size Requested size + * @v align Physical alignment + * @v offset Offset from physical alignment + * @ret ptr Memory, or NULL + * + * Allocates physically-aligned memory for DMA. + * + * @c align must be a power of two. @c size may not be zero. + */ +static inline void * __malloc malloc_dma_offset ( size_t size, + size_t phys_align, + size_t offset ) { + void * ptr = alloc_memblock ( size, phys_align, offset ); + if ( ptr && size ) + VALGRIND_MALLOCLIKE_BLOCK ( ptr, size, 0, 0 ); + return ptr; +} + +/** + * Allocate memory for DMA + * + * @v size Requested size + * @v align Physical alignment + * @ret ptr Memory, or NULL + * + * Allocates physically-aligned memory for DMA. + * + * @c align must be a power of two. @c size may not be zero. + */ +static inline void * __malloc malloc_dma ( size_t size, size_t phys_align ) { + return malloc_dma_offset ( size, phys_align, 0 ); +} + +/** + * Free memory allocated with malloc_dma() + * + * @v ptr Memory allocated by malloc_dma(), or NULL + * @v size Size of memory, as passed to malloc_dma() + * + * Memory allocated with malloc_dma() can only be freed with + * free_dma(); it cannot be freed with the standard free(). + * + * If @c ptr is NULL, no action is taken. + */ +static inline void free_dma ( void *ptr, size_t size ) { + free_memblock ( ptr, size ); + VALGRIND_FREELIKE_BLOCK ( ptr, 0 ); +} + +/** A cache discarder */ +struct cache_discarder { + /** + * Discard some cached data + * + * @ret discarded Number of cached items discarded + */ + unsigned int ( * discard ) ( void ); +}; + +/** Cache discarder table */ +#define CACHE_DISCARDERS __table ( struct cache_discarder, "cache_discarders" ) + +/** Declare a cache discarder */ +#define __cache_discarder( cost ) __table_entry ( CACHE_DISCARDERS, cost ) + +/** @defgroup cache_cost Cache discarder costs + * + * @{ + */ + +#define CACHE_CHEAP 01 /**< Items with a low replacement cost */ +#define CACHE_NORMAL 02 /**< Items with a normal replacement cost */ +#define CACHE_EXPENSIVE 03 /**< Items with a high replacement cost */ + +/** @} */ + +#endif /* _IPXE_MALLOC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/mca.h b/qemu/roms/ipxe/src/include/ipxe/mca.h new file mode 100644 index 000000000..d86dab195 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/mca.h @@ -0,0 +1,106 @@ +/* + * MCA bus driver code + * + * Abstracted from 3c509.c. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifndef MCA_H +#define MCA_H + +#include <ipxe/isa_ids.h> +#include <ipxe/device.h> +#include <ipxe/tables.h> + +/* + * MCA constants + * + */ +#define MCA_MOTHERBOARD_SETUP_REG 0x94 +#define MCA_ADAPTER_SETUP_REG 0x96 +#define MCA_MAX_SLOT_NR 0x07 /* Must be 2^n - 1 */ +#define MCA_POS_REG(n) (0x100+(n)) + +/* Is there a standard that would define this? */ +#define GENERIC_MCA_VENDOR ISA_VENDOR ( 'M', 'C', 'A' ) + +/** An MCA device ID list entry */ +struct mca_device_id { + /** Name */ + const char *name; + /** Device ID */ + uint16_t id; +}; + +/** An MCA device */ +struct mca_device { + /** Generic device */ + struct device dev; + /** Slot number */ + unsigned int slot; + /** POS register values */ + unsigned char pos[8]; + /** Driver for this device */ + struct mca_driver *driver; + /** Driver-private data + * + * Use mca_set_drvdata() and mca_get_drvdata() to access + * this field. + */ + void *priv; +}; + +#define MCA_ID(mca) ( ( (mca)->pos[1] << 8 ) + (mca)->pos[0] ) + +/** An MCA driver */ +struct mca_driver { + /** MCA ID table */ + struct mca_device_id *ids; + /** Number of entries in MCA ID table */ + unsigned int id_count; + /** + * Probe device + * + * @v mca MCA device + * @v id Matching entry in ID table + * @ret rc Return status code + */ + int ( * probe ) ( struct mca_device *mca, + const struct mca_device_id *id ); + /** + * Remove device + * + * @v mca MCA device + */ + void ( * remove ) ( struct mca_device *mca ); +}; + +/** MCA driver table */ +#define MCA_DRIVERS __table ( struct mca_driver, "mca_drivers" ) + +/** Declare an MCA driver */ +#define __mca_driver __table_entry ( MCA_DRIVERS, 01 ) + +/** + * Set MCA driver-private data + * + * @v mca MCA device + * @v priv Private data + */ +static inline void mca_set_drvdata ( struct mca_device *mca, void *priv ) { + mca->priv = priv; +} + +/** + * Get MCA driver-private data + * + * @v mca MCA device + * @ret priv Private data + */ +static inline void * mca_get_drvdata ( struct mca_device *mca ) { + return mca->priv; +} + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/md5.h b/qemu/roms/ipxe/src/include/ipxe/md5.h new file mode 100644 index 000000000..860bc4769 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/md5.h @@ -0,0 +1,73 @@ +#ifndef _IPXE_MD5_H +#define _IPXE_MD5_H + +/** @file + * + * MD5 algorithm + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/crypto.h> + +/** An MD5 digest */ +struct md5_digest { + /** Hash output */ + uint32_t h[4]; +}; + +/** An MD5 data block */ +union md5_block { + /** Raw bytes */ + uint8_t byte[64]; + /** Raw dwords */ + uint32_t dword[16]; + /** Final block structure */ + struct { + /** Padding */ + uint8_t pad[56]; + /** Length in bits */ + uint64_t len; + } final; +}; + +/** MD5 digest and data block + * + * The order of fields within this structure is designed to minimise + * code size. + */ +struct md5_digest_data { + /** Digest of data already processed */ + struct md5_digest digest; + /** Accumulated data */ + union md5_block data; +} __attribute__ (( packed )); + +/** MD5 digest and data block */ +union md5_digest_data_dwords { + /** Digest and data block */ + struct md5_digest_data dd; + /** Raw dwords */ + uint32_t dword[ sizeof ( struct md5_digest_data ) / + sizeof ( uint32_t ) ]; +}; + +/** An MD5 context */ +struct md5_context { + /** Amount of accumulated data */ + size_t len; + /** Digest and accumulated data */ + union md5_digest_data_dwords ddd; +} __attribute__ (( packed )); + +/** MD5 context size */ +#define MD5_CTX_SIZE sizeof ( struct md5_context ) + +/** MD5 digest size */ +#define MD5_DIGEST_SIZE sizeof ( struct md5_digest ) + +extern struct digest_algorithm md5_algorithm; + +#endif /* _IPXE_MD5_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/memblock.h b/qemu/roms/ipxe/src/include/ipxe/memblock.h new file mode 100644 index 000000000..13af3e433 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/memblock.h @@ -0,0 +1,17 @@ +#ifndef _IPXE_MEMBLOCK_H +#define _IPXE_MEMBLOCK_H + +/** @file + * + * Largest memory block + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/uaccess.h> + +extern size_t largest_memblock ( userptr_t *start ); + +#endif /* _IPXE_MEMBLOCK_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/menu.h b/qemu/roms/ipxe/src/include/ipxe/menu.h new file mode 100644 index 000000000..f2b3caccc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/menu.h @@ -0,0 +1,49 @@ +#ifndef _IPXE_MENU_H +#define _IPXE_MENU_H + +/** @file + * + * Menu selection + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/list.h> + +/** A menu */ +struct menu { + /** List of menus */ + struct list_head list; + /** Name */ + const char *name; + /** Title */ + const char *title; + /** Menu items */ + struct list_head items; +}; + +/** A menu item */ +struct menu_item { + /** List of menu items */ + struct list_head list; + /** Label */ + const char *label; + /** Text */ + const char *text; + /** Shortcut key */ + int shortcut; + /** Is default item */ + int is_default; +}; + +extern struct menu * create_menu ( const char *name, const char *title ); +extern struct menu_item * add_menu_item ( struct menu *menu, const char *label, + const char *text, int shortcut, + int is_default ); +extern void destroy_menu ( struct menu *menu ); +extern struct menu * find_menu ( const char *name ); +extern int show_menu ( struct menu *menu, unsigned long timeout, + const char *select, struct menu_item **selected ); + +#endif /* _IPXE_MENU_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/mii.h b/qemu/roms/ipxe/src/include/ipxe/mii.h new file mode 100644 index 000000000..f53ad4a62 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/mii.h @@ -0,0 +1,118 @@ +#ifndef _IPXE_MII_H +#define _IPXE_MII_H + +/** @file + * + * Media Independent Interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <mii.h> +#include <ipxe/netdevice.h> + +struct mii_interface; + +/** MII interface operations */ +struct mii_operations { + /** + * Read from MII register + * + * @v mii MII interface + * @v reg Register address + * @ret data Data read, or negative error + */ + int ( * read ) ( struct mii_interface *mii, unsigned int reg ); + /** + * Write to MII register + * + * @v mii MII interface + * @v reg Register address + * @v data Data to write + * @ret rc Return status code + */ + int ( * write ) ( struct mii_interface *mii, unsigned int reg, + unsigned int data ); +}; + +/** An MII interface */ +struct mii_interface { + /** Interface operations */ + struct mii_operations *op; +}; + +/** + * Initialise MII interface + * + * @v mii MII interface + * @v op MII interface operations + */ +static inline __attribute__ (( always_inline )) void +mii_init ( struct mii_interface *mii, struct mii_operations *op ) { + mii->op = op; +} + +/** + * Read from MII register + * + * @v mii MII interface + * @v reg Register address + * @ret data Data read, or negative error + */ +static inline __attribute__ (( always_inline )) int +mii_read ( struct mii_interface *mii, unsigned int reg ) { + return mii->op->read ( mii, reg ); +} + +/** + * Write to MII register + * + * @v mii MII interface + * @v reg Register address + * @v data Data to write + * @ret rc Return status code + */ +static inline __attribute__ (( always_inline )) int +mii_write ( struct mii_interface *mii, unsigned int reg, unsigned int data ) { + return mii->op->write ( mii, reg, data ); +} + +/** + * Dump MII registers (for debugging) + * + * @v mii MII interface + */ +static inline void +mii_dump ( struct mii_interface *mii ) { + unsigned int i; + int data; + + /* Do nothing unless debug output is enabled */ + if ( ! DBG_LOG ) + return; + + /* Dump basic MII register set */ + for ( i = 0 ; i < 16 ; i++ ) { + if ( ( i % 8 ) == 0 ) { + DBGC ( mii, "MII %p registers %02x-%02x:", + mii, i, ( i + 7 ) ); + } + data = mii_read ( mii, i ); + if ( data >= 0 ) { + DBGC ( mii, " %04x", data ); + } else { + DBGC ( mii, " XXXX" ); + } + if ( ( i % 8 ) == 7 ) + DBGC ( mii, "\n" ); + } +} + +/** Maximum time to wait for a reset, in milliseconds */ +#define MII_RESET_MAX_WAIT_MS 500 + +extern int mii_restart ( struct mii_interface *mii ); +extern int mii_reset ( struct mii_interface *mii ); + +#endif /* _IPXE_MII_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/monojob.h b/qemu/roms/ipxe/src/include/ipxe/monojob.h new file mode 100644 index 000000000..aedc37eca --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/monojob.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_MONOJOB_H +#define _IPXE_MONOJOB_H + +/** @file + * + * Single foreground job + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct interface; + +extern struct interface monojob; + +extern int monojob_wait ( const char *string, unsigned long timeout ); + +#endif /* _IPXE_MONOJOB_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/mount.h b/qemu/roms/ipxe/src/include/ipxe/mount.h new file mode 100644 index 000000000..ca958117a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/mount.h @@ -0,0 +1,76 @@ +#ifndef _IPXE_MOUNT_H +#define _IPXE_MOUNT_H + +#include <ipxe/nfs.h> + +/** @file + * + * NFS MOUNT protocol. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** NFS MOUNT protocol number */ +#define ONCRPC_MOUNT 100005 +/** NFS MOUNT protocol version */ +#define MOUNT_VERS 3 + + +/** No error */ +#define MNT3_OK 0 +/** Not owner */ +#define MNT3ERR_PERM 1 +/** No such file or directory */ +#define MNT3ERR_NOENT 2 +/** I/O error */ +#define MNT3ERR_IO 5 +/** Permission denied */ +#define MNT3ERR_ACCES 13 +/** Not a directory */ +#define MNT3ERR_NOTDIR 20 +/** Invalid argument */ +#define MNT3ERR_INVAL 22 +/** Filename too long */ +#define MNT3ERR_NAMETOOLONG 63 +/** Operation not supported */ +#define MNT3ERR_NOTSUPP 10004 +/** A failure on the server */ +#define MNT3ERR_SERVERFAULT 10006 + + +/** + * A MOUNT MNT reply + * + */ +struct mount_mnt_reply { + /** Reply status */ + uint32_t status; + /** Root file handle */ + struct nfs_fh fh; +}; + +/** + * Prepare an ONC RPC session to be used as a MOUNT session + * + * @v session ONC RPC session + * @v credential ONC RPC credential + * + * The credential parameter must not be NULL, use 'oncrpc_auth_none' if you + * don't want a particular scheme to be used. + */ +static inline void mount_init_session ( struct oncrpc_session *session, + struct oncrpc_cred *credential ) { + oncrpc_init_session ( session, credential, &oncrpc_auth_none, + ONCRPC_MOUNT, MOUNT_VERS ); +} + +int mount_mnt ( struct interface *intf, struct oncrpc_session *session, + const char *mountpoint ); +int mount_umnt ( struct interface *intf, struct oncrpc_session *session, + const char *mountpoint ); + +int mount_get_mnt_reply ( struct mount_mnt_reply *mnt_reply, + struct oncrpc_reply *reply ); + +#endif /* _IPXE_MOUNT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/nap.h b/qemu/roms/ipxe/src/include/ipxe/nap.h new file mode 100644 index 000000000..afc887910 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/nap.h @@ -0,0 +1,57 @@ +#ifndef _IPXE_NAP_H +#define _IPXE_NAP_H + +/** @file + * + * CPU sleeping + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/api.h> +#include <config/nap.h> + +/** + * Calculate static inline CPU sleeping API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define NAP_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( NAP_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide an CPU sleeping API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_NAP( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( NAP_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline CPU sleeping API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_NAP_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( NAP_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent I/O API headers */ +#include <ipxe/null_nap.h> +#include <ipxe/linux/linux_nap.h> + +/* Include all architecture-dependent I/O API headers */ +#include <bits/nap.h> + +/** + * Sleep until next CPU interrupt + * + */ +void cpu_nap ( void ); + +#endif /* _IPXE_NAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ndp.h b/qemu/roms/ipxe/src/include/ipxe/ndp.h new file mode 100644 index 000000000..7388f938e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ndp.h @@ -0,0 +1,206 @@ +#ifndef _IPXE_NDP_H +#define _IPXE_NDP_H + +/** @file + * + * Neighbour discovery protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/in.h> +#include <ipxe/ipv6.h> +#include <ipxe/icmpv6.h> +#include <ipxe/neighbour.h> + +/** An NDP option header */ +struct ndp_option_header { + /** Type */ + uint8_t type; + /** Length (in blocks of 8 bytes) */ + uint8_t blocks; +} __attribute__ (( packed )); + +/** NDP option block size */ +#define NDP_OPTION_BLKSZ 8U + +/** NDP source link-layer address option */ +#define NDP_OPT_LL_SOURCE 1 + +/** NDP target link-layer address option */ +#define NDP_OPT_LL_TARGET 2 + +/** NDP source or target link-layer address option */ +struct ndp_ll_addr_option { + /** NDP option header */ + struct ndp_option_header header; + /** Link-layer address */ + uint8_t ll_addr[0]; +} __attribute__ (( packed )); + +/** NDP prefix information option */ +#define NDP_OPT_PREFIX 3 + +/** NDP prefix information */ +struct ndp_prefix_information_option { + /** NDP option header */ + struct ndp_option_header header; + /** Prefix length */ + uint8_t prefix_len; + /** Flags */ + uint8_t flags; + /** Valid lifetime */ + uint32_t valid; + /** Preferred lifetime */ + uint32_t preferred; + /** Reserved */ + uint32_t reserved; + /** Prefix */ + struct in6_addr prefix; +} __attribute__ (( packed )); + +/** NDP on-link flag */ +#define NDP_PREFIX_ON_LINK 0x80 + +/** NDP autonomous address configuration flag */ +#define NDP_PREFIX_AUTONOMOUS 0x40 + +/** NDP recursive DNS server option */ +#define NDP_OPT_RDNSS 25 + +/** NDP recursive DNS server */ +struct ndp_rdnss_option { + /** NDP option header */ + struct ndp_option_header header; + /** Reserved */ + uint16_t reserved; + /** Lifetime */ + uint32_t lifetime; + /** Addresses */ + struct in6_addr addresses[0]; +} __attribute__ (( packed )); + +/** NDP DNS search list option */ +#define NDP_OPT_DNSSL 31 + +/** NDP DNS search list */ +struct ndp_dnssl_option { + /** NDP option header */ + struct ndp_option_header header; + /** Reserved */ + uint16_t reserved; + /** Lifetime */ + uint32_t lifetime; + /** Domain names */ + uint8_t names[0]; +} __attribute__ (( packed )); + +/** An NDP option */ +union ndp_option { + /** Option header */ + struct ndp_option_header header; + /** Source or target link-layer address option */ + struct ndp_ll_addr_option ll_addr; + /** Prefix information option */ + struct ndp_prefix_information_option prefix; + /** Recursive DNS server option */ + struct ndp_rdnss_option rdnss; + /** DNS search list option */ + struct ndp_dnssl_option dnssl; +} __attribute__ (( packed )); + +/** An NDP neighbour solicitation or advertisement header */ +struct ndp_neighbour_header { + /** ICMPv6 header */ + struct icmp_header icmp; + /** Flags */ + uint8_t flags; + /** Reserved */ + uint8_t reserved[3]; + /** Target address */ + struct in6_addr target; + /** Options */ + union ndp_option option[0]; +} __attribute__ (( packed )); + +/** NDP router flag */ +#define NDP_NEIGHBOUR_ROUTER 0x80 + +/** NDP solicited flag */ +#define NDP_NEIGHBOUR_SOLICITED 0x40 + +/** NDP override flag */ +#define NDP_NEIGHBOUR_OVERRIDE 0x20 + +/** An NDP router advertisement header */ +struct ndp_router_advertisement_header { + /** ICMPv6 header */ + struct icmp_header icmp; + /** Current hop limit */ + uint8_t hop_limit; + /** Flags */ + uint8_t flags; + /** Router lifetime */ + uint16_t lifetime; + /** Reachable time */ + uint32_t reachable; + /** Retransmission timer */ + uint32_t retransmit; + /** Options */ + union ndp_option option[0]; +} __attribute__ (( packed )); + +/** NDP managed address configuration */ +#define NDP_ROUTER_MANAGED 0x80 + +/** NDP other configuration */ +#define NDP_ROUTER_OTHER 0x40 + +/** An NDP router solicitation header */ +struct ndp_router_solicitation_header { + /** ICMPv6 header */ + struct icmp_header icmp; + /** Reserved */ + uint32_t reserved; + /** Options */ + union ndp_option option[0]; +} __attribute__ (( packed )); + +/** An NDP header */ +union ndp_header { + /** ICMPv6 header */ + struct icmp_header icmp; + /** Neighbour solicitation or advertisement header */ + struct ndp_neighbour_header neigh; + /** Router solicitation header */ + struct ndp_router_solicitation_header rsol; + /** Router advertisement header */ + struct ndp_router_advertisement_header radv; +} __attribute__ (( packed )); + +extern struct neighbour_discovery ndp_discovery; + +/** + * Transmit packet, determining link-layer address via NDP + * + * @v iobuf I/O buffer + * @v netdev Network device + * @v net_dest Destination network-layer address + * @v net_source Source network-layer address + * @v ll_source Source link-layer address + * @ret rc Return status code + */ +static inline int ndp_tx ( struct io_buffer *iobuf, struct net_device *netdev, + const void *net_dest, const void *net_source, + const void *ll_source ) { + + return neighbour_tx ( iobuf, netdev, &ipv6_protocol, net_dest, + &ndp_discovery, net_source, ll_source ); +} + +/** NDP settings block name */ +#define NDP_SETTINGS_NAME "ndp" + +#endif /* _IPXE_NDP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/neighbour.h b/qemu/roms/ipxe/src/include/ipxe/neighbour.h new file mode 100644 index 000000000..f2a3946f1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/neighbour.h @@ -0,0 +1,88 @@ +#ifndef _IPXE_NEIGHBOUR_H +#define _IPXE_NEIGHBOUR_H + +/** @file + * + * Neighbour discovery + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/refcnt.h> +#include <ipxe/list.h> +#include <ipxe/netdevice.h> +#include <ipxe/retry.h> + +/** A neighbour discovery protocol */ +struct neighbour_discovery { + /** Name */ + const char *name; + /** + * Transmit neighbour discovery request + * + * @v netdev Network device + * @v net_protocol Network-layer protocol + * @v net_dest Destination network-layer address + * @v net_source Source network-layer address + * @ret rc Return status code + */ + int ( * tx_request ) ( struct net_device *netdev, + struct net_protocol *net_protocol, + const void *net_dest, const void *net_source ); +}; + +/** A neighbour cache entry */ +struct neighbour { + /** Reference count */ + struct refcnt refcnt; + /** List of neighbour cache entries */ + struct list_head list; + + /** Network device */ + struct net_device *netdev; + /** Network-layer protocol */ + struct net_protocol *net_protocol; + /** Network-layer destination address */ + uint8_t net_dest[MAX_NET_ADDR_LEN]; + /** Link-layer destination address */ + uint8_t ll_dest[MAX_LL_ADDR_LEN]; + + /** Neighbour discovery protocol (if any) */ + struct neighbour_discovery *discovery; + /** Network-layer source address (if any) */ + uint8_t net_source[MAX_NET_ADDR_LEN]; + /** Retransmission timer */ + struct retry_timer timer; + + /** Pending I/O buffers */ + struct list_head tx_queue; +}; + +/** + * Test if neighbour cache entry has a valid link-layer address + * + * @v neighbour Neighbour cache entry + * @ret has_ll_dest Neighbour cache entry has a valid link-layer address + */ +static inline __attribute__ (( always_inline )) int +neighbour_has_ll_dest ( struct neighbour *neighbour ) { + return ( ! timer_running ( &neighbour->timer ) ); +} + +extern struct list_head neighbours; + +extern int neighbour_tx ( struct io_buffer *iobuf, struct net_device *netdev, + struct net_protocol *net_protocol, + const void *net_dest, + struct neighbour_discovery *discovery, + const void *net_source, const void *ll_source ); +extern int neighbour_update ( struct net_device *netdev, + struct net_protocol *net_protocol, + const void *net_dest, const void *ll_dest ); +extern int neighbour_define ( struct net_device *netdev, + struct net_protocol *net_protocol, + const void *net_dest, const void *ll_dest ); + +#endif /* _IPXE_NEIGHBOUR_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/net80211.h b/qemu/roms/ipxe/src/include/ipxe/net80211.h new file mode 100644 index 000000000..9ed0fa9b1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/net80211.h @@ -0,0 +1,1187 @@ +#ifndef _IPXE_NET80211_H +#define _IPXE_NET80211_H + +#include <ipxe/process.h> +#include <ipxe/ieee80211.h> +#include <ipxe/iobuf.h> +#include <ipxe/netdevice.h> +#include <ipxe/rc80211.h> + +/** @file + * + * The iPXE 802.11 MAC layer. + */ + +/* + * Major things NOT YET supported: + * - any type of security + * - 802.11n + * + * Major things that probably will NEVER be supported, barring a + * compelling use case and/or corporate sponsorship: + * - QoS + * - 802.1X authentication ("WPA Enterprise") + * - Contention-free periods + * - "ad-hoc" networks (IBSS), monitor mode, host AP mode + * - hidden networks on the 5GHz band due to regulatory issues + * - spectrum management on the 5GHz band (TPC and DFS), as required + * in some non-US regulatory domains + * - Clause 14 PHYs (Frequency-Hopping Spread Spectrum on 2.4GHz) + * and Clause 16 PHYs (infrared) - I'm not aware of any real-world + * use of these. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* All 802.11 devices are handled using a generic "802.11 device" + net_device, with a link in its `priv' field to a net80211_device + which we use to handle 802.11-specific details. */ + + +/** @defgroup net80211_band RF bands on which an 802.11 device can transmit */ +/** @{ */ + +/** The 2.4 GHz ISM band, unlicensed in most countries */ +#define NET80211_BAND_2GHZ 0 +/** The band from 4.9 GHz to 5.7 GHz, which tends to be more restricted */ +#define NET80211_BAND_5GHZ 1 +/** Number of RF bands */ +#define NET80211_NR_BANDS 2 + +/** Bitmask for the 2GHz band */ +#define NET80211_BAND_BIT_2GHZ (1 << 0) +/** Bitmask for the 5GHz band */ +#define NET80211_BAND_BIT_5GHZ (1 << 1) + +/** @} */ + + +/** @defgroup net80211_mode 802.11 operation modes supported by hardware */ +/** @{ */ + +/** 802.11a: 54 Mbps operation using OFDM signaling on the 5GHz band */ +#define NET80211_MODE_A (1 << 0) + +/** 802.11b: 1-11 Mbps operation using DSSS/CCK signaling on the 2.4GHz band */ +#define NET80211_MODE_B (1 << 1) + +/** 802.11g: 54 Mbps operation using ERP/OFDM signaling on the 2.4GHz band */ +#define NET80211_MODE_G (1 << 2) + +/** 802.11n: High-rate operation using MIMO technology on 2.4GHz or 5GHz */ +#define NET80211_MODE_N (1 << 3) + +/** @} */ + + +/** @defgroup net80211_cfg Constants for the net80211 config callback */ +/** @{ */ + +/** Channel choice (@c dev->channel) or regulatory parameters have changed */ +#define NET80211_CFG_CHANNEL (1 << 0) + +/** Requested transmission rate (@c dev->rate) has changed */ +#define NET80211_CFG_RATE (1 << 1) + +/** Association has been established with a new BSS (@c dev->bssid) */ +#define NET80211_CFG_ASSOC (1 << 2) + +/** Low-level link parameters (short preamble, protection, etc) have changed */ +#define NET80211_CFG_PHY_PARAMS (1 << 3) + +/** @} */ + + +/** An 802.11 security handshaking protocol */ +enum net80211_security_proto { + /** No security handshaking + * + * This might be used with an open network or with WEP, as + * WEP does not have a cryptographic handshaking phase. + */ + NET80211_SECPROT_NONE = 0, + + /** Pre-shared key handshaking + * + * This implements the "WPA Personal" handshake. 802.1X + * authentication is not performed -- the user supplies a + * pre-shared key directly -- but there is a 4-way handshake + * between client and AP to verify that both have the same key + * without revealing the contents of that key. + */ + NET80211_SECPROT_PSK = 1, + + /** Full EAP 802.1X handshaking + * + * This implements the "WPA Enterprise" handshake, connecting + * to an 802.1X authentication server to provide credentials + * and receive a pairwise master key (PMK), which is then used + * in the same 4-way handshake as the PSK method. + */ + NET80211_SECPROT_EAP = 2, + + /** Dummy value used when the handshaking type can't be detected */ + NET80211_SECPROT_UNKNOWN = 3, +}; + + +/** An 802.11 data encryption algorithm */ +enum net80211_crypto_alg { + /** No security, an "Open" network */ + NET80211_CRYPT_NONE = 0, + + /** Network protected with WEP (awful RC4-based system) + * + * WEP uses a naive application of RC4, with a monotonically + * increasing initialization vector that is prepended to the + * key to initialize the RC4 keystream. It is highly insecure + * and can be completely cracked or subverted using automated, + * robust, freely available tools (aircrack-ng) in minutes. + * + * 40-bit and 104-bit WEP are differentiated only by the size + * of the key. They may be advertised as 64-bit and 128-bit, + * counting the non-random IV as part of the key bits. + */ + NET80211_CRYPT_WEP = 1, + + /** Network protected with TKIP (better RC4-based system) + * + * Usually known by its trade name of WPA (Wi-Fi Protected + * Access), TKIP implements a message integrity code (MIC) + * called Michael, a timestamp counter for replay prevention, + * and a key mixing function that together remove almost all + * the security problems with WEP. Countermeasures are + * implemented to prevent high data-rate attacks. + * + * There exists one known attack on TKIP, that allows one to + * send between 7 and 15 arbitrary short data packets on a + * QoS-enabled network given about an hour of data + * gathering. Since iPXE does not support QoS for 802.11 + * networks, this is not a threat to us. The only other method + * is a brute-force passphrase attack. + */ + NET80211_CRYPT_TKIP = 2, + + /** Network protected with CCMP (AES-based system) + * + * Often called WPA2 in commerce, or RSNA (Robust Security + * Network Architecture) in the 802.11 standard, CCMP is + * highly secure and does not have any known attack vectors. + * Since it is based on a block cipher, the statistical + * correlation and "chopchop" attacks used with great success + * against WEP and minor success against TKIP fail. + */ + NET80211_CRYPT_CCMP = 3, + + /** Dummy value used when the cryptosystem can't be detected */ + NET80211_CRYPT_UNKNOWN = 4, +}; + + +/** @defgroup net80211_state Bits for the 802.11 association state field */ +/** @{ */ + +/** An error code indicating the failure mode, or 0 if successful */ +#define NET80211_STATUS_MASK 0x7F + +/** Whether the error code provided is a "reason" code, not a "status" code */ +#define NET80211_IS_REASON 0x80 + +/** Whether we have found the network we will be associating with */ +#define NET80211_PROBED (1 << 8) + +/** Whether we have successfully authenticated with the network + * + * This usually has nothing to do with actual security; it is a + * holdover from older 802.11 implementation ideas. + */ +#define NET80211_AUTHENTICATED (1 << 9) + +/** Whether we have successfully associated with the network */ +#define NET80211_ASSOCIATED (1 << 10) + +/** Whether we have completed security handshaking with the network + * + * Once this is set, we can send data packets. For that reason this + * bit is set even in cases where no security handshaking is + * required. + */ +#define NET80211_CRYPTO_SYNCED (1 << 11) + +/** Whether the auto-association task is running */ +#define NET80211_WORKING (1 << 12) + +/** Whether the auto-association task is waiting for a reply from the AP */ +#define NET80211_WAITING (1 << 13) + +/** Whether the auto-association task should be suppressed + * + * This is set by the `iwlist' command so that it can open the device + * without starting another probe process that will interfere with its + * own. + */ +#define NET80211_NO_ASSOC (1 << 14) + +/** Whether this association was performed using a broadcast SSID + * + * If the user opened this device without netX/ssid set, the device's + * SSID will be set to that of the network it chooses to associate + * with, but the netX/ssid setting will remain blank. If we don't + * remember that we started from no specified SSID, it will appear + * every time settings are updated (e.g. after DHCP) that we need to + * reassociate due to the difference between the set SSID and our own. + */ +#define NET80211_AUTO_SSID (1 << 15) + + +/** @} */ + + +/** @defgroup net80211_phy 802.11 physical layer flags */ +/** @{ */ + +/** Whether to use RTS/CTS or CTS-to-self protection for transmissions + * + * Since the RTS or CTS is transmitted using 802.11b signaling, and + * includes a field indicating the amount of time that will be used by + * transmission of the following packet, this serves as an effective + * protection mechanism to avoid 802.11b clients interfering with + * 802.11g clients on mixed networks. + */ +#define NET80211_PHY_USE_PROTECTION (1 << 1) + +/** Whether to use 802.11b short preamble operation + * + * Short-preamble operation can moderately increase throughput on + * 802.11b networks operating between 2Mbps and 11Mbps. It is + * irrelevant for 802.11g data rates, since they use a different + * modulation scheme. + */ +#define NET80211_PHY_USE_SHORT_PREAMBLE (1 << 2) + +/** Whether to use 802.11g short slot operation + * + * This affects a low-level timing parameter of 802.11g transmissions. + */ +#define NET80211_PHY_USE_SHORT_SLOT (1 << 3) + +/** @} */ + + +/** The maximum number of TX rates we allow to be configured simultaneously */ +#define NET80211_MAX_RATES 16 + +/** The maximum number of channels we allow to be configured simultaneously */ +#define NET80211_MAX_CHANNELS 40 + +/** Seconds we'll wait to get all fragments of a packet */ +#define NET80211_FRAG_TIMEOUT 2 + +/** The number of fragments we can receive at once + * + * The 802.11 standard requires that this be at least 3. + */ +#define NET80211_NR_CONCURRENT_FRAGS 3 + +/** Maximum TX power to allow (dBm), if we don't get a regulatory hint */ +#define NET80211_REG_TXPOWER 20 + + +struct net80211_device; + +/** Operations that must be implemented by an 802.11 driver */ +struct net80211_device_operations { + /** Open 802.11 device + * + * @v dev 802.11 device + * @ret rc Return status code + * + * This method should allocate RX I/O buffers and enable the + * hardware to start transmitting and receiving packets on the + * channels its net80211_register() call indicated it could + * handle. It does not need to tune the antenna to receive + * packets on any particular channel. + */ + int ( * open ) ( struct net80211_device *dev ); + + /** Close 802.11 network device + * + * @v dev 802.11 device + * + * This method should stop the flow of packets, and call + * net80211_tx_complete() for any packets remaining in the + * device's TX queue. + */ + void ( * close ) ( struct net80211_device *dev ); + + /** Transmit packet on 802.11 network device + * + * @v dev 802.11 device + * @v iobuf I/O buffer + * @ret rc Return status code + * + * This method should cause the hardware to initiate + * transmission of the I/O buffer, using the channel and rate + * most recently indicated by an appropriate call to the + * @c config callback. The 802.11 layer guarantees that said + * channel and rate will be the same as those currently + * reflected in the fields of @a dev. + * + * If this method returns success, the I/O buffer remains + * owned by the network layer's TX queue, and the driver must + * eventually call net80211_tx_complete() to free the buffer + * whether transmission succeeded or not. If this method + * returns failure, it will be interpreted as "failure to + * enqueue buffer" and the I/O buffer will be immediately + * released. + * + * This method is guaranteed to be called only when the device + * is open. + */ + int ( * transmit ) ( struct net80211_device *dev, + struct io_buffer *iobuf ); + + /** Poll for completed and received packets + * + * @v dev 802.11 device + * + * This method should cause the hardware to check for + * completed transmissions and received packets. Any received + * packets should be delivered via net80211_rx(), and + * completed transmissions should be indicated using + * net80211_tx_complete(). + * + * This method is guaranteed to be called only when the device + * is open. + */ + void ( * poll ) ( struct net80211_device *dev ); + + /** Enable or disable interrupts + * + * @v dev 802.11 device + * @v enable If TRUE, interrupts should be enabled + */ + void ( * irq ) ( struct net80211_device *dev, int enable ); + + /** Update hardware state to match 802.11 layer state + * + * @v dev 802.11 device + * @v changed Set of flags indicating what may have changed + * @ret rc Return status code + * + * This method should cause the hardware state to be + * reinitialized from the state indicated in fields of + * net80211_device, in the areas indicated by bits set in + * @a changed. If the hardware is unable to do so, this method + * may return an appropriate error indication. + * + * This method is guaranteed to be called only when the device + * is open. + */ + int ( * config ) ( struct net80211_device *dev, int changed ); +}; + +/** An 802.11 RF channel. */ +struct net80211_channel +{ + /** The band with which this channel is associated */ + u8 band; + + /** A channel number interpreted according to the band + * + * The 2.4GHz band uses channel numbers from 1-13 at 5MHz + * intervals such that channel 1 is 2407 MHz; channel 14, + * legal for use only in Japan, is defined separately as 2484 + * MHz. Adjacent channels will overlap, since 802.11 + * transmissions use a 20 MHz (4-channel) bandwidth. Most + * commonly, channels 1, 6, and 11 are used. + * + * The 5GHz band uses channel numbers derived directly from + * the frequency; channel 0 is 5000 MHz, and channels are + * always spaced 5 MHz apart. Channel numbers over 180 are + * relative to 4GHz instead of 5GHz, but these are rarely + * seen. Most channels are not legal for use. + */ + u8 channel_nr; + + /** The center frequency for this channel + * + * Currently a bandwidth of 20 MHz is assumed. + */ + u16 center_freq; + + /** Hardware channel value */ + u16 hw_value; + + /** Maximum allowable transmit power, in dBm + * + * This should be interpreted as EIRP, the power supplied to + * an ideal isotropic antenna in order to achieve the same + * average signal intensity as the real hardware at a + * particular distance. + * + * Currently no provision is made for directional antennas. + */ + u8 maxpower; +}; + +/** Information on the capabilities of an 802.11 hardware device + * + * In its probe callback, an 802.11 driver must read hardware + * registers to determine the appropriate contents of this structure, + * fill it, and pass it to net80211_register() so that the 802.11 + * layer knows how to treat the hardware and what to advertise as + * supported to access points. + */ +struct net80211_hw_info +{ + /** Default hardware MAC address. + * + * The user may change this by setting the @c netX/mac setting + * before the driver's open function is called; in that case + * the driver must set the hardware MAC address to the address + * contained in the wrapping net_device's ll_addr field, or if + * that is impossible, set that ll_addr field back to the + * unchangeable hardware MAC address. + */ + u8 hwaddr[ETH_ALEN]; + + /** A bitwise OR of the 802.11x modes supported by this device */ + int modes; + + /** A bitwise OR of the bands on which this device can communicate */ + int bands; + + /** A set of flags indicating peculiarities of this device. */ + enum { + /** Received frames include a frame check sequence. */ + NET80211_HW_RX_HAS_FCS = (1 << 1), + + /** Hardware doesn't support 2.4GHz short preambles + * + * This is only relevant for 802.11b operation above + * 2Mbps. All 802.11g devices support short preambles. + */ + NET80211_HW_NO_SHORT_PREAMBLE = (1 << 2), + + /** Hardware doesn't support 802.11g short slot operation */ + NET80211_HW_NO_SHORT_SLOT = (1 << 3), + } flags; + + /** Signal strength information that can be provided by the device + * + * Signal strength is passed to net80211_rx(), primarily to + * allow determination of the closest access point for a + * multi-AP network. The units are provided for completeness + * of status displays. + */ + enum { + /** No signal strength information supported */ + NET80211_SIGNAL_NONE = 0, + /** Signal strength in arbitrary units */ + NET80211_SIGNAL_ARBITRARY, + /** Signal strength in decibels relative to arbitrary base */ + NET80211_SIGNAL_DB, + /** Signal strength in decibels relative to 1mW */ + NET80211_SIGNAL_DBM, + } signal_type; + + /** Maximum signal in arbitrary cases + * + * If signal_type is NET80211_SIGNAL_ARBITRARY or + * NET80211_SIGNAL_DB, the driver should report it on a scale + * from 0 to signal_max. + */ + unsigned signal_max; + + /** List of RF channels supported by the card */ + struct net80211_channel channels[NET80211_MAX_CHANNELS]; + + /** Number of supported channels */ + int nr_channels; + + /** List of transmission rates supported by the card, indexed by band + * + * Rates should be in 100kbps increments (e.g. 11 Mbps would + * be represented as the number 110). + */ + u16 rates[NET80211_NR_BANDS][NET80211_MAX_RATES]; + + /** Number of supported rates, indexed by band */ + int nr_rates[NET80211_NR_BANDS]; + + /** Estimate of the time required to change channels, in microseconds + * + * If this is not known, a guess on the order of a few + * milliseconds (value of 1000-5000) is reasonable. + */ + unsigned channel_change_time; +}; + +/** Structure tracking received fragments for a packet + * + * We set up a fragment cache entry when we receive a packet marked as + * fragment 0 with the "more fragments" bit set in its frame control + * header. We are required by the 802.11 standard to track 3 + * fragmented packets arriving simultaneously; if we receive more we + * may drop some. Upon receipt of a new fragment-0 packet, if no entry + * is available or expired, we take over the most @e recent entry for + * the new packet, since we don't want to starve old entries from ever + * finishing at all. If we get a fragment after the zeroth with no + * cache entry for its packet, we drop it. + */ +struct net80211_frag_cache +{ + /** Whether this cache entry is in use */ + u8 in_use; + + /** Sequence number of this MSDU (packet) */ + u16 seqnr; + + /** Timestamp from point at which first fragment was collected */ + u32 start_ticks; + + /** Buffers for each fragment */ + struct io_buffer *iob[16]; +}; + + +/** Interface to an 802.11 security handshaking protocol + * + * Security handshaking protocols handle parsing a user-specified key + * into a suitable input to the encryption algorithm, and for WPA and + * better systems, manage performing whatever authentication with the + * network is necessary. + * + * At all times when any method in this structure is called with a + * net80211_device argument @a dev, a dynamically allocated copy of + * the handshaker structure itself with space for the requested amount + * of private data may be accessed as @c dev->handshaker. The + * structure will not be modified, and will only be freed during + * reassociation and device closing after the @a stop method has been + * called. + */ +struct net80211_handshaker +{ + /** The security handshaking protocol implemented */ + enum net80211_security_proto protocol; + + /** Initialize security handshaking protocol + * + * @v dev 802.11 device + * @ret rc Return status code + * + * This method is expected to access @c netX/key or other + * applicable settings to determine the parameters for + * handshaking. If no handshaking is required, it should call + * sec80211_install() with the cryptosystem and key that are + * to be used, and @c start and @c step should be set to @c + * NULL. + * + * This is always called just before association is performed, + * but after its parameters have been set; in particular, you + * may rely on the contents of the @a essid field in @a dev. + */ + int ( * init ) ( struct net80211_device *dev ); + + /** Start handshaking + * + * @v dev 802.11 device + * @ret rc Return status code + * + * This method is expected to set up internal state so that + * packets sent immediately after association, before @a step + * can be called, will be handled appropriately. + * + * This is always called just before association is attempted. + */ + int ( * start ) ( struct net80211_device *dev ); + + /** Process handshaking state + * + * @v dev 802.11 device + * @ret rc Return status code, or positive if done + * + * This method is expected to perform as much progress on the + * protocol it implements as is possible without blocking. It + * should return 0 if it wishes to be called again, a negative + * return status code on error, or a positive value if + * handshaking is complete. In the case of a positive return, + * net80211_crypto_install() must have been called. + * + * If handshaking may require further action (e.g. an AP that + * might decide to rekey), handlers must be installed by this + * function that will act without further calls to @a step. + */ + int ( * step ) ( struct net80211_device *dev ); + + /** Change cryptographic key based on setting + * + * @v dev 802.11 device + * @ret rc Return status code + * + * This method is called whenever the @c netX/key setting + * @e may have been changed. It is expected to determine + * whether it did in fact change, and if so, to install the + * new key using net80211_crypto_install(). If it is not + * possible to do this immediately, this method should return + * an error; in that case the 802.11 stack will reassociate, + * following the usual init/start/step sequence. + * + * This method is only relevant when it is possible to + * associate successfully with an incorrect key. When it is + * not, a failed association will be retried until the user + * changes the key setting, and a successful association will + * not be dropped due to such a change. When association with + * an incorrect key is impossible, this function should return + * 0 after performing no action. + */ + int ( * change_key ) ( struct net80211_device *dev ); + + /** Stop security handshaking handlers + * + * @v dev 802.11 device + * + * This method is called just before freeing a security + * handshaker; it could, for example, delete a process that @a + * start had created to manage the security of the connection. + * If not needed it may be set to NULL. + */ + void ( * stop ) ( struct net80211_device *dev ); + + /** Amount of private data requested + * + * Before @c init is called for the first time, this structure's + * @c priv pointer will point to this many bytes of allocated + * data, where the allocation will be performed separately for + * each net80211_device. + */ + int priv_len; + + /** Whether @a start has been called + * + * Reset to 0 after @a stop is called. + */ + int started; + + /** Pointer to private data + * + * In initializing this structure statically for a linker + * table, set this to NULL. + */ + void *priv; +}; + +#define NET80211_HANDSHAKERS __table ( struct net80211_handshaker, \ + "net80211_handshakers" ) +#define __net80211_handshaker __table_entry ( NET80211_HANDSHAKERS, 01 ) + + +/** Interface to an 802.11 cryptosystem + * + * Cryptosystems define a net80211_crypto structure statically, using + * a iPXE linker table to make it available to the 802.11 layer. When + * the cryptosystem needs to be used, the 802.11 code will allocate a + * copy of the static definition plus whatever space the algorithm has + * requested for private state, and point net80211_device::crypto or + * net80211_device::gcrypto at it. + */ +struct net80211_crypto +{ + /** The cryptographic algorithm implemented */ + enum net80211_crypto_alg algorithm; + + /** Initialize cryptosystem using a given key + * + * @v crypto 802.11 cryptosystem + * @v key Pointer to key bytes + * @v keylen Number of key bytes + * @v rsc Initial receive sequence counter, if applicable + * @ret rc Return status code + * + * This method is passed the communication key provided by the + * security handshake handler, which will already be in the + * low-level form required. It may not store a pointer to the + * key after returning; it must copy it to its private storage. + */ + int ( * init ) ( struct net80211_crypto *crypto, const void *key, + int keylen, const void *rsc ); + + /** Encrypt a frame using the cryptosystem + * + * @v crypto 802.11 cryptosystem + * @v iob I/O buffer + * @ret eiob Newly allocated I/O buffer with encrypted packet + * + * This method is called to encrypt a single frame. It is + * guaranteed that initialize() will have completed + * successfully before this method is called. + * + * The frame passed already has an 802.11 header prepended, + * but the PROTECTED bit in the frame control field will not + * be set; this method is responsible for setting it. The + * returned I/O buffer should contain a complete copy of @a + * iob, including the 802.11 header, but with the PROTECTED + * bit set, the data encrypted, and whatever encryption + * headers/trailers are necessary added. + * + * This method should never free the passed I/O buffer. + * + * Return NULL if the packet could not be encrypted, due to + * memory limitations or otherwise. + */ + struct io_buffer * ( * encrypt ) ( struct net80211_crypto *crypto, + struct io_buffer *iob ); + + /** Decrypt a frame using the cryptosystem + * + * @v crypto 802.11 cryptosystem + * @v eiob Encrypted I/O buffer + * @ret iob Newly allocated I/O buffer with decrypted packet + * + * This method is called to decrypt a single frame. It is + * guaranteed that initialize() will have completed + * successfully before this method is called. + * + * Decryption follows the reverse of the pattern used for + * encryption: this method must copy the 802.11 header into + * the returned packet, decrypt the data stream, remove any + * encryption header or trailer, and clear the PROTECTED bit + * in the frame control header. + * + * This method should never free the passed I/O buffer. + * + * Return NULL if memory was not available for decryption, if + * a consistency or integrity check on the decrypted frame + * failed, or if the decrypted frame should not be processed + * by the network stack for any other reason. + */ + struct io_buffer * ( * decrypt ) ( struct net80211_crypto *crypto, + struct io_buffer *iob ); + + /** Length of private data requested to be allocated */ + int priv_len; + + /** Private data for the algorithm to store key and state info */ + void *priv; +}; + +#define NET80211_CRYPTOS __table ( struct net80211_crypto, "net80211_cryptos" ) +#define __net80211_crypto __table_entry ( NET80211_CRYPTOS, 01 ) + + +struct net80211_probe_ctx; +struct net80211_assoc_ctx; + + +/** Structure encapsulating the complete state of an 802.11 device + * + * An 802.11 device is always wrapped by a network device, and this + * network device is always pointed to by the @a netdev field. In + * general, operations should never be performed by 802.11 code using + * netdev functions directly. It is usually the case that the 802.11 + * layer might need to do some processing or bookkeeping on top of + * what the netdevice code will do. + */ +struct net80211_device +{ + /** The net_device that wraps us. */ + struct net_device *netdev; + + /** List of 802.11 devices. */ + struct list_head list; + + /** 802.11 device operations */ + struct net80211_device_operations *op; + + /** Driver private data */ + void *priv; + + /** Information about the hardware, provided to net80211_register() */ + struct net80211_hw_info *hw; + + /* ---------- Channel and rate fields ---------- */ + + /** A list of all possible channels we might use */ + struct net80211_channel channels[NET80211_MAX_CHANNELS]; + + /** The number of channels in the channels array */ + u8 nr_channels; + + /** The channel currently in use, as an index into the channels array */ + u8 channel; + + /** A list of all possible TX rates we might use + * + * Rates are in units of 100 kbps. + */ + u16 rates[NET80211_MAX_RATES]; + + /** The number of transmission rates in the rates array */ + u8 nr_rates; + + /** The rate currently in use, as an index into the rates array */ + u8 rate; + + /** The rate to use for RTS/CTS transmissions + * + * This is always the fastest basic rate that is not faster + * than the data rate in use. Also an index into the rates array. + */ + u8 rtscts_rate; + + /** Bitmask of basic rates + * + * If bit N is set in this value, with the LSB considered to + * be bit 0, then rate N in the rates array is a "basic" rate. + * + * We don't decide which rates are "basic"; our AP does, and + * we respect its wishes. We need to be able to identify basic + * rates in order to calculate the duration of a CTS packet + * used for 802.11 g/b interoperability. + */ + u32 basic_rates; + + /* ---------- Association fields ---------- */ + + /** The asynchronous association process. + * + * When an 802.11 netdev is opened, or when the user changes + * the SSID setting on an open 802.11 device, an + * autoassociation task is started by net80211_autoassocate() + * to associate with the new best network. The association is + * asynchronous, but no packets can be transmitted until it is + * complete. If it is successful, the wrapping net_device is + * set as "link up". If it fails, @c assoc_rc will be set with + * an error indication. + */ + struct process proc_assoc; + + /** Network with which we are associating + * + * This will be NULL when we are not actively in the process + * of associating with a network we have already successfully + * probed for. + */ + struct net80211_wlan *associating; + + /** Context for the association process + * + * This is a probe_ctx if the @c PROBED flag is not set in @c + * state, and an assoc_ctx otherwise. + */ + union { + struct net80211_probe_ctx *probe; + struct net80211_assoc_ctx *assoc; + } ctx; + + /** Security handshaker being used */ + struct net80211_handshaker *handshaker; + + /** State of our association to the network + * + * Since the association process happens asynchronously, it's + * necessary to have some channel of communication so the + * driver can say "I got an association reply and we're OK" or + * similar. This variable provides that link. It is a bitmask + * of any of NET80211_PROBED, NET80211_AUTHENTICATED, + * NET80211_ASSOCIATED, NET80211_CRYPTO_SYNCED to indicate how + * far along in associating we are; NET80211_WORKING if the + * association task is running; and NET80211_WAITING if a + * packet has been sent that we're waiting for a reply to. We + * can only be crypto-synced if we're associated, we can + * only be associated if we're authenticated, we can only be + * authenticated if we've probed. + * + * If an association process fails (that is, we receive a + * packet with an error indication), the error code is copied + * into bits 6-0 of this variable and bit 7 is set to specify + * what type of error code it is. An AP can provide either a + * "status code" (0-51 are defined) explaining why it refused + * an association immediately, or a "reason code" (0-45 are + * defined) explaining why it canceled an association after it + * had originally OK'ed it. Status and reason codes serve + * similar functions, but they use separate error message + * tables. A iPXE-formatted return status code (negative) is + * placed in @c assoc_rc. + * + * If the failure to associate is indicated by a status code, + * the NET80211_IS_REASON bit will be clear; if it is + * indicated by a reason code, the bit will be set. If we were + * successful, both zero status and zero reason mean success, + * so there is no ambiguity. + * + * To prevent association when opening the device, user code + * can set the NET80211_NO_ASSOC bit. The final bit in this + * variable, NET80211_AUTO_SSID, is used to remember whether + * we picked our SSID through automated probing as opposed to + * user specification; the distinction becomes relevant in the + * settings applicator. + */ + u16 state; + + /** Return status code associated with @c state */ + int assoc_rc; + + /** RSN or WPA information element to include with association + * + * If set to @c NULL, none will be included. It is expected + * that this will be set by the @a init function of a security + * handshaker if it is needed. + */ + union ieee80211_ie *rsn_ie; + + /* ---------- Parameters of currently associated network ---------- */ + + /** 802.11 cryptosystem for our current network + * + * For an open network, this will be set to NULL. + */ + struct net80211_crypto *crypto; + + /** 802.11 cryptosystem for multicast and broadcast frames + * + * If this is NULL, the cryptosystem used for receiving + * unicast frames will also be used for receiving multicast + * and broadcast frames. Transmitted multicast and broadcast + * frames are always sent unicast to the AP, who multicasts + * them on our behalf; thus they always use the unicast + * cryptosystem. + */ + struct net80211_crypto *gcrypto; + + /** MAC address of the access point most recently associated */ + u8 bssid[ETH_ALEN]; + + /** SSID of the access point we are or will be associated with + * + * Although the SSID field in 802.11 packets is generally not + * NUL-terminated, here and in net80211_wlan we add a NUL for + * convenience. + */ + char essid[IEEE80211_MAX_SSID_LEN+1]; + + /** Association ID given to us by the AP */ + u16 aid; + + /** TSFT value for last beacon received, microseconds */ + u64 last_beacon_timestamp; + + /** Time between AP sending beacons, microseconds */ + u32 tx_beacon_interval; + + /** Smoothed average time between beacons, microseconds */ + u32 rx_beacon_interval; + + /* ---------- Physical layer information ---------- */ + + /** Physical layer options + * + * These control the use of CTS protection, short preambles, + * and short-slot operation. + */ + int phy_flags; + + /** Signal strength of last received packet */ + int last_signal; + + /** Rate control state */ + struct rc80211_ctx *rctl; + + /* ---------- Packet handling state ---------- */ + + /** Fragment reassembly state */ + struct net80211_frag_cache frags[NET80211_NR_CONCURRENT_FRAGS]; + + /** The sequence number of the last packet we sent */ + u16 last_tx_seqnr; + + /** Packet duplication elimination state + * + * We are only required to handle immediate duplicates for + * each direct sender, and since we can only have one direct + * sender (the AP), we need only keep the sequence control + * field from the most recent packet we've received. Thus, + * this field stores the last sequence control field we've + * received for a packet from the AP. + */ + u16 last_rx_seq; + + /** RX management packet queue + * + * Sometimes we want to keep probe, beacon, and action packets + * that we receive, such as when we're scanning for networks. + * Ordinarily we drop them because they are sent at a large + * volume (ten beacons per second per AP, broadcast) and we + * have no need of them except when we're scanning. + * + * When keep_mgmt is TRUE, received probe, beacon, and action + * management packets will be stored in this queue. + */ + struct list_head mgmt_queue; + + /** RX management packet info queue + * + * We need to keep track of the signal strength for management + * packets we're keeping, because that provides the only way + * to distinguish between multiple APs for the same network. + * Since we can't extend io_buffer to store signal, this field + * heads a linked list of "RX packet info" structures that + * contain that signal strength field. Its entries always + * parallel the entries in mgmt_queue, because the two queues + * are always added to or removed from in parallel. + */ + struct list_head mgmt_info_queue; + + /** Whether to store management packets + * + * Received beacon, probe, and action packets will be added to + * mgmt_queue (and their signal strengths added to + * mgmt_info_queue) only when this variable is TRUE. It should + * be set by net80211_keep_mgmt() (which returns the old + * value) only when calling code is prepared to poll the + * management queue frequently, because packets will otherwise + * pile up and exhaust memory. + */ + int keep_mgmt; +}; + +/** Structure representing a probed network. + * + * This is returned from the net80211_probe_finish functions and + * passed to the low-level association functions. At least essid, + * bssid, channel, beacon, and security must be filled in if you want + * to build this structure manually. + */ +struct net80211_wlan +{ + /** The human-readable ESSID (network name) + * + * Although the 802.11 SSID field is generally not + * NUL-terminated, the iPXE code adds an extra NUL (and + * expects one in this structure) for convenience. + */ + char essid[IEEE80211_MAX_SSID_LEN+1]; + + /** MAC address of the strongest-signal access point for this ESSID */ + u8 bssid[ETH_ALEN]; + + /** Signal strength of beacon frame from that access point */ + int signal; + + /** The channel on which that access point communicates + * + * This is a raw channel number (net80211_channel::channel_nr), + * so that it will not be affected by reconfiguration of the + * device channels array. + */ + int channel; + + /** The complete beacon or probe-response frame received */ + struct io_buffer *beacon; + + /** Security handshaking method used on the network */ + enum net80211_security_proto handshaking; + + /** Cryptographic algorithm used on the network */ + enum net80211_crypto_alg crypto; + + /** Link to allow chaining multiple structures into a list to + be returned from net80211_probe_finish_all(). */ + struct list_head list; +}; + + +/** 802.11 encryption key setting */ +extern const struct setting +net80211_key_setting __setting ( SETTING_NETDEV_EXTRA, key ); + + +/** + * @defgroup net80211_probe 802.11 network location API + * @{ + */ +int net80211_prepare_probe ( struct net80211_device *dev, int band, + int active ); +struct net80211_probe_ctx * net80211_probe_start ( struct net80211_device *dev, + const char *essid, + int active ); +int net80211_probe_step ( struct net80211_probe_ctx *ctx ); +struct net80211_wlan * +net80211_probe_finish_best ( struct net80211_probe_ctx *ctx ); +struct list_head *net80211_probe_finish_all ( struct net80211_probe_ctx *ctx ); + +void net80211_free_wlan ( struct net80211_wlan *wlan ); +void net80211_free_wlanlist ( struct list_head *list ); +/** @} */ + + +/** + * @defgroup net80211_mgmt 802.11 network management API + * @{ + */ +struct net80211_device * net80211_get ( struct net_device *netdev ); +void net80211_autoassociate ( struct net80211_device *dev ); + +int net80211_change_channel ( struct net80211_device *dev, int channel ); +void net80211_set_rate_idx ( struct net80211_device *dev, int rate ); + +int net80211_keep_mgmt ( struct net80211_device *dev, int enable ); +struct io_buffer * net80211_mgmt_dequeue ( struct net80211_device *dev, + int *signal ); +int net80211_tx_mgmt ( struct net80211_device *dev, u16 fc, + u8 bssid[ETH_ALEN], struct io_buffer *iob ); +/** @} */ + + +/** + * @defgroup net80211_assoc 802.11 network association API + * @{ + */ +int net80211_prepare_assoc ( struct net80211_device *dev, + struct net80211_wlan *wlan ); +int net80211_send_auth ( struct net80211_device *dev, + struct net80211_wlan *wlan, int method ); +int net80211_send_assoc ( struct net80211_device *dev, + struct net80211_wlan *wlan ); +void net80211_deauthenticate ( struct net80211_device *dev, int rc ); +/** @} */ + + +/** + * @defgroup net80211_driver 802.11 driver interface API + * @{ + */ +struct net80211_device *net80211_alloc ( size_t priv_size ); +int net80211_register ( struct net80211_device *dev, + struct net80211_device_operations *ops, + struct net80211_hw_info *hw ); +u16 net80211_duration ( struct net80211_device *dev, int bytes, u16 rate ); +void net80211_rx ( struct net80211_device *dev, struct io_buffer *iob, + int signal, u16 rate ); +void net80211_rx_err ( struct net80211_device *dev, + struct io_buffer *iob, int rc ); +void net80211_tx_complete ( struct net80211_device *dev, + struct io_buffer *iob, int retries, int rc ); +void net80211_unregister ( struct net80211_device *dev ); +void net80211_free ( struct net80211_device *dev ); +/** @} */ + +/** + * Calculate duration field for a CTS control frame + * + * @v dev 802.11 device + * @v size Size of the packet being cleared to send + * + * A CTS control frame's duration field captures the frame being + * protected and its 10-byte ACK. + */ +static inline u16 net80211_cts_duration ( struct net80211_device *dev, + int size ) +{ + return ( net80211_duration ( dev, 10, + dev->rates[dev->rtscts_rate] ) + + net80211_duration ( dev, size, dev->rates[dev->rate] ) ); +} + +#endif diff --git a/qemu/roms/ipxe/src/include/ipxe/net80211_err.h b/qemu/roms/ipxe/src/include/ipxe/net80211_err.h new file mode 100644 index 000000000..7df3d0d85 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/net80211_err.h @@ -0,0 +1,635 @@ +#ifndef _IPXE_NET80211_ERR_H +#define _IPXE_NET80211_ERR_H + +#include <errno.h> +#include <ipxe/ieee80211.h> + +/* + * The iPXE 802.11 MAC layer. + * + * Copyright (c) 2009 Joshua Oreman <oremanj@rwcr.net>. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** @file + * + * The iPXE 802.11 MAC layer errors. + */ + +/* Disambiguate the EINVAL's a bit */ +#define EINVAL_PKT_TOO_SHORT __einfo_error ( EINFO_EINVAL_PKT_TOO_SHORT ) +#define EINFO_EINVAL_PKT_TOO_SHORT __einfo_uniqify \ + ( EINFO_EINVAL, 0x01, "Packet too short" ) +#define EINVAL_PKT_VERSION __einfo_error ( EINFO_EINVAL_PKT_VERSION ) +#define EINFO_EINVAL_PKT_VERSION __einfo_uniqify \ + ( EINFO_EINVAL, 0x02, "Packet 802.11 version not supported" ) +#define EINVAL_PKT_NOT_DATA __einfo_error ( EINFO_EINVAL_PKT_NOT_DATA ) +#define EINFO_EINVAL_PKT_NOT_DATA __einfo_uniqify \ + ( EINFO_EINVAL, 0x03, "Packet not a data packet" ) +#define EINVAL_PKT_NOT_FROMDS __einfo_error ( EINFO_EINVAL_PKT_NOT_FROMDS ) +#define EINFO_EINVAL_PKT_NOT_FROMDS __einfo_uniqify \ + ( EINFO_EINVAL, 0x04, "Packet not from an Access Point" ) +#define EINVAL_PKT_LLC_HEADER __einfo_error ( EINFO_EINVAL_PKT_LLC_HEADER ) +#define EINFO_EINVAL_PKT_LLC_HEADER __einfo_uniqify \ + ( EINFO_EINVAL, 0x05, "Packet has invalid LLC header" ) +#define EINVAL_CRYPTO_REQUEST __einfo_error ( EINFO_EINVAL_CRYPTO_REQUEST ) +#define EINFO_EINVAL_CRYPTO_REQUEST __einfo_uniqify \ + ( EINFO_EINVAL, 0x06, "Packet decryption error" ) +#define EINVAL_ACTIVE_SCAN __einfo_error ( EINFO_EINVAL_ACTIVE_SCAN ) +#define EINFO_EINVAL_ACTIVE_SCAN __einfo_uniqify \ + ( EINFO_EINVAL, 0x07, "Invalid active scan requested" ) + +/* + * 802.11 error codes: The AP can give us a status code explaining why + * authentication failed, or a reason code explaining why we were + * deauthenticated/disassociated. These codes range from 0-63 (the + * field is 16 bits wide, but only up to 45 or so are defined yet; we + * allow up to 63 for extensibility). This is encoded into an error + * code as such: + * + * status & 0x1f goes here --vv-- + * Status code 0-31: ECONNREFUSED | EUNIQ_(status & 0x1f) (0e1a6038) + * Status code 32-63: EHOSTUNREACH | EUNIQ_(status & 0x1f) (171a6011) + * Reason code 0-31: ECONNRESET | EUNIQ_(reason & 0x1f) (0f1a6039) + * Reason code 32-63: ENETRESET | EUNIQ_(reason & 0x1f) (271a6001) + * + * The POSIX error codes more or less convey the appropriate message + * (status codes occur when we can't associate at all, reason codes + * when we lose association unexpectedly) and let us extract the + * complete 802.11 error code from the rc value. + * + * The error messages follow the 802.11 standard as much as is + * feasible, but most have been abbreviated to fit the 50-character + * limit imposed by strerror(). + */ + +/* 802.11 status codes (IEEE Std 802.11-2007, Table 7-23) */ + +#define ECONNREFUSED_FAILURE __einfo_error \ + ( EINFO_ECONNREFUSED_FAILURE ) +#define EINFO_ECONNREFUSED_FAILURE __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_FAILURE & 0x1f ), \ + "Unspecified failure" ) + +#define ECONNREFUSED_CAPAB_UNSUPP __einfo_error \ + ( EINFO_ECONNREFUSED_CAPAB_UNSUPP ) +#define EINFO_ECONNREFUSED_CAPAB_UNSUPP __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_CAPAB_UNSUPP & 0x1f ), \ + "Cannot support all requested capabilities" ) + +#define ECONNREFUSED_REASSOC_INVALID __einfo_error \ + ( EINFO_ECONNREFUSED_REASSOC_INVALID ) +#define EINFO_ECONNREFUSED_REASSOC_INVALID __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_REASSOC_INVALID & 0x1f ), \ + "Reassociation denied due to lack of association" ) + +#define ECONNREFUSED_ASSOC_DENIED __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_DENIED ) +#define EINFO_ECONNREFUSED_ASSOC_DENIED __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_DENIED & 0x1f ), \ + "Association denied for another reason" ) + +#define ECONNREFUSED_AUTH_ALGO_UNSUPP __einfo_error \ + ( EINFO_ECONNREFUSED_AUTH_ALGO_UNSUPP ) +#define EINFO_ECONNREFUSED_AUTH_ALGO_UNSUPP __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_AUTH_ALGO_UNSUPP & 0x1f ), \ + "Authentication algorithm unsupported" ) + +#define ECONNREFUSED_AUTH_SEQ_INVALID __einfo_error \ + ( EINFO_ECONNREFUSED_AUTH_SEQ_INVALID ) +#define EINFO_ECONNREFUSED_AUTH_SEQ_INVALID __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_AUTH_SEQ_INVALID & 0x1f ), \ + "Authentication sequence number unexpected" ) + +#define ECONNREFUSED_AUTH_CHALL_INVALID __einfo_error \ + ( EINFO_ECONNREFUSED_AUTH_CHALL_INVALID ) +#define EINFO_ECONNREFUSED_AUTH_CHALL_INVALID __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_AUTH_CHALL_INVALID & 0x1f ), \ + "Authentication rejected due to challenge failure" ) + +#define ECONNREFUSED_AUTH_TIMEOUT __einfo_error \ + ( EINFO_ECONNREFUSED_AUTH_TIMEOUT ) +#define EINFO_ECONNREFUSED_AUTH_TIMEOUT __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_AUTH_TIMEOUT & 0x1f ), \ + "Authentication rejected due to timeout" ) + +#define ECONNREFUSED_ASSOC_NO_ROOM __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NO_ROOM ) +#define EINFO_ECONNREFUSED_ASSOC_NO_ROOM __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NO_ROOM & 0x1f ), \ + "Association denied because AP is out of resources" ) + +#define ECONNREFUSED_ASSOC_NEED_RATE __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NEED_RATE ) +#define EINFO_ECONNREFUSED_ASSOC_NEED_RATE __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NEED_RATE & 0x1f ), \ + "Association denied; basic rate support required" ) + +#define ECONNREFUSED_ASSOC_NEED_SHORT_PMBL __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NEED_SHORT_PMBL ) +#define EINFO_ECONNREFUSED_ASSOC_NEED_SHORT_PMBL __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NEED_SHORT_PMBL & 0x1f ), \ + "Association denied; short preamble support req'd" ) + +#define ECONNREFUSED_ASSOC_NEED_PBCC __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NEED_PBCC ) +#define EINFO_ECONNREFUSED_ASSOC_NEED_PBCC __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NEED_PBCC & 0x1f ), \ + "Association denied; PBCC modulation support req'd" ) + +#define ECONNREFUSED_ASSOC_NEED_CHAN_AGILITY __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NEED_CHAN_AGILITY ) +#define EINFO_ECONNREFUSED_ASSOC_NEED_CHAN_AGILITY __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NEED_CHAN_AGILITY & 0x1f ), \ + "Association denied; Channel Agility support req'd" ) + +#define ECONNREFUSED_ASSOC_NEED_SPECTRUM_MGMT __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NEED_SPECTRUM_MGMT ) +#define EINFO_ECONNREFUSED_ASSOC_NEED_SPECTRUM_MGMT __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NEED_SPECTRUM_MGMT & 0x1f ), \ + "Association denied; Spectrum Management required" ) + +#define ECONNREFUSED_ASSOC_BAD_POWER __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_BAD_POWER ) +#define EINFO_ECONNREFUSED_ASSOC_BAD_POWER __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_BAD_POWER & 0x1f ), \ + "Association denied; Power Capability unacceptable" ) + +#define ECONNREFUSED_ASSOC_BAD_CHANNELS __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_BAD_CHANNELS ) +#define EINFO_ECONNREFUSED_ASSOC_BAD_CHANNELS __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_BAD_CHANNELS & 0x1f ), \ + "Association denied; Supported Channels unacceptable" ) + +#define ECONNREFUSED_ASSOC_NEED_SHORT_SLOT __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NEED_SHORT_SLOT ) +#define EINFO_ECONNREFUSED_ASSOC_NEED_SHORT_SLOT __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NEED_SHORT_SLOT & 0x1f ), \ + "Association denied; Short Slot Tume support req'd" ) + +#define ECONNREFUSED_ASSOC_NEED_DSSS_OFDM __einfo_error \ + ( EINFO_ECONNREFUSED_ASSOC_NEED_DSSS_OFDM ) +#define EINFO_ECONNREFUSED_ASSOC_NEED_DSSS_OFDM __einfo_uniqify \ + ( EINFO_ECONNREFUSED, \ + ( IEEE80211_STATUS_ASSOC_NEED_DSSS_OFDM & 0x1f ), \ + "Association denied; DSSS-OFDM support required" ) + +#define EHOSTUNREACH_QOS_FAILURE __einfo_error \ + ( EINFO_EHOSTUNREACH_QOS_FAILURE ) +#define EINFO_EHOSTUNREACH_QOS_FAILURE __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_QOS_FAILURE & 0x1f ), \ + "Unspecified, QoS-related failure" ) + +#define EHOSTUNREACH_QOS_NO_ROOM __einfo_error \ + ( EINFO_EHOSTUNREACH_QOS_NO_ROOM ) +#define EINFO_EHOSTUNREACH_QOS_NO_ROOM __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_QOS_NO_ROOM & 0x1f ), \ + "Association denied; QoS AP out of QoS resources" ) + +#define EHOSTUNREACH_LINK_IS_HORRIBLE __einfo_error \ + ( EINFO_EHOSTUNREACH_LINK_IS_HORRIBLE ) +#define EINFO_EHOSTUNREACH_LINK_IS_HORRIBLE __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_LINK_IS_HORRIBLE & 0x1f ), \ + "Association denied due to excessively poor link" ) + +#define EHOSTUNREACH_ASSOC_NEED_QOS __einfo_error \ + ( EINFO_EHOSTUNREACH_ASSOC_NEED_QOS ) +#define EINFO_EHOSTUNREACH_ASSOC_NEED_QOS __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_ASSOC_NEED_QOS & 0x1f ), \ + "Association denied; QoS support required" ) + +#define EHOSTUNREACH_REQUEST_DECLINED __einfo_error \ + ( EINFO_EHOSTUNREACH_REQUEST_DECLINED ) +#define EINFO_EHOSTUNREACH_REQUEST_DECLINED __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_REQUEST_DECLINED & 0x1f ), \ + "The request has been declined" ) + +#define EHOSTUNREACH_REQUEST_INVALID __einfo_error \ + ( EINFO_EHOSTUNREACH_REQUEST_INVALID ) +#define EINFO_EHOSTUNREACH_REQUEST_INVALID __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_REQUEST_INVALID & 0x1f ), \ + "Request unsuccessful due to invalid parameters" ) + +#define EHOSTUNREACH_TS_NOT_CREATED_AGAIN __einfo_error \ + ( EINFO_EHOSTUNREACH_TS_NOT_CREATED_AGAIN ) +#define EINFO_EHOSTUNREACH_TS_NOT_CREATED_AGAIN __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_TS_NOT_CREATED_AGAIN & 0x1f ), \ + "TS not created due to bad specification" ) + +#define EHOSTUNREACH_INVALID_IE __einfo_error \ + ( EINFO_EHOSTUNREACH_INVALID_IE ) +#define EINFO_EHOSTUNREACH_INVALID_IE __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_INVALID_IE & 0x1f ), \ + "Invalid information element" ) + +#define EHOSTUNREACH_GROUP_CIPHER_INVALID __einfo_error \ + ( EINFO_EHOSTUNREACH_GROUP_CIPHER_INVALID ) +#define EINFO_EHOSTUNREACH_GROUP_CIPHER_INVALID __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_GROUP_CIPHER_INVALID & 0x1f ), \ + "Invalid group cipher" ) + +#define EHOSTUNREACH_PAIR_CIPHER_INVALID __einfo_error \ + ( EINFO_EHOSTUNREACH_PAIR_CIPHER_INVALID ) +#define EINFO_EHOSTUNREACH_PAIR_CIPHER_INVALID __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_PAIR_CIPHER_INVALID & 0x1f ), \ + "Invalid pairwise cipher" ) + +#define EHOSTUNREACH_AKMP_INVALID __einfo_error \ + ( EINFO_EHOSTUNREACH_AKMP_INVALID ) +#define EINFO_EHOSTUNREACH_AKMP_INVALID __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_AKMP_INVALID & 0x1f ), \ + "Invalid AKMP" ) + +#define EHOSTUNREACH_RSN_VERSION_UNSUPP __einfo_error \ + ( EINFO_EHOSTUNREACH_RSN_VERSION_UNSUPP ) +#define EINFO_EHOSTUNREACH_RSN_VERSION_UNSUPP __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_RSN_VERSION_UNSUPP & 0x1f ), \ + "Unsupported RSN information element version" ) + +#define EHOSTUNREACH_RSN_CAPAB_INVALID __einfo_error \ + ( EINFO_EHOSTUNREACH_RSN_CAPAB_INVALID ) +#define EINFO_EHOSTUNREACH_RSN_CAPAB_INVALID __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_RSN_CAPAB_INVALID & 0x1f ), \ + "Invalid RSN information element capabilities" ) + +#define EHOSTUNREACH_CIPHER_REJECTED __einfo_error \ + ( EINFO_EHOSTUNREACH_CIPHER_REJECTED ) +#define EINFO_EHOSTUNREACH_CIPHER_REJECTED __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_CIPHER_REJECTED & 0x1f ), \ + "Cipher suite rejected because of security policy" ) + +#define EHOSTUNREACH_TS_NOT_CREATED_WAIT __einfo_error \ + ( EINFO_EHOSTUNREACH_TS_NOT_CREATED_WAIT ) +#define EINFO_EHOSTUNREACH_TS_NOT_CREATED_WAIT __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_TS_NOT_CREATED_WAIT & 0x1f ), \ + "TS not created due to insufficient delay" ) + +#define EHOSTUNREACH_DIRECT_LINK_FORBIDDEN __einfo_error \ + ( EINFO_EHOSTUNREACH_DIRECT_LINK_FORBIDDEN ) +#define EINFO_EHOSTUNREACH_DIRECT_LINK_FORBIDDEN __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_DIRECT_LINK_FORBIDDEN & 0x1f ), \ + "Direct link is not allowed in the BSS by policy" ) + +#define EHOSTUNREACH_DEST_NOT_PRESENT __einfo_error \ + ( EINFO_EHOSTUNREACH_DEST_NOT_PRESENT ) +#define EINFO_EHOSTUNREACH_DEST_NOT_PRESENT __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_DEST_NOT_PRESENT & 0x1f ), \ + "The Destination STA is not present within the BSS" ) + +#define EHOSTUNREACH_DEST_NOT_QOS __einfo_error \ + ( EINFO_EHOSTUNREACH_DEST_NOT_QOS ) +#define EINFO_EHOSTUNREACH_DEST_NOT_QOS __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_DEST_NOT_QOS & 0x1f ), \ + "The Destination STA is not a QoS STA" ) + +#define EHOSTUNREACH_ASSOC_LISTEN_TOO_HIGH __einfo_error \ + ( EINFO_EHOSTUNREACH_ASSOC_LISTEN_TOO_HIGH ) +#define EINFO_EHOSTUNREACH_ASSOC_LISTEN_TOO_HIGH __einfo_uniqify \ + ( EINFO_EHOSTUNREACH, \ + ( IEEE80211_STATUS_ASSOC_LISTEN_TOO_HIGH & 0x1f ), \ + "Association denied; Listen Interval is too large" ) + +/* 802.11 reason codes (IEEE Std 802.11-2007, Table 7-22) */ + +#define ECONNRESET_UNSPECIFIED __einfo_error \ + ( EINFO_ECONNRESET_UNSPECIFIED ) +#define EINFO_ECONNRESET_UNSPECIFIED __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_UNSPECIFIED & 0x1f ), \ + "Unspecified reason" ) + +#define ECONNRESET_AUTH_NO_LONGER_VALID __einfo_error \ + ( EINFO_ECONNRESET_AUTH_NO_LONGER_VALID ) +#define EINFO_ECONNRESET_AUTH_NO_LONGER_VALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_AUTH_NO_LONGER_VALID & 0x1f ), \ + "Previous authentication no longer valid" ) + +#define ECONNRESET_LEAVING __einfo_error \ + ( EINFO_ECONNRESET_LEAVING ) +#define EINFO_ECONNRESET_LEAVING __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_LEAVING & 0x1f ), \ + "Deauthenticated due to leaving network" ) + +#define ECONNRESET_INACTIVITY __einfo_error \ + ( EINFO_ECONNRESET_INACTIVITY ) +#define EINFO_ECONNRESET_INACTIVITY __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_INACTIVITY & 0x1f ), \ + "Disassociated due to inactivity" ) + +#define ECONNRESET_OUT_OF_RESOURCES __einfo_error \ + ( EINFO_ECONNRESET_OUT_OF_RESOURCES ) +#define EINFO_ECONNRESET_OUT_OF_RESOURCES __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_OUT_OF_RESOURCES & 0x1f ), \ + "Disassociated because AP is out of resources" ) + +#define ECONNRESET_NEED_AUTH __einfo_error \ + ( EINFO_ECONNRESET_NEED_AUTH ) +#define EINFO_ECONNRESET_NEED_AUTH __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_NEED_AUTH & 0x1f ), \ + "Class 2 frame received from nonauthenticated STA" ) + +#define ECONNRESET_NEED_ASSOC __einfo_error \ + ( EINFO_ECONNRESET_NEED_ASSOC ) +#define EINFO_ECONNRESET_NEED_ASSOC __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_NEED_ASSOC & 0x1f ), \ + "Class 3 frame received from nonassociated STA" ) + +#define ECONNRESET_LEAVING_TO_ROAM __einfo_error \ + ( EINFO_ECONNRESET_LEAVING_TO_ROAM ) +#define EINFO_ECONNRESET_LEAVING_TO_ROAM __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_LEAVING_TO_ROAM & 0x1f ), \ + "Disassociated due to roaming" ) + +#define ECONNRESET_REASSOC_INVALID __einfo_error \ + ( EINFO_ECONNRESET_REASSOC_INVALID ) +#define EINFO_ECONNRESET_REASSOC_INVALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_REASSOC_INVALID & 0x1f ), \ + "STA requesting (re)association not authenticated" ) + +#define ECONNRESET_BAD_POWER __einfo_error \ + ( EINFO_ECONNRESET_BAD_POWER ) +#define EINFO_ECONNRESET_BAD_POWER __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_BAD_POWER & 0x1f ), \ + "Disassociated; Power Capability unacceptable" ) + +#define ECONNRESET_BAD_CHANNELS __einfo_error \ + ( EINFO_ECONNRESET_BAD_CHANNELS ) +#define EINFO_ECONNRESET_BAD_CHANNELS __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_BAD_CHANNELS & 0x1f ), \ + "Disassociated; Supported Channels unacceptable" ) + +#define ECONNRESET_INVALID_IE __einfo_error \ + ( EINFO_ECONNRESET_INVALID_IE ) +#define EINFO_ECONNRESET_INVALID_IE __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_INVALID_IE & 0x1f ), \ + "Invalid information element" ) + +#define ECONNRESET_MIC_FAILURE __einfo_error \ + ( EINFO_ECONNRESET_MIC_FAILURE ) +#define EINFO_ECONNRESET_MIC_FAILURE __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_MIC_FAILURE & 0x1f ), \ + "Message integrity code (MIC) failure" ) + +#define ECONNRESET_4WAY_TIMEOUT __einfo_error \ + ( EINFO_ECONNRESET_4WAY_TIMEOUT ) +#define EINFO_ECONNRESET_4WAY_TIMEOUT __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_4WAY_TIMEOUT & 0x1f ), \ + "4-Way Handshake timeout" ) + +#define ECONNRESET_GROUPKEY_TIMEOUT __einfo_error \ + ( EINFO_ECONNRESET_GROUPKEY_TIMEOUT ) +#define EINFO_ECONNRESET_GROUPKEY_TIMEOUT __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_GROUPKEY_TIMEOUT & 0x1f ), \ + "Group Key Handshake timeout" ) + +#define ECONNRESET_4WAY_INVALID __einfo_error \ + ( EINFO_ECONNRESET_4WAY_INVALID ) +#define EINFO_ECONNRESET_4WAY_INVALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_4WAY_INVALID & 0x1f ), \ + "4-Way Handshake information element changed unduly" ) + +#define ECONNRESET_GROUP_CIPHER_INVALID __einfo_error \ + ( EINFO_ECONNRESET_GROUP_CIPHER_INVALID ) +#define EINFO_ECONNRESET_GROUP_CIPHER_INVALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_GROUP_CIPHER_INVALID & 0x1f ), \ + "Invalid group cipher" ) + +#define ECONNRESET_PAIR_CIPHER_INVALID __einfo_error \ + ( EINFO_ECONNRESET_PAIR_CIPHER_INVALID ) +#define EINFO_ECONNRESET_PAIR_CIPHER_INVALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_PAIR_CIPHER_INVALID & 0x1f ), \ + "Invalid pairwise cipher" ) + +#define ECONNRESET_AKMP_INVALID __einfo_error \ + ( EINFO_ECONNRESET_AKMP_INVALID ) +#define EINFO_ECONNRESET_AKMP_INVALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_AKMP_INVALID & 0x1f ), \ + "Invalid AKMP" ) + +#define ECONNRESET_RSN_VERSION_INVALID __einfo_error \ + ( EINFO_ECONNRESET_RSN_VERSION_INVALID ) +#define EINFO_ECONNRESET_RSN_VERSION_INVALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_RSN_VERSION_INVALID & 0x1f ), \ + "Unsupported RSN information element version" ) + +#define ECONNRESET_RSN_CAPAB_INVALID __einfo_error \ + ( EINFO_ECONNRESET_RSN_CAPAB_INVALID ) +#define EINFO_ECONNRESET_RSN_CAPAB_INVALID __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_RSN_CAPAB_INVALID & 0x1f ), \ + "Invalid RSN information element capabilities" ) + +#define ECONNRESET_8021X_FAILURE __einfo_error \ + ( EINFO_ECONNRESET_8021X_FAILURE ) +#define EINFO_ECONNRESET_8021X_FAILURE __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_8021X_FAILURE & 0x1f ), \ + "IEEE 802.1X authentication failed" ) + +#define ECONNRESET_CIPHER_REJECTED __einfo_error \ + ( EINFO_ECONNRESET_CIPHER_REJECTED ) +#define EINFO_ECONNRESET_CIPHER_REJECTED __einfo_uniqify \ + ( EINFO_ECONNRESET, \ + ( IEEE80211_REASON_CIPHER_REJECTED & 0x1f ), \ + "Cipher suite rejected because of security policy" ) + +#define ENETRESET_QOS_UNSPECIFIED __einfo_error \ + ( EINFO_ENETRESET_QOS_UNSPECIFIED ) +#define EINFO_ENETRESET_QOS_UNSPECIFIED __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_QOS_UNSPECIFIED & 0x1f ), \ + "Disassociated for unspecified, QoS-related reason" ) + +#define ENETRESET_QOS_OUT_OF_RESOURCES __einfo_error \ + ( EINFO_ENETRESET_QOS_OUT_OF_RESOURCES ) +#define EINFO_ENETRESET_QOS_OUT_OF_RESOURCES __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_QOS_OUT_OF_RESOURCES & 0x1f ), \ + "Disassociated; QoS AP is out of QoS resources" ) + +#define ENETRESET_LINK_IS_HORRIBLE __einfo_error \ + ( EINFO_ENETRESET_LINK_IS_HORRIBLE ) +#define EINFO_ENETRESET_LINK_IS_HORRIBLE __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_LINK_IS_HORRIBLE & 0x1f ), \ + "Disassociated due to excessively poor link" ) + +#define ENETRESET_INVALID_TXOP __einfo_error \ + ( EINFO_ENETRESET_INVALID_TXOP ) +#define EINFO_ENETRESET_INVALID_TXOP __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_INVALID_TXOP & 0x1f ), \ + "Disassociated due to TXOP limit violation" ) + +#define ENETRESET_REQUESTED_LEAVING __einfo_error \ + ( EINFO_ENETRESET_REQUESTED_LEAVING ) +#define EINFO_ENETRESET_REQUESTED_LEAVING __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_REQUESTED_LEAVING & 0x1f ), \ + "Requested; STA is leaving the BSS (or resetting)" ) + +#define ENETRESET_REQUESTED_NO_USE __einfo_error \ + ( EINFO_ENETRESET_REQUESTED_NO_USE ) +#define EINFO_ENETRESET_REQUESTED_NO_USE __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_REQUESTED_NO_USE & 0x1f ), \ + "Requested; does not want to use the mechanism" ) + +#define ENETRESET_REQUESTED_NEED_SETUP __einfo_error \ + ( EINFO_ENETRESET_REQUESTED_NEED_SETUP ) +#define EINFO_ENETRESET_REQUESTED_NEED_SETUP __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_REQUESTED_NEED_SETUP & 0x1f ), \ + "Requested; setup is required" ) + +#define ENETRESET_REQUESTED_TIMEOUT __einfo_error \ + ( EINFO_ENETRESET_REQUESTED_TIMEOUT ) +#define EINFO_ENETRESET_REQUESTED_TIMEOUT __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_REQUESTED_TIMEOUT & 0x1f ), \ + "Requested from peer STA due to timeout" ) + +#define ENETRESET_CIPHER_UNSUPPORTED __einfo_error \ + ( EINFO_ENETRESET_CIPHER_UNSUPPORTED ) +#define EINFO_ENETRESET_CIPHER_UNSUPPORTED __einfo_uniqify \ + ( EINFO_ENETRESET, \ + ( IEEE80211_REASON_CIPHER_UNSUPPORTED & 0x1f ), \ + "Peer STA does not support requested cipher suite" ) + +/** Make return status code from 802.11 status code */ +#define E80211_STATUS( stat ) \ + ( ( (stat) & 0x20 ) ? \ + EUNIQ ( EINFO_EHOSTUNREACH, ( (stat) & 0x1f ), \ + EHOSTUNREACH_QOS_FAILURE, \ + EHOSTUNREACH_QOS_NO_ROOM, \ + EHOSTUNREACH_LINK_IS_HORRIBLE, \ + EHOSTUNREACH_ASSOC_NEED_QOS, \ + EHOSTUNREACH_REQUEST_DECLINED, \ + EHOSTUNREACH_REQUEST_INVALID, \ + EHOSTUNREACH_TS_NOT_CREATED_AGAIN, \ + EHOSTUNREACH_INVALID_IE, \ + EHOSTUNREACH_GROUP_CIPHER_INVALID, \ + EHOSTUNREACH_PAIR_CIPHER_INVALID, \ + EHOSTUNREACH_AKMP_INVALID, \ + EHOSTUNREACH_RSN_VERSION_UNSUPP, \ + EHOSTUNREACH_RSN_CAPAB_INVALID, \ + EHOSTUNREACH_CIPHER_REJECTED, \ + EHOSTUNREACH_TS_NOT_CREATED_WAIT, \ + EHOSTUNREACH_DIRECT_LINK_FORBIDDEN, \ + EHOSTUNREACH_DEST_NOT_PRESENT, \ + EHOSTUNREACH_DEST_NOT_QOS, \ + EHOSTUNREACH_ASSOC_LISTEN_TOO_HIGH ) : \ + EUNIQ ( EINFO_ECONNREFUSED, ( (stat) & 0x1f ), \ + ECONNREFUSED_FAILURE, \ + ECONNREFUSED_CAPAB_UNSUPP, \ + ECONNREFUSED_REASSOC_INVALID, \ + ECONNREFUSED_ASSOC_DENIED, \ + ECONNREFUSED_AUTH_ALGO_UNSUPP, \ + ECONNREFUSED_AUTH_SEQ_INVALID, \ + ECONNREFUSED_AUTH_CHALL_INVALID, \ + ECONNREFUSED_AUTH_TIMEOUT, \ + ECONNREFUSED_ASSOC_NO_ROOM, \ + ECONNREFUSED_ASSOC_NEED_RATE, \ + ECONNREFUSED_ASSOC_NEED_SHORT_PMBL, \ + ECONNREFUSED_ASSOC_NEED_PBCC, \ + ECONNREFUSED_ASSOC_NEED_CHAN_AGILITY, \ + ECONNREFUSED_ASSOC_NEED_SPECTRUM_MGMT, \ + ECONNREFUSED_ASSOC_BAD_POWER, \ + ECONNREFUSED_ASSOC_BAD_CHANNELS, \ + ECONNREFUSED_ASSOC_NEED_SHORT_SLOT, \ + ECONNREFUSED_ASSOC_NEED_DSSS_OFDM ) ) + +/** Make return status code from 802.11 reason code */ +#define E80211_REASON( reas ) \ + ( ( (reas) & 0x20 ) ? \ + EUNIQ ( EINFO_ENETRESET, ( (reas) & 0x1f ), \ + ENETRESET_QOS_UNSPECIFIED, \ + ENETRESET_QOS_OUT_OF_RESOURCES, \ + ENETRESET_LINK_IS_HORRIBLE, \ + ENETRESET_INVALID_TXOP, \ + ENETRESET_REQUESTED_LEAVING, \ + ENETRESET_REQUESTED_NO_USE, \ + ENETRESET_REQUESTED_NEED_SETUP, \ + ENETRESET_REQUESTED_TIMEOUT, \ + ENETRESET_CIPHER_UNSUPPORTED ) : \ + EUNIQ ( EINFO_ECONNRESET, ( (reas) & 0x1f ), \ + ECONNRESET_UNSPECIFIED, \ + ECONNRESET_AUTH_NO_LONGER_VALID, \ + ECONNRESET_LEAVING, \ + ECONNRESET_INACTIVITY, \ + ECONNRESET_OUT_OF_RESOURCES, \ + ECONNRESET_NEED_AUTH, \ + ECONNRESET_NEED_ASSOC, \ + ECONNRESET_LEAVING_TO_ROAM, \ + ECONNRESET_REASSOC_INVALID, \ + ECONNRESET_BAD_POWER, \ + ECONNRESET_BAD_CHANNELS, \ + ECONNRESET_INVALID_IE, \ + ECONNRESET_MIC_FAILURE, \ + ECONNRESET_4WAY_TIMEOUT, \ + ECONNRESET_GROUPKEY_TIMEOUT, \ + ECONNRESET_4WAY_INVALID, \ + ECONNRESET_GROUP_CIPHER_INVALID, \ + ECONNRESET_PAIR_CIPHER_INVALID, \ + ECONNRESET_AKMP_INVALID, \ + ECONNRESET_RSN_VERSION_INVALID, \ + ECONNRESET_RSN_CAPAB_INVALID, \ + ECONNRESET_8021X_FAILURE, \ + ECONNRESET_CIPHER_REJECTED ) ) + +#endif /* _IPXE_NET80211_ERR_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/netdevice.h b/qemu/roms/ipxe/src/include/ipxe/netdevice.h new file mode 100644 index 000000000..95ad1cf1b --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/netdevice.h @@ -0,0 +1,740 @@ +#ifndef _IPXE_NETDEVICE_H +#define _IPXE_NETDEVICE_H + +/** @file + * + * Network device management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/list.h> +#include <ipxe/tables.h> +#include <ipxe/refcnt.h> +#include <ipxe/settings.h> +#include <ipxe/interface.h> + +struct io_buffer; +struct net_device; +struct net_protocol; +struct ll_protocol; +struct device; + +/** Maximum length of a hardware address + * + * The longest currently-supported link-layer address is for IPoIB. + */ +#define MAX_HW_ADDR_LEN 8 + +/** Maximum length of a link-layer address + * + * The longest currently-supported link-layer address is for IPoIB. + */ +#define MAX_LL_ADDR_LEN 20 + +/** Maximum length of a link-layer header + * + * The longest currently-supported link-layer header is for 802.11: a + * 24-byte frame header plus an 8-byte 802.3 LLC/SNAP header, plus a + * possible 4-byte VLAN header. (The IPoIB link-layer pseudo-header + * doesn't actually include link-layer addresses; see ipoib.c for + * details.) + */ +#define MAX_LL_HEADER_LEN 36 + +/** Maximum length of a network-layer address */ +#define MAX_NET_ADDR_LEN 16 + +/** Maximum length of a network-layer header + * + * The longest currently-supported network-layer header is for IPv6 at + * 40 bytes. + */ +#define MAX_NET_HEADER_LEN 40 + +/** Maximum combined length of a link-layer and network-layer header */ +#define MAX_LL_NET_HEADER_LEN ( MAX_LL_HEADER_LEN + MAX_NET_HEADER_LEN ) + +/** + * A network-layer protocol + * + */ +struct net_protocol { + /** Protocol name */ + const char *name; + /** + * Process received packet + * + * @v iobuf I/O buffer + * @v netdev Network device + * @v ll_dest Link-layer destination address + * @v ll_source Link-layer source address + * @v flags Packet flags + * @ret rc Return status code + * + * This method takes ownership of the I/O buffer. + */ + int ( * rx ) ( struct io_buffer *iobuf, struct net_device *netdev, + const void *ll_dest, const void *ll_source, + unsigned int flags ); + /** + * Transcribe network-layer address + * + * @v net_addr Network-layer address + * @ret string Human-readable transcription of address + * + * This method should convert the network-layer address into a + * human-readable format (e.g. dotted quad notation for IPv4). + * + * The buffer used to hold the transcription is statically + * allocated. + */ + const char * ( *ntoa ) ( const void * net_addr ); + /** Network-layer protocol + * + * This is an ETH_P_XXX constant, in network-byte order + */ + uint16_t net_proto; + /** Network-layer address length */ + uint8_t net_addr_len; +}; + +/** Packet is a multicast (including broadcast) packet */ +#define LL_MULTICAST 0x0001 + +/** Packet is a broadcast packet */ +#define LL_BROADCAST 0x0002 + +/** + * A link-layer protocol + * + */ +struct ll_protocol { + /** Protocol name */ + const char *name; + /** + * Add link-layer header + * + * @v netdev Network device + * @v iobuf I/O buffer + * @v ll_dest Link-layer destination address + * @v ll_source Source link-layer address + * @v net_proto Network-layer protocol, in network-byte order + * @ret rc Return status code + */ + int ( * push ) ( struct net_device *netdev, struct io_buffer *iobuf, + const void *ll_dest, const void *ll_source, + uint16_t net_proto ); + /** + * Remove link-layer header + * + * @v netdev Network device + * @v iobuf I/O buffer + * @ret ll_dest Link-layer destination address + * @ret ll_source Source link-layer address + * @ret net_proto Network-layer protocol, in network-byte order + * @ret flags Packet flags + * @ret rc Return status code + */ + int ( * pull ) ( struct net_device *netdev, struct io_buffer *iobuf, + const void **ll_dest, const void **ll_source, + uint16_t *net_proto, unsigned int *flags ); + /** + * Initialise link-layer address + * + * @v hw_addr Hardware address + * @v ll_addr Link-layer address to fill in + */ + void ( * init_addr ) ( const void *hw_addr, void *ll_addr ); + /** + * Transcribe link-layer address + * + * @v ll_addr Link-layer address + * @ret string Human-readable transcription of address + * + * This method should convert the link-layer address into a + * human-readable format. + * + * The buffer used to hold the transcription is statically + * allocated. + */ + const char * ( * ntoa ) ( const void *ll_addr ); + /** + * Hash multicast address + * + * @v af Address family + * @v net_addr Network-layer address + * @v ll_addr Link-layer address to fill in + * @ret rc Return status code + */ + int ( * mc_hash ) ( unsigned int af, const void *net_addr, + void *ll_addr ); + /** + * Generate Ethernet-compatible compressed link-layer address + * + * @v ll_addr Link-layer address + * @v eth_addr Ethernet-compatible address to fill in + * @ret rc Return status code + */ + int ( * eth_addr ) ( const void *ll_addr, void *eth_addr ); + /** + * Generate EUI-64 address + * + * @v ll_addr Link-layer address + * @v eui64 EUI-64 address to fill in + * @ret rc Return status code + */ + int ( * eui64 ) ( const void *ll_addr, void *eui64 ); + /** Link-layer protocol + * + * This is an ARPHRD_XXX constant, in network byte order. + */ + uint16_t ll_proto; + /** Hardware address length */ + uint8_t hw_addr_len; + /** Link-layer address length */ + uint8_t ll_addr_len; + /** Link-layer header length */ + uint8_t ll_header_len; + /** Flags */ + unsigned int flags; +}; + +/** Local link-layer address functions only as a name + * + * This flag indicates that the local link-layer address cannot + * directly be used as a destination address by a remote node. + */ +#define LL_NAME_ONLY 0x0001 + +/** Network device operations */ +struct net_device_operations { + /** Open network device + * + * @v netdev Network device + * @ret rc Return status code + * + * This method should allocate RX I/O buffers and enable + * the hardware to start transmitting and receiving packets. + */ + int ( * open ) ( struct net_device *netdev ); + /** Close network device + * + * @v netdev Network device + * + * This method should stop the flow of packets, and free up + * any packets that are currently in the device's TX queue. + */ + void ( * close ) ( struct net_device *netdev ); + /** Transmit packet + * + * @v netdev Network device + * @v iobuf I/O buffer + * @ret rc Return status code + * + * This method should cause the hardware to initiate + * transmission of the I/O buffer. + * + * If this method returns success, the I/O buffer remains + * owned by the net device's TX queue, and the net device must + * eventually call netdev_tx_complete() to free the buffer. + * If this method returns failure, the I/O buffer is + * immediately released; the failure is interpreted as + * "failure to enqueue buffer". + * + * This method is guaranteed to be called only when the device + * is open. + */ + int ( * transmit ) ( struct net_device *netdev, + struct io_buffer *iobuf ); + /** Poll for completed and received packets + * + * @v netdev Network device + * + * This method should cause the hardware to check for + * completed transmissions and received packets. Any received + * packets should be delivered via netdev_rx(). + * + * This method is guaranteed to be called only when the device + * is open. + */ + void ( * poll ) ( struct net_device *netdev ); + /** Enable or disable interrupts + * + * @v netdev Network device + * @v enable Interrupts should be enabled + * + * This method may be NULL to indicate that interrupts are not + * supported. + */ + void ( * irq ) ( struct net_device *netdev, int enable ); +}; + +/** Network device error */ +struct net_device_error { + /** Error status code */ + int rc; + /** Error count */ + unsigned int count; +}; + +/** Maximum number of unique errors that we will keep track of */ +#define NETDEV_MAX_UNIQUE_ERRORS 4 + +/** Network device statistics */ +struct net_device_stats { + /** Count of successful completions */ + unsigned int good; + /** Count of error completions */ + unsigned int bad; + /** Error breakdowns */ + struct net_device_error errors[NETDEV_MAX_UNIQUE_ERRORS]; +}; + +/** A network device configuration */ +struct net_device_configuration { + /** Network device */ + struct net_device *netdev; + /** Network device configurator */ + struct net_device_configurator *configurator; + /** Configuration status */ + int rc; + /** Job control interface */ + struct interface job; +}; + +/** A network device configurator */ +struct net_device_configurator { + /** Name */ + const char *name; + /** Check applicability of configurator + * + * @v netdev Network device + * @ret applies Configurator applies to this network device + */ + int ( * applies ) ( struct net_device *netdev ); + /** Start configuring network device + * + * @v job Job control interface + * @v netdev Network device + * @ret rc Return status code + */ + int ( * start ) ( struct interface *job, struct net_device *netdev ); +}; + +/** Network device configurator table */ +#define NET_DEVICE_CONFIGURATORS \ + __table ( struct net_device_configurator, "net_device_configurators" ) + +/** Declare a network device configurator */ +#define __net_device_configurator \ + __table_entry ( NET_DEVICE_CONFIGURATORS, 01 ) + +/** Maximum length of a network device name */ +#define NETDEV_NAME_LEN 12 + +/** + * A network device + * + * This structure represents a piece of networking hardware. It has + * properties such as a link-layer address and methods for + * transmitting and receiving raw packets. + * + * Note that this structure must represent a generic network device, + * not just an Ethernet device. + */ +struct net_device { + /** Reference counter */ + struct refcnt refcnt; + /** List of network devices */ + struct list_head list; + /** List of open network devices */ + struct list_head open_list; + /** Index of this network device */ + unsigned int index; + /** Name of this network device */ + char name[NETDEV_NAME_LEN]; + /** Underlying hardware device */ + struct device *dev; + + /** Network device operations */ + struct net_device_operations *op; + + /** Link-layer protocol */ + struct ll_protocol *ll_protocol; + /** Hardware address + * + * This is an address which is an intrinsic property of the + * hardware, e.g. an address held in EEPROM. + * + * Note that the hardware address may not be the same length + * as the link-layer address. + */ + uint8_t hw_addr[MAX_HW_ADDR_LEN]; + /** Link-layer address + * + * This is the current link-layer address assigned to the + * device. It can be changed at runtime. + */ + uint8_t ll_addr[MAX_LL_ADDR_LEN]; + /** Link-layer broadcast address */ + const uint8_t *ll_broadcast; + + /** Current device state + * + * This is the bitwise-OR of zero or more NETDEV_XXX constants. + */ + unsigned int state; + /** Link status code + * + * Zero indicates that the link is up; any other value + * indicates the error preventing link-up. + */ + int link_rc; + /** Maximum packet length + * + * This length includes any link-layer headers. + */ + size_t max_pkt_len; + /** TX packet queue */ + struct list_head tx_queue; + /** Deferred TX packet queue */ + struct list_head tx_deferred; + /** RX packet queue */ + struct list_head rx_queue; + /** TX statistics */ + struct net_device_stats tx_stats; + /** RX statistics */ + struct net_device_stats rx_stats; + + /** Configuration settings applicable to this device */ + struct generic_settings settings; + + /** Driver private data */ + void *priv; + + /** Network device configurations (variable length) */ + struct net_device_configuration configs[0]; +}; + +/** Network device is open */ +#define NETDEV_OPEN 0x0001 + +/** Network device interrupts are enabled */ +#define NETDEV_IRQ_ENABLED 0x0002 + +/** Network device receive queue processing is frozen */ +#define NETDEV_RX_FROZEN 0x0004 + +/** Link-layer protocol table */ +#define LL_PROTOCOLS __table ( struct ll_protocol, "ll_protocols" ) + +/** Declare a link-layer protocol */ +#define __ll_protocol __table_entry ( LL_PROTOCOLS, 01 ) + +/** Network-layer protocol table */ +#define NET_PROTOCOLS __table ( struct net_protocol, "net_protocols" ) + +/** Declare a network-layer protocol */ +#define __net_protocol __table_entry ( NET_PROTOCOLS, 01 ) + +/** A network upper-layer driver */ +struct net_driver { + /** Name */ + const char *name; + /** Probe device + * + * @v netdev Network device + * @ret rc Return status code + */ + int ( * probe ) ( struct net_device *netdev ); + /** Notify of device or link state change + * + * @v netdev Network device + */ + void ( * notify ) ( struct net_device *netdev ); + /** Remove device + * + * @v netdev Network device + */ + void ( * remove ) ( struct net_device *netdev ); +}; + +/** Network driver table */ +#define NET_DRIVERS __table ( struct net_driver, "net_drivers" ) + +/** Declare a network driver */ +#define __net_driver __table_entry ( NET_DRIVERS, 01 ) + +extern struct list_head net_devices; +extern struct net_device_operations null_netdev_operations; +extern struct settings_operations netdev_settings_operations; + +/** + * Initialise a network device + * + * @v netdev Network device + * @v op Network device operations + */ +static inline void netdev_init ( struct net_device *netdev, + struct net_device_operations *op ) { + netdev->op = op; +} + +/** + * Stop using a network device + * + * @v netdev Network device + * + * Drivers should call this method immediately before the final call + * to netdev_put(). + */ +static inline void netdev_nullify ( struct net_device *netdev ) { + netdev->op = &null_netdev_operations; +} + +/** + * Get printable network device link-layer address + * + * @v netdev Network device + * @ret name Link-layer address + */ +static inline const char * netdev_addr ( struct net_device *netdev ) { + return netdev->ll_protocol->ntoa ( netdev->ll_addr ); +} + +/** Iterate over all network devices */ +#define for_each_netdev( netdev ) \ + list_for_each_entry ( (netdev), &net_devices, list ) + +/** There exist some network devices + * + * @ret existence Existence of network devices + */ +static inline int have_netdevs ( void ) { + return ( ! list_empty ( &net_devices ) ); +} + +/** + * Get reference to network device + * + * @v netdev Network device + * @ret netdev Network device + */ +static inline __attribute__ (( always_inline )) struct net_device * +netdev_get ( struct net_device *netdev ) { + ref_get ( &netdev->refcnt ); + return netdev; +} + +/** + * Drop reference to network device + * + * @v netdev Network device + */ +static inline __attribute__ (( always_inline )) void +netdev_put ( struct net_device *netdev ) { + ref_put ( &netdev->refcnt ); +} + +/** + * Get driver private area for this network device + * + * @v netdev Network device + * @ret priv Driver private area for this network device + */ +static inline __attribute__ (( always_inline )) void * +netdev_priv ( struct net_device *netdev ) { + return netdev->priv; +} + +/** + * Get per-netdevice configuration settings block + * + * @v netdev Network device + * @ret settings Settings block + */ +static inline __attribute__ (( always_inline )) struct settings * +netdev_settings ( struct net_device *netdev ) { + return &netdev->settings.settings; +} + +/** + * Initialise a per-netdevice configuration settings block + * + * @v generics Generic settings block + * @v refcnt Containing object reference counter, or NULL + * @v name Settings block name + */ +static inline __attribute__ (( always_inline )) void +netdev_settings_init ( struct net_device *netdev ) { + generic_settings_init ( &netdev->settings, &netdev->refcnt ); + netdev->settings.settings.op = &netdev_settings_operations; +} + +/** + * Get network device configuration + * + * @v netdev Network device + * @v configurator Network device configurator + * @ret config Network device configuration + */ +static inline struct net_device_configuration * +netdev_configuration ( struct net_device *netdev, + struct net_device_configurator *configurator ) { + + return &netdev->configs[ table_index ( NET_DEVICE_CONFIGURATORS, + configurator ) ]; +} + +/** + * Check if configurator applies to network device + * + * @v netdev Network device + * @v configurator Network device configurator + * @ret applies Configurator applies to network device + */ +static inline int +netdev_configurator_applies ( struct net_device *netdev, + struct net_device_configurator *configurator ) { + return ( ( configurator->applies == NULL ) || + configurator->applies ( netdev ) ); +} + +/** + * Check link state of network device + * + * @v netdev Network device + * @ret link_up Link is up + */ +static inline __attribute__ (( always_inline )) int +netdev_link_ok ( struct net_device *netdev ) { + return ( netdev->link_rc == 0 ); +} + +/** + * Check whether or not network device is open + * + * @v netdev Network device + * @ret is_open Network device is open + */ +static inline __attribute__ (( always_inline )) int +netdev_is_open ( struct net_device *netdev ) { + return ( netdev->state & NETDEV_OPEN ); +} + +/** + * Check whether or not network device supports interrupts + * + * @v netdev Network device + * @ret irq_supported Network device supports interrupts + */ +static inline __attribute__ (( always_inline )) int +netdev_irq_supported ( struct net_device *netdev ) { + return ( netdev->op->irq != NULL ); +} + +/** + * Check whether or not network device interrupts are currently enabled + * + * @v netdev Network device + * @ret irq_enabled Network device interrupts are enabled + */ +static inline __attribute__ (( always_inline )) int +netdev_irq_enabled ( struct net_device *netdev ) { + return ( netdev->state & NETDEV_IRQ_ENABLED ); +} + +/** + * Check whether or not network device receive queue processing is frozen + * + * @v netdev Network device + * @ret rx_frozen Network device receive queue processing is frozen + */ +static inline __attribute__ (( always_inline )) int +netdev_rx_frozen ( struct net_device *netdev ) { + return ( netdev->state & NETDEV_RX_FROZEN ); +} + +extern void netdev_rx_freeze ( struct net_device *netdev ); +extern void netdev_rx_unfreeze ( struct net_device *netdev ); +extern void netdev_link_err ( struct net_device *netdev, int rc ); +extern void netdev_link_down ( struct net_device *netdev ); +extern int netdev_tx ( struct net_device *netdev, struct io_buffer *iobuf ); +extern void netdev_tx_defer ( struct net_device *netdev, + struct io_buffer *iobuf ); +extern void netdev_tx_err ( struct net_device *netdev, + struct io_buffer *iobuf, int rc ); +extern void netdev_tx_complete_err ( struct net_device *netdev, + struct io_buffer *iobuf, int rc ); +extern void netdev_tx_complete_next_err ( struct net_device *netdev, int rc ); +extern void netdev_rx ( struct net_device *netdev, struct io_buffer *iobuf ); +extern void netdev_rx_err ( struct net_device *netdev, + struct io_buffer *iobuf, int rc ); +extern void netdev_poll ( struct net_device *netdev ); +extern struct io_buffer * netdev_rx_dequeue ( struct net_device *netdev ); +extern struct net_device * alloc_netdev ( size_t priv_size ); +extern int register_netdev ( struct net_device *netdev ); +extern int netdev_open ( struct net_device *netdev ); +extern void netdev_close ( struct net_device *netdev ); +extern void unregister_netdev ( struct net_device *netdev ); +extern void netdev_irq ( struct net_device *netdev, int enable ); +extern struct net_device * find_netdev ( const char *name ); +extern struct net_device * find_netdev_by_index ( unsigned int index ); +extern struct net_device * find_netdev_by_location ( unsigned int bus_type, + unsigned int location ); +extern struct net_device * +find_netdev_by_ll_addr ( struct ll_protocol *ll_protocol, const void *ll_addr ); +extern struct net_device * last_opened_netdev ( void ); +extern int net_tx ( struct io_buffer *iobuf, struct net_device *netdev, + struct net_protocol *net_protocol, const void *ll_dest, + const void *ll_source ); +extern int net_rx ( struct io_buffer *iobuf, struct net_device *netdev, + uint16_t net_proto, const void *ll_dest, + const void *ll_source, unsigned int flags ); +extern void net_poll ( void ); +extern struct net_device_configurator * +find_netdev_configurator ( const char *name ); +extern int netdev_configure ( struct net_device *netdev, + struct net_device_configurator *configurator ); +extern int netdev_configure_all ( struct net_device *netdev ); +extern int netdev_configuration_in_progress ( struct net_device *netdev ); +extern int netdev_configuration_ok ( struct net_device *netdev ); + +/** + * Complete network transmission + * + * @v netdev Network device + * @v iobuf I/O buffer + * + * The packet must currently be in the network device's TX queue. + */ +static inline void netdev_tx_complete ( struct net_device *netdev, + struct io_buffer *iobuf ) { + netdev_tx_complete_err ( netdev, iobuf, 0 ); +} + +/** + * Complete network transmission + * + * @v netdev Network device + * + * Completes the oldest outstanding packet in the TX queue. + */ +static inline void netdev_tx_complete_next ( struct net_device *netdev ) { + netdev_tx_complete_next_err ( netdev, 0 ); +} + +/** + * Mark network device as having link up + * + * @v netdev Network device + */ +static inline __attribute__ (( always_inline )) void +netdev_link_up ( struct net_device *netdev ) { + netdev_link_err ( netdev, 0 ); +} + +#endif /* _IPXE_NETDEVICE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/nfs.h b/qemu/roms/ipxe/src/include/ipxe/nfs.h new file mode 100644 index 000000000..498ed5a27 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/nfs.h @@ -0,0 +1,157 @@ +#ifndef _IPXE_NFS_H +#define _IPXE_NFS_H + +#include <stdint.h> +#include <ipxe/oncrpc.h> + +/** @file + * + * Network File System protocol. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** NFS protocol number */ +#define ONCRPC_NFS 100003 + +/** NFS protocol version */ +#define NFS_VERS 3 + +/** No error*/ +#define NFS3_OK 0 +/** Not owner */ +#define NFS3ERR_PERM 1 +/** No such file or directory */ +#define NFS3ERR_NOENT 2 +/** I/O error */ +#define NFS3ERR_IO 5 +/** No such device or address */ +#define NFS3ERR_NXIO 6 +/** Permission denied */ +#define NFS3ERR_ACCES 13 +/** The file specified already exists */ +#define NFS3ERR_EXIST 17 +/** Attempt to do a cross-device hard link */ +#define NFS3ERR_XDEV 18 +/** No such device */ +#define NFS3ERR_NODEV 19 +/** Not a directory */ +#define NFS3ERR_NOTDIR 20 + /**Is a directory */ +#define NFS3ERR_ISDIR 21 +/** Invalid argument */ +#define NFS3ERR_INVAL 22 +/** Filename too long */ +#define NFS3ERR_NAMETOOLONG 63 +/** Invalid file handle */ +#define NFS3ERR_STALE 70 +/** Too many levels of remote in path */ +#define NFS3ERR_REMOTE 71 +/** Illegal NFS file handle */ +#define NFS3ERR_BADHANDLE 10001 +/** READDIR or READDIRPLUS cookie is stale */ +#define NFS3ERR_BAD_COOKIE 10003 +/** Operation not supported */ +#define NFS3ERR_NOTSUPP 10004 +/** Buffer or request is too small */ +#define NFS3ERR_TOOSMALL 10005 +/** An error occurred on the server which does not map to any of the legal NFS + * version 3 protocol error values */ +#define NFS3ERR_SERVERFAULT 10006 +/** The server initiated the request, but was not able to complete it in a + * timely fashion */ +#define NFS3ERR_JUKEBOX 10008 + +enum nfs_attr_type { + NFS_ATTR_SYMLINK = 5, +}; + +/** + * A NFS file handle + * + */ +struct nfs_fh { + uint8_t fh[64]; + size_t size; +}; + +/** + * A NFS LOOKUP reply + * + */ +struct nfs_lookup_reply { + /** Reply status */ + uint32_t status; + /** Entity type */ + enum nfs_attr_type ent_type; + /** File handle */ + struct nfs_fh fh; +}; + +/** + * A NFS READLINK reply + * + */ +struct nfs_readlink_reply { + /** Reply status */ + uint32_t status; + /** File path length */ + uint32_t path_len; + /** File path */ + char *path; +}; + + +/** + * A NFS READ reply + * + */ +struct nfs_read_reply { + /** Reply status */ + uint32_t status; + /** File size */ + uint64_t filesize; + /** Bytes read */ + uint32_t count; + /** End-of-File indicator */ + uint32_t eof; + /** Data length */ + uint32_t data_len; + /** Data read */ + void *data; +}; + +size_t nfs_iob_get_fh ( struct io_buffer *io_buf, struct nfs_fh *fh ); +size_t nfs_iob_add_fh ( struct io_buffer *io_buf, const struct nfs_fh *fh ); + +/** + * Prepare an ONC RPC session to be used as a NFS session + * + * @v session ONC RPC session + * @v credential ONC RPC credential + * + * The credential parameter must not be NULL, use 'oncrpc_auth_none' if you + * don't want a particular scheme to be used. + */ +static inline void nfs_init_session ( struct oncrpc_session *session, + struct oncrpc_cred *credential ) { + oncrpc_init_session ( session, credential, &oncrpc_auth_none, + ONCRPC_NFS, NFS_VERS ); +} + +int nfs_lookup ( struct interface *intf, struct oncrpc_session *session, + const struct nfs_fh *fh, const char *filename ); +int nfs_readlink ( struct interface *intf, struct oncrpc_session *session, + const struct nfs_fh *fh ); +int nfs_read ( struct interface *intf, struct oncrpc_session *session, + const struct nfs_fh *fh, uint64_t offset, uint32_t count ); + +int nfs_get_lookup_reply ( struct nfs_lookup_reply *lookup_reply, + struct oncrpc_reply *reply ); +int nfs_get_readlink_reply ( struct nfs_readlink_reply *readlink_reply, + struct oncrpc_reply *reply ); +int nfs_get_read_reply ( struct nfs_read_reply *read_reply, + struct oncrpc_reply *reply ); + +#endif /* _IPXE_NFS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/nfs_open.h b/qemu/roms/ipxe/src/include/ipxe/nfs_open.h new file mode 100644 index 000000000..caba977f7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/nfs_open.h @@ -0,0 +1,12 @@ +#ifndef _IPXE_NFS_OPEN_H +#define _IPXE_NFS_OPEN_H + +/** @file + * + * Network File System protocol. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#endif /* _IPXE_NFS_OPEN_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/nfs_uri.h b/qemu/roms/ipxe/src/include/ipxe/nfs_uri.h new file mode 100644 index 000000000..d88bd6f65 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/nfs_uri.h @@ -0,0 +1,29 @@ +#ifndef _IPXE_NFS_URI_H +#define _IPXE_NFS_URI_H + +/** @file + * + * Network File System protocol URI handling functions + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/uri.h> + +struct nfs_uri { + char *mountpoint; + char *filename; + char *path; + char *lookup_pos; +}; + +int nfs_uri_init ( struct nfs_uri *nfs_uri, const struct uri *uri ); +int nfs_uri_next_mountpoint ( struct nfs_uri *uri ); +int nfs_uri_symlink ( struct nfs_uri *uri, const char *symlink_value ); +char *nfs_uri_mountpoint ( const struct nfs_uri *uri ); +char *nfs_uri_next_path_component ( struct nfs_uri *uri ); +void nfs_uri_free ( struct nfs_uri *uri ); + + +#endif /* _IPXE_NFS_URI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/null_entropy.h b/qemu/roms/ipxe/src/include/ipxe/null_entropy.h new file mode 100644 index 000000000..646d1a17e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/null_entropy.h @@ -0,0 +1,52 @@ +#ifndef _IPXE_NULL_ENTROPY_H +#define _IPXE_NULL_ENTROPY_H + +/** @file + * + * Nonexistent entropy source + * + * This source provides no entropy and must NOT be used in a + * security-sensitive environment. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +#ifdef ENTROPY_NULL +#define ENTROPY_PREFIX_null +#else +#define ENTROPY_PREFIX_null __null_ +#endif + +static inline __always_inline int +ENTROPY_INLINE ( null, entropy_enable ) ( void ) { + /* Do nothing */ + return 0; +} + +static inline __always_inline void +ENTROPY_INLINE ( null, entropy_disable ) ( void ) { + /* Do nothing */ +} + +static inline __always_inline double +ENTROPY_INLINE ( null, min_entropy_per_sample ) ( void ) { + /* Actual amount of min-entropy is zero. To avoid + * division-by-zero errors and to allow compilation of + * entropy-consuming code, pretend to have 1 bit of entropy in + * each sample. + */ + return 1.0; +} + +static inline __always_inline int +ENTROPY_INLINE ( null, get_noise ) ( noise_sample_t *noise ) { + + /* All sample values are constant */ + *noise = 0x01; + + return 0; +} + +#endif /* _IPXE_NULL_ENTROPY_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/null_nap.h b/qemu/roms/ipxe/src/include/ipxe/null_nap.h new file mode 100644 index 000000000..0c0704bc7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/null_nap.h @@ -0,0 +1,23 @@ +#ifndef _IPXE_NULL_NAP_H +#define _IPXE_NULL_NAP_H + +/** @file + * + * Null CPU sleeping + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef NAP_NULL +#define NAP_PREFIX_null +#else +#define NAP_PREFIX_null __null_ +#endif + +static inline __always_inline void +NAP_INLINE ( null, cpu_nap ) ( void ) { + /* Do nothing */ +} + +#endif /* _IPXE_NULL_NAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/null_reboot.h b/qemu/roms/ipxe/src/include/ipxe/null_reboot.h new file mode 100644 index 000000000..3de36c5b3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/null_reboot.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_NULL_REBOOT_H +#define _IPXE_NULL_REBOOT_H + +/** @file + * + * iPXE do-nothing reboot API + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef REBOOT_NULL +#define REBOOT_PREFIX_null +#else +#define REBOOT_PREFIX_null __null_ +#endif + +#endif /* _IPXE_NULL_REBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/null_sanboot.h b/qemu/roms/ipxe/src/include/ipxe/null_sanboot.h new file mode 100644 index 000000000..2b3a2c74d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/null_sanboot.h @@ -0,0 +1,23 @@ +#ifndef _IPXE_NULL_SANBOOT_H +#define _IPXE_NULL_SANBOOT_H + +/** @file + * + * Standard do-nothing sanboot interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef SANBOOT_NULL +#define SANBOOT_PREFIX_null +#else +#define SANBOOT_PREFIX_null __null_ +#endif + +static inline __always_inline unsigned int +SANBOOT_INLINE ( null, san_default_drive ) ( void ) { + return 0; +} + +#endif /* _IPXE_NULL_SANBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/null_time.h b/qemu/roms/ipxe/src/include/ipxe/null_time.h new file mode 100644 index 000000000..2b72cdf50 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/null_time.h @@ -0,0 +1,23 @@ +#ifndef _IPXE_NULL_TIME_H +#define _IPXE_NULL_TIME_H + +/** @file + * + * Nonexistent time source + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifdef TIME_NULL +#define TIME_PREFIX_null +#else +#define TIME_PREFIX_null __null_ +#endif + +static inline __always_inline time_t +TIME_INLINE ( null, time_now ) ( void ) { + return 0; +} + +#endif /* _IPXE_NULL_TIME_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/nvo.h b/qemu/roms/ipxe/src/include/ipxe/nvo.h new file mode 100644 index 000000000..1a629da78 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/nvo.h @@ -0,0 +1,57 @@ +#ifndef _IPXE_NVO_H +#define _IPXE_NVO_H + +/** @file + * + * Non-volatile stored options + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/dhcpopts.h> +#include <ipxe/settings.h> + +struct nvs_device; +struct refcnt; + +/** + * A block of non-volatile stored options + */ +struct nvo_block { + /** Settings block */ + struct settings settings; + /** Underlying non-volatile storage device */ + struct nvs_device *nvs; + /** Address within NVS device */ + unsigned int address; + /** Length of options data */ + size_t len; + /** Option-containing data */ + void *data; + /** + * Resize non-volatile stored option block + * + * @v nvo Non-volatile options block + * @v len New size + * @ret rc Return status code + */ + int ( * resize ) ( struct nvo_block *nvo, size_t len ); + /** DHCP options block */ + struct dhcp_options dhcpopts; +}; + +/** Name of non-volatile options settings block */ +#define NVO_SETTINGS_NAME "nvo" + +extern int nvo_applies ( struct settings *settings, + const struct setting *setting ); +extern void nvo_init ( struct nvo_block *nvo, struct nvs_device *nvs, + size_t address, size_t len, + int ( * resize ) ( struct nvo_block *nvo, size_t len ), + struct refcnt *refcnt ); +extern int register_nvo ( struct nvo_block *nvo, struct settings *parent ); +extern void unregister_nvo ( struct nvo_block *nvo ); + +#endif /* _IPXE_NVO_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/nvs.h b/qemu/roms/ipxe/src/include/ipxe/nvs.h new file mode 100644 index 000000000..4733123cf --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/nvs.h @@ -0,0 +1,68 @@ +#ifndef _IPXE_NVS_H +#define _IPXE_NVS_H + +/** @file + * + * Non-volatile storage + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +/** A non-volatile storage device */ +struct nvs_device { + /** Word length + * + * This is expressed as the base-2 logarithm of the word + * length in bytes. A value of 0 therefore translates as + * 8-bit words, and a value of 1 translates as 16-bit words. + */ + unsigned int word_len_log2; + /** Device size (in words) */ + unsigned int size; + /** Data block size (in words) + * + * This is the block size used by the device. It must be a + * power of two. Data reads and writes must not cross a block + * boundary. + * + * Many devices allow reads to cross a block boundary, and + * restrict only writes. For the sake of simplicity, we + * assume that the same restriction applies to both reads and + * writes. + */ + unsigned int block_size; + /** Read data from device + * + * @v nvs NVS device + * @v address Address from which to read + * @v data Data buffer + * @v len Length of data buffer + * @ret rc Return status code + * + * Reads may not cross a block boundary. + */ + int ( * read ) ( struct nvs_device *nvs, unsigned int address, + void *data, size_t len ); + /** Write data to device + * + * @v nvs NVS device + * @v address Address to which to write + * @v data Data buffer + * @v len Length of data buffer + * @ret rc Return status code + * + * Writes may not cross a block boundary. + */ + int ( * write ) ( struct nvs_device *nvs, unsigned int address, + const void *data, size_t len ); +}; + +extern int nvs_read ( struct nvs_device *nvs, unsigned int address, + void *data, size_t len ); +extern int nvs_write ( struct nvs_device *nvs, unsigned int address, + const void *data, size_t len ); + +#endif /* _IPXE_NVS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/nvsvpd.h b/qemu/roms/ipxe/src/include/ipxe/nvsvpd.h new file mode 100644 index 000000000..3450e5c71 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/nvsvpd.h @@ -0,0 +1,33 @@ +#ifndef _IPXE_NVSVPD_H +#define _IPXE_NVSVPD_H + +/** + * @file + * + * Non-Volatile Storage using Vital Product Data + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/nvs.h> +#include <ipxe/pcivpd.h> + +struct nvo_block; +struct refcnt; + +/** An NVS VPD device */ +struct nvs_vpd_device { + /** NVS device */ + struct nvs_device nvs; + /** PCI VPD device */ + struct pci_vpd vpd; +}; + +extern int nvs_vpd_init ( struct nvs_vpd_device *nvsvpd, + struct pci_device *pci ); +extern void nvs_vpd_nvo_init ( struct nvs_vpd_device *nvsvpd, + unsigned int field, struct nvo_block *nvo, + struct refcnt *refcnt ); + +#endif /* IPXE_NVSVPD_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ocsp.h b/qemu/roms/ipxe/src/include/ipxe/ocsp.h new file mode 100644 index 000000000..387e28f81 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ocsp.h @@ -0,0 +1,121 @@ +#ifndef _IPXE_OCSP_H +#define _IPXE_OCSP_H + +/** @file + * + * Online Certificate Status Protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdarg.h> +#include <time.h> +#include <ipxe/asn1.h> +#include <ipxe/x509.h> +#include <ipxe/refcnt.h> + +/** OCSP algorithm identifier */ +#define OCSP_ALGORITHM_IDENTIFIER( ... ) \ + ASN1_OID, VA_ARG_COUNT ( __VA_ARGS__ ), __VA_ARGS__, \ + ASN1_NULL, 0x00 + +/* OCSP response statuses */ +#define OCSP_STATUS_SUCCESSFUL 0x00 +#define OCSP_STATUS_MALFORMED_REQUEST 0x01 +#define OCSP_STATUS_INTERNAL_ERROR 0x02 +#define OCSP_STATUS_TRY_LATER 0x03 +#define OCSP_STATUS_SIG_REQUIRED 0x05 +#define OCSP_STATUS_UNAUTHORIZED 0x06 + +struct ocsp_check; + +/** An OCSP request */ +struct ocsp_request { + /** Request builder */ + struct asn1_builder builder; + /** Certificate ID */ + struct asn1_cursor cert_id; +}; + +/** An OCSP responder */ +struct ocsp_responder { + /** + * Check if certificate is the responder's certificate + * + * @v ocsp OCSP check + * @v cert Certificate + * @ret difference Difference as returned by memcmp() + */ + int ( * compare ) ( struct ocsp_check *ocsp, + struct x509_certificate *cert ); + /** Responder ID */ + struct asn1_cursor id; +}; + +/** An OCSP response */ +struct ocsp_response { + /** Raw response */ + void *data; + /** Raw tbsResponseData */ + struct asn1_cursor tbs; + /** Responder */ + struct ocsp_responder responder; + /** Time at which status is known to be correct */ + time_t this_update; + /** Time at which newer status information will be available */ + time_t next_update; + /** Signature algorithm */ + struct asn1_algorithm *algorithm; + /** Signature value */ + struct asn1_bit_string signature; + /** Signing certificate */ + struct x509_certificate *signer; +}; + +/** An OCSP check */ +struct ocsp_check { + /** Reference count */ + struct refcnt refcnt; + /** Certificate being checked */ + struct x509_certificate *cert; + /** Issuing certificate */ + struct x509_certificate *issuer; + /** URI string */ + char *uri_string; + /** Request */ + struct ocsp_request request; + /** Response */ + struct ocsp_response response; +}; + +/** + * Get reference to OCSP check + * + * @v ocsp OCSP check + * @ret ocsp OCSP check + */ +static inline __attribute__ (( always_inline )) struct ocsp_check * +ocsp_get ( struct ocsp_check *ocsp ) { + ref_get ( &ocsp->refcnt ); + return ocsp; +} + +/** + * Drop reference to OCSP check + * + * @v ocsp OCSP check + */ +static inline __attribute__ (( always_inline )) void +ocsp_put ( struct ocsp_check *ocsp ) { + ref_put ( &ocsp->refcnt ); +} + +extern int ocsp_check ( struct x509_certificate *cert, + struct x509_certificate *issuer, + struct ocsp_check **ocsp ); +extern int ocsp_response ( struct ocsp_check *ocsp, const void *data, + size_t len ); +extern int ocsp_validate ( struct ocsp_check *check, time_t time ); + +#endif /* _IPXE_OCSP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/oncrpc.h b/qemu/roms/ipxe/src/include/ipxe/oncrpc.h new file mode 100644 index 000000000..76c1260f2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/oncrpc.h @@ -0,0 +1,128 @@ +#ifndef _IPXE_ONCRPC_H +#define _IPXE_ONCRPC_H + +#include <stdint.h> +#include <ipxe/interface.h> +#include <ipxe/iobuf.h> + +/** @file + * + * SUN ONC RPC protocol. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** ONC RCP Version */ +#define ONCRPC_VERS 2 + +/** ONC RPC Null Authentication */ +#define ONCRPC_AUTH_NONE 0 + +/** ONC RPC System Authentication (also called UNIX Authentication) */ +#define ONCRPC_AUTH_SYS 1 + +/** Size of an ONC RPC header */ +#define ONCRPC_HEADER_SIZE ( 11 * sizeof ( uint32_t ) ) + +#define ONCRPC_FIELD( type, value ) { oncrpc_ ## type, { .type = value } } +#define ONCRPC_SUBFIELD( type, args... ) \ + { oncrpc_ ## type, { .type = { args } } } + +#define ONCRPC_FIELD_END { oncrpc_none, { } } + +/** Enusure that size is a multiple of four */ +#define oncrpc_align( size ) ( ( (size) + 3 ) & ~3 ) + +/** + * Calculate the length of a string, including padding bytes. + * + * @v str String + * @ret size Length of the padded string + */ +#define oncrpc_strlen( str ) ( oncrpc_align ( strlen ( str ) ) + \ + sizeof ( uint32_t ) ) + +struct oncrpc_cred { + uint32_t flavor; + uint32_t length; +}; + +struct oncrpc_cred_sys { + struct oncrpc_cred credential; + uint32_t stamp; + char *hostname; + uint32_t uid; + uint32_t gid; + uint32_t aux_gid_len; + uint32_t aux_gid[16]; +}; + +struct oncrpc_reply +{ + struct oncrpc_cred *verifier; + uint32_t rpc_id; + uint32_t reply_state; + uint32_t accept_state; + uint32_t frame_size; + struct io_buffer *data; +}; + +struct oncrpc_session { + struct oncrpc_reply pending_reply; + struct oncrpc_cred *credential; + struct oncrpc_cred *verifier; + uint32_t rpc_id; + uint32_t prog_name; + uint32_t prog_vers; +}; + +enum oncrpc_field_type { + oncrpc_none = 0, + oncrpc_int32, + oncrpc_int64, + oncrpc_str, + oncrpc_array, + oncrpc_intarray, + oncrpc_cred, +}; + +union oncrpc_field_value { + struct { + size_t length; + const void *ptr; + } array; + + struct { + size_t length; + const uint32_t *ptr; + } intarray; + + int64_t int64; + int32_t int32; + const char *str; + const struct oncrpc_cred *cred; +}; + +struct oncrpc_field { + enum oncrpc_field_type type; + union oncrpc_field_value value; +}; + +extern struct oncrpc_cred oncrpc_auth_none; + +int oncrpc_init_cred_sys ( struct oncrpc_cred_sys *auth_sys ); +void oncrpc_init_session ( struct oncrpc_session *session, + struct oncrpc_cred *credential, + struct oncrpc_cred *verifier, uint32_t prog_name, + uint32_t prog_vers ); + +int oncrpc_call ( struct interface *intf, struct oncrpc_session *session, + uint32_t proc_name, const struct oncrpc_field fields[] ); + +size_t oncrpc_compute_size ( const struct oncrpc_field fields[] ); + +int oncrpc_get_reply ( struct oncrpc_session *session, + struct oncrpc_reply *reply, struct io_buffer *io_buf ); + +#endif /* _IPXE_ONCRPC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/oncrpc_iob.h b/qemu/roms/ipxe/src/include/ipxe/oncrpc_iob.h new file mode 100644 index 000000000..4858d96b5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/oncrpc_iob.h @@ -0,0 +1,102 @@ +#ifndef _IPXE_ONCRPC_IOB_H +#define _IPXE_ONCRPC_IOB_H + +#include <stdint.h> +#include <string.h> +#include <ipxe/iobuf.h> +#include <ipxe/refcnt.h> +#include <ipxe/oncrpc.h> + +/** @file + * + * SUN ONC RPC protocol. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * Add a string to the end of an I/O buffer + * + * @v io_buf I/O buffer + * @v val String + * @ret size Size of the data written + */ +#define oncrpc_iob_add_string( buf, str ) \ +( { \ + const char * _str = (str); \ + oncrpc_iob_add_array ( (buf), strlen ( _str ), _str ); \ +} ) + +/** + * Get a 32 bits integer from the beginning of an I/O buffer + * + * @v buf I/O buffer + * @ret int Integer + */ + +#define oncrpc_iob_get_int( buf ) \ +( { \ + uint32_t *_val; \ + _val = (buf)->data; \ + iob_pull ( (buf), sizeof ( uint32_t ) ); \ + ntohl ( *_val ); \ +} ) + +/** + * Get a 64 bits integer from the beginning of an I/O buffer + * + * @v buf I/O buffer + * @ret int Integer + */ +#define oncrpc_iob_get_int64( buf ) \ +( { \ + uint64_t *_val; \ + _val = (buf)->data; \ + iob_pull ( (buf), sizeof ( uint64_t ) ); \ + ntohll ( *_val ); \ +} ) + + +size_t oncrpc_iob_add_fields ( struct io_buffer *io_buf, + const struct oncrpc_field fields[] ); + +size_t oncrpc_iob_add_array ( struct io_buffer *io_buf, size_t length, + const void *data ); + +size_t oncrpc_iob_add_intarray ( struct io_buffer *io_buf, size_t length, + const uint32_t *array ); + +size_t oncrpc_iob_add_cred ( struct io_buffer *io_buf, + const struct oncrpc_cred *cred ); + +size_t oncrpc_iob_get_cred ( struct io_buffer *io_buf, + struct oncrpc_cred *cred ); + +/** + * Add a 32 bits integer to the end of an I/O buffer + * + * @v io_buf I/O buffer + * @v val Integer + * @ret size Size of the data written + */ +static inline size_t oncrpc_iob_add_int ( struct io_buffer *io_buf, + uint32_t val ) { + * ( uint32_t * ) iob_put ( io_buf, sizeof ( val ) ) = htonl ( val ); + return ( sizeof ( val) ); +} + +/** + * Add a 64 bits integer to the end of an I/O buffer + * + * @v io_buf I/O buffer + * @v val Integer + * @ret size Size of the data written + */ +static inline size_t oncrpc_iob_add_int64 ( struct io_buffer *io_buf, + uint64_t val ) { + * ( uint64_t * ) iob_put ( io_buf, sizeof ( val ) ) = htonll ( val ); + return ( sizeof ( val) ); +} + +#endif /* _IPXE_ONCRPC_IOB_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/open.h b/qemu/roms/ipxe/src/include/ipxe/open.h new file mode 100644 index 000000000..a522f0cd1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/open.h @@ -0,0 +1,106 @@ +#ifndef _IPXE_OPEN_H +#define _IPXE_OPEN_H + +/** @file + * + * Data transfer interface opening + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdarg.h> +#include <ipxe/tables.h> +#include <ipxe/socket.h> + +struct uri; +struct interface; + +/** Location types */ +enum { + /** Location is a URI + * + * Parameter list for open() is: + * + * struct uri *uri; + */ + LOCATION_URI = 1, + /** Location is a URI string + * + * Parameter list for open() is: + * + * const char *uri_string; + */ + LOCATION_URI_STRING, + /** Location is a socket + * + * Parameter list for open() is: + * + * int semantics; + * struct sockaddr *peer; + * struct sockaddr *local; + */ + LOCATION_SOCKET, +}; + +/** A URI opener */ +struct uri_opener { + /** URI protocol name + * + * This is the "scheme" portion of the URI, e.g. "http" or + * "file". + */ + const char *scheme; + /** Open URI + * + * @v intf Object interface + * @v uri URI + * @ret rc Return status code + */ + int ( * open ) ( struct interface *intf, struct uri *uri ); +}; + +/** URI opener table */ +#define URI_OPENERS __table ( struct uri_opener, "uri_openers" ) + +/** Register a URI opener */ +#define __uri_opener __table_entry ( URI_OPENERS, 01 ) + +/** A socket opener */ +struct socket_opener { + /** Communication semantics (e.g. SOCK_STREAM) */ + int semantics; + /** Address family (e.g. AF_INET) */ + int family; + /** Open socket + * + * @v intf Object interface + * @v peer Peer socket address + * @v local Local socket address, or NULL + * @ret rc Return status code + */ + int ( * open ) ( struct interface *intf, struct sockaddr *peer, + struct sockaddr *local ); +}; + +/** Socket opener table */ +#define SOCKET_OPENERS __table ( struct socket_opener, "socket_openers" ) + +/** Register a socket opener */ +#define __socket_opener __table_entry ( SOCKET_OPENERS, 01 ) + +extern struct uri_opener * xfer_uri_opener ( const char *scheme ); +extern int xfer_open_uri ( struct interface *intf, struct uri *uri ); +extern int xfer_open_uri_string ( struct interface *intf, + const char *uri_string ); +extern int xfer_open_named_socket ( struct interface *intf, int semantics, + struct sockaddr *peer, const char *name, + struct sockaddr *local ); +extern int xfer_open_socket ( struct interface *intf, int semantics, + struct sockaddr *peer, struct sockaddr *local ); +extern int xfer_vopen ( struct interface *intf, int type, va_list args ); +extern int xfer_open ( struct interface *intf, int type, ... ); +extern int xfer_vreopen ( struct interface *intf, int type, + va_list args ); + +#endif /* _IPXE_OPEN_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/params.h b/qemu/roms/ipxe/src/include/ipxe/params.h new file mode 100644 index 000000000..c2d82d9cf --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/params.h @@ -0,0 +1,83 @@ +#ifndef _IPXE_PARAMS_H +#define _IPXE_PARAMS_H + +/** @file + * + * Form parameters + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/list.h> +#include <ipxe/refcnt.h> + +/** A form parameter list */ +struct parameters { + /** Reference count */ + struct refcnt refcnt; + /** List of all parameter lists */ + struct list_head list; + /** Name */ + const char *name; + /** Parameters */ + struct list_head entries; +}; + +/** A form parameter */ +struct parameter { + /** List of form parameters */ + struct list_head list; + /** Key */ + const char *key; + /** Value */ + const char *value; +}; + +/** + * Increment form parameter list reference count + * + * @v params Parameter list, or NULL + * @ret params Parameter list as passed in + */ +static inline __attribute__ (( always_inline )) struct parameters * +params_get ( struct parameters *params ) { + ref_get ( ¶ms->refcnt ); + return params; +} + +/** + * Decrement form parameter list reference count + * + * @v params Parameter list, or NULL + */ +static inline __attribute__ (( always_inline )) void +params_put ( struct parameters *params ) { + ref_put ( ¶ms->refcnt ); +} + +/** + * Claim ownership of form parameter list + * + * @v params Parameter list + * @ret params Parameter list + */ +static inline __attribute__ (( always_inline )) struct parameters * +claim_parameters ( struct parameters *params ) { + + /* Remove from list of parameter lists */ + list_del ( ¶ms->list ); + + return params; +} + +/** Iterate over all form parameters in a list */ +#define for_each_param( param, params ) \ + list_for_each_entry ( (param), &(params)->entries, list ) + +extern struct parameters * find_parameters ( const char *name ); +extern struct parameters * create_parameters ( const char *name ); +extern struct parameter * add_parameter ( struct parameters *params, + const char *key, const char *value ); + +#endif /* _IPXE_PARAMS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/parseopt.h b/qemu/roms/ipxe/src/include/ipxe/parseopt.h new file mode 100644 index 000000000..840de7497 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/parseopt.h @@ -0,0 +1,151 @@ +#ifndef _IPXE_PARSEOPT_H +#define _IPXE_PARSEOPT_H + +/** @file + * + * Command line option parsing + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stddef.h> +#include <ipxe/settings.h> + +struct net_device; +struct net_device_configurator; +struct menu; +struct parameters; + +/** A command-line option descriptor */ +struct option_descriptor { + /** Long option name, if any */ + const char *longopt; + /** Short option name */ + char shortopt; + /** Argument requirement (as for @c struct @c option) */ + uint8_t has_arg; + /** Offset of field within options structure */ + uint16_t offset; + /** Parse option + * + * @v text Option text + * @v value Option value to fill in + * @ret rc Return status code + */ + int ( * parse ) ( char *text, void *value ); +}; + +/** + * Construct option parser + * + * @v _struct Options structure type + * @v _field Field within options structure + * @v _parse Field type-specific option parser + * @ret _parse Generic option parser + */ +#define OPTION_PARSER( _struct, _field, _parse ) \ + ( ( int ( * ) ( char *text, void *value ) ) \ + ( ( ( ( typeof ( _parse ) * ) NULL ) == \ + ( ( int ( * ) ( char *text, \ + typeof ( ( ( _struct * ) NULL )->_field ) * ) ) \ + NULL ) ) ? _parse : _parse ) ) + +/** + * Construct option descriptor + * + * @v _longopt Long option name, if any + * @v _shortopt Short option name, if any + * @v _has_arg Argument requirement + * @v _struct Options structure type + * @v _field Field within options structure + * @v _parse Field type-specific option parser + * @ret _option Option descriptor + */ +#define OPTION_DESC( _longopt, _shortopt, _has_arg, _struct, _field, _parse ) \ + { \ + .longopt = _longopt, \ + .shortopt = _shortopt, \ + .has_arg = _has_arg, \ + .offset = offsetof ( _struct, _field ), \ + .parse = OPTION_PARSER ( _struct, _field, _parse ), \ + } + +/** A command descriptor */ +struct command_descriptor { + /** Option descriptors */ + struct option_descriptor *options; + /** Number of option descriptors */ + uint8_t num_options; + /** Length of option structure */ + uint8_t len; + /** Minimum number of non-option arguments */ + uint8_t min_args; + /** Maximum number of non-option arguments */ + uint8_t max_args; + /** Command usage + * + * This excludes the literal "Usage:" and the command name, + * which will be prepended automatically. + */ + const char *usage; +}; + +/** No maximum number of arguments */ +#define MAX_ARGUMENTS 0xff + +/** + * Construct command descriptor + * + * @v _struct Options structure type + * @v _options Option descriptor array + * @v _check_args Remaining argument checker + * @v _usage Command usage + * @ret _command Command descriptor + */ +#define COMMAND_DESC( _struct, _options, _min_args, _max_args, _usage ) \ + { \ + .options = ( ( ( ( typeof ( _options[0] ) * ) NULL ) == \ + ( ( struct option_descriptor * ) NULL ) ) ? \ + _options : _options ), \ + .num_options = ( sizeof ( _options ) / \ + sizeof ( _options[0] ) ), \ + .len = sizeof ( _struct ), \ + .min_args = _min_args, \ + .max_args = _max_args, \ + .usage = _usage, \ + } + +/** A parsed named setting */ +struct named_setting { + /** Settings block */ + struct settings *settings; + /** Setting */ + struct setting setting; +}; + +extern int parse_string ( char *text, char **value ); +extern int parse_integer ( char *text, unsigned int *value ); +extern int parse_timeout ( char *text, unsigned long *value ); +extern int parse_netdev ( char *text, struct net_device **netdev ); +extern int +parse_netdev_configurator ( char *text, + struct net_device_configurator **configurator ); +extern int parse_menu ( char *text, struct menu **menu ); +extern int parse_flag ( char *text __unused, int *flag ); +extern int parse_key ( char *text, unsigned int *key ); +extern int parse_settings ( char *text, struct settings **settings ); +extern int parse_setting ( char *text, struct named_setting *setting, + get_child_settings_t get_child ); +extern int parse_existing_setting ( char *text, struct named_setting *setting ); +extern int parse_autovivified_setting ( char *text, + struct named_setting *setting ); +extern int parse_parameters ( char *text, struct parameters **params ); +extern void print_usage ( struct command_descriptor *cmd, char **argv ); +extern int reparse_options ( int argc, char **argv, + struct command_descriptor *cmd, void *opts ); +extern int parse_options ( int argc, char **argv, + struct command_descriptor *cmd, void *opts ); + +#endif /* _IPXE_PARSEOPT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pci.h b/qemu/roms/ipxe/src/include/ipxe/pci.h new file mode 100644 index 000000000..692771ebe --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pci.h @@ -0,0 +1,441 @@ +#ifndef _IPXE_PCI_H +#define _IPXE_PCI_H + +/* + * Support for NE2000 PCI clones added David Monro June 1997 + * Generalised for other PCI NICs by Ken Yap July 1997 + * PCI support rewritten by Michael Brown 2006 + * + * Most of this is taken from /usr/src/linux/include/linux/pci.h. + */ + +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2, or (at + * your option) any later version. + */ + +FILE_LICENCE ( GPL2_ONLY ); + +#include <stdint.h> +#include <ipxe/device.h> +#include <ipxe/tables.h> +#include <ipxe/pci_io.h> +#include "pci_ids.h" + +/* + * PCI constants + * + */ + +#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ +#define PCI_COMMAND_MEM 0x2 /* Enable response in mem space */ +#define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */ + +#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ +#define PCI_LATENCY_TIMER 0x0d /* 8 bits */ + +#define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */ +#define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */ +#define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */ +#define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */ +#define PCI_COMMAND_WAIT 0x80 /* Enable address/data stepping */ +#define PCI_COMMAND_SERR 0x100 /* Enable SERR */ +#define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */ +#define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */ + + +#define PCI_VENDOR_ID 0x00 /* 16 bits */ +#define PCI_DEVICE_ID 0x02 /* 16 bits */ +#define PCI_COMMAND 0x04 /* 16 bits */ + +#define PCI_STATUS 0x06 /* 16 bits */ +#define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */ +#define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */ +#define PCI_STATUS_UDF 0x40 /* Support User Definable Features [obsolete] */ +#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ +#define PCI_STATUS_PARITY 0x100 /* Detected parity error */ +#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ +#define PCI_STATUS_DEVSEL_FAST 0x000 +#define PCI_STATUS_DEVSEL_MEDIUM 0x200 +#define PCI_STATUS_DEVSEL_SLOW 0x400 +#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ +#define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */ +#define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */ +#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */ +#define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */ + +#define PCI_REVISION 0x08 /* 8 bits */ +#define PCI_REVISION_ID 0x08 /* 8 bits */ +#define PCI_CLASS_REVISION 0x08 /* 32 bits */ +#define PCI_CLASS_CODE 0x0b /* 8 bits */ +#define PCI_SUBCLASS_CODE 0x0a /* 8 bits */ +#define PCI_HEADER_TYPE 0x0e /* 8 bits */ +#define PCI_HEADER_TYPE_NORMAL 0 +#define PCI_HEADER_TYPE_BRIDGE 1 +#define PCI_HEADER_TYPE_CARDBUS 2 + + +/* Header type 0 (normal devices) */ +#define PCI_CARDBUS_CIS 0x28 +#define PCI_SUBSYSTEM_VENDOR_ID 0x2c +#define PCI_SUBSYSTEM_ID 0x2e + +#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ +#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits */ +#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits */ +#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ +#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */ +#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */ + +#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */ +#define PCI_BASE_ADDRESS_SPACE_IO 0x01 +#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00 + +#define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06 +#define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */ +#define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */ +#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */ +#define PCI_BASE_ADDRESS_MEM_MASK (~0x0f) +#define PCI_BASE_ADDRESS_IO_MASK (~0x03) +#define PCI_ROM_ADDRESS 0x30 /* 32 bits */ +#define PCI_ROM_ADDRESS_ENABLE 0x01 /* Write 1 to enable ROM, + bits 31..11 are address, + 10..2 are reserved */ + +#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ + +#define PCI_INTERRUPT_LINE 0x3c /* IRQ number (0-15) */ +#define PCI_INTERRUPT_PIN 0x3d /* IRQ pin on PCI bus (A-D) */ + +/* Header type 1 (PCI-to-PCI bridges) */ +#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ +#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */ +#define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ +#define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */ +#define PCI_IO_BASE 0x1c /* I/O range behind the bridge */ +#define PCI_IO_LIMIT 0x1d +#define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */ +#define PCI_IO_RANGE_TYPE_16 0x00 +#define PCI_IO_RANGE_TYPE_32 0x01 +#define PCI_IO_RANGE_MASK ~0x0f +#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */ +#define PCI_MEMORY_BASE 0x20 /* Memory range behind */ +#define PCI_MEMORY_LIMIT 0x22 +#define PCI_MEMORY_RANGE_TYPE_MASK 0x0f +#define PCI_MEMORY_RANGE_MASK ~0x0f +#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */ +#define PCI_PREF_MEMORY_LIMIT 0x26 +#define PCI_PREF_RANGE_TYPE_MASK 0x0f +#define PCI_PREF_RANGE_TYPE_32 0x00 +#define PCI_PREF_RANGE_TYPE_64 0x01 +#define PCI_PREF_RANGE_MASK ~0x0f +#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ +#define PCI_PREF_LIMIT_UPPER32 0x2c +#define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */ +#define PCI_IO_LIMIT_UPPER16 0x32 +/* 0x34 same as for htype 0 */ +/* 0x35-0x3b is reserved */ +#define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */ +/* 0x3c-0x3d are same as for htype 0 */ +#define PCI_BRIDGE_CONTROL 0x3e +#define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ +#define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ +#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ +#define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ +#define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ +#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ +#define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */ + +#define PCI_CB_CAPABILITY_LIST 0x14 + +/* Capability lists */ + +#define PCI_CAP_LIST_ID 0 /* Capability ID */ +#define PCI_CAP_ID_PM 0x01 /* Power Management */ +#define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ +#define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */ +#define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */ +#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */ +#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ +#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific */ +#define PCI_CAP_ID_EXP 0x10 /* PCI Express */ +#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ +#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ +#define PCI_CAP_SIZEOF 4 + +/* Power Management Registers */ + +#define PCI_PM_PMC 2 /* PM Capabilities Register */ +#define PCI_PM_CAP_VER_MASK 0x0007 /* Version */ +#define PCI_PM_CAP_PME_CLOCK 0x0008 /* PME clock required */ +#define PCI_PM_CAP_RESERVED 0x0010 /* Reserved field */ +#define PCI_PM_CAP_DSI 0x0020 /* Device specific initialization */ +#define PCI_PM_CAP_AUX_POWER 0x01C0 /* Auxiliary power support mask */ +#define PCI_PM_CAP_D1 0x0200 /* D1 power state support */ +#define PCI_PM_CAP_D2 0x0400 /* D2 power state support */ +#define PCI_PM_CAP_PME 0x0800 /* PME pin supported */ +#define PCI_PM_CAP_PME_MASK 0xF800 /* PME Mask of all supported states */ +#define PCI_PM_CAP_PME_D0 0x0800 /* PME# from D0 */ +#define PCI_PM_CAP_PME_D1 0x1000 /* PME# from D1 */ +#define PCI_PM_CAP_PME_D2 0x2000 /* PME# from D2 */ +#define PCI_PM_CAP_PME_D3 0x4000 /* PME# from D3 (hot) */ +#define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */ +#define PCI_PM_CTRL 4 /* PM control and status register */ +#define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ +#define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */ +#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */ +#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */ +#define PCI_PM_CTRL_PME_STATUS 0x8000 /* PME pin status */ +#define PCI_PM_PPB_EXTENSIONS 6 /* PPB support extensions (??) */ +#define PCI_PM_PPB_B2_B3 0x40 /* Stop clock when in D3hot (??) */ +#define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) */ +#define PCI_PM_DATA_REGISTER 7 /* (??) */ +#define PCI_PM_SIZEOF 8 + +/* AGP registers */ + +#define PCI_AGP_VERSION 2 /* BCD version number */ +#define PCI_AGP_RFU 3 /* Rest of capability flags */ +#define PCI_AGP_STATUS 4 /* Status register */ +#define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */ +#define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */ +#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */ +#define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */ +#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported */ +#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */ +#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */ +#define PCI_AGP_COMMAND 8 /* Control register */ +#define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */ +#define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */ +#define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */ +#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */ +#define PCI_AGP_COMMAND_FW 0x0010 /* Force FW transfers */ +#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate */ +#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 2x rate */ +#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 1x rate */ +#define PCI_AGP_SIZEOF 12 + +/* Slot Identification */ + +#define PCI_SID_ESR 2 /* Expansion Slot Register */ +#define PCI_SID_ESR_NSLOTS 0x1f /* Number of expansion slots available */ +#define PCI_SID_ESR_FIC 0x20 /* First In Chassis Flag */ +#define PCI_SID_CHASSIS_NR 3 /* Chassis Number */ + +/* Message Signalled Interrupts registers */ + +#define PCI_MSI_FLAGS 2 /* Various flags */ +#define PCI_MSI_FLAGS_64BIT 0x80 /* 64-bit addresses allowed */ +#define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */ +#define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */ +#define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */ +#define PCI_MSI_RFU 3 /* Rest of capability flags */ +#define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */ +#define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */ +#define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */ +#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */ + +/* Advanced Error Reporting */ + +#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ +#define PCI_ERR_UNC_TRAIN 0x00000001 /* Training */ +#define PCI_ERR_UNC_DLP 0x00000010 /* Data Link Protocol */ +#define PCI_ERR_UNC_POISON_TLP 0x00001000 /* Poisoned TLP */ +#define PCI_ERR_UNC_FCP 0x00002000 /* Flow Control Protocol */ +#define PCI_ERR_UNC_COMP_TIME 0x00004000 /* Completion Timeout */ +#define PCI_ERR_UNC_COMP_ABORT 0x00008000 /* Completer Abort */ +#define PCI_ERR_UNC_UNX_COMP 0x00010000 /* Unexpected Completion */ +#define PCI_ERR_UNC_RX_OVER 0x00020000 /* Receiver Overflow */ +#define PCI_ERR_UNC_MALF_TLP 0x00040000 /* Malformed TLP */ +#define PCI_ERR_UNC_ECRC 0x00080000 /* ECRC Error Status */ +#define PCI_ERR_UNC_UNSUP 0x00100000 /* Unsupported Request */ +#define PCI_ERR_UNCOR_MASK 8 /* Uncorrectable Error Mask */ + /* Same bits as above */ +#define PCI_ERR_UNCOR_SEVER 12 /* Uncorrectable Error Severity */ + /* Same bits as above */ +#define PCI_ERR_COR_STATUS 16 /* Correctable Error Status */ +#define PCI_ERR_COR_RCVR 0x00000001 /* Receiver Error Status */ +#define PCI_ERR_COR_BAD_TLP 0x00000040 /* Bad TLP Status */ +#define PCI_ERR_COR_BAD_DLLP 0x00000080 /* Bad DLLP Status */ +#define PCI_ERR_COR_REP_ROLL 0x00000100 /* REPLAY_NUM Rollover */ +#define PCI_ERR_COR_REP_TIMER 0x00001000 /* Replay Timer Timeout */ +#define PCI_ERR_COR_MASK 20 /* Correctable Error Mask */ + /* Same bits as above */ + +/** A PCI device ID list entry */ +struct pci_device_id { + /** Name */ + const char *name; + /** PCI vendor ID */ + uint16_t vendor; + /** PCI device ID */ + uint16_t device; + /** Arbitrary driver data */ + unsigned long driver_data; +}; + +/** Match-anything ID */ +#define PCI_ANY_ID 0xffff + +/** A PCI device */ +struct pci_device { + /** Generic device */ + struct device dev; + /** Memory base + * + * This is the physical address of the first valid memory BAR. + */ + unsigned long membase; + /** + * I/O address + * + * This is the physical address of the first valid I/O BAR. + */ + unsigned long ioaddr; + /** Vendor ID */ + uint16_t vendor; + /** Device ID */ + uint16_t device; + /** Device class */ + uint32_t class; + /** Interrupt number */ + uint8_t irq; + /** Bus, device, and function (bus:dev.fn) number */ + uint16_t busdevfn; + /** Driver for this device */ + struct pci_driver *driver; + /** Driver-private data + * + * Use pci_set_drvdata() and pci_get_drvdata() to access this + * field. + */ + void *priv; + /** Driver device ID */ + struct pci_device_id *id; +}; + +/** A PCI driver */ +struct pci_driver { + /** PCI ID table */ + struct pci_device_id *ids; + /** Number of entries in PCI ID table */ + unsigned int id_count; + /** + * Probe device + * + * @v pci PCI device + * @ret rc Return status code + */ + int ( * probe ) ( struct pci_device *pci ); + /** + * Remove device + * + * @v pci PCI device + */ + void ( * remove ) ( struct pci_device *pci ); +}; + +/** PCI driver table */ +#define PCI_DRIVERS __table ( struct pci_driver, "pci_drivers" ) + +/** Declare a PCI driver */ +#define __pci_driver __table_entry ( PCI_DRIVERS, 01 ) + +/** Declare a fallback PCI driver */ +#define __pci_driver_fallback __table_entry ( PCI_DRIVERS, 02 ) + +#define PCI_BUS( busdevfn ) ( ( (busdevfn) >> 8 ) & 0xff ) +#define PCI_SLOT( busdevfn ) ( ( (busdevfn) >> 3 ) & 0x1f ) +#define PCI_FUNC( busdevfn ) ( ( (busdevfn) >> 0 ) & 0x07 ) +#define PCI_BUSDEVFN( bus, slot, func ) \ + ( ( (bus) << 8 ) | ( (slot) << 3 ) | ( (func) << 0 ) ) +#define PCI_FIRST_FUNC( busdevfn ) ( (busdevfn) & ~0x07 ) + +#define PCI_BASE_CLASS( class ) ( (class) >> 16 ) +#define PCI_SUB_CLASS( class ) ( ( (class) >> 8 ) & 0xff ) +#define PCI_PROG_INTF( class ) ( (class) & 0xff ) + +/* + * PCI_ROM is used to build up entries in a struct pci_id array. It + * is also parsed by parserom.pl to generate Makefile rules and files + * for rom-o-matic. + * + * PCI_ID can be used to generate entries without creating a + * corresponding ROM in the build process. + */ +#define PCI_ID( _vendor, _device, _name, _description, _data ) { \ + .vendor = _vendor, \ + .device = _device, \ + .name = _name, \ + .driver_data = _data \ +} +#define PCI_ROM( _vendor, _device, _name, _description, _data ) \ + PCI_ID( _vendor, _device, _name, _description, _data ) + +/** PCI device debug message format */ +#define PCI_FMT "PCI %02x:%02x.%x" + +/** PCI device debug message arguments */ +#define PCI_ARGS( pci ) \ + PCI_BUS ( (pci)->busdevfn ), PCI_SLOT ( (pci)->busdevfn ), \ + PCI_FUNC ( (pci)->busdevfn ) + +extern void adjust_pci_device ( struct pci_device *pci ); +extern unsigned long pci_bar_start ( struct pci_device *pci, + unsigned int reg ); +extern int pci_read_config ( struct pci_device *pci ); +extern int pci_find_next ( struct pci_device *pci, unsigned int busdevfn ); +extern int pci_find_driver ( struct pci_device *pci ); +extern int pci_probe ( struct pci_device *pci ); +extern void pci_remove ( struct pci_device *pci ); +extern int pci_find_capability ( struct pci_device *pci, int capability ); +extern unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg ); + +/** + * Initialise PCI device + * + * @v pci PCI device + * @v busdevfn PCI bus:dev.fn address + */ +static inline void pci_init ( struct pci_device *pci, unsigned int busdevfn ) { + pci->busdevfn = busdevfn; +} + +/** + * Set PCI driver + * + * @v pci PCI device + * @v driver PCI driver + * @v id PCI device ID + */ +static inline void pci_set_driver ( struct pci_device *pci, + struct pci_driver *driver, + struct pci_device_id *id ) { + pci->driver = driver; + pci->id = id; + pci->dev.driver_name = id->name; +} + +/** + * Set PCI driver-private data + * + * @v pci PCI device + * @v priv Private data + */ +static inline void pci_set_drvdata ( struct pci_device *pci, void *priv ) { + pci->priv = priv; +} + +/** + * Get PCI driver-private data + * + * @v pci PCI device + * @ret priv Private data + */ +static inline void * pci_get_drvdata ( struct pci_device *pci ) { + return pci->priv; +} + +#endif /* _IPXE_PCI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pci_ids.h b/qemu/roms/ipxe/src/include/ipxe/pci_ids.h new file mode 100644 index 000000000..25c7782bc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pci_ids.h @@ -0,0 +1,351 @@ +#ifndef _IPXE_PCI_IDS_H +#define _IPXE_PCI_IDS_H + +/* + * PCI Class, Vendor and Device IDs + * + * Please keep sorted. + */ + +FILE_LICENCE ( GPL2_ONLY ); + +/* Device classes and subclasses */ + +#define PCI_CLASS_NOT_DEFINED 0x0000 +#define PCI_CLASS_NOT_DEFINED_VGA 0x0001 + +#define PCI_BASE_CLASS_STORAGE 0x01 +#define PCI_CLASS_STORAGE_SCSI 0x0100 +#define PCI_CLASS_STORAGE_IDE 0x0101 +#define PCI_CLASS_STORAGE_FLOPPY 0x0102 +#define PCI_CLASS_STORAGE_IPI 0x0103 +#define PCI_CLASS_STORAGE_RAID 0x0104 +#define PCI_CLASS_STORAGE_OTHER 0x0180 + +#define PCI_BASE_CLASS_NETWORK 0x02 +#define PCI_CLASS_NETWORK_ETHERNET 0x0200 +#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 +#define PCI_CLASS_NETWORK_FDDI 0x0202 +#define PCI_CLASS_NETWORK_ATM 0x0203 +#define PCI_CLASS_NETWORK_OTHER 0x0280 + +#define PCI_BASE_CLASS_DISPLAY 0x03 +#define PCI_CLASS_DISPLAY_VGA 0x0300 +#define PCI_CLASS_DISPLAY_XGA 0x0301 +#define PCI_CLASS_DISPLAY_3D 0x0302 +#define PCI_CLASS_DISPLAY_OTHER 0x0380 + +#define PCI_BASE_CLASS_MULTIMEDIA 0x04 +#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 +#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 +#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 +#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 + +#define PCI_BASE_CLASS_MEMORY 0x05 +#define PCI_CLASS_MEMORY_RAM 0x0500 +#define PCI_CLASS_MEMORY_FLASH 0x0501 +#define PCI_CLASS_MEMORY_OTHER 0x0580 + +#define PCI_BASE_CLASS_BRIDGE 0x06 +#define PCI_CLASS_BRIDGE_HOST 0x0600 +#define PCI_CLASS_BRIDGE_ISA 0x0601 +#define PCI_CLASS_BRIDGE_EISA 0x0602 +#define PCI_CLASS_BRIDGE_MC 0x0603 +#define PCI_CLASS_BRIDGE_PCI 0x0604 +#define PCI_CLASS_BRIDGE_PCMCIA 0x0605 +#define PCI_CLASS_BRIDGE_NUBUS 0x0606 +#define PCI_CLASS_BRIDGE_CARDBUS 0x0607 +#define PCI_CLASS_BRIDGE_RACEWAY 0x0608 +#define PCI_CLASS_BRIDGE_OTHER 0x0680 + +#define PCI_BASE_CLASS_COMMUNICATION 0x07 +#define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 +#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 +#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 +#define PCI_CLASS_COMMUNICATION_MODEM 0x0703 +#define PCI_CLASS_COMMUNICATION_OTHER 0x0780 + +#define PCI_BASE_CLASS_SYSTEM 0x08 +#define PCI_CLASS_SYSTEM_PIC 0x0800 +#define PCI_CLASS_SYSTEM_DMA 0x0801 +#define PCI_CLASS_SYSTEM_TIMER 0x0802 +#define PCI_CLASS_SYSTEM_RTC 0x0803 +#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 +#define PCI_CLASS_SYSTEM_OTHER 0x0880 + +#define PCI_BASE_CLASS_INPUT 0x09 +#define PCI_CLASS_INPUT_KEYBOARD 0x0900 +#define PCI_CLASS_INPUT_PEN 0x0901 +#define PCI_CLASS_INPUT_MOUSE 0x0902 +#define PCI_CLASS_INPUT_SCANNER 0x0903 +#define PCI_CLASS_INPUT_GAMEPORT 0x0904 +#define PCI_CLASS_INPUT_OTHER 0x0980 + +#define PCI_BASE_CLASS_DOCKING 0x0a +#define PCI_CLASS_DOCKING_GENERIC 0x0a00 +#define PCI_CLASS_DOCKING_OTHER 0x0a80 + +#define PCI_BASE_CLASS_PROCESSOR 0x0b +#define PCI_CLASS_PROCESSOR_386 0x0b00 +#define PCI_CLASS_PROCESSOR_486 0x0b01 +#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 +#define PCI_CLASS_PROCESSOR_ALPHA 0x0b10 +#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 +#define PCI_CLASS_PROCESSOR_MIPS 0x0b30 +#define PCI_CLASS_PROCESSOR_CO 0x0b40 + +#define PCI_BASE_CLASS_SERIAL 0x0c +#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 +#define PCI_CLASS_SERIAL_ACCESS 0x0c01 +#define PCI_CLASS_SERIAL_SSA 0x0c02 +#define PCI_CLASS_SERIAL_USB 0x0c03 +#define PCI_CLASS_SERIAL_FIBER 0x0c04 +#define PCI_CLASS_SERIAL_SMBUS 0x0c05 + +#define PCI_BASE_CLASS_INTELLIGENT 0x0e +#define PCI_CLASS_INTELLIGENT_I2O 0x0e00 + +#define PCI_BASE_CLASS_SATELLITE 0x0f +#define PCI_CLASS_SATELLITE_TV 0x0f00 +#define PCI_CLASS_SATELLITE_AUDIO 0x0f01 +#define PCI_CLASS_SATELLITE_VOICE 0x0f03 +#define PCI_CLASS_SATELLITE_DATA 0x0f04 + +#define PCI_BASE_CLASS_CRYPT 0x10 +#define PCI_CLASS_CRYPT_NETWORK 0x1000 +#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 +#define PCI_CLASS_CRYPT_OTHER 0x1080 + +#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 +#define PCI_CLASS_SP_DPIO 0x1100 +#define PCI_CLASS_SP_OTHER 0x1180 + +#define PCI_CLASS_OTHERS 0xff + +/* Vendors */ + +#define PCI_VENDOR_ID_DYNALINK 0x0675 +#define PCI_VENDOR_ID_BERKOM 0x0871 +#define PCI_VENDOR_ID_COMPAQ 0x0e11 +#define PCI_VENDOR_ID_NCR 0x1000 +#define PCI_VENDOR_ID_LSI_LOGIC 0x1000 +#define PCI_VENDOR_ID_ATI 0x1002 +#define PCI_VENDOR_ID_VLSI 0x1004 +#define PCI_VENDOR_ID_ADL 0x1005 +#define PCI_VENDOR_ID_NS 0x100b +#define PCI_VENDOR_ID_TSENG 0x100c +#define PCI_VENDOR_ID_WEITEK 0x100e +#define PCI_VENDOR_ID_DEC 0x1011 +#define PCI_VENDOR_ID_CIRRUS 0x1013 +#define PCI_VENDOR_ID_IBM 0x1014 +#define PCI_VENDOR_ID_COMPEX2 0x101a +/* pci.ids says "AT&T GIS (NCR)" */ +#define PCI_VENDOR_ID_WD 0x101c +#define PCI_VENDOR_ID_AMI 0x101e +#define PCI_VENDOR_ID_AMD 0x1022 +#define PCI_VENDOR_ID_TRIDENT 0x1023 +#define PCI_VENDOR_ID_AI 0x1025 +#define PCI_VENDOR_ID_DELL 0x1028 +#define PCI_VENDOR_ID_MATROX 0x102B +#define PCI_VENDOR_ID_CT 0x102c +#define PCI_VENDOR_ID_MIRO 0x1031 +#define PCI_VENDOR_ID_NEC 0x1033 +#define PCI_VENDOR_ID_FD 0x1036 +#define PCI_VENDOR_ID_SIS 0x1039 +#define PCI_VENDOR_ID_SI 0x1039 +#define PCI_VENDOR_ID_HP 0x103c +#define PCI_VENDOR_ID_PCTECH 0x1042 +#define PCI_VENDOR_ID_ASUSTEK 0x1043 +#define PCI_VENDOR_ID_DPT 0x1044 +#define PCI_VENDOR_ID_OPTI 0x1045 +#define PCI_VENDOR_ID_ELSA 0x1048 +#define PCI_VENDOR_ID_ELSA 0x1048 +#define PCI_VENDOR_ID_SGS 0x104a +#define PCI_VENDOR_ID_BUSLOGIC 0x104B +#define PCI_VENDOR_ID_TI 0x104c +#define PCI_VENDOR_ID_SONY 0x104d +#define PCI_VENDOR_ID_OAK 0x104e +/* Winbond have two vendor IDs! See 0x10ad as well */ +#define PCI_VENDOR_ID_WINBOND2 0x1050 +#define PCI_VENDOR_ID_ANIGMA 0x1051 +#define PCI_VENDOR_ID_EFAR 0x1055 +#define PCI_VENDOR_ID_MOTOROLA 0x1057 +#define PCI_VENDOR_ID_MOTOROLA_OOPS 0x1507 +#define PCI_VENDOR_ID_PROMISE 0x105a +#define PCI_VENDOR_ID_N9 0x105d +#define PCI_VENDOR_ID_UMC 0x1060 +#define PCI_VENDOR_ID_X 0x1061 +#define PCI_VENDOR_ID_MYLEX 0x1069 +#define PCI_VENDOR_ID_PICOP 0x1066 +#define PCI_VENDOR_ID_APPLE 0x106b +#define PCI_VENDOR_ID_YAMAHA 0x1073 +#define PCI_VENDOR_ID_NEXGEN 0x1074 +#define PCI_VENDOR_ID_QLOGIC 0x1077 +#define PCI_VENDOR_ID_CYRIX 0x1078 +#define PCI_VENDOR_ID_LEADTEK 0x107d +#define PCI_VENDOR_ID_INTERPHASE 0x107e +#define PCI_VENDOR_ID_CONTAQ 0x1080 +#define PCI_VENDOR_ID_FOREX 0x1083 +#define PCI_VENDOR_ID_OLICOM 0x108d +#define PCI_VENDOR_ID_SUN 0x108e +#define PCI_VENDOR_ID_CMD 0x1095 +#define PCI_VENDOR_ID_VISION 0x1098 +#define PCI_VENDOR_ID_BROOKTREE 0x109e +#define PCI_VENDOR_ID_SIERRA 0x10a8 +#define PCI_VENDOR_ID_SGI 0x10a9 +#define PCI_VENDOR_ID_ACC 0x10aa +#define PCI_VENDOR_ID_WINBOND 0x10ad +#define PCI_VENDOR_ID_DATABOOK 0x10b3 +#define PCI_VENDOR_ID_PLX 0x10b5 +#define PCI_VENDOR_ID_MADGE 0x10b6 +#define PCI_VENDOR_ID_3COM 0x10b7 +#define PCI_VENDOR_ID_SMC 0x10b8 +#define PCI_VENDOR_ID_SUNDANCE 0x13F0 +#define PCI_VENDOR_ID_AL 0x10b9 +#define PCI_VENDOR_ID_MITSUBISHI 0x10ba +#define PCI_VENDOR_ID_SURECOM 0x10bd +#define PCI_VENDOR_ID_NEOMAGIC 0x10c8 +#define PCI_VENDOR_ID_ASP 0x10cd +#define PCI_VENDOR_ID_MACRONIX 0x10d9 +#define PCI_VENDOR_ID_TCONRAD 0x10da +#define PCI_VENDOR_ID_CERN 0x10dc +#define PCI_VENDOR_ID_NVIDIA 0x10de +#define PCI_VENDOR_ID_IMS 0x10e0 +#define PCI_VENDOR_ID_TEKRAM2 0x10e1 +#define PCI_VENDOR_ID_TUNDRA 0x10e3 +#define PCI_VENDOR_ID_AMCC 0x10e8 +#define PCI_VENDOR_ID_INTERG 0x10ea +#define PCI_VENDOR_ID_REALTEK 0x10ec +#define PCI_VENDOR_ID_XILINX 0x10ee +#define PCI_VENDOR_ID_TRUEVISION 0x10fa +#define PCI_VENDOR_ID_INIT 0x1101 +#define PCI_VENDOR_ID_CREATIVE 0x1102 +/* duplicate: ECTIVA */ +#define PCI_VENDOR_ID_ECTIVA 0x1102 +/* duplicate: CREATIVE */ +#define PCI_VENDOR_ID_TTI 0x1103 +#define PCI_VENDOR_ID_VIA 0x1106 +#define PCI_VENDOR_ID_VIATEC 0x1106 +#define PCI_VENDOR_ID_SIEMENS 0x110A +#define PCI_VENDOR_ID_SMC2 0x1113 +#define PCI_VENDOR_ID_VORTEX 0x1119 +#define PCI_VENDOR_ID_EF 0x111a +#define PCI_VENDOR_ID_IDT 0x111d +#define PCI_VENDOR_ID_FORE 0x1127 +#define PCI_VENDOR_ID_IMAGINGTECH 0x112f +#define PCI_VENDOR_ID_PHILIPS 0x1131 +#define PCI_VENDOR_ID_EICON 0x1133 +#define PCI_VENDOR_ID_CYCLONE 0x113c +#define PCI_VENDOR_ID_ALLIANCE 0x1142 +#define PCI_VENDOR_ID_SYSKONNECT 0x1148 +#define PCI_VENDOR_ID_VMIC 0x114a +#define PCI_VENDOR_ID_DIGI 0x114f +#define PCI_VENDOR_ID_MUTECH 0x1159 +#define PCI_VENDOR_ID_XIRCOM 0x115d +#define PCI_VENDOR_ID_RENDITION 0x1163 +#define PCI_VENDOR_ID_SERVERWORKS 0x1166 +#define PCI_VENDOR_ID_SBE 0x1176 +#define PCI_VENDOR_ID_TOSHIBA 0x1179 +#define PCI_VENDOR_ID_RICOH 0x1180 +#define PCI_VENDOR_ID_DLINK 0x1186 +#define PCI_VENDOR_ID_ARTOP 0x1191 +#define PCI_VENDOR_ID_ZEITNET 0x1193 +#define PCI_VENDOR_ID_OMEGA 0x119b +#define PCI_VENDOR_ID_FUJITSU_ME 0x119e +#define PCI_SUBVENDOR_ID_KEYSPAN 0x11a9 +#define PCI_VENDOR_ID_GALILEO 0x11ab +#define PCI_VENDOR_ID_LINKSYS 0x11ad +#define PCI_VENDOR_ID_LITEON 0x11ad +#define PCI_VENDOR_ID_V3 0x11b0 +#define PCI_VENDOR_ID_NP 0x11bc +#define PCI_VENDOR_ID_ATT 0x11c1 +#define PCI_VENDOR_ID_SPECIALIX 0x11cb +#define PCI_VENDOR_ID_AURAVISION 0x11d1 +#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 +#define PCI_VENDOR_ID_IKON 0x11d5 +#define PCI_VENDOR_ID_ZORAN 0x11de +#define PCI_VENDOR_ID_KINETIC 0x11f4 +#define PCI_VENDOR_ID_COMPEX 0x11f6 +#define PCI_VENDOR_ID_RP 0x11fe +#define PCI_VENDOR_ID_CYCLADES 0x120e +#define PCI_VENDOR_ID_ESSENTIAL 0x120f +#define PCI_VENDOR_ID_O2 0x1217 +#define PCI_VENDOR_ID_3DFX 0x121a +#define PCI_VENDOR_ID_SIGMADES 0x1236 +#define PCI_VENDOR_ID_CCUBE 0x123f +#define PCI_VENDOR_ID_AVM 0x1244 +#define PCI_VENDOR_ID_DIPIX 0x1246 +#define PCI_VENDOR_ID_STALLION 0x124d +#define PCI_VENDOR_ID_OPTIBASE 0x1255 +#define PCI_VENDOR_ID_ESS 0x125d +#define PCI_VENDOR_ID_HARRIS 0x1260 +#define PCI_VENDOR_ID_SATSAGEM 0x1267 +#define PCI_VENDOR_ID_HUGHES 0x1273 +#define PCI_VENDOR_ID_ENSONIQ 0x1274 +#define PCI_VENDOR_ID_ROCKWELL 0x127A +#define PCI_VENDOR_ID_DAVICOM 0x1282 +#define PCI_VENDOR_ID_ITE 0x1283 +/* formerly Platform Tech */ +#define PCI_VENDOR_ID_ESS_OLD 0x1285 +#define PCI_VENDOR_ID_ALTEON 0x12ae +#define PCI_VENDOR_ID_USR 0x12B9 +#define PCI_VENDOR_ID_HOLTEK 0x12c3 +#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 +#define PCI_VENDOR_ID_PICTUREL 0x12c5 +#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 +#define PCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0 +#define PCI_SUBVENDOR_ID_CHASE_PCIRAS 0x124D +#define PCI_VENDOR_ID_AUREAL 0x12eb +#define PCI_VENDOR_ID_CBOARDS 0x1307 +#define PCI_VENDOR_ID_SIIG 0x131f +#define PCI_VENDOR_ID_ADMTEK 0x1317 +#define PCI_VENDOR_ID_DOMEX 0x134a +#define PCI_VENDOR_ID_QUATECH 0x135C +#define PCI_VENDOR_ID_SEALEVEL 0x135e +#define PCI_VENDOR_ID_HYPERCOPE 0x1365 +#define PCI_VENDOR_ID_KAWASAKI 0x136b +#define PCI_VENDOR_ID_LMC 0x1376 +#define PCI_VENDOR_ID_NETGEAR 0x1385 +#define PCI_VENDOR_ID_APPLICOM 0x1389 +#define PCI_VENDOR_ID_MOXA 0x1393 +#define PCI_VENDOR_ID_CCD 0x1397 +#define PCI_VENDOR_ID_MICROGATE 0x13c0 +#define PCI_VENDOR_ID_3WARE 0x13C1 +#define PCI_VENDOR_ID_ABOCOM 0x13D1 +#define PCI_VENDOR_ID_CMEDIA 0x13f6 +#define PCI_VENDOR_ID_LAVA 0x1407 +#define PCI_VENDOR_ID_TIMEDIA 0x1409 +#define PCI_VENDOR_ID_OXSEMI 0x1415 +#define PCI_VENDOR_ID_AIRONET 0x14b9 +#define PCI_VENDOR_ID_MYRICOM 0x14c1 +#define PCI_VENDOR_ID_TITAN 0x14D2 +#define PCI_VENDOR_ID_PANACOM 0x14d4 +#define PCI_VENDOR_ID_BROADCOM 0x14e4 +#define PCI_VENDOR_ID_SYBA 0x1592 +#define PCI_VENDOR_ID_MORETON 0x15aa +#define PCI_VENDOR_ID_ZOLTRIX 0x15b0 +#define PCI_VENDOR_ID_PDC 0x15e9 +#define PCI_VENDOR_ID_FSC 0x1734 +#define PCI_VENDOR_ID_SYMPHONY 0x1c1c +#define PCI_VENDOR_ID_TEKRAM 0x1de1 +#define PCI_VENDOR_ID_3DLABS 0x3d3d +#define PCI_VENDOR_ID_AVANCE 0x4005 +#define PCI_VENDOR_ID_AKS 0x416c +#define PCI_VENDOR_ID_NETVIN 0x4a14 +#define PCI_VENDOR_ID_S3 0x5333 +#define PCI_VENDOR_ID_DCI 0x6666 +#define PCI_VENDOR_ID_GENROCO 0x5555 +#define PCI_VENDOR_ID_INTEL 0x8086 +#define PCI_VENDOR_ID_COMPUTONE 0x8e0e +#define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e +#define PCI_VENDOR_ID_KTI 0x8e2e +#define PCI_VENDOR_ID_ADAPTEC 0x9004 +#define PCI_VENDOR_ID_ADAPTEC2 0x9005 +#define PCI_VENDOR_ID_ATRONICS 0x907f +#define PCI_VENDOR_ID_HOLTEK2 0x9412 +#define PCI_VENDOR_ID_NETMOS 0x9710 +#define PCI_SUBVENDOR_ID_EXSYS 0xd84d +#define PCI_VENDOR_ID_TIGERJET 0xe159 +#define PCI_VENDOR_ID_ARK 0xedd8 + +#endif /* _IPXE_PCI_IDS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pci_io.h b/qemu/roms/ipxe/src/include/ipxe/pci_io.h new file mode 100644 index 000000000..781b77fe1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pci_io.h @@ -0,0 +1,125 @@ +#ifndef _IPXE_PCI_IO_H +#define _IPXE_PCI_IO_H + +/** @file + * + * PCI I/O API + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/api.h> +#include <config/ioapi.h> + +/** + * Calculate static inline PCI I/O API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define PCIAPI_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( PCIAPI_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide a PCI I/O API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_PCIAPI( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( PCIAPI_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline PCI I/O API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_PCIAPI_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( PCIAPI_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent I/O API headers */ +#include <ipxe/efi/efi_pci_api.h> +#include <ipxe/linux/linux_pci.h> + +/* Include all architecture-dependent I/O API headers */ +#include <bits/pci_io.h> + +/** + * Determine number of PCI buses within system + * + * @ret num_bus Number of buses + */ +int pci_num_bus ( void ); + +/** + * Read byte from PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +int pci_read_config_byte ( struct pci_device *pci, unsigned int where, + uint8_t *value ); + +/** + * Read 16-bit word from PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +int pci_read_config_word ( struct pci_device *pci, unsigned int where, + uint16_t *value ); + +/** + * Read 32-bit dword from PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value read + * @ret rc Return status code + */ +int pci_read_config_dword ( struct pci_device *pci, unsigned int where, + uint32_t *value ); + +/** + * Write byte to PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +int pci_write_config_byte ( struct pci_device *pci, unsigned int where, + uint8_t value ); + +/** + * Write 16-bit word to PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +int pci_write_config_word ( struct pci_device *pci, unsigned int where, + uint16_t value ); + +/** + * Write 32-bit dword to PCI configuration space + * + * @v pci PCI device + * @v where Location within PCI configuration space + * @v value Value to be written + * @ret rc Return status code + */ +int pci_write_config_dword ( struct pci_device *pci, unsigned int where, + uint32_t value ); + +#endif /* _IPXE_PCI_IO_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pcibackup.h b/qemu/roms/ipxe/src/include/ipxe/pcibackup.h new file mode 100644 index 000000000..b9f55cf71 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pcibackup.h @@ -0,0 +1,33 @@ +#ifndef _IPXE_PCIBACKUP_H +#define _IPXE_PCIBACKUP_H + +/** @file + * + * PCI configuration space backup and restoration + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +/** A PCI configuration space backup */ +struct pci_config_backup { + uint32_t dwords[64]; +}; + +/** PCI configuration space backup exclusion list end marker */ +#define PCI_CONFIG_BACKUP_EXCLUDE_END 0xff + +/** Define a PCI configuration space backup exclusion list */ +#define PCI_CONFIG_BACKUP_EXCLUDE(...) \ + { __VA_ARGS__, PCI_CONFIG_BACKUP_EXCLUDE_END } + +extern void pci_backup ( struct pci_device *pci, + struct pci_config_backup *backup, + const uint8_t *exclude ); +extern void pci_restore ( struct pci_device *pci, + struct pci_config_backup *backup, + const uint8_t *exclude ); + +#endif /* _IPXE_PCIBACKUP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pcivpd.h b/qemu/roms/ipxe/src/include/ipxe/pcivpd.h new file mode 100644 index 000000000..0abf8a956 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pcivpd.h @@ -0,0 +1,181 @@ +#ifndef _IPXE_PCIVPD_H +#define _IPXE_PCIVPD_H + +/** + * @file + * + * PCI Vital Product Data + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <byteswap.h> +#include <ipxe/isapnp.h> +#include <ipxe/pci.h> + +/** PCI VPD address register */ +#define PCI_VPD_ADDRESS 0x02 + +/** PCI VPD write flag */ +#define PCI_VPD_FLAG 0x8000 + +/** PCI VPD data register */ +#define PCI_VPD_DATA 0x04 + +/** A PCI VPD field */ +struct pci_vpd_field { + /** Keyword */ + uint16_t keyword; + /** Length */ + uint8_t len; +} __attribute__ (( packed )); + +/** Maximum PCI VPD field length */ +#define PCI_VPD_MAX_LEN 0xff + +/** Construct PCI VPD field descriptor + * + * @v tag ISAPnP tag + * @v keyword1 First character of keyword + * @v keyword2 Second character of keyword + * @ret field VPD field descriptor + */ +#define PCI_VPD_FIELD( tag, keyword1, keyword2 ) \ + ( ( (tag) << 16 ) | ( (keyword2) << 8 ) | ( (keyword1) << 0 ) ) + +/** Construct PCI VPD whole-tag field descriptor + * + * @v tag ISAPnP tag + * @ret field VPD field descriptor + */ +#define PCI_VPD_WHOLE_TAG_FIELD( tag ) PCI_VPD_FIELD ( (tag), '\0', '\0' ) + +/** Extract PCI VPD ISAPnP tag + * + * @v field VPD field descriptor + * @ret tag ISAPnP tag + */ +#define PCI_VPD_TAG( field ) ( (field) >> 16 ) + +/** Extract PCI VPD keyword + * + * @v field VPD field descriptor + * @ret keyword Keyword + */ +#define PCI_VPD_KEYWORD( field ) ( cpu_to_le16 ( (field) & 0xffff ) ) + +/** PCI VPD field debug message format */ +#define PCI_VPD_FIELD_FMT "%c%c" + +/** PCI VPD field debug message arguments */ +#define PCI_VPD_FIELD_ARGS( field ) \ + ( (field) >> 0 ), ( (field) >> 8 ) + +/** PCI VPD Read-Only field tag */ +#define PCI_VPD_TAG_RO 0x90 + +/** PCI VPD Read-Write field tag */ +#define PCI_VPD_TAG_RW 0x91 + +/** PCI VPD Card Name field descriptor */ +#define PCI_VPD_FIELD_NAME PCI_VPD_WHOLE_TAG_FIELD ( ISAPNP_TAG_ANSISTR ) + +/** PCI VPD Part Number field descriptor */ +#define PCI_VPD_FIELD_PN PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'P', 'N' ) + +/** PCI VPD Engineering Change Level field descriptor */ +#define PCI_VPD_FIELD_EC PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'E', 'C' ) + +/** PCI VPD Fabric Geography field descriptor */ +#define PCI_VPD_FIELD_FG PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'F', 'G' ) + +/** PCI VPD Location field descriptor */ +#define PCI_VPD_FIELD_LC PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'L', 'C' ) + +/** PCI VPD Manufacturer ID field descriptor */ +#define PCI_VPD_FIELD_MN PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'M', 'N' ) + +/** PCI VPD PCI Geography field descriptor */ +#define PCI_VPD_FIELD_PG PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'P', 'G' ) + +/** PCI VPD Serial Number field descriptor */ +#define PCI_VPD_FIELD_SN PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'S', 'N' ) + +/** PCI VPD Extended Capability field descriptor */ +#define PCI_VPD_FIELD_CP PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'C', 'P' ) + +/** PCI VPD Checksum and Reserved field descriptor */ +#define PCI_VPD_FIELD_RV PCI_VPD_FIELD ( PCI_VPD_TAG_RO, 'R', 'V' ) + +/** PCI VPD Asset Tag field descriptor */ +#define PCI_VPD_FIELD_YA PCI_VPD_FIELD ( PCI_VPD_TAG_RW, 'Y', 'A' ) + +/** PCI VPD Remaining Read/Write Area field descriptor */ +#define PCI_VPD_FIELD_RW PCI_VPD_FIELD ( PCI_VPD_TAG_RW, 'R', 'W' ) + +/** Maximum wait for PCI VPD (in ms) */ +#define PCI_VPD_MAX_WAIT_MS 100 + +/** PCI VPD cache */ +struct pci_vpd_cache { + /** Address */ + int address; + /** Data */ + uint32_t data; +}; + +/** PCI VPD */ +struct pci_vpd { + /** PCI device */ + struct pci_device *pci; + /** VPD capability offset */ + int cap; + /** Read cache */ + struct pci_vpd_cache cache; +}; + +/** + * Check for presence of PCI VPD + * + * @v vpd PCI VPD + * @ret is_present VPD is present + */ +static inline __attribute__ (( always_inline )) int +pci_vpd_is_present ( struct pci_vpd *vpd ) { + return ( vpd->cap != 0 ); +} + +/** + * Check if PCI VPD read cache is valid + * + * @v vpd PCI VPD + * @ret is_valid Read cache is valid + */ +static inline __attribute__ (( always_inline )) int +pci_vpd_cache_is_valid ( struct pci_vpd *vpd ) { + return ( vpd->cache.address >= 0 ); +} + +/** + * Invalidate PCI VPD read cache + * + * @v vpd PCI VPD + */ +static inline __attribute__ (( always_inline )) void +pci_vpd_invalidate_cache ( struct pci_vpd *vpd ) { + vpd->cache.address = -1; +} + +extern int pci_vpd_init ( struct pci_vpd *vpd, struct pci_device *pci ); +extern int pci_vpd_read ( struct pci_vpd *vpd, unsigned int address, + void *buf, size_t len ); +extern int pci_vpd_write ( struct pci_vpd *vpd, unsigned int address, + const void *buf, size_t len ); +extern int pci_vpd_find ( struct pci_vpd *vpd, unsigned int field, + unsigned int *address, size_t *len ); +extern int pci_vpd_resize ( struct pci_vpd *vpd, unsigned int field, + size_t len, unsigned int *address ); + +#endif /* _IPXE_PCIVPD_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pending.h b/qemu/roms/ipxe/src/include/ipxe/pending.h new file mode 100644 index 000000000..e6a369813 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pending.h @@ -0,0 +1,42 @@ +#ifndef _IPXE_PENDING_H +#define _IPXE_PENDING_H + +/** @file + * + * Pending operations + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** A pending operation */ +struct pending_operation { + /** Pending count */ + unsigned int count; +}; + +/** + * Check if an operation is pending + * + * @v pending Pending operation + * @ret is_pending Operation is pending + */ +static inline int is_pending ( struct pending_operation *pending ) { + return ( pending->count != 0 ); +} + +extern int pending_total; + +/** + * Check if any operations are pending + * + * @ret have_pending Some operations are pending + */ +static inline int have_pending ( void ) { + return ( pending_total != 0 ); +} + +extern void pending_get ( struct pending_operation *pending ); +extern void pending_put ( struct pending_operation *pending ); + +#endif /* _IPXE_PENDING_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/ping.h b/qemu/roms/ipxe/src/include/ipxe/ping.h new file mode 100644 index 000000000..6cd376b6f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/ping.h @@ -0,0 +1,18 @@ +#ifndef _IPXE_PING_H +#define _IPXE_PING_H + +/** @file + * + * ICMP ping protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/iobuf.h> +#include <ipxe/tcpip.h> + +extern int ping_rx ( struct io_buffer *iobuf, + struct sockaddr_tcpip *st_src ); + +#endif /* _IPXE_PING_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pinger.h b/qemu/roms/ipxe/src/include/ipxe/pinger.h new file mode 100644 index 000000000..9932df6b0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pinger.h @@ -0,0 +1,24 @@ +#ifndef _IPXE_PINGER_H +#define _IPXE_PINGER_H + +/** @file + * + * ICMP ping sender + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/interface.h> +#include <ipxe/socket.h> + +extern int create_pinger ( struct interface *job, const char *hostname, + unsigned long timeout, size_t len, + unsigned int count, + void ( * callback ) ( struct sockaddr *peer, + unsigned int sequence, + size_t len, + int rc ) ); + +#endif /* _IPXE_PINGER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pixbuf.h b/qemu/roms/ipxe/src/include/ipxe/pixbuf.h new file mode 100644 index 000000000..106b666e6 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pixbuf.h @@ -0,0 +1,55 @@ +#ifndef _IPXE_PIXBUF_H +#define _IPXE_PIXBUF_H + +/** @file + * + * Pixel buffer + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <ipxe/refcnt.h> +#include <ipxe/uaccess.h> + +/** A pixel buffer */ +struct pixel_buffer { + /** Reference count */ + struct refcnt refcnt; + /** Width */ + unsigned int width; + /** Height */ + unsigned int height; + /** 32-bit (8:8:8:8) xRGB pixel data, in host-endian order */ + userptr_t data; + /** Total length */ + size_t len; +}; + +/** + * Get reference to pixel buffer + * + * @v pixbuf Pixel buffer + * @ret pixbuf Pixel buffer + */ +static inline __attribute__ (( always_inline )) struct pixel_buffer * +pixbuf_get ( struct pixel_buffer *pixbuf ) { + ref_get ( &pixbuf->refcnt ); + return pixbuf; +} + +/** + * Drop reference to pixel buffer + * + * @v pixbuf Pixel buffer + */ +static inline __attribute__ (( always_inline )) void +pixbuf_put ( struct pixel_buffer *pixbuf ) { + ref_put ( &pixbuf->refcnt ); +} + +extern struct pixel_buffer * alloc_pixbuf ( unsigned int width, + unsigned int height ); + +#endif /* _IPXE_PIXBUF_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/png.h b/qemu/roms/ipxe/src/include/ipxe/png.h new file mode 100644 index 000000000..f51d1e6fe --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/png.h @@ -0,0 +1,179 @@ +#ifndef _IPXE_PNG_H +#define _IPXE_PNG_H + +/** @file + * + * Portable Network Graphics (PNG) format + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <byteswap.h> +#include <ipxe/image.h> + +/** A PNG file signature */ +struct png_signature { + /** Signature bytes */ + uint8_t bytes[8]; +} __attribute__ (( packed )); + +/** PNG file signature */ +#define PNG_SIGNATURE { { 0x89, 'P', 'N', 'G', '\r', '\n', 0x1a, '\n' } } + +/** A PNG chunk header */ +struct png_chunk_header { + /** Length of the chunk (excluding header and footer) */ + uint32_t len; + /** Chunk type */ + uint32_t type; +} __attribute__ (( packed )); + +/** A PNG chunk footer */ +struct png_chunk_footer { + /** CRC */ + uint32_t crc; +} __attribute__ (( packed )); + +/** PNG chunk type property bits */ +enum png_chunk_type_bits { + /** Chunk is ancillary */ + PNG_CHUNK_ANCILLARY = 0x20000000UL, + /** Chunk is private */ + PNG_CHUNK_PRIVATE = 0x00200000UL, + /** Reserved */ + PNG_CHUNK_RESERVED = 0x00002000UL, + /** Chunk is safe to copy */ + PNG_CHUNK_SAFE = 0x00000020UL, +}; + +/** + * Canonicalise PNG chunk type + * + * @v type Raw chunk type + * @ret type Canonicalised chunk type (excluding property bits) + */ +static inline __attribute__ (( always_inline )) uint32_t +png_canonical_type ( uint32_t type ) { + return ( type & ~( htonl ( PNG_CHUNK_ANCILLARY | PNG_CHUNK_PRIVATE | + PNG_CHUNK_RESERVED | PNG_CHUNK_SAFE ) ) ); +} + +/** + * Define a canonical PNG chunk type + * + * @v first First letter (in upper case) + * @v second Second letter (in upper case) + * @v third Third letter (in upper case) + * @v fourth Fourth letter (in upper case) + * @ret type Canonical chunk type + */ +#define PNG_TYPE( first, second, third, fourth ) \ + ( ( (first) << 24 ) | ( (second) << 16 ) | ( (third) << 8 ) | (fourth) ) + +/** PNG image header chunk type */ +#define PNG_TYPE_IHDR PNG_TYPE ( 'I', 'H', 'D', 'R' ) + +/** A PNG image header */ +struct png_image_header { + /** Width */ + uint32_t width; + /** Height */ + uint32_t height; + /** Bit depth */ + uint8_t depth; + /** Colour type */ + uint8_t colour_type; + /** Compression method */ + uint8_t compression; + /** Filter method */ + uint8_t filter; + /** Interlace method */ + uint8_t interlace; +} __attribute__ (( packed )); + +/** PNG colour type bits */ +enum png_colour_type { + /** Palette is used */ + PNG_COLOUR_TYPE_PALETTE = 0x01, + /** RGB colour is used */ + PNG_COLOUR_TYPE_RGB = 0x02, + /** Alpha channel is used */ + PNG_COLOUR_TYPE_ALPHA = 0x04, +}; + +/** PNG colour type mask */ +#define PNG_COLOUR_TYPE_MASK 0x07 + +/** PNG compression methods */ +enum png_compression_method { + /** DEFLATE compression with 32kB sliding window */ + PNG_COMPRESSION_DEFLATE = 0x00, + /** First unknown compression method */ + PNG_COMPRESSION_UNKNOWN = 0x01, +}; + +/** PNG filter methods */ +enum png_filter_method { + /** Adaptive filtering with five basic types */ + PNG_FILTER_BASIC = 0x00, + /** First unknown filter method */ + PNG_FILTER_UNKNOWN = 0x01, +}; + +/** PNG interlace methods */ +enum png_interlace_method { + /** No interlacing */ + PNG_INTERLACE_NONE = 0x00, + /** Adam7 interlacing */ + PNG_INTERLACE_ADAM7 = 0x01, + /** First unknown interlace method */ + PNG_INTERLACE_UNKNOWN = 0x02, +}; + +/** PNG palette chunk type */ +#define PNG_TYPE_PLTE PNG_TYPE ( 'P', 'L', 'T', 'E' ) + +/** A PNG palette entry */ +struct png_palette_entry { + /** Red */ + uint8_t red; + /** Green */ + uint8_t green; + /** Blue */ + uint8_t blue; +} __attribute__ (( packed )); + +/** A PNG palette chunk */ +struct png_palette { + /** Palette entries */ + struct png_palette_entry entries[0]; +} __attribute__ (( packed )); + +/** Maximum number of PNG palette entries */ +#define PNG_PALETTE_COUNT 256 + +/** PNG image data chunk type */ +#define PNG_TYPE_IDAT PNG_TYPE ( 'I', 'D', 'A', 'T' ) + +/** PNG basic filter types */ +enum png_basic_filter_type { + /** No filtering */ + PNG_FILTER_BASIC_NONE = 0, + /** Left byte used as predictor */ + PNG_FILTER_BASIC_SUB = 1, + /** Above byte used as predictor */ + PNG_FILTER_BASIC_UP = 2, + /** Above and left bytes used as predictors */ + PNG_FILTER_BASIC_AVERAGE = 3, + /** Paeth filter */ + PNG_FILTER_BASIC_PAETH = 4, +}; + +/** PNG image end chunk type */ +#define PNG_TYPE_IEND PNG_TYPE ( 'I', 'E', 'N', 'D' ) + +extern struct image_type png_image_type __image_type ( PROBE_NORMAL ); + +#endif /* _IPXE_PNG_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/pnm.h b/qemu/roms/ipxe/src/include/ipxe/pnm.h new file mode 100644 index 000000000..536c14d5f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/pnm.h @@ -0,0 +1,86 @@ +#ifndef _IPXE_PNM_H +#define _IPXE_PNM_H + +/** @file + * + * Portable anymap format (PNM) + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/uaccess.h> +#include <ipxe/image.h> + +/** PNM signature */ +struct pnm_signature { + /** Magic byte ('P') */ + char magic; + /** PNM type */ + char type; + /** Whitespace */ + char space; +} __attribute__ (( packed )); + +/** PNM magic byte */ +#define PNM_MAGIC 'P' + +/** PNM context */ +struct pnm_context { + /** PNM type */ + struct pnm_type *type; + /** Current byte offset */ + size_t offset; + /** Maximum length of ASCII values */ + size_t ascii_len; + /** Maximum pixel value */ + unsigned int max; +}; + +/** Default maximum length of ASCII values */ +#define PNM_ASCII_LEN 16 + +/** PNM type */ +struct pnm_type { + /** PNM type */ + char type; + /** Number of scalar values per pixel */ + uint8_t depth; + /** Number of pixels per composite value */ + uint8_t packing; + /** Flags */ + uint8_t flags; + /** Extract scalar value + * + * @v image PNM image + * @v pnm PNM context + * @ret value Value, or negative error + */ + int ( * scalar ) ( struct image *image, struct pnm_context *pnm ); + /** Convert composite value to 24-bit RGB + * + * @v composite Composite value + * @v index Pixel index within this composite value + * @ret rgb 24-bit RGB value + */ + uint32_t ( * rgb ) ( uint32_t composite, unsigned int index ); +}; + +/** PNM flags */ +enum pnm_flags { + /** Bitmap format + * + * If set, this flag indicates that: + * + * - the maximum scalar value is predefined as being equal to + * (2^packing-1), and is not present within the file, and + * + * - the maximum length of ASCII values is 1. + */ + PNM_BITMAP = 0x01, +}; + +extern struct image_type pnm_image_type __image_type ( PROBE_NORMAL ); + +#endif /* _IPXE_PNM_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/portmap.h b/qemu/roms/ipxe/src/include/ipxe/portmap.h new file mode 100644 index 000000000..9b735bbca --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/portmap.h @@ -0,0 +1,63 @@ +#ifndef _IPXE_PORTMAP_H +#define _IPXE_PORTMAP_H + +#include <stdint.h> +#include <ipxe/oncrpc.h> + +/** @file + * + * SUN ONC RPC protocol. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** PORTMAP default port */ +#define PORTMAP_PORT 111 + +/** PORTMAP protocol number */ +#define ONCRPC_PORTMAP 100000 + +/** PORTMAP version */ +#define PORTMAP_VERS 2 + + +/** TCP protocol number */ +#define PORTMAP_PROTO_TCP 6 +/** UDB protocol number */ +#define PORTMAP_PROTO_UDP 17 + + +/** + * A PORTMAP GETPORT reply + * + */ +struct portmap_getport_reply { + /** Port returned */ + uint32_t port; +}; + + +/** + * Prepare an ONC RPC session to be used as a PORTMAP session + * + * @v session ONC RPC session + * @v credential ONC RPC credential + * + * The credential parameter must not be NULL, use 'oncrpc_auth_none' if you + * don't want a particular scheme to be used. + */ +static inline void portmap_init_session ( struct oncrpc_session *session, + struct oncrpc_cred *credential) { + oncrpc_init_session ( session, credential, &oncrpc_auth_none, + ONCRPC_PORTMAP, PORTMAP_VERS ); +} + + +int portmap_getport ( struct interface *intf, struct oncrpc_session *session, + uint32_t prog, uint32_t vers, uint32_t proto ); +int portmap_get_getport_reply ( struct portmap_getport_reply *getport_reply, + struct oncrpc_reply *reply ); + + +#endif /* _IPXE_PORTMAP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/posix_io.h b/qemu/roms/ipxe/src/include/ipxe/posix_io.h new file mode 100644 index 000000000..11f3bb5c9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/posix_io.h @@ -0,0 +1,87 @@ +#ifndef _IPXE_POSIX_IO_H +#define _IPXE_POSIX_IO_H + +/** @file + * + * POSIX-like I/O + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/uaccess.h> + +/** Minimum file descriptor that will ever be allocated */ +#define POSIX_FD_MIN ( 1 ) + +/** Maximum file descriptor that will ever be allocated */ +#define POSIX_FD_MAX ( 31 ) + +/** File descriptor set as used for select() */ +typedef uint32_t fd_set; + +extern int open ( const char *uri_string ); +extern ssize_t read_user ( int fd, userptr_t buffer, + off_t offset, size_t len ); +extern int select ( fd_set *readfds, int wait ); +extern ssize_t fsize ( int fd ); +extern int close ( int fd ); + +/** + * Zero a file descriptor set + * + * @v set File descriptor set + */ +static inline __attribute__ (( always_inline )) void +FD_ZERO ( fd_set *set ) { + *set = 0; +} + +/** + * Set a bit within a file descriptor set + * + * @v fd File descriptor + * @v set File descriptor set + */ +static inline __attribute__ (( always_inline )) void +FD_SET ( int fd, fd_set *set ) { + *set |= ( 1 << fd ); +} + +/** + * Clear a bit within a file descriptor set + * + * @v fd File descriptor + * @v set File descriptor set + */ +static inline __attribute__ (( always_inline )) void +FD_CLR ( int fd, fd_set *set ) { + *set &= ~( 1 << fd ); +} + +/** + * Test a bit within a file descriptor set + * + * @v fd File descriptor + * @v set File descriptor set + * @ret is_set Corresponding bit is set + */ +static inline __attribute__ (( always_inline )) int +FD_ISSET ( int fd, fd_set *set ) { + return ( *set & ( 1 << fd ) ); +} + +/** + * Read data from file + * + * @v fd File descriptor + * @v buf Data buffer + * @v len Maximum length to read + * @ret len Actual length read, or negative error number + */ +static inline ssize_t read ( int fd, void *buf, size_t len ) { + return read_user ( fd, virt_to_user ( buf ), 0, len ); +} + +#endif /* _IPXE_POSIX_IO_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/privkey.h b/qemu/roms/ipxe/src/include/ipxe/privkey.h new file mode 100644 index 000000000..39049ac9f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/privkey.h @@ -0,0 +1,16 @@ +#ifndef _IPXE_PRIVKEY_H +#define _IPXE_PRIVKEY_H + +/** @file + * + * Private key + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/asn1.h> + +extern struct asn1_cursor private_key; + +#endif /* _IPXE_PRIVKEY_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/process.h b/qemu/roms/ipxe/src/include/ipxe/process.h new file mode 100644 index 000000000..2c76ff260 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/process.h @@ -0,0 +1,205 @@ +#ifndef _IPXE_PROCESS_H +#define _IPXE_PROCESS_H + +/** @file + * + * Processes + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/list.h> +#include <ipxe/refcnt.h> +#include <ipxe/tables.h> + +/** A process */ +struct process { + /** List of processes */ + struct list_head list; + /** Process descriptor */ + struct process_descriptor *desc; + /** Reference counter + * + * If this process is not part of a reference-counted object, + * this field may be NULL. + */ + struct refcnt *refcnt; +}; + +/** A process descriptor */ +struct process_descriptor { + /** Offset of process within containing object */ + size_t offset; + /** + * Single-step the process + * + * This method should execute a single step of the process. + * Returning from this method is isomorphic to yielding the + * CPU to another process. + */ + void ( * step ) ( void *object ); + /** Automatically reschedule the process */ + int reschedule; +}; + +/** + * Define a process step() method + * + * @v object_type Implementing method's expected object type + * @v step Implementing method + * @ret step Process step method + */ +#define PROC_STEP( object_type, step ) \ + ( ( ( ( typeof ( step ) * ) NULL ) == \ + ( ( void ( * ) ( object_type *object ) ) NULL ) ) ? \ + ( void ( * ) ( void *object ) ) step : \ + ( void ( * ) ( void *object ) ) step ) + +/** + * Calculate offset of process within containing object + * + * @v object_type Containing object data type + * @v name Process name (i.e. field within object data type) + * @ret offset Offset of process within containing object + */ +#define process_offset( object_type, name ) \ + ( ( ( ( typeof ( ( ( object_type * ) NULL )->name ) * ) NULL ) \ + == ( ( struct process * ) NULL ) ) \ + ? offsetof ( object_type, name ) \ + : offsetof ( object_type, name ) ) + +/** + * Define a process descriptor + * + * @v object_type Containing object data type + * @v process Process name (i.e. field within object data type) + * @v step Process' step() method + * @ret desc Object interface descriptor + */ +#define PROC_DESC( object_type, process, _step ) { \ + .offset = process_offset ( object_type, process ), \ + .step = PROC_STEP ( object_type, _step ), \ + .reschedule = 1, \ + } + +/** + * Define a process descriptor for a process that runs only once + * + * @v object_type Containing object data type + * @v process Process name (i.e. field within object data type) + * @v step Process' step() method + * @ret desc Object interface descriptor + */ +#define PROC_DESC_ONCE( object_type, process, _step ) { \ + .offset = process_offset ( object_type, process ), \ + .step = PROC_STEP ( object_type, _step ), \ + .reschedule = 0, \ + } + +/** + * Define a process descriptor for a pure process + * + * A pure process is a process that does not have a containing object. + * + * @v step Process' step() method + * @ret desc Object interface descriptor + */ +#define PROC_DESC_PURE( _step ) { \ + .offset = 0, \ + .step = PROC_STEP ( struct process, _step ), \ + .reschedule = 1, \ + } + +extern void * __attribute__ (( pure )) +process_object ( struct process *process ); +extern void process_add ( struct process *process ); +extern void process_del ( struct process *process ); +extern void step ( void ); + +/** + * Initialise process without adding to process list + * + * @v process Process + * @v desc Process descriptor + * @v refcnt Containing object reference count, or NULL + */ +static inline __attribute__ (( always_inline )) void +process_init_stopped ( struct process *process, + struct process_descriptor *desc, + struct refcnt *refcnt ) { + INIT_LIST_HEAD ( &process->list ); + process->desc = desc; + process->refcnt = refcnt; +} + +/** + * Initialise process and add to process list + * + * @v process Process + * @v desc Process descriptor + * @v refcnt Containing object reference count, or NULL + */ +static inline __attribute__ (( always_inline )) void +process_init ( struct process *process, + struct process_descriptor *desc, + struct refcnt *refcnt ) { + process_init_stopped ( process, desc, refcnt ); + process_add ( process ); +} + +/** + * Check if process is running + * + * @v process Process + * @ret running Process is running + */ +static inline __attribute__ (( always_inline )) int +process_running ( struct process *process ) { + return ( ! list_empty ( &process->list ) ); +} + +/** Permanent process table */ +#define PERMANENT_PROCESSES __table ( struct process, "processes" ) + +/** + * Declare a permanent process + * + * Permanent processes will be automatically added to the process list + * at initialisation time. + */ +#define __permanent_process __table_entry ( PERMANENT_PROCESSES, 01 ) + +/** Define a permanent process + * + */ +#define PERMANENT_PROCESS( name, step ) \ +static struct process_descriptor name ## _desc = PROC_DESC_PURE ( step ); \ +struct process name __permanent_process = { \ + .list = LIST_HEAD_INIT ( name.list ), \ + .desc = & name ## _desc, \ + .refcnt = NULL, \ +}; + +/** + * Find debugging colourisation for a process + * + * @v process Process + * @ret col Debugging colourisation + * + * Use as the first argument to DBGC() or equivalent macro. + */ +#define PROC_COL( process ) process_object ( process ) + +/** printf() format string for PROC_DBG() */ +#define PROC_FMT "%p+%zx" + +/** + * printf() arguments for representing a process + * + * @v process Process + * @ret args printf() argument list corresponding to PROC_FMT + */ +#define PROC_DBG( process ) process_object ( process ), (process)->desc->offset + +#endif /* _IPXE_PROCESS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/profile.h b/qemu/roms/ipxe/src/include/ipxe/profile.h new file mode 100644 index 000000000..3a745fcfa --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/profile.h @@ -0,0 +1,189 @@ +#ifndef _IPXE_PROFILE_H +#define _IPXE_PROFILE_H + +/** @file + * + * Profiling + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <bits/profile.h> +#include <ipxe/tables.h> + +#ifdef NDEBUG +#define PROFILING 0 +#else +#define PROFILING 1 +#endif + +/** + * A data structure for storing profiling information + */ +struct profiler { + /** Name */ + const char *name; + /** Start timestamp */ + unsigned long started; + /** Stop timestamp */ + unsigned long stopped; + /** Number of samples */ + unsigned int count; + /** Mean sample value (scaled) */ + unsigned long mean; + /** Mean sample value MSB + * + * This is the highest bit set in the raw (unscaled) value + * (i.e. one less than would be returned by flsl(raw_mean)). + */ + unsigned int mean_msb; + /** Accumulated variance (scaled) */ + unsigned long long accvar; + /** Accumulated variance MSB + * + * This is the highest bit set in the raw (unscaled) value + * (i.e. one less than would be returned by flsll(raw_accvar)). + */ + unsigned int accvar_msb; +}; + +/** Profiler table */ +#define PROFILERS __table ( struct profiler, "profilers" ) + +/** Declare a profiler */ +#if PROFILING +#define __profiler __table_entry ( PROFILERS, 01 ) +#else +#define __profiler +#endif + +extern unsigned long profile_excluded; + +extern void profile_update ( struct profiler *profiler, unsigned long sample ); +extern unsigned long profile_mean ( struct profiler *profiler ); +extern unsigned long profile_variance ( struct profiler *profiler ); +extern unsigned long profile_stddev ( struct profiler *profiler ); + +/** + * Get start time + * + * @v profiler Profiler + * @ret started Start time + */ +static inline __attribute__ (( always_inline )) unsigned long +profile_started ( struct profiler *profiler ) { + + /* If profiling is active then return start time */ + if ( PROFILING ) { + return ( profiler->started + profile_excluded ); + } else { + return 0; + } +} + +/** + * Get stop time + * + * @v profiler Profiler + * @ret stopped Stop time + */ +static inline __attribute__ (( always_inline )) unsigned long +profile_stopped ( struct profiler *profiler ) { + + /* If profiling is active then return start time */ + if ( PROFILING ) { + return ( profiler->stopped + profile_excluded ); + } else { + return 0; + } +} + +/** + * Get elapsed time + * + * @v profiler Profiler + * @ret elapsed Elapsed time + */ +static inline __attribute__ (( always_inline )) unsigned long +profile_elapsed ( struct profiler *profiler ) { + + /* If profiling is active then return elapsed time */ + if ( PROFILING ) { + return ( profile_stopped ( profiler ) - + profile_started ( profiler ) ); + } else { + return 0; + } +} + +/** + * Start profiling + * + * @v profiler Profiler + * @v started Start timestamp + */ +static inline __attribute__ (( always_inline )) void +profile_start_at ( struct profiler *profiler, unsigned long started ) { + + /* If profiling is active then record start timestamp */ + if ( PROFILING ) + profiler->started = ( started - profile_excluded ); +} + +/** + * Stop profiling + * + * @v profiler Profiler + * @v stopped Stop timestamp + */ +static inline __attribute__ (( always_inline )) void +profile_stop_at ( struct profiler *profiler, unsigned long stopped ) { + + /* If profiling is active then record end timestamp and update stats */ + if ( PROFILING ) { + profiler->stopped = ( stopped - profile_excluded ); + profile_update ( profiler, profile_elapsed ( profiler ) ); + } +} + +/** + * Start profiling + * + * @v profiler Profiler + */ +static inline __attribute__ (( always_inline )) void +profile_start ( struct profiler *profiler ) { + + /* If profiling is active then record start timestamp */ + if ( PROFILING ) + profile_start_at ( profiler, profile_timestamp() ); +} + +/** + * Stop profiling + * + * @v profiler Profiler + */ +static inline __attribute__ (( always_inline )) void +profile_stop ( struct profiler *profiler ) { + + /* If profiling is active then record end timestamp and update stats */ + if ( PROFILING ) + profile_stop_at ( profiler, profile_timestamp() ); +} + +/** + * Exclude time from other ongoing profiling results + * + * @v profiler Profiler + */ +static inline __attribute__ (( always_inline )) void +profile_exclude ( struct profiler *profiler ) { + + /* If profiling is active then update accumulated excluded time */ + if ( PROFILING ) + profile_excluded += profile_elapsed ( profiler ); +} + +#endif /* _IPXE_PROFILE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/random_nz.h b/qemu/roms/ipxe/src/include/ipxe/random_nz.h new file mode 100644 index 000000000..6bb80d2ab --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/random_nz.h @@ -0,0 +1,16 @@ +#ifndef _IPXE_RANDOM_NZ_H +#define _IPXE_RANDOM_NZ_H + +/** @file + * + * HMAC_DRBG algorithm + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +extern int get_random_nz ( void *data, size_t len ); + +#endif /* _IPXE_RANDOM_NZ_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/rarp.h b/qemu/roms/ipxe/src/include/ipxe/rarp.h new file mode 100644 index 000000000..f84301a43 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/rarp.h @@ -0,0 +1,16 @@ +#ifndef _IPXE_RARP_H +#define _IPXE_RARP_H + +/** @file + * + * Reverse Address Resolution Protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/netdevice.h> + +extern struct net_protocol rarp_protocol __net_protocol; + +#endif /* _IPXE_RARP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/rbg.h b/qemu/roms/ipxe/src/include/ipxe/rbg.h new file mode 100644 index 000000000..9689142f8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/rbg.h @@ -0,0 +1,43 @@ +#ifndef _IPXE_RBG_H +#define _IPXE_RBG_H + +/** @file + * + * RBG mechanism + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/drbg.h> + +/** An RBG */ +struct random_bit_generator { + /** DRBG state */ + struct drbg_state state; +}; + +extern struct random_bit_generator rbg; + +/** + * Generate bits using RBG + * + * @v additional Additional input + * @v additional_len Length of additional input + * @v prediction_resist Prediction resistance is required + * @v data Output buffer + * @v len Length of output buffer + * @ret rc Return status code + * + * This is the RBG_Generate function defined in ANS X9.82 Part 4 + * (April 2011 Draft) Section 9.1.2.2. + */ +static inline int rbg_generate ( const void *additional, size_t additional_len, + int prediction_resist, void *data, + size_t len ) { + return drbg_generate ( &rbg.state, additional, additional_len, + prediction_resist, data, len ); +} + +#endif /* _IPXE_RBG_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/rc80211.h b/qemu/roms/ipxe/src/include/ipxe/rc80211.h new file mode 100644 index 000000000..eac6bc9cf --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/rc80211.h @@ -0,0 +1,19 @@ +#ifndef _IPXE_RC80211_H +#define _IPXE_RC80211_H + +/** @file + * + * Rate-control algorithm prototype for 802.11. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct net80211_device; +struct rc80211_ctx; + +struct rc80211_ctx * rc80211_init ( struct net80211_device *dev ); +void rc80211_update_tx ( struct net80211_device *dev, int retries, int rc ); +void rc80211_update_rx ( struct net80211_device *dev, int retry, u16 rate ); +void rc80211_free ( struct rc80211_ctx *ctx ); + +#endif /* _IPXE_RC80211_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/reboot.h b/qemu/roms/ipxe/src/include/ipxe/reboot.h new file mode 100644 index 000000000..97e0d5fb6 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/reboot.h @@ -0,0 +1,68 @@ +#ifndef _IPXE_REBOOT_H +#define _IPXE_REBOOT_H + +/** @file + * + * iPXE reboot API + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/api.h> +#include <config/reboot.h> + +/** + * Calculate static inline reboot API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define REBOOT_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( REBOOT_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide an reboot API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_REBOOT( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( REBOOT_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline reboot API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_REBOOT_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( REBOOT_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent reboot API headers */ +#include <ipxe/null_reboot.h> +#include <ipxe/efi/efi_reboot.h> + +/* Include all architecture-dependent reboot API headers */ +#include <bits/reboot.h> + +/** + * Reboot system + * + * @v warm Perform a warm reboot + */ +void reboot ( int warm ); + +/** + * Power off system + * + * @ret rc Return status code + * + * This function may fail, since not all systems support being powered + * off by software. + */ +int poweroff ( void ); + +#endif /* _IPXE_REBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/refcnt.h b/qemu/roms/ipxe/src/include/ipxe/refcnt.h new file mode 100644 index 000000000..0e8b8658c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/refcnt.h @@ -0,0 +1,114 @@ +#ifndef _IPXE_REFCNT_H +#define _IPXE_REFCNT_H + +/** @file + * + * Reference counting + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <assert.h> + +/** + * A reference counter + * + * This data structure is designed to be embedded within a + * reference-counted object. + * + * Reference-counted objects are freed when their reference count + * drops below zero. This means that a freshly allocated-and-zeroed + * reference-counted object will be freed on the first call to + * ref_put(). + */ +struct refcnt { + /** Current reference count + * + * When this count is decremented below zero, the free() + * method will be called. + */ + int count; + /** Free containing object + * + * This method is called when the reference count is + * decremented below zero. + * + * If this method is left NULL, the standard library free() + * function will be called. The upshot of this is that you + * may omit the free() method if the @c refcnt object is the + * first element of your reference-counted struct. + */ + void ( * free ) ( struct refcnt *refcnt ); +}; + +/** + * Initialise a reference counter + * + * @v refcnt Reference counter + * @v free Freeing function + */ +static inline __attribute__ (( always_inline )) void +ref_init ( struct refcnt *refcnt, + void ( * free ) ( struct refcnt *refcnt ) ) { + refcnt->free = free; +} + +/** + * Initialise a reference counter + * + * @v refcnt Reference counter + * @v free Free containing object + */ +#define ref_init( refcnt, free ) do { \ + if ( __builtin_constant_p ( (free) ) && ( (free) == NULL ) ) { \ + /* Skip common case of no initialisation required */ \ + } else { \ + ref_init ( (refcnt), (free) ); \ + } \ + } while ( 0 ) + +/** + * Initialise a static reference counter + * + * @v free_fn Free containing object + */ +#define REF_INIT( free_fn ) { \ + .free = free_fn, \ + } + +extern void ref_increment ( struct refcnt *refcnt ); +extern void ref_decrement ( struct refcnt *refcnt ); + +/** + * Get additional reference to object + * + * @v refcnt Reference counter, or NULL + * @ret refcnt Reference counter + * + * If @c refcnt is NULL, no action is taken. + */ +#define ref_get( refcnt ) ( { \ + if ( refcnt ) \ + assert ( (refcnt)->count >= 0 ); \ + ref_increment ( refcnt ); \ + (refcnt); } ) + +/** + * Drop reference to object + * + * @v refcnt Reference counter, or NULL + * @ret refcnt Reference counter + * + * If @c refcnt is NULL, no action is taken. + */ +#define ref_put( refcnt ) do { \ + if ( refcnt ) \ + assert ( (refcnt)->count >= 0 ); \ + ref_decrement ( refcnt ); \ + } while ( 0 ) + +extern void ref_no_free ( struct refcnt *refcnt ); + +#endif /* _IPXE_REFCNT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/resolv.h b/qemu/roms/ipxe/src/include/ipxe/resolv.h new file mode 100644 index 000000000..d9868a5d7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/resolv.h @@ -0,0 +1,51 @@ +#ifndef _IPXE_RESOLV_H +#define _IPXE_RESOLV_H + +/** @file + * + * Name resolution + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/interface.h> +#include <ipxe/tables.h> + +struct sockaddr; + +/** A name resolver */ +struct resolver { + /** Name of this resolver (e.g. "DNS") */ + const char *name; + /** Start name resolution + * + * @v resolv Name resolution interface + * @v name Name to resolve + * @v sa Socket address to complete + * @ret rc Return status code + */ + int ( * resolv ) ( struct interface *resolv, const char *name, + struct sockaddr *sa ); +}; + +/** Numeric resolver priority */ +#define RESOLV_NUMERIC 01 + +/** Normal resolver priority */ +#define RESOLV_NORMAL 02 + +/** Resolvers table */ +#define RESOLVERS __table ( struct resolver, "resolvers" ) + +/** Register as a name resolver */ +#define __resolver( resolv_order ) __table_entry ( RESOLVERS, resolv_order ) + +extern void resolv_done ( struct interface *intf, struct sockaddr *sa ); +#define resolv_done_TYPE( object_type ) \ + typeof ( void ( object_type, struct sockaddr *sa ) ) + +extern int resolv ( struct interface *resolv, const char *name, + struct sockaddr *sa ); + +#endif /* _IPXE_RESOLV_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/retry.h b/qemu/roms/ipxe/src/include/ipxe/retry.h new file mode 100644 index 000000000..c514822b2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/retry.h @@ -0,0 +1,112 @@ +#ifndef _IPXE_RETRY_H +#define _IPXE_RETRY_H + +/** @file + * + * Retry timers + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/list.h> + +/** Default timeout value */ +#define DEFAULT_MIN_TIMEOUT ( TICKS_PER_SEC / 4 ) + +/** Limit after which the timeout will be deemed permanent */ +#define DEFAULT_MAX_TIMEOUT ( 10 * TICKS_PER_SEC ) + +/** A retry timer */ +struct retry_timer { + /** List of active timers */ + struct list_head list; + /** Timer is currently running */ + unsigned int running; + /** Timeout value (in ticks) */ + unsigned long timeout; + /** Minimum timeout value (in ticks) + * + * A value of zero means "use default timeout." + */ + unsigned long min_timeout; + /** Maximum timeout value before failure (in ticks) + * + * A value of zero means "use default timeout." + */ + unsigned long max_timeout; + /** Start time (in ticks) */ + unsigned long start; + /** Retry count */ + unsigned int count; + /** Timer expired callback + * + * @v timer Retry timer + * @v fail Failure indicator + * + * The timer will already be stopped when this method is + * called. The failure indicator will be True if the retry + * timeout has already exceeded @c MAX_TIMEOUT. + */ + void ( * expired ) ( struct retry_timer *timer, int over ); + /** Reference counter + * + * If this interface is not part of a reference-counted + * object, this field may be NULL. + */ + struct refcnt *refcnt; +}; + +/** + * Initialise a timer + * + * @v timer Retry timer + * @v expired Timer expired callback + * @v refcnt Reference counter, or NULL + */ +static inline __attribute__ (( always_inline )) void +timer_init ( struct retry_timer *timer, + void ( * expired ) ( struct retry_timer *timer, int over ), + struct refcnt *refcnt ) { + timer->expired = expired; + timer->refcnt = refcnt; +} + +/** + * Initialise a static timer + * + * @v expired_fn Timer expired callback + */ +#define TIMER_INIT( expired_fn ) { \ + .expired = (expired_fn), \ + } + +extern void start_timer ( struct retry_timer *timer ); +extern void start_timer_fixed ( struct retry_timer *timer, + unsigned long timeout ); +extern void stop_timer ( struct retry_timer *timer ); +extern void retry_poll ( void ); + +/** + * Start timer with no delay + * + * @v timer Retry timer + * + * This starts the timer running with a zero timeout value. + */ +static inline void start_timer_nodelay ( struct retry_timer *timer ) { + start_timer_fixed ( timer, 0 ); +} + +/** + * Test to see if timer is currently running + * + * @v timer Retry timer + * @ret running Non-zero if timer is running + */ +static inline __attribute__ (( always_inline )) unsigned long +timer_running ( struct retry_timer *timer ) { + return ( timer->running ); +} + +#endif /* _IPXE_RETRY_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/rootcert.h b/qemu/roms/ipxe/src/include/ipxe/rootcert.h new file mode 100644 index 000000000..6525df87a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/rootcert.h @@ -0,0 +1,16 @@ +#ifndef _IPXE_ROOTCERT_H +#define _IPXE_ROOTCERT_H + +/** @file + * + * Root certificate store + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/x509.h> + +extern struct x509_root root_certificates; + +#endif /* _IPXE_ROOTCERT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/rotate.h b/qemu/roms/ipxe/src/include/ipxe/rotate.h new file mode 100644 index 000000000..ba271ca74 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/rotate.h @@ -0,0 +1,33 @@ +#ifndef _IPXE_ROTATE_H +#define _IPXE_ROTATE_H + +/** @file + * + * Bit operations + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +static inline __attribute__ (( always_inline )) uint32_t +rol32 ( uint32_t data, unsigned int rotation ) { + return ( ( data << rotation ) | ( data >> ( 32 - rotation ) ) ); +} + +static inline __attribute__ (( always_inline )) uint32_t +ror32 ( uint32_t data, unsigned int rotation ) { + return ( ( data >> rotation ) | ( data << ( 32 - rotation ) ) ); +} + +static inline __attribute__ (( always_inline )) uint64_t +rol64 ( uint64_t data, unsigned int rotation ) { + return ( ( data << rotation ) | ( data >> ( 64 - rotation ) ) ); +} + +static inline __attribute__ (( always_inline )) uint64_t +ror64 ( uint64_t data, unsigned int rotation ) { + return ( ( data >> rotation ) | ( data << ( 64 - rotation ) ) ); +} + +#endif /* _IPXE_ROTATE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/rsa.h b/qemu/roms/ipxe/src/include/ipxe/rsa.h new file mode 100644 index 000000000..1a5ad8bab --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/rsa.h @@ -0,0 +1,81 @@ +#ifndef _IPXE_RSA_H +#define _IPXE_RSA_H + +/** @file + * + * RSA public-key cryptography + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/crypto.h> +#include <ipxe/bigint.h> +#include <ipxe/asn1.h> +#include <ipxe/tables.h> + +/** RSA digestAlgorithm sequence contents */ +#define RSA_DIGESTALGORITHM_CONTENTS( ... ) \ + ASN1_OID, VA_ARG_COUNT ( __VA_ARGS__ ), __VA_ARGS__, \ + ASN1_NULL, 0x00 + +/** RSA digestAlgorithm sequence */ +#define RSA_DIGESTALGORITHM( ... ) \ + ASN1_SEQUENCE, \ + VA_ARG_COUNT ( RSA_DIGESTALGORITHM_CONTENTS ( __VA_ARGS__ ) ), \ + RSA_DIGESTALGORITHM_CONTENTS ( __VA_ARGS__ ) + +/** RSA digest prefix */ +#define RSA_DIGEST_PREFIX( digest_size ) \ + ASN1_OCTET_STRING, digest_size + +/** RSA digestInfo prefix */ +#define RSA_DIGESTINFO_PREFIX( digest_size, ... ) \ + ASN1_SEQUENCE, \ + ( VA_ARG_COUNT ( RSA_DIGESTALGORITHM ( __VA_ARGS__ ) ) + \ + VA_ARG_COUNT ( RSA_DIGEST_PREFIX ( digest_size ) ) + \ + digest_size ), \ + RSA_DIGESTALGORITHM ( __VA_ARGS__ ), \ + RSA_DIGEST_PREFIX ( digest_size ) + +/** An RSA digestInfo prefix */ +struct rsa_digestinfo_prefix { + /** Digest algorithm */ + struct digest_algorithm *digest; + /** Prefix */ + const void *data; + /** Length of prefix */ + size_t len; +}; + +/** RSA digestInfo prefix table */ +#define RSA_DIGESTINFO_PREFIXES \ + __table ( struct rsa_digestinfo_prefix, "rsa_digestinfo_prefixes" ) + +/** Declare an RSA digestInfo prefix */ +#define __rsa_digestinfo_prefix __table_entry ( RSA_DIGESTINFO_PREFIXES, 01 ) + +/** An RSA context */ +struct rsa_context { + /** Allocated memory */ + void *dynamic; + /** Modulus */ + bigint_element_t *modulus0; + /** Modulus size */ + unsigned int size; + /** Modulus length */ + size_t max_len; + /** Exponent */ + bigint_element_t *exponent0; + /** Exponent size */ + unsigned int exponent_size; + /** Input buffer */ + bigint_element_t *input0; + /** Output buffer */ + bigint_element_t *output0; + /** Temporary working space for modular exponentiation */ + void *tmp; +}; + +extern struct pubkey_algorithm rsa_algorithm; + +#endif /* _IPXE_RSA_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/sanboot.h b/qemu/roms/ipxe/src/include/ipxe/sanboot.h new file mode 100644 index 000000000..14c8a5da4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/sanboot.h @@ -0,0 +1,100 @@ +#ifndef _IPXE_SANBOOT_H +#define _IPXE_SANBOOT_H + +/** @file + * + * iPXE sanboot API + * + * The sanboot API provides methods for hooking, unhooking, + * describing, and booting from SAN devices. + * + * The standard methods (readl()/writel() etc.) do not strictly check + * the type of the address parameter; this is because traditional + * usage does not necessarily provide the correct pointer type. For + * example, code written for ISA devices at fixed I/O addresses (such + * as the keyboard controller) tend to use plain integer constants for + * the address parameter. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/api.h> +#include <config/sanboot.h> + +struct uri; + +/** + * Calculate static inline sanboot API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define SANBOOT_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( SANBOOT_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide a sanboot API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_SANBOOT( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( SANBOOT_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline sanboot API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_SANBOOT_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( SANBOOT_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent sanboot API headers */ +#include <ipxe/null_sanboot.h> + +/* Include all architecture-dependent sanboot API headers */ +#include <bits/sanboot.h> + +/** + * Get default SAN drive number + * + * @ret drive Default drive number + */ +unsigned int san_default_drive ( void ); + +/** + * Hook SAN device + * + * @v uri URI + * @v drive Drive number + * @ret rc Return status code + */ +int san_hook ( struct uri *uri, unsigned int drive ); + +/** + * Unhook SAN device + * + * @v drive Drive number + */ +void san_unhook ( unsigned int drive ); + +/** + * Attempt to boot from a SAN device + * + * @v drive Drive number + * @ret rc Return status code + */ +int san_boot ( unsigned int drive ); + +/** + * Describe SAN device for SAN-booted operating system + * + * @v drive Drive number + * @ret rc Return status code + */ +int san_describe ( unsigned int drive ); + +#endif /* _IPXE_SANBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/script.h b/qemu/roms/ipxe/src/include/ipxe/script.h new file mode 100644 index 000000000..33420dae4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/script.h @@ -0,0 +1,16 @@ +#ifndef _IPXE_SCRIPT_H +#define _IPXE_SCRIPT_H + +/** @file + * + * iPXE scripts + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/image.h> + +extern struct image_type script_image_type __image_type ( PROBE_NORMAL ); + +#endif /* _IPXE_SCRIPT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/scsi.h b/qemu/roms/ipxe/src/include/ipxe/scsi.h new file mode 100644 index 000000000..4428daac3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/scsi.h @@ -0,0 +1,353 @@ +#ifndef _IPXE_SCSI_H +#define _IPXE_SCSI_H + +#include <stdint.h> +#include <ipxe/uaccess.h> +#include <ipxe/interface.h> + +/** @file + * + * SCSI devices + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** Maximum block for READ/WRITE (10) commands */ +#define SCSI_MAX_BLOCK_10 0xffffffffULL + +/** + * @defgroup scsiops SCSI operation codes + * @{ + */ + +#define SCSI_OPCODE_READ_10 0x28 /**< READ (10) */ +#define SCSI_OPCODE_READ_16 0x88 /**< READ (16) */ +#define SCSI_OPCODE_WRITE_10 0x2a /**< WRITE (10) */ +#define SCSI_OPCODE_WRITE_16 0x8a /**< WRITE (16) */ +#define SCSI_OPCODE_READ_CAPACITY_10 0x25 /**< READ CAPACITY (10) */ +#define SCSI_OPCODE_SERVICE_ACTION_IN 0x9e /**< SERVICE ACTION IN */ +#define SCSI_SERVICE_ACTION_READ_CAPACITY_16 0x10 /**< READ CAPACITY (16) */ +#define SCSI_OPCODE_TEST_UNIT_READY 0x00 /**< TEST UNIT READY */ + +/** @} */ + +/** + * @defgroup scsiflags SCSI flags + * @{ + */ + +#define SCSI_FL_FUA_NV 0x02 /**< Force unit access to NVS */ +#define SCSI_FL_FUA 0x08 /**< Force unit access */ +#define SCSI_FL_DPO 0x10 /**< Disable cache page out */ + +/** @} */ + +/** + * @defgroup scsicdbs SCSI command data blocks + * @{ + */ + +/** A SCSI "READ (10)" CDB */ +struct scsi_cdb_read_10 { + /** Opcode (0x28) */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Start address + * + * This is a logical block number, in big-endian order. + */ + uint32_t lba; + /** Group number */ + uint8_t group; + /** Transfer length + * + * This is a logical block count, in big-endian order. + */ + uint16_t len; + /** Control byte */ + uint8_t control; +} __attribute__ (( packed )); + +/** A SCSI "READ (16)" CDB */ +struct scsi_cdb_read_16 { + /** Opcode (0x88) */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Start address + * + * This is a logical block number, in big-endian order. + */ + uint64_t lba; + /** Transfer length + * + * This is a logical block count, in big-endian order. + */ + uint32_t len; + /** Group number */ + uint8_t group; + /** Control byte */ + uint8_t control; +} __attribute__ (( packed )); + +/** A SCSI "WRITE (10)" CDB */ +struct scsi_cdb_write_10 { + /** Opcode (0x2a) */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Start address + * + * This is a logical block number, in big-endian order. + */ + uint32_t lba; + /** Group number */ + uint8_t group; + /** Transfer length + * + * This is a logical block count, in big-endian order. + */ + uint16_t len; + /** Control byte */ + uint8_t control; +} __attribute__ (( packed )); + +/** A SCSI "WRITE (16)" CDB */ +struct scsi_cdb_write_16 { + /** Opcode (0x8a) */ + uint8_t opcode; + /** Flags */ + uint8_t flags; + /** Start address + * + * This is a logical block number, in big-endian order. + */ + uint64_t lba; + /** Transfer length + * + * This is a logical block count, in big-endian order. + */ + uint32_t len; + /** Group number */ + uint8_t group; + /** Control byte */ + uint8_t control; +} __attribute__ (( packed )); + +/** A SCSI "READ CAPACITY (10)" CDB */ +struct scsi_cdb_read_capacity_10 { + /** Opcode (0x25) */ + uint8_t opcode; + /** Reserved */ + uint8_t reserved_a; + /** Logical block address + * + * Applicable only if the PMI bit is set. + */ + uint32_t lba; + /** Reserved */ + uint8_t reserved_b[3]; + /** Control byte */ + uint8_t control; +} __attribute__ (( packed )); + +/** SCSI "READ CAPACITY (10)" parameter data */ +struct scsi_capacity_10 { + /** Maximum logical block number */ + uint32_t lba; + /** Block length in bytes */ + uint32_t blksize; +} __attribute__ (( packed )); + +/** A SCSI "READ CAPACITY (16)" CDB */ +struct scsi_cdb_read_capacity_16 { + /** Opcode (0x9e) */ + uint8_t opcode; + /** Service action */ + uint8_t service_action; + /** Logical block address + * + * Applicable only if the PMI bit is set. + */ + uint64_t lba; + /** Transfer length + * + * This is the size of the data-in buffer, in bytes. + */ + uint32_t len; + /** Reserved */ + uint8_t reserved; + /** Control byte */ + uint8_t control; +} __attribute__ (( packed )); + +/** SCSI "READ CAPACITY (16)" parameter data */ +struct scsi_capacity_16 { + /** Maximum logical block number */ + uint64_t lba; + /** Block length in bytes */ + uint32_t blksize; + /** Reserved */ + uint8_t reserved[20]; +} __attribute__ (( packed )); + +/** A SCSI "TEST UNIT READY" CDB */ +struct scsi_cdb_test_unit_ready { + /** Opcode (0x00) */ + uint8_t opcode; + /** Reserved */ + uint8_t reserved[4]; + /** Control byte */ + uint8_t control; +} __attribute__ (( packed )); + +/** A SCSI Command Data Block */ +union scsi_cdb { + struct scsi_cdb_read_10 read10; + struct scsi_cdb_read_16 read16; + struct scsi_cdb_write_10 write10; + struct scsi_cdb_write_16 write16; + struct scsi_cdb_read_capacity_10 readcap10; + struct scsi_cdb_read_capacity_16 readcap16; + struct scsi_cdb_test_unit_ready testready; + unsigned char bytes[16]; +}; + +/** printf() format for dumping a scsi_cdb */ +#define SCSI_CDB_FORMAT "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:" \ + "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x" + +/** printf() parameters for dumping a scsi_cdb */ +#define SCSI_CDB_DATA(cdb) \ + (cdb).bytes[0], (cdb).bytes[1], (cdb).bytes[2], (cdb).bytes[3], \ + (cdb).bytes[4], (cdb).bytes[5], (cdb).bytes[6], (cdb).bytes[7], \ + (cdb).bytes[8], (cdb).bytes[9], (cdb).bytes[10], (cdb).bytes[11], \ + (cdb).bytes[12], (cdb).bytes[13], (cdb).bytes[14], (cdb).bytes[15] + +/** @} */ + +/** A SCSI LUN + * + * This is a four-level LUN as specified by SAM-2, in big-endian + * order. + */ +struct scsi_lun { + uint16_t u16[4]; +} __attribute__ (( packed )); + +/** printf() format for dumping a scsi_lun */ +#define SCSI_LUN_FORMAT "%04x-%04x-%04x-%04x" + +/** printf() parameters for dumping a scsi_lun */ +#define SCSI_LUN_DATA(lun) \ + ntohs ( (lun).u16[0] ), ntohs ( (lun).u16[1] ), \ + ntohs ( (lun).u16[2] ), ntohs ( (lun).u16[3] ) + +/** A SCSI command information unit */ +struct scsi_cmd { + /** LUN */ + struct scsi_lun lun; + /** CDB for this command */ + union scsi_cdb cdb; + /** Data-out buffer (may be NULL) */ + userptr_t data_out; + /** Data-out buffer length + * + * Must be zero if @c data_out is NULL + */ + size_t data_out_len; + /** Data-in buffer (may be NULL) */ + userptr_t data_in; + /** Data-in buffer length + * + * Must be zero if @c data_in is NULL + */ + size_t data_in_len; +}; + +/** SCSI fixed-format sense data */ +struct scsi_sns_fixed { + /** Response code */ + uint8_t code; + /** Reserved */ + uint8_t reserved; + /** Sense key */ + uint8_t key; + /** Information */ + uint32_t info; + /** Additional sense length */ + uint8_t len; + /** Command-specific information */ + uint32_t cs_info; + /** Additional sense code and qualifier */ + uint16_t additional; +} __attribute__ (( packed )); + +/** SCSI descriptor-format sense data */ +struct scsi_sns_descriptor { + /** Response code */ + uint8_t code; + /** Sense key */ + uint8_t key; + /** Additional sense code and qualifier */ + uint16_t additional; +} __attribute__ (( packed )); + +/** SCSI sense data */ +union scsi_sns { + /** Response code */ + uint8_t code; + /** Fixed-format sense data */ + struct scsi_sns_fixed fixed; + /** Descriptor-format sense data */ + struct scsi_sns_descriptor desc; +}; + +/** SCSI sense response code mask */ +#define SCSI_SENSE_CODE_MASK 0x7f + +/** Test if SCSI sense data is in fixed format + * + * @v code Response code + * @ret is_fixed Sense data is in fixed format + */ +#define SCSI_SENSE_FIXED( code ) ( ( (code) & 0x7e ) == 0x70 ) + +/** SCSI sense key mask */ +#define SCSI_SENSE_KEY_MASK 0x0f + +/** A SCSI response information unit */ +struct scsi_rsp { + /** SCSI status code */ + uint8_t status; + /** Data overrun (or negative underrun) */ + ssize_t overrun; + /** Autosense data (if any) + * + * To minimise code size, this is stored as the first four + * bytes of a descriptor-format sense data block (even if the + * response code indicates fixed-format sense data). + */ + struct scsi_sns_descriptor sense; +}; + +extern int scsi_parse_lun ( const char *lun_string, struct scsi_lun *lun ); +extern void scsi_parse_sense ( const void *data, size_t len, + struct scsi_sns_descriptor *sense ); + +extern int scsi_command ( struct interface *control, struct interface *data, + struct scsi_cmd *command ); +#define scsi_command_TYPE( object_type ) \ + typeof ( int ( object_type, struct interface *data, \ + struct scsi_cmd *command ) ) + +extern void scsi_response ( struct interface *intf, struct scsi_rsp *response ); +#define scsi_response_TYPE( object_type ) \ + typeof ( void ( object_type, struct scsi_rsp *response ) ) + +extern int scsi_open ( struct interface *block, struct interface *scsi, + struct scsi_lun *lun ); + +#endif /* _IPXE_SCSI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/sec80211.h b/qemu/roms/ipxe/src/include/ipxe/sec80211.h new file mode 100644 index 000000000..3ca3d84f2 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/sec80211.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2009 Joshua Oreman <oremanj@rwcr.net>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _IPXE_SEC80211_H +#define _IPXE_SEC80211_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/net80211.h> +#include <errno.h> + +/** @file + * + * Definitions for general secured-network routines. + */ + +int sec80211_detect ( struct io_buffer *iob, + enum net80211_security_proto *secprot, + enum net80211_crypto_alg *crypt ); + +int sec80211_detect_ie ( int is_rsn, u8 *start, u8 *end, + enum net80211_security_proto *secprot, + enum net80211_crypto_alg *crypt ); +u8 * sec80211_find_rsn ( union ieee80211_ie *ie, void *ie_end, + int *is_rsn, u8 **end ); + +int sec80211_install ( struct net80211_crypto **which, + enum net80211_crypto_alg crypt, + const void *key, int len, const void *rsc ); + +u32 sec80211_rsn_get_crypto_desc ( enum net80211_crypto_alg crypt, int rsnie ); +u32 sec80211_rsn_get_akm_desc ( enum net80211_security_proto secprot, + int rsnie ); +enum net80211_crypto_alg sec80211_rsn_get_net80211_crypt ( u32 desc ); + +#endif /* _IPXE_SEC80211_H */ + diff --git a/qemu/roms/ipxe/src/include/ipxe/segment.h b/qemu/roms/ipxe/src/include/ipxe/segment.h new file mode 100644 index 000000000..37bed0e19 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/segment.h @@ -0,0 +1,17 @@ +#ifndef _IPXE_SEGMENT_H +#define _IPXE_SEGMENT_H + +/** + * @file + * + * Executable image segments + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/uaccess.h> + +extern int prep_segment ( userptr_t segment, size_t filesz, size_t memsz ); + +#endif /* _IPXE_SEGMENT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/serial.h b/qemu/roms/ipxe/src/include/ipxe/serial.h new file mode 100644 index 000000000..b47b1d125 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/serial.h @@ -0,0 +1,17 @@ +#ifndef _IPXE_SERIAL_H +#define _IPXE_SERIAL_H + +/** @file + * + * Serial driver functions + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern void serial_putc ( int ch ); +extern int serial_getc ( void ); +extern int serial_ischar ( void ); +extern int serial_initialized; + +#endif /* _IPXE_SERIAL_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/settings.h b/qemu/roms/ipxe/src/include/ipxe/settings.h new file mode 100644 index 000000000..d6929ecd0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/settings.h @@ -0,0 +1,512 @@ +#ifndef _IPXE_SETTINGS_H +#define _IPXE_SETTINGS_H + +/** @file + * + * Configuration settings + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/tables.h> +#include <ipxe/list.h> +#include <ipxe/refcnt.h> + +struct settings; +struct in_addr; +struct in6_addr; +union uuid; + +/** A setting */ +struct setting { + /** Name + * + * This is the human-readable name for the setting. + */ + const char *name; + /** Description */ + const char *description; + /** Setting type + * + * This identifies the type of setting (e.g. string, IPv4 + * address, etc.). + */ + const struct setting_type *type; + /** Setting tag, if applicable + * + * The setting tag is a numerical description of the setting + * (such as a DHCP option number, or an SMBIOS structure and + * field number). + */ + unsigned int tag; + /** Setting scope (or NULL) + * + * For historic reasons, a NULL scope with a non-zero tag + * indicates a DHCPv4 option setting. + */ + const struct settings_scope *scope; +}; + +/** Configuration setting table */ +#define SETTINGS __table ( struct setting, "settings" ) + +/** Declare a configuration setting */ +#define __setting( setting_order, name ) \ + __table_entry ( SETTINGS, setting_order.name ) + +/** @defgroup setting_order Setting ordering + * @{ + */ + +#define SETTING_NETDEV 01 /**< Network device settings */ +#define SETTING_NETDEV_EXTRA 02 /**< Network device additional settings */ +#define SETTING_IP 03 /**< IPv4 settings */ +#define SETTING_IP_EXTRA 04 /**< IPv4 additional settings */ +#define SETTING_BOOT 05 /**< Generic boot settings */ +#define SETTING_BOOT_EXTRA 06 /**< Generic boot additional settings */ +#define SETTING_SANBOOT 07 /**< SAN boot settings */ +#define SETTING_SANBOOT_EXTRA 08 /**< SAN boot additional settings */ +#define SETTING_HOST 09 /**< Host identity settings */ +#define SETTING_HOST_EXTRA 10 /**< Host identity additional settings */ +#define SETTING_AUTH 11 /**< Authentication settings */ +#define SETTING_AUTH_EXTRA 12 /**< Authentication additional settings */ +#define SETTING_CRYPTO 13 /**< Cryptography settings */ +#define SETTING_MISC 14 /**< Miscellaneous settings */ + +/** @} */ + +/** Settings block operations */ +struct settings_operations { + /** Redirect to underlying settings block (if applicable) + * + * @v settings Settings block + * @ret settings Underlying settings block + */ + struct settings * ( * redirect ) ( struct settings *settings ); + /** Check applicability of setting + * + * @v settings Settings block + * @v setting Setting + * @ret applies Setting applies within this settings block + */ + int ( * applies ) ( struct settings *settings, + const struct setting *setting ); + /** Store value of setting + * + * @v settings Settings block + * @v setting Setting to store + * @v data Setting data, or NULL to clear setting + * @v len Length of setting data + * @ret rc Return status code + */ + int ( * store ) ( struct settings *settings, + const struct setting *setting, + const void *data, size_t len ); + /** Fetch value of setting + * + * @v settings Settings block + * @v setting Setting to fetch + * @v data Buffer to fill with setting data + * @v len Length of buffer + * @ret len Length of setting data, or negative error + * + * The actual length of the setting will be returned even if + * the buffer was too small. + */ + int ( * fetch ) ( struct settings *settings, struct setting *setting, + void *data, size_t len ); + /** Clear settings block + * + * @v settings Settings block + */ + void ( * clear ) ( struct settings *settings ); +}; + +/** A settings block */ +struct settings { + /** Reference counter */ + struct refcnt *refcnt; + /** Name */ + const char *name; + /** Parent settings block */ + struct settings *parent; + /** Sibling settings blocks */ + struct list_head siblings; + /** Child settings blocks */ + struct list_head children; + /** Settings block operations */ + struct settings_operations *op; + /** Default scope for numerical settings constructed for this block */ + const struct settings_scope *default_scope; +}; + +/** + * A setting scope + * + * Users can construct tags for settings that are not explicitly known + * to iPXE using the generic syntax for numerical settings. For + * example, the setting name "60" will be interpreted as referring to + * DHCP option 60 (the vendor class identifier). + * + * This creates a potential for namespace collisions, since the + * interpretation of the numerical description will vary according to + * the settings block. When a user attempts to fetch a generic + * numerical setting, we need to ensure that only the intended + * settings blocks interpret this numerical description. (For + * example, we do not want to attempt to retrieve the subnet mask from + * SMBIOS, or the system UUID from DHCP.) + * + * This potential problem is resolved by including a user-invisible + * "scope" within the definition of each setting. Settings blocks may + * use this to determine whether or not the setting is applicable. + * Any settings constructed from a numerical description + * (e.g. "smbios/1.4.0") will be assigned the default scope of the + * settings block specified in the description (e.g. "smbios"); this + * provides behaviour matching the user's expectations in most + * circumstances. + */ +struct settings_scope { + /** Dummy field + * + * This is included only to ensure that pointers to different + * scopes always compare differently. + */ + uint8_t dummy; +} __attribute__ (( packed )); + +/** + * A setting type + * + * This represents a type of setting (e.g. string, IPv4 address, + * etc.). + */ +struct setting_type { + /** Name + * + * This is the name exposed to the user (e.g. "string"). + */ + const char *name; + /** Parse formatted string to setting value + * + * @v type Setting type + * @v value Formatted setting value + * @v buf Buffer to contain raw value + * @v len Length of buffer + * @ret len Length of raw value, or negative error + */ + int ( * parse ) ( const struct setting_type *type, const char *value, + void *buf, size_t len ); + /** Format setting value as a string + * + * @v type Setting type + * @v raw Raw setting value + * @v raw_len Length of raw setting value + * @v buf Buffer to contain formatted value + * @v len Length of buffer + * @ret len Length of formatted value, or negative error + */ + int ( * format ) ( const struct setting_type *type, const void *raw, + size_t raw_len, char *buf, size_t len ); + /** Convert number to setting value + * + * @v type Setting type + * @v value Numeric value + * @v buf Buffer to contain raw value + * @v len Length of buffer + * @ret len Length of raw value, or negative error + */ + int ( * denumerate ) ( const struct setting_type *type, + unsigned long value, + void *buf, size_t len ); + /** Convert setting value to number + * + * @v type Setting type + * @v raw Raw setting value + * @v raw_len Length of raw setting value + * @v value Numeric value to fill in + * @ret rc Return status code + */ + int ( * numerate ) ( const struct setting_type *type, const void *raw, + size_t raw_len, unsigned long *value ); +}; + +/** Configuration setting type table */ +#define SETTING_TYPES __table ( struct setting_type, "setting_types" ) + +/** Declare a configuration setting type */ +#define __setting_type __table_entry ( SETTING_TYPES, 01 ) + +/** + * A settings applicator + * + */ +struct settings_applicator { + /** Apply updated settings + * + * @ret rc Return status code + */ + int ( * apply ) ( void ); +}; + +/** Settings applicator table */ +#define SETTINGS_APPLICATORS \ + __table ( struct settings_applicator, "settings_applicators" ) + +/** Declare a settings applicator */ +#define __settings_applicator __table_entry ( SETTINGS_APPLICATORS, 01 ) + +/** A built-in setting */ +struct builtin_setting { + /** Setting */ + const struct setting *setting; + /** Fetch setting value + * + * @v data Buffer to fill with setting data + * @v len Length of buffer + * @ret len Length of setting data, or negative error + */ + int ( * fetch ) ( void *data, size_t len ); +}; + +/** Built-in settings table */ +#define BUILTIN_SETTINGS __table ( struct builtin_setting, "builtin_settings" ) + +/** Declare a built-in setting */ +#define __builtin_setting __table_entry ( BUILTIN_SETTINGS, 01 ) + +/** Built-in setting scope */ +extern const struct settings_scope builtin_scope; + +/** IPv6 setting scope */ +extern const struct settings_scope ipv6_scope; + +/** + * A generic settings block + * + */ +struct generic_settings { + /** Settings block */ + struct settings settings; + /** List of generic settings */ + struct list_head list; +}; + +/** A child settings block locator function */ +typedef struct settings * ( *get_child_settings_t ) ( struct settings *settings, + const char *name ); +extern struct settings_operations generic_settings_operations; +extern int generic_settings_store ( struct settings *settings, + const struct setting *setting, + const void *data, size_t len ); +extern int generic_settings_fetch ( struct settings *settings, + struct setting *setting, + void *data, size_t len ); +extern void generic_settings_clear ( struct settings *settings ); + +extern int register_settings ( struct settings *settings, + struct settings *parent, const char *name ); +extern void unregister_settings ( struct settings *settings ); + +extern struct settings * settings_target ( struct settings *settings ); +extern int setting_applies ( struct settings *settings, + const struct setting *setting ); +extern int store_setting ( struct settings *settings, + const struct setting *setting, + const void *data, size_t len ); +extern int fetch_setting ( struct settings *settings, + const struct setting *setting, + struct settings **origin, struct setting *fetched, + void *data, size_t len ); +extern int fetch_setting_copy ( struct settings *settings, + const struct setting *setting, + struct settings **origin, + struct setting *fetched, void **data ); +extern int fetch_raw_setting ( struct settings *settings, + const struct setting *setting, + void *data, size_t len ); +extern int fetch_raw_setting_copy ( struct settings *settings, + const struct setting *setting, + void **data ); +extern int fetch_string_setting ( struct settings *settings, + const struct setting *setting, + char *data, size_t len ); +extern int fetch_string_setting_copy ( struct settings *settings, + const struct setting *setting, + char **data ); +extern int fetch_ipv4_array_setting ( struct settings *settings, + const struct setting *setting, + struct in_addr *inp, unsigned int count ); +extern int fetch_ipv4_setting ( struct settings *settings, + const struct setting *setting, + struct in_addr *inp ); +extern int fetch_ipv6_array_setting ( struct settings *settings, + const struct setting *setting, + struct in6_addr *inp, unsigned int count); +extern int fetch_ipv6_setting ( struct settings *settings, + const struct setting *setting, + struct in6_addr *inp ); +extern int fetch_int_setting ( struct settings *settings, + const struct setting *setting, long *value ); +extern int fetch_uint_setting ( struct settings *settings, + const struct setting *setting, + unsigned long *value ); +extern long fetch_intz_setting ( struct settings *settings, + const struct setting *setting ); +extern unsigned long fetch_uintz_setting ( struct settings *settings, + const struct setting *setting ); +extern int fetch_uuid_setting ( struct settings *settings, + const struct setting *setting, + union uuid *uuid ); +extern void clear_settings ( struct settings *settings ); +extern int setting_cmp ( const struct setting *a, const struct setting *b ); + +extern struct settings * find_child_settings ( struct settings *parent, + const char *name ); +extern struct settings * autovivify_child_settings ( struct settings *parent, + const char *name ); +extern const char * settings_name ( struct settings *settings ); +extern struct settings * find_settings ( const char *name ); +extern struct setting * find_setting ( const char *name ); +extern int parse_setting_name ( char *name, get_child_settings_t get_child, + struct settings **settings, + struct setting *setting ); +extern int setting_name ( struct settings *settings, + const struct setting *setting, + char *buf, size_t len ); +extern int setting_format ( const struct setting_type *type, const void *raw, + size_t raw_len, char *buf, size_t len ); +extern int setting_parse ( const struct setting_type *type, const char *value, + void *buf, size_t len ); +extern int setting_numerate ( const struct setting_type *type, const void *raw, + size_t raw_len, unsigned long *value ); +extern int setting_denumerate ( const struct setting_type *type, + unsigned long value, void *buf, size_t len ); +extern int fetchf_setting ( struct settings *settings, + const struct setting *setting, + struct settings **origin, struct setting *fetched, + char *buf, size_t len ); +extern int fetchf_setting_copy ( struct settings *settings, + const struct setting *setting, + struct settings **origin, + struct setting *fetched, char **value ); +extern int storef_setting ( struct settings *settings, + const struct setting *setting, const char *value ); +extern int fetchn_setting ( struct settings *settings, + const struct setting *setting, + struct settings **origin, struct setting *fetched, + unsigned long *value ); +extern int storen_setting ( struct settings *settings, + const struct setting *setting, + unsigned long value ); +extern char * expand_settings ( const char *string ); + +extern const struct setting_type setting_type_string __setting_type; +extern const struct setting_type setting_type_uristring __setting_type; +extern const struct setting_type setting_type_ipv4 __setting_type; +extern const struct setting_type setting_type_ipv6 __setting_type; +extern const struct setting_type setting_type_int8 __setting_type; +extern const struct setting_type setting_type_int16 __setting_type; +extern const struct setting_type setting_type_int32 __setting_type; +extern const struct setting_type setting_type_uint8 __setting_type; +extern const struct setting_type setting_type_uint16 __setting_type; +extern const struct setting_type setting_type_uint32 __setting_type; +extern const struct setting_type setting_type_hex __setting_type; +extern const struct setting_type setting_type_hexhyp __setting_type; +extern const struct setting_type setting_type_hexraw __setting_type; +extern const struct setting_type setting_type_uuid __setting_type; +extern const struct setting_type setting_type_busdevfn __setting_type; +extern const struct setting_type setting_type_dnssl __setting_type; + +extern const struct setting +ip_setting __setting ( SETTING_IP, ip ); +extern const struct setting +netmask_setting __setting ( SETTING_IP, netmask ); +extern const struct setting +gateway_setting __setting ( SETTING_IP, gateway ); +extern const struct setting +dns_setting __setting ( SETTING_IP_EXTRA, dns ); +extern const struct setting +hostname_setting __setting ( SETTING_HOST, hostname ); +extern const struct setting +domain_setting __setting ( SETTING_IP_EXTRA, domain ); +extern const struct setting +filename_setting __setting ( SETTING_BOOT, filename ); +extern const struct setting +root_path_setting __setting ( SETTING_SANBOOT, root-path ); +extern const struct setting +username_setting __setting ( SETTING_AUTH, username ); +extern const struct setting +password_setting __setting ( SETTING_AUTH, password ); +extern const struct setting +priority_setting __setting ( SETTING_MISC, priority ); +extern const struct setting +uuid_setting __setting ( SETTING_HOST, uuid ); +extern const struct setting +next_server_setting __setting ( SETTING_BOOT, next-server ); +extern const struct setting +mac_setting __setting ( SETTING_NETDEV, mac ); +extern const struct setting +busid_setting __setting ( SETTING_NETDEV, busid ); +extern const struct setting +user_class_setting __setting ( SETTING_HOST_EXTRA, user-class ); + +/** + * Initialise a settings block + * + * @v settings Settings block + * @v op Settings block operations + * @v refcnt Containing object reference counter, or NULL + * @v default_scope Default scope + */ +static inline void settings_init ( struct settings *settings, + struct settings_operations *op, + struct refcnt *refcnt, + const struct settings_scope *default_scope ){ + INIT_LIST_HEAD ( &settings->siblings ); + INIT_LIST_HEAD ( &settings->children ); + settings->op = op; + settings->refcnt = refcnt; + settings->default_scope = default_scope; +} + +/** + * Initialise a settings block + * + * @v generics Generic settings block + * @v refcnt Containing object reference counter, or NULL + */ +static inline void generic_settings_init ( struct generic_settings *generics, + struct refcnt *refcnt ) { + settings_init ( &generics->settings, &generic_settings_operations, + refcnt, NULL ); + INIT_LIST_HEAD ( &generics->list ); +} + +/** + * Delete setting + * + * @v settings Settings block + * @v setting Setting to delete + * @ret rc Return status code + */ +static inline int delete_setting ( struct settings *settings, + const struct setting *setting ) { + return store_setting ( settings, setting, NULL, 0 ); +} + +/** + * Check existence of predefined setting + * + * @v settings Settings block, or NULL to search all blocks + * @v setting Setting to fetch + * @ret exists Setting exists + */ +static inline int setting_exists ( struct settings *settings, + const struct setting *setting ) { + return ( fetch_setting ( settings, setting, NULL, NULL, + NULL, 0 ) >= 0 ); +} + +#endif /* _IPXE_SETTINGS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/settings_ui.h b/qemu/roms/ipxe/src/include/ipxe/settings_ui.h new file mode 100644 index 000000000..5f7be30cc --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/settings_ui.h @@ -0,0 +1,16 @@ +#ifndef _IPXE_SETTINGS_UI_H +#define _IPXE_SETTINGS_UI_H + +/** @file + * + * Option configuration console + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct settings; + +extern int settings_ui ( struct settings *settings ) __nonnull; + +#endif /* _IPXE_SETTINGS_UI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/sha1.h b/qemu/roms/ipxe/src/include/ipxe/sha1.h new file mode 100644 index 000000000..a97035ec7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/sha1.h @@ -0,0 +1,80 @@ +#ifndef _IPXE_SHA1_H +#define _IPXE_SHA1_H + +/** @file + * + * SHA-1 algorithm + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/crypto.h> + +/** An SHA-1 digest */ +struct sha1_digest { + /** Hash output */ + uint32_t h[5]; +}; + +/** An SHA-1 data block */ +union sha1_block { + /** Raw bytes */ + uint8_t byte[64]; + /** Raw dwords */ + uint32_t dword[16]; + /** Final block structure */ + struct { + /** Padding */ + uint8_t pad[56]; + /** Length in bits */ + uint64_t len; + } final; +}; + +/** SHA-1 digest and data block + * + * The order of fields within this structure is designed to minimise + * code size. + */ +struct sha1_digest_data { + /** Digest of data already processed */ + struct sha1_digest digest; + /** Accumulated data */ + union sha1_block data; +} __attribute__ (( packed )); + +/** SHA-1 digest and data block */ +union sha1_digest_data_dwords { + /** Digest and data block */ + struct sha1_digest_data dd; + /** Raw dwords */ + uint32_t dword[ sizeof ( struct sha1_digest_data ) / + sizeof ( uint32_t ) ]; +}; + +/** An SHA-1 context */ +struct sha1_context { + /** Amount of accumulated data */ + size_t len; + /** Digest and accumulated data */ + union sha1_digest_data_dwords ddd; +} __attribute__ (( packed )); + +/** SHA-1 context size */ +#define SHA1_CTX_SIZE sizeof ( struct sha1_context ) + +/** SHA-1 digest size */ +#define SHA1_DIGEST_SIZE sizeof ( struct sha1_digest ) + +extern struct digest_algorithm sha1_algorithm; + +extern void prf_sha1 ( const void *key, size_t key_len, const char *label, + const void *data, size_t data_len, void *prf, + size_t prf_len ); +extern void pbkdf2_sha1 ( const void *passphrase, size_t pass_len, + const void *salt, size_t salt_len, + int iterations, void *key, size_t key_len ); + +#endif /* _IPXE_SHA1_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/sha256.h b/qemu/roms/ipxe/src/include/ipxe/sha256.h new file mode 100644 index 000000000..9aa9f3e57 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/sha256.h @@ -0,0 +1,73 @@ +#ifndef _IPXE_SHA256_H +#define _IPXE_SHA256_H + +/** @file + * + * SHA-256 algorithm + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/crypto.h> + +/** An SHA-256 digest */ +struct sha256_digest { + /** Hash output */ + uint32_t h[8]; +}; + +/** An SHA-256 data block */ +union sha256_block { + /** Raw bytes */ + uint8_t byte[64]; + /** Raw dwords */ + uint32_t dword[16]; + /** Final block structure */ + struct { + /** Padding */ + uint8_t pad[56]; + /** Length in bits */ + uint64_t len; + } final; +}; + +/** SHA-256 digest and data block + * + * The order of fields within this structure is designed to minimise + * code size. + */ +struct sha256_digest_data { + /** Digest of data already processed */ + struct sha256_digest digest; + /** Accumulated data */ + union sha256_block data; +} __attribute__ (( packed )); + +/** SHA-256 digest and data block */ +union sha256_digest_data_dwords { + /** Digest and data block */ + struct sha256_digest_data dd; + /** Raw dwords */ + uint32_t dword[ sizeof ( struct sha256_digest_data ) / + sizeof ( uint32_t ) ]; +}; + +/** An SHA-256 context */ +struct sha256_context { + /** Amount of accumulated data */ + size_t len; + /** Digest and accumulated data */ + union sha256_digest_data_dwords ddd; +} __attribute__ (( packed )); + +/** SHA-256 context size */ +#define SHA256_CTX_SIZE sizeof ( struct sha256_context ) + +/** SHA-256 digest size */ +#define SHA256_DIGEST_SIZE sizeof ( struct sha256_digest ) + +extern struct digest_algorithm sha256_algorithm; + +#endif /* _IPXE_SHA256_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/shell.h b/qemu/roms/ipxe/src/include/ipxe/shell.h new file mode 100644 index 000000000..faa32f422 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/shell.h @@ -0,0 +1,36 @@ +#ifndef _IPXE_SHELL_H +#define _IPXE_SHELL_H + +/** @file + * + * Minimal command shell + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** Shell stop states */ +enum shell_stop_state { + /** Continue processing */ + SHELL_CONTINUE = 0, + /** + * Stop processing current command line + * + * This is the stop state entered by commands that change the flow + * of execution, such as "goto". + */ + SHELL_STOP_COMMAND = 1, + /** + * Stop processing commands + * + * This is the stop state entered by commands that terminate + * the flow of execution, such as "exit". + */ + SHELL_STOP_COMMAND_SEQUENCE = 2, +}; + +extern void shell_stop ( int stop ); +extern int shell_stopped ( int stop ); +extern int shell ( void ); + +#endif /* _IPXE_SHELL_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/smbios.h b/qemu/roms/ipxe/src/include/ipxe/smbios.h new file mode 100644 index 000000000..ef5892a21 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/smbios.h @@ -0,0 +1,193 @@ +#ifndef _IPXE_SMBIOS_H +#define _IPXE_SMBIOS_H + +/** @file + * + * System Management BIOS + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/api.h> +#include <config/general.h> +#include <ipxe/uaccess.h> + +/** + * Provide an SMBIOS API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_SMBIOS( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( SMBIOS_PREFIX_ ## _subsys, _api_func, _func ) + +/* Include all architecture-independent SMBIOS API headers */ +#include <ipxe/efi/efi_smbios.h> +#include <ipxe/linux/linux_smbios.h> + +/* Include all architecture-dependent SMBIOS API headers */ +#include <bits/smbios.h> + +/** Signature for SMBIOS entry point */ +#define SMBIOS_SIGNATURE \ + ( ( '_' << 0 ) + ( 'S' << 8 ) + ( 'M' << 16 ) + ( '_' << 24 ) ) + +/** + * SMBIOS entry point + * + * This is the single table which describes the list of SMBIOS + * structures. It is located by scanning through the BIOS segment. + */ +struct smbios_entry { + /** Signature + * + * Must be equal to SMBIOS_SIGNATURE + */ + uint32_t signature; + /** Checksum */ + uint8_t checksum; + /** Length */ + uint8_t len; + /** Major version */ + uint8_t major; + /** Minor version */ + uint8_t minor; + /** Maximum structure size */ + uint16_t max; + /** Entry point revision */ + uint8_t revision; + /** Formatted area */ + uint8_t formatted[5]; + /** DMI Signature */ + uint8_t dmi_signature[5]; + /** DMI checksum */ + uint8_t dmi_checksum; + /** Structure table length */ + uint16_t smbios_len; + /** Structure table address */ + uint32_t smbios_address; + /** Number of SMBIOS structures */ + uint16_t smbios_count; + /** BCD revision */ + uint8_t bcd_revision; +} __attribute__ (( packed )); + +/** An SMBIOS structure header */ +struct smbios_header { + /** Type */ + uint8_t type; + /** Length */ + uint8_t len; + /** Handle */ + uint16_t handle; +} __attribute__ (( packed )); + +/** SMBIOS structure descriptor */ +struct smbios_structure { + /** Copy of SMBIOS structure header */ + struct smbios_header header; + /** Offset of structure within SMBIOS */ + size_t offset; + /** Length of strings section */ + size_t strings_len; +}; + +/** SMBIOS system information structure */ +struct smbios_system_information { + /** SMBIOS structure header */ + struct smbios_header header; + /** Manufacturer string */ + uint8_t manufacturer; + /** Product string */ + uint8_t product; + /** Version string */ + uint8_t version; + /** Serial number string */ + uint8_t serial; + /** UUID */ + uint8_t uuid[16]; + /** Wake-up type */ + uint8_t wakeup; +} __attribute__ (( packed )); + +/** SMBIOS system information structure type */ +#define SMBIOS_TYPE_SYSTEM_INFORMATION 1 + +/** SMBIOS base board information structure */ +struct smbios_base_board_information { + /** SMBIOS structure header */ + struct smbios_header header; + /** Manufacturer string */ + uint8_t manufacturer; + /** Product string */ + uint8_t product; + /** Version string */ + uint8_t version; + /** Serial number string */ + uint8_t serial; +} __attribute__ (( packed )); + +/** SMBIOS base board information structure type */ +#define SMBIOS_TYPE_BASE_BOARD_INFORMATION 2 + +/** SMBIOS enclosure information structure */ +struct smbios_enclosure_information { + /** SMBIOS structure header */ + struct smbios_header header; + /** Manufacturer string */ + uint8_t manufacturer; + /** Type string */ + uint8_t type; + /** Version string */ + uint8_t version; + /** Serial number string */ + uint8_t serial; + /** Asset tag */ + uint8_t asset_tag; +} __attribute__ (( packed )); + +/** SMBIOS enclosure information structure type */ +#define SMBIOS_TYPE_ENCLOSURE_INFORMATION 3 + +/** + * SMBIOS entry point descriptor + * + * This contains the information from the SMBIOS entry point that we + * care about. + */ +struct smbios { + /** Start of SMBIOS structures */ + userptr_t address; + /** Length of SMBIOS structures */ + size_t len; + /** Number of SMBIOS structures */ + unsigned int count; + /** SMBIOS version */ + uint16_t version; +}; + +/** + * Calculate SMBIOS version + * + * @v major Major version + * @v minor Minor version + * @ret version SMBIOS version + */ +#define SMBIOS_VERSION( major, minor ) ( ( (major) << 8 ) | (minor) ) + +extern int find_smbios ( struct smbios *smbios ); +extern int find_smbios_entry ( userptr_t start, size_t len, + struct smbios_entry *entry ); +extern int find_smbios_structure ( unsigned int type, unsigned int instance, + struct smbios_structure *structure ); +extern int read_smbios_structure ( struct smbios_structure *structure, + void *data, size_t len ); +extern int read_smbios_string ( struct smbios_structure *structure, + unsigned int index, + void *data, size_t len ); +extern int smbios_version ( void ); + +#endif /* _IPXE_SMBIOS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/socket.h b/qemu/roms/ipxe/src/include/ipxe/socket.h new file mode 100644 index 000000000..7cb3912f4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/socket.h @@ -0,0 +1,146 @@ +#ifndef _IPXE_SOCKET_H +#define _IPXE_SOCKET_H + +/** @file + * + * Socket addresses + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/tables.h> + +/** + * @defgroup commtypes Communication semantics + * + * @{ + */ + +/** Connection-based, reliable streams */ +extern int tcp_sock_stream; +#define TCP_SOCK_STREAM 0x1 +#define SOCK_STREAM tcp_sock_stream + +/** Connectionless, unreliable streams */ +extern int udp_sock_dgram; +#define UDP_SOCK_DGRAM 0x2 +#define SOCK_DGRAM udp_sock_dgram + +/** Echo testing streams */ +extern int ping_sock_echo; +#define PING_SOCK_ECHO 0x3 +#define SOCK_ECHO ping_sock_echo + +/** @} */ + +/** + * Name communication semantics + * + * @v semantics Communication semantics (e.g. SOCK_STREAM) + * @ret name Name of communication semantics + */ +static inline __attribute__ (( always_inline )) const char * +socket_semantics_name ( int semantics ) { + /* Cannot use a switch() because of the {TCP_UDP}_SOCK_XXX hack */ + if ( semantics == SOCK_STREAM ) { + return "SOCK_STREAM"; + } else if ( semantics == SOCK_DGRAM ) { + return "SOCK_DGRAM"; + } else if ( semantics == SOCK_ECHO ) { + return "SOCK_ECHO"; + } else { + return "SOCK_UNKNOWN"; + } +} + +/** + * @defgroup addrfam Address families + * + * @{ + */ +#define AF_INET 1 /**< IPv4 Internet addresses */ +#define AF_INET6 2 /**< IPv6 Internet addresses */ +#define AF_FC 3 /**< Fibre Channel addresses */ +/** @} */ + +/** + * Name address family + * + * @v family Address family (e.g. AF_INET) + * @ret name Name of address family + */ +static inline __attribute__ (( always_inline )) const char * +socket_family_name ( int family ) { + switch ( family ) { + case AF_INET: return "AF_INET"; + case AF_INET6: return "AF_INET6"; + case AF_FC: return "AF_FC"; + default: return "AF_UNKNOWN"; + } +} + +/** A socket address family */ +typedef uint16_t sa_family_t; + +/** Length of a @c struct @c sockaddr */ +#define SA_LEN 32 + +/** + * Generalized socket address structure + * + * This contains the fields common to socket addresses for all address + * families. + */ +struct sockaddr { + /** Socket address family + * + * This is an AF_XXX constant. + */ + sa_family_t sa_family; + /** Padding + * + * This ensures that a struct @c sockaddr_tcpip is large + * enough to hold a socket address for any TCP/IP address + * family. + */ + char pad[ SA_LEN - sizeof ( sa_family_t ) ]; +} __attribute__ (( packed, may_alias )); + +/** + * Socket address converter + * + */ +struct sockaddr_converter { + /** Socket address family + * + * This is an AF_XXX constant. + */ + sa_family_t family; + /** Transcribe socket address + * + * @v sa Socket address + * @ret string Socket address string + */ + const char * ( * ntoa ) ( struct sockaddr *sa ); + /** Parse socket address + * + * @v string Socket address stringh + * @v sa Socket address to fill in + * @ret rc Return status code + */ + int ( * aton ) ( const char *string, struct sockaddr *sa ); +}; + +/** Socket address converter table */ +#define SOCKADDR_CONVERTERS \ + __table ( struct sockaddr_converter, "sockaddr_converters" ) + +/** Declare a socket address converter */ +#define __sockaddr_converter __table_entry ( SOCKADDR_CONVERTERS, 01 ) + +extern const char * sock_ntoa ( struct sockaddr *sa ); +extern int sock_aton ( const char *string, struct sockaddr *sa ); + +#endif /* _IPXE_SOCKET_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/spi.h b/qemu/roms/ipxe/src/include/ipxe/spi.h new file mode 100644 index 000000000..d92d1aec9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/spi.h @@ -0,0 +1,258 @@ +#ifndef _IPXE_SPI_H +#define _IPXE_SPI_H + +/** @file + * + * SPI interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/nvs.h> + +/** + * @defgroup spicmds SPI commands + * @{ + */ + +/** Write status register */ +#define SPI_WRSR 0x01 + +/** Write data to memory array */ +#define SPI_WRITE 0x02 + +/** Read data from memory array */ +#define SPI_READ 0x03 + +/** Reset write enable latch */ +#define SPI_WRDI 0x04 + +/** Read status register */ +#define SPI_RDSR 0x05 + +/** Set write enable latch */ +#define SPI_WREN 0x06 + +/** + * @defgroup atmelcmds Atmel-specific SPI commands + * @{ + */ + +/** Erase one sector in memory array (Not supported on all devices) */ +#define ATMEL_SECTOR_ERASE 0x52 + +/** Erase all sections in memory array (Not supported on all devices) */ +#define ATMEL_CHIP_ERASE 0x62 + +/** Read manufacturer and product ID (Not supported on all devices) */ +#define ATMEL_RDID 0x15 + +/** @} */ + +/** @} */ + +/** + * @defgroup spistatus SPI status register bits (not present on all devices) + * @{ + */ + +/** Write-protect pin enabled */ +#define SPI_STATUS_WPEN 0x80 + +/** Block protection bit 2 */ +#define SPI_STATUS_BP2 0x10 + +/** Block protection bit 1 */ +#define SPI_STATUS_BP1 0x08 + +/** Block protection bit 0 */ +#define SPI_STATUS_BP0 0x04 + +/** State of the write enable latch */ +#define SPI_STATUS_WEN 0x02 + +/** Device busy flag */ +#define SPI_STATUS_NRDY 0x01 + +/** @} */ + +/** + * An SPI device + * + * This data structure represents a physical SPI device attached to an + * SPI bus. + */ +struct spi_device { + /** NVS device */ + struct nvs_device nvs; + /** SPI bus to which device is attached */ + struct spi_bus *bus; + /** Slave number */ + unsigned int slave; + /** Command length, in bits */ + unsigned int command_len; + /** Address length, in bits */ + unsigned int address_len; + /** Address is munged + * + * Some devices with 9-bit addresses (e.g. AT25040A EEPROM) + * use bit 3 of the command byte as address bit A8, rather + * than having a two-byte address. If this flag is set, then + * commands should be munged in this way. + */ + unsigned int munge_address : 1; +}; + +/** + * SPI magic autodetection address length + * + * Set @c spi_device::address_len to @c SPI_AUTODETECT_ADDRESS_LEN if + * the address length should be autodetected. + */ +#define SPI_AUTODETECT_ADDRESS_LEN 0 + +static inline __attribute__ (( always_inline )) struct spi_device * +nvs_to_spi ( struct nvs_device *nvs ) { + return container_of ( nvs, struct spi_device, nvs ); +} + +/** + * An SPI bus + * + * This data structure represents an SPI bus controller capable of + * issuing commands to attached SPI devices. + */ +struct spi_bus { + /** SPI interface mode + * + * This is the bitwise OR of zero or more of @c SPI_MODE_CPHA + * and @c SPI_MODE_CPOL. It is also the number conventionally + * used to describe the SPI interface mode. For example, SPI + * mode 1 is the mode in which CPOL=0 and CPHA=1, which + * therefore corresponds to a mode value of (0|SPI_MODE_CPHA) + * which, happily, equals 1. + */ + unsigned int mode; + /** + * Read/write data via SPI bus + * + * @v bus SPI bus + * @v device SPI device + * @v command Command + * @v address Address to read/write (<0 for no address) + * @v data_out TX data buffer (or NULL) + * @v data_in RX data buffer (or NULL) + * @v len Length of data buffer(s) + * + * This issues the specified command and optional address to + * the SPI device, then reads and/or writes data to/from the + * data buffers. + */ + int ( * rw ) ( struct spi_bus *bus, struct spi_device *device, + unsigned int command, int address, + const void *data_out, void *data_in, size_t len ); +}; + +/** Clock phase (CPHA) mode bit + * + * Phase 0 is sample on rising edge, shift data on falling edge. + * + * Phase 1 is shift data on rising edge, sample data on falling edge. + */ +#define SPI_MODE_CPHA 0x01 + +/** Clock polarity (CPOL) mode bit + * + * This bit reflects the idle state of the clock line (SCLK). + */ +#define SPI_MODE_CPOL 0x02 + +/** Slave select polarity mode bit + * + * This bit reflects that active state of the slave select lines. It + * is not part of the normal SPI mode number (which covers only @c + * SPI_MODE_CPOL and @c SPI_MODE_CPHA), but is included here for + * convenience. + */ +#define SPI_MODE_SSPOL 0x10 + +/** Microwire-compatible mode + * + * This is SPI mode 1 (i.e. CPOL=0, CPHA=1), and is compatible with + * the original Microwire protocol. + */ +#define SPI_MODE_MICROWIRE 1 + +/** Microwire/Plus-compatible mode + * + * This is SPI mode 0 (i.e. CPOL=0, CPHA=0), and is compatible with + * the Microwire/Plus protocol + */ +#define SPI_MODE_MICROWIRE_PLUS 0 + +/** Threewire-compatible mode + * + * This mode is compatible with Atmel's series of "three-wire" + * interfaces. + */ +#define SPI_MODE_THREEWIRE ( SPI_MODE_MICROWIRE_PLUS | SPI_MODE_SSPOL ) + +extern int spi_read ( struct nvs_device *nvs, unsigned int address, + void *data, size_t len ); +extern int spi_write ( struct nvs_device *nvs, unsigned int address, + const void *data, size_t len ); + +/** + * @defgroup spidevs SPI device types + * @{ + */ + +static inline __attribute__ (( always_inline )) void +init_spi ( struct spi_device *device ) { + device->nvs.word_len_log2 = 0; + device->command_len = 8, + device->nvs.read = spi_read; + device->nvs.write = spi_write; +} + +/** Atmel AT25F1024 serial flash */ +static inline __attribute__ (( always_inline )) void +init_at25f1024 ( struct spi_device *device ) { + device->address_len = 24; + device->nvs.size = ( 128 * 1024 ); + device->nvs.block_size = 256; + init_spi ( device ); +} + +/** Atmel 25040 serial EEPROM */ +static inline __attribute__ (( always_inline )) void +init_at25040 ( struct spi_device *device ) { + device->address_len = 8; + device->munge_address = 1; + device->nvs.size = 512; + device->nvs.block_size = 8; + init_spi ( device ); +} + +/** ST M25P32 serial flash */ +static inline __attribute__ (( always_inline )) void +init_m25p32 ( struct spi_device *device ) { + device->address_len = 24; + device->nvs.size = ( 4 * 1024 * 1024 ); + device->nvs.block_size = 256; + init_spi ( device ); +} + +/** Microchip 25XX640 serial EEPROM */ +static inline __attribute__ (( always_inline )) void +init_mc25xx640 ( struct spi_device *device ) { + device->address_len = 16; + device->nvs.size = ( 8 * 1024 ); + device->nvs.block_size = 32; + init_spi ( device ); +} + +/** @} */ + +#endif /* _IPXE_SPI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/spi_bit.h b/qemu/roms/ipxe/src/include/ipxe/spi_bit.h new file mode 100644 index 000000000..9cfa7b825 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/spi_bit.h @@ -0,0 +1,63 @@ +#ifndef _IPXE_SPI_BIT_H +#define _IPXE_SPI_BIT_H + +/** @file + * + * SPI bit-bashing interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/spi.h> +#include <ipxe/bitbash.h> + +/** A bit-bashing SPI bus */ +struct spi_bit_basher { + /** SPI bus */ + struct spi_bus bus; + /** Bit-bashing interface */ + struct bit_basher basher; + /** Endianness of data + * + * SPI commands and addresses are always big-endian (i.e. MSB + * transmitted first on the wire), but some cards + * (e.g. natsemi) choose to regard the data stored in the + * EEPROM as little-endian (i.e. LSB transmitted first on the + * wire). + */ + int endianness; +}; + +/** Bit indices used for SPI bit-bashing interface */ +enum { + /** Serial clock */ + SPI_BIT_SCLK = 0, + /** Master Out Slave In */ + SPI_BIT_MOSI, + /** Master In Slave Out */ + SPI_BIT_MISO, + /** Slave 0 select */ + SPI_BIT_SS0, +}; + +/** + * Determine bit index for a particular slave + * + * @v slave Slave number + * @ret index Bit index (i.e. SPI_BIT_SSN, where N=slave) + */ +#define SPI_BIT_SS( slave ) ( SPI_BIT_SS0 + (slave) ) + +/** Delay between SCLK transitions */ +#define SPI_BIT_UDELAY 1 + +/** SPI bit basher treats data as big-endian */ +#define SPI_BIT_BIG_ENDIAN 0 + +/** SPI bit basher treats data as little-endian */ +#define SPI_BIT_LITTLE_ENDIAN 1 + +extern void init_spi_bit_basher ( struct spi_bit_basher *spibit ); + +#endif /* _IPXE_SPI_BIT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/srp.h b/qemu/roms/ipxe/src/include/ipxe/srp.h new file mode 100644 index 000000000..8d7f799cd --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/srp.h @@ -0,0 +1,833 @@ +#ifndef _IPXE_SRP_H +#define _IPXE_SRP_H + +/** @file + * + * SCSI RDMA Protocol + * + */ + +FILE_LICENCE ( BSD2 ); + +#include <stdint.h> +#include <byteswap.h> +#include <ipxe/iobuf.h> +#include <ipxe/xfer.h> +#include <ipxe/scsi.h> +#include <ipxe/acpi.h> + +/***************************************************************************** + * + * Common fields + * + ***************************************************************************** + */ + +/** An SRP information unit tag */ +union srp_tag { + uint8_t bytes[8]; + uint32_t dwords[2]; +} __attribute__ (( packed )); + +/** SRP tag magic marker */ +#define SRP_TAG_MAGIC 0x69505845 + +/** An SRP port ID */ +union srp_port_id { + uint8_t bytes[16]; + uint32_t dwords[4]; +} __attribute__ (( packed )); + +/** SRP information unit common fields */ +struct srp_common { + /** Information unit type */ + uint8_t type; + /** Reserved */ + uint8_t reserved0[7]; + /** Tag */ + union srp_tag tag; +} __attribute__ (( packed )); + +/***************************************************************************** + * + * Login request + * + ***************************************************************************** + */ + +/** An SRP login request information unit */ +struct srp_login_req { + /** Information unit type + * + * This must be @c SRP_LOGIN_REQ + */ + uint8_t type; + /** Reserved */ + uint8_t reserved0[7]; + /** Tag */ + union srp_tag tag; + /** Requested maximum initiator to target IU length */ + uint32_t max_i_t_iu_len; + /** Reserved */ + uint8_t reserved1[4]; + /** Required buffer formats + * + * This is the bitwise OR of one or more @c + * SRP_LOGIN_REQ_FMT_XXX constants. + */ + uint16_t required_buffer_formats; + /** Flags + * + * This is the bitwise OR of zero or more @c + * SRP_LOGIN_REQ_FLAG_XXX and @c SRP_LOGIN_REQ_MCA_XXX + * constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved2[5]; + /** Initiator port identifier */ + union srp_port_id initiator; + /** Target port identifier */ + union srp_port_id target; +} __attribute__ (( packed )); + +/** Type of an SRP login request */ +#define SRP_LOGIN_REQ 0x00 + +/** Require indirect data buffer descriptor format */ +#define SRP_LOGIN_REQ_FMT_IDBD 0x04 + +/** Require direct data buffer descriptor format */ +#define SRP_LOGIN_REQ_FMT_DDBD 0x02 + +/** Use solicited notification for asynchronous events */ +#define SRP_LOGIN_REQ_FLAG_AESOLNT 0x40 + +/** Use solicited notification for credit request */ +#define SRP_LOGIN_REQ_FLAG_CRSOLNT 0x20 + +/** Use solicited notification for logouts */ +#define SRP_LOGIN_REQ_FLAG_LOSOLNT 0x10 + +/** Multi-channel action mask */ +#define SRP_LOGIN_REQ_MCA_MASK 0x03 + +/** Single RDMA channel operation */ +#define SRP_LOGIN_REQ_MCA_SINGLE_CHANNEL 0x00 + +/** Multiple independent RDMA channel operation */ +#define SRP_LOGIN_REQ_MCA_MULTIPLE_CHANNELS 0x01 + +/***************************************************************************** + * + * Login response + * + ***************************************************************************** + */ + +/** An SRP login response */ +struct srp_login_rsp { + /** Information unit type + * + * This must be @c SRP_LOGIN_RSP + */ + uint8_t type; + /** Reserved */ + uint8_t reserved0[3]; + /** Request limit delta */ + uint32_t request_limit_delta; + /** Tag */ + union srp_tag tag; + /** Maximum initiator to target IU length */ + uint32_t max_i_t_iu_len; + /** Maximum target to initiator IU length */ + uint32_t max_t_i_iu_len; + /** Supported buffer formats + * + * This is the bitwise OR of one or more @c + * SRP_LOGIN_RSP_FMT_XXX constants. + */ + uint16_t supported_buffer_formats; + /** Flags + * + * This is the bitwise OR of zero or more @c + * SRP_LOGIN_RSP_FLAG_XXX and @c SRP_LOGIN_RSP_MCR_XXX + * constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved1[25]; +} __attribute__ (( packed )); + +/** Type of an SRP login response */ +#define SRP_LOGIN_RSP 0xc0 + +/** Indirect data buffer descriptor format supported */ +#define SRP_LOGIN_RSP_FMT_IDBD 0x04 + +/** Direct data buffer descriptor format supported */ +#define SRP_LOGIN_RSP_FMT_DDBD 0x02 + +/** Solicited notification is supported */ +#define SRP_LOGIN_RSP_FLAG_SOLNTSUP 0x10 + +/** Multi-channel result mask */ +#define SRP_LOGIN_RSP_MCR_MASK 0x03 + +/** No existing RDMA channels were associated with the same I_T nexus */ +#define SRP_LOGIN_RSP_MCR_NO_EXISTING_CHANNELS 0x00 + +/** One or more existing RDMA channels were terminated */ +#define SRP_LOGIN_RSP_MCR_EXISTING_CHANNELS_TERMINATED 0x01 + +/** One or more existing RDMA channels continue to operate independently */ +#define SRP_LOGIN_RSP_MCR_EXISTING_CHANNELS_CONTINUE 0x02 + +/***************************************************************************** + * + * Login rejection + * + ***************************************************************************** + */ + +/** An SRP login rejection */ +struct srp_login_rej { + /** Information unit type + * + * This must be @c SRP_LOGIN_REJ + */ + uint8_t type; + /** Reserved */ + uint8_t reserved0[3]; + /** Reason + * + * This is a @c SRP_LOGIN_REJ_REASON_XXX constant. + */ + uint32_t reason; + /** Tag */ + union srp_tag tag; + /** Reserved */ + uint8_t reserved1[8]; + /** Supported buffer formats + * + * This is the bitwise OR of one or more @c + * SRP_LOGIN_REJ_FMT_XXX constants. + */ + uint16_t supported_buffer_formats; + /** Reserved */ + uint8_t reserved2[6]; +} __attribute__ (( packed )); + +/** Type of an SRP login rejection */ +#define SRP_LOGIN_REJ 0xc2 + +/** Unable to establish RDMA channel, no reason specified */ +#define SRP_LOGIN_REJ_REASON_UNKNOWN 0x00010000UL + +/** Insufficient RDMA channel resources */ +#define SRP_LOGIN_REJ_REASON_INSUFFICIENT_RESOURCES 0x00010001UL + +/** Requested maximum initiator to target IU length value too large */ +#define SRP_LOGIN_REJ_REASON_BAD_MAX_I_T_IU_LEN 0x00010002UL + +/** Unable to associate RDMA channel with specified I_T nexus */ +#define SRP_LOGIN_REJ_REASON_CANNOT_ASSOCIATE 0x00010003UL + +/** One or more requested data buffer descriptor formats are not supported */ +#define SRP_LOGIN_REJ_REASON_UNSUPPORTED_BUFFER_FORMAT 0x00010004UL + +/** SRP target port does not support multiple RDMA channels per I_T nexus */ +#define SRP_LOGIN_REJ_REASON_NO_MULTIPLE_CHANNELS 0x00010005UL + +/** RDMA channel limit reached for this initiator */ +#define SRP_LOGIN_REJ_REASON_NO_MORE_CHANNELS 0x00010006UL + +/** SRP login rejection reason is defined */ +#define SRP_LOGIN_REJ_REASON_DEFINED( reason ) \ + ( ( (reason) & 0xfffffff0UL ) == 0x00010000UL ) + +/** Indirect data buffer descriptor format supported */ +#define SRP_LOGIN_REJ_FMT_IDBD 0x04 + +/** Direct data buffer descriptor format supported */ +#define SRP_LOGIN_REJ_FMT_DDBD 0x02 + +/***************************************************************************** + * + * Initiator logout + * + ***************************************************************************** + */ + +/** An SRP initiator logout request */ +struct srp_i_logout { + /** Information unit type + * + * This must be @c SRP_I_LOGOUT + */ + uint8_t type; + /** Reserved */ + uint8_t reserved0[7]; + /** Tag */ + union srp_tag tag; +} __attribute__ (( packed )); + +/** Type of an SRP initiator logout request */ +#define SRP_I_LOGOUT 0x03 + +/***************************************************************************** + * + * Target logout + * + ***************************************************************************** + */ + +/** An SRP target logout request */ +struct srp_t_logout { + /** Information unit type + * + * This must be @c SRP_T_LOGOUT + */ + uint8_t type; + /** Flags + * + * This is the bitwise OR of zero or more @c + * SRP_T_LOGOUT_FLAG_XXX constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved0[2]; + /** Reason + * + * This is a @c SRP_T_LOGOUT_REASON_XXX constant. + */ + uint32_t reason; + /** Tag */ + union srp_tag tag; +} __attribute__ (( packed )); + +/** Type of an SRP target logout request */ +#define SRP_T_LOGOUT 0x80 + +/** The initiator specified solicited notification of logouts */ +#define SRP_T_LOGOUT_FLAG_SOLNT 0x01 + +/** No reason specified */ +#define SRP_T_LOGOUT_REASON_UNKNOWN 0x00000000UL + +/** Inactive RDMA channel (reclaiming resources) */ +#define SRP_T_LOGOUT_REASON_INACTIVE 0x00000001UL + +/** Invalid information unit type code received by SRP target port */ +#define SRP_T_LOGOUT_REASON_INVALID_TYPE 0x00000002UL + +/** SRP initiator port sent response with no corresponding request */ +#define SRP_T_LOGOUT_REASON_SPURIOUS_RESPONSE 0x00000003UL + +/** RDMA channel disconnected due to multi-channel action code in new login */ +#define SRP_T_LOGOUT_REASON_MCA 0x00000004UL + +/** Unsuppported format code value specified in data-out buffer descriptor */ +#define SRP_T_LOGOUT_UNSUPPORTED_DATA_OUT_FORMAT 0x00000005UL + +/** Unsuppported format code value specified in data-in buffer descriptor */ +#define SRP_T_LOGOUT_UNSUPPORTED_DATA_IN_FORMAT 0x00000006UL + +/** Invalid length for IU type */ +#define SRP_T_LOGOUT_INVALID_IU_LEN 0x00000008UL + +/***************************************************************************** + * + * Task management + * + ***************************************************************************** + */ + +/** An SRP task management request */ +struct srp_tsk_mgmt { + /** Information unit type + * + * This must be @c SRP_TSK_MGMT + */ + uint8_t type; + /** Flags + * + * This is the bitwise OR of zero or more + * @c SRP_TSK_MGMT_FLAG_XXX constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved0[6]; + /** Tag */ + union srp_tag tag; + /** Reserved */ + uint8_t reserved1[4]; + /** Logical unit number */ + struct scsi_lun lun; + /** Reserved */ + uint8_t reserved2[2]; + /** Task management function + * + * This is a @c SRP_TASK_MGMT_FUNC_XXX constant + */ + uint8_t function; + /** Reserved */ + uint8_t reserved3[1]; + /** Tag of task to be managed */ + union srp_tag managed_tag; + /** Reserved */ + uint8_t reserved4[8]; +} __attribute__ (( packed )); + +/** Type of an SRP task management request */ +#define SRP_TSK_MGMT 0x01 + +/** Use solicited notification for unsuccessful completions */ +#define SRP_TSK_MGMT_FLAG_UCSOLNT 0x04 + +/** Use solicited notification for successful completions */ +#define SRP_TSK_MGMT_FLAG_SCSOLNT 0x02 + +/** The task manager shall perform an ABORT TASK function */ +#define SRP_TSK_MGMT_FUNC_ABORT_TASK 0x01 + +/** The task manager shall perform an ABORT TASK SET function */ +#define SRP_TSK_MGMT_FUNC_ABORT_TASK_SET 0x02 + +/** The task manager shall perform a CLEAR TASK SET function */ +#define SRP_TSK_MGMT_FUNC_CLEAR_TASK_SET 0x04 + +/** The task manager shall perform a LOGICAL UNIT RESET function */ +#define SRP_TSK_MGMT_FUNC_LOGICAL_UNIT_RESET 0x08 + +/** The task manager shall perform a CLEAR ACA function */ +#define SRP_TSK_MGMT_FUNC_CLEAR_ACA 0x40 + +/***************************************************************************** + * + * SCSI command + * + ***************************************************************************** + */ + +/** An SRP SCSI command */ +struct srp_cmd { + /** Information unit type + * + * This must be @c SRP_CMD + */ + uint8_t type; + /** Flags + * + * This is the bitwise OR of zero or more @c SRP_CMD_FLAG_XXX + * constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved0[3]; + /** Data buffer descriptor formats + * + * This is the bitwise OR of one @c SRP_CMD_DO_FMT_XXX and one @c + * SRP_CMD_DI_FMT_XXX constant. + */ + uint8_t data_buffer_formats; + /** Data-out buffer descriptor count */ + uint8_t data_out_buffer_count; + /** Data-in buffer descriptor count */ + uint8_t data_in_buffer_count; + /** Tag */ + union srp_tag tag; + /** Reserved */ + uint8_t reserved1[4]; + /** Logical unit number */ + struct scsi_lun lun; + /** Reserved */ + uint8_t reserved2[1]; + /** Task attribute + * + * This is a @c SRP_CMD_TASK_ATTR_XXX constant. + */ + uint8_t task_attr; + /** Reserved */ + uint8_t reserved3[1]; + /** Additional CDB length */ + uint8_t additional_cdb_len; + /** Command data block */ + union scsi_cdb cdb; +} __attribute__ (( packed )); + +/** Type of an SRP SCSI command */ +#define SRP_CMD 0x02 + +/** Use solicited notification for unsuccessful completions */ +#define SRP_CMD_FLAG_UCSOLNT 0x04 + +/** Use solicited notification for successful completions */ +#define SRP_CMD_FLAG_SCSOLNT 0x02 + +/** Data-out buffer format mask */ +#define SRP_CMD_DO_FMT_MASK 0xf0 + +/** Direct data-out buffer format */ +#define SRP_CMD_DO_FMT_DIRECT 0x10 + +/** Indirect data-out buffer format */ +#define SRP_CMD_DO_FMT_INDIRECT 0x20 + +/** Data-in buffer format mask */ +#define SRP_CMD_DI_FMT_MASK 0x0f + +/** Direct data-in buffer format */ +#define SRP_CMD_DI_FMT_DIRECT 0x01 + +/** Indirect data-in buffer format */ +#define SRP_CMD_DI_FMT_INDIRECT 0x02 + +/** Use the rules for a simple task attribute */ +#define SRP_CMD_TASK_ATTR_SIMPLE 0x00 + +/** Use the rules for a head of queue task attribute */ +#define SRP_CMD_TASK_ATTR_QUEUE_HEAD 0x01 + +/** Use the rules for an ordered task attribute */ +#define SRP_CMD_TASK_ATTR_ORDERED 0x02 + +/** Use the rules for an automatic contingent allegiance task attribute */ +#define SRP_CMD_TASK_ATTR_AUTOMATIC_CONTINGENT_ALLEGIANCE 0x08 + +/** An SRP memory descriptor */ +struct srp_memory_descriptor { + /** Virtual address */ + uint64_t address; + /** Memory handle */ + uint32_t handle; + /** Data length */ + uint32_t len; +} __attribute__ (( packed )); + +/***************************************************************************** + * + * SCSI response + * + ***************************************************************************** + */ + +/** An SRP SCSI response */ +struct srp_rsp { + /** Information unit type + * + * This must be @c SRP_RSP + */ + uint8_t type; + /** Flags + * + * This is the bitwise OR of zero or more @c SRP_RSP_FLAG_XXX + * constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved0[2]; + /** Request limit delta */ + uint32_t request_limit_delta; + /** Tag */ + union srp_tag tag; + /** Reserved */ + uint8_t reserved1[2]; + /** Valid fields + * + * This is the bitwise OR of zero or more @c SRP_RSP_VALID_XXX + * constants. + */ + uint8_t valid; + /** Status + * + * This is the SCSI status code. + */ + uint8_t status; + /** Data-out residual count */ + uint32_t data_out_residual_count; + /** Data-in residual count */ + uint32_t data_in_residual_count; + /** Sense data list length */ + uint32_t sense_data_len; + /** Response data list length */ + uint32_t response_data_len; +} __attribute__ (( packed )); + +/** Type of an SRP SCSI response */ +#define SRP_RSP 0xc1 + +/** The initiator specified solicited notification of this response */ +#define SRP_RSP_FLAG_SOLNT 0x01 + +/** Data-in residual count field is valid and represents an underflow */ +#define SRP_RSP_VALID_DIUNDER 0x20 + +/** Data-in residual count field is valid and represents an overflow */ +#define SRP_RSP_VALID_DIOVER 0x10 + +/** Data-out residual count field is valid and represents an underflow */ +#define SRP_RSP_VALID_DOUNDER 0x08 + +/** Data-out residual count field is valid and represents an overflow */ +#define SRP_RSP_VALID_DOOVER 0x04 + +/** Sense data list length field is valid */ +#define SRP_RSP_VALID_SNSVALID 0x02 + +/** Response data list length field is valid */ +#define SRP_RSP_VALID_RSPVALID 0x01 + +/** + * Get response data portion of SCSI response + * + * @v rsp SCSI response + * @ret response_data Response data, or NULL if not present + */ +static inline const void * srp_rsp_response_data ( const struct srp_rsp *rsp ) { + return ( ( rsp->valid & SRP_RSP_VALID_RSPVALID ) ? + ( ( ( const void * ) rsp ) + sizeof ( *rsp ) ) : NULL ); +} + +/** + * Get length of response data portion of SCSI response + * + * @v rsp SCSI response + * @ret response_data_len Response data length + */ +static inline size_t srp_rsp_response_data_len ( const struct srp_rsp *rsp ) { + return ( ( rsp->valid & SRP_RSP_VALID_RSPVALID ) ? + ntohl ( rsp->response_data_len ) : 0 ); +} + +/** + * Get sense data portion of SCSI response + * + * @v rsp SCSI response + * @ret sense_data Sense data, or NULL if not present + */ +static inline const void * srp_rsp_sense_data ( const struct srp_rsp *rsp ) { + return ( ( rsp->valid & SRP_RSP_VALID_SNSVALID ) ? + ( ( ( const void * ) rsp ) + sizeof ( *rsp ) + + srp_rsp_response_data_len ( rsp ) ) : NULL ); +} + +/** + * Get length of sense data portion of SCSI response + * + * @v rsp SCSI response + * @ret sense_data_len Sense data length + */ +static inline size_t srp_rsp_sense_data_len ( const struct srp_rsp *rsp ) { + return ( ( rsp->valid & SRP_RSP_VALID_SNSVALID ) ? + ntohl ( rsp->sense_data_len ) : 0 ); +} + +/***************************************************************************** + * + * Credit request + * + ***************************************************************************** + */ + +/** An SRP credit request */ +struct srp_cred_req { + /** Information unit type + * + * This must be @c SRP_CRED_REQ + */ + uint8_t type; + /** Flags + * + * This is the bitwise OR of zero or more + * @c SRP_CRED_REQ_FLAG_XXX constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved0[2]; + /** Request limit delta */ + uint32_t request_limit_delta; + /** Tag */ + union srp_tag tag; +} __attribute__ (( packed )); + +/** Type of an SRP credit request */ +#define SRP_CRED_REQ 0x81 + +/** The initiator specified solicited notification of credit requests */ +#define SRP_CRED_REQ_FLAG_SOLNT 0x01 + +/***************************************************************************** + * + * Credit response + * + ***************************************************************************** + */ + +/** An SRP credit response */ +struct srp_cred_rsp { + /** Information unit type + * + * This must be @c SRP_CRED_RSP + */ + uint8_t type; + /** Reserved */ + uint8_t reserved0[7]; + /** Tag */ + union srp_tag tag; +} __attribute__ (( packed )); + +/** Type of an SRP credit response */ +#define SRP_CRED_RSP 0x41 + +/***************************************************************************** + * + * Asynchronous event request + * + ***************************************************************************** + */ + +/** An SRP asynchronous event request */ +struct srp_aer_req { + /** Information unit type + * + * This must be @c SRP_AER_REQ + */ + uint8_t type; + /** Flags + * + * This is the bitwise OR of zero or more @c + * SRP_AER_REQ_FLAG_XXX constants. + */ + uint8_t flags; + /** Reserved */ + uint8_t reserved0[2]; + /** Request limit delta */ + uint32_t request_limit_delta; + /** Tag */ + union srp_tag tag; + /** Reserved */ + uint8_t reserved1[4]; + /** Logical unit number */ + struct scsi_lun lun; + /** Sense data list length */ + uint32_t sense_data_len; + /** Reserved */ + uint8_t reserved2[4]; +} __attribute__ (( packed )); + +/** Type of an SRP asynchronous event request */ +#define SRP_AER_REQ 0x82 + +/** The initiator specified solicited notification of asynchronous events */ +#define SRP_AER_REQ_FLAG_SOLNT 0x01 + +/** + * Get sense data portion of asynchronous event request + * + * @v aer_req SRP asynchronous event request + * @ret sense_data Sense data + */ +static inline __always_inline void * +srp_aer_req_sense_data ( struct srp_aer_req *aer_req ) { + return ( ( ( void * ) aer_req ) + sizeof ( *aer_req ) ); +} + +/** + * Get length of sense data portion of asynchronous event request + * + * @v aer_req SRP asynchronous event request + * @ret sense_data_len Sense data length + */ +static inline __always_inline size_t +srp_aer_req_sense_data_len ( struct srp_aer_req *aer_req ) { + return ( ntohl ( aer_req->sense_data_len ) ); +} + +/***************************************************************************** + * + * Asynchronous event response + * + ***************************************************************************** + */ + +/** An SRP asynchronous event response */ +struct srp_aer_rsp { + /** Information unit type + * + * This must be @c SRP_AER_RSP + */ + uint8_t type; + /** Reserved */ + uint8_t reserved0[7]; + /** Tag */ + union srp_tag tag; +} __attribute__ (( packed )); + +/** Type of an SRP asynchronous event response */ +#define SRP_AER_RSP 0x42 + +/***************************************************************************** + * + * SRP boot firmware table + * + * The working draft specification for the SRP boot firmware table can + * be found at + * + * http://ipxe.org/wiki/srp/sbft + * + ***************************************************************************** + */ + +/** SRP Boot Firmware Table signature */ +#define SBFT_SIG ACPI_SIGNATURE ( 's', 'B', 'F', 'T' ) + +/** An offset from the start of the sBFT */ +typedef uint16_t sbft_off_t; + +/** + * SRP Boot Firmware Table + */ +struct sbft_table { + /** ACPI header */ + struct acpi_description_header acpi; + /** Offset to SCSI subtable */ + sbft_off_t scsi_offset; + /** Offset to SRP subtable */ + sbft_off_t srp_offset; + /** Offset to IB subtable, if present */ + sbft_off_t ib_offset; + /** Reserved */ + uint8_t reserved[6]; +} __attribute__ (( packed )); + +/** + * sBFT SCSI subtable + */ +struct sbft_scsi_subtable { + /** LUN */ + struct scsi_lun lun; +} __attribute__ (( packed )); + +/** + * sBFT SRP subtable + */ +struct sbft_srp_subtable { + /** Initiator port identifier */ + union srp_port_id initiator; + /** Target port identifier */ + union srp_port_id target; +} __attribute__ (( packed )); + +/***************************************************************************** + * + * SRP devices + * + ***************************************************************************** + */ + +extern int srp_open ( struct interface *block, struct interface *socket, + union srp_port_id *initiator, union srp_port_id *target, + uint32_t memory_handle, struct scsi_lun *lun ); + +#endif /* _IPXE_SRP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/syslog.h b/qemu/roms/ipxe/src/include/ipxe/syslog.h new file mode 100644 index 000000000..131692654 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/syslog.h @@ -0,0 +1,41 @@ +#ifndef _IPXE_SYSLOG_H +#define _IPXE_SYSLOG_H + +/** @file + * + * Syslog protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <syslog.h> + +/** Syslog server port */ +#define SYSLOG_PORT 514 + +/** Syslog line buffer size + * + * This is a policy decision + */ +#define SYSLOG_BUFSIZE 128 + +/** Syslog default facility + * + * This is a policy decision + */ +#define SYSLOG_DEFAULT_FACILITY 0 /* kernel */ + +/** Syslog default severity + * + * This is a policy decision + */ +#define SYSLOG_DEFAULT_SEVERITY LOG_INFO + +/** Syslog priority */ +#define SYSLOG_PRIORITY( facility, severity ) ( 8 * (facility) + (severity) ) + +extern int syslog_send ( struct interface *xfer, unsigned int severity, + const char *message, const char *terminator ); + +#endif /* _IPXE_SYSLOG_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/tables.h b/qemu/roms/ipxe/src/include/ipxe/tables.h new file mode 100644 index 000000000..e35ce8220 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/tables.h @@ -0,0 +1,518 @@ +#ifndef _IPXE_TABLES_H +#define _IPXE_TABLES_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** @page ifdef_harmful #ifdef considered harmful + * + * Overuse of @c #ifdef has long been a problem in Etherboot. + * Etherboot provides a rich array of features, but all these features + * take up valuable space in a ROM image. The traditional solution to + * this problem has been for each feature to have its own @c #ifdef + * option, allowing the feature to be compiled in only if desired. + * + * The problem with this is that it becomes impossible to compile, let + * alone test, all possible versions of Etherboot. Code that is not + * typically used tends to suffer from bit-rot over time. It becomes + * extremely difficult to predict which combinations of compile-time + * options will result in code that can even compile and link + * correctly. + * + * To solve this problem, we have adopted a new approach from + * Etherboot 5.5 onwards. @c #ifdef is now "considered harmful", and + * its use should be minimised. Separate features should be + * implemented in separate @c .c files, and should \b always be + * compiled (i.e. they should \b not be guarded with a @c #ifdef @c + * MY_PET_FEATURE statement). By making (almost) all code always + * compile, we avoid the problem of bit-rot in rarely-used code. + * + * The file config.h, in combination with the @c make command line, + * specifies the objects that will be included in any particular build + * of Etherboot. For example, suppose that config.h includes the line + * + * @code + * + * #define CONSOLE_SERIAL + * #define DOWNLOAD_PROTO_TFTP + * + * @endcode + * + * When a particular Etherboot image (e.g. @c bin/rtl8139.zdsk) is + * built, the options specified in config.h are used to drag in the + * relevant objects at link-time. For the above example, serial.o and + * tftp.o would be linked in. + * + * There remains one problem to solve: how do these objects get used? + * Traditionally, we had code such as + * + * @code + * + * #ifdef CONSOLE_SERIAL + * serial_init(); + * #endif + * + * @endcode + * + * in main.c, but this reintroduces @c #ifdef and so is a Bad Idea. + * We cannot simply remove the @c #ifdef and make it + * + * @code + * + * serial_init(); + * + * @endcode + * + * because then serial.o would end up always being linked in. + * + * The solution is to use @link tables.h linker tables @endlink. + * + */ + +/** @file + * + * Linker tables + * + * Read @ref ifdef_harmful first for some background on the motivation + * for using linker tables. + * + * This file provides macros for dealing with linker-generated tables + * of fixed-size symbols. We make fairly extensive use of these in + * order to avoid @c #ifdef spaghetti and/or linker symbol pollution. + * For example, instead of having code such as + * + * @code + * + * #ifdef CONSOLE_SERIAL + * serial_init(); + * #endif + * + * @endcode + * + * we make serial.c generate an entry in the initialisation function + * table, and then have a function call_init_fns() that simply calls + * all functions present in this table. If and only if serial.o gets + * linked in, then its initialisation function will be called. We + * avoid linker symbol pollution (i.e. always dragging in serial.o + * just because of a call to serial_init()) and we also avoid @c + * #ifdef spaghetti (having to conditionalise every reference to + * functions in serial.c). + * + * The linker script takes care of assembling the tables for us. All + * our table sections have names of the format @c .tbl.NAME.NN where + * @c NAME designates the data structure stored in the table (e.g. @c + * init_fns) and @c NN is a two-digit decimal number used to impose an + * ordering upon the tables if required. @c NN=00 is reserved for the + * symbol indicating "table start", and @c NN=99 is reserved for the + * symbol indicating "table end". + * + * As an example, suppose that we want to create a "frobnicator" + * feature framework, and allow for several independent modules to + * provide frobnicating services. Then we would create a frob.h + * header file containing e.g. + * + * @code + * + * struct frobnicator { + * const char *name; // Name of the frobnicator + * void ( *frob ) ( void ); // The frobnicating function itself + * }; + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * #define __frobnicator __table_entry ( FROBNICATORS, 01 ) + * + * @endcode + * + * Any module providing frobnicating services would look something + * like + * + * @code + * + * #include "frob.h" + * + * static void my_frob ( void ) { + * // Do my frobnicating + * ... + * } + * + * struct frob my_frobnicator __frobnicator = { + * .name = "my_frob", + * .frob = my_frob, + * }; + * + * @endcode + * + * The central frobnicator code (frob.c) would use the frobnicating + * modules as follows + * + * @code + * + * #include "frob.h" + * + * // Call all linked-in frobnicators + * void frob_all ( void ) { + * struct frob *frob; + * + * for_each_table ( frob, FROBNICATORS ) { + * printf ( "Calling frobnicator \"%s\"\n", frob->name ); + * frob->frob (); + * } + * } + * + * @endcode + * + * See init.h and init.c for a real-life example. + * + */ + +#ifdef DOXYGEN +#define __attribute__( x ) +#endif + +/** + * Declare a linker table + * + * @v type Data type + * @v name Table name + * @ret table Linker table + */ +#define __table( type, name ) ( type, name ) + +/** + * Get linker table data type + * + * @v table Linker table + * @ret type Data type + */ +#define __table_type( table ) __table_extract_type table +#define __table_extract_type( type, name ) type + +/** + * Get linker table name + * + * @v table Linker table + * @ret name Table name + */ +#define __table_name( table ) __table_extract_name table +#define __table_extract_name( type, name ) name + +/** + * Get linker table section name + * + * @v table Linker table + * @v idx Sub-table index + * @ret section Section name + */ +#define __table_section( table, idx ) \ + ".tbl." __table_name ( table ) "." __table_str ( idx ) +#define __table_str( x ) #x + +/** + * Get linker table alignment + * + * @v table Linker table + * @ret align Alignment + */ +#define __table_alignment( table ) __alignof__ ( __table_type ( table ) ) + +/** + * Declare a linker table entry + * + * @v table Linker table + * @v idx Sub-table index + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * #define __frobnicator __table_entry ( FROBNICATORS, 01 ) + * + * struct frobnicator my_frob __frobnicator = { + * ... + * }; + * + * @endcode + */ +#define __table_entry( table, idx ) \ + __attribute__ (( __section__ ( __table_section ( table, idx ) ),\ + __aligned__ ( __table_alignment ( table ) ) )) + +/** + * Get start of linker table entries + * + * @v table Linker table + * @v idx Sub-table index + * @ret entries Start of entries + */ +#define __table_entries( table, idx ) ( { \ + static __table_type ( table ) __table_entries[0] \ + __table_entry ( table, idx ) \ + __attribute__ (( unused )); \ + __table_entries; } ) + +/** + * Get start of linker table + * + * @v table Linker table + * @ret start Start of linker table + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * struct frobnicator *frobs = table_start ( FROBNICATORS ); + * + * @endcode + */ +#define table_start( table ) __table_entries ( table, 00 ) + +/** + * Get end of linker table + * + * @v table Linker table + * @ret end End of linker table + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * struct frobnicator *frobs_end = table_end ( FROBNICATORS ); + * + * @endcode + */ +#define table_end( table ) __table_entries ( table, 99 ) + +/** + * Get number of entries in linker table + * + * @v table Linker table + * @ret num_entries Number of entries in linker table + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * unsigned int num_frobs = table_num_entries ( FROBNICATORS ); + * + * @endcode + * + */ +#define table_num_entries( table ) \ + ( ( unsigned int ) ( table_end ( table ) - \ + table_start ( table ) ) ) + +/** + * Get index of entry within linker table + * + * @v table Linker table + * @v entry Table entry + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * #define __frobnicator __table_entry ( FROBNICATORS, 01 ) + * + * struct frobnicator my_frob __frobnicator = { + * ... + * }; + * + * unsigned int my_frob_idx = table_index ( FROBNICATORS, &my_frob ); + * + * @endcode + */ +#define table_index( table, entry ) \ + ( ( unsigned int ) ( (entry) - table_start ( table ) ) ) + +/** + * Iterate through all entries within a linker table + * + * @v pointer Entry pointer + * @v table Linker table + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * struct frobnicator *frob; + * + * for_each_table_entry ( frob, FROBNICATORS ) { + * ... + * } + * + * @endcode + * + */ +#define for_each_table_entry( pointer, table ) \ + for ( pointer = table_start ( table ) ; \ + pointer < table_end ( table ) ; \ + pointer++ ) + +/** + * Iterate through all remaining entries within a linker table + * + * @v pointer Entry pointer, preset to most recent entry + * @v table Linker table + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * #define __frobnicator __table_entry ( FROBNICATORS, 01 ) + * + * struct frob my_frobnicator __frobnicator; + * struct frobnicator *frob; + * + * frob = &my_frobnicator; + * for_each_table_entry_continue ( frob, FROBNICATORS ) { + * ... + * } + * + * @endcode + * + */ +#define for_each_table_entry_continue( pointer, table ) \ + for ( pointer++ ; \ + pointer < table_end ( table ) ; \ + pointer++ ) + +/** + * Iterate through all entries within a linker table in reverse order + * + * @v pointer Entry pointer + * @v table Linker table + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * + * struct frobnicator *frob; + * + * for_each_table_entry_reverse ( frob, FROBNICATORS ) { + * ... + * } + * + * @endcode + * + */ +#define for_each_table_entry_reverse( pointer, table ) \ + for ( pointer = ( table_end ( table ) - 1 ) ; \ + pointer >= table_start ( table ) ; \ + pointer-- ) + +/** + * Iterate through all remaining entries within a linker table in reverse order + * + * @v pointer Entry pointer, preset to most recent entry + * @v table Linker table + * + * Example usage: + * + * @code + * + * #define FROBNICATORS __table ( struct frobnicator, "frobnicators" ) + * #define __frobnicator __table_entry ( FROBNICATORS, 01 ) + * + * struct frob my_frobnicator __frobnicator; + * struct frobnicator *frob; + * + * frob = &my_frobnicator; + * for_each_table_entry_continue_reverse ( frob, FROBNICATORS ) { + * ... + * } + * + * @endcode + * + */ +#define for_each_table_entry_continue_reverse( pointer, table ) \ + for ( pointer-- ; \ + pointer >= table_start ( table ) ; \ + pointer-- ) + +/****************************************************************************** + * + * Intel's C compiler chokes on several of the constructs used in this + * file. The workarounds are ugly, so we use them only for an icc + * build. + * + */ +#define ICC_ALIGN_HACK_FACTOR 128 +#ifdef __ICC + +/* + * icc miscompiles zero-length arrays by inserting padding to a length + * of two array elements. We therefore have to generate the + * __table_entries() symbols by hand in asm. + * + */ +#undef __table_entries +#define __table_entries( table, idx ) ( { \ + extern __table_type ( table ) \ + __table_temp_sym ( idx, __LINE__ ) [] \ + __table_entry ( table, idx ) \ + asm ( __table_entries_sym ( table, idx ) ); \ + __asm__ ( ".ifndef %c0\n\t" \ + ".section " __table_section ( table, idx ) "\n\t" \ + ".align %c1\n\t" \ + "\n%c0:\n\t" \ + ".previous\n\t" \ + ".endif\n\t" \ + : : "i" ( __table_temp_sym ( idx, __LINE__ ) ), \ + "i" ( __table_alignment ( table ) ) ); \ + __table_temp_sym ( idx, __LINE__ ); } ) +#define __table_entries_sym( table, idx ) \ + "__tbl_" __table_name ( table ) "_" #idx +#define __table_temp_sym( a, b ) \ + ___table_temp_sym( __table_, a, _, b ) +#define ___table_temp_sym( a, b, c, d ) a ## b ## c ## d + +/* + * icc ignores __attribute__ (( aligned (x) )) when it is used to + * decrease the compiler's default choice of alignment (which may be + * higher than the alignment actually required by the structure). We + * work around this by forcing the alignment to a large multiple of + * the required value (so that we are never attempting to decrease the + * default alignment) and then postprocessing the object file to + * reduce the alignment back down to the "real" value. + * + */ +#undef __table_alignment +#define __table_alignment( table ) \ + ( ICC_ALIGN_HACK_FACTOR * __alignof__ ( __table_type ( table ) ) ) + +/* + * Because of the alignment hack, we must ensure that the compiler + * never tries to place multiple objects within the same section, + * otherwise the assembler will insert padding to the (incorrect) + * alignment boundary. Do this by appending the line number to table + * section names. + * + * Note that we don't need to worry about padding between array + * elements, since the alignment is declared on the variable (i.e. the + * whole array) rather than on the type (i.e. on all individual array + * elements). + */ +#undef __table_section +#define __table_section( table, idx ) \ + ".tbl." __table_name ( table ) "." __table_str ( idx ) \ + "." __table_xstr ( __LINE__ ) +#define __table_xstr( x ) __table_str ( x ) + +#endif /* __ICC */ + +#endif /* _IPXE_TABLES_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/tcp.h b/qemu/roms/ipxe/src/include/ipxe/tcp.h new file mode 100644 index 000000000..9baa6391c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/tcp.h @@ -0,0 +1,381 @@ +#ifndef _IPXE_TCP_H +#define _IPXE_TCP_H + +/** @file + * + * TCP protocol + * + * This file defines the iPXE TCP API. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tcpip.h> + +/** + * A TCP header + */ +struct tcp_header { + uint16_t src; /* Source port */ + uint16_t dest; /* Destination port */ + uint32_t seq; /* Sequence number */ + uint32_t ack; /* Acknowledgement number */ + uint8_t hlen; /* Header length (4), Reserved (4) */ + uint8_t flags; /* Reserved (2), Flags (6) */ + uint16_t win; /* Advertised window */ + uint16_t csum; /* Checksum */ + uint16_t urg; /* Urgent pointer */ +}; + +/** @defgroup tcpopts TCP options + * @{ + */ + +/** End of TCP options list */ +#define TCP_OPTION_END 0 + +/** TCP option pad */ +#define TCP_OPTION_NOP 1 + +/** Generic TCP option */ +struct tcp_option { + uint8_t kind; + uint8_t length; +} __attribute__ (( packed )); + +/** TCP MSS option */ +struct tcp_mss_option { + uint8_t kind; + uint8_t length; + uint16_t mss; +} __attribute__ (( packed )); + +/** Code for the TCP MSS option */ +#define TCP_OPTION_MSS 2 + +/** TCP window scale option */ +struct tcp_window_scale_option { + uint8_t kind; + uint8_t length; + uint8_t scale; +} __attribute__ (( packed )); + +/** Padded TCP window scale option (used for sending) */ +struct tcp_window_scale_padded_option { + uint8_t nop; + struct tcp_window_scale_option wsopt; +} __attribute (( packed )); + +/** Code for the TCP window scale option */ +#define TCP_OPTION_WS 3 + +/** Advertised TCP window scale + * + * Using a scale factor of 2**9 provides for a maximum window of 32MB, + * which is sufficient to allow Gigabit-speed transfers with a 200ms + * RTT. The minimum advertised window is 512 bytes, which is still + * less than a single packet. + */ +#define TCP_RX_WINDOW_SCALE 9 + +/** TCP timestamp option */ +struct tcp_timestamp_option { + uint8_t kind; + uint8_t length; + uint32_t tsval; + uint32_t tsecr; +} __attribute__ (( packed )); + +/** Padded TCP timestamp option (used for sending) */ +struct tcp_timestamp_padded_option { + uint8_t nop[2]; + struct tcp_timestamp_option tsopt; +} __attribute__ (( packed )); + +/** Code for the TCP timestamp option */ +#define TCP_OPTION_TS 8 + +/** Parsed TCP options */ +struct tcp_options { + /** MSS option, if present */ + const struct tcp_mss_option *mssopt; + /** Window scale option, if present */ + const struct tcp_window_scale_option *wsopt; + /** Timestamp option, if present */ + const struct tcp_timestamp_option *tsopt; +}; + +/** @} */ + +/* + * TCP flags + */ +#define TCP_CWR 0x80 +#define TCP_ECE 0x40 +#define TCP_URG 0x20 +#define TCP_ACK 0x10 +#define TCP_PSH 0x08 +#define TCP_RST 0x04 +#define TCP_SYN 0x02 +#define TCP_FIN 0x01 + +/** +* @defgroup tcpstates TCP states +* +* The TCP state is defined by a combination of the flags that have +* been sent to the peer, the flags that have been acknowledged by the +* peer, and the flags that have been received from the peer. +* +* @{ +*/ + +/** TCP flags that have been sent in outgoing packets */ +#define TCP_STATE_SENT(flags) ( (flags) << 0 ) +#define TCP_FLAGS_SENT(state) ( ( (state) >> 0 ) & 0xff ) + +/** TCP flags that have been acknowledged by the peer + * + * Note that this applies only to SYN and FIN. + */ +#define TCP_STATE_ACKED(flags) ( (flags) << 8 ) +#define TCP_FLAGS_ACKED(state) ( ( (state) >> 8 ) & 0xff ) + +/** TCP flags that have been received from the peer + * + * Note that this applies only to SYN and FIN, and that once SYN has + * been received, we should always be sending ACK. + */ +#define TCP_STATE_RCVD(flags) ( (flags) << 16 ) +#define TCP_FLAGS_RCVD(state) ( ( (state) >> 16 ) & 0xff ) + +/** TCP flags that are currently being sent in outgoing packets */ +#define TCP_FLAGS_SENDING(state) \ + ( TCP_FLAGS_SENT ( state ) & ~TCP_FLAGS_ACKED ( state ) ) + +/** CLOSED + * + * The connection has not yet been used for anything. + */ +#define TCP_CLOSED TCP_RST + +/** LISTEN + * + * Not currently used as a state; we have no support for listening + * connections. Given a unique value to avoid compiler warnings. + */ +#define TCP_LISTEN 0 + +/** SYN_SENT + * + * SYN has been sent, nothing has yet been received or acknowledged. + */ +#define TCP_SYN_SENT ( TCP_STATE_SENT ( TCP_SYN ) ) + +/** SYN_RCVD + * + * SYN has been sent but not acknowledged, SYN has been received. + */ +#define TCP_SYN_RCVD ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK ) | \ + TCP_STATE_RCVD ( TCP_SYN ) ) + +/** ESTABLISHED + * + * SYN has been sent and acknowledged, SYN has been received. + */ +#define TCP_ESTABLISHED ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK ) | \ + TCP_STATE_ACKED ( TCP_SYN ) | \ + TCP_STATE_RCVD ( TCP_SYN ) ) + +/** FIN_WAIT_1 + * + * SYN has been sent and acknowledged, SYN has been received, FIN has + * been sent but not acknowledged, FIN has not been received. + * + * RFC 793 shows that we can enter FIN_WAIT_1 without have had SYN + * acknowledged, i.e. if the application closes the connection after + * sending and receiving SYN, but before having had SYN acknowledged. + * However, we have to *pretend* that SYN has been acknowledged + * anyway, otherwise we end up sending SYN and FIN in the same + * sequence number slot. Therefore, when we transition from SYN_RCVD + * to FIN_WAIT_1, we have to remember to set TCP_STATE_ACKED(TCP_SYN) + * and increment our sequence number. + */ +#define TCP_FIN_WAIT_1 ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ + TCP_STATE_ACKED ( TCP_SYN ) | \ + TCP_STATE_RCVD ( TCP_SYN ) ) + +/** FIN_WAIT_2 + * + * SYN has been sent and acknowledged, SYN has been received, FIN has + * been sent and acknowledged, FIN ha not been received. + */ +#define TCP_FIN_WAIT_2 ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ + TCP_STATE_ACKED ( TCP_SYN | TCP_FIN ) | \ + TCP_STATE_RCVD ( TCP_SYN ) ) + +/** CLOSING / LAST_ACK + * + * SYN has been sent and acknowledged, SYN has been received, FIN has + * been sent but not acknowledged, FIN has been received. + * + * This state actually encompasses both CLOSING and LAST_ACK; they are + * identical with the definition of state that we use. I don't + * *believe* that they need to be distinguished. + */ +#define TCP_CLOSING_OR_LAST_ACK \ + ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ + TCP_STATE_ACKED ( TCP_SYN ) | \ + TCP_STATE_RCVD ( TCP_SYN | TCP_FIN ) ) + +/** TIME_WAIT + * + * SYN has been sent and acknowledged, SYN has been received, FIN has + * been sent and acknowledged, FIN has been received. + */ +#define TCP_TIME_WAIT ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ + TCP_STATE_ACKED ( TCP_SYN | TCP_FIN ) | \ + TCP_STATE_RCVD ( TCP_SYN | TCP_FIN ) ) + +/** CLOSE_WAIT + * + * SYN has been sent and acknowledged, SYN has been received, FIN has + * been received. + */ +#define TCP_CLOSE_WAIT ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK ) | \ + TCP_STATE_ACKED ( TCP_SYN ) | \ + TCP_STATE_RCVD ( TCP_SYN | TCP_FIN ) ) + +/** Can send data in current state + * + * We can send data if and only if we have had our SYN acked and we + * have not yet sent our FIN. + */ +#define TCP_CAN_SEND_DATA(state) \ + ( ( (state) & ( TCP_STATE_ACKED ( TCP_SYN ) | \ + TCP_STATE_SENT ( TCP_FIN ) ) ) \ + == TCP_STATE_ACKED ( TCP_SYN ) ) + +/** Have ever been fully established + * + * We have been fully established if we have both received a SYN and + * had our own SYN acked. + */ +#define TCP_HAS_BEEN_ESTABLISHED(state) \ + ( ( (state) & ( TCP_STATE_ACKED ( TCP_SYN ) | \ + TCP_STATE_RCVD ( TCP_SYN ) ) ) \ + == ( TCP_STATE_ACKED ( TCP_SYN ) | TCP_STATE_RCVD ( TCP_SYN ) ) ) + +/** Have closed gracefully + * + * We have closed gracefully if we have both received a FIN and had + * our own FIN acked. + */ +#define TCP_CLOSED_GRACEFULLY(state) \ + ( ( (state) & ( TCP_STATE_ACKED ( TCP_FIN ) | \ + TCP_STATE_RCVD ( TCP_FIN ) ) ) \ + == ( TCP_STATE_ACKED ( TCP_FIN ) | TCP_STATE_RCVD ( TCP_FIN ) ) ) + +/** @} */ + +/** Mask for TCP header length field */ +#define TCP_MASK_HLEN 0xf0 + +/** Smallest port number on which a TCP connection can listen */ +#define TCP_MIN_PORT 1 + +/** + * Maxmimum advertised TCP window size + * + * The maximum bandwidth on any link is limited by + * + * max_bandwidth * round_trip_time = tcp_window + * + * Some rough expectations for achievable bandwidths over various + * links are: + * + * a) Gigabit LAN: expected bandwidth 125MB/s, typical RTT 0.5ms, + * minimum required window 64kB + * + * b) Home Internet connection: expected bandwidth 10MB/s, typical + * RTT 25ms, minimum required window 256kB + * + * c) WAN: expected bandwidth 2MB/s, typical RTT 100ms, minimum + * required window 200kB. + * + * The maximum possible value for the TCP window size is 1GB (using + * the maximum window scale of 2**14). However, it is advisable to + * keep the window size as small as possible (without limiting + * bandwidth), since in the event of a lost packet the window size + * represents the maximum amount that will need to be retransmitted. + * + * We therefore choose a maximum window size of 256kB. + */ +#define TCP_MAX_WINDOW_SIZE ( 256 * 1024 ) + +/** + * Path MTU + * + * IPv6 requires all data link layers to support a datagram size of + * 1280 bytes. We choose to use this as our maximum transmitted + * datagram size, on the assumption that any practical link layer we + * encounter will allow this size. This is a very conservative + * assumption in practice, but the impact of making such a + * conservative assumption is insignificant since the amount of data + * that we transmit (rather than receive) is negligible. + * + * We allow space within this 1280 bytes for an IPv6 header, a TCP + * header, and a (padded) TCP timestamp option. + */ +#define TCP_PATH_MTU \ + ( 1280 - 40 /* IPv6 */ - 20 /* TCP */ - 12 /* TCP timestamp */ ) + +/** TCP maximum segment lifetime + * + * Currently set to 2 minutes, as per RFC 793. + */ +#define TCP_MSL ( 2 * 60 * TICKS_PER_SEC ) + +/** + * TCP maximum header length + * + */ +#define TCP_MAX_HEADER_LEN \ + ( MAX_LL_NET_HEADER_LEN + \ + sizeof ( struct tcp_header ) + \ + sizeof ( struct tcp_mss_option ) + \ + sizeof ( struct tcp_window_scale_padded_option ) + \ + sizeof ( struct tcp_timestamp_padded_option ) ) + +/** + * Compare TCP sequence numbers + * + * @v seq1 Sequence number 1 + * @v seq2 Sequence number 2 + * @ret diff Sequence difference + * + * Analogous to memcmp(), returns an integer less than, equal to, or + * greater than zero if @c seq1 is found, respectively, to be before, + * equal to, or after @c seq2. + */ +static inline __attribute__ (( always_inline )) int32_t +tcp_cmp ( uint32_t seq1, uint32_t seq2 ) { + return ( ( int32_t ) ( seq1 - seq2 ) ); +} + +/** + * Check if TCP sequence number lies within window + * + * @v seq Sequence number + * @v start Start of window + * @v len Length of window + * @ret in_window Sequence number is within window + */ +static inline int tcp_in_window ( uint32_t seq, uint32_t start, + uint32_t len ) { + return ( ( seq - start ) < len ); +} + +extern struct tcpip_protocol tcp_protocol __tcpip_protocol; + +#endif /* _IPXE_TCP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/tcpip.h b/qemu/roms/ipxe/src/include/ipxe/tcpip.h new file mode 100644 index 000000000..200630d6b --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/tcpip.h @@ -0,0 +1,167 @@ +#ifndef _IPXE_TCPIP_H +#define _IPXE_TCPIP_H + +/** @file + * + * Transport-network layer interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/socket.h> +#include <ipxe/in.h> +#include <ipxe/tables.h> +#include <bits/tcpip.h> + +struct io_buffer; +struct net_device; +struct ip_statistics; + +/** Empty checksum value + * + * This is the TCP/IP checksum over a zero-length block of data. + */ +#define TCPIP_EMPTY_CSUM 0xffff + +/** TCP/IP address flags */ +enum tcpip_st_flags { + /** Bind to a privileged port (less than 1024) + * + * This value is chosen as 1024 to optimise the calculations + * in tcpip_bind(). + */ + TCPIP_BIND_PRIVILEGED = 0x0400, +}; + +/** + * TCP/IP socket address + * + * This contains the fields common to socket addresses for all TCP/IP + * address families. + */ +struct sockaddr_tcpip { + /** Socket address family (part of struct @c sockaddr) */ + sa_family_t st_family; + /** Flags */ + uint16_t st_flags; + /** TCP/IP port */ + uint16_t st_port; + /** Padding + * + * This ensures that a struct @c sockaddr_tcpip is large + * enough to hold a socket address for any TCP/IP address + * family. + */ + char pad[ sizeof ( struct sockaddr ) - + ( sizeof ( sa_family_t ) /* st_family */ + + sizeof ( uint16_t ) /* st_flags */ + + sizeof ( uint16_t ) /* st_port */ ) ]; +} __attribute__ (( packed, may_alias )); + +/** + * A transport-layer protocol of the TCP/IP stack (eg. UDP, TCP, etc) + */ +struct tcpip_protocol { + /** Protocol name */ + const char *name; + /** + * Process received packet + * + * @v iobuf I/O buffer + * @v netdev Network device + * @v st_src Partially-filled source address + * @v st_dest Partially-filled destination address + * @v pshdr_csum Pseudo-header checksum + * @ret rc Return status code + * + * This method takes ownership of the I/O buffer. + */ + int ( * rx ) ( struct io_buffer *iobuf, struct net_device *netdev, + struct sockaddr_tcpip *st_src, + struct sockaddr_tcpip *st_dest, uint16_t pshdr_csum ); + /** + * Transport-layer protocol number + * + * This is a constant of the type IP_XXX + */ + uint8_t tcpip_proto; +}; + +/** + * A network-layer protocol of the TCP/IP stack (eg. IPV4, IPv6, etc) + */ +struct tcpip_net_protocol { + /** Protocol name */ + const char *name; + /** Network address family */ + sa_family_t sa_family; + /** Fixed header length */ + size_t header_len; + /** + * Transmit packet + * + * @v iobuf I/O buffer + * @v tcpip_protocol Transport-layer protocol + * @v st_src Source address, or NULL to use default + * @v st_dest Destination address + * @v netdev Network device (or NULL to route automatically) + * @v trans_csum Transport-layer checksum to complete, or NULL + * @ret rc Return status code + * + * This function takes ownership of the I/O buffer. + */ + int ( * tx ) ( struct io_buffer *iobuf, + struct tcpip_protocol *tcpip_protocol, + struct sockaddr_tcpip *st_src, + struct sockaddr_tcpip *st_dest, + struct net_device *netdev, + uint16_t *trans_csum ); + /** + * Determine transmitting network device + * + * @v st_dest Destination address + * @ret netdev Network device, or NULL + */ + struct net_device * ( * netdev ) ( struct sockaddr_tcpip *dest ); +}; + +/** TCP/IP transport-layer protocol table */ +#define TCPIP_PROTOCOLS __table ( struct tcpip_protocol, "tcpip_protocols" ) + +/** Declare a TCP/IP transport-layer protocol */ +#define __tcpip_protocol __table_entry ( TCPIP_PROTOCOLS, 01 ) + +/** TCP/IP network-layer protocol table */ +#define TCPIP_NET_PROTOCOLS \ + __table ( struct tcpip_net_protocol, "tcpip_net_protocols" ) + +/** Declare a TCP/IP network-layer protocol */ +#define __tcpip_net_protocol __table_entry ( TCPIP_NET_PROTOCOLS, 01 ) + +extern int tcpip_rx ( struct io_buffer *iobuf, struct net_device *netdev, + uint8_t tcpip_proto, struct sockaddr_tcpip *st_src, + struct sockaddr_tcpip *st_dest, uint16_t pshdr_csum, + struct ip_statistics *stats ); +extern int tcpip_tx ( struct io_buffer *iobuf, struct tcpip_protocol *tcpip, + struct sockaddr_tcpip *st_src, + struct sockaddr_tcpip *st_dest, + struct net_device *netdev, + uint16_t *trans_csum ); +extern struct net_device * tcpip_netdev ( struct sockaddr_tcpip *st_dest ); +extern size_t tcpip_mtu ( struct sockaddr_tcpip *st_dest ); +extern uint16_t generic_tcpip_continue_chksum ( uint16_t partial, + const void *data, size_t len ); +extern uint16_t tcpip_chksum ( const void *data, size_t len ); +extern int tcpip_bind ( struct sockaddr_tcpip *st_local, + int ( * available ) ( int port ) ); + +/* Use generic_tcpip_continue_chksum() if no architecture-specific + * version is available + */ +#ifndef tcpip_continue_chksum +#define tcpip_continue_chksum generic_tcpip_continue_chksum +#endif + +#endif /* _IPXE_TCPIP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/test.h b/qemu/roms/ipxe/src/include/ipxe/test.h new file mode 100644 index 000000000..028ee29fb --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/test.h @@ -0,0 +1,49 @@ +#ifndef _IPXE_TEST_H +#define _IPXE_TEST_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** @file + * + * Self-test infrastructure + * + */ + +#include <ipxe/tables.h> + +/** A self-test set */ +struct self_test { + /** Test set name */ + const char *name; + /** Run self-tests */ + void ( * exec ) ( void ); + /** Number of tests run */ + unsigned int total; + /** Number of test failures */ + unsigned int failures; + /** Number of assertion failures */ + unsigned int assertion_failures; +}; + +/** Self-test table */ +#define SELF_TESTS __table ( struct self_test, "self_tests" ) + +/** Declare a self-test */ +#define __self_test __table_entry ( SELF_TESTS, 01 ) + +extern void test_ok ( int success, const char *file, unsigned int line, + const char *test ); + +/** + * Report test result + * + * @v success Test succeeded + * @v file File name + * @v line Line number + */ +#define okx( success, file, line ) \ + test_ok ( success, file, line, #success ) +#define ok( success ) \ + okx ( success, __FILE__, __LINE__ ) + +#endif /* _IPXE_TEST_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/tftp.h b/qemu/roms/ipxe/src/include/ipxe/tftp.h new file mode 100644 index 000000000..aecafa2ae --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/tftp.h @@ -0,0 +1,83 @@ +#ifndef _IPXE_TFTP_H +#define _IPXE_TFTP_H + +/** @file + * + * TFTP protocol + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +#define TFTP_PORT 69 /**< Default TFTP server port */ +#define TFTP_DEFAULT_BLKSIZE 512 /**< Default TFTP data block size */ +#define TFTP_MAX_BLKSIZE 1432 + +#define TFTP_RRQ 1 /**< Read request opcode */ +#define TFTP_WRQ 2 /**< Write request opcode */ +#define TFTP_DATA 3 /**< Data block opcode */ +#define TFTP_ACK 4 /**< Data block acknowledgement opcode */ +#define TFTP_ERROR 5 /**< Error opcode */ +#define TFTP_OACK 6 /**< Options acknowledgement opcode */ + +#define TFTP_ERR_FILE_NOT_FOUND 1 /**< File not found */ +#define TFTP_ERR_ACCESS_DENIED 2 /**< Access violation */ +#define TFTP_ERR_DISK_FULL 3 /**< Disk full or allocation exceeded */ +#define TFTP_ERR_ILLEGAL_OP 4 /**< Illegal TFTP operation */ +#define TFTP_ERR_UNKNOWN_TID 5 /**< Unknown transfer ID */ +#define TFTP_ERR_FILE_EXISTS 6 /**< File already exists */ +#define TFTP_ERR_UNKNOWN_USER 7 /**< No such user */ +#define TFTP_ERR_BAD_OPTS 8 /**< Option negotiation failed */ + +#define MTFTP_PORT 1759 /**< Default MTFTP server port */ + +/** A TFTP read request (RRQ) packet */ +struct tftp_rrq { + uint16_t opcode; + char data[0]; +} __attribute__ (( packed )); + +/** A TFTP data (DATA) packet */ +struct tftp_data { + uint16_t opcode; + uint16_t block; + uint8_t data[0]; +} __attribute__ (( packed )); + +/** A TFTP acknowledgement (ACK) packet */ +struct tftp_ack { + uint16_t opcode; + uint16_t block; +} __attribute__ (( packed )); + +/** A TFTP error (ERROR) packet */ +struct tftp_error { + uint16_t opcode; + uint16_t errcode; + char errmsg[0]; +} __attribute__ (( packed )); + +/** A TFTP options acknowledgement (OACK) packet */ +struct tftp_oack { + uint16_t opcode; + char data[0]; +} __attribute__ (( packed )); + +/** The common header of all TFTP packets */ +struct tftp_common { + uint16_t opcode; +} __attribute__ (( packed )); + +/** A union encapsulating all TFTP packet types */ +union tftp_any { + struct tftp_common common; + struct tftp_rrq rrq; + struct tftp_data data; + struct tftp_ack ack; + struct tftp_error error; + struct tftp_oack oack; +}; + +#endif /* _IPXE_TFTP_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/threewire.h b/qemu/roms/ipxe/src/include/ipxe/threewire.h new file mode 100644 index 000000000..b5513ecdd --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/threewire.h @@ -0,0 +1,118 @@ +#ifndef _IPXE_THREEWIRE_H +#define _IPXE_THREEWIRE_H + +/** @file + * + * Three-wire serial interface + * + * The Atmel three-wire interface is a subset of the (newer) SPI + * interface, and is implemented here as a layer on top of the SPI + * support. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/spi.h> +#include <limits.h> + +/** + * @defgroup tcmds Three-wire commands + * @{ + */ + +/** Read data from memory array */ +#define THREEWIRE_READ 0x6 + +/** Write data to memory array */ +#define THREEWIRE_WRITE 0x5 + +/** Write enable */ +#define THREEWIRE_EWEN 0x4 + +/** Address to be used for write enable command */ +#define THREEWIRE_EWEN_ADDRESS INT_MAX + +/** Time to wait for write cycles to complete + * + * This is sufficient for AT93C46/AT93C56 devices, but may need to be + * increased in future when other devices are added. + */ +#define THREEWIRE_WRITE_MDELAY 10 + +/** @} */ + +extern int threewire_read ( struct nvs_device *nvs, unsigned int address, + void *data, size_t len ); +extern int threewire_write ( struct nvs_device *nvs, unsigned int address, + const void *data, size_t len ); +extern int threewire_detect_address_len ( struct spi_device *device ); + +/** + * @defgroup tdevs Three-wire device types + * @{ + */ + +static inline __attribute__ (( always_inline )) void +init_at93cx6 ( struct spi_device *device, unsigned int organisation ) { + device->nvs.word_len_log2 = ( ( organisation == 8 ) ? 0 : 1 ); + device->nvs.block_size = 1; + device->command_len = 3, + device->nvs.read = threewire_read; + device->nvs.write = threewire_write; +} + +/** + * Initialise Atmel AT93C06 serial EEPROM + * + * @v device SPI device + * @v organisation Word organisation (8 or 16) + */ +static inline __attribute__ (( always_inline )) void +init_at93c06 ( struct spi_device *device, unsigned int organisation ) { + device->nvs.size = ( 256 / organisation ); + device->address_len = ( ( organisation == 8 ) ? 7 : 6 ); + init_at93cx6 ( device, organisation ); +} + +/** + * Initialise Atmel AT93C46 serial EEPROM + * + * @v device SPI device + * @v organisation Word organisation (8 or 16) + */ +static inline __attribute__ (( always_inline )) void +init_at93c46 ( struct spi_device *device, unsigned int organisation ) { + device->nvs.size = ( 1024 / organisation ); + device->address_len = ( ( organisation == 8 ) ? 7 : 6 ); + init_at93cx6 ( device, organisation ); +} + +/** + * Initialise Atmel AT93C56 serial EEPROM + * + * @v device SPI device + * @v organisation Word organisation (8 or 16) + */ +static inline __attribute__ (( always_inline )) void +init_at93c56 ( struct spi_device *device, unsigned int organisation ) { + device->nvs.size = ( 2048 / organisation ); + device->address_len = ( ( organisation == 8 ) ? 9 : 8 ); + init_at93cx6 ( device, organisation ); +} + +/** + * Initialise Atmel AT93C66 serial EEPROM + * + * @v device SPI device + * @v organisation Word organisation (8 or 16) + */ +static inline __attribute__ (( always_inline )) void +init_at93c66 ( struct spi_device *device, unsigned int organisation ) { + device->nvs.size = ( 4096 / organisation ); + device->address_len = ( ( organisation == 8 ) ? 9 : 8 ); + init_at93cx6 ( device, organisation ); +} + +/** @} */ + +#endif /* _IPXE_THREEWIRE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/time.h b/qemu/roms/ipxe/src/include/ipxe/time.h new file mode 100644 index 000000000..673fe098a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/time.h @@ -0,0 +1,59 @@ +#ifndef _IPXE_TIME_H +#define _IPXE_TIME_H + +/** @file + * + * Time source + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <sys/time.h> +#include <ipxe/api.h> +#include <config/time.h> + +/** + * Calculate static inline time API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define TIME_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( TIME_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide a time API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_TIME( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( TIME_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline time API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_TIME_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( TIME_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent time API headers */ +#include <ipxe/null_time.h> +#include <ipxe/linux/linux_time.h> + +/* Include all architecture-dependent time API headers */ +#include <bits/time.h> + +/** + * Get current time in seconds + * + * @ret time Time, in seconds + */ +time_t time_now ( void ); + +#endif /* _IPXE_TIME_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/timer.h b/qemu/roms/ipxe/src/include/ipxe/timer.h new file mode 100644 index 000000000..d0309655d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/timer.h @@ -0,0 +1,77 @@ +#ifndef _IPXE_TIMER_H +#define _IPXE_TIMER_H + +/** @file + * + * iPXE timer API + * + * The timer API provides udelay() for fixed delays, and currticks() + * for a monotonically increasing tick counter. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/api.h> +#include <config/timer.h> + +/** + * Calculate static inline timer API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define TIMER_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( TIMER_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide a timer API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_TIMER( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( TIMER_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline timer API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_TIMER_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( TIMER_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent I/O API headers */ +#include <ipxe/efi/efi_timer.h> +#include <ipxe/linux/linux_timer.h> + +/* Include all architecture-dependent I/O API headers */ +#include <bits/timer.h> + +/** + * Delay for a fixed number of microseconds + * + * @v usecs Number of microseconds for which to delay + */ +void udelay ( unsigned long usecs ); + +/** + * Get current system time in ticks + * + * @ret ticks Current time, in ticks + */ +unsigned long currticks ( void ); + +/** + * Get number of ticks per second + * + * @ret ticks_per_sec Number of ticks per second + */ +unsigned long ticks_per_sec ( void ); + +/** Number of ticks per second */ +#define TICKS_PER_SEC ( ticks_per_sec() ) + +#endif /* _IPXE_TIMER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/tls.h b/qemu/roms/ipxe/src/include/ipxe/tls.h new file mode 100644 index 000000000..586da26ec --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/tls.h @@ -0,0 +1,300 @@ +#ifndef _IPXE_TLS_H +#define _IPXE_TLS_H + +/** + * @file + * + * Transport Layer Security Protocol + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/refcnt.h> +#include <ipxe/interface.h> +#include <ipxe/process.h> +#include <ipxe/crypto.h> +#include <ipxe/md5.h> +#include <ipxe/sha1.h> +#include <ipxe/sha256.h> +#include <ipxe/x509.h> +#include <ipxe/pending.h> +#include <ipxe/iobuf.h> + +/** A TLS header */ +struct tls_header { + /** Content type + * + * This is a TLS_TYPE_XXX constant + */ + uint8_t type; + /** Protocol version + * + * This is a TLS_VERSION_XXX constant + */ + uint16_t version; + /** Length of payload */ + uint16_t length; +} __attribute__ (( packed )); + +/** TLS version 1.0 */ +#define TLS_VERSION_TLS_1_0 0x0301 + +/** TLS version 1.1 */ +#define TLS_VERSION_TLS_1_1 0x0302 + +/** TLS version 1.2 */ +#define TLS_VERSION_TLS_1_2 0x0303 + +/** Change cipher content type */ +#define TLS_TYPE_CHANGE_CIPHER 20 + +/** Alert content type */ +#define TLS_TYPE_ALERT 21 + +/** Handshake content type */ +#define TLS_TYPE_HANDSHAKE 22 + +/** Application data content type */ +#define TLS_TYPE_DATA 23 + +/* Handshake message types */ +#define TLS_HELLO_REQUEST 0 +#define TLS_CLIENT_HELLO 1 +#define TLS_SERVER_HELLO 2 +#define TLS_CERTIFICATE 11 +#define TLS_SERVER_KEY_EXCHANGE 12 +#define TLS_CERTIFICATE_REQUEST 13 +#define TLS_SERVER_HELLO_DONE 14 +#define TLS_CERTIFICATE_VERIFY 15 +#define TLS_CLIENT_KEY_EXCHANGE 16 +#define TLS_FINISHED 20 + +/* TLS alert levels */ +#define TLS_ALERT_WARNING 1 +#define TLS_ALERT_FATAL 2 + +/* TLS cipher specifications */ +#define TLS_RSA_WITH_NULL_MD5 0x0001 +#define TLS_RSA_WITH_NULL_SHA 0x0002 +#define TLS_RSA_WITH_AES_128_CBC_SHA 0x002f +#define TLS_RSA_WITH_AES_256_CBC_SHA 0x0035 +#define TLS_RSA_WITH_AES_128_CBC_SHA256 0x003c +#define TLS_RSA_WITH_AES_256_CBC_SHA256 0x003d + +/* TLS hash algorithm identifiers */ +#define TLS_MD5_ALGORITHM 1 +#define TLS_SHA1_ALGORITHM 2 +#define TLS_SHA256_ALGORITHM 4 + +/* TLS signature algorithm identifiers */ +#define TLS_RSA_ALGORITHM 1 + +/* TLS server name extension */ +#define TLS_SERVER_NAME 0 +#define TLS_SERVER_NAME_HOST_NAME 0 + +/* TLS maximum fragment length extension */ +#define TLS_MAX_FRAGMENT_LENGTH 1 +#define TLS_MAX_FRAGMENT_LENGTH_512 1 +#define TLS_MAX_FRAGMENT_LENGTH_1024 2 +#define TLS_MAX_FRAGMENT_LENGTH_2048 3 +#define TLS_MAX_FRAGMENT_LENGTH_4096 4 + +/** TLS RX state machine state */ +enum tls_rx_state { + TLS_RX_HEADER = 0, + TLS_RX_DATA, +}; + +/** TLS TX pending flags */ +enum tls_tx_pending { + TLS_TX_CLIENT_HELLO = 0x0001, + TLS_TX_CERTIFICATE = 0x0002, + TLS_TX_CLIENT_KEY_EXCHANGE = 0x0004, + TLS_TX_CERTIFICATE_VERIFY = 0x0008, + TLS_TX_CHANGE_CIPHER = 0x0010, + TLS_TX_FINISHED = 0x0020, +}; + +/** A TLS cipher suite */ +struct tls_cipher_suite { + /** Public-key encryption algorithm */ + struct pubkey_algorithm *pubkey; + /** Bulk encryption cipher algorithm */ + struct cipher_algorithm *cipher; + /** MAC digest algorithm */ + struct digest_algorithm *digest; + /** Key length */ + uint16_t key_len; + /** Numeric code (in network-endian order) */ + uint16_t code; +}; + +/** A TLS cipher specification */ +struct tls_cipherspec { + /** Cipher suite */ + struct tls_cipher_suite *suite; + /** Dynamically-allocated storage */ + void *dynamic; + /** Public key encryption context */ + void *pubkey_ctx; + /** Bulk encryption cipher context */ + void *cipher_ctx; + /** Next bulk encryption cipher context (TX only) */ + void *cipher_next_ctx; + /** MAC secret */ + void *mac_secret; +}; + +/** A TLS signature and hash algorithm identifier */ +struct tls_signature_hash_id { + /** Hash algorithm */ + uint8_t hash; + /** Signature algorithm */ + uint8_t signature; +} __attribute__ (( packed )); + +/** A TLS signature algorithm */ +struct tls_signature_hash_algorithm { + /** Digest algorithm */ + struct digest_algorithm *digest; + /** Public-key algorithm */ + struct pubkey_algorithm *pubkey; + /** Numeric code */ + struct tls_signature_hash_id code; +}; + +/** TLS pre-master secret */ +struct tls_pre_master_secret { + /** TLS version */ + uint16_t version; + /** Random data */ + uint8_t random[46]; +} __attribute__ (( packed )); + +/** TLS client random data */ +struct tls_client_random { + /** GMT Unix time */ + uint32_t gmt_unix_time; + /** Random data */ + uint8_t random[28]; +} __attribute__ (( packed )); + +/** An MD5+SHA1 context */ +struct md5_sha1_context { + /** MD5 context */ + uint8_t md5[MD5_CTX_SIZE]; + /** SHA-1 context */ + uint8_t sha1[SHA1_CTX_SIZE]; +} __attribute__ (( packed )); + +/** MD5+SHA1 context size */ +#define MD5_SHA1_CTX_SIZE sizeof ( struct md5_sha1_context ) + +/** An MD5+SHA1 digest */ +struct md5_sha1_digest { + /** MD5 digest */ + uint8_t md5[MD5_DIGEST_SIZE]; + /** SHA-1 digest */ + uint8_t sha1[SHA1_DIGEST_SIZE]; +} __attribute__ (( packed )); + +/** MD5+SHA1 digest size */ +#define MD5_SHA1_DIGEST_SIZE sizeof ( struct md5_sha1_digest ) + +/** A TLS session */ +struct tls_session { + /** Reference counter */ + struct refcnt refcnt; + + /** Server name */ + const char *name; + /** Plaintext stream */ + struct interface plainstream; + /** Ciphertext stream */ + struct interface cipherstream; + + /** Protocol version */ + uint16_t version; + /** Current TX cipher specification */ + struct tls_cipherspec tx_cipherspec; + /** Next TX cipher specification */ + struct tls_cipherspec tx_cipherspec_pending; + /** Current RX cipher specification */ + struct tls_cipherspec rx_cipherspec; + /** Next RX cipher specification */ + struct tls_cipherspec rx_cipherspec_pending; + /** Premaster secret */ + struct tls_pre_master_secret pre_master_secret; + /** Master secret */ + uint8_t master_secret[48]; + /** Server random bytes */ + uint8_t server_random[32]; + /** Client random bytes */ + struct tls_client_random client_random; + /** MD5+SHA1 context for handshake verification */ + uint8_t handshake_md5_sha1_ctx[MD5_SHA1_CTX_SIZE]; + /** SHA256 context for handshake verification */ + uint8_t handshake_sha256_ctx[SHA256_CTX_SIZE]; + /** Digest algorithm used for handshake verification */ + struct digest_algorithm *handshake_digest; + /** Digest algorithm context used for handshake verification */ + uint8_t *handshake_ctx; + /** Client certificate (if used) */ + struct x509_certificate *cert; + + /** Server certificate chain */ + struct x509_chain *chain; + /** Certificate validator */ + struct interface validator; + + /** Client security negotiation pending operation */ + struct pending_operation client_negotiation; + /** Server security negotiation pending operation */ + struct pending_operation server_negotiation; + + /** TX sequence number */ + uint64_t tx_seq; + /** TX pending transmissions */ + unsigned int tx_pending; + /** TX process */ + struct process process; + + /** RX sequence number */ + uint64_t rx_seq; + /** RX state */ + enum tls_rx_state rx_state; + /** Current received record header */ + struct tls_header rx_header; + /** Current received record header (static I/O buffer) */ + struct io_buffer rx_header_iobuf; + /** List of received data buffers */ + struct list_head rx_data; +}; + +/** RX I/O buffer size + * + * The maximum fragment length extension is optional, and many common + * implementations (including OpenSSL) do not support it. We must + * therefore be prepared to receive records of up to 16kB in length. + * The chance of an allocation of this size failing is non-negligible, + * so we must split received data into smaller allocations. + */ +#define TLS_RX_BUFSIZE 4096 + +/** Minimum RX I/O buffer size + * + * To simplify manipulations, we ensure that no RX I/O buffer is + * smaller than this size. This allows us to assume that the MAC and + * padding are entirely contained within the final I/O buffer. + */ +#define TLS_RX_MIN_BUFSIZE 512 + +/** RX I/O buffer alignment */ +#define TLS_RX_ALIGN 16 + +extern int add_tls ( struct interface *xfer, const char *name, + struct interface **next ); + +#endif /* _IPXE_TLS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/uaccess.h b/qemu/roms/ipxe/src/include/ipxe/uaccess.h new file mode 100644 index 000000000..055bb2ca7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/uaccess.h @@ -0,0 +1,396 @@ +#ifndef _IPXE_UACCESS_H +#define _IPXE_UACCESS_H + +/** + * @file + * + * Access to external ("user") memory + * + * iPXE often needs to transfer data between internal and external + * buffers. On i386, the external buffers may require access via a + * different segment, and the buffer address cannot be encoded into a + * simple void * pointer. The @c userptr_t type encapsulates the + * information needed to identify an external buffer, and the + * copy_to_user() and copy_from_user() functions provide methods for + * transferring data between internal and external buffers. + * + * Note that userptr_t is an opaque type; in particular, performing + * arithmetic upon a userptr_t is not allowed. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <string.h> +#include <ipxe/api.h> +#include <config/ioapi.h> + +/** + * A pointer to a user buffer + * + */ +typedef unsigned long userptr_t; + +/** Equivalent of NULL for user pointers */ +#define UNULL ( ( userptr_t ) 0 ) + +/** + * @defgroup uaccess_trivial Trivial user access API implementations + * + * User access API implementations that can be used by environments in + * which virtual addresses allow access to all of memory. + * + * @{ + * + */ + +/** + * Convert virtual address to user pointer + * + * @v addr Virtual address + * @ret userptr User pointer + */ +static inline __always_inline userptr_t +trivial_virt_to_user ( volatile const void *addr ) { + return ( ( userptr_t ) addr ); +} + +/** + * Convert user pointer to virtual address + * + * @v userptr User pointer + * @v offset Offset from user pointer + * @ret addr Virtual address + * + * This operation is not available under all memory models. + */ +static inline __always_inline void * +trivial_user_to_virt ( userptr_t userptr, off_t offset ) { + return ( ( void * ) userptr + offset ); +} + +/** + * Add offset to user pointer + * + * @v userptr User pointer + * @v offset Offset + * @ret userptr New pointer value + */ +static inline __always_inline userptr_t +trivial_userptr_add ( userptr_t userptr, off_t offset ) { + return ( userptr + offset ); +} + +/** + * Subtract user pointers + * + * @v userptr User pointer + * @v subtrahend User pointer to be subtracted + * @ret offset Offset + */ +static inline __always_inline off_t +trivial_userptr_sub ( userptr_t userptr, userptr_t subtrahend ) { + return ( userptr - subtrahend ); +} + +/** + * Copy data between user buffers + * + * @v dest Destination + * @v dest_off Destination offset + * @v src Source + * @v src_off Source offset + * @v len Length + */ +static inline __always_inline void +trivial_memcpy_user ( userptr_t dest, off_t dest_off, + userptr_t src, off_t src_off, size_t len ) { + memcpy ( ( ( void * ) dest + dest_off ), + ( ( void * ) src + src_off ), len ); +} + +/** + * Copy data between user buffers, allowing for overlap + * + * @v dest Destination + * @v dest_off Destination offset + * @v src Source + * @v src_off Source offset + * @v len Length + */ +static inline __always_inline void +trivial_memmove_user ( userptr_t dest, off_t dest_off, + userptr_t src, off_t src_off, size_t len ) { + memmove ( ( ( void * ) dest + dest_off ), + ( ( void * ) src + src_off ), len ); +} + +/** + * Compare data between user buffers + * + * @v first First buffer + * @v first_off First buffer offset + * @v second Second buffer + * @v second_off Second buffer offset + * @v len Length + * @ret diff Difference + */ +static inline __always_inline int +trivial_memcmp_user ( userptr_t first, off_t first_off, + userptr_t second, off_t second_off, size_t len ) { + return memcmp ( ( ( void * ) first + first_off ), + ( ( void * ) second + second_off ), len ); +} + +/** + * Fill user buffer with a constant byte + * + * @v buffer User buffer + * @v offset Offset within buffer + * @v c Constant byte with which to fill + * @v len Length + */ +static inline __always_inline void +trivial_memset_user ( userptr_t buffer, off_t offset, int c, size_t len ) { + memset ( ( ( void * ) buffer + offset ), c, len ); +} + +/** + * Find length of NUL-terminated string in user buffer + * + * @v buffer User buffer + * @v offset Offset within buffer + * @ret len Length of string (excluding NUL) + */ +static inline __always_inline size_t +trivial_strlen_user ( userptr_t buffer, off_t offset ) { + return strlen ( ( void * ) buffer + offset ); +} + +/** + * Find character in user buffer + * + * @v buffer User buffer + * @v offset Starting offset within buffer + * @v c Character to search for + * @v len Length of user buffer + * @ret offset Offset of character, or <0 if not found + */ +static inline __always_inline off_t +trivial_memchr_user ( userptr_t buffer, off_t offset, int c, size_t len ) { + void *found; + + found = memchr ( ( ( void * ) buffer + offset ), c, len ); + return ( found ? ( found - ( void * ) buffer ) : -1 ); +} + +/** @} */ + +/** + * Calculate static inline user access API function name + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @ret _subsys_func Subsystem API function + */ +#define UACCESS_INLINE( _subsys, _api_func ) \ + SINGLE_API_INLINE ( UACCESS_PREFIX_ ## _subsys, _api_func ) + +/** + * Provide an user access API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_UACCESS( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( UACCESS_PREFIX_ ## _subsys, _api_func, _func ) + +/** + * Provide a static inline user access API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + */ +#define PROVIDE_UACCESS_INLINE( _subsys, _api_func ) \ + PROVIDE_SINGLE_API_INLINE ( UACCESS_PREFIX_ ## _subsys, _api_func ) + +/* Include all architecture-independent user access API headers */ +#include <ipxe/efi/efi_uaccess.h> +#include <ipxe/linux/linux_uaccess.h> + +/* Include all architecture-dependent user access API headers */ +#include <bits/uaccess.h> + +/** + * Convert physical address to user pointer + * + * @v phys_addr Physical address + * @ret userptr User pointer + */ +userptr_t phys_to_user ( unsigned long phys_addr ); + +/** + * Convert user pointer to physical address + * + * @v userptr User pointer + * @v offset Offset from user pointer + * @ret phys_addr Physical address + */ +unsigned long user_to_phys ( userptr_t userptr, off_t offset ); + +/** + * Convert virtual address to user pointer + * + * @v addr Virtual address + * @ret userptr User pointer + */ +userptr_t virt_to_user ( volatile const void *addr ); + +/** + * Convert user pointer to virtual address + * + * @v userptr User pointer + * @v offset Offset from user pointer + * @ret addr Virtual address + * + * This operation is not available under all memory models. + */ +void * user_to_virt ( userptr_t userptr, off_t offset ); + +/** + * Add offset to user pointer + * + * @v userptr User pointer + * @v offset Offset + * @ret userptr New pointer value + */ +userptr_t userptr_add ( userptr_t userptr, off_t offset ); + +/** + * Subtract user pointers + * + * @v userptr User pointer + * @v subtrahend User pointer to be subtracted + * @ret offset Offset + */ +off_t userptr_sub ( userptr_t userptr, userptr_t subtrahend ); + +/** + * Convert virtual address to a physical address + * + * @v addr Virtual address + * @ret phys_addr Physical address + */ +static inline __always_inline unsigned long +virt_to_phys ( volatile const void *addr ) { + return user_to_phys ( virt_to_user ( addr ), 0 ); +} + +/** + * Convert physical address to a virtual address + * + * @v addr Virtual address + * @ret phys_addr Physical address + * + * This operation is not available under all memory models. + */ +static inline __always_inline void * phys_to_virt ( unsigned long phys_addr ) { + return user_to_virt ( phys_to_user ( phys_addr ), 0 ); +} + +/** + * Copy data between user buffers + * + * @v dest Destination + * @v dest_off Destination offset + * @v src Source + * @v src_off Source offset + * @v len Length + */ +void memcpy_user ( userptr_t dest, off_t dest_off, + userptr_t src, off_t src_off, size_t len ); + +/** + * Copy data to user buffer + * + * @v dest Destination + * @v dest_off Destination offset + * @v src Source + * @v len Length + */ +static inline __always_inline void +copy_to_user ( userptr_t dest, off_t dest_off, const void *src, size_t len ) { + memcpy_user ( dest, dest_off, virt_to_user ( src ), 0, len ); +} + +/** + * Copy data from user buffer + * + * @v dest Destination + * @v src Source + * @v src_off Source offset + * @v len Length + */ +static inline __always_inline void +copy_from_user ( void *dest, userptr_t src, off_t src_off, size_t len ) { + memcpy_user ( virt_to_user ( dest ), 0, src, src_off, len ); +} + +/** + * Copy data between user buffers, allowing for overlap + * + * @v dest Destination + * @v dest_off Destination offset + * @v src Source + * @v src_off Source offset + * @v len Length + */ +void memmove_user ( userptr_t dest, off_t dest_off, + userptr_t src, off_t src_off, size_t len ); + +/** + * Compare data between user buffers + * + * @v first First buffer + * @v first_off First buffer offset + * @v second Second buffer + * @v second_off Second buffer offset + * @v len Length + * @ret diff Difference + */ +int memcmp_user ( userptr_t first, off_t first_off, + userptr_t second, off_t second_off, size_t len ); + +/** + * Fill user buffer with a constant byte + * + * @v userptr User buffer + * @v offset Offset within buffer + * @v c Constant byte with which to fill + * @v len Length + */ +void memset_user ( userptr_t userptr, off_t offset, int c, size_t len ); + +/** + * Find length of NUL-terminated string in user buffer + * + * @v userptr User buffer + * @v offset Offset within buffer + * @ret len Length of string (excluding NUL) + */ +size_t strlen_user ( userptr_t userptr, off_t offset ); + +/** + * Find character in user buffer + * + * @v userptr User buffer + * @v offset Starting offset within buffer + * @v c Character to search for + * @v len Length of user buffer + * @ret offset Offset of character, or <0 if not found + */ +off_t memchr_user ( userptr_t userptr, off_t offset, int c, size_t len ); + +#endif /* _IPXE_UACCESS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/udp.h b/qemu/roms/ipxe/src/include/ipxe/udp.h new file mode 100644 index 000000000..5717ef213 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/udp.h @@ -0,0 +1,45 @@ +#ifndef _IPXE_UDP_H +#define _IPXE_UDP_H + +/** @file + * + * UDP protocol + * + * This file defines the iPXE UDP API. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <ipxe/iobuf.h> +#include <ipxe/tcpip.h> +#include <ipxe/if_ether.h> + +struct interface; +struct sockaddr; + +/** + * UDP constants + */ + +/** + * A UDP header + */ +struct udp_header { + /** Source port */ + uint16_t src; + /** Destination port */ + uint16_t dest; + /** Length */ + uint16_t len; + /** Checksum */ + uint16_t chksum; +}; + +extern int udp_open_promisc ( struct interface *xfer ); +extern int udp_open ( struct interface *xfer, struct sockaddr *peer, + struct sockaddr *local ); + +#endif /* _IPXE_UDP_H */ + diff --git a/qemu/roms/ipxe/src/include/ipxe/umalloc.h b/qemu/roms/ipxe/src/include/ipxe/umalloc.h new file mode 100644 index 000000000..4b25e182a --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/umalloc.h @@ -0,0 +1,69 @@ +#ifndef _IPXE_UMALLOC_H +#define _IPXE_UMALLOC_H + +/** + * @file + * + * User memory allocation + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/api.h> +#include <config/umalloc.h> +#include <ipxe/uaccess.h> + +/** + * Provide a user memory allocation API implementation + * + * @v _prefix Subsystem prefix + * @v _api_func API function + * @v _func Implementing function + */ +#define PROVIDE_UMALLOC( _subsys, _api_func, _func ) \ + PROVIDE_SINGLE_API ( UMALLOC_PREFIX_ ## _subsys, _api_func, _func ) + +/* Include all architecture-independent I/O API headers */ +#include <ipxe/efi/efi_umalloc.h> +#include <ipxe/linux/linux_umalloc.h> + +/* Include all architecture-dependent I/O API headers */ +#include <bits/umalloc.h> + +/** + * Reallocate external memory + * + * @v userptr Memory previously allocated by umalloc(), or UNULL + * @v new_size Requested size + * @ret userptr Allocated memory, or UNULL + * + * Calling realloc() with a new size of zero is a valid way to free a + * memory block. + */ +userptr_t urealloc ( userptr_t userptr, size_t new_size ); + +/** + * Allocate external memory + * + * @v size Requested size + * @ret userptr Memory, or UNULL + * + * Memory is guaranteed to be aligned to a page boundary. + */ +static inline __always_inline userptr_t umalloc ( size_t size ) { + return urealloc ( UNULL, size ); +} + +/** + * Free external memory + * + * @v userptr Memory allocated by umalloc(), or UNULL + * + * If @c ptr is UNULL, no action is taken. + */ +static inline __always_inline void ufree ( userptr_t userptr ) { + urealloc ( userptr, 0 ); +} + +#endif /* _IPXE_UMALLOC_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/uri.h b/qemu/roms/ipxe/src/include/ipxe/uri.h new file mode 100644 index 000000000..7613d578d --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/uri.h @@ -0,0 +1,210 @@ +#ifndef _IPXE_URI_H +#define _IPXE_URI_H + +/** @file + * + * Uniform Resource Identifiers + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <stdlib.h> +#include <ipxe/refcnt.h> +#include <ipxe/in.h> + +struct parameters; + +/** A Uniform Resource Identifier + * + * Terminology for this data structure is as per uri(7), except that + * "path" is defined to include the leading '/' for an absolute path. + * + * Note that all fields within a URI are optional and may be NULL. + * + * The pointers to the various fields are packed together so they can + * be accessed in array fashion in some places in uri.c where doing so + * saves significant code size. + * + * Some examples are probably helpful: + * + * http://www.ipxe.org/wiki : + * + * scheme = "http", host = "www.ipxe.org", path = "/wiki" + * + * /var/lib/tftpboot : + * + * path = "/var/lib/tftpboot" + * + * mailto:bob@nowhere.com : + * + * scheme = "mailto", opaque = "bob@nowhere.com" + * + * ftp://joe:secret@insecure.org:8081/hidden/path/to?what=is#this + * + * scheme = "ftp", user = "joe", password = "secret", + * host = "insecure.org", port = "8081", path = "/hidden/path/to", + * query = "what=is", fragment = "this" + */ +struct uri { + /** Reference count */ + struct refcnt refcnt; + /** Scheme */ + const char *scheme; + /** Opaque part */ + const char *opaque; + /** User name */ + const char *user; + /** Password */ + const char *password; + /** Host name */ + const char *host; + /** Port number */ + const char *port; + /** Path */ + const char *path; + /** Query */ + const char *query; + /** Fragment */ + const char *fragment; + /** Form parameters */ + struct parameters *params; +} __attribute__ (( packed )); + +/** + * Access URI field + * + * @v uri URI + * @v field URI field index + * @ret field URI field (as an lvalue) + */ +#define uri_field( uri, field ) (&uri->scheme)[field] + +/** + * Calculate index of a URI field + * + * @v name URI field name + * @ret field URI field index + */ +#define URI_FIELD( name ) \ + ( ( offsetof ( struct uri, name ) - \ + offsetof ( struct uri, scheme ) ) / sizeof ( void * ) ) + +/** URI fields */ +enum uri_fields { + URI_SCHEME = URI_FIELD ( scheme ), + URI_OPAQUE = URI_FIELD ( opaque ), + URI_USER = URI_FIELD ( user ), + URI_PASSWORD = URI_FIELD ( password ), + URI_HOST = URI_FIELD ( host ), + URI_PORT = URI_FIELD ( port ), + URI_PATH = URI_FIELD ( path ), + URI_QUERY = URI_FIELD ( query ), + URI_FRAGMENT = URI_FIELD ( fragment ), + URI_FIELDS +}; + +/** + * URI is an absolute URI + * + * @v uri URI + * @ret is_absolute URI is absolute + * + * An absolute URI begins with a scheme, e.g. "http:" or "mailto:". + * Note that this is a separate concept from a URI with an absolute + * path. + */ +static inline int uri_is_absolute ( const struct uri *uri ) { + return ( uri->scheme != NULL ); +} + +/** + * URI has an opaque part + * + * @v uri URI + * @ret has_opaque URI has an opaque part + */ +static inline int uri_has_opaque ( const struct uri *uri ) { + return ( uri->opaque && ( uri->opaque[0] != '\0' ) ); +} + +/** + * URI has a path + * + * @v uri URI + * @ret has_path URI has a path + */ +static inline int uri_has_path ( const struct uri *uri ) { + return ( uri->path && ( uri->path[0] != '\0' ) ); +} + +/** + * URI has an absolute path + * + * @v uri URI + * @ret has_absolute_path URI has an absolute path + * + * An absolute path begins with a '/'. Note that this is a separate + * concept from an absolute URI. Note also that a URI may not have a + * path at all. + */ +static inline int uri_has_absolute_path ( const struct uri *uri ) { + return ( uri->path && ( uri->path[0] == '/' ) ); +} + +/** + * URI has a relative path + * + * @v uri URI + * @ret has_relative_path URI has a relative path + * + * A relative path begins with something other than a '/'. Note that + * this is a separate concept from a relative URI. Note also that a + * URI may not have a path at all. + */ +static inline int uri_has_relative_path ( const struct uri *uri ) { + return ( uri->path && ( uri->path[0] != '/' ) ); +} + +/** + * Increment URI reference count + * + * @v uri URI, or NULL + * @ret uri URI as passed in + */ +static inline __attribute__ (( always_inline )) struct uri * +uri_get ( struct uri *uri ) { + ref_get ( &uri->refcnt ); + return uri; +} + +/** + * Decrement URI reference count + * + * @v uri URI, or NULL + */ +static inline __attribute__ (( always_inline )) void +uri_put ( struct uri *uri ) { + ref_put ( &uri->refcnt ); +} + +extern struct uri *cwuri; + +extern size_t uri_encode ( const char *string, unsigned int field, + char *buf, ssize_t len ); +extern struct uri * parse_uri ( const char *uri_string ); +extern size_t format_uri ( const struct uri *uri, char *buf, size_t len ); +extern char * format_uri_alloc ( const struct uri *uri ); +extern unsigned int uri_port ( const struct uri *uri, + unsigned int default_port ); +extern struct uri * uri_dup ( const struct uri *uri ); +extern char * resolve_path ( const char *base_path, + const char *relative_path ); +extern struct uri * resolve_uri ( const struct uri *base_uri, + struct uri *relative_uri ); +extern struct uri * tftp_uri ( struct in_addr next_server, + const char *filename ); +extern void churi ( struct uri *uri ); + +#endif /* _IPXE_URI_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/uuid.h b/qemu/roms/ipxe/src/include/ipxe/uuid.h new file mode 100644 index 000000000..ad515d0cb --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/uuid.h @@ -0,0 +1,52 @@ +#ifndef _IPXE_UUID_H +#define _IPXE_UUID_H + +/** @file + * + * Universally unique IDs + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <byteswap.h> + +/** A universally unique ID */ +union uuid { + /** Canonical form (00000000-0000-0000-0000-000000000000) */ + struct { + /** 8 hex digits, big-endian */ + uint32_t a; + /** 2 hex digits, big-endian */ + uint16_t b; + /** 2 hex digits, big-endian */ + uint16_t c; + /** 2 hex digits, big-endian */ + uint16_t d; + /** 12 hex digits, big-endian */ + uint8_t e[6]; + } canonical; + uint8_t raw[16]; +}; + +/** + * Change UUID endianness + * + * @v uuid UUID + * + * RFC4122 defines UUIDs as being encoded in network byte order, but + * leaves some wriggle room for "explicit application or presentation + * protocol specification to the contrary". PXE, EFI and SMBIOS + * (versions 2.6 and above) treat the first three fields as being + * little-endian. + */ +static inline void uuid_mangle ( union uuid *uuid ) { + + __bswap_32s ( &uuid->canonical.a ); + __bswap_16s ( &uuid->canonical.b ); + __bswap_16s ( &uuid->canonical.c ); +} + +extern char * uuid_ntoa ( const union uuid *uuid ); + +#endif /* _IPXE_UUID_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/validator.h b/qemu/roms/ipxe/src/include/ipxe/validator.h new file mode 100644 index 000000000..23bdab423 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/validator.h @@ -0,0 +1,17 @@ +#ifndef _IPXE_VALIDATOR_H +#define _IPXE_VALIDATOR_H + +/** @file + * + * Certificate validator + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/interface.h> +#include <ipxe/x509.h> + +extern int create_validator ( struct interface *job, struct x509_chain *chain ); + +#endif /* _IPXE_VALIDATOR_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/version.h b/qemu/roms/ipxe/src/include/ipxe/version.h new file mode 100644 index 000000000..ae4275db1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/version.h @@ -0,0 +1,27 @@ +#ifndef _IPXE_VERSION_H +#define _IPXE_VERSION_H + +/** @file + * + * Version number + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <wchar.h> + +extern unsigned long build_timestamp; +extern unsigned long build_id; +extern const int product_major_version; +extern const int product_minor_version; +extern const char product_version[]; +extern const char product_name[]; +extern const char product_short_name[]; +extern const char build_name[]; +extern const wchar_t product_wversion[]; +extern const wchar_t product_wname[]; +extern const wchar_t product_short_wname[]; +extern const wchar_t build_wname[]; + +#endif /* _IPXE_VERSION_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/virtio-pci.h b/qemu/roms/ipxe/src/include/ipxe/virtio-pci.h new file mode 100644 index 000000000..a09c46316 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/virtio-pci.h @@ -0,0 +1,101 @@ +#ifndef _VIRTIO_PCI_H_ +# define _VIRTIO_PCI_H_ + +/* A 32-bit r/o bitmask of the features supported by the host */ +#define VIRTIO_PCI_HOST_FEATURES 0 + +/* A 32-bit r/w bitmask of features activated by the guest */ +#define VIRTIO_PCI_GUEST_FEATURES 4 + +/* A 32-bit r/w PFN for the currently selected queue */ +#define VIRTIO_PCI_QUEUE_PFN 8 + +/* A 16-bit r/o queue size for the currently selected queue */ +#define VIRTIO_PCI_QUEUE_NUM 12 + +/* A 16-bit r/w queue selector */ +#define VIRTIO_PCI_QUEUE_SEL 14 + +/* A 16-bit r/w queue notifier */ +#define VIRTIO_PCI_QUEUE_NOTIFY 16 + +/* An 8-bit device status register. */ +#define VIRTIO_PCI_STATUS 18 + +/* An 8-bit r/o interrupt status register. Reading the value will return the + * current contents of the ISR and will also clear it. This is effectively + * a read-and-acknowledge. */ +#define VIRTIO_PCI_ISR 19 + +/* The bit of the ISR which indicates a device configuration change. */ +#define VIRTIO_PCI_ISR_CONFIG 0x2 + +/* The remaining space is defined by each driver as the per-driver + * configuration space */ +#define VIRTIO_PCI_CONFIG 20 + +/* Virtio ABI version, this must match exactly */ +#define VIRTIO_PCI_ABI_VERSION 0 + +static inline u32 vp_get_features(unsigned int ioaddr) +{ + return inl(ioaddr + VIRTIO_PCI_HOST_FEATURES); +} + +static inline void vp_set_features(unsigned int ioaddr, u32 features) +{ + outl(features, ioaddr + VIRTIO_PCI_GUEST_FEATURES); +} + +static inline void vp_get(unsigned int ioaddr, unsigned offset, + void *buf, unsigned len) +{ + u8 *ptr = buf; + unsigned i; + + for (i = 0; i < len; i++) + ptr[i] = inb(ioaddr + VIRTIO_PCI_CONFIG + offset + i); +} + +static inline u8 vp_get_status(unsigned int ioaddr) +{ + return inb(ioaddr + VIRTIO_PCI_STATUS); +} + +static inline void vp_set_status(unsigned int ioaddr, u8 status) +{ + if (status == 0) /* reset */ + return; + outb(status, ioaddr + VIRTIO_PCI_STATUS); +} + +static inline u8 vp_get_isr(unsigned int ioaddr) +{ + return inb(ioaddr + VIRTIO_PCI_ISR); +} + +static inline void vp_reset(unsigned int ioaddr) +{ + outb(0, ioaddr + VIRTIO_PCI_STATUS); + (void)inb(ioaddr + VIRTIO_PCI_ISR); +} + +static inline void vp_notify(unsigned int ioaddr, int queue_index) +{ + outw(queue_index, ioaddr + VIRTIO_PCI_QUEUE_NOTIFY); +} + +static inline void vp_del_vq(unsigned int ioaddr, int queue_index) +{ + /* select the queue */ + + outw(queue_index, ioaddr + VIRTIO_PCI_QUEUE_SEL); + + /* deactivate the queue */ + + outl(0, ioaddr + VIRTIO_PCI_QUEUE_PFN); +} + +int vp_find_vq(unsigned int ioaddr, int queue_index, + struct vring_virtqueue *vq); +#endif /* _VIRTIO_PCI_H_ */ diff --git a/qemu/roms/ipxe/src/include/ipxe/virtio-ring.h b/qemu/roms/ipxe/src/include/ipxe/virtio-ring.h new file mode 100644 index 000000000..c687acab7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/virtio-ring.h @@ -0,0 +1,139 @@ +#ifndef _VIRTIO_RING_H_ +# define _VIRTIO_RING_H_ + +/* Status byte for guest to report progress, and synchronize features. */ +/* We have seen device and processed generic fields (VIRTIO_CONFIG_F_VIRTIO) */ +#define VIRTIO_CONFIG_S_ACKNOWLEDGE 1 +/* We have found a driver for the device. */ +#define VIRTIO_CONFIG_S_DRIVER 2 +/* Driver has used its parts of the config, and is happy */ +#define VIRTIO_CONFIG_S_DRIVER_OK 4 +/* We've given up on this device. */ +#define VIRTIO_CONFIG_S_FAILED 0x80 + +#define MAX_QUEUE_NUM (256) + +#define VRING_DESC_F_NEXT 1 +#define VRING_DESC_F_WRITE 2 + +#define VRING_AVAIL_F_NO_INTERRUPT 1 + +#define VRING_USED_F_NO_NOTIFY 1 + +struct vring_desc +{ + u64 addr; + u32 len; + u16 flags; + u16 next; +}; + +struct vring_avail +{ + u16 flags; + u16 idx; + u16 ring[0]; +}; + +struct vring_used_elem +{ + u32 id; + u32 len; +}; + +struct vring_used +{ + u16 flags; + u16 idx; + struct vring_used_elem ring[]; +}; + +struct vring { + unsigned int num; + struct vring_desc *desc; + struct vring_avail *avail; + struct vring_used *used; +}; + +#define vring_size(num) \ + (((((sizeof(struct vring_desc) * num) + \ + (sizeof(struct vring_avail) + sizeof(u16) * num)) \ + + PAGE_MASK) & ~PAGE_MASK) + \ + (sizeof(struct vring_used) + sizeof(struct vring_used_elem) * num)) + +typedef unsigned char virtio_queue_t[PAGE_MASK + vring_size(MAX_QUEUE_NUM)]; + +struct vring_virtqueue { + virtio_queue_t queue; + struct vring vring; + u16 free_head; + u16 last_used_idx; + void *vdata[MAX_QUEUE_NUM]; + /* PCI */ + int queue_index; +}; + +struct vring_list { + char *addr; + unsigned int length; +}; + +static inline void vring_init(struct vring *vr, + unsigned int num, unsigned char *queue) +{ + unsigned int i; + unsigned long pa; + + vr->num = num; + + /* physical address of desc must be page aligned */ + + pa = virt_to_phys(queue); + pa = (pa + PAGE_MASK) & ~PAGE_MASK; + vr->desc = phys_to_virt(pa); + + vr->avail = (struct vring_avail *)&vr->desc[num]; + + /* physical address of used must be page aligned */ + + pa = virt_to_phys(&vr->avail->ring[num]); + pa = (pa + PAGE_MASK) & ~PAGE_MASK; + vr->used = phys_to_virt(pa); + + for (i = 0; i < num - 1; i++) + vr->desc[i].next = i + 1; + vr->desc[i].next = 0; +} + +static inline void vring_enable_cb(struct vring_virtqueue *vq) +{ + vq->vring.avail->flags &= ~VRING_AVAIL_F_NO_INTERRUPT; +} + +static inline void vring_disable_cb(struct vring_virtqueue *vq) +{ + vq->vring.avail->flags |= VRING_AVAIL_F_NO_INTERRUPT; +} + + +/* + * vring_more_used + * + * is there some used buffers ? + * + */ + +static inline int vring_more_used(struct vring_virtqueue *vq) +{ + wmb(); + return vq->last_used_idx != vq->vring.used->idx; +} + +void vring_detach(struct vring_virtqueue *vq, unsigned int head); +void *vring_get_buf(struct vring_virtqueue *vq, unsigned int *len); +void vring_add_buf(struct vring_virtqueue *vq, struct vring_list list[], + unsigned int out, unsigned int in, + void *index, int num_added); +void vring_kick(unsigned int ioaddr, struct vring_virtqueue *vq, int num_added); + +#endif /* _VIRTIO_RING_H_ */ diff --git a/qemu/roms/ipxe/src/include/ipxe/vlan.h b/qemu/roms/ipxe/src/include/ipxe/vlan.h new file mode 100644 index 000000000..083c21916 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/vlan.h @@ -0,0 +1,70 @@ +#ifndef _IPXE_VLAN_H +#define _IPXE_VLAN_H + +/** + * @file + * + * Virtual LANs + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** A VLAN header */ +struct vlan_header { + /** Tag control information */ + uint16_t tci; + /** Encapsulated protocol */ + uint16_t net_proto; +} __attribute__ (( packed )); + +/** + * Extract VLAN tag from tag control information + * + * @v tci Tag control information + * @ret tag VLAN tag + */ +#define VLAN_TAG( tci ) ( (tci) & 0x0fff ) + +/** + * Extract VLAN priority from tag control information + * + * @v tci Tag control information + * @ret priority Priority + */ +#define VLAN_PRIORITY( tci ) ( (tci) >> 13 ) + +/** + * Construct VLAN tag control information + * + * @v tag VLAN tag + * @v priority Priority + * @ret tci Tag control information + */ +#define VLAN_TCI( tag, priority ) ( ( (priority) << 13 ) | (tag) ) + +/** + * Check VLAN tag is valid + * + * @v tag VLAN tag + * @ret is_valid VLAN tag is valid + */ +#define VLAN_TAG_IS_VALID( tag ) ( (tag) < 0xfff ) + +/** + * Check VLAN priority is valid + * + * @v priority VLAN priority + * @ret is_valid VLAN priority is valid + */ +#define VLAN_PRIORITY_IS_VALID( priority ) ( (priority) <= 7 ) + +extern struct net_device * vlan_find ( struct net_device *trunk, + unsigned int tag ); +extern unsigned int vlan_tag ( struct net_device *netdev ); +extern int vlan_can_be_trunk ( struct net_device *trunk ); +extern int vlan_create ( struct net_device *trunk, unsigned int tag, + unsigned int priority ); +extern int vlan_destroy ( struct net_device *netdev ); + +#endif /* _IPXE_VLAN_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/vsprintf.h b/qemu/roms/ipxe/src/include/ipxe/vsprintf.h new file mode 100644 index 000000000..c48c97a87 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/vsprintf.h @@ -0,0 +1,74 @@ +#ifndef _IPXE_VSPRINTF_H +#define _IPXE_VSPRINTF_H + +/** @file + * + * printf() and friends + * + * Etherboot's printf() functions understand the following subset of + * the standard C printf()'s format specifiers: + * + * - Flag characters + * - '#' - Alternate form (i.e. "0x" prefix) + * - '0' - Zero-pad + * - Field widths + * - Length modifiers + * - 'hh' - Signed / unsigned char + * - 'h' - Signed / unsigned short + * - 'l' - Signed / unsigned long + * - 'll' - Signed / unsigned long long + * - 'z' - Signed / unsigned size_t + * - Conversion specifiers + * - 'd' - Signed decimal + * - 'x','X' - Unsigned hexadecimal + * - 'c' - Character + * - 's' - String + * - 'p' - Pointer + * + * Hexadecimal numbers are always zero-padded to the specified field + * width (if any); decimal numbers are always space-padded. Decimal + * long longs are not supported. + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stdarg.h> +#include <stdio.h> + +/** + * A printf context + * + * Contexts are used in order to be able to share code between + * vprintf() and vsnprintf(), without requiring the allocation of a + * buffer for vprintf(). + */ +struct printf_context { + /** + * Character handler + * + * @v ctx Context + * @v c Character + * + * This method is called for each character written to the + * formatted string. + */ + void ( * handler ) ( struct printf_context *ctx, unsigned int c ); + /** Length of formatted string + * + * When handler() is called, @len will be set to the number of + * characters written so far (i.e. zero for the first call to + * handler()). + */ + size_t len; +}; + +extern size_t vcprintf ( struct printf_context *ctx, const char *fmt, + va_list args ); +extern int vssnprintf ( char *buf, ssize_t ssize, const char *fmt, + va_list args ); +extern int __attribute__ (( format ( printf, 3, 4 ) )) +ssnprintf ( char *buf, ssize_t ssize, const char *fmt, ... ); + +#endif /* _IPXE_VSPRINTF_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/wpa.h b/qemu/roms/ipxe/src/include/ipxe/wpa.h new file mode 100644 index 000000000..44934b3b9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/wpa.h @@ -0,0 +1,504 @@ +/* + * Copyright (c) 2009 Joshua Oreman <oremanj@rwcr.net>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef _IPXE_WPA_H +#define _IPXE_WPA_H + +#include <ipxe/ieee80211.h> +#include <ipxe/list.h> + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** @file + * + * Common definitions for all types of WPA-protected networks. + */ + + +/** EAPOL-Key type field for modern 802.11i/RSN WPA packets */ +#define EAPOL_KEY_TYPE_RSN 2 + +/** Old EAPOL-Key type field used by WPA1 hardware before 802.11i ratified */ +#define EAPOL_KEY_TYPE_WPA 254 + + +/** + * @defgroup eapol_key_info EAPOL-Key Info field bits + * @{ + */ + +/** Key descriptor version, indicating WPA or WPA2 */ +#define EAPOL_KEY_INFO_VERSION 0x0007 + +/** Key type bit, indicating pairwise or group */ +#define EAPOL_KEY_INFO_TYPE 0x0008 + +/** Key install bit; set on message 3 except when legacy hacks are used */ +#define EAPOL_KEY_INFO_INSTALL 0x0040 + +/** Key ACK bit; set when a response is required, on all messages except #4 */ +#define EAPOL_KEY_INFO_KEY_ACK 0x0080 + +/** Key MIC bit; set when the MIC field is valid, on messages 3 and 4 */ +#define EAPOL_KEY_INFO_KEY_MIC 0x0100 + +/** Secure bit; set when both sides have both keys, on messages 3 and 4 */ +#define EAPOL_KEY_INFO_SECURE 0x0200 + +/** Error bit; set on a MIC failure for TKIP */ +#define EAPOL_KEY_INFO_ERROR 0x0400 + +/** Request bit; set when authentication is initiated by the Peer (unusual) */ +#define EAPOL_KEY_INFO_REQUEST 0x0800 + +/** Key Encrypted bit; set when the Key Data field is encrypted */ +#define EAPOL_KEY_INFO_KEY_ENC 0x1000 + +/** SMC Message bit; set when this frame is part of an IBSS SMK handshake */ +#define EAPOL_KEY_INFO_SMC_MESS 0x2000 + + +/** Key descriptor version field value for WPA (TKIP) */ +#define EAPOL_KEY_VERSION_WPA 1 + +/** Key descriptor version field value for WPA2 (CCMP) */ +#define EAPOL_KEY_VERSION_WPA2 2 + +/** Key type field value for a PTK (pairwise) key handshake */ +#define EAPOL_KEY_TYPE_PTK 0x0008 + +/** Key type field value for a GTK (group) key handshake */ +#define EAPOL_KEY_TYPE_GTK 0x0000 + +/** @} */ + + + +/** An EAPOL-Key packet. + * + * These are used for the WPA 4-Way Handshake, whether or not prior + * authentication has been performed using EAP. + * + * On LANs, an eapol_key_pkt is always encapsulated in the data field + * of an eapol_frame, with the frame's type code set to EAPOL_TYPE_KEY. + * + * Unlike 802.11 frame headers, the fields in this structure are + * stored in big-endian! + */ +struct eapol_key_pkt +{ + /** One of the EAPOL_KEY_TYPE_* defines. */ + u8 type; + + /** Bitfield of key characteristics, network byte order */ + u16 info; + + /** Length of encryption key to be used, network byte order + * + * This is 16 for CCMP, 32 for TKIP, and 5 or 13 for WEP. + */ + u16 keysize; + + /** Monotonically increasing value for EAPOL-Key conversations + * + * In another classic demonstration of overengineering, this + * 8-byte value will rarely be anything above 1. It's stored + * in network byte order. + */ + u64 replay; + + /** Nonce value + * + * This is the authenticator's ANonce in frame 1, the peer's + * SNonce in frame 2, and 0 in frames 3 and 4. + */ + u8 nonce[32]; + + /** Initialization vector + * + * This contains the IV used with the Key Encryption Key, or 0 + * if the key is unencrypted or encrypted using an algorithm + * that does not require an IV. + */ + u8 iv[16]; + + /** Receive sequence counter for GTK + * + * This is used to synchronize the client's replay counter for + * ordinary data packets. The first six bytes contain PN0 + * through PN5 for CCMP mode, or TSC0 through TSC5 for TKIP + * mode. The last two bytes are zero. + */ + u8 rsc[8]; + + /** Reserved bytes */ + u8 _reserved[8]; + + /** Message integrity code over the entire EAPOL frame + * + * This is calculated using HMAC-MD5 when the key descriptor + * version field in @a info is 1, and HMAC-SHA1 ignoring the + * last 4 bytes of the hash when the version field in @a info + * is 2. + */ + u8 mic[16]; + + /** Length of the @a data field in bytes, network byte order */ + u16 datalen; + + /** Key data + * + * This is formatted as a series of 802.11 information + * elements, with cryptographic data encapsulated using a + * "vendor-specific IE" code and an IEEE-specified OUI. + */ + u8 data[0]; +} __attribute__ (( packed )); + + +/** WPA handshaking state */ +enum wpa_state { + /** Waiting for PMK to be set */ + WPA_WAITING = 0, + + /** Ready for 4-Way Handshake */ + WPA_READY, + + /** Performing 4-Way Handshake */ + WPA_WORKING, + + /** 4-Way Handshake succeeded */ + WPA_SUCCESS, + + /** 4-Way Handshake failed */ + WPA_FAILURE, +}; + +/** Bitfield indicating a selection of WPA transient keys */ +enum wpa_keymask { + /** Pairwise transient key */ + WPA_PTK = 1, + + /** Group transient key */ + WPA_GTK = 2, +}; + + +/** Length of a nonce */ +#define WPA_NONCE_LEN 32 + +/** Length of a TKIP main key */ +#define WPA_TKIP_KEY_LEN 16 + +/** Length of a TKIP MIC key */ +#define WPA_TKIP_MIC_KEY_LEN 8 + +/** Length of a CCMP key */ +#define WPA_CCMP_KEY_LEN 16 + +/** Length of an EAPOL Key Confirmation Key */ +#define WPA_KCK_LEN 16 + +/** Length of an EAPOL Key Encryption Key */ +#define WPA_KEK_LEN 16 + +/** Usual length of a Pairwise Master Key */ +#define WPA_PMK_LEN 32 + +/** Length of a PMKID */ +#define WPA_PMKID_LEN 16 + + +/** Structure of the Temporal Key for TKIP encryption */ +struct tkip_tk +{ + /** Main key: input to TKIP Phase 1 and Phase 2 key mixing functions */ + u8 key[WPA_TKIP_KEY_LEN]; + + /** Michael MIC keys */ + struct { + /** MIC key for packets from the AP */ + u8 rx[WPA_TKIP_MIC_KEY_LEN]; + + /** MIC key for packets to the AP */ + u8 tx[WPA_TKIP_MIC_KEY_LEN]; + } __attribute__ (( packed )) mic; +} __attribute__ (( packed )); + +/** Structure of a generic Temporal Key */ +union wpa_tk +{ + /** CCMP key */ + u8 ccmp[WPA_CCMP_KEY_LEN]; + + /** TKIP keys */ + struct tkip_tk tkip; +}; + +/** Structure of the Pairwise Transient Key */ +struct wpa_ptk +{ + /** EAPOL-Key Key Confirmation Key (KCK) */ + u8 kck[WPA_KCK_LEN]; + + /** EAPOL-Key Key Encryption Key (KEK) */ + u8 kek[WPA_KEK_LEN]; + + /** Temporal key */ + union wpa_tk tk; +} __attribute__ (( packed )); + +/** Structure of the Group Transient Key */ +struct wpa_gtk +{ + /** Temporal key */ + union wpa_tk tk; +} __attribute__ (( packed )); + + +/** Common context for WPA security handshaking + * + * Any implementor of a particular handshaking type (e.g. PSK or EAP) + * must include this structure at the very beginning of their private + * data context structure, to allow the EAPOL-Key handling code to + * work. When the preliminary authentication is done, it is necessary + * to call wpa_start(), passing the PMK (derived from PSK or EAP MSK) + * as an argument. The handshaker can use its @a step function to + * monitor @a state in this wpa_ctx structure for success or + * failure. On success, the keys will be available in @a ptk and @a + * gtk according to the state of the @a valid bitmask. + * + * After an initial success, the parent handshaker does not need to + * concern itself with rekeying; the WPA common code takes care of + * that. + */ +struct wpa_common_ctx +{ + /** 802.11 device we are authenticating for */ + struct net80211_device *dev; + + /** The Pairwise Master Key to use in handshaking + * + * This is set either by running the PBKDF2 algorithm on a + * passphrase with the SSID as salt to generate a pre-shared + * key, or by copying the first 32 bytes of the EAP Master + * Session Key in 802.1X-served authentication. + */ + u8 pmk[WPA_PMK_LEN]; + + /** Length of the Pairwise Master Key + * + * This is always 32 except with one EAP method which only + * gives 16 bytes. + */ + int pmk_len; + + /** State of EAPOL-Key handshaking */ + enum wpa_state state; + + /** Replay counter for this association + * + * This stores the replay counter value for the most recent + * packet we've accepted. It is initially initialised to ~0 to + * show we'll accept anything. + */ + u64 replay; + + /** Mask of valid keys after authentication success + * + * If the PTK is not valid, the GTK should be used for both + * unicast and multicast decryption; if the GTK is not valid, + * multicast packets cannot be decrypted. + */ + enum wpa_keymask valid; + + /** The cipher to use for unicast RX and all TX */ + enum net80211_crypto_alg crypt; + + /** The cipher to use for broadcast and multicast RX */ + enum net80211_crypto_alg gcrypt; + + /** The Pairwise Transient Key derived from the handshake */ + struct wpa_ptk ptk; + + /** The Group Transient Key derived from the handshake */ + struct wpa_gtk gtk; + + /** Authenticator-provided nonce */ + u8 Anonce[WPA_NONCE_LEN]; + + /** Supplicant-generated nonce (that's us) */ + u8 Snonce[WPA_NONCE_LEN]; + + /** Whether we should refrain from generating another SNonce */ + int have_Snonce; + + /** Data in WPA or RSN IE from AP's beacon frame */ + void *ap_rsn_ie; + + /** Length of @a ap_rsn_ie */ + int ap_rsn_ie_len; + + /** Whether @a ap_rsn_ie is an RSN IE (as opposed to old WPA) */ + int ap_rsn_is_rsn; + + /** List entry */ + struct list_head list; +}; + + +/** WPA handshake key integrity and encryption handler + * + * Note that due to the structure of the 4-Way Handshake we never + * actually need to encrypt key data, only decrypt it. + */ +struct wpa_kie { + /** Value of version bits in EAPOL-Key info field for which to use + * + * This should be one of the @c EAPOL_KEY_VERSION_* constants. + */ + int version; + + /** Calculate MIC over message + * + * @v kck Key Confirmation Key, 16 bytes + * @v msg Message to calculate MIC over + * @v len Number of bytes to calculate MIC over + * @ret mic Calculated MIC, 16 bytes long + * + * The @a mic return may point within @a msg, so it must not + * be filled until the calculation has been performed. + */ + void ( * mic ) ( const void *kck, const void *msg, size_t len, + void *mic ); + + /** Decrypt key data + * + * @v kek Key Encryption Key, 16 bytes + * @v iv Initialisation vector for encryption, 16 bytes + * @v msg Message to decrypt (Key Data field) + * @v len Length of message + * @ret msg Decrypted message in place of original + * @ret len Updated to reflect encrypted length + * @ret rc Return status code + * + * The decrypted message is written over the encrypted one. + */ + int ( * decrypt ) ( const void *kek, const void *iv, void *msg, + u16 *len ); +}; + +#define WPA_KIES __table ( struct wpa_kie, "wpa_kies" ) +#define __wpa_kie __table_entry ( WPA_KIES, 01 ) + + + +/** + * @defgroup wpa_kde Key descriptor element types + * @{ + */ + +/** Payload structure of the GTK-encapsulating KDE + * + * This does not include the IE type, length, or OUI bytes, which are + * generic to all KDEs. + */ +struct wpa_kde_gtk_encap +{ + /** Key ID and TX bit */ + u8 id; + + /** Reserved byte */ + u8 _rsvd; + + /** Encapsulated group transient key */ + struct wpa_gtk gtk; +} __attribute__ (( packed )); + +/** Mask for Key ID in wpa_kde_gtk::id field */ +#define WPA_GTK_KID 0x03 + +/** Mask for Tx bit in wpa_kde_gtk::id field */ +#define WPA_GTK_TXBIT 0x04 + + +/** KDE type for an encapsulated Group Transient Key (requires encryption) */ +#define WPA_KDE_GTK _MKOUI ( 0x00, 0x0F, 0xAC, 0x01 ) + +/** KDE type for a MAC address */ +#define WPA_KDE_MAC _MKOUI ( 0x00, 0x0F, 0xAC, 0x03 ) + +/** KDE type for a PMKID */ +#define WPA_KDE_PMKID _MKOUI ( 0x00, 0x0F, 0xAC, 0x04 ) + +/** KDE type for a nonce */ +#define WPA_KDE_NONCE _MKOUI ( 0x00, 0x0F, 0xAC, 0x06 ) + +/** KDE type for a lifetime value */ +#define WPA_KDE_LIFETIME _MKOUI ( 0x00, 0x0F, 0xAC, 0x07 ) + + +/** Any key descriptor element type + * + * KDEs follow the 802.11 information element format of a type byte + * (in this case "vendor-specific", with the requisite OUI+subtype + * after length) and a length byte whose value does not include the + * length of the type and length bytes. + */ +struct wpa_kde +{ + /** Information element type: always 0xDD (IEEE80211_IE_VENDOR) */ + u8 ie_type; + + /** Length, not including ie_type and length fields */ + u8 len; + + /** OUI + type byte */ + u32 oui_type; + + /** Payload data */ + union { + /** For GTK-type KDEs, encapsulated GTK */ + struct wpa_kde_gtk_encap gtk_encap; + + /** For MAC-type KDEs, the MAC address */ + u8 mac[ETH_ALEN]; + + /** For PMKID-type KDEs, the PMKID */ + u8 pmkid[WPA_PMKID_LEN]; + + /** For Nonce-type KDEs, the nonce */ + u8 nonce[WPA_NONCE_LEN]; + + /** For Lifetime-type KDEs, the lifetime in seconds + * + * This is in network byte order! + */ + u32 lifetime; + }; +} __attribute__ (( packed )); + +/** @} */ + +int wpa_make_rsn_ie ( struct net80211_device *dev, union ieee80211_ie **ie ); +int wpa_start ( struct net80211_device *dev, struct wpa_common_ctx *ctx, + const void *pmk, size_t pmk_len ); +void wpa_stop ( struct net80211_device *dev ); + +#endif /* _IPXE_WPA_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/x509.h b/qemu/roms/ipxe/src/include/ipxe/x509.h new file mode 100644 index 000000000..802480e54 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/x509.h @@ -0,0 +1,394 @@ +#ifndef _IPXE_X509_H +#define _IPXE_X509_H + +/** @file + * + * X.509 certificates + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stddef.h> +#include <time.h> +#include <ipxe/asn1.h> +#include <ipxe/refcnt.h> +#include <ipxe/list.h> + +/** An X.509 serial number */ +struct x509_serial { + /** Raw serial number */ + struct asn1_cursor raw; +}; + +/** An X.509 issuer */ +struct x509_issuer { + /** Raw issuer */ + struct asn1_cursor raw; +}; + +/** An X.509 time */ +struct x509_time { + /** Seconds since the Epoch */ + time_t time; +}; + +/** An X.509 certificate validity period */ +struct x509_validity { + /** Not valid before */ + struct x509_time not_before; + /** Not valid after */ + struct x509_time not_after; +}; + +/** An X.509 certificate public key */ +struct x509_public_key { + /** Raw public key information */ + struct asn1_cursor raw; + /** Public key algorithm */ + struct asn1_algorithm *algorithm; + /** Raw public key bit string */ + struct asn1_bit_string raw_bits; +}; + +/** An X.509 certificate subject */ +struct x509_subject { + /** Raw subject */ + struct asn1_cursor raw; + /** Common name */ + struct asn1_cursor common_name; + /** Public key information */ + struct x509_public_key public_key; +}; + +/** An X.509 certificate signature */ +struct x509_signature { + /** Signature algorithm */ + struct asn1_algorithm *algorithm; + /** Signature value */ + struct asn1_bit_string value; +}; + +/** An X.509 certificate basic constraints set */ +struct x509_basic_constraints { + /** Subject is a CA */ + int ca; + /** Path length */ + unsigned int path_len; +}; + +/** Unlimited path length + * + * We use -2U, since this quantity represents one *fewer* than the + * maximum number of remaining certificates in a chain. + */ +#define X509_PATH_LEN_UNLIMITED -2U + +/** An X.509 certificate key usage */ +struct x509_key_usage { + /** Key usage extension is present */ + int present; + /** Usage bits */ + unsigned int bits; +}; + +/** X.509 certificate key usage bits */ +enum x509_key_usage_bits { + X509_DIGITAL_SIGNATURE = 0x0080, + X509_NON_REPUDIATION = 0x0040, + X509_KEY_ENCIPHERMENT = 0x0020, + X509_DATA_ENCIPHERMENT = 0x0010, + X509_KEY_AGREEMENT = 0x0008, + X509_KEY_CERT_SIGN = 0x0004, + X509_CRL_SIGN = 0x0002, + X509_ENCIPHER_ONLY = 0x0001, + X509_DECIPHER_ONLY = 0x8000, +}; + +/** An X.509 certificate extended key usage */ +struct x509_extended_key_usage { + /** Usage bits */ + unsigned int bits; +}; + +/** X.509 certificate extended key usage bits + * + * Extended key usages are identified by OID; these bits are purely an + * internal definition. + */ +enum x509_extended_key_usage_bits { + X509_CODE_SIGNING = 0x0001, + X509_OCSP_SIGNING = 0x0002, +}; + +/** X.509 certificate OCSP responder */ +struct x509_ocsp_responder { + /** URI */ + struct asn1_cursor uri; + /** OCSP status is good */ + int good; +}; + +/** X.509 certificate authority information access */ +struct x509_authority_info_access { + /** OCSP responder */ + struct x509_ocsp_responder ocsp; +}; + +/** X.509 certificate subject alternative name */ +struct x509_subject_alt_name { + /** Names */ + struct asn1_cursor names; +}; + +/** X.509 certificate general name types */ +enum x509_general_name_types { + X509_GENERAL_NAME_DNS = ASN1_IMPLICIT_TAG ( 2 ), + X509_GENERAL_NAME_URI = ASN1_IMPLICIT_TAG ( 6 ), + X509_GENERAL_NAME_IP = ASN1_IMPLICIT_TAG ( 7 ), +}; + +/** An X.509 certificate extensions set */ +struct x509_extensions { + /** Basic constraints */ + struct x509_basic_constraints basic; + /** Key usage */ + struct x509_key_usage usage; + /** Extended key usage */ + struct x509_extended_key_usage ext_usage; + /** Authority information access */ + struct x509_authority_info_access auth_info; + /** Subject alternative name */ + struct x509_subject_alt_name alt_name; +}; + +/** A link in an X.509 certificate chain */ +struct x509_link { + /** List of links */ + struct list_head list; + /** Certificate */ + struct x509_certificate *cert; +}; + +/** An X.509 certificate chain */ +struct x509_chain { + /** Reference count */ + struct refcnt refcnt; + /** List of links */ + struct list_head links; +}; + +/** An X.509 certificate */ +struct x509_certificate { + /** Reference count */ + struct refcnt refcnt; + + /** Link in certificate store */ + struct x509_link store; + + /** Certificate has been validated */ + int valid; + /** Maximum number of subsequent certificates in chain */ + unsigned int path_remaining; + + /** Raw certificate */ + struct asn1_cursor raw; + /** Version */ + unsigned int version; + /** Serial number */ + struct x509_serial serial; + /** Raw tbsCertificate */ + struct asn1_cursor tbs; + /** Signature algorithm */ + struct asn1_algorithm *signature_algorithm; + /** Issuer */ + struct x509_issuer issuer; + /** Validity */ + struct x509_validity validity; + /** Subject */ + struct x509_subject subject; + /** Signature */ + struct x509_signature signature; + /** Extensions */ + struct x509_extensions extensions; +}; + +/** + * Get reference to X.509 certificate + * + * @v cert X.509 certificate + * @ret cert X.509 certificate + */ +static inline __attribute__ (( always_inline )) struct x509_certificate * +x509_get ( struct x509_certificate *cert ) { + ref_get ( &cert->refcnt ); + return cert; +} + +/** + * Drop reference to X.509 certificate + * + * @v cert X.509 certificate + */ +static inline __attribute__ (( always_inline )) void +x509_put ( struct x509_certificate *cert ) { + ref_put ( &cert->refcnt ); +} + +/** + * Get reference to X.509 certificate chain + * + * @v chain X.509 certificate chain + * @ret chain X.509 certificate chain + */ +static inline __attribute__ (( always_inline )) struct x509_chain * +x509_chain_get ( struct x509_chain *chain ) { + ref_get ( &chain->refcnt ); + return chain; +} + +/** + * Drop reference to X.509 certificate chain + * + * @v chain X.509 certificate chain + */ +static inline __attribute__ (( always_inline )) void +x509_chain_put ( struct x509_chain *chain ) { + ref_put ( &chain->refcnt ); +} + +/** + * Get first certificate in X.509 certificate chain + * + * @v chain X.509 certificate chain + * @ret cert X.509 certificate, or NULL + */ +static inline __attribute__ (( always_inline )) struct x509_certificate * +x509_first ( struct x509_chain *chain ) { + struct x509_link *link; + + link = list_first_entry ( &chain->links, struct x509_link, list ); + return ( link ? link->cert : NULL ); +} + +/** + * Get last certificate in X.509 certificate chain + * + * @v chain X.509 certificate chain + * @ret cert X.509 certificate, or NULL + */ +static inline __attribute__ (( always_inline )) struct x509_certificate * +x509_last ( struct x509_chain *chain ) { + struct x509_link *link; + + link = list_last_entry ( &chain->links, struct x509_link, list ); + return ( link ? link->cert : NULL ); +} + +/** An X.509 extension */ +struct x509_extension { + /** Name */ + const char *name; + /** Object identifier */ + struct asn1_cursor oid; + /** Parse extension + * + * @v cert X.509 certificate + * @v raw ASN.1 cursor + * @ret rc Return status code + */ + int ( * parse ) ( struct x509_certificate *cert, + const struct asn1_cursor *raw ); +}; + +/** An X.509 key purpose */ +struct x509_key_purpose { + /** Name */ + const char *name; + /** Object identifier */ + struct asn1_cursor oid; + /** Extended key usage bits */ + unsigned int bits; +}; + +/** An X.509 access method */ +struct x509_access_method { + /** Name */ + const char *name; + /** Object identifier */ + struct asn1_cursor oid; + /** Parse access method + * + * @v cert X.509 certificate + * @v raw ASN.1 cursor + * @ret rc Return status code + */ + int ( * parse ) ( struct x509_certificate *cert, + const struct asn1_cursor *raw ); +}; + +/** An X.509 root certificate store */ +struct x509_root { + /** Fingerprint digest algorithm */ + struct digest_algorithm *digest; + /** Number of certificates */ + unsigned int count; + /** Certificate fingerprints */ + const void *fingerprints; +}; + +extern const char * x509_name ( struct x509_certificate *cert ); +extern int x509_parse ( struct x509_certificate *cert, + const struct asn1_cursor *raw ); +extern int x509_certificate ( const void *data, size_t len, + struct x509_certificate **cert ); +extern int x509_validate ( struct x509_certificate *cert, + struct x509_certificate *issuer, + time_t time, struct x509_root *root ); +extern int x509_check_name ( struct x509_certificate *cert, const char *name ); + +extern struct x509_chain * x509_alloc_chain ( void ); +extern int x509_append ( struct x509_chain *chain, + struct x509_certificate *cert ); +extern int x509_append_raw ( struct x509_chain *chain, const void *data, + size_t len ); +extern int x509_auto_append ( struct x509_chain *chain, + struct x509_chain *certs ); +extern int x509_validate_chain ( struct x509_chain *chain, time_t time, + struct x509_chain *store, + struct x509_root *root ); + +/* Functions exposed only for unit testing */ +extern int x509_check_issuer ( struct x509_certificate *cert, + struct x509_certificate *issuer ); +extern void x509_fingerprint ( struct x509_certificate *cert, + struct digest_algorithm *digest, + void *fingerprint ); +extern int x509_check_root ( struct x509_certificate *cert, + struct x509_root *root ); +extern int x509_check_time ( struct x509_certificate *cert, time_t time ); + +/** + * Invalidate X.509 certificate + * + * @v cert X.509 certificate + */ +static inline void x509_invalidate ( struct x509_certificate *cert ) { + cert->valid = 0; + cert->path_remaining = 0; +} + +/** + * Invalidate X.509 certificate chain + * + * @v chain X.509 certificate chain + */ +static inline void x509_invalidate_chain ( struct x509_chain *chain ) { + struct x509_link *link; + + list_for_each_entry ( link, &chain->links, list ) + x509_invalidate ( link->cert ); +} + +#endif /* _IPXE_X509_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xen.h b/qemu/roms/ipxe/src/include/ipxe/xen.h new file mode 100644 index 000000000..60aabe03e --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xen.h @@ -0,0 +1,75 @@ +#ifndef _IPXE_XEN_H +#define _IPXE_XEN_H + +/** @file + * + * Xen interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* Define Xen interface version before including any Xen header files */ +#define __XEN_INTERFACE_VERSION__ 0x00040400 + +#include <stdint.h> +#include <ipxe/uaccess.h> +#include <xen/xen.h> +#include <xen/event_channel.h> + +/* Memory barrier macros used by ring.h */ +#define xen_mb() mb() +#define xen_rmb() rmb() +#define xen_wmb() wmb() + +struct xen_hypercall; + +/** A Xen grant table */ +struct xen_grant { + /** Grant table entries */ + struct grant_entry_v1 *table; + /** Total grant table length */ + size_t len; + /** Entry size shift (for later version tables) */ + unsigned int shift; + /** Number of grant table entries in use */ + unsigned int used; + /** Most recently used grant reference */ + unsigned int ref; +}; + +/** A XenStore */ +struct xen_store { + /** XenStore domain interface */ + struct xenstore_domain_interface *intf; + /** Event channel */ + evtchn_port_t port; +}; + +/** A Xen hypervisor */ +struct xen_hypervisor { + /** Hypercall table */ + struct xen_hypercall *hypercall; + /** Shared info page */ + struct shared_info *shared; + /** Grant table */ + struct xen_grant grant; + /** XenStore */ + struct xen_store store; +}; + +#include <bits/xen.h> + +/** + * Convert a Xen status code to an iPXE status code + * + * @v xenrc Xen status code (negated) + * @ret rc iPXE status code (before negation) + * + * Xen status codes are defined in the file include/xen/errno.h in the + * Xen repository. They happen to match the Linux error codes, some + * of which can be found in our include/ipxe/errno/linux.h. + */ +#define EXEN( xenrc ) EPLATFORM ( EINFO_EPLATFORM, -(xenrc) ) + +#endif /* _IPXE_XEN_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xenbus.h b/qemu/roms/ipxe/src/include/ipxe/xenbus.h new file mode 100644 index 000000000..ef2b5496f --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xenbus.h @@ -0,0 +1,86 @@ +#ifndef _IPXE_XENBUS_H +#define _IPXE_XENBUS_H + +/** @file + * + * Xen device bus + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/device.h> +#include <ipxe/tables.h> +#include <ipxe/xen.h> +#include <xen/io/xenbus.h> + +/** A Xen device */ +struct xen_device { + /** Generic iPXE device */ + struct device dev; + /** Xen hypervisor */ + struct xen_hypervisor *xen; + /** XenStore key */ + char *key; + /** Backend XenStore key */ + char *backend; + /** Backend domain ID */ + unsigned long backend_id; + /** Driver */ + struct xen_driver *driver; + /** Driver-private data */ + void *priv; +}; + +/** A Xen device driver */ +struct xen_driver { + /** Name */ + const char *name; + /** Device type */ + const char *type; + /** Probe device + * + * @v xendev Xen device + * @ret rc Return status code + */ + int ( * probe ) ( struct xen_device *xendev ); + /** Remove device + * + * @v xendev Xen device + */ + void ( * remove ) ( struct xen_device *xendev ); +}; + +/** Xen device driver table */ +#define XEN_DRIVERS __table ( struct xen_driver, "xen_drivers" ) + +/** Declare a Xen device driver */ +#define __xen_driver __table_entry ( XEN_DRIVERS, 01 ) + +/** + * Set Xen device driver-private data + * + * @v xendev Xen device + * @v priv Private data + */ +static inline void xen_set_drvdata ( struct xen_device *xendev, void *priv ) { + xendev->priv = priv; +} + +/** + * Get Xen device driver-private data + * + * @v xendev Xen device + * @ret priv Private data + */ +static inline void * xen_get_drvdata ( struct xen_device *xendev ) { + return xendev->priv; +} + +extern int xenbus_set_state ( struct xen_device *xendev, int state ); +extern int xenbus_backend_state ( struct xen_device *xendev ); +extern int xenbus_backend_wait ( struct xen_device *xendev, int state ); +extern int xenbus_probe ( struct xen_hypervisor *xen, struct device *parent ); +extern void xenbus_remove ( struct xen_hypervisor *xen, struct device *parent ); + +#endif /* _IPXE_XENBUS_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xenevent.h b/qemu/roms/ipxe/src/include/ipxe/xenevent.h new file mode 100644 index 000000000..1dd6a0c0b --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xenevent.h @@ -0,0 +1,59 @@ +#ifndef _IPXE_XENEVENT_H +#define _IPXE_XENEVENT_H + +/** @file + * + * Xen events + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/xen.h> +#include <xen/event_channel.h> + +/** + * Close event channel + * + * @v xen Xen hypervisor + * @v close Event descriptor + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xenevent_close ( struct xen_hypervisor *xen, struct evtchn_close *close ) { + + return xen_hypercall_2 ( xen, __HYPERVISOR_event_channel_op, + EVTCHNOP_close, virt_to_phys ( close ) ); +} + +/** + * Send event + * + * @v xen Xen hypervisor + * @v send Event descriptor + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xenevent_send ( struct xen_hypervisor *xen, struct evtchn_send *send ) { + + return xen_hypercall_2 ( xen, __HYPERVISOR_event_channel_op, + EVTCHNOP_send, virt_to_phys ( send ) ); +} + +/** + * Allocate an unbound event channel + * + * @v xen Xen hypervisor + * @v alloc_unbound Event descriptor + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xenevent_alloc_unbound ( struct xen_hypervisor *xen, + struct evtchn_alloc_unbound *alloc_unbound ) { + + return xen_hypercall_2 ( xen, __HYPERVISOR_event_channel_op, + EVTCHNOP_alloc_unbound, + virt_to_phys ( alloc_unbound ) ); +} + +#endif /* _IPXE_XENEVENT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xengrant.h b/qemu/roms/ipxe/src/include/ipxe/xengrant.h new file mode 100644 index 000000000..f9b3beb21 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xengrant.h @@ -0,0 +1,232 @@ +#ifndef _IPXE_XENGRANT_H +#define _IPXE_XENGRANT_H + +/** @file + * + * Xen grant tables + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stdlib.h> +#include <ipxe/io.h> +#include <ipxe/xen.h> +#include <xen/grant_table.h> + +/** Induced failure rate (for testing) */ +#define XENGRANT_FAIL_RATE 0 + +/** + * Query grant table size + * + * @v xen Xen hypervisor + * @v size Table size + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xengrant_query_size ( struct xen_hypervisor *xen, + struct gnttab_query_size *size ) { + + return xen_hypercall_3 ( xen, __HYPERVISOR_grant_table_op, + GNTTABOP_query_size, + virt_to_phys ( size ), 1 ); +} + +/** + * Set grant table version + * + * @v xen Xen hypervisor + * @v version Version + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xengrant_set_version ( struct xen_hypervisor *xen, + struct gnttab_set_version *version ) { + + return xen_hypercall_3 ( xen, __HYPERVISOR_grant_table_op, + GNTTABOP_set_version, + virt_to_phys ( version ), 1 ); +} + +/** + * Get grant table version + * + * @v xen Xen hypervisor + * @v version Version + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xengrant_get_version ( struct xen_hypervisor *xen, + struct gnttab_get_version *version ) { + + return xen_hypercall_3 ( xen, __HYPERVISOR_grant_table_op, + GNTTABOP_get_version, + virt_to_phys ( version ), 1 ); +} + +/** + * Get number of grant table entries + * + * @v xen Xen hypervisor + * @ret entries Number of grant table entries + */ +static inline __attribute__ (( always_inline )) unsigned int +xengrant_entries ( struct xen_hypervisor *xen ) { + + return ( ( xen->grant.len / sizeof ( xen->grant.table[0] ) ) + >> xen->grant.shift ); +} + +/** + * Get grant table entry header + * + * @v xen Xen hypervisor + * @v ref Grant reference + * @ret hdr Grant table entry header + */ +static inline __attribute__ (( always_inline )) struct grant_entry_header * +xengrant_header ( struct xen_hypervisor *xen, grant_ref_t ref ) { + struct grant_entry_v1 *v1; + + v1 = &xen->grant.table[ ref << xen->grant.shift ]; + return ( container_of ( &v1->flags, struct grant_entry_header, flags )); +} + +/** + * Get version 1 grant table entry + * + * @v hdr Grant table entry header + * @ret v1 Version 1 grant table entry + */ +static inline __attribute__ (( always_inline )) struct grant_entry_v1 * +xengrant_v1 ( struct grant_entry_header *hdr ) { + + return ( container_of ( &hdr->flags, struct grant_entry_v1, flags ) ); +} + +/** + * Get version 2 grant table entry + * + * @v hdr Grant table entry header + * @ret v2 Version 2 grant table entry + */ +static inline __attribute__ (( always_inline )) union grant_entry_v2 * +xengrant_v2 ( struct grant_entry_header *hdr ) { + + return ( container_of ( &hdr->flags, union grant_entry_v2, hdr.flags )); +} + +/** + * Zero grant table entry + * + * @v xen Xen hypervisor + * @v hdr Grant table entry header + */ +static inline void xengrant_zero ( struct xen_hypervisor *xen, + struct grant_entry_header *hdr ) { + uint32_t *dword = ( ( uint32_t * ) hdr ); + unsigned int i = ( ( sizeof ( xen->grant.table[0] ) / sizeof ( *dword )) + << xen->grant.shift ); + + while ( i-- ) + writel ( 0, dword++ ); +} + +/** + * Invalidate access to a page + * + * @v xen Xen hypervisor + * @v ref Grant reference + */ +static inline __attribute__ (( always_inline )) void +xengrant_invalidate ( struct xen_hypervisor *xen, grant_ref_t ref ) { + struct grant_entry_header *hdr = xengrant_header ( xen, ref ); + + /* Sanity check */ + assert ( ( readw ( &hdr->flags ) & + ( GTF_reading | GTF_writing ) ) == 0 ); + + /* This should apparently be done using a cmpxchg instruction. + * We omit this: partly in the interests of simplicity, but + * mainly since our control flow generally does not permit + * failure paths to themselves fail. + */ + writew ( 0, &hdr->flags ); + + /* Leave reference marked as in-use (see xengrant_alloc()) */ + writew ( DOMID_SELF, &hdr->domid ); +} + +/** + * Permit access to a page + * + * @v xen Xen hypervisor + * @v ref Grant reference + * @v domid Domain ID + * @v subflags Additional flags + * @v page Page start + * @ret rc Return status code + */ +static inline __attribute__ (( always_inline )) int +xengrant_permit_access ( struct xen_hypervisor *xen, grant_ref_t ref, + domid_t domid, unsigned int subflags, void *page ) { + struct grant_entry_header *hdr = xengrant_header ( xen, ref ); + struct grant_entry_v1 *v1 = xengrant_v1 ( hdr ); + union grant_entry_v2 *v2 = xengrant_v2 ( hdr ); + unsigned long frame = ( virt_to_phys ( page ) / PAGE_SIZE ); + + /* Fail (for test purposes) if applicable */ + if ( ( XENGRANT_FAIL_RATE > 0 ) && + ( random() % XENGRANT_FAIL_RATE ) == 0 ) { + return -EAGAIN; + } + + /* Record frame number. This may fail on a 64-bit system if + * we are using v1 grant tables. On a 32-bit system, there is + * no way for this code path to fail (with either v1 or v2 + * grant tables); we allow the compiler to optimise the + * failure paths away to save space. + */ + if ( sizeof ( physaddr_t ) == sizeof ( uint64_t ) ) { + + /* 64-bit system */ + if ( xen->grant.shift ) { + /* Version 2 table: no possible failure */ + writeq ( frame, &v2->full_page.frame ); + } else { + /* Version 1 table: may fail if address above 16TB */ + if ( frame > 0xffffffffUL ) + return -ERANGE; + writel ( frame, &v1->frame ); + } + + } else { + + /* 32-bit system */ + if ( xen->grant.shift ) { + /* Version 2 table: no possible failure */ + writel ( frame, &v2->full_page.frame ); + } else { + /* Version 1 table: no possible failure */ + writel ( frame, &v1->frame ); + } + } + + /* Record domain ID and flags */ + writew ( domid, &hdr->domid ); + wmb(); + writew ( ( GTF_permit_access | subflags ), &hdr->flags ); + wmb(); + + return 0; +} + +extern int xengrant_init ( struct xen_hypervisor *xen ); +extern int xengrant_alloc ( struct xen_hypervisor *xen, grant_ref_t *refs, + unsigned int count ); +extern void xengrant_free ( struct xen_hypervisor *xen, grant_ref_t *refs, + unsigned int count ); + +#endif /* _IPXE_XENGRANT_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xenmem.h b/qemu/roms/ipxe/src/include/ipxe/xenmem.h new file mode 100644 index 000000000..9b9aeda9c --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xenmem.h @@ -0,0 +1,46 @@ +#ifndef _IPXE_XENMEM_H +#define _IPXE_XENMEM_H + +/** @file + * + * Xen memory operations + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/xen.h> +#include <xen/memory.h> + +/** + * Add page to physical address space + * + * @v xen Xen hypervisor + * @v add Page mapping descriptor + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xenmem_add_to_physmap ( struct xen_hypervisor *xen, + struct xen_add_to_physmap *add ) { + + return xen_hypercall_2 ( xen, __HYPERVISOR_memory_op, + XENMEM_add_to_physmap, virt_to_phys ( add ) ); +} + +/** + * Remove page from physical address space + * + * @v xen Xen hypervisor + * @v remove Page mapping descriptor + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xenmem_remove_from_physmap ( struct xen_hypervisor *xen, + struct xen_remove_from_physmap *remove ) { + + return xen_hypercall_2 ( xen, __HYPERVISOR_memory_op, + XENMEM_remove_from_physmap, + virt_to_phys ( remove ) ); +} + +#endif /* _IPXE_XENMEM_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xenstore.h b/qemu/roms/ipxe/src/include/ipxe/xenstore.h new file mode 100644 index 000000000..f25f15704 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xenstore.h @@ -0,0 +1,29 @@ +#ifndef _IPXE_XENSTORE_H +#define _IPXE_XENSTORE_H + +/** @file + * + * XenStore interface + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/xen.h> + +extern __attribute__ (( sentinel )) int +xenstore_read ( struct xen_hypervisor *xen, char **value, ... ); +extern __attribute__ (( sentinel )) int +xenstore_read_num ( struct xen_hypervisor *xen, unsigned long *num, ... ); +extern __attribute__ (( sentinel )) int +xenstore_write ( struct xen_hypervisor *xen, const char *value, ... ); +extern __attribute__ (( sentinel )) int +xenstore_write_num ( struct xen_hypervisor *xen, unsigned long num, ... ); +extern __attribute__ (( sentinel )) int +xenstore_rm ( struct xen_hypervisor *xen, ... ); +extern __attribute__ (( sentinel )) int +xenstore_directory ( struct xen_hypervisor *xen, char **children, size_t *len, + ... ); +extern void xenstore_dump ( struct xen_hypervisor *xen, const char *key ); + +#endif /* _IPXE_XENSTORE_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xenver.h b/qemu/roms/ipxe/src/include/ipxe/xenver.h new file mode 100644 index 000000000..5d678c5a3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xenver.h @@ -0,0 +1,44 @@ +#ifndef _IPXE_XENVER_H +#define _IPXE_VENVER_H + +/** @file + * + * Xen version + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/xen.h> +#include <xen/version.h> + +/** + * Get Xen version + * + * @v xen Xen hypervisor + * @ret version Version (major.minor: 16 bits each) + */ +static inline __attribute__ (( always_inline )) uint32 +xenver_version ( struct xen_hypervisor *xen ) { + + return xen_hypercall_2 ( xen, __HYPERVISOR_xen_version, + XENVER_version, 0 ); +} + +/** + * Get Xen extra version string + * + * @v xen Xen hypervisor + * @v extraversion Extra version string to fill in + * @ret xenrc Xen status code + */ +static inline __attribute__ (( always_inline )) int +xenver_extraversion ( struct xen_hypervisor *xen, + xen_extraversion_t *extraversion ) { + + return xen_hypercall_2 ( xen, __HYPERVISOR_xen_version, + XENVER_extraversion, + virt_to_phys ( extraversion ) ); +} + +#endif /* _IPXE_XENVER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xfer.h b/qemu/roms/ipxe/src/include/ipxe/xfer.h new file mode 100644 index 000000000..1167e5cba --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xfer.h @@ -0,0 +1,107 @@ +#ifndef _IPXE_XFER_H +#define _IPXE_XFER_H + +/** @file + * + * Data transfer interfaces + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <stdarg.h> +#include <ipxe/interface.h> + +struct xfer_metadata; +struct io_buffer; +struct sockaddr; +struct net_device; + +/** Data transfer metadata */ +struct xfer_metadata { + /** Flags + * + * This is the bitwise OR of zero or more @c XFER_FL_XXX + * constants. + */ + unsigned int flags; + /** Offset of data within stream + * + * This is an absolute offset if the @c XFER_FL_ABS_OFFSET + * flag is set, otherwise a relative offset. (A freshly + * zeroed @c xfer_metadata structure therefore represents a + * relative offset of zero, i.e. no offset from the current + * position.) + */ + off_t offset; + /** Source socket address, or NULL */ + struct sockaddr *src; + /** Destination socket address, or NULL */ + struct sockaddr *dest; + /** Network device, or NULL */ + struct net_device *netdev; +}; + +/** Offset is absolute */ +#define XFER_FL_ABS_OFFSET 0x0001 + +/** Sender is relinquishing use of half-duplex channel */ +#define XFER_FL_OVER 0x0002 + +/** This is the final data transfer */ +#define XFER_FL_OUT 0x0004 + +/** Data content represents a command or status message + * + * The flag @c XFER_FL_RESPONSE is used to distinguish between a + * command message and a status message. + */ +#define XFER_FL_CMD_STAT 0x0008 + +/** Data content is a response */ +#define XFER_FL_RESPONSE 0x0010 + +/* Data transfer interface operations */ + +extern int xfer_vredirect ( struct interface *intf, int type, + va_list args ); +#define xfer_vredirect_TYPE( object_type ) \ + typeof ( int ( object_type, int type, va_list args ) ) + +extern size_t xfer_window ( struct interface *intf ); +#define xfer_window_TYPE( object_type ) \ + typeof ( size_t ( object_type ) ) + +extern void xfer_window_changed ( struct interface *intf ); +#define xfer_window_changed_TYPE( object_type ) \ + typeof ( void ( object_type ) ) + +extern struct io_buffer * xfer_alloc_iob ( struct interface *intf, + size_t len ); +#define xfer_alloc_iob_TYPE( object_type ) \ + typeof ( struct io_buffer * ( object_type, size_t len ) ) + +extern int xfer_deliver ( struct interface *intf, + struct io_buffer *iobuf, + struct xfer_metadata *meta ); +#define xfer_deliver_TYPE( object_type ) \ + typeof ( int ( object_type, struct io_buffer *iobuf, \ + struct xfer_metadata *meta ) ) + +/* Data transfer interface helper functions */ + +extern int xfer_redirect ( struct interface *xfer, int type, ... ); +extern int xfer_deliver_iob ( struct interface *intf, + struct io_buffer *iobuf ); +extern int xfer_deliver_raw_meta ( struct interface *intf, const void *data, + size_t len, struct xfer_metadata *meta ); +extern int xfer_deliver_raw ( struct interface *intf, + const void *data, size_t len ); +extern int xfer_vprintf ( struct interface *intf, + const char *format, va_list args ); +extern int __attribute__ (( format ( printf, 2, 3 ) )) +xfer_printf ( struct interface *intf, const char *format, ... ); +extern int xfer_seek ( struct interface *intf, off_t offset ); + +#endif /* _IPXE_XFER_H */ diff --git a/qemu/roms/ipxe/src/include/ipxe/xferbuf.h b/qemu/roms/ipxe/src/include/ipxe/xferbuf.h new file mode 100644 index 000000000..2ca871e59 --- /dev/null +++ b/qemu/roms/ipxe/src/include/ipxe/xferbuf.h @@ -0,0 +1,31 @@ +#ifndef _IPXE_XFERBUF_H +#define _IPXE_XFERBUF_H + +/** @file + * + * Data transfer buffer + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <ipxe/iobuf.h> +#include <ipxe/xfer.h> + +/** A data transfer buffer */ +struct xfer_buffer { + /** Data */ + void *data; + /** Size of data */ + size_t len; + /** Current offset within data */ + size_t pos; +}; + +extern void xferbuf_done ( struct xfer_buffer *xferbuf ); +extern int xferbuf_deliver ( struct xfer_buffer *xferbuf, + struct io_buffer *iobuf, + struct xfer_metadata *meta ); + +#endif /* _IPXE_XFERBUF_H */ diff --git a/qemu/roms/ipxe/src/include/libgen.h b/qemu/roms/ipxe/src/include/libgen.h new file mode 100644 index 000000000..7e94881a9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/libgen.h @@ -0,0 +1,9 @@ +#ifndef _LIBGEN_H +#define _LIBGEN_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern char * basename ( char *path ); +extern char * dirname ( char *path ); + +#endif /* _LIBGEN_H */ diff --git a/qemu/roms/ipxe/src/include/linux_api.h b/qemu/roms/ipxe/src/include/linux_api.h new file mode 100644 index 000000000..28a3cda3b --- /dev/null +++ b/qemu/roms/ipxe/src/include/linux_api.h @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2010 Piotr JaroszyÅ„ski <p.jaroszynski@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef _LINUX_API_H +#define _LINUX_API_H + +/** * @file + * + * Linux API prototypes. + * Most of the functions map directly to linux syscalls and are the equivalent + * of POSIX functions with the linux_ prefix removed. + */ + +FILE_LICENCE(GPL2_OR_LATER); + +#include <bits/linux_api.h> +#include <bits/linux_api_platform.h> + +#include <stdint.h> + +#define __KERNEL_STRICT_NAMES +#include <linux/types.h> +#include <linux/posix_types.h> +typedef __kernel_pid_t pid_t; +typedef __kernel_suseconds_t suseconds_t; +typedef __kernel_loff_t loff_t; +#include <linux/time.h> +#include <linux/mman.h> +#include <linux/fcntl.h> +#include <linux/ioctl.h> +#include <linux/poll.h> +typedef unsigned long nfds_t; +typedef uint32_t useconds_t; +#define MAP_FAILED ( ( void * ) -1 ) +#define SEEK_SET 0 + +extern long linux_syscall ( int number, ... ); + +extern int linux_open ( const char *pathname, int flags ); +extern int linux_close ( int fd ); +extern off_t linux_lseek ( int fd, off_t offset, int whence ); +extern __kernel_ssize_t linux_read ( int fd, void *buf, __kernel_size_t count ); +extern __kernel_ssize_t linux_write ( int fd, const void *buf, + __kernel_size_t count ); +extern int linux_fcntl ( int fd, int cmd, ... ); +extern int linux_ioctl ( int fd, int request, ... ); +extern int linux_poll ( struct pollfd *fds, nfds_t nfds, int timeout ); +extern int linux_nanosleep ( const struct timespec *req, struct timespec *rem ); +extern int linux_usleep ( useconds_t usec ); +extern int linux_gettimeofday ( struct timeval *tv, struct timezone *tz ); +extern void * linux_mmap ( void *addr, __kernel_size_t length, int prot, + int flags, int fd, off_t offset ); +extern void * linux_mremap ( void *old_address, __kernel_size_t old_size, + __kernel_size_t new_size, int flags ); +extern int linux_munmap ( void *addr, __kernel_size_t length ); + +extern const char * linux_strerror ( int errnum ); + +#endif /* _LINUX_API_H */ diff --git a/qemu/roms/ipxe/src/include/little_bswap.h b/qemu/roms/ipxe/src/include/little_bswap.h new file mode 100644 index 000000000..92dd26ba1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/little_bswap.h @@ -0,0 +1,37 @@ +#ifndef ETHERBOOT_LITTLE_BSWAP_H +#define ETHERBOOT_LITTLE_BSWAP_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#define htonll(x) __bswap_64(x) +#define ntohll(x) __bswap_64(x) +#define ntohl(x) __bswap_32(x) +#define htonl(x) __bswap_32(x) +#define ntohs(x) __bswap_16(x) +#define htons(x) __bswap_16(x) +#define cpu_to_le64(x) (x) +#define cpu_to_le32(x) (x) +#define cpu_to_le16(x) (x) +#define cpu_to_be64(x) __bswap_64(x) +#define cpu_to_be32(x) __bswap_32(x) +#define cpu_to_be16(x) __bswap_16(x) +#define le64_to_cpu(x) (x) +#define le32_to_cpu(x) (x) +#define le16_to_cpu(x) (x) +#define be64_to_cpu(x) __bswap_64(x) +#define be32_to_cpu(x) __bswap_32(x) +#define be16_to_cpu(x) __bswap_16(x) +#define cpu_to_le64s(x) do {} while (0) +#define cpu_to_le32s(x) do {} while (0) +#define cpu_to_le16s(x) do {} while (0) +#define cpu_to_be64s(x) __bswap_64s(x) +#define cpu_to_be32s(x) __bswap_32s(x) +#define cpu_to_be16s(x) __bswap_16s(x) +#define le64_to_cpus(x) do {} while (0) +#define le32_to_cpus(x) do {} while (0) +#define le16_to_cpus(x) do {} while (0) +#define be64_to_cpus(x) __bswap_64s(x) +#define be32_to_cpus(x) __bswap_32s(x) +#define be16_to_cpus(x) __bswap_16s(x) + +#endif /* ETHERBOOT_LITTLE_BSWAP_H */ diff --git a/qemu/roms/ipxe/src/include/mii.h b/qemu/roms/ipxe/src/include/mii.h new file mode 100644 index 000000000..e2afef854 --- /dev/null +++ b/qemu/roms/ipxe/src/include/mii.h @@ -0,0 +1,157 @@ +#ifndef _MII_H_ +#define _MII_H_ + +/** @file + * + * Media Independent Interface constants + * + * Extracted from Linux's include/linux/mii.h + * + * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com) + * + */ + +FILE_LICENCE ( GPL2_ONLY ); + +/* Generic MII registers. */ +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ +#define MII_ESTATUS 0x0f /* Extended Status */ +#define MII_DCOUNTER 0x12 /* Disconnect counter */ +#define MII_FCSCOUNTER 0x13 /* False carrier counter */ +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ +#define MII_RERRCOUNTER 0x15 /* Receive error counter */ +#define MII_SREVISION 0x16 /* Silicon revision */ +#define MII_RESV1 0x17 /* Reserved... */ +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ +#define MII_PHYADDR 0x19 /* PHY address */ +#define MII_RESV2 0x1a /* Reserved... */ +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ +#define MII_NCONFIG 0x1c /* Network interface config */ + +/* Basic mode control register. */ +#define BMCR_RESV 0x003f /* Unused... */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ +#define BMCR_CTST 0x0080 /* Collision test */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ +#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ +#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ +#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ +#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ +#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ +#define BMCR_RESET 0x8000 /* Reset the DP83840 */ + +/* Basic mode status register. */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_JCD 0x0002 /* Jabber detected */ +#define BMSR_LSTATUS 0x0004 /* Link status */ +#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ +#define BMSR_RFAULT 0x0010 /* Remote fault detected */ +#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ +#define BMSR_RESV 0x00c0 /* Unused... */ +#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ +#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ +#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ +#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ +#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ +#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ +#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ +#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ + +/* Advertisement control register. */ +#define ADVERTISE_SLCT 0x001f /* Selector bits */ +#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ +#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ +#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ +#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ +#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ +#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ +#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ +#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ +#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ +#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ +#define ADVERTISE_RESV 0x1000 /* Unused... */ +#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ +#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ +#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ + +#define ADVERTISE_FULL ( ADVERTISE_100FULL | ADVERTISE_10FULL | \ + ADVERTISE_CSMA) +#define ADVERTISE_ALL ( ADVERTISE_10HALF | ADVERTISE_10FULL | \ + ADVERTISE_100HALF | ADVERTISE_100FULL ) + +/* Link partner ability register. */ +#define LPA_SLCT 0x001f /* Same as advertise selector */ +#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ +#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ +#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ +#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ +#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ +#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ +#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ +#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ +#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ +#define LPA_RESV 0x1000 /* Unused... */ +#define LPA_RFAULT 0x2000 /* Link partner faulted */ +#define LPA_LPACK 0x4000 /* Link partner acked us */ +#define LPA_NPAGE 0x8000 /* Next page bit */ + +#define LPA_DUPLEX ( LPA_10FULL | LPA_100FULL ) +#define LPA_100 ( LPA_100FULL | LPA_100HALF | LPA_100BASE4 ) + +/* Expansion register for auto-negotiation. */ +#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ +#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ +#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ +#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ +#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ +#define EXPANSION_RESV 0xffe0 /* Unused... */ + +#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ +#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ + +/* N-way test register. */ +#define NWAYTEST_RESV1 0x00ff /* Unused... */ +#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ +#define NWAYTEST_RESV2 0xfe00 /* Unused... */ + +/* 1000BASE-T Control register */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ + +/* 1000BASE-T Status register */ +#define LPA_1000LOCALRXOK 0x2000 /* Partner local receiver status */ +#define LPA_1000REMRXOK 0x1000 /* Partner remote receiver status */ +#define LPA_1000FULL 0x0800 /* Partner 1000BASE-T full duplex */ +#define LPA_1000HALF 0x0400 /* Partner 1000BASE-T half duplex */ + +#include <ipxe/netdevice.h> + +struct mii_if_info { + int phy_id; + int advertising; + int phy_id_mask; + int reg_num_mask; + + unsigned int full_duplex : 1; /* is full duplex? */ + unsigned int force_media : 1; /* is autoneg. disabled? */ + unsigned int supports_gmii : 1; /* are GMII registers supported? */ + + struct net_device *dev; + int (*mdio_read) (struct net_device *dev, int phy_id, int location); + void (*mdio_write) (struct net_device *dev, int phy_id, int location, int val); +}; + +#endif diff --git a/qemu/roms/ipxe/src/include/nic.h b/qemu/roms/ipxe/src/include/nic.h new file mode 100644 index 000000000..9aaede8a7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/nic.h @@ -0,0 +1,271 @@ + /* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2, or (at + * your option) any later version. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#ifndef NIC_H +#define NIC_H + +#include <stdint.h> +#include <string.h> +#include <stdio.h> +#include <byteswap.h> +#include <ipxe/pci.h> +#include <ipxe/isapnp.h> +#include <ipxe/isa.h> +#include <ipxe/eisa.h> +#include <ipxe/mca.h> +#include <ipxe/io.h> + +typedef enum { + DISABLE = 0, + ENABLE, + FORCE +} irq_action_t; + +typedef enum duplex { + HALF_DUPLEX = 1, + FULL_DUPLEX +} duplex_t; + +/* + * Structure returned from eth_probe and passed to other driver + * functions. + */ +struct nic { + struct nic_operations *nic_op; + int flags; /* driver specific flags */ + unsigned char *node_addr; + unsigned char *packet; + unsigned int packetlen; + unsigned int ioaddr; + unsigned char irqno; + unsigned int mbps; + duplex_t duplex; + void *priv_data; /* driver private data */ +}; + +struct nic_operations { + int ( *connect ) ( struct nic * ); + int ( *poll ) ( struct nic *, int retrieve ); + void ( *transmit ) ( struct nic *, const char *, + unsigned int, unsigned int, const char * ); + void ( *irq ) ( struct nic *, irq_action_t ); +}; + +extern struct nic nic; + +static inline int eth_poll ( int retrieve ) { + return nic.nic_op->poll ( &nic, retrieve ); +} + +static inline void eth_transmit ( const char *dest, unsigned int type, + unsigned int size, const void *packet ) { + nic.nic_op->transmit ( &nic, dest, type, size, packet ); +} + +/* + * Function prototypes + * + */ +extern int dummy_connect ( struct nic *nic ); +extern void dummy_irq ( struct nic *nic, irq_action_t irq_action ); +extern int legacy_probe ( void *hwdev, + void ( * set_drvdata ) ( void *hwdev, void *priv ), + struct device *dev, + int ( * probe ) ( struct nic *nic, void *hwdev ), + void ( * disable ) ( struct nic *nic, void *hwdev )); +void legacy_remove ( void *hwdev, + void * ( * get_drvdata ) ( void *hwdev ), + void ( * disable ) ( struct nic *nic, void *hwdev ) ); + +#define PCI_DRIVER(_name,_ids,_class) \ + static inline int \ + _name ## _pci_legacy_probe ( struct pci_device *pci ); \ + static inline void \ + _name ## _pci_legacy_remove ( struct pci_device *pci ); \ + struct pci_driver _name __pci_driver = { \ + .ids = _ids, \ + .id_count = sizeof ( _ids ) / sizeof ( _ids[0] ), \ + .probe = _name ## _pci_legacy_probe, \ + .remove = _name ## _pci_legacy_remove, \ + }; \ + REQUIRE_OBJECT ( pci ); + +static inline void legacy_pci_set_drvdata ( void *hwdev, void *priv ) { + pci_set_drvdata ( hwdev, priv ); +} +static inline void * legacy_pci_get_drvdata ( void *hwdev ) { + return pci_get_drvdata ( hwdev ); +} + +#define ISAPNP_DRIVER(_name,_ids) \ + static inline int \ + _name ## _isapnp_legacy_probe ( struct isapnp_device *isapnp, \ + const struct isapnp_device_id *id ); \ + static inline void \ + _name ## _isapnp_legacy_remove ( struct isapnp_device *isapnp ); \ + struct isapnp_driver _name __isapnp_driver = { \ + .ids = _ids, \ + .id_count = sizeof ( _ids ) / sizeof ( _ids[0] ), \ + .probe = _name ## _isapnp_legacy_probe, \ + .remove = _name ## _isapnp_legacy_remove, \ + }; \ + REQUIRE_OBJECT ( isapnp ); + +static inline void legacy_isapnp_set_drvdata ( void *hwdev, void *priv ) { + isapnp_set_drvdata ( hwdev, priv ); +} +static inline void * legacy_isapnp_get_drvdata ( void *hwdev ) { + return isapnp_get_drvdata ( hwdev ); +} + +#define EISA_DRIVER(_name,_ids) \ + static inline int \ + _name ## _eisa_legacy_probe ( struct eisa_device *eisa, \ + const struct eisa_device_id *id ); \ + static inline void \ + _name ## _eisa_legacy_remove ( struct eisa_device *eisa ); \ + struct eisa_driver _name __eisa_driver = { \ + .ids = _ids, \ + .id_count = sizeof ( _ids ) / sizeof ( _ids[0] ), \ + .probe = _name ## _eisa_legacy_probe, \ + .remove = _name ## _eisa_legacy_remove, \ + }; \ + REQUIRE_OBJECT ( eisa ); + +static inline void legacy_eisa_set_drvdata ( void *hwdev, void *priv ) { + eisa_set_drvdata ( hwdev, priv ); +} +static inline void * legacy_eisa_get_drvdata ( void *hwdev ) { + return eisa_get_drvdata ( hwdev ); +} + +#define MCA_DRIVER(_name,_ids) \ + static inline int \ + _name ## _mca_legacy_probe ( struct mca_device *mca, \ + const struct mca_device_id *id ); \ + static inline void \ + _name ## _mca_legacy_remove ( struct mca_device *mca ); \ + struct mca_driver _name __mca_driver = { \ + .ids = _ids, \ + .id_count = sizeof ( _ids ) / sizeof ( _ids[0] ), \ + .probe = _name ## _mca_legacy_probe, \ + .remove = _name ## _mca_legacy_remove, \ + }; \ + REQUIRE_OBJECT ( mca ); + +static inline void legacy_mca_set_drvdata ( void *hwdev, void *priv ) { + mca_set_drvdata ( hwdev, priv ); +} +static inline void * legacy_mca_get_drvdata ( void *hwdev ) { + return mca_get_drvdata ( hwdev ); +} + +#define ISA_DRIVER(_name,_probe_addrs,_probe_addr,_vendor_id,_prod_id) \ + static inline int \ + _name ## _isa_legacy_probe ( struct isa_device *isa ); \ + static inline int \ + _name ## _isa_legacy_probe_at_addr ( struct isa_device *isa ) { \ + if ( ! _probe_addr ( isa->ioaddr ) ) \ + return -ENODEV; \ + return _name ## _isa_legacy_probe ( isa ); \ + } \ + static inline void \ + _name ## _isa_legacy_remove ( struct isa_device *isa ); \ + static const char _name ## _text[]; \ + struct isa_driver _name __isa_driver = { \ + .name = _name ## _text, \ + .probe_addrs = _probe_addrs, \ + .addr_count = ( sizeof ( _probe_addrs ) / \ + sizeof ( _probe_addrs[0] ) ), \ + .vendor_id = _vendor_id, \ + .prod_id = _prod_id, \ + .probe = _name ## _isa_legacy_probe_at_addr, \ + .remove = _name ## _isa_legacy_remove, \ + }; \ + REQUIRE_OBJECT ( isa ); + +static inline void legacy_isa_set_drvdata ( void *hwdev, void *priv ) { + isa_set_drvdata ( hwdev, priv ); +} +static inline void * legacy_isa_get_drvdata ( void *hwdev ) { + return isa_get_drvdata ( hwdev ); +} + +#undef DRIVER +#define DRIVER(_name_text,_unused2,_unused3,_name,_probe,_disable) \ + static const char _name ## _text[] = _name_text; \ + static inline int \ + _name ## _probe ( struct nic *nic, void *hwdev ) { \ + return _probe ( nic, hwdev ); \ + } \ + static inline void \ + _name ## _disable ( struct nic *nic, void *hwdev ) { \ + void ( * _unsafe_disable ) () = _disable; \ + _unsafe_disable ( nic, hwdev ); \ + } \ + static inline int \ + _name ## _pci_legacy_probe ( struct pci_device *pci ) { \ + return legacy_probe ( pci, legacy_pci_set_drvdata, \ + &pci->dev, _name ## _probe, \ + _name ## _disable ); \ + } \ + static inline void \ + _name ## _pci_legacy_remove ( struct pci_device *pci ) { \ + return legacy_remove ( pci, legacy_pci_get_drvdata, \ + _name ## _disable ); \ + } \ + static inline int \ + _name ## _isapnp_legacy_probe ( struct isapnp_device *isapnp, \ + const struct isapnp_device_id *id __unused ) { \ + return legacy_probe ( isapnp, legacy_isapnp_set_drvdata, \ + &isapnp->dev, _name ## _probe, \ + _name ## _disable ); \ + } \ + static inline void \ + _name ## _isapnp_legacy_remove ( struct isapnp_device *isapnp ) { \ + return legacy_remove ( isapnp, legacy_isapnp_get_drvdata, \ + _name ## _disable ); \ + } \ + static inline int \ + _name ## _eisa_legacy_probe ( struct eisa_device *eisa, \ + const struct eisa_device_id *id __unused ) { \ + return legacy_probe ( eisa, legacy_eisa_set_drvdata, \ + &eisa->dev, _name ## _probe, \ + _name ## _disable ); \ + } \ + static inline void \ + _name ## _eisa_legacy_remove ( struct eisa_device *eisa ) { \ + return legacy_remove ( eisa, legacy_eisa_get_drvdata, \ + _name ## _disable ); \ + } \ + static inline int \ + _name ## _mca_legacy_probe ( struct mca_device *mca, \ + const struct mca_device_id *id __unused ) { \ + return legacy_probe ( mca, legacy_mca_set_drvdata, \ + &mca->dev, _name ## _probe, \ + _name ## _disable ); \ + } \ + static inline void \ + _name ## _mca_legacy_remove ( struct mca_device *mca ) { \ + return legacy_remove ( mca, legacy_mca_get_drvdata, \ + _name ## _disable ); \ + } \ + static inline int \ + _name ## _isa_legacy_probe ( struct isa_device *isa ) { \ + return legacy_probe ( isa, legacy_isa_set_drvdata, \ + &isa->dev, _name ## _probe, \ + _name ## _disable ); \ + } \ + static inline void \ + _name ## _isa_legacy_remove ( struct isa_device *isa ) { \ + return legacy_remove ( isa, legacy_isa_get_drvdata, \ + _name ## _disable ); \ + } + +#endif /* NIC_H */ diff --git a/qemu/roms/ipxe/src/include/old_tcp.h b/qemu/roms/ipxe/src/include/old_tcp.h new file mode 100644 index 000000000..93e1485e8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/old_tcp.h @@ -0,0 +1,37 @@ +#ifndef _TCP_H +#define _TCP_H + +#define TCP_INITIAL_TIMEOUT (3*TICKS_PER_SEC) +#define TCP_MAX_TIMEOUT (60*TICKS_PER_SEC) +#define TCP_MIN_TIMEOUT (TICKS_PER_SEC) +#define TCP_MAX_RETRY 10 +#define TCP_MAX_HEADER ((int)sizeof(struct iphdr)+64) +#define TCP_MIN_WINDOW (1500-TCP_MAX_HEADER) +#define TCP_MAX_WINDOW (65535-TCP_MAX_HEADER) + +#define FIN 1 +#define SYN 2 +#define RST 4 +#define PSH 8 +#define ACK 16 +#define URG 32 + + +struct tcphdr { + uint16_t src; + uint16_t dst; + int32_t seq; + int32_t ack; + uint16_t ctrl; + uint16_t window; + uint16_t chksum; + uint16_t urgent; +}; + +extern int tcp_transaction ( unsigned long destip, unsigned int destsock, + void *ptr, + int (*send)(int len, void *buf, void *ptr), + int (*recv)(int len, const void *buf, void *ptr)); + + +#endif /* _TCP_H */ diff --git a/qemu/roms/ipxe/src/include/pc_kbd.h b/qemu/roms/ipxe/src/include/pc_kbd.h new file mode 100644 index 000000000..c125efa08 --- /dev/null +++ b/qemu/roms/ipxe/src/include/pc_kbd.h @@ -0,0 +1,7 @@ +#ifndef _PC_KBD_H +#define _PC_KBD_H + +int kbd_ischar(void); + +int kbd_getc(void); +#endif diff --git a/qemu/roms/ipxe/src/include/pcmcia-opts.h b/qemu/roms/ipxe/src/include/pcmcia-opts.h new file mode 100644 index 000000000..70dc0921c --- /dev/null +++ b/qemu/roms/ipxe/src/include/pcmcia-opts.h @@ -0,0 +1,23 @@ +// pcmcia-opts.h +// special options file for development time. Later this could end in Config(?) +#ifndef __pcmciaopts +#define __pcmciaopts + + #define _yes_ 1 + #define _no_ 0 + + #define SUPPORT_I82365 (_yes_) +// #define SUPPORT_YENTA (_no_) +// #define SUPPORT_SOME_DRIVER (_no_) + + #define PCMCIA_SHUTDOWN (_yes_) + #define MAP_ATTRMEM_TO 0xd0000 + #define MAP_ATTRMEM_LEN 0x02000 + + #define PDEBUG 3 + // The higher the more output you get, 0..3 + // Not fully implemented though, but for the future... + + #undef _yes_ + #undef _no_ +#endif diff --git a/qemu/roms/ipxe/src/include/pcmcia.h b/qemu/roms/ipxe/src/include/pcmcia.h new file mode 100644 index 000000000..d528bea57 --- /dev/null +++ b/qemu/roms/ipxe/src/include/pcmcia.h @@ -0,0 +1,156 @@ +// pcmcia.h - Header file for PCMCIA support + +#ifndef PCMCIA_H +#define PCMCIA_H + +typedef unsigned char u_char; +typedef unsigned short u_short; +typedef unsigned int u_int; +typedef unsigned long u_long; + +typedef u_short ioaddr_t; +extern int sockets; + +#define MAXPCCSOCKS 8 +#define MAXPCCCONFIGS 8 + +typedef enum ebpdriver_t { I82365, SOMEDRIVER } ebpdriver_t; +typedef enum interface_func_t { INIT, SHUTDOWN, MAPATTRMEM, UNMAPATTRMEM, SELECTCONFIG } interface_func_t; +typedef enum ebpstatus_t { EMPTY, HASCARD, INITIALIZED, SUSPENDED, OTHERDEVICE, UNKNOWN } ebpstatus_t; + +struct driver_interact_t { + ebpdriver_t id; + int (*f)(interface_func_t,int,int,int,int); + char *name; +}; +struct pccsock_t { + ebpdriver_t device; + int drivernum; + ebpstatus_t status; + // Internal usage of the drivers: + int internalid; + int flags; + int ioaddr; + int type; + int configoffset; + int possibleconfignum; + int stringoffset; + u_int stringlength; + int rmask0; +}; + +extern struct pccsock_t pccsock[MAXPCCSOCKS]; +extern u_int pccsocks; + +struct pcc_config_t { + u_char index; + u_char irq; + int iowin; + int iolen; +}; + + +int i82365_interfacer(interface_func_t,int,int,int,void *); +void sleepticks(int); + +#define EINVAL 22 + + +//*********************************************************** cc.h: +/* Definitions for card status flags for GetStatus */ +#define SS_WRPROT 0x0001 +#define SS_CARDLOCK 0x0002 +#define SS_EJECTION 0x0004 +#define SS_INSERTION 0x0008 +#define SS_BATDEAD 0x0010 +#define SS_BATWARN 0x0020 +#define SS_READY 0x0040 +#define SS_DETECT 0x0080 +#define SS_POWERON 0x0100 +#define SS_GPI 0x0200 +#define SS_STSCHG 0x0400 +#define SS_CARDBUS 0x0800 +#define SS_3VCARD 0x1000 +#define SS_XVCARD 0x2000 +#define SS_PENDING 0x4000 + +/* cc.h: for InquireSocket */ +typedef struct socket_cap_t { + u_int features; + u_int irq_mask; + u_int map_size; + ioaddr_t io_offset; + u_char pci_irq; + //struct pci_dev *cb_dev; + //struct bus_operations *bus; + void *cb_dev; + void *bus; +} socket_cap_t; +/* InquireSocket capabilities */ +#define SS_CAP_PAGE_REGS 0x0001 +#define SS_CAP_VIRTUAL_BUS 0x0002 +#define SS_CAP_MEM_ALIGN 0x0004 +#define SS_CAP_STATIC_MAP 0x0008 +#define SS_CAP_PCCARD 0x4000 +#define SS_CAP_CARDBUS 0x8000 + +/* for GetSocket, SetSocket */ +typedef struct socket_state_t { + u_int flags; + u_int csc_mask; + u_char Vcc, Vpp; + u_char io_irq; +} socket_state_t; + +extern socket_state_t dead_socket; + +/* Socket configuration flags */ +#define SS_PWR_AUTO 0x0010 +#define SS_IOCARD 0x0020 +#define SS_RESET 0x0040 +#define SS_DMA_MODE 0x0080 +#define SS_SPKR_ENA 0x0100 +#define SS_OUTPUT_ENA 0x0200 +#define SS_DEBOUNCED 0x0400 /* Tell driver that the debounce delay has ended */ +#define SS_ZVCARD 0x0800 + +/* Flags for I/O port and memory windows */ +#define MAP_ACTIVE 0x01 +#define MAP_16BIT 0x02 +#define MAP_AUTOSZ 0x04 +#define MAP_0WS 0x08 +#define MAP_WRPROT 0x10 +#define MAP_ATTRIB 0x20 +#define MAP_USE_WAIT 0x40 +#define MAP_PREFETCH 0x80 + +/* Use this just for bridge windows */ +#define MAP_IOSPACE 0x20 + +typedef struct pccard_io_map { + u_char map; + u_char flags; + u_short speed; + ioaddr_t start, stop; +} pccard_io_map; + + +typedef struct pccard_mem_map { + u_char map; + u_char flags; + u_short speed; + u_long sys_start, sys_stop; + u_int card_start; +} pccard_mem_map; + +typedef struct cb_bridge_map { + u_char map; + u_char flags; + u_int start, stop; +} cb_bridge_map; +// need the global function pointer struct? *TODO* +//************************************* end cc.h + + + +#endif /* PCMCIA_H */ diff --git a/qemu/roms/ipxe/src/include/readline/readline.h b/qemu/roms/ipxe/src/include/readline/readline.h new file mode 100644 index 000000000..0449a3f98 --- /dev/null +++ b/qemu/roms/ipxe/src/include/readline/readline.h @@ -0,0 +1,57 @@ +#ifndef _READLINE_H +#define _READLINE_H + +/** @file + * + * Minmal readline + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** A readline history entry */ +struct readline_history_entry { + /** Persistent copy of string */ + char *string; + /** Temporary copy of string + * + * The temporary copy exists only during the call to + * readline(). + */ + char *temp; +}; + +/** Maximum depth of a readline history buffer + * + * Must be one less than a power of two. + */ +#define READLINE_HISTORY_MAX_DEPTH ( ( 1 << 3 ) - 1 ) + +/** A readline history buffer */ +struct readline_history { + /** History entries + * + * This is a circular buffer, with entries in chronological + * order. The "next" entry is always empty except during a + * call to readline(). + */ + struct readline_history_entry entries[READLINE_HISTORY_MAX_DEPTH + 1]; + /** Position of next entry within buffer + * + * This is incremented monotonically each time an entry is + * added to the buffer. + */ + unsigned int next; + /** Current depth within history buffer + * + * This is valid only during the call to readline() + */ + unsigned int depth; +}; + +extern void history_free ( struct readline_history *history ); +extern int readline_history ( const char *prompt, const char *prefill, + struct readline_history *history, char **line ); +extern char * __malloc readline ( const char *prompt ); + +#endif /* _READLINE_H */ diff --git a/qemu/roms/ipxe/src/include/stdarg.h b/qemu/roms/ipxe/src/include/stdarg.h new file mode 100644 index 000000000..f317238a9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/stdarg.h @@ -0,0 +1,38 @@ +#ifndef _STDARG_H +#define _STDARG_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +typedef __builtin_va_list va_list; +#define va_start( ap, last ) __builtin_va_start ( ap, last ) +#define va_arg( ap, type ) __builtin_va_arg ( ap, type ) +#define va_end( ap ) __builtin_va_end ( ap ) +#define va_copy( dest, src ) __builtin_va_copy ( dest, src ) + +/** + * Count number of arguments to a variadic macro + * + * This rather neat, non-iterative solution is courtesy of Laurent + * Deniau. + * + */ +#define _VA_ARG_COUNT( _1, _2, _3, _4, _5, _6, _7, _8, \ + _9, _10, _11, _12, _13, _14, _15, _16, \ + _17, _18, _19, _20, _21, _22, _23, _24, \ + _25, _26, _27, _28, _29, _30, _31, _32, \ + _33, _34, _35, _36, _37, _38, _39, _40, \ + _41, _42, _43, _44, _45, _46, _47, _48, \ + _49, _50, _51, _52, _53, _54, _55, _56, \ + _57, _58, _59, _60, _61, _62, _63, N, ... ) N +#define VA_ARG_COUNT( ... ) \ + _VA_ARG_COUNT ( __VA_ARGS__, \ + 63, 62, 61, 60, 59, 58, 57, 56, \ + 55, 54, 53, 52, 51, 50, 49, 48, \ + 47, 46, 45, 44, 43, 42, 41, 40, \ + 39, 38, 37, 36, 35, 34, 33, 32, \ + 31, 30, 29, 28, 27, 26, 25, 24, \ + 23, 22, 21, 20, 19, 18, 17, 16, \ + 15, 14, 13, 12, 11, 10, 9, 8, \ + 7, 6, 5, 4, 3, 2, 1, 0 ) + +#endif /* _STDARG_H */ diff --git a/qemu/roms/ipxe/src/include/stddef.h b/qemu/roms/ipxe/src/include/stddef.h new file mode 100644 index 000000000..bf792771f --- /dev/null +++ b/qemu/roms/ipxe/src/include/stddef.h @@ -0,0 +1,34 @@ +#ifndef STDDEF_H +#define STDDEF_H + +FILE_LICENCE ( GPL2_ONLY ); + +/* for size_t */ +#include <stdint.h> + +#undef NULL +#define NULL ((void *)0) + +#undef offsetof +#if ( defined ( __GNUC__ ) && ( __GNUC__ > 3 ) ) +#define offsetof(TYPE, MEMBER) __builtin_offsetof(TYPE, MEMBER) +#else +#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) +#endif + +#undef container_of +#define container_of(ptr, type, member) ({ \ + const typeof( ((type *)0)->member ) *__mptr = (ptr); \ + (type *)( (char *)__mptr - offsetof(type,member) );}) + +/* __WCHAR_TYPE__ is defined by gcc and will change if -fshort-wchar is used */ +#ifndef __WCHAR_TYPE__ +#define __WCHAR_TYPE__ uint16_t +#endif +#ifndef __WINT_TYPE__ +#define __WINT_TYPE__ int +#endif +typedef __WCHAR_TYPE__ wchar_t; +typedef __WINT_TYPE__ wint_t; + +#endif /* STDDEF_H */ diff --git a/qemu/roms/ipxe/src/include/stdint.h b/qemu/roms/ipxe/src/include/stdint.h new file mode 100644 index 000000000..8cc9b84a5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/stdint.h @@ -0,0 +1,36 @@ +#ifndef _STDINT_H +#define _STDINT_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +/* + * This is a standard predefined macro on all gcc's I've seen. It's + * important that we define size_t in the same way as the compiler, + * because that's what it's expecting when it checks %zd/%zx printf + * format specifiers. + */ +#ifndef __SIZE_TYPE__ +#define __SIZE_TYPE__ unsigned long /* safe choice on most systems */ +#endif + +#include <bits/stdint.h> + +typedef int8_t s8; +typedef uint8_t u8; +typedef int16_t s16; +typedef uint16_t u16; +typedef int32_t s32; +typedef uint32_t u32; +typedef int64_t s64; +typedef uint64_t u64; + +typedef int8_t int8; +typedef uint8_t uint8; +typedef int16_t int16; +typedef uint16_t uint16; +typedef int32_t int32; +typedef uint32_t uint32; +typedef int64_t int64; +typedef uint64_t uint64; + +#endif /* _STDINT_H */ diff --git a/qemu/roms/ipxe/src/include/stdio.h b/qemu/roms/ipxe/src/include/stdio.h new file mode 100644 index 000000000..91840af5b --- /dev/null +++ b/qemu/roms/ipxe/src/include/stdio.h @@ -0,0 +1,51 @@ +#ifndef _STDIO_H +#define _STDIO_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <stdarg.h> + +extern void putchar ( int character ); + +extern int getchar ( void ); + +extern int __attribute__ (( format ( printf, 1, 2 ) )) +printf ( const char *fmt, ... ); + +extern int __attribute__ (( format ( printf, 3, 4 ) )) +snprintf ( char *buf, size_t size, const char *fmt, ... ); + +extern int __attribute__ (( format ( printf, 2, 3 ) )) +asprintf ( char **strp, const char *fmt, ... ); + +extern int vprintf ( const char *fmt, va_list args ); + +extern int vsnprintf ( char *buf, size_t size, const char *fmt, va_list args ); + +extern int vasprintf ( char **strp, const char *fmt, va_list args ); + +/** + * Write a formatted string to a buffer + * + * @v buf Buffer into which to write the string + * @v fmt Format string + * @v ... Arguments corresponding to the format string + * @ret len Length of formatted string + */ +#define sprintf( buf, fmt, ... ) \ + snprintf ( (buf), ~( ( size_t ) 0 ), (fmt), ## __VA_ARGS__ ) + +/** + * Write a formatted string to a buffer + * + * @v buf Buffer into which to write the string + * @v fmt Format string + * @v args Arguments corresponding to the format string + * @ret len Length of formatted string + */ +static inline int vsprintf ( char *buf, const char *fmt, va_list args ) { + return vsnprintf ( buf, ~( ( size_t ) 0 ), fmt, args ); +} + +#endif /* _STDIO_H */ diff --git a/qemu/roms/ipxe/src/include/stdlib.h b/qemu/roms/ipxe/src/include/stdlib.h new file mode 100644 index 000000000..2951522b8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/stdlib.h @@ -0,0 +1,103 @@ +#ifndef STDLIB_H +#define STDLIB_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> +#include <assert.h> + +/***************************************************************************** + * + * Numeric parsing + * + **************************************************************************** + */ + +static inline int strtoul_base ( const char **pp, int base ) +{ + const char *p = *pp; + + if ( base == 0 ) { + base = 10; + if ( *p == '0' ) { + p++; + base = 8; + if ( ( *p | 0x20 ) == 'x' ) { + p++; + base = 16; + } + } + } + + *pp = p; + + return base; +} + +extern unsigned int strtoul_charval ( unsigned int charval ); +extern unsigned long strtoul ( const char *p, char **endp, int base ); +extern unsigned long long strtoull ( const char *p, char **endp, int base ); + + +/***************************************************************************** + * + * Memory allocation + * + **************************************************************************** + */ + +extern void * __malloc malloc ( size_t size ); +extern void * realloc ( void *old_ptr, size_t new_size ); +extern void free ( void *ptr ); +extern void * __malloc zalloc ( size_t len ); + +/** + * Allocate cleared memory + * + * @v nmemb Number of members + * @v size Size of each member + * @ret ptr Allocated memory + * + * Allocate memory as per malloc(), and zero it. + * + * This is implemented as a static inline, with the body of the + * function in zalloc(), since in most cases @c nmemb will be 1 and + * doing the multiply is just wasteful. + */ +static inline void * __malloc calloc ( size_t nmemb, size_t size ) { + return zalloc ( nmemb * size ); +} + +/***************************************************************************** + * + * Random number generation + * + **************************************************************************** + */ + +extern long int random ( void ); +extern void srandom ( unsigned int seed ); + +static inline int rand ( void ) { + return random(); +} + +static inline void srand ( unsigned int seed ) { + srandom ( seed ); +} + +/***************************************************************************** + * + * Miscellaneous + * + **************************************************************************** + */ + +static inline __attribute__ (( always_inline )) int abs ( int value ) { + return __builtin_abs ( value ); +} + +extern int system ( const char *command ); +extern __asmcall int main ( void ); + +#endif /* STDLIB_H */ diff --git a/qemu/roms/ipxe/src/include/string.h b/qemu/roms/ipxe/src/include/string.h new file mode 100644 index 000000000..3482e1b22 --- /dev/null +++ b/qemu/roms/ipxe/src/include/string.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 1991, 1992 Linus Torvalds + * Copyright (C) 2004 Tobias Lorenz + * + * string handling functions + * based on linux/include/linux/ctype.h + * and linux/include/linux/string.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +FILE_LICENCE ( GPL2_ONLY ); + +#ifndef ETHERBOOT_STRING_H +#define ETHERBOOT_STRING_H + +#include <stddef.h> +#include <bits/string.h> + +int __pure strnicmp(const char *s1, const char *s2, size_t len) __nonnull; +char * strcpy(char * dest,const char *src) __nonnull; +char * strncpy(char * dest,const char *src,size_t count) __nonnull; +char * strcat(char * dest, const char * src) __nonnull; +char * strncat(char *dest, const char *src, size_t count) __nonnull; +int __pure strcmp(const char * cs,const char * ct) __nonnull; +int __pure strncmp(const char * cs,const char * ct, + size_t count) __nonnull; +char * __pure strchr(const char * s, int c) __nonnull; +char * __pure strrchr(const char * s, int c) __nonnull; +size_t __pure strlen(const char * s) __nonnull; +size_t __pure strnlen(const char * s, size_t count) __nonnull; +size_t __pure strspn(const char *s, const char *accept) __nonnull; +size_t __pure strcspn(const char *s, const char *reject) __nonnull; +char * __pure strpbrk(const char * cs,const char * ct) __nonnull; +char * strtok(char * s,const char * ct) __nonnull; +char * strsep(char **s, const char *ct) __nonnull; +void * memset(void * s,int c,size_t count) __nonnull; +void * memcpy ( void *dest, const void *src, size_t len ) __nonnull; +void * memmove(void * dest,const void *src,size_t count) __nonnull; +int __pure memcmp(const void * cs,const void * ct, + size_t count) __nonnull; +void * __pure memscan(const void * addr, int c, size_t size) __nonnull; +char * __pure strstr(const char * s1,const char * s2) __nonnull; +void * __pure memchr(const void *s, int c, size_t n) __nonnull; +char * __malloc strdup(const char *s) __nonnull; +char * __malloc strndup(const char *s, size_t n) __nonnull; + +extern const char * __pure strerror ( int errno ); + +#endif /* ETHERBOOT_STRING */ diff --git a/qemu/roms/ipxe/src/include/strings.h b/qemu/roms/ipxe/src/include/strings.h new file mode 100644 index 000000000..6912a1e45 --- /dev/null +++ b/qemu/roms/ipxe/src/include/strings.h @@ -0,0 +1,72 @@ +#ifndef _STRINGS_H +#define _STRINGS_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <limits.h> +#include <string.h> +#include <bits/strings.h> + +static inline __attribute__ (( always_inline )) int +__constant_flsll ( unsigned long long x ) { + int r = 0; + + if ( x & 0xffffffff00000000ULL ) { + x >>= 32; + r += 32; + } + if ( x & 0xffff0000UL ) { + x >>= 16; + r += 16; + } + if ( x & 0xff00 ) { + x >>= 8; + r += 8; + } + if ( x & 0xf0 ) { + x >>= 4; + r += 4; + } + if ( x & 0xc ) { + x >>= 2; + r += 2; + } + if ( x & 0x2 ) { + x >>= 1; + r += 1; + } + if ( x & 0x1 ) { + r += 1; + } + return r; +} + +static inline __attribute__ (( always_inline )) int +__constant_flsl ( unsigned long x ) { + return __constant_flsll ( x ); +} + +int __flsll ( long long x ); +int __flsl ( long x ); + +#define flsll( x ) \ + ( __builtin_constant_p ( x ) ? __constant_flsll ( x ) : __flsll ( x ) ) + +#define flsl( x ) \ + ( __builtin_constant_p ( x ) ? __constant_flsl ( x ) : __flsl ( x ) ) + +#define fls( x ) flsl ( x ) + +extern int strcasecmp ( const char *s1, const char *s2 ); + +static inline __attribute__ (( always_inline )) void +bcopy ( const void *src, void *dest, size_t n ) { + memmove ( dest, src, n ); +} + +static inline __attribute__ (( always_inline )) void +bzero ( void *s, size_t n ) { + memset ( s, 0, n ); +} + +#endif /* _STRINGS_H */ diff --git a/qemu/roms/ipxe/src/include/sys/time.h b/qemu/roms/ipxe/src/include/sys/time.h new file mode 100644 index 000000000..2647d3588 --- /dev/null +++ b/qemu/roms/ipxe/src/include/sys/time.h @@ -0,0 +1,20 @@ +#ifndef _SYS_TIME_H +#define _SYS_TIME_H + +/** @file + * + * Date and time + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +/** Seconds since the Epoch + * + * We use a 64-bit type to avoid Y2K38 issues, since we may have to + * handle distant future dates (e.g. X.509 certificate expiry dates). + */ +typedef int64_t time_t; + +#endif /* _SYS_TIME_H */ diff --git a/qemu/roms/ipxe/src/include/sys_info.h b/qemu/roms/ipxe/src/include/sys_info.h new file mode 100644 index 000000000..7127c6438 --- /dev/null +++ b/qemu/roms/ipxe/src/include/sys_info.h @@ -0,0 +1,33 @@ +#ifndef SYS_INFO_H +#define SYS_INFO_H + +/* Information collected from firmware/bootloader */ + +struct sys_info { + /* Values passed by bootloader */ + unsigned long boot_type; + unsigned long boot_data; + unsigned long boot_arg; + + char *firmware; /* "PCBIOS", "LinuxBIOS", etc. */ + char *command_line; /* command line given to us */ +#if 0 +//By LYH +//Will use meminfo in Etherboot + /* memory map */ + int n_memranges; + struct memrange { + unsigned long long base; + unsigned long long size; + } *memrange; +#endif +}; + +void collect_sys_info(struct sys_info *info); +void collect_elfboot_info(struct sys_info *info); +void collect_linuxbios_info(struct sys_info *info); + +/* Our name and version. I want to see single instance of these in the image */ +extern const char *program_name, *program_version; + +#endif /* SYS_INFO_H */ diff --git a/qemu/roms/ipxe/src/include/syslog.h b/qemu/roms/ipxe/src/include/syslog.h new file mode 100644 index 000000000..93f32f867 --- /dev/null +++ b/qemu/roms/ipxe/src/include/syslog.h @@ -0,0 +1,100 @@ +#ifndef _SYSLOG_H +#define _SYSLOG_H + +/** @file + * + * System logger + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdarg.h> +#include <ipxe/ansiesc.h> +#include <config/console.h> + +/** + * @defgroup syslogpri Syslog priorities + * + * These values are chosen to match those used in the syslog network + * protocol (RFC 5424). + * + * @{ + */ + +/** Emergency: system is unusable */ +#define LOG_EMERG 0 + +/** Alert: action must be taken immediately */ +#define LOG_ALERT 1 + +/** Critical: critical conditions */ +#define LOG_CRIT 2 + +/** Error: error conditions */ +#define LOG_ERR 3 + +/** Warning: warning conditions */ +#define LOG_WARNING 4 + +/** Notice: normal but significant conditions */ +#define LOG_NOTICE 5 + +/** Informational: informational messages */ +#define LOG_INFO 6 + +/** Debug: debug-level messages */ +#define LOG_DEBUG 7 + +/** @} */ + +/** Do not log any messages */ +#define LOG_NONE -1 + +/** Log all messages */ +#define LOG_ALL LOG_DEBUG + +extern void log_vprintf ( const char *fmt, va_list args ); + +extern void __attribute__ (( format ( printf, 1, 2 ) )) +log_printf ( const char *fmt, ... ); + +/** ANSI private escape sequence to set syslog priority + * + * @v priority Priority + */ +#define SYSLOG_SET_PRIORITY( priority ) \ + "\033[" #priority "p" + +/** ANSI private escape sequence to clear syslog priority */ +#define SYSLOG_CLEAR_PRIORITY "\033[p" + +/** + * Write message to system log + * + * @v priority Message priority + * @v fmt Format string + * @v ... Arguments + */ +#define vsyslog( priority, fmt, args ) do { \ + if ( (priority) <= LOG_LEVEL ) { \ + log_vprintf ( SYSLOG_SET_PRIORITY ( priority ) fmt \ + SYSLOG_CLEAR_PRIORITY, (args) ); \ + } \ + } while ( 0 ) + +/** + * Write message to system log + * + * @v priority Message priority + * @v fmt Format string + * @v ... Arguments + */ +#define syslog( priority, fmt, ... ) do { \ + if ( (priority) <= LOG_LEVEL ) { \ + log_printf ( SYSLOG_SET_PRIORITY ( priority ) fmt \ + SYSLOG_CLEAR_PRIORITY, ##__VA_ARGS__ ); \ + } \ + } while ( 0 ) + +#endif /* _SYSLOG_H */ diff --git a/qemu/roms/ipxe/src/include/time.h b/qemu/roms/ipxe/src/include/time.h new file mode 100644 index 000000000..452a544bb --- /dev/null +++ b/qemu/roms/ipxe/src/include/time.h @@ -0,0 +1,53 @@ +#ifndef _TIME_H +#define _TIME_H + +/** @file + * + * Date and time + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <sys/time.h> +#include <ipxe/time.h> + +/** Broken-down time */ +struct tm { + /** Seconds [0,60] */ + int tm_sec; + /** Minutes [0,59] */ + int tm_min; + /** Hour [0,23] */ + int tm_hour; + /** Day of month [1,31] */ + int tm_mday; + /** Month of year [0,11] */ + int tm_mon; + /** Years since 1900 */ + int tm_year; + /** Day of week [0,6] (Sunday=0) */ + int tm_wday; + /** Day of year [0,365] */ + int tm_yday; + /** Daylight savings flag */ + int tm_isdst; +}; + +/** + * Get current time in seconds since the Epoch + * + * @v t Time to fill in, or NULL + * @ret time Current time + */ +static inline time_t time ( time_t *t ) { + time_t now; + + now = time_now(); + if ( t ) + *t = now; + return now; +} + +extern time_t mktime ( struct tm *tm ); + +#endif /* _TIME_H */ diff --git a/qemu/roms/ipxe/src/include/unistd.h b/qemu/roms/ipxe/src/include/unistd.h new file mode 100644 index 000000000..3a50a2521 --- /dev/null +++ b/qemu/roms/ipxe/src/include/unistd.h @@ -0,0 +1,43 @@ +#ifndef _UNISTD_H +#define _UNISTD_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stddef.h> +#include <stdarg.h> + +extern int execv ( const char *command, char * const argv[] ); + +/** + * Execute command + * + * @v command Command name + * @v arg ... Argument list (starting with argv[0]) + * @ret rc Command exit status + * + * This is a front end to execv(). + */ +#define execl( command, arg, ... ) ( { \ + char * const argv[] = { (arg), ## __VA_ARGS__ }; \ + int rc = execv ( (command), argv ); \ + rc; \ + } ) + +/* Pick up udelay() */ +#include <ipxe/timer.h> + +/* + * sleep() prototype is defined by POSIX.1. usleep() prototype is + * defined by 4.3BSD. udelay() and mdelay() prototypes are chosen to + * be reasonably sensible. + * + */ + +extern unsigned int sleep ( unsigned int seconds ); +extern void mdelay ( unsigned long msecs ); + +static inline __always_inline void usleep ( unsigned long usecs ) { + udelay ( usecs ); +} + +#endif /* _UNISTD_H */ diff --git a/qemu/roms/ipxe/src/include/usr/autoboot.h b/qemu/roms/ipxe/src/include/usr/autoboot.h new file mode 100644 index 000000000..bc51aae79 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/autoboot.h @@ -0,0 +1,42 @@ +#ifndef _USR_AUTOBOOT_H +#define _USR_AUTOBOOT_H + +/** @file + * + * Automatic booting + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/device.h> + +struct net_device; +struct uri; +struct settings; + +/** uriboot() flags */ +enum uriboot_flags { + URIBOOT_NO_SAN_DESCRIBE = 0x0001, + URIBOOT_NO_SAN_BOOT = 0x0002, + URIBOOT_NO_SAN_UNHOOK = 0x0004, +}; + +#define URIBOOT_NO_SAN ( URIBOOT_NO_SAN_DESCRIBE | \ + URIBOOT_NO_SAN_BOOT | \ + URIBOOT_NO_SAN_UNHOOK ) + +extern void set_autoboot_busloc ( unsigned int bus_type, + unsigned int location ); +extern void set_autoboot_ll_addr ( const void *ll_addr, size_t len ); + +extern int uriboot ( struct uri *filename, struct uri *root_path, int drive, + unsigned int flags ); +extern struct uri * +fetch_next_server_and_filename ( struct settings *settings ); +extern int netboot ( struct net_device *netdev ); +extern void ipxe ( struct net_device *netdev ); + +extern int pxe_menu_boot ( struct net_device *netdev ); + +#endif /* _USR_AUTOBOOT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/dhcpmgmt.h b/qemu/roms/ipxe/src/include/usr/dhcpmgmt.h new file mode 100644 index 000000000..af1eceb17 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/dhcpmgmt.h @@ -0,0 +1,16 @@ +#ifndef _USR_DHCPMGMT_H +#define _USR_DHCPMGMT_H + +/** @file + * + * DHCP management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct net_device; + +extern int pxebs ( struct net_device *netdev, unsigned int pxe_type ); + +#endif /* _USR_DHCPMGMT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/fcmgmt.h b/qemu/roms/ipxe/src/include/usr/fcmgmt.h new file mode 100644 index 000000000..9441cefb4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/fcmgmt.h @@ -0,0 +1,21 @@ +#ifndef _USR_FCMGMT_H +#define _USR_FCMGMT_H + +/** @file + * + * Fibre Channel management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct fc_port; +struct fc_peer; +struct fc_els_handler; + +extern void fcportstat ( struct fc_port *port ); +extern void fcpeerstat ( struct fc_peer *peer ); +extern int fcels ( struct fc_port *port, struct fc_port_id *peer_port_id, + struct fc_els_handler *handler ); + +#endif /* _USR_FCMGMT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/ifmgmt.h b/qemu/roms/ipxe/src/include/usr/ifmgmt.h new file mode 100644 index 000000000..db77f1f1b --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/ifmgmt.h @@ -0,0 +1,22 @@ +#ifndef _USR_IFMGMT_H +#define _USR_IFMGMT_H + +/** @file + * + * Network interface management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct net_device; +struct net_device_configurator; + +extern int ifopen ( struct net_device *netdev ); +extern int ifconf ( struct net_device *netdev, + struct net_device_configurator *configurator ); +extern void ifclose ( struct net_device *netdev ); +extern void ifstat ( struct net_device *netdev ); +extern int iflinkwait ( struct net_device *netdev, unsigned long timeout ); + +#endif /* _USR_IFMGMT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/imgmgmt.h b/qemu/roms/ipxe/src/include/usr/imgmgmt.h new file mode 100644 index 000000000..5e25c562b --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/imgmgmt.h @@ -0,0 +1,22 @@ +#ifndef _USR_IMGMGMT_H +#define _USR_IMGMGMT_H + +/** @file + * + * Image management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/image.h> + +extern int imgdownload ( struct uri *uri, unsigned long timeout, + struct image **image ); +extern int imgdownload_string ( const char *uri_string, unsigned long timeout, + struct image **image ); +extern int imgacquire ( const char *name, unsigned long timeout, + struct image **image ); +extern void imgstat ( struct image *image ); + +#endif /* _USR_IMGMGMT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/imgtrust.h b/qemu/roms/ipxe/src/include/usr/imgtrust.h new file mode 100644 index 000000000..f47105af0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/imgtrust.h @@ -0,0 +1,17 @@ +#ifndef _USR_IMGTRUST_H +#define _USR_IMGTRUST_H + +/** @file + * + * Image trust management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/image.h> + +extern int imgverify ( struct image *image, struct image *signature, + const char *name ); + +#endif /* _USR_IMGTRUST_H */ diff --git a/qemu/roms/ipxe/src/include/usr/ipstat.h b/qemu/roms/ipxe/src/include/usr/ipstat.h new file mode 100644 index 000000000..5ff8b40c3 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/ipstat.h @@ -0,0 +1,14 @@ +#ifndef _USR_IPSTAT_H +#define _USR_IPSTAT_H + +/** @file + * + * IP statistics + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern void ipstat ( void ); + +#endif /* _USR_IPSTAT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/iwmgmt.h b/qemu/roms/ipxe/src/include/usr/iwmgmt.h new file mode 100644 index 000000000..c1bdc37a8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/iwmgmt.h @@ -0,0 +1,17 @@ +#ifndef _USR_IWMGMT_H +#define _USR_IWMGMT_H + +/** @file + * + * Wireless network interface management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +struct net80211_device; + +extern void iwstat ( struct net80211_device *dev ); +extern int iwlist ( struct net80211_device *dev ); + +#endif /* _USR_IWMGMT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/lotest.h b/qemu/roms/ipxe/src/include/usr/lotest.h new file mode 100644 index 000000000..aa4bbac4d --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/lotest.h @@ -0,0 +1,15 @@ +#ifndef _USR_LOTEST_H +#define _USR_LOTEST_H + +/** @file + * + * Loopback testing + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern int loopback_test ( struct net_device *sender, + struct net_device *receiver, size_t mtu ); + +#endif /* _USR_LOTEST_H */ diff --git a/qemu/roms/ipxe/src/include/usr/neighmgmt.h b/qemu/roms/ipxe/src/include/usr/neighmgmt.h new file mode 100644 index 000000000..3c2b704af --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/neighmgmt.h @@ -0,0 +1,14 @@ +#ifndef _USR_NEIGHMGMT_H +#define _USR_NEIGHMGMT_H + +/** @file + * + * Neighbour management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern void nstat ( void ); + +#endif /* _USR_NEIGHMGMT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/nslookup.h b/qemu/roms/ipxe/src/include/usr/nslookup.h new file mode 100644 index 000000000..d34649e9f --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/nslookup.h @@ -0,0 +1,14 @@ +#ifndef _USR_NSLOOKUP_H +#define _USR_NSLOOKUP_H + +/** @file + * + * Standalone name resolution + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern int nslookup ( const char *name, const char *setting_name ); + +#endif /* _USR_NSLOOKUP_H */ diff --git a/qemu/roms/ipxe/src/include/usr/pingmgmt.h b/qemu/roms/ipxe/src/include/usr/pingmgmt.h new file mode 100644 index 000000000..d4c2d6cd5 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/pingmgmt.h @@ -0,0 +1,17 @@ +#ifndef _USR_PINGMGMT_H +#define _USR_PINGMGMT_H + +/** @file + * + * ICMP ping management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +extern int ping ( const char *hostname, unsigned long timeout, size_t len, + unsigned int count, int quiet ); + +#endif /* _USR_PINGMGMT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/profstat.h b/qemu/roms/ipxe/src/include/usr/profstat.h new file mode 100644 index 000000000..06ea251a0 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/profstat.h @@ -0,0 +1,14 @@ +#ifndef _USR_PROFSTAT_H +#define _USR_PROFSTAT_H + +/** @file + * + * Profiling + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern void profstat ( void ); + +#endif /* _USR_PROFSTAT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/prompt.h b/qemu/roms/ipxe/src/include/usr/prompt.h new file mode 100644 index 000000000..57e43d2dc --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/prompt.h @@ -0,0 +1,14 @@ +#ifndef _USR_PROMPT_H +#define _USR_PROMPT_H + +/** @file + * + * Prompt for keypress + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern int prompt ( const char *text, unsigned long timeout, int key ); + +#endif /* _USR_PROMPT_H */ diff --git a/qemu/roms/ipxe/src/include/usr/route.h b/qemu/roms/ipxe/src/include/usr/route.h new file mode 100644 index 000000000..b914f4b84 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/route.h @@ -0,0 +1,35 @@ +#ifndef _USR_ROUTE_H +#define _USR_ROUTE_H + +/** @file + * + * Routing management + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/tables.h> + +/** A routing family */ +struct routing_family { + /** + * Print routes for a network device + * + * @v netdev Network device + */ + void ( * print ) ( struct net_device *netdev ); +}; + +/** Routing family table */ +#define ROUTING_FAMILIES __table ( struct routing_family, "routing_families" ) + +/** Declare a routing family */ +#define __routing_family( order ) __table_entry ( ROUTING_FAMILIES, order ) + +#define ROUTING_IPV4 01 +#define ROUTING_IPV6 02 + +extern void route ( void ); + +#endif /* _USR_ROUTE_H */ diff --git a/qemu/roms/ipxe/src/include/usr/sync.h b/qemu/roms/ipxe/src/include/usr/sync.h new file mode 100644 index 000000000..0047d4ed9 --- /dev/null +++ b/qemu/roms/ipxe/src/include/usr/sync.h @@ -0,0 +1,14 @@ +#ifndef _USR_SYNC_H +#define _USR_SYNC_H + +/** @file + * + * Wait for pending operations to complete + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +extern int sync ( unsigned long timeout ); + +#endif /* _USR_SYNC_H */ diff --git a/qemu/roms/ipxe/src/include/wchar.h b/qemu/roms/ipxe/src/include/wchar.h new file mode 100644 index 000000000..ba349aae8 --- /dev/null +++ b/qemu/roms/ipxe/src/include/wchar.h @@ -0,0 +1,29 @@ +#ifndef WCHAR_H +#define WCHAR_H + +FILE_LICENCE ( GPL2_ONLY ); + +#include <stddef.h> + +typedef void mbstate_t; + +/** + * Convert wide character to multibyte sequence + * + * @v buf Buffer + * @v wc Wide character + * @v ps Shift state + * @ret len Number of characters written + * + * This is a stub implementation, sufficient to handle basic ASCII + * characters. + */ +static inline __attribute__ (( always_inline )) +size_t wcrtomb ( char *buf, wchar_t wc, mbstate_t *ps __unused ) { + *buf = wc; + return 1; +} + +extern size_t wcslen ( const wchar_t *string ); + +#endif /* WCHAR_H */ diff --git a/qemu/roms/ipxe/src/include/xen/arch-arm.h b/qemu/roms/ipxe/src/include/xen/arch-arm.h new file mode 100644 index 000000000..ebc3aa2f1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/arch-arm.h @@ -0,0 +1,422 @@ +/****************************************************************************** + * arch-arm.h + * + * Guest OS interface to ARM Xen. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright 2011 (C) Citrix Systems + */ + +#ifndef __XEN_PUBLIC_ARCH_ARM_H__ +#define __XEN_PUBLIC_ARCH_ARM_H__ + +FILE_LICENCE ( MIT ); + +/* + * `incontents 50 arm_abi Hypercall Calling Convention + * + * A hypercall is issued using the ARM HVC instruction. + * + * A hypercall can take up to 5 arguments. These are passed in + * registers, the first argument in x0/r0 (for arm64/arm32 guests + * respectively irrespective of whether the underlying hypervisor is + * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2, + * the forth in x3/r3 and the fifth in x4/r4. + * + * The hypercall number is passed in r12 (arm) or x16 (arm64). In both + * cases the relevant ARM procedure calling convention specifies this + * is an inter-procedure-call scratch register (e.g. for use in linker + * stubs). This use does not conflict with use during a hypercall. + * + * The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG. + * + * The return value is in x0/r0. + * + * The hypercall will clobber x16/r12 and the argument registers used + * by that hypercall (except r0 which is the return value) i.e. in + * addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a + * 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3. + * + * Parameter structs passed to hypercalls are laid out according to + * the Procedure Call Standard for the ARM Architecture (AAPCS, AKA + * EABI) and Procedure Call Standard for the ARM 64-bit Architecture + * (AAPCS64). Where there is a conflict the 64-bit standard should be + * used regardless of guest type. Structures which are passed as + * hypercall arguments are always little endian. + * + * All memory which is shared with other entities in the system + * (including the hypervisor and other guests) must reside in memory + * which is mapped as Normal Inner-cacheable. This applies to: + * - hypercall arguments passed via a pointer to guest memory. + * - memory shared via the grant table mechanism (including PV I/O + * rings etc). + * - memory shared with the hypervisor (struct shared_info, struct + * vcpu_info, the grant table, etc). + * + * Any Inner cache allocation strategy (Write-Back, Write-Through etc) + * is acceptable. There is no restriction on the Outer-cacheability. + */ + +/* + * `incontents 55 arm_hcall Supported Hypercalls + * + * Xen on ARM makes extensive use of hardware facilities and therefore + * only a subset of the potential hypercalls are required. + * + * Since ARM uses second stage paging any machine/physical addresses + * passed to hypercalls are Guest Physical Addresses (Intermediate + * Physical Addresses) unless otherwise noted. + * + * The following hypercalls (and sub operations) are supported on the + * ARM platform. Other hypercalls should be considered + * unavailable/unsupported. + * + * HYPERVISOR_memory_op + * All generic sub-operations. + * + * In addition the following arch specific sub-ops: + * * XENMEM_add_to_physmap + * * XENMEM_add_to_physmap_batch + * + * HYPERVISOR_domctl + * All generic sub-operations, with the exception of: + * * XEN_DOMCTL_iomem_permission (not yet implemented) + * * XEN_DOMCTL_irq_permission (not yet implemented) + * + * HYPERVISOR_sched_op + * All generic sub-operations, with the exception of: + * * SCHEDOP_block -- prefer wfi hardware instruction + * + * HYPERVISOR_console_io + * All generic sub-operations + * + * HYPERVISOR_xen_version + * All generic sub-operations + * + * HYPERVISOR_event_channel_op + * All generic sub-operations + * + * HYPERVISOR_physdev_op + * No sub-operations are currenty supported + * + * HYPERVISOR_sysctl + * All generic sub-operations, with the exception of: + * * XEN_SYSCTL_page_offline_op + * * XEN_SYSCTL_get_pmstat + * * XEN_SYSCTL_pm_op + * + * HYPERVISOR_hvm_op + * Exactly these sub-operations are supported: + * * HVMOP_set_param + * * HVMOP_get_param + * + * HYPERVISOR_grant_table_op + * All generic sub-operations + * + * HYPERVISOR_vcpu_op + * Exactly these sub-operations are supported: + * * VCPUOP_register_vcpu_info + * * VCPUOP_register_runstate_memory_area + * + * + * Other notes on the ARM ABI: + * + * - struct start_info is not exported to ARM guests. + * + * - struct shared_info is mapped by ARM guests using the + * HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing + * XENMAPSPACE_shared_info as space parameter. + * + * - All the per-cpu struct vcpu_info are mapped by ARM guests using the + * HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0 + * struct vcpu_info. + * + * - The grant table is mapped using the HYPERVISOR_memory_op sub-op + * XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space + * parameter. The memory range specified under the Xen compatible + * hypervisor node on device tree can be used as target gpfn for the + * mapping. + * + * - Xenstore is initialized by using the two hvm_params + * HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read + * with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. + * + * - The paravirtualized console is initialized by using the two + * hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They + * can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. + * + * - Event channel notifications are delivered using the percpu GIC + * interrupt specified under the Xen compatible hypervisor node on + * device tree. + * + * - The device tree Xen compatible node is fully described under Linux + * at Documentation/devicetree/bindings/arm/xen.txt. + */ + +#define XEN_HYPERCALL_TAG 0XEA1 + +#define uint64_aligned_t uint64_t __attribute__((aligned(8))) + +#ifndef __ASSEMBLY__ +#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ + typedef union { type *p; unsigned long q; } \ + __guest_handle_ ## name; \ + typedef union { type *p; uint64_aligned_t q; } \ + __guest_handle_64_ ## name; + +/* + * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field + * in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes + * aligned. + * XEN_GUEST_HANDLE_PARAM represent a guest pointer, when passed as an + * hypercall argument. It is 4 bytes on aarch and 8 bytes on aarch64. + */ +#define __DEFINE_XEN_GUEST_HANDLE(name, type) \ + ___DEFINE_XEN_GUEST_HANDLE(name, type); \ + ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) +#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) +#define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name +#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) +/* this is going to be changed on 64 bit */ +#define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name +#define set_xen_guest_handle_raw(hnd, val) \ + do { \ + typeof(&(hnd)) _sxghr_tmp = &(hnd); \ + _sxghr_tmp->q = 0; \ + _sxghr_tmp->p = val; \ + } while ( 0 ) +#ifdef __XEN_TOOLS__ +#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0) +#endif +#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +/* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ +# define __DECL_REG(n64, n32) union { \ + uint64_t n64; \ + uint32_t n32; \ + } +#else +/* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */ +#define __DECL_REG(n64, n32) uint64_t n64 +#endif + +struct vcpu_guest_core_regs +{ + /* Aarch64 Aarch32 */ + __DECL_REG(x0, r0_usr); + __DECL_REG(x1, r1_usr); + __DECL_REG(x2, r2_usr); + __DECL_REG(x3, r3_usr); + __DECL_REG(x4, r4_usr); + __DECL_REG(x5, r5_usr); + __DECL_REG(x6, r6_usr); + __DECL_REG(x7, r7_usr); + __DECL_REG(x8, r8_usr); + __DECL_REG(x9, r9_usr); + __DECL_REG(x10, r10_usr); + __DECL_REG(x11, r11_usr); + __DECL_REG(x12, r12_usr); + + __DECL_REG(x13, sp_usr); + __DECL_REG(x14, lr_usr); + + __DECL_REG(x15, __unused_sp_hyp); + + __DECL_REG(x16, lr_irq); + __DECL_REG(x17, sp_irq); + + __DECL_REG(x18, lr_svc); + __DECL_REG(x19, sp_svc); + + __DECL_REG(x20, lr_abt); + __DECL_REG(x21, sp_abt); + + __DECL_REG(x22, lr_und); + __DECL_REG(x23, sp_und); + + __DECL_REG(x24, r8_fiq); + __DECL_REG(x25, r9_fiq); + __DECL_REG(x26, r10_fiq); + __DECL_REG(x27, r11_fiq); + __DECL_REG(x28, r12_fiq); + + __DECL_REG(x29, sp_fiq); + __DECL_REG(x30, lr_fiq); + + /* Return address and mode */ + __DECL_REG(pc64, pc32); /* ELR_EL2 */ + uint32_t cpsr; /* SPSR_EL2 */ + + union { + uint32_t spsr_el1; /* AArch64 */ + uint32_t spsr_svc; /* AArch32 */ + }; + + /* AArch32 guests only */ + uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt; + + /* AArch64 guests only */ + uint64_t sp_el0; + uint64_t sp_el1, elr_el1; +}; +typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t; +DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t); + +#undef __DECL_REG + +typedef uint64_t xen_pfn_t; +#define PRI_xen_pfn PRIx64 + +/* Maximum number of virtual CPUs in legacy multi-processor guests. */ +/* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */ +#define XEN_LEGACY_MAX_VCPUS 1 + +typedef uint64_t xen_ulong_t; +#define PRI_xen_ulong PRIx64 + +#if defined(__XEN__) || defined(__XEN_TOOLS__) +struct vcpu_guest_context { +#define _VGCF_online 0 +#define VGCF_online (1<<_VGCF_online) + uint32_t flags; /* VGCF_* */ + + struct vcpu_guest_core_regs user_regs; /* Core CPU registers */ + + uint32_t sctlr; + uint64_t ttbcr, ttbr0, ttbr1; +}; +typedef struct vcpu_guest_context vcpu_guest_context_t; +DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); +#endif + +struct arch_vcpu_info { +}; +typedef struct arch_vcpu_info arch_vcpu_info_t; + +struct arch_shared_info { +}; +typedef struct arch_shared_info arch_shared_info_t; +typedef uint64_t xen_callback_t; + +#endif + +#if defined(__XEN__) || defined(__XEN_TOOLS__) + +/* PSR bits (CPSR, SPSR)*/ + +#define PSR_THUMB (1<<5) /* Thumb Mode enable */ +#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ +#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ +#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ +#define PSR_BIG_ENDIAN (1<<9) /* arm32: Big Endian Mode */ +#define PSR_DBG_MASK (1<<9) /* arm64: Debug Exception mask */ +#define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */ +#define PSR_JAZELLE (1<<24) /* Jazelle Mode */ + +/* 32 bit modes */ +#define PSR_MODE_USR 0x10 +#define PSR_MODE_FIQ 0x11 +#define PSR_MODE_IRQ 0x12 +#define PSR_MODE_SVC 0x13 +#define PSR_MODE_MON 0x16 +#define PSR_MODE_ABT 0x17 +#define PSR_MODE_HYP 0x1a +#define PSR_MODE_UND 0x1b +#define PSR_MODE_SYS 0x1f + +/* 64 bit modes */ +#define PSR_MODE_BIT 0x10 /* Set iff AArch32 */ +#define PSR_MODE_EL3h 0x0d +#define PSR_MODE_EL3t 0x0c +#define PSR_MODE_EL2h 0x09 +#define PSR_MODE_EL2t 0x08 +#define PSR_MODE_EL1h 0x05 +#define PSR_MODE_EL1t 0x04 +#define PSR_MODE_EL0t 0x00 + +#define PSR_GUEST32_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC) +#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h) + +#define SCTLR_GUEST_INIT 0x00c50078 + +/* + * Virtual machine platform (memory layout, interrupts) + * + * These are defined for consistency between the tools and the + * hypervisor. Guests must not rely on these hardcoded values but + * should instead use the FDT. + */ + +/* Physical Address Space */ +#define GUEST_GICD_BASE 0x03001000ULL +#define GUEST_GICD_SIZE 0x00001000ULL +#define GUEST_GICC_BASE 0x03002000ULL +#define GUEST_GICC_SIZE 0x00000100ULL + +/* 16MB == 4096 pages reserved for guest to use as a region to map its + * grant table in. + */ +#define GUEST_GNTTAB_BASE 0x38000000ULL +#define GUEST_GNTTAB_SIZE 0x01000000ULL + +#define GUEST_MAGIC_BASE 0x39000000ULL +#define GUEST_MAGIC_SIZE 0x01000000ULL + +#define GUEST_RAM_BANKS 2 + +#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of low RAM @ 1GB */ +#define GUEST_RAM0_SIZE 0xc0000000ULL + +#define GUEST_RAM1_BASE 0x0200000000ULL /* 1016GB of RAM @ 8GB */ +#define GUEST_RAM1_SIZE 0xfe00000000ULL + +#define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */ +/* Largest amount of actual RAM, not including holes */ +#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE) +/* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */ +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } + +/* Interrupts */ +#define GUEST_TIMER_VIRT_PPI 27 +#define GUEST_TIMER_PHYS_S_PPI 29 +#define GUEST_TIMER_PHYS_NS_PPI 30 +#define GUEST_EVTCHN_PPI 31 + +/* PSCI functions */ +#define PSCI_cpu_suspend 0 +#define PSCI_cpu_off 1 +#define PSCI_cpu_on 2 +#define PSCI_migrate 3 + +#endif + +#endif /* __XEN_PUBLIC_ARCH_ARM_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/arch-x86/xen-x86_32.h b/qemu/roms/ipxe/src/include/xen/arch-x86/xen-x86_32.h new file mode 100644 index 000000000..96c8f4897 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/arch-x86/xen-x86_32.h @@ -0,0 +1,173 @@ +/****************************************************************************** + * xen-x86_32.h + * + * Guest OS interface to x86 32-bit Xen. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2004-2007, K A Fraser + */ + +#ifndef __XEN_PUBLIC_ARCH_X86_XEN_X86_32_H__ +#define __XEN_PUBLIC_ARCH_X86_XEN_X86_32_H__ + +FILE_LICENCE ( MIT ); + +/* + * Hypercall interface: + * Input: %ebx, %ecx, %edx, %esi, %edi, %ebp (arguments 1-6) + * Output: %eax + * Access is via hypercall page (set up by guest loader or via a Xen MSR): + * call hypercall_page + hypercall-number * 32 + * Clobbered: Argument registers (e.g., 2-arg hypercall clobbers %ebx,%ecx) + */ + +/* + * These flat segments are in the Xen-private section of every GDT. Since these + * are also present in the initial GDT, many OSes will be able to avoid + * installing their own GDT. + */ +#define FLAT_RING1_CS 0xe019 /* GDT index 259 */ +#define FLAT_RING1_DS 0xe021 /* GDT index 260 */ +#define FLAT_RING1_SS 0xe021 /* GDT index 260 */ +#define FLAT_RING3_CS 0xe02b /* GDT index 261 */ +#define FLAT_RING3_DS 0xe033 /* GDT index 262 */ +#define FLAT_RING3_SS 0xe033 /* GDT index 262 */ + +#define FLAT_KERNEL_CS FLAT_RING1_CS +#define FLAT_KERNEL_DS FLAT_RING1_DS +#define FLAT_KERNEL_SS FLAT_RING1_SS +#define FLAT_USER_CS FLAT_RING3_CS +#define FLAT_USER_DS FLAT_RING3_DS +#define FLAT_USER_SS FLAT_RING3_SS + +#define __HYPERVISOR_VIRT_START_PAE 0xF5800000 +#define __MACH2PHYS_VIRT_START_PAE 0xF5800000 +#define __MACH2PHYS_VIRT_END_PAE 0xF6800000 +#define HYPERVISOR_VIRT_START_PAE \ + mk_unsigned_long(__HYPERVISOR_VIRT_START_PAE) +#define MACH2PHYS_VIRT_START_PAE \ + mk_unsigned_long(__MACH2PHYS_VIRT_START_PAE) +#define MACH2PHYS_VIRT_END_PAE \ + mk_unsigned_long(__MACH2PHYS_VIRT_END_PAE) + +/* Non-PAE bounds are obsolete. */ +#define __HYPERVISOR_VIRT_START_NONPAE 0xFC000000 +#define __MACH2PHYS_VIRT_START_NONPAE 0xFC000000 +#define __MACH2PHYS_VIRT_END_NONPAE 0xFC400000 +#define HYPERVISOR_VIRT_START_NONPAE \ + mk_unsigned_long(__HYPERVISOR_VIRT_START_NONPAE) +#define MACH2PHYS_VIRT_START_NONPAE \ + mk_unsigned_long(__MACH2PHYS_VIRT_START_NONPAE) +#define MACH2PHYS_VIRT_END_NONPAE \ + mk_unsigned_long(__MACH2PHYS_VIRT_END_NONPAE) + +#define __HYPERVISOR_VIRT_START __HYPERVISOR_VIRT_START_PAE +#define __MACH2PHYS_VIRT_START __MACH2PHYS_VIRT_START_PAE +#define __MACH2PHYS_VIRT_END __MACH2PHYS_VIRT_END_PAE + +#ifndef HYPERVISOR_VIRT_START +#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) +#endif + +#define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) +#define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) +#define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>2) +#ifndef machine_to_phys_mapping +#define machine_to_phys_mapping ((unsigned long *)MACH2PHYS_VIRT_START) +#endif + +/* 32-/64-bit invariability for control interfaces (domctl/sysctl). */ +#if defined(__XEN__) || defined(__XEN_TOOLS__) +#undef ___DEFINE_XEN_GUEST_HANDLE +#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ + typedef struct { type *p; } \ + __guest_handle_ ## name; \ + typedef struct { union { type *p; uint64_aligned_t q; }; } \ + __guest_handle_64_ ## name +#undef set_xen_guest_handle_raw +#define set_xen_guest_handle_raw(hnd, val) \ + do { if ( sizeof(hnd) == 8 ) *(uint64_t *)&(hnd) = 0; \ + (hnd).p = val; \ + } while ( 0 ) +#define uint64_aligned_t uint64_t __attribute__((aligned(8))) +#define __XEN_GUEST_HANDLE_64(name) __guest_handle_64_ ## name +#define XEN_GUEST_HANDLE_64(name) __XEN_GUEST_HANDLE_64(name) +#endif + +#ifndef __ASSEMBLY__ + +struct cpu_user_regs { + uint32_t ebx; + uint32_t ecx; + uint32_t edx; + uint32_t esi; + uint32_t edi; + uint32_t ebp; + uint32_t eax; + uint16_t error_code; /* private */ + uint16_t entry_vector; /* private */ + uint32_t eip; + uint16_t cs; + uint8_t saved_upcall_mask; + uint8_t _pad0; + uint32_t eflags; /* eflags.IF == !saved_upcall_mask */ + uint32_t esp; + uint16_t ss, _pad1; + uint16_t es, _pad2; + uint16_t ds, _pad3; + uint16_t fs, _pad4; + uint16_t gs, _pad5; +}; +typedef struct cpu_user_regs cpu_user_regs_t; +DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t); + +/* + * Page-directory addresses above 4GB do not fit into architectural %cr3. + * When accessing %cr3, or equivalent field in vcpu_guest_context, guests + * must use the following accessor macros to pack/unpack valid MFNs. + */ +#define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20)) +#define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20)) + +struct arch_vcpu_info { + unsigned long cr2; + unsigned long pad[5]; /* sizeof(vcpu_info_t) == 64 */ +}; +typedef struct arch_vcpu_info arch_vcpu_info_t; + +struct xen_callback { + unsigned long cs; + unsigned long eip; +}; +typedef struct xen_callback xen_callback_t; + +#endif /* !__ASSEMBLY__ */ + +#endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_32_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/arch-x86/xen-x86_64.h b/qemu/roms/ipxe/src/include/xen/arch-x86/xen-x86_64.h new file mode 100644 index 000000000..0e9270221 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/arch-x86/xen-x86_64.h @@ -0,0 +1,204 @@ +/****************************************************************************** + * xen-x86_64.h + * + * Guest OS interface to x86 64-bit Xen. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2004-2006, K A Fraser + */ + +#ifndef __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ +#define __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ + +FILE_LICENCE ( MIT ); + +/* + * Hypercall interface: + * Input: %rdi, %rsi, %rdx, %r10, %r8, %r9 (arguments 1-6) + * Output: %rax + * Access is via hypercall page (set up by guest loader or via a Xen MSR): + * call hypercall_page + hypercall-number * 32 + * Clobbered: argument registers (e.g., 2-arg hypercall clobbers %rdi,%rsi) + */ + +/* + * 64-bit segment selectors + * These flat segments are in the Xen-private section of every GDT. Since these + * are also present in the initial GDT, many OSes will be able to avoid + * installing their own GDT. + */ + +#define FLAT_RING3_CS32 0xe023 /* GDT index 260 */ +#define FLAT_RING3_CS64 0xe033 /* GDT index 261 */ +#define FLAT_RING3_DS32 0xe02b /* GDT index 262 */ +#define FLAT_RING3_DS64 0x0000 /* NULL selector */ +#define FLAT_RING3_SS32 0xe02b /* GDT index 262 */ +#define FLAT_RING3_SS64 0xe02b /* GDT index 262 */ + +#define FLAT_KERNEL_DS64 FLAT_RING3_DS64 +#define FLAT_KERNEL_DS32 FLAT_RING3_DS32 +#define FLAT_KERNEL_DS FLAT_KERNEL_DS64 +#define FLAT_KERNEL_CS64 FLAT_RING3_CS64 +#define FLAT_KERNEL_CS32 FLAT_RING3_CS32 +#define FLAT_KERNEL_CS FLAT_KERNEL_CS64 +#define FLAT_KERNEL_SS64 FLAT_RING3_SS64 +#define FLAT_KERNEL_SS32 FLAT_RING3_SS32 +#define FLAT_KERNEL_SS FLAT_KERNEL_SS64 + +#define FLAT_USER_DS64 FLAT_RING3_DS64 +#define FLAT_USER_DS32 FLAT_RING3_DS32 +#define FLAT_USER_DS FLAT_USER_DS64 +#define FLAT_USER_CS64 FLAT_RING3_CS64 +#define FLAT_USER_CS32 FLAT_RING3_CS32 +#define FLAT_USER_CS FLAT_USER_CS64 +#define FLAT_USER_SS64 FLAT_RING3_SS64 +#define FLAT_USER_SS32 FLAT_RING3_SS32 +#define FLAT_USER_SS FLAT_USER_SS64 + +#define __HYPERVISOR_VIRT_START 0xFFFF800000000000 +#define __HYPERVISOR_VIRT_END 0xFFFF880000000000 +#define __MACH2PHYS_VIRT_START 0xFFFF800000000000 +#define __MACH2PHYS_VIRT_END 0xFFFF804000000000 + +#ifndef HYPERVISOR_VIRT_START +#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) +#define HYPERVISOR_VIRT_END mk_unsigned_long(__HYPERVISOR_VIRT_END) +#endif + +#define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) +#define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) +#define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3) +#ifndef machine_to_phys_mapping +#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) +#endif + +/* + * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base) + * @which == SEGBASE_* ; @base == 64-bit base address + * Returns 0 on success. + */ +#define SEGBASE_FS 0 +#define SEGBASE_GS_USER 1 +#define SEGBASE_GS_KERNEL 2 +#define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */ + +/* + * int HYPERVISOR_iret(void) + * All arguments are on the kernel stack, in the following format. + * Never returns if successful. Current kernel context is lost. + * The saved CS is mapped as follows: + * RING0 -> RING3 kernel mode. + * RING1 -> RING3 kernel mode. + * RING2 -> RING3 kernel mode. + * RING3 -> RING3 user mode. + * However RING0 indicates that the guest kernel should return to iteself + * directly with + * orb $3,1*8(%rsp) + * iretq + * If flags contains VGCF_in_syscall: + * Restore RAX, RIP, RFLAGS, RSP. + * Discard R11, RCX, CS, SS. + * Otherwise: + * Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP. + * All other registers are saved on hypercall entry and restored to user. + */ +/* Guest exited in SYSCALL context? Return to guest with SYSRET? */ +#define _VGCF_in_syscall 8 +#define VGCF_in_syscall (1<<_VGCF_in_syscall) +#define VGCF_IN_SYSCALL VGCF_in_syscall + +#ifndef __ASSEMBLY__ + +struct iret_context { + /* Top of stack (%rsp at point of hypercall). */ + uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss; + /* Bottom of iret stack frame. */ +}; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +/* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */ +#define __DECL_REG(name) union { \ + uint64_t r ## name, e ## name; \ + uint32_t _e ## name; \ +} +#else +/* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */ +#define __DECL_REG(name) uint64_t r ## name +#endif + +struct cpu_user_regs { + uint64_t r15; + uint64_t r14; + uint64_t r13; + uint64_t r12; + __DECL_REG(bp); + __DECL_REG(bx); + uint64_t r11; + uint64_t r10; + uint64_t r9; + uint64_t r8; + __DECL_REG(ax); + __DECL_REG(cx); + __DECL_REG(dx); + __DECL_REG(si); + __DECL_REG(di); + uint32_t error_code; /* private */ + uint32_t entry_vector; /* private */ + __DECL_REG(ip); + uint16_t cs, _pad0[1]; + uint8_t saved_upcall_mask; + uint8_t _pad1[3]; + __DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */ + __DECL_REG(sp); + uint16_t ss, _pad2[3]; + uint16_t es, _pad3[3]; + uint16_t ds, _pad4[3]; + uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */ + uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */ +}; +typedef struct cpu_user_regs cpu_user_regs_t; +DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t); + +#undef __DECL_REG + +#define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12) +#define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12) + +struct arch_vcpu_info { + unsigned long cr2; + unsigned long pad; /* sizeof(vcpu_info_t) == 64 */ +}; +typedef struct arch_vcpu_info arch_vcpu_info_t; + +typedef unsigned long xen_callback_t; + +#endif /* !__ASSEMBLY__ */ + +#endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/arch-x86/xen.h b/qemu/roms/ipxe/src/include/xen/arch-x86/xen.h new file mode 100644 index 000000000..d75528f04 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/arch-x86/xen.h @@ -0,0 +1,275 @@ +/****************************************************************************** + * arch-x86/xen.h + * + * Guest OS interface to x86 Xen. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2004-2006, K A Fraser + */ + +#include "../xen.h" + +#ifndef __XEN_PUBLIC_ARCH_X86_XEN_H__ +#define __XEN_PUBLIC_ARCH_X86_XEN_H__ + +FILE_LICENCE ( MIT ); + +/* Structural guest handles introduced in 0x00030201. */ +#if __XEN_INTERFACE_VERSION__ >= 0x00030201 +#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ + typedef struct { type *p; } __guest_handle_ ## name +#else +#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ + typedef type * __guest_handle_ ## name +#endif + +/* + * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field + * in a struct in memory. + * XEN_GUEST_HANDLE_PARAM represent a guest pointer, when passed as an + * hypercall argument. + * XEN_GUEST_HANDLE_PARAM and XEN_GUEST_HANDLE are the same on X86 but + * they might not be on other architectures. + */ +#define __DEFINE_XEN_GUEST_HANDLE(name, type) \ + ___DEFINE_XEN_GUEST_HANDLE(name, type); \ + ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) +#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) +#define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name +#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) +#define XEN_GUEST_HANDLE_PARAM(name) XEN_GUEST_HANDLE(name) +#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0) +#ifdef __XEN_TOOLS__ +#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0) +#endif +#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) + +#if defined(__i386__) +#include "xen-x86_32.h" +#elif defined(__x86_64__) +#include "xen-x86_64.h" +#endif + +#ifndef __ASSEMBLY__ +typedef unsigned long xen_pfn_t; +#define PRI_xen_pfn "lx" +#endif + +#define XEN_HAVE_PV_GUEST_ENTRY 1 + +#define XEN_HAVE_PV_UPCALL_MASK 1 + +/* + * `incontents 200 segdesc Segment Descriptor Tables + */ +/* + * ` enum neg_errnoval + * ` HYPERVISOR_set_gdt(const xen_pfn_t frames[], unsigned int entries); + * ` + */ +/* + * A number of GDT entries are reserved by Xen. These are not situated at the + * start of the GDT because some stupid OSes export hard-coded selector values + * in their ABI. These hard-coded values are always near the start of the GDT, + * so Xen places itself out of the way, at the far end of the GDT. + * + * NB The LDT is set using the MMUEXT_SET_LDT op of HYPERVISOR_mmuext_op + */ +#define FIRST_RESERVED_GDT_PAGE 14 +#define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096) +#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) + + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_update_descriptor(u64 pa, u64 desc); + * ` + * ` @pa The machine physical address of the descriptor to + * ` update. Must be either a descriptor page or writable. + * ` @desc The descriptor value to update, in the same format as a + * ` native descriptor table entry. + */ + +/* Maximum number of virtual CPUs in legacy multi-processor guests. */ +#define XEN_LEGACY_MAX_VCPUS 32 + +#ifndef __ASSEMBLY__ + +typedef unsigned long xen_ulong_t; +#define PRI_xen_ulong "lx" + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp); + * ` + * Sets the stack segment and pointer for the current vcpu. + */ + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_set_trap_table(const struct trap_info traps[]); + * ` + */ +/* + * Send an array of these to HYPERVISOR_set_trap_table(). + * Terminate the array with a sentinel entry, with traps[].address==0. + * The privilege level specifies which modes may enter a trap via a software + * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate + * privilege levels as follows: + * Level == 0: Noone may enter + * Level == 1: Kernel may enter + * Level == 2: Kernel may enter + * Level == 3: Everyone may enter + */ +#define TI_GET_DPL(_ti) ((_ti)->flags & 3) +#define TI_GET_IF(_ti) ((_ti)->flags & 4) +#define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl)) +#define TI_SET_IF(_ti,_if) ((_ti)->flags |= ((!!(_if))<<2)) +struct trap_info { + uint8_t vector; /* exception vector */ + uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ + uint16_t cs; /* code selector */ + unsigned long address; /* code offset */ +}; +typedef struct trap_info trap_info_t; +DEFINE_XEN_GUEST_HANDLE(trap_info_t); + +typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ + +/* + * The following is all CPU context. Note that the fpu_ctxt block is filled + * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. + * + * Also note that when calling DOMCTL_setvcpucontext and VCPU_initialise + * for HVM and PVH guests, not all information in this structure is updated: + * + * - For HVM guests, the structures read include: fpu_ctxt (if + * VGCT_I387_VALID is set), flags, user_regs, debugreg[*] + * + * - PVH guests are the same as HVM guests, but additionally use ctrlreg[3] to + * set cr3. All other fields not used should be set to 0. + */ +struct vcpu_guest_context { + /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */ + struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */ +#define VGCF_I387_VALID (1<<0) +#define VGCF_IN_KERNEL (1<<2) +#define _VGCF_i387_valid 0 +#define VGCF_i387_valid (1<<_VGCF_i387_valid) +#define _VGCF_in_kernel 2 +#define VGCF_in_kernel (1<<_VGCF_in_kernel) +#define _VGCF_failsafe_disables_events 3 +#define VGCF_failsafe_disables_events (1<<_VGCF_failsafe_disables_events) +#define _VGCF_syscall_disables_events 4 +#define VGCF_syscall_disables_events (1<<_VGCF_syscall_disables_events) +#define _VGCF_online 5 +#define VGCF_online (1<<_VGCF_online) + unsigned long flags; /* VGCF_* flags */ + struct cpu_user_regs user_regs; /* User-level CPU registers */ + struct trap_info trap_ctxt[256]; /* Virtual IDT */ + unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ + unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ + unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ + /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */ + unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ + unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ +#ifdef __i386__ + unsigned long event_callback_cs; /* CS:EIP of event callback */ + unsigned long event_callback_eip; + unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ + unsigned long failsafe_callback_eip; +#else + unsigned long event_callback_eip; + unsigned long failsafe_callback_eip; +#ifdef __XEN__ + union { + unsigned long syscall_callback_eip; + struct { + unsigned int event_callback_cs; /* compat CS of event cb */ + unsigned int failsafe_callback_cs; /* compat CS of failsafe cb */ + }; + }; +#else + unsigned long syscall_callback_eip; +#endif +#endif + unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ +#ifdef __x86_64__ + /* Segment base addresses. */ + uint64_t fs_base; + uint64_t gs_base_kernel; + uint64_t gs_base_user; +#endif +}; +typedef struct vcpu_guest_context vcpu_guest_context_t; +DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); + +struct arch_shared_info { + unsigned long max_pfn; /* max pfn that appears in table */ + /* Frame containing list of mfns containing list of mfns containing p2m. */ + xen_pfn_t pfn_to_mfn_frame_list_list; + unsigned long nmi_reason; + uint64_t pad[32]; +}; +typedef struct arch_shared_info arch_shared_info_t; + +#endif /* !__ASSEMBLY__ */ + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_fpu_taskswitch(int set); + * ` + * Sets (if set!=0) or clears (if set==0) CR0.TS. + */ + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_set_debugreg(int regno, unsigned long value); + * + * ` unsigned long + * ` HYPERVISOR_get_debugreg(int regno); + * For 0<=reg<=7, returns the debug register value. + * For other values of reg, returns ((unsigned long)-EINVAL). + * (Unfortunately, this interface is defective.) + */ + +/* + * Prefix forces emulation of some non-trapping instructions. + * Currently only CPUID. + */ +#ifdef __ASSEMBLY__ +#define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ; +#define XEN_CPUID XEN_EMULATE_PREFIX cpuid +#else +#define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; " +#define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" +#endif + +#endif /* __XEN_PUBLIC_ARCH_X86_XEN_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/event_channel.h b/qemu/roms/ipxe/src/include/xen/event_channel.h new file mode 100644 index 000000000..356e946d7 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/event_channel.h @@ -0,0 +1,383 @@ +/****************************************************************************** + * event_channel.h + * + * Event channels between domains. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2003-2004, K A Fraser. + */ + +#ifndef __XEN_PUBLIC_EVENT_CHANNEL_H__ +#define __XEN_PUBLIC_EVENT_CHANNEL_H__ + +FILE_LICENCE ( MIT ); + +#include "xen.h" + +/* + * `incontents 150 evtchn Event Channels + * + * Event channels are the basic primitive provided by Xen for event + * notifications. An event is the Xen equivalent of a hardware + * interrupt. They essentially store one bit of information, the event + * of interest is signalled by transitioning this bit from 0 to 1. + * + * Notifications are received by a guest via an upcall from Xen, + * indicating when an event arrives (setting the bit). Further + * notifications are masked until the bit is cleared again (therefore, + * guests must check the value of the bit after re-enabling event + * delivery to ensure no missed notifications). + * + * Event notifications can be masked by setting a flag; this is + * equivalent to disabling interrupts and can be used to ensure + * atomicity of certain operations in the guest kernel. + * + * Event channels are represented by the evtchn_* fields in + * struct shared_info and struct vcpu_info. + */ + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_event_channel_op(enum event_channel_op cmd, void *args) + * ` + * @cmd == EVTCHNOP_* (event-channel operation). + * @args == struct evtchn_* Operation-specific extra arguments (NULL if none). + */ + +/* ` enum event_channel_op { // EVTCHNOP_* => struct evtchn_* */ +#define EVTCHNOP_bind_interdomain 0 +#define EVTCHNOP_bind_virq 1 +#define EVTCHNOP_bind_pirq 2 +#define EVTCHNOP_close 3 +#define EVTCHNOP_send 4 +#define EVTCHNOP_status 5 +#define EVTCHNOP_alloc_unbound 6 +#define EVTCHNOP_bind_ipi 7 +#define EVTCHNOP_bind_vcpu 8 +#define EVTCHNOP_unmask 9 +#define EVTCHNOP_reset 10 +#define EVTCHNOP_init_control 11 +#define EVTCHNOP_expand_array 12 +#define EVTCHNOP_set_priority 13 +/* ` } */ + +typedef uint32_t evtchn_port_t; +DEFINE_XEN_GUEST_HANDLE(evtchn_port_t); + +/* + * EVTCHNOP_alloc_unbound: Allocate a port in domain <dom> and mark as + * accepting interdomain bindings from domain <remote_dom>. A fresh port + * is allocated in <dom> and returned as <port>. + * NOTES: + * 1. If the caller is unprivileged then <dom> must be DOMID_SELF. + * 2. <rdom> may be DOMID_SELF, allowing loopback connections. + */ +struct evtchn_alloc_unbound { + /* IN parameters */ + domid_t dom, remote_dom; + /* OUT parameters */ + evtchn_port_t port; +}; +typedef struct evtchn_alloc_unbound evtchn_alloc_unbound_t; + +/* + * EVTCHNOP_bind_interdomain: Construct an interdomain event channel between + * the calling domain and <remote_dom>. <remote_dom,remote_port> must identify + * a port that is unbound and marked as accepting bindings from the calling + * domain. A fresh port is allocated in the calling domain and returned as + * <local_port>. + * + * In case the peer domain has already tried to set our event channel + * pending, before it was bound, EVTCHNOP_bind_interdomain always sets + * the local event channel pending. + * + * The usual pattern of use, in the guest's upcall (or subsequent + * handler) is as follows: (Re-enable the event channel for subsequent + * signalling and then) check for the existence of whatever condition + * is being waited for by other means, and take whatever action is + * needed (if any). + * + * NOTES: + * 1. <remote_dom> may be DOMID_SELF, allowing loopback connections. + */ +struct evtchn_bind_interdomain { + /* IN parameters. */ + domid_t remote_dom; + evtchn_port_t remote_port; + /* OUT parameters. */ + evtchn_port_t local_port; +}; +typedef struct evtchn_bind_interdomain evtchn_bind_interdomain_t; + +/* + * EVTCHNOP_bind_virq: Bind a local event channel to VIRQ <irq> on specified + * vcpu. + * NOTES: + * 1. Virtual IRQs are classified as per-vcpu or global. See the VIRQ list + * in xen.h for the classification of each VIRQ. + * 2. Global VIRQs must be allocated on VCPU0 but can subsequently be + * re-bound via EVTCHNOP_bind_vcpu. + * 3. Per-vcpu VIRQs may be bound to at most one event channel per vcpu. + * The allocated event channel is bound to the specified vcpu and the + * binding cannot be changed. + */ +struct evtchn_bind_virq { + /* IN parameters. */ + uint32_t virq; /* enum virq */ + uint32_t vcpu; + /* OUT parameters. */ + evtchn_port_t port; +}; +typedef struct evtchn_bind_virq evtchn_bind_virq_t; + +/* + * EVTCHNOP_bind_pirq: Bind a local event channel to a real IRQ (PIRQ <irq>). + * NOTES: + * 1. A physical IRQ may be bound to at most one event channel per domain. + * 2. Only a sufficiently-privileged domain may bind to a physical IRQ. + */ +struct evtchn_bind_pirq { + /* IN parameters. */ + uint32_t pirq; +#define BIND_PIRQ__WILL_SHARE 1 + uint32_t flags; /* BIND_PIRQ__* */ + /* OUT parameters. */ + evtchn_port_t port; +}; +typedef struct evtchn_bind_pirq evtchn_bind_pirq_t; + +/* + * EVTCHNOP_bind_ipi: Bind a local event channel to receive events. + * NOTES: + * 1. The allocated event channel is bound to the specified vcpu. The binding + * may not be changed. + */ +struct evtchn_bind_ipi { + uint32_t vcpu; + /* OUT parameters. */ + evtchn_port_t port; +}; +typedef struct evtchn_bind_ipi evtchn_bind_ipi_t; + +/* + * EVTCHNOP_close: Close a local event channel <port>. If the channel is + * interdomain then the remote end is placed in the unbound state + * (EVTCHNSTAT_unbound), awaiting a new connection. + */ +struct evtchn_close { + /* IN parameters. */ + evtchn_port_t port; +}; +typedef struct evtchn_close evtchn_close_t; + +/* + * EVTCHNOP_send: Send an event to the remote end of the channel whose local + * endpoint is <port>. + */ +struct evtchn_send { + /* IN parameters. */ + evtchn_port_t port; +}; +typedef struct evtchn_send evtchn_send_t; + +/* + * EVTCHNOP_status: Get the current status of the communication channel which + * has an endpoint at <dom, port>. + * NOTES: + * 1. <dom> may be specified as DOMID_SELF. + * 2. Only a sufficiently-privileged domain may obtain the status of an event + * channel for which <dom> is not DOMID_SELF. + */ +struct evtchn_status { + /* IN parameters */ + domid_t dom; + evtchn_port_t port; + /* OUT parameters */ +#define EVTCHNSTAT_closed 0 /* Channel is not in use. */ +#define EVTCHNSTAT_unbound 1 /* Channel is waiting interdom connection.*/ +#define EVTCHNSTAT_interdomain 2 /* Channel is connected to remote domain. */ +#define EVTCHNSTAT_pirq 3 /* Channel is bound to a phys IRQ line. */ +#define EVTCHNSTAT_virq 4 /* Channel is bound to a virtual IRQ line */ +#define EVTCHNSTAT_ipi 5 /* Channel is bound to a virtual IPI line */ + uint32_t status; + uint32_t vcpu; /* VCPU to which this channel is bound. */ + union { + struct { + domid_t dom; + } unbound; /* EVTCHNSTAT_unbound */ + struct { + domid_t dom; + evtchn_port_t port; + } interdomain; /* EVTCHNSTAT_interdomain */ + uint32_t pirq; /* EVTCHNSTAT_pirq */ + uint32_t virq; /* EVTCHNSTAT_virq */ + } u; +}; +typedef struct evtchn_status evtchn_status_t; + +/* + * EVTCHNOP_bind_vcpu: Specify which vcpu a channel should notify when an + * event is pending. + * NOTES: + * 1. IPI-bound channels always notify the vcpu specified at bind time. + * This binding cannot be changed. + * 2. Per-VCPU VIRQ channels always notify the vcpu specified at bind time. + * This binding cannot be changed. + * 3. All other channels notify vcpu0 by default. This default is set when + * the channel is allocated (a port that is freed and subsequently reused + * has its binding reset to vcpu0). + */ +struct evtchn_bind_vcpu { + /* IN parameters. */ + evtchn_port_t port; + uint32_t vcpu; +}; +typedef struct evtchn_bind_vcpu evtchn_bind_vcpu_t; + +/* + * EVTCHNOP_unmask: Unmask the specified local event-channel port and deliver + * a notification to the appropriate VCPU if an event is pending. + */ +struct evtchn_unmask { + /* IN parameters. */ + evtchn_port_t port; +}; +typedef struct evtchn_unmask evtchn_unmask_t; + +/* + * EVTCHNOP_reset: Close all event channels associated with specified domain. + * NOTES: + * 1. <dom> may be specified as DOMID_SELF. + * 2. Only a sufficiently-privileged domain may specify other than DOMID_SELF. + */ +struct evtchn_reset { + /* IN parameters. */ + domid_t dom; +}; +typedef struct evtchn_reset evtchn_reset_t; + +/* + * EVTCHNOP_init_control: initialize the control block for the FIFO ABI. + * + * Note: any events that are currently pending will not be resent and + * will be lost. Guests should call this before binding any event to + * avoid losing any events. + */ +struct evtchn_init_control { + /* IN parameters. */ + uint64_t control_gfn; + uint32_t offset; + uint32_t vcpu; + /* OUT parameters. */ + uint8_t link_bits; + uint8_t _pad[7]; +}; +typedef struct evtchn_init_control evtchn_init_control_t; + +/* + * EVTCHNOP_expand_array: add an additional page to the event array. + */ +struct evtchn_expand_array { + /* IN parameters. */ + uint64_t array_gfn; +}; +typedef struct evtchn_expand_array evtchn_expand_array_t; + +/* + * EVTCHNOP_set_priority: set the priority for an event channel. + */ +struct evtchn_set_priority { + /* IN parameters. */ + uint32_t port; + uint32_t priority; +}; +typedef struct evtchn_set_priority evtchn_set_priority_t; + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_event_channel_op_compat(struct evtchn_op *op) + * ` + * Superceded by new event_channel_op() hypercall since 0x00030202. + */ +struct evtchn_op { + uint32_t cmd; /* enum event_channel_op */ + union { + struct evtchn_alloc_unbound alloc_unbound; + struct evtchn_bind_interdomain bind_interdomain; + struct evtchn_bind_virq bind_virq; + struct evtchn_bind_pirq bind_pirq; + struct evtchn_bind_ipi bind_ipi; + struct evtchn_close close; + struct evtchn_send send; + struct evtchn_status status; + struct evtchn_bind_vcpu bind_vcpu; + struct evtchn_unmask unmask; + } u; +}; +typedef struct evtchn_op evtchn_op_t; +DEFINE_XEN_GUEST_HANDLE(evtchn_op_t); + +/* + * 2-level ABI + */ + +#define EVTCHN_2L_NR_CHANNELS (sizeof(xen_ulong_t) * sizeof(xen_ulong_t) * 64) + +/* + * FIFO ABI + */ + +/* Events may have priorities from 0 (highest) to 15 (lowest). */ +#define EVTCHN_FIFO_PRIORITY_MAX 0 +#define EVTCHN_FIFO_PRIORITY_DEFAULT 7 +#define EVTCHN_FIFO_PRIORITY_MIN 15 + +#define EVTCHN_FIFO_MAX_QUEUES (EVTCHN_FIFO_PRIORITY_MIN + 1) + +typedef uint32_t event_word_t; + +#define EVTCHN_FIFO_PENDING 31 +#define EVTCHN_FIFO_MASKED 30 +#define EVTCHN_FIFO_LINKED 29 +#define EVTCHN_FIFO_BUSY 28 + +#define EVTCHN_FIFO_LINK_BITS 17 +#define EVTCHN_FIFO_LINK_MASK ((1 << EVTCHN_FIFO_LINK_BITS) - 1) + +#define EVTCHN_FIFO_NR_CHANNELS (1 << EVTCHN_FIFO_LINK_BITS) + +struct evtchn_fifo_control_block { + uint32_t ready; + uint32_t _rsvd; + uint32_t head[EVTCHN_FIFO_MAX_QUEUES]; +}; +typedef struct evtchn_fifo_control_block evtchn_fifo_control_block_t; + +#endif /* __XEN_PUBLIC_EVENT_CHANNEL_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/features.h b/qemu/roms/ipxe/src/include/xen/features.h new file mode 100644 index 000000000..130265819 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/features.h @@ -0,0 +1,111 @@ +/****************************************************************************** + * features.h + * + * Feature flags, reported by XENVER_get_features. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2006, Keir Fraser <keir@xensource.com> + */ + +#ifndef __XEN_PUBLIC_FEATURES_H__ +#define __XEN_PUBLIC_FEATURES_H__ + +FILE_LICENCE ( MIT ); + +/* + * `incontents 200 elfnotes_features XEN_ELFNOTE_FEATURES + * + * The list of all the features the guest supports. They are set by + * parsing the XEN_ELFNOTE_FEATURES and XEN_ELFNOTE_SUPPORTED_FEATURES + * string. The format is the feature names (as given here without the + * "XENFEAT_" prefix) separated by '|' characters. + * If a feature is required for the kernel to function then the feature name + * must be preceded by a '!' character. + * + * Note that if XEN_ELFNOTE_SUPPORTED_FEATURES is used, then in the + * XENFEAT_dom0 MUST be set if the guest is to be booted as dom0, + */ + +/* + * If set, the guest does not need to write-protect its pagetables, and can + * update them via direct writes. + */ +#define XENFEAT_writable_page_tables 0 + +/* + * If set, the guest does not need to write-protect its segment descriptor + * tables, and can update them via direct writes. + */ +#define XENFEAT_writable_descriptor_tables 1 + +/* + * If set, translation between the guest's 'pseudo-physical' address space + * and the host's machine address space are handled by the hypervisor. In this + * mode the guest does not need to perform phys-to/from-machine translations + * when performing page table operations. + */ +#define XENFEAT_auto_translated_physmap 2 + +/* If set, the guest is running in supervisor mode (e.g., x86 ring 0). */ +#define XENFEAT_supervisor_mode_kernel 3 + +/* + * If set, the guest does not need to allocate x86 PAE page directories + * below 4GB. This flag is usually implied by auto_translated_physmap. + */ +#define XENFEAT_pae_pgdir_above_4gb 4 + +/* x86: Does this Xen host support the MMU_PT_UPDATE_PRESERVE_AD hypercall? */ +#define XENFEAT_mmu_pt_update_preserve_ad 5 + +/* x86: Does this Xen host support the MMU_{CLEAR,COPY}_PAGE hypercall? */ +#define XENFEAT_highmem_assist 6 + +/* + * If set, GNTTABOP_map_grant_ref honors flags to be placed into guest kernel + * available pte bits. + */ +#define XENFEAT_gnttab_map_avail_bits 7 + +/* x86: Does this Xen host support the HVM callback vector type? */ +#define XENFEAT_hvm_callback_vector 8 + +/* x86: pvclock algorithm is safe to use on HVM */ +#define XENFEAT_hvm_safe_pvclock 9 + +/* x86: pirq can be used by HVM guests */ +#define XENFEAT_hvm_pirqs 10 + +/* operation as Dom0 is supported */ +#define XENFEAT_dom0 11 + +#define XENFEAT_NR_SUBMAPS 1 + +#endif /* __XEN_PUBLIC_FEATURES_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/grant_table.h b/qemu/roms/ipxe/src/include/xen/grant_table.h new file mode 100644 index 000000000..137939e70 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/grant_table.h @@ -0,0 +1,664 @@ +/****************************************************************************** + * grant_table.h + * + * Interface for granting foreign access to page frames, and receiving + * page-ownership transfers. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2004, K A Fraser + */ + +#ifndef __XEN_PUBLIC_GRANT_TABLE_H__ +#define __XEN_PUBLIC_GRANT_TABLE_H__ + +FILE_LICENCE ( MIT ); + +#include "xen.h" + +/* + * `incontents 150 gnttab Grant Tables + * + * Xen's grant tables provide a generic mechanism to memory sharing + * between domains. This shared memory interface underpins the split + * device drivers for block and network IO. + * + * Each domain has its own grant table. This is a data structure that + * is shared with Xen; it allows the domain to tell Xen what kind of + * permissions other domains have on its pages. Entries in the grant + * table are identified by grant references. A grant reference is an + * integer, which indexes into the grant table. It acts as a + * capability which the grantee can use to perform operations on the + * granter’s memory. + * + * This capability-based system allows shared-memory communications + * between unprivileged domains. A grant reference also encapsulates + * the details of a shared page, removing the need for a domain to + * know the real machine address of a page it is sharing. This makes + * it possible to share memory correctly with domains running in + * fully virtualised memory. + */ + +/*********************************** + * GRANT TABLE REPRESENTATION + */ + +/* Some rough guidelines on accessing and updating grant-table entries + * in a concurrency-safe manner. For more information, Linux contains a + * reference implementation for guest OSes (drivers/xen/grant_table.c, see + * http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=drivers/xen/grant-table.c;hb=HEAD + * + * NB. WMB is a no-op on current-generation x86 processors. However, a + * compiler barrier will still be required. + * + * Introducing a valid entry into the grant table: + * 1. Write ent->domid. + * 2. Write ent->frame: + * GTF_permit_access: Frame to which access is permitted. + * GTF_accept_transfer: Pseudo-phys frame slot being filled by new + * frame, or zero if none. + * 3. Write memory barrier (WMB). + * 4. Write ent->flags, inc. valid type. + * + * Invalidating an unused GTF_permit_access entry: + * 1. flags = ent->flags. + * 2. Observe that !(flags & (GTF_reading|GTF_writing)). + * 3. Check result of SMP-safe CMPXCHG(&ent->flags, flags, 0). + * NB. No need for WMB as reuse of entry is control-dependent on success of + * step 3, and all architectures guarantee ordering of ctrl-dep writes. + * + * Invalidating an in-use GTF_permit_access entry: + * This cannot be done directly. Request assistance from the domain controller + * which can set a timeout on the use of a grant entry and take necessary + * action. (NB. This is not yet implemented!). + * + * Invalidating an unused GTF_accept_transfer entry: + * 1. flags = ent->flags. + * 2. Observe that !(flags & GTF_transfer_committed). [*] + * 3. Check result of SMP-safe CMPXCHG(&ent->flags, flags, 0). + * NB. No need for WMB as reuse of entry is control-dependent on success of + * step 3, and all architectures guarantee ordering of ctrl-dep writes. + * [*] If GTF_transfer_committed is set then the grant entry is 'committed'. + * The guest must /not/ modify the grant entry until the address of the + * transferred frame is written. It is safe for the guest to spin waiting + * for this to occur (detect by observing GTF_transfer_completed in + * ent->flags). + * + * Invalidating a committed GTF_accept_transfer entry: + * 1. Wait for (ent->flags & GTF_transfer_completed). + * + * Changing a GTF_permit_access from writable to read-only: + * Use SMP-safe CMPXCHG to set GTF_readonly, while checking !GTF_writing. + * + * Changing a GTF_permit_access from read-only to writable: + * Use SMP-safe bit-setting instruction. + */ + +/* + * Reference to a grant entry in a specified domain's grant table. + */ +typedef uint32_t grant_ref_t; + +/* + * A grant table comprises a packed array of grant entries in one or more + * page frames shared between Xen and a guest. + * [XEN]: This field is written by Xen and read by the sharing guest. + * [GST]: This field is written by the guest and read by Xen. + */ + +/* + * Version 1 of the grant table entry structure is maintained purely + * for backwards compatibility. New guests should use version 2. + */ +#if __XEN_INTERFACE_VERSION__ < 0x0003020a +#define grant_entry_v1 grant_entry +#define grant_entry_v1_t grant_entry_t +#endif +struct grant_entry_v1 { + /* GTF_xxx: various type and flag information. [XEN,GST] */ + uint16_t flags; + /* The domain being granted foreign privileges. [GST] */ + domid_t domid; + /* + * GTF_permit_access: Frame that @domid is allowed to map and access. [GST] + * GTF_accept_transfer: Frame whose ownership transferred by @domid. [XEN] + */ + uint32_t frame; +}; +typedef struct grant_entry_v1 grant_entry_v1_t; + +/* The first few grant table entries will be preserved across grant table + * version changes and may be pre-populated at domain creation by tools. + */ +#define GNTTAB_NR_RESERVED_ENTRIES 8 +#define GNTTAB_RESERVED_CONSOLE 0 +#define GNTTAB_RESERVED_XENSTORE 1 + +/* + * Type of grant entry. + * GTF_invalid: This grant entry grants no privileges. + * GTF_permit_access: Allow @domid to map/access @frame. + * GTF_accept_transfer: Allow @domid to transfer ownership of one page frame + * to this guest. Xen writes the page number to @frame. + * GTF_transitive: Allow @domid to transitively access a subrange of + * @trans_grant in @trans_domid. No mappings are allowed. + */ +#define GTF_invalid (0U<<0) +#define GTF_permit_access (1U<<0) +#define GTF_accept_transfer (2U<<0) +#define GTF_transitive (3U<<0) +#define GTF_type_mask (3U<<0) + +/* + * Subflags for GTF_permit_access. + * GTF_readonly: Restrict @domid to read-only mappings and accesses. [GST] + * GTF_reading: Grant entry is currently mapped for reading by @domid. [XEN] + * GTF_writing: Grant entry is currently mapped for writing by @domid. [XEN] + * GTF_PAT, GTF_PWT, GTF_PCD: (x86) cache attribute flags for the grant [GST] + * GTF_sub_page: Grant access to only a subrange of the page. @domid + * will only be allowed to copy from the grant, and not + * map it. [GST] + */ +#define _GTF_readonly (2) +#define GTF_readonly (1U<<_GTF_readonly) +#define _GTF_reading (3) +#define GTF_reading (1U<<_GTF_reading) +#define _GTF_writing (4) +#define GTF_writing (1U<<_GTF_writing) +#define _GTF_PWT (5) +#define GTF_PWT (1U<<_GTF_PWT) +#define _GTF_PCD (6) +#define GTF_PCD (1U<<_GTF_PCD) +#define _GTF_PAT (7) +#define GTF_PAT (1U<<_GTF_PAT) +#define _GTF_sub_page (8) +#define GTF_sub_page (1U<<_GTF_sub_page) + +/* + * Subflags for GTF_accept_transfer: + * GTF_transfer_committed: Xen sets this flag to indicate that it is committed + * to transferring ownership of a page frame. When a guest sees this flag + * it must /not/ modify the grant entry until GTF_transfer_completed is + * set by Xen. + * GTF_transfer_completed: It is safe for the guest to spin-wait on this flag + * after reading GTF_transfer_committed. Xen will always write the frame + * address, followed by ORing this flag, in a timely manner. + */ +#define _GTF_transfer_committed (2) +#define GTF_transfer_committed (1U<<_GTF_transfer_committed) +#define _GTF_transfer_completed (3) +#define GTF_transfer_completed (1U<<_GTF_transfer_completed) + +/* + * Version 2 grant table entries. These fulfil the same role as + * version 1 entries, but can represent more complicated operations. + * Any given domain will have either a version 1 or a version 2 table, + * and every entry in the table will be the same version. + * + * The interface by which domains use grant references does not depend + * on the grant table version in use by the other domain. + */ +#if __XEN_INTERFACE_VERSION__ >= 0x0003020a +/* + * Version 1 and version 2 grant entries share a common prefix. The + * fields of the prefix are documented as part of struct + * grant_entry_v1. + */ +struct grant_entry_header { + uint16_t flags; + domid_t domid; +}; +typedef struct grant_entry_header grant_entry_header_t; + +/* + * Version 2 of the grant entry structure. + */ +union grant_entry_v2 { + grant_entry_header_t hdr; + + /* + * This member is used for V1-style full page grants, where either: + * + * -- hdr.type is GTF_accept_transfer, or + * -- hdr.type is GTF_permit_access and GTF_sub_page is not set. + * + * In that case, the frame field has the same semantics as the + * field of the same name in the V1 entry structure. + */ + struct { + grant_entry_header_t hdr; + uint32_t pad0; + uint64_t frame; + } full_page; + + /* + * If the grant type is GTF_grant_access and GTF_sub_page is set, + * @domid is allowed to access bytes [@page_off,@page_off+@length) + * in frame @frame. + */ + struct { + grant_entry_header_t hdr; + uint16_t page_off; + uint16_t length; + uint64_t frame; + } sub_page; + + /* + * If the grant is GTF_transitive, @domid is allowed to use the + * grant @gref in domain @trans_domid, as if it was the local + * domain. Obviously, the transitive access must be compatible + * with the original grant. + * + * The current version of Xen does not allow transitive grants + * to be mapped. + */ + struct { + grant_entry_header_t hdr; + domid_t trans_domid; + uint16_t pad0; + grant_ref_t gref; + } transitive; + + uint32_t __spacer[4]; /* Pad to a power of two */ +}; +typedef union grant_entry_v2 grant_entry_v2_t; + +typedef uint16_t grant_status_t; + +#endif /* __XEN_INTERFACE_VERSION__ */ + +/*********************************** + * GRANT TABLE QUERIES AND USES + */ + +/* ` enum neg_errnoval + * ` HYPERVISOR_grant_table_op(enum grant_table_op cmd, + * ` void *args, + * ` unsigned int count) + * ` + * + * @args points to an array of a per-command data structure. The array + * has @count members + */ + +/* ` enum grant_table_op { // GNTTABOP_* => struct gnttab_* */ +#define GNTTABOP_map_grant_ref 0 +#define GNTTABOP_unmap_grant_ref 1 +#define GNTTABOP_setup_table 2 +#define GNTTABOP_dump_table 3 +#define GNTTABOP_transfer 4 +#define GNTTABOP_copy 5 +#define GNTTABOP_query_size 6 +#define GNTTABOP_unmap_and_replace 7 +#if __XEN_INTERFACE_VERSION__ >= 0x0003020a +#define GNTTABOP_set_version 8 +#define GNTTABOP_get_status_frames 9 +#define GNTTABOP_get_version 10 +#define GNTTABOP_swap_grant_ref 11 +#endif /* __XEN_INTERFACE_VERSION__ */ +/* ` } */ + +/* + * Handle to track a mapping created via a grant reference. + */ +typedef uint32_t grant_handle_t; + +/* + * GNTTABOP_map_grant_ref: Map the grant entry (<dom>,<ref>) for access + * by devices and/or host CPUs. If successful, <handle> is a tracking number + * that must be presented later to destroy the mapping(s). On error, <handle> + * is a negative status code. + * NOTES: + * 1. If GNTMAP_device_map is specified then <dev_bus_addr> is the address + * via which I/O devices may access the granted frame. + * 2. If GNTMAP_host_map is specified then a mapping will be added at + * either a host virtual address in the current address space, or at + * a PTE at the specified machine address. The type of mapping to + * perform is selected through the GNTMAP_contains_pte flag, and the + * address is specified in <host_addr>. + * 3. Mappings should only be destroyed via GNTTABOP_unmap_grant_ref. If a + * host mapping is destroyed by other means then it is *NOT* guaranteed + * to be accounted to the correct grant reference! + */ +struct gnttab_map_grant_ref { + /* IN parameters. */ + uint64_t host_addr; + uint32_t flags; /* GNTMAP_* */ + grant_ref_t ref; + domid_t dom; + /* OUT parameters. */ + int16_t status; /* => enum grant_status */ + grant_handle_t handle; + uint64_t dev_bus_addr; +}; +typedef struct gnttab_map_grant_ref gnttab_map_grant_ref_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_map_grant_ref_t); + +/* + * GNTTABOP_unmap_grant_ref: Destroy one or more grant-reference mappings + * tracked by <handle>. If <host_addr> or <dev_bus_addr> is zero, that + * field is ignored. If non-zero, they must refer to a device/host mapping + * that is tracked by <handle> + * NOTES: + * 1. The call may fail in an undefined manner if either mapping is not + * tracked by <handle>. + * 3. After executing a batch of unmaps, it is guaranteed that no stale + * mappings will remain in the device or host TLBs. + */ +struct gnttab_unmap_grant_ref { + /* IN parameters. */ + uint64_t host_addr; + uint64_t dev_bus_addr; + grant_handle_t handle; + /* OUT parameters. */ + int16_t status; /* => enum grant_status */ +}; +typedef struct gnttab_unmap_grant_ref gnttab_unmap_grant_ref_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_unmap_grant_ref_t); + +/* + * GNTTABOP_setup_table: Set up a grant table for <dom> comprising at least + * <nr_frames> pages. The frame addresses are written to the <frame_list>. + * Only <nr_frames> addresses are written, even if the table is larger. + * NOTES: + * 1. <dom> may be specified as DOMID_SELF. + * 2. Only a sufficiently-privileged domain may specify <dom> != DOMID_SELF. + * 3. Xen may not support more than a single grant-table page per domain. + */ +struct gnttab_setup_table { + /* IN parameters. */ + domid_t dom; + uint32_t nr_frames; + /* OUT parameters. */ + int16_t status; /* => enum grant_status */ +#if __XEN_INTERFACE_VERSION__ < 0x00040300 + XEN_GUEST_HANDLE(ulong) frame_list; +#else + XEN_GUEST_HANDLE(xen_pfn_t) frame_list; +#endif +}; +typedef struct gnttab_setup_table gnttab_setup_table_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_setup_table_t); + +/* + * GNTTABOP_dump_table: Dump the contents of the grant table to the + * xen console. Debugging use only. + */ +struct gnttab_dump_table { + /* IN parameters. */ + domid_t dom; + /* OUT parameters. */ + int16_t status; /* => enum grant_status */ +}; +typedef struct gnttab_dump_table gnttab_dump_table_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_dump_table_t); + +/* + * GNTTABOP_transfer_grant_ref: Transfer <frame> to a foreign domain. The + * foreign domain has previously registered its interest in the transfer via + * <domid, ref>. + * + * Note that, even if the transfer fails, the specified page no longer belongs + * to the calling domain *unless* the error is GNTST_bad_page. + */ +struct gnttab_transfer { + /* IN parameters. */ + xen_pfn_t mfn; + domid_t domid; + grant_ref_t ref; + /* OUT parameters. */ + int16_t status; +}; +typedef struct gnttab_transfer gnttab_transfer_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_transfer_t); + + +/* + * GNTTABOP_copy: Hypervisor based copy + * source and destinations can be eithers MFNs or, for foreign domains, + * grant references. the foreign domain has to grant read/write access + * in its grant table. + * + * The flags specify what type source and destinations are (either MFN + * or grant reference). + * + * Note that this can also be used to copy data between two domains + * via a third party if the source and destination domains had previously + * grant appropriate access to their pages to the third party. + * + * source_offset specifies an offset in the source frame, dest_offset + * the offset in the target frame and len specifies the number of + * bytes to be copied. + */ + +#define _GNTCOPY_source_gref (0) +#define GNTCOPY_source_gref (1<<_GNTCOPY_source_gref) +#define _GNTCOPY_dest_gref (1) +#define GNTCOPY_dest_gref (1<<_GNTCOPY_dest_gref) + +struct gnttab_copy { + /* IN parameters. */ + struct { + union { + grant_ref_t ref; + xen_pfn_t gmfn; + } u; + domid_t domid; + uint16_t offset; + } source, dest; + uint16_t len; + uint16_t flags; /* GNTCOPY_* */ + /* OUT parameters. */ + int16_t status; +}; +typedef struct gnttab_copy gnttab_copy_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_copy_t); + +/* + * GNTTABOP_query_size: Query the current and maximum sizes of the shared + * grant table. + * NOTES: + * 1. <dom> may be specified as DOMID_SELF. + * 2. Only a sufficiently-privileged domain may specify <dom> != DOMID_SELF. + */ +struct gnttab_query_size { + /* IN parameters. */ + domid_t dom; + /* OUT parameters. */ + uint32_t nr_frames; + uint32_t max_nr_frames; + int16_t status; /* => enum grant_status */ +}; +typedef struct gnttab_query_size gnttab_query_size_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_query_size_t); + +/* + * GNTTABOP_unmap_and_replace: Destroy one or more grant-reference mappings + * tracked by <handle> but atomically replace the page table entry with one + * pointing to the machine address under <new_addr>. <new_addr> will be + * redirected to the null entry. + * NOTES: + * 1. The call may fail in an undefined manner if either mapping is not + * tracked by <handle>. + * 2. After executing a batch of unmaps, it is guaranteed that no stale + * mappings will remain in the device or host TLBs. + */ +struct gnttab_unmap_and_replace { + /* IN parameters. */ + uint64_t host_addr; + uint64_t new_addr; + grant_handle_t handle; + /* OUT parameters. */ + int16_t status; /* => enum grant_status */ +}; +typedef struct gnttab_unmap_and_replace gnttab_unmap_and_replace_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_unmap_and_replace_t); + +#if __XEN_INTERFACE_VERSION__ >= 0x0003020a +/* + * GNTTABOP_set_version: Request a particular version of the grant + * table shared table structure. This operation can only be performed + * once in any given domain. It must be performed before any grants + * are activated; otherwise, the domain will be stuck with version 1. + * The only defined versions are 1 and 2. + */ +struct gnttab_set_version { + /* IN/OUT parameters */ + uint32_t version; +}; +typedef struct gnttab_set_version gnttab_set_version_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_set_version_t); + + +/* + * GNTTABOP_get_status_frames: Get the list of frames used to store grant + * status for <dom>. In grant format version 2, the status is separated + * from the other shared grant fields to allow more efficient synchronization + * using barriers instead of atomic cmpexch operations. + * <nr_frames> specify the size of vector <frame_list>. + * The frame addresses are returned in the <frame_list>. + * Only <nr_frames> addresses are returned, even if the table is larger. + * NOTES: + * 1. <dom> may be specified as DOMID_SELF. + * 2. Only a sufficiently-privileged domain may specify <dom> != DOMID_SELF. + */ +struct gnttab_get_status_frames { + /* IN parameters. */ + uint32_t nr_frames; + domid_t dom; + /* OUT parameters. */ + int16_t status; /* => enum grant_status */ + XEN_GUEST_HANDLE(uint64_t) frame_list; +}; +typedef struct gnttab_get_status_frames gnttab_get_status_frames_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_get_status_frames_t); + +/* + * GNTTABOP_get_version: Get the grant table version which is in + * effect for domain <dom>. + */ +struct gnttab_get_version { + /* IN parameters */ + domid_t dom; + uint16_t pad; + /* OUT parameters */ + uint32_t version; +}; +typedef struct gnttab_get_version gnttab_get_version_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_get_version_t); + +/* + * GNTTABOP_swap_grant_ref: Swap the contents of two grant entries. + */ +struct gnttab_swap_grant_ref { + /* IN parameters */ + grant_ref_t ref_a; + grant_ref_t ref_b; + /* OUT parameters */ + int16_t status; /* => enum grant_status */ +}; +typedef struct gnttab_swap_grant_ref gnttab_swap_grant_ref_t; +DEFINE_XEN_GUEST_HANDLE(gnttab_swap_grant_ref_t); + +#endif /* __XEN_INTERFACE_VERSION__ */ + +/* + * Bitfield values for gnttab_map_grant_ref.flags. + */ + /* Map the grant entry for access by I/O devices. */ +#define _GNTMAP_device_map (0) +#define GNTMAP_device_map (1<<_GNTMAP_device_map) + /* Map the grant entry for access by host CPUs. */ +#define _GNTMAP_host_map (1) +#define GNTMAP_host_map (1<<_GNTMAP_host_map) + /* Accesses to the granted frame will be restricted to read-only access. */ +#define _GNTMAP_readonly (2) +#define GNTMAP_readonly (1<<_GNTMAP_readonly) + /* + * GNTMAP_host_map subflag: + * 0 => The host mapping is usable only by the guest OS. + * 1 => The host mapping is usable by guest OS + current application. + */ +#define _GNTMAP_application_map (3) +#define GNTMAP_application_map (1<<_GNTMAP_application_map) + + /* + * GNTMAP_contains_pte subflag: + * 0 => This map request contains a host virtual address. + * 1 => This map request contains the machine addess of the PTE to update. + */ +#define _GNTMAP_contains_pte (4) +#define GNTMAP_contains_pte (1<<_GNTMAP_contains_pte) + +#define _GNTMAP_can_fail (5) +#define GNTMAP_can_fail (1<<_GNTMAP_can_fail) + +/* + * Bits to be placed in guest kernel available PTE bits (architecture + * dependent; only supported when XENFEAT_gnttab_map_avail_bits is set). + */ +#define _GNTMAP_guest_avail0 (16) +#define GNTMAP_guest_avail_mask ((uint32_t)~0 << _GNTMAP_guest_avail0) + +/* + * Values for error status returns. All errors are -ve. + */ +/* ` enum grant_status { */ +#define GNTST_okay (0) /* Normal return. */ +#define GNTST_general_error (-1) /* General undefined error. */ +#define GNTST_bad_domain (-2) /* Unrecognsed domain id. */ +#define GNTST_bad_gntref (-3) /* Unrecognised or inappropriate gntref. */ +#define GNTST_bad_handle (-4) /* Unrecognised or inappropriate handle. */ +#define GNTST_bad_virt_addr (-5) /* Inappropriate virtual address to map. */ +#define GNTST_bad_dev_addr (-6) /* Inappropriate device address to unmap.*/ +#define GNTST_no_device_space (-7) /* Out of space in I/O MMU. */ +#define GNTST_permission_denied (-8) /* Not enough privilege for operation. */ +#define GNTST_bad_page (-9) /* Specified page was invalid for op. */ +#define GNTST_bad_copy_arg (-10) /* copy arguments cross page boundary. */ +#define GNTST_address_too_big (-11) /* transfer page address too large. */ +#define GNTST_eagain (-12) /* Operation not done; try again. */ +/* ` } */ + +#define GNTTABOP_error_msgs { \ + "okay", \ + "undefined error", \ + "unrecognised domain id", \ + "invalid grant reference", \ + "invalid mapping handle", \ + "invalid virtual address", \ + "invalid device address", \ + "no spare translation slot in the I/O MMU", \ + "permission denied", \ + "bad page", \ + "copy arguments cross page boundary", \ + "page address size too large", \ + "operation not done; try again" \ +} + +#endif /* __XEN_PUBLIC_GRANT_TABLE_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/hvm/hvm_op.h b/qemu/roms/ipxe/src/include/xen/hvm/hvm_op.h new file mode 100644 index 000000000..469ad4fbc --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/hvm/hvm_op.h @@ -0,0 +1,384 @@ +/* + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __XEN_PUBLIC_HVM_HVM_OP_H__ +#define __XEN_PUBLIC_HVM_HVM_OP_H__ + +FILE_LICENCE ( MIT ); + +#include "../xen.h" +#include "../trace.h" +#include "../event_channel.h" + +/* Get/set subcommands: extra argument == pointer to xen_hvm_param struct. */ +#define HVMOP_set_param 0 +#define HVMOP_get_param 1 +struct xen_hvm_param { + domid_t domid; /* IN */ + uint32_t index; /* IN */ + uint64_t value; /* IN/OUT */ +}; +typedef struct xen_hvm_param xen_hvm_param_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_param_t); + +/* Set the logical level of one of a domain's PCI INTx wires. */ +#define HVMOP_set_pci_intx_level 2 +struct xen_hvm_set_pci_intx_level { + /* Domain to be updated. */ + domid_t domid; + /* PCI INTx identification in PCI topology (domain:bus:device:intx). */ + uint8_t domain, bus, device, intx; + /* Assertion level (0 = unasserted, 1 = asserted). */ + uint8_t level; +}; +typedef struct xen_hvm_set_pci_intx_level xen_hvm_set_pci_intx_level_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_pci_intx_level_t); + +/* Set the logical level of one of a domain's ISA IRQ wires. */ +#define HVMOP_set_isa_irq_level 3 +struct xen_hvm_set_isa_irq_level { + /* Domain to be updated. */ + domid_t domid; + /* ISA device identification, by ISA IRQ (0-15). */ + uint8_t isa_irq; + /* Assertion level (0 = unasserted, 1 = asserted). */ + uint8_t level; +}; +typedef struct xen_hvm_set_isa_irq_level xen_hvm_set_isa_irq_level_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_isa_irq_level_t); + +#define HVMOP_set_pci_link_route 4 +struct xen_hvm_set_pci_link_route { + /* Domain to be updated. */ + domid_t domid; + /* PCI link identifier (0-3). */ + uint8_t link; + /* ISA IRQ (1-15), or 0 (disable link). */ + uint8_t isa_irq; +}; +typedef struct xen_hvm_set_pci_link_route xen_hvm_set_pci_link_route_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_pci_link_route_t); + +/* Flushes all VCPU TLBs: @arg must be NULL. */ +#define HVMOP_flush_tlbs 5 + +typedef enum { + HVMMEM_ram_rw, /* Normal read/write guest RAM */ + HVMMEM_ram_ro, /* Read-only; writes are discarded */ + HVMMEM_mmio_dm, /* Reads and write go to the device model */ +} hvmmem_type_t; + +/* Following tools-only interfaces may change in future. */ +#if defined(__XEN__) || defined(__XEN_TOOLS__) + +/* Track dirty VRAM. */ +#define HVMOP_track_dirty_vram 6 +struct xen_hvm_track_dirty_vram { + /* Domain to be tracked. */ + domid_t domid; + /* Number of pages to track. */ + uint32_t nr; + /* First pfn to track. */ + uint64_aligned_t first_pfn; + /* OUT variable. */ + /* Dirty bitmap buffer. */ + XEN_GUEST_HANDLE_64(uint8) dirty_bitmap; +}; +typedef struct xen_hvm_track_dirty_vram xen_hvm_track_dirty_vram_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_track_dirty_vram_t); + +/* Notify that some pages got modified by the Device Model. */ +#define HVMOP_modified_memory 7 +struct xen_hvm_modified_memory { + /* Domain to be updated. */ + domid_t domid; + /* Number of pages. */ + uint32_t nr; + /* First pfn. */ + uint64_aligned_t first_pfn; +}; +typedef struct xen_hvm_modified_memory xen_hvm_modified_memory_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_modified_memory_t); + +#define HVMOP_set_mem_type 8 +/* Notify that a region of memory is to be treated in a specific way. */ +struct xen_hvm_set_mem_type { + /* Domain to be updated. */ + domid_t domid; + /* Memory type */ + uint16_t hvmmem_type; + /* Number of pages. */ + uint32_t nr; + /* First pfn. */ + uint64_aligned_t first_pfn; +}; +typedef struct xen_hvm_set_mem_type xen_hvm_set_mem_type_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_mem_type_t); + +#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ + +/* Hint from PV drivers for pagetable destruction. */ +#define HVMOP_pagetable_dying 9 +struct xen_hvm_pagetable_dying { + /* Domain with a pagetable about to be destroyed. */ + domid_t domid; + uint16_t pad[3]; /* align next field on 8-byte boundary */ + /* guest physical address of the toplevel pagetable dying */ + uint64_t gpa; +}; +typedef struct xen_hvm_pagetable_dying xen_hvm_pagetable_dying_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_pagetable_dying_t); + +/* Get the current Xen time, in nanoseconds since system boot. */ +#define HVMOP_get_time 10 +struct xen_hvm_get_time { + uint64_t now; /* OUT */ +}; +typedef struct xen_hvm_get_time xen_hvm_get_time_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_get_time_t); + +#define HVMOP_xentrace 11 +struct xen_hvm_xentrace { + uint16_t event, extra_bytes; + uint8_t extra[TRACE_EXTRA_MAX * sizeof(uint32_t)]; +}; +typedef struct xen_hvm_xentrace xen_hvm_xentrace_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_xentrace_t); + +/* Following tools-only interfaces may change in future. */ +#if defined(__XEN__) || defined(__XEN_TOOLS__) + +/* Deprecated by XENMEM_access_op_set_access */ +#define HVMOP_set_mem_access 12 + +/* Deprecated by XENMEM_access_op_get_access */ +#define HVMOP_get_mem_access 13 + +#define HVMOP_inject_trap 14 +/* Inject a trap into a VCPU, which will get taken up on the next + * scheduling of it. Note that the caller should know enough of the + * state of the CPU before injecting, to know what the effect of + * injecting the trap will be. + */ +struct xen_hvm_inject_trap { + /* Domain to be queried. */ + domid_t domid; + /* VCPU */ + uint32_t vcpuid; + /* Vector number */ + uint32_t vector; + /* Trap type (HVMOP_TRAP_*) */ + uint32_t type; +/* NB. This enumeration precisely matches hvm.h:X86_EVENTTYPE_* */ +# define HVMOP_TRAP_ext_int 0 /* external interrupt */ +# define HVMOP_TRAP_nmi 2 /* nmi */ +# define HVMOP_TRAP_hw_exc 3 /* hardware exception */ +# define HVMOP_TRAP_sw_int 4 /* software interrupt (CD nn) */ +# define HVMOP_TRAP_pri_sw_exc 5 /* ICEBP (F1) */ +# define HVMOP_TRAP_sw_exc 6 /* INT3 (CC), INTO (CE) */ + /* Error code, or ~0u to skip */ + uint32_t error_code; + /* Intruction length */ + uint32_t insn_len; + /* CR2 for page faults */ + uint64_aligned_t cr2; +}; +typedef struct xen_hvm_inject_trap xen_hvm_inject_trap_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_inject_trap_t); + +#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ + +#define HVMOP_get_mem_type 15 +/* Return hvmmem_type_t for the specified pfn. */ +struct xen_hvm_get_mem_type { + /* Domain to be queried. */ + domid_t domid; + /* OUT variable. */ + uint16_t mem_type; + uint16_t pad[2]; /* align next field on 8-byte boundary */ + /* IN variable. */ + uint64_t pfn; +}; +typedef struct xen_hvm_get_mem_type xen_hvm_get_mem_type_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_get_mem_type_t); + +/* Following tools-only interfaces may change in future. */ +#if defined(__XEN__) || defined(__XEN_TOOLS__) + +/* MSI injection for emulated devices */ +#define HVMOP_inject_msi 16 +struct xen_hvm_inject_msi { + /* Domain to be injected */ + domid_t domid; + /* Data -- lower 32 bits */ + uint32_t data; + /* Address (0xfeexxxxx) */ + uint64_t addr; +}; +typedef struct xen_hvm_inject_msi xen_hvm_inject_msi_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_inject_msi_t); + +/* + * IOREQ Servers + * + * The interface between an I/O emulator an Xen is called an IOREQ Server. + * A domain supports a single 'legacy' IOREQ Server which is instantiated if + * parameter... + * + * HVM_PARAM_IOREQ_PFN is read (to get the gmfn containing the synchronous + * ioreq structures), or... + * HVM_PARAM_BUFIOREQ_PFN is read (to get the gmfn containing the buffered + * ioreq ring), or... + * HVM_PARAM_BUFIOREQ_EVTCHN is read (to get the event channel that Xen uses + * to request buffered I/O emulation). + * + * The following hypercalls facilitate the creation of IOREQ Servers for + * 'secondary' emulators which are invoked to implement port I/O, memory, or + * PCI config space ranges which they explicitly register. + */ + +typedef uint16_t ioservid_t; + +/* + * HVMOP_create_ioreq_server: Instantiate a new IOREQ Server for a secondary + * emulator servicing domain <domid>. + * + * The <id> handed back is unique for <domid>. If <handle_bufioreq> is zero + * the buffered ioreq ring will not be allocated and hence all emulation + * requestes to this server will be synchronous. + */ +#define HVMOP_create_ioreq_server 17 +struct xen_hvm_create_ioreq_server { + domid_t domid; /* IN - domain to be serviced */ + uint8_t handle_bufioreq; /* IN - should server handle buffered ioreqs */ + ioservid_t id; /* OUT - server id */ +}; +typedef struct xen_hvm_create_ioreq_server xen_hvm_create_ioreq_server_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_create_ioreq_server_t); + +/* + * HVMOP_get_ioreq_server_info: Get all the information necessary to access + * IOREQ Server <id>. + * + * The emulator needs to map the synchronous ioreq structures and buffered + * ioreq ring (if it exists) that Xen uses to request emulation. These are + * hosted in domain <domid>'s gmfns <ioreq_pfn> and <bufioreq_pfn> + * respectively. In addition, if the IOREQ Server is handling buffered + * emulation requests, the emulator needs to bind to event channel + * <bufioreq_port> to listen for them. (The event channels used for + * synchronous emulation requests are specified in the per-CPU ioreq + * structures in <ioreq_pfn>). + * If the IOREQ Server is not handling buffered emulation requests then the + * values handed back in <bufioreq_pfn> and <bufioreq_port> will both be 0. + */ +#define HVMOP_get_ioreq_server_info 18 +struct xen_hvm_get_ioreq_server_info { + domid_t domid; /* IN - domain to be serviced */ + ioservid_t id; /* IN - server id */ + evtchn_port_t bufioreq_port; /* OUT - buffered ioreq port */ + uint64_aligned_t ioreq_pfn; /* OUT - sync ioreq pfn */ + uint64_aligned_t bufioreq_pfn; /* OUT - buffered ioreq pfn */ +}; +typedef struct xen_hvm_get_ioreq_server_info xen_hvm_get_ioreq_server_info_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_get_ioreq_server_info_t); + +/* + * HVM_map_io_range_to_ioreq_server: Register an I/O range of domain <domid> + * for emulation by the client of IOREQ + * Server <id> + * HVM_unmap_io_range_from_ioreq_server: Deregister an I/O range of <domid> + * for emulation by the client of IOREQ + * Server <id> + * + * There are three types of I/O that can be emulated: port I/O, memory accesses + * and PCI config space accesses. The <type> field denotes which type of range + * the <start> and <end> (inclusive) fields are specifying. + * PCI config space ranges are specified by segment/bus/device/function values + * which should be encoded using the HVMOP_PCI_SBDF helper macro below. + * + * NOTE: unless an emulation request falls entirely within a range mapped + * by a secondary emulator, it will not be passed to that emulator. + */ +#define HVMOP_map_io_range_to_ioreq_server 19 +#define HVMOP_unmap_io_range_from_ioreq_server 20 +struct xen_hvm_io_range { + domid_t domid; /* IN - domain to be serviced */ + ioservid_t id; /* IN - server id */ + uint32_t type; /* IN - type of range */ +# define HVMOP_IO_RANGE_PORT 0 /* I/O port range */ +# define HVMOP_IO_RANGE_MEMORY 1 /* MMIO range */ +# define HVMOP_IO_RANGE_PCI 2 /* PCI segment/bus/dev/func range */ + uint64_aligned_t start, end; /* IN - inclusive start and end of range */ +}; +typedef struct xen_hvm_io_range xen_hvm_io_range_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_io_range_t); + +#define HVMOP_PCI_SBDF(s,b,d,f) \ + ((((s) & 0xffff) << 16) | \ + (((b) & 0xff) << 8) | \ + (((d) & 0x1f) << 3) | \ + ((f) & 0x07)) + +/* + * HVMOP_destroy_ioreq_server: Destroy the IOREQ Server <id> servicing domain + * <domid>. + * + * Any registered I/O ranges will be automatically deregistered. + */ +#define HVMOP_destroy_ioreq_server 21 +struct xen_hvm_destroy_ioreq_server { + domid_t domid; /* IN - domain to be serviced */ + ioservid_t id; /* IN - server id */ +}; +typedef struct xen_hvm_destroy_ioreq_server xen_hvm_destroy_ioreq_server_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_destroy_ioreq_server_t); + +/* + * HVMOP_set_ioreq_server_state: Enable or disable the IOREQ Server <id> servicing + * domain <domid>. + * + * The IOREQ Server will not be passed any emulation requests until it is in the + * enabled state. + * Note that the contents of the ioreq_pfn and bufioreq_fn (see + * HVMOP_get_ioreq_server_info) are not meaningful until the IOREQ Server is in + * the enabled state. + */ +#define HVMOP_set_ioreq_server_state 22 +struct xen_hvm_set_ioreq_server_state { + domid_t domid; /* IN - domain to be serviced */ + ioservid_t id; /* IN - server id */ + uint8_t enabled; /* IN - enabled? */ +}; +typedef struct xen_hvm_set_ioreq_server_state xen_hvm_set_ioreq_server_state_t; +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_ioreq_server_state_t); + +#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ + +#endif /* __XEN_PUBLIC_HVM_HVM_OP_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/hvm/params.h b/qemu/roms/ipxe/src/include/xen/hvm/params.h new file mode 100644 index 000000000..49e06586d --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/hvm/params.h @@ -0,0 +1,158 @@ +/* + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __XEN_PUBLIC_HVM_PARAMS_H__ +#define __XEN_PUBLIC_HVM_PARAMS_H__ + +FILE_LICENCE ( MIT ); + +#include "hvm_op.h" + +/* + * Parameter space for HVMOP_{set,get}_param. + */ + +/* + * How should CPU0 event-channel notifications be delivered? + * val[63:56] == 0: val[55:0] is a delivery GSI (Global System Interrupt). + * val[63:56] == 1: val[55:0] is a delivery PCI INTx line, as follows: + * Domain = val[47:32], Bus = val[31:16], + * DevFn = val[15: 8], IntX = val[ 1: 0] + * val[63:56] == 2: val[7:0] is a vector number, check for + * XENFEAT_hvm_callback_vector to know if this delivery + * method is available. + * If val == 0 then CPU0 event-channel notifications are not delivered. + */ +#define HVM_PARAM_CALLBACK_IRQ 0 + +/* + * These are not used by Xen. They are here for convenience of HVM-guest + * xenbus implementations. + */ +#define HVM_PARAM_STORE_PFN 1 +#define HVM_PARAM_STORE_EVTCHN 2 + +#define HVM_PARAM_PAE_ENABLED 4 + +#define HVM_PARAM_IOREQ_PFN 5 + +#define HVM_PARAM_BUFIOREQ_PFN 6 +#define HVM_PARAM_BUFIOREQ_EVTCHN 26 + +#if defined(__i386__) || defined(__x86_64__) + +/* Expose Viridian interfaces to this HVM guest? */ +#define HVM_PARAM_VIRIDIAN 9 + +#endif + +/* + * Set mode for virtual timers (currently x86 only): + * delay_for_missed_ticks (default): + * Do not advance a vcpu's time beyond the correct delivery time for + * interrupts that have been missed due to preemption. Deliver missed + * interrupts when the vcpu is rescheduled and advance the vcpu's virtual + * time stepwise for each one. + * no_delay_for_missed_ticks: + * As above, missed interrupts are delivered, but guest time always tracks + * wallclock (i.e., real) time while doing so. + * no_missed_ticks_pending: + * No missed interrupts are held pending. Instead, to ensure ticks are + * delivered at some non-zero rate, if we detect missed ticks then the + * internal tick alarm is not disabled if the VCPU is preempted during the + * next tick period. + * one_missed_tick_pending: + * Missed interrupts are collapsed together and delivered as one 'late tick'. + * Guest time always tracks wallclock (i.e., real) time. + */ +#define HVM_PARAM_TIMER_MODE 10 +#define HVMPTM_delay_for_missed_ticks 0 +#define HVMPTM_no_delay_for_missed_ticks 1 +#define HVMPTM_no_missed_ticks_pending 2 +#define HVMPTM_one_missed_tick_pending 3 + +/* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */ +#define HVM_PARAM_HPET_ENABLED 11 + +/* Identity-map page directory used by Intel EPT when CR0.PG=0. */ +#define HVM_PARAM_IDENT_PT 12 + +/* Device Model domain, defaults to 0. */ +#define HVM_PARAM_DM_DOMAIN 13 + +/* ACPI S state: currently support S0 and S3 on x86. */ +#define HVM_PARAM_ACPI_S_STATE 14 + +/* TSS used on Intel when CR0.PE=0. */ +#define HVM_PARAM_VM86_TSS 15 + +/* Boolean: Enable aligning all periodic vpts to reduce interrupts */ +#define HVM_PARAM_VPT_ALIGN 16 + +/* Console debug shared memory ring and event channel */ +#define HVM_PARAM_CONSOLE_PFN 17 +#define HVM_PARAM_CONSOLE_EVTCHN 18 + +/* + * Select location of ACPI PM1a and TMR control blocks. Currently two locations + * are supported, specified by version 0 or 1 in this parameter: + * - 0: default, use the old addresses + * PM1A_EVT == 0x1f40; PM1A_CNT == 0x1f44; PM_TMR == 0x1f48 + * - 1: use the new default qemu addresses + * PM1A_EVT == 0xb000; PM1A_CNT == 0xb004; PM_TMR == 0xb008 + * You can find these address definitions in <hvm/ioreq.h> + */ +#define HVM_PARAM_ACPI_IOPORTS_LOCATION 19 + +/* Enable blocking memory events, async or sync (pause vcpu until response) + * onchangeonly indicates messages only on a change of value */ +#define HVM_PARAM_MEMORY_EVENT_CR0 20 +#define HVM_PARAM_MEMORY_EVENT_CR3 21 +#define HVM_PARAM_MEMORY_EVENT_CR4 22 +#define HVM_PARAM_MEMORY_EVENT_INT3 23 +#define HVM_PARAM_MEMORY_EVENT_SINGLE_STEP 25 +#define HVM_PARAM_MEMORY_EVENT_MSR 30 + +#define HVMPME_MODE_MASK (3 << 0) +#define HVMPME_mode_disabled 0 +#define HVMPME_mode_async 1 +#define HVMPME_mode_sync 2 +#define HVMPME_onchangeonly (1 << 2) + +/* Boolean: Enable nestedhvm (hvm only) */ +#define HVM_PARAM_NESTEDHVM 24 + +/* Params for the mem event rings */ +#define HVM_PARAM_PAGING_RING_PFN 27 +#define HVM_PARAM_ACCESS_RING_PFN 28 +#define HVM_PARAM_SHARING_RING_PFN 29 + +/* SHUTDOWN_* action in case of a triple fault */ +#define HVM_PARAM_TRIPLE_FAULT_REASON 31 + +#define HVM_PARAM_IOREQ_SERVER_PFN 32 +#define HVM_PARAM_NR_IOREQ_SERVER_PAGES 33 + +/* Location of the VM Generation ID in guest physical address space. */ +#define HVM_PARAM_VM_GENERATION_ID_ADDR 34 + +#define HVM_NR_PARAMS 35 + +#endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */ diff --git a/qemu/roms/ipxe/src/include/xen/import.pl b/qemu/roms/ipxe/src/include/xen/import.pl new file mode 100755 index 000000000..9f09a77a4 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/import.pl @@ -0,0 +1,116 @@ +#!/usr/bin/perl -w + +=head1 NAME + +import.pl + +=head1 SYNOPSIS + +import.pl [options] /path/to/xen + +Options: + + -h,--help Display brief help message + -v,--verbose Increase verbosity + -q,--quiet Decrease verbosity + +=cut + +use File::Spec::Functions qw ( :ALL ); +use File::Find; +use File::Path; +use Getopt::Long; +use Pod::Usage; +use FindBin; +use strict; +use warnings; + +my $verbosity = 0; + +sub try_import_file { + my $ipxedir = shift; + my $xendir = shift; + my $filename = shift; + + # Skip everything except headers + return unless $filename =~ /\.h$/; + + # Search for importable header + ( undef, my $subdir, undef ) = splitpath ( $filename ); + my $outfile = catfile ( $ipxedir, $filename ); + my $infile = catfile ( $xendir, "xen/include/public", $filename ); + die "$infile does not exist\n" unless -e $infile; + + # Import header file + print "$filename <- ".catfile ( $xendir, $filename )."\n" + if $verbosity >= 1; + open my $infh, "<", $infile or die "Could not open $infile: $!\n"; + mkpath ( catdir ( $xendir, $subdir ) ); + open my $outfh, ">", $outfile or die "Could not open $outfile: $!\n"; + my @dependencies = (); + my $maybe_guard; + my $guard; + while ( <$infh> ) { + # Strip CR and trailing whitespace + s/\r//g; + s/\s*$//g; + chomp; + # Update include lines, and record included files + if ( /^\#include\s+[<\"](\S+)[>\"]/ ) { + push @dependencies, catfile ( $subdir, $1 ); + } + # Write out line + print $outfh "$_\n"; + # Apply FILE_LICENCE() immediately after include guard + if ( defined $maybe_guard ) { + if ( /^\#define\s+_+${maybe_guard}_H_*$/ ) { + die "Duplicate header guard detected in $infile\n" if $guard; + $guard = $maybe_guard; + print $outfh "\nFILE_LICENCE ( MIT );\n"; + } + undef $maybe_guard; + } + if ( /^#ifndef\s+_+(\S+)_H_*$/ ) { + $maybe_guard = $1; + } + } + close $outfh; + close $infh; + # Warn if no header guard was detected + warn "Cannot detect header guard in $infile\n" unless $guard; + # Recurse to handle any included files that we don't already have + foreach my $dependency ( @dependencies ) { + if ( ! -e catfile ( $ipxedir, $dependency ) ) { + print "...following dependency on $dependency\n" if $verbosity >= 1; + try_import_file ( $ipxedir, $xendir, $dependency ); + } + } + return; +} + +# Parse command-line options +Getopt::Long::Configure ( 'bundling', 'auto_abbrev' ); +GetOptions ( + 'verbose|v+' => sub { $verbosity++; }, + 'quiet|q+' => sub { $verbosity--; }, + 'help|h' => sub { pod2usage ( 1 ); }, +) or die "Could not parse command-line options\n"; +pod2usage ( 1 ) unless @ARGV == 1; +my $xendir = shift; + +# Identify Xen import directory +die "Directory \"$xendir\" does not appear to contain the Xen source tree\n" + unless -e catfile ( $xendir, "xen/include/public/xen.h" ); + +# Identify iPXE Xen includes directory +my $ipxedir = $FindBin::Bin; +die "Directory \"$ipxedir\" does not appear to contain the iPXE Xen includes\n" + unless -e catfile ( $ipxedir, "../../include/ipxe" ); + +print "Importing Xen headers into $ipxedir\nfrom $xendir\n" + if $verbosity >= 1; + +# Import headers +find ( { wanted => sub { + try_import_file ( $ipxedir, $xendir, abs2rel ( $_, $ipxedir ) ); +}, no_chdir => 1 }, $ipxedir ); diff --git a/qemu/roms/ipxe/src/include/xen/io/netif.h b/qemu/roms/ipxe/src/include/xen/io/netif.h new file mode 100644 index 000000000..ae12eab73 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/io/netif.h @@ -0,0 +1,307 @@ +/****************************************************************************** + * netif.h + * + * Unified network-device I/O interface for Xen guest OSes. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2003-2004, Keir Fraser + */ + +#ifndef __XEN_PUBLIC_IO_NETIF_H__ +#define __XEN_PUBLIC_IO_NETIF_H__ + +FILE_LICENCE ( MIT ); + +#include "ring.h" +#include "../grant_table.h" + +/* + * Older implementation of Xen network frontend / backend has an + * implicit dependency on the MAX_SKB_FRAGS as the maximum number of + * ring slots a skb can use. Netfront / netback may not work as + * expected when frontend and backend have different MAX_SKB_FRAGS. + * + * A better approach is to add mechanism for netfront / netback to + * negotiate this value. However we cannot fix all possible + * frontends, so we need to define a value which states the minimum + * slots backend must support. + * + * The minimum value derives from older Linux kernel's MAX_SKB_FRAGS + * (18), which is proved to work with most frontends. Any new backend + * which doesn't negotiate with frontend should expect frontend to + * send a valid packet using slots up to this value. + */ +#define XEN_NETIF_NR_SLOTS_MIN 18 + +/* + * Notifications after enqueuing any type of message should be conditional on + * the appropriate req_event or rsp_event field in the shared ring. + * If the client sends notification for rx requests then it should specify + * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume + * that it cannot safely queue packets (as it may not be kicked to send them). + */ + +/* + * "feature-split-event-channels" is introduced to separate guest TX + * and RX notification. Backend either doesn't support this feature or + * advertises it via xenstore as 0 (disabled) or 1 (enabled). + * + * To make use of this feature, frontend should allocate two event + * channels for TX and RX, advertise them to backend as + * "event-channel-tx" and "event-channel-rx" respectively. If frontend + * doesn't want to use this feature, it just writes "event-channel" + * node as before. + */ + +/* + * Multiple transmit and receive queues: + * If supported, the backend will write the key "multi-queue-max-queues" to + * the directory for that vif, and set its value to the maximum supported + * number of queues. + * Frontends that are aware of this feature and wish to use it can write the + * key "multi-queue-num-queues", set to the number they wish to use, which + * must be greater than zero, and no more than the value reported by the backend + * in "multi-queue-max-queues". + * + * Queues replicate the shared rings and event channels. + * "feature-split-event-channels" may optionally be used when using + * multiple queues, but is not mandatory. + * + * Each queue consists of one shared ring pair, i.e. there must be the same + * number of tx and rx rings. + * + * For frontends requesting just one queue, the usual event-channel and + * ring-ref keys are written as before, simplifying the backend processing + * to avoid distinguishing between a frontend that doesn't understand the + * multi-queue feature, and one that does, but requested only one queue. + * + * Frontends requesting two or more queues must not write the toplevel + * event-channel (or event-channel-{tx,rx}) and {tx,rx}-ring-ref keys, + * instead writing those keys under sub-keys having the name "queue-N" where + * N is the integer ID of the queue for which those keys belong. Queues + * are indexed from zero. For example, a frontend with two queues and split + * event channels must write the following set of queue-related keys: + * + * /local/domain/1/device/vif/0/multi-queue-num-queues = "2" + * /local/domain/1/device/vif/0/queue-0 = "" + * /local/domain/1/device/vif/0/queue-0/tx-ring-ref = "<ring-ref-tx0>" + * /local/domain/1/device/vif/0/queue-0/rx-ring-ref = "<ring-ref-rx0>" + * /local/domain/1/device/vif/0/queue-0/event-channel-tx = "<evtchn-tx0>" + * /local/domain/1/device/vif/0/queue-0/event-channel-rx = "<evtchn-rx0>" + * /local/domain/1/device/vif/0/queue-1 = "" + * /local/domain/1/device/vif/0/queue-1/tx-ring-ref = "<ring-ref-tx1>" + * /local/domain/1/device/vif/0/queue-1/rx-ring-ref = "<ring-ref-rx1" + * /local/domain/1/device/vif/0/queue-1/event-channel-tx = "<evtchn-tx1>" + * /local/domain/1/device/vif/0/queue-1/event-channel-rx = "<evtchn-rx1>" + * + * If there is any inconsistency in the XenStore data, the backend may + * choose not to connect any queues, instead treating the request as an + * error. This includes scenarios where more (or fewer) queues were + * requested than the frontend provided details for. + * + * Mapping of packets to queues is considered to be a function of the + * transmitting system (backend or frontend) and is not negotiated + * between the two. Guests are free to transmit packets on any queue + * they choose, provided it has been set up correctly. Guests must be + * prepared to receive packets on any queue they have requested be set up. + */ + +/* + * "feature-no-csum-offload" should be used to turn IPv4 TCP/UDP checksum + * offload off or on. If it is missing then the feature is assumed to be on. + * "feature-ipv6-csum-offload" should be used to turn IPv6 TCP/UDP checksum + * offload on or off. If it is missing then the feature is assumed to be off. + */ + +/* + * "feature-gso-tcpv4" and "feature-gso-tcpv6" advertise the capability to + * handle large TCP packets (in IPv4 or IPv6 form respectively). Neither + * frontends nor backends are assumed to be capable unless the flags are + * present. + */ + +/* + * This is the 'wire' format for packets: + * Request 1: netif_tx_request -- NETTXF_* (any flags) + * [Request 2: netif_tx_extra] (only if request 1 has NETTXF_extra_info) + * [Request 3: netif_tx_extra] (only if request 2 has XEN_NETIF_EXTRA_MORE) + * Request 4: netif_tx_request -- NETTXF_more_data + * Request 5: netif_tx_request -- NETTXF_more_data + * ... + * Request N: netif_tx_request -- 0 + */ + +/* Protocol checksum field is blank in the packet (hardware offload)? */ +#define _NETTXF_csum_blank (0) +#define NETTXF_csum_blank (1U<<_NETTXF_csum_blank) + +/* Packet data has been validated against protocol checksum. */ +#define _NETTXF_data_validated (1) +#define NETTXF_data_validated (1U<<_NETTXF_data_validated) + +/* Packet continues in the next request descriptor. */ +#define _NETTXF_more_data (2) +#define NETTXF_more_data (1U<<_NETTXF_more_data) + +/* Packet to be followed by extra descriptor(s). */ +#define _NETTXF_extra_info (3) +#define NETTXF_extra_info (1U<<_NETTXF_extra_info) + +#define XEN_NETIF_MAX_TX_SIZE 0xFFFF +struct netif_tx_request { + grant_ref_t gref; /* Reference to buffer page */ + uint16_t offset; /* Offset within buffer page */ + uint16_t flags; /* NETTXF_* */ + uint16_t id; /* Echoed in response message. */ + uint16_t size; /* Packet size in bytes. */ +}; +typedef struct netif_tx_request netif_tx_request_t; + +/* Types of netif_extra_info descriptors. */ +#define XEN_NETIF_EXTRA_TYPE_NONE (0) /* Never used - invalid */ +#define XEN_NETIF_EXTRA_TYPE_GSO (1) /* u.gso */ +#define XEN_NETIF_EXTRA_TYPE_MCAST_ADD (2) /* u.mcast */ +#define XEN_NETIF_EXTRA_TYPE_MCAST_DEL (3) /* u.mcast */ +#define XEN_NETIF_EXTRA_TYPE_MAX (4) + +/* netif_extra_info flags. */ +#define _XEN_NETIF_EXTRA_FLAG_MORE (0) +#define XEN_NETIF_EXTRA_FLAG_MORE (1U<<_XEN_NETIF_EXTRA_FLAG_MORE) + +/* GSO types */ +#define XEN_NETIF_GSO_TYPE_NONE (0) +#define XEN_NETIF_GSO_TYPE_TCPV4 (1) +#define XEN_NETIF_GSO_TYPE_TCPV6 (2) + +/* + * This structure needs to fit within both netif_tx_request and + * netif_rx_response for compatibility. + */ +struct netif_extra_info { + uint8_t type; /* XEN_NETIF_EXTRA_TYPE_* */ + uint8_t flags; /* XEN_NETIF_EXTRA_FLAG_* */ + + union { + /* + * XEN_NETIF_EXTRA_TYPE_GSO: + */ + struct { + /* + * Maximum payload size of each segment. For example, for TCP this + * is just the path MSS. + */ + uint16_t size; + + /* + * GSO type. This determines the protocol of the packet and any + * extra features required to segment the packet properly. + */ + uint8_t type; /* XEN_NETIF_GSO_TYPE_* */ + + /* Future expansion. */ + uint8_t pad; + + /* + * GSO features. This specifies any extra GSO features required + * to process this packet, such as ECN support for TCPv4. + */ + uint16_t features; /* XEN_NETIF_GSO_FEAT_* */ + } gso; + + /* + * XEN_NETIF_EXTRA_TYPE_MCAST_{ADD,DEL}: + * Backend advertises availability via 'feature-multicast-control' + * xenbus node containing value '1'. + * Frontend requests this feature by advertising + * 'request-multicast-control' xenbus node containing value '1'. + * If multicast control is requested then multicast flooding is + * disabled and the frontend must explicitly register its interest + * in multicast groups using dummy transmit requests containing + * MCAST_{ADD,DEL} extra-info fragments. + */ + struct { + uint8_t addr[6]; /* Address to add/remove. */ + } mcast; + + uint16_t pad[3]; + } u; +}; +typedef struct netif_extra_info netif_extra_info_t; + +struct netif_tx_response { + uint16_t id; + int16_t status; /* NETIF_RSP_* */ +}; +typedef struct netif_tx_response netif_tx_response_t; + +struct netif_rx_request { + uint16_t id; /* Echoed in response message. */ + grant_ref_t gref; /* Reference to incoming granted frame */ +}; +typedef struct netif_rx_request netif_rx_request_t; + +/* Packet data has been validated against protocol checksum. */ +#define _NETRXF_data_validated (0) +#define NETRXF_data_validated (1U<<_NETRXF_data_validated) + +/* Protocol checksum field is blank in the packet (hardware offload)? */ +#define _NETRXF_csum_blank (1) +#define NETRXF_csum_blank (1U<<_NETRXF_csum_blank) + +/* Packet continues in the next request descriptor. */ +#define _NETRXF_more_data (2) +#define NETRXF_more_data (1U<<_NETRXF_more_data) + +/* Packet to be followed by extra descriptor(s). */ +#define _NETRXF_extra_info (3) +#define NETRXF_extra_info (1U<<_NETRXF_extra_info) + +struct netif_rx_response { + uint16_t id; + uint16_t offset; /* Offset in page of start of received packet */ + uint16_t flags; /* NETRXF_* */ + int16_t status; /* -ve: NETIF_RSP_* ; +ve: Rx'ed pkt size. */ +}; +typedef struct netif_rx_response netif_rx_response_t; + +/* + * Generate netif ring structures and types. + */ + +DEFINE_RING_TYPES(netif_tx, struct netif_tx_request, struct netif_tx_response); +DEFINE_RING_TYPES(netif_rx, struct netif_rx_request, struct netif_rx_response); + +#define NETIF_RSP_DROPPED -2 +#define NETIF_RSP_ERROR -1 +#define NETIF_RSP_OKAY 0 +/* No response: used for auxiliary requests (e.g., netif_tx_extra). */ +#define NETIF_RSP_NULL 1 + +#endif + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/io/ring.h b/qemu/roms/ipxe/src/include/xen/io/ring.h new file mode 100644 index 000000000..89d738691 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/io/ring.h @@ -0,0 +1,314 @@ +/****************************************************************************** + * ring.h + * + * Shared producer-consumer ring macros. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Tim Deegan and Andrew Warfield November 2004. + */ + +#ifndef __XEN_PUBLIC_IO_RING_H__ +#define __XEN_PUBLIC_IO_RING_H__ + +FILE_LICENCE ( MIT ); + +#include "../xen-compat.h" + +#if __XEN_INTERFACE_VERSION__ < 0x00030208 +#define xen_mb() mb() +#define xen_rmb() rmb() +#define xen_wmb() wmb() +#endif + +typedef unsigned int RING_IDX; + +/* Round a 32-bit unsigned constant down to the nearest power of two. */ +#define __RD2(_x) (((_x) & 0x00000002) ? 0x2 : ((_x) & 0x1)) +#define __RD4(_x) (((_x) & 0x0000000c) ? __RD2((_x)>>2)<<2 : __RD2(_x)) +#define __RD8(_x) (((_x) & 0x000000f0) ? __RD4((_x)>>4)<<4 : __RD4(_x)) +#define __RD16(_x) (((_x) & 0x0000ff00) ? __RD8((_x)>>8)<<8 : __RD8(_x)) +#define __RD32(_x) (((_x) & 0xffff0000) ? __RD16((_x)>>16)<<16 : __RD16(_x)) + +/* + * Calculate size of a shared ring, given the total available space for the + * ring and indexes (_sz), and the name tag of the request/response structure. + * A ring contains as many entries as will fit, rounded down to the nearest + * power of two (so we can mask with (size-1) to loop around). + */ +#define __CONST_RING_SIZE(_s, _sz) \ + (__RD32(((_sz) - offsetof(struct _s##_sring, ring)) / \ + sizeof(((struct _s##_sring *)0)->ring[0]))) +/* + * The same for passing in an actual pointer instead of a name tag. + */ +#define __RING_SIZE(_s, _sz) \ + (__RD32(((_sz) - (long)(_s)->ring + (long)(_s)) / sizeof((_s)->ring[0]))) + +/* + * Macros to make the correct C datatypes for a new kind of ring. + * + * To make a new ring datatype, you need to have two message structures, + * let's say request_t, and response_t already defined. + * + * In a header where you want the ring datatype declared, you then do: + * + * DEFINE_RING_TYPES(mytag, request_t, response_t); + * + * These expand out to give you a set of types, as you can see below. + * The most important of these are: + * + * mytag_sring_t - The shared ring. + * mytag_front_ring_t - The 'front' half of the ring. + * mytag_back_ring_t - The 'back' half of the ring. + * + * To initialize a ring in your code you need to know the location and size + * of the shared memory area (PAGE_SIZE, for instance). To initialise + * the front half: + * + * mytag_front_ring_t front_ring; + * SHARED_RING_INIT((mytag_sring_t *)shared_page); + * FRONT_RING_INIT(&front_ring, (mytag_sring_t *)shared_page, PAGE_SIZE); + * + * Initializing the back follows similarly (note that only the front + * initializes the shared ring): + * + * mytag_back_ring_t back_ring; + * BACK_RING_INIT(&back_ring, (mytag_sring_t *)shared_page, PAGE_SIZE); + */ + +#define DEFINE_RING_TYPES(__name, __req_t, __rsp_t) \ + \ +/* Shared ring entry */ \ +union __name##_sring_entry { \ + __req_t req; \ + __rsp_t rsp; \ +}; \ + \ +/* Shared ring page */ \ +struct __name##_sring { \ + RING_IDX req_prod, req_event; \ + RING_IDX rsp_prod, rsp_event; \ + union { \ + struct { \ + uint8_t smartpoll_active; \ + } netif; \ + struct { \ + uint8_t msg; \ + } tapif_user; \ + uint8_t pvt_pad[4]; \ + } private; \ + uint8_t __pad[44]; \ + union __name##_sring_entry ring[1]; /* variable-length */ \ +}; \ + \ +/* "Front" end's private variables */ \ +struct __name##_front_ring { \ + RING_IDX req_prod_pvt; \ + RING_IDX rsp_cons; \ + unsigned int nr_ents; \ + struct __name##_sring *sring; \ +}; \ + \ +/* "Back" end's private variables */ \ +struct __name##_back_ring { \ + RING_IDX rsp_prod_pvt; \ + RING_IDX req_cons; \ + unsigned int nr_ents; \ + struct __name##_sring *sring; \ +}; \ + \ +/* Syntactic sugar */ \ +typedef struct __name##_sring __name##_sring_t; \ +typedef struct __name##_front_ring __name##_front_ring_t; \ +typedef struct __name##_back_ring __name##_back_ring_t + +/* + * Macros for manipulating rings. + * + * FRONT_RING_whatever works on the "front end" of a ring: here + * requests are pushed on to the ring and responses taken off it. + * + * BACK_RING_whatever works on the "back end" of a ring: here + * requests are taken off the ring and responses put on. + * + * N.B. these macros do NO INTERLOCKS OR FLOW CONTROL. + * This is OK in 1-for-1 request-response situations where the + * requestor (front end) never has more than RING_SIZE()-1 + * outstanding requests. + */ + +/* Initialising empty rings */ +#define SHARED_RING_INIT(_s) do { \ + (_s)->req_prod = (_s)->rsp_prod = 0; \ + (_s)->req_event = (_s)->rsp_event = 1; \ + (void)memset((_s)->private.pvt_pad, 0, sizeof((_s)->private.pvt_pad)); \ + (void)memset((_s)->__pad, 0, sizeof((_s)->__pad)); \ +} while(0) + +#define FRONT_RING_INIT(_r, _s, __size) do { \ + (_r)->req_prod_pvt = 0; \ + (_r)->rsp_cons = 0; \ + (_r)->nr_ents = __RING_SIZE(_s, __size); \ + (_r)->sring = (_s); \ +} while (0) + +#define BACK_RING_INIT(_r, _s, __size) do { \ + (_r)->rsp_prod_pvt = 0; \ + (_r)->req_cons = 0; \ + (_r)->nr_ents = __RING_SIZE(_s, __size); \ + (_r)->sring = (_s); \ +} while (0) + +/* How big is this ring? */ +#define RING_SIZE(_r) \ + ((_r)->nr_ents) + +/* Number of free requests (for use on front side only). */ +#define RING_FREE_REQUESTS(_r) \ + (RING_SIZE(_r) - ((_r)->req_prod_pvt - (_r)->rsp_cons)) + +/* Test if there is an empty slot available on the front ring. + * (This is only meaningful from the front. ) + */ +#define RING_FULL(_r) \ + (RING_FREE_REQUESTS(_r) == 0) + +/* Test if there are outstanding messages to be processed on a ring. */ +#define RING_HAS_UNCONSUMED_RESPONSES(_r) \ + ((_r)->sring->rsp_prod - (_r)->rsp_cons) + +#ifdef __GNUC__ +#define RING_HAS_UNCONSUMED_REQUESTS(_r) ({ \ + unsigned int req = (_r)->sring->req_prod - (_r)->req_cons; \ + unsigned int rsp = RING_SIZE(_r) - \ + ((_r)->req_cons - (_r)->rsp_prod_pvt); \ + req < rsp ? req : rsp; \ +}) +#else +/* Same as above, but without the nice GCC ({ ... }) syntax. */ +#define RING_HAS_UNCONSUMED_REQUESTS(_r) \ + ((((_r)->sring->req_prod - (_r)->req_cons) < \ + (RING_SIZE(_r) - ((_r)->req_cons - (_r)->rsp_prod_pvt))) ? \ + ((_r)->sring->req_prod - (_r)->req_cons) : \ + (RING_SIZE(_r) - ((_r)->req_cons - (_r)->rsp_prod_pvt))) +#endif + +/* Direct access to individual ring elements, by index. */ +#define RING_GET_REQUEST(_r, _idx) \ + (&((_r)->sring->ring[((_idx) & (RING_SIZE(_r) - 1))].req)) + +#define RING_GET_RESPONSE(_r, _idx) \ + (&((_r)->sring->ring[((_idx) & (RING_SIZE(_r) - 1))].rsp)) + +/* Loop termination condition: Would the specified index overflow the ring? */ +#define RING_REQUEST_CONS_OVERFLOW(_r, _cons) \ + (((_cons) - (_r)->rsp_prod_pvt) >= RING_SIZE(_r)) + +/* Ill-behaved frontend determination: Can there be this many requests? */ +#define RING_REQUEST_PROD_OVERFLOW(_r, _prod) \ + (((_prod) - (_r)->rsp_prod_pvt) > RING_SIZE(_r)) + +#define RING_PUSH_REQUESTS(_r) do { \ + xen_wmb(); /* back sees requests /before/ updated producer index */ \ + (_r)->sring->req_prod = (_r)->req_prod_pvt; \ +} while (0) + +#define RING_PUSH_RESPONSES(_r) do { \ + xen_wmb(); /* front sees resps /before/ updated producer index */ \ + (_r)->sring->rsp_prod = (_r)->rsp_prod_pvt; \ +} while (0) + +/* + * Notification hold-off (req_event and rsp_event): + * + * When queueing requests or responses on a shared ring, it may not always be + * necessary to notify the remote end. For example, if requests are in flight + * in a backend, the front may be able to queue further requests without + * notifying the back (if the back checks for new requests when it queues + * responses). + * + * When enqueuing requests or responses: + * + * Use RING_PUSH_{REQUESTS,RESPONSES}_AND_CHECK_NOTIFY(). The second argument + * is a boolean return value. True indicates that the receiver requires an + * asynchronous notification. + * + * After dequeuing requests or responses (before sleeping the connection): + * + * Use RING_FINAL_CHECK_FOR_REQUESTS() or RING_FINAL_CHECK_FOR_RESPONSES(). + * The second argument is a boolean return value. True indicates that there + * are pending messages on the ring (i.e., the connection should not be put + * to sleep). + * + * These macros will set the req_event/rsp_event field to trigger a + * notification on the very next message that is enqueued. If you want to + * create batches of work (i.e., only receive a notification after several + * messages have been enqueued) then you will need to create a customised + * version of the FINAL_CHECK macro in your own code, which sets the event + * field appropriately. + */ + +#define RING_PUSH_REQUESTS_AND_CHECK_NOTIFY(_r, _notify) do { \ + RING_IDX __old = (_r)->sring->req_prod; \ + RING_IDX __new = (_r)->req_prod_pvt; \ + xen_wmb(); /* back sees requests /before/ updated producer index */ \ + (_r)->sring->req_prod = __new; \ + xen_mb(); /* back sees new requests /before/ we check req_event */ \ + (_notify) = ((RING_IDX)(__new - (_r)->sring->req_event) < \ + (RING_IDX)(__new - __old)); \ +} while (0) + +#define RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(_r, _notify) do { \ + RING_IDX __old = (_r)->sring->rsp_prod; \ + RING_IDX __new = (_r)->rsp_prod_pvt; \ + xen_wmb(); /* front sees resps /before/ updated producer index */ \ + (_r)->sring->rsp_prod = __new; \ + xen_mb(); /* front sees new resps /before/ we check rsp_event */ \ + (_notify) = ((RING_IDX)(__new - (_r)->sring->rsp_event) < \ + (RING_IDX)(__new - __old)); \ +} while (0) + +#define RING_FINAL_CHECK_FOR_REQUESTS(_r, _work_to_do) do { \ + (_work_to_do) = RING_HAS_UNCONSUMED_REQUESTS(_r); \ + if (_work_to_do) break; \ + (_r)->sring->req_event = (_r)->req_cons + 1; \ + xen_mb(); \ + (_work_to_do) = RING_HAS_UNCONSUMED_REQUESTS(_r); \ +} while (0) + +#define RING_FINAL_CHECK_FOR_RESPONSES(_r, _work_to_do) do { \ + (_work_to_do) = RING_HAS_UNCONSUMED_RESPONSES(_r); \ + if (_work_to_do) break; \ + (_r)->sring->rsp_event = (_r)->rsp_cons + 1; \ + xen_mb(); \ + (_work_to_do) = RING_HAS_UNCONSUMED_RESPONSES(_r); \ +} while (0) + +#endif /* __XEN_PUBLIC_IO_RING_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/io/xenbus.h b/qemu/roms/ipxe/src/include/xen/io/xenbus.h new file mode 100644 index 000000000..182aeb9bc --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/io/xenbus.h @@ -0,0 +1,82 @@ +/***************************************************************************** + * xenbus.h + * + * Xenbus protocol details. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (C) 2005 XenSource Ltd. + */ + +#ifndef _XEN_PUBLIC_IO_XENBUS_H +#define _XEN_PUBLIC_IO_XENBUS_H + +FILE_LICENCE ( MIT ); + +/* + * The state of either end of the Xenbus, i.e. the current communication + * status of initialisation across the bus. States here imply nothing about + * the state of the connection between the driver and the kernel's device + * layers. + */ +enum xenbus_state { + XenbusStateUnknown = 0, + + XenbusStateInitialising = 1, + + /* + * InitWait: Finished early initialisation but waiting for information + * from the peer or hotplug scripts. + */ + XenbusStateInitWait = 2, + + /* + * Initialised: Waiting for a connection from the peer. + */ + XenbusStateInitialised = 3, + + XenbusStateConnected = 4, + + /* + * Closing: The device is being closed due to an error or an unplug event. + */ + XenbusStateClosing = 5, + + XenbusStateClosed = 6, + + /* + * Reconfiguring: The device is being reconfigured. + */ + XenbusStateReconfiguring = 7, + + XenbusStateReconfigured = 8 +}; +typedef enum xenbus_state XenbusState; + +#endif /* _XEN_PUBLIC_IO_XENBUS_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/io/xs_wire.h b/qemu/roms/ipxe/src/include/xen/io/xs_wire.h new file mode 100644 index 000000000..50415f02f --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/io/xs_wire.h @@ -0,0 +1,140 @@ +/* + * Details of the "wire" protocol between Xen Store Daemon and client + * library or guest kernel. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (C) 2005 Rusty Russell IBM Corporation + */ + +#ifndef _XS_WIRE_H +#define _XS_WIRE_H + +FILE_LICENCE ( MIT ); + +enum xsd_sockmsg_type +{ + XS_DEBUG, + XS_DIRECTORY, + XS_READ, + XS_GET_PERMS, + XS_WATCH, + XS_UNWATCH, + XS_TRANSACTION_START, + XS_TRANSACTION_END, + XS_INTRODUCE, + XS_RELEASE, + XS_GET_DOMAIN_PATH, + XS_WRITE, + XS_MKDIR, + XS_RM, + XS_SET_PERMS, + XS_WATCH_EVENT, + XS_ERROR, + XS_IS_DOMAIN_INTRODUCED, + XS_RESUME, + XS_SET_TARGET, + XS_RESTRICT, + XS_RESET_WATCHES +}; + +#define XS_WRITE_NONE "NONE" +#define XS_WRITE_CREATE "CREATE" +#define XS_WRITE_CREATE_EXCL "CREATE|EXCL" + +/* We hand errors as strings, for portability. */ +struct xsd_errors +{ + int errnum; + const char *errstring; +}; +#ifdef EINVAL +#define XSD_ERROR(x) { x, #x } +/* LINTED: static unused */ +static struct xsd_errors xsd_errors[] +#if defined(__GNUC__) +__attribute__((unused)) +#endif + = { + XSD_ERROR(EINVAL), + XSD_ERROR(EACCES), + XSD_ERROR(EEXIST), + XSD_ERROR(EISDIR), + XSD_ERROR(ENOENT), + XSD_ERROR(ENOMEM), + XSD_ERROR(ENOSPC), + XSD_ERROR(EIO), + XSD_ERROR(ENOTEMPTY), + XSD_ERROR(ENOSYS), + XSD_ERROR(EROFS), + XSD_ERROR(EBUSY), + XSD_ERROR(EAGAIN), + XSD_ERROR(EISCONN), + XSD_ERROR(E2BIG) +}; +#endif + +struct xsd_sockmsg +{ + uint32_t type; /* XS_??? */ + uint32_t req_id;/* Request identifier, echoed in daemon's response. */ + uint32_t tx_id; /* Transaction id (0 if not related to a transaction). */ + uint32_t len; /* Length of data following this. */ + + /* Generally followed by nul-terminated string(s). */ +}; + +enum xs_watch_type +{ + XS_WATCH_PATH = 0, + XS_WATCH_TOKEN +}; + +/* + * `incontents 150 xenstore_struct XenStore wire protocol. + * + * Inter-domain shared memory communications. */ +#define XENSTORE_RING_SIZE 1024 +typedef uint32_t XENSTORE_RING_IDX; +#define MASK_XENSTORE_IDX(idx) ((idx) & (XENSTORE_RING_SIZE-1)) +struct xenstore_domain_interface { + char req[XENSTORE_RING_SIZE]; /* Requests to xenstore daemon. */ + char rsp[XENSTORE_RING_SIZE]; /* Replies and async watch events. */ + XENSTORE_RING_IDX req_cons, req_prod; + XENSTORE_RING_IDX rsp_cons, rsp_prod; +}; + +/* Violating this is very bad. See docs/misc/xenstore.txt. */ +#define XENSTORE_PAYLOAD_MAX 4096 + +/* Violating these just gets you an error back */ +#define XENSTORE_ABS_PATH_MAX 3072 +#define XENSTORE_REL_PATH_MAX 2048 + +#endif /* _XS_WIRE_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/memory.h b/qemu/roms/ipxe/src/include/xen/memory.h new file mode 100644 index 000000000..0c76c0d64 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/memory.h @@ -0,0 +1,540 @@ +/****************************************************************************** + * memory.h + * + * Memory reservation and information. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2005, Keir Fraser <keir@xensource.com> + */ + +#ifndef __XEN_PUBLIC_MEMORY_H__ +#define __XEN_PUBLIC_MEMORY_H__ + +FILE_LICENCE ( MIT ); + +#include "xen.h" + +/* + * Increase or decrease the specified domain's memory reservation. Returns the + * number of extents successfully allocated or freed. + * arg == addr of struct xen_memory_reservation. + */ +#define XENMEM_increase_reservation 0 +#define XENMEM_decrease_reservation 1 +#define XENMEM_populate_physmap 6 + +#if __XEN_INTERFACE_VERSION__ >= 0x00030209 +/* + * Maximum # bits addressable by the user of the allocated region (e.g., I/O + * devices often have a 32-bit limitation even in 64-bit systems). If zero + * then the user has no addressing restriction. This field is not used by + * XENMEM_decrease_reservation. + */ +#define XENMEMF_address_bits(x) (x) +#define XENMEMF_get_address_bits(x) ((x) & 0xffu) +/* NUMA node to allocate from. */ +#define XENMEMF_node(x) (((x) + 1) << 8) +#define XENMEMF_get_node(x) ((((x) >> 8) - 1) & 0xffu) +/* Flag to populate physmap with populate-on-demand entries */ +#define XENMEMF_populate_on_demand (1<<16) +/* Flag to request allocation only from the node specified */ +#define XENMEMF_exact_node_request (1<<17) +#define XENMEMF_exact_node(n) (XENMEMF_node(n) | XENMEMF_exact_node_request) +#endif + +struct xen_memory_reservation { + + /* + * XENMEM_increase_reservation: + * OUT: MFN (*not* GMFN) bases of extents that were allocated + * XENMEM_decrease_reservation: + * IN: GMFN bases of extents to free + * XENMEM_populate_physmap: + * IN: GPFN bases of extents to populate with memory + * OUT: GMFN bases of extents that were allocated + * (NB. This command also updates the mach_to_phys translation table) + * XENMEM_claim_pages: + * IN: must be zero + */ + XEN_GUEST_HANDLE(xen_pfn_t) extent_start; + + /* Number of extents, and size/alignment of each (2^extent_order pages). */ + xen_ulong_t nr_extents; + unsigned int extent_order; + +#if __XEN_INTERFACE_VERSION__ >= 0x00030209 + /* XENMEMF flags. */ + unsigned int mem_flags; +#else + unsigned int address_bits; +#endif + + /* + * Domain whose reservation is being changed. + * Unprivileged domains can specify only DOMID_SELF. + */ + domid_t domid; +}; +typedef struct xen_memory_reservation xen_memory_reservation_t; +DEFINE_XEN_GUEST_HANDLE(xen_memory_reservation_t); + +/* + * An atomic exchange of memory pages. If return code is zero then + * @out.extent_list provides GMFNs of the newly-allocated memory. + * Returns zero on complete success, otherwise a negative error code. + * On complete success then always @nr_exchanged == @in.nr_extents. + * On partial success @nr_exchanged indicates how much work was done. + */ +#define XENMEM_exchange 11 +struct xen_memory_exchange { + /* + * [IN] Details of memory extents to be exchanged (GMFN bases). + * Note that @in.address_bits is ignored and unused. + */ + struct xen_memory_reservation in; + + /* + * [IN/OUT] Details of new memory extents. + * We require that: + * 1. @in.domid == @out.domid + * 2. @in.nr_extents << @in.extent_order == + * @out.nr_extents << @out.extent_order + * 3. @in.extent_start and @out.extent_start lists must not overlap + * 4. @out.extent_start lists GPFN bases to be populated + * 5. @out.extent_start is overwritten with allocated GMFN bases + */ + struct xen_memory_reservation out; + + /* + * [OUT] Number of input extents that were successfully exchanged: + * 1. The first @nr_exchanged input extents were successfully + * deallocated. + * 2. The corresponding first entries in the output extent list correctly + * indicate the GMFNs that were successfully exchanged. + * 3. All other input and output extents are untouched. + * 4. If not all input exents are exchanged then the return code of this + * command will be non-zero. + * 5. THIS FIELD MUST BE INITIALISED TO ZERO BY THE CALLER! + */ + xen_ulong_t nr_exchanged; +}; +typedef struct xen_memory_exchange xen_memory_exchange_t; +DEFINE_XEN_GUEST_HANDLE(xen_memory_exchange_t); + +/* + * Returns the maximum machine frame number of mapped RAM in this system. + * This command always succeeds (it never returns an error code). + * arg == NULL. + */ +#define XENMEM_maximum_ram_page 2 + +/* + * Returns the current or maximum memory reservation, in pages, of the + * specified domain (may be DOMID_SELF). Returns -ve errcode on failure. + * arg == addr of domid_t. + */ +#define XENMEM_current_reservation 3 +#define XENMEM_maximum_reservation 4 + +/* + * Returns the maximum GPFN in use by the guest, or -ve errcode on failure. + */ +#define XENMEM_maximum_gpfn 14 + +/* + * Returns a list of MFN bases of 2MB extents comprising the machine_to_phys + * mapping table. Architectures which do not have a m2p table do not implement + * this command. + * arg == addr of xen_machphys_mfn_list_t. + */ +#define XENMEM_machphys_mfn_list 5 +struct xen_machphys_mfn_list { + /* + * Size of the 'extent_start' array. Fewer entries will be filled if the + * machphys table is smaller than max_extents * 2MB. + */ + unsigned int max_extents; + + /* + * Pointer to buffer to fill with list of extent starts. If there are + * any large discontiguities in the machine address space, 2MB gaps in + * the machphys table will be represented by an MFN base of zero. + */ + XEN_GUEST_HANDLE(xen_pfn_t) extent_start; + + /* + * Number of extents written to the above array. This will be smaller + * than 'max_extents' if the machphys table is smaller than max_e * 2MB. + */ + unsigned int nr_extents; +}; +typedef struct xen_machphys_mfn_list xen_machphys_mfn_list_t; +DEFINE_XEN_GUEST_HANDLE(xen_machphys_mfn_list_t); + +/* + * For a compat caller, this is identical to XENMEM_machphys_mfn_list. + * + * For a non compat caller, this functions similarly to + * XENMEM_machphys_mfn_list, but returns the mfns making up the compatibility + * m2p table. + */ +#define XENMEM_machphys_compat_mfn_list 25 + +/* + * Returns the location in virtual address space of the machine_to_phys + * mapping table. Architectures which do not have a m2p table, or which do not + * map it by default into guest address space, do not implement this command. + * arg == addr of xen_machphys_mapping_t. + */ +#define XENMEM_machphys_mapping 12 +struct xen_machphys_mapping { + xen_ulong_t v_start, v_end; /* Start and end virtual addresses. */ + xen_ulong_t max_mfn; /* Maximum MFN that can be looked up. */ +}; +typedef struct xen_machphys_mapping xen_machphys_mapping_t; +DEFINE_XEN_GUEST_HANDLE(xen_machphys_mapping_t); + +/* Source mapping space. */ +/* ` enum phys_map_space { */ +#define XENMAPSPACE_shared_info 0 /* shared info page */ +#define XENMAPSPACE_grant_table 1 /* grant table page */ +#define XENMAPSPACE_gmfn 2 /* GMFN */ +#define XENMAPSPACE_gmfn_range 3 /* GMFN range, XENMEM_add_to_physmap only. */ +#define XENMAPSPACE_gmfn_foreign 4 /* GMFN from another dom, + * XENMEM_add_to_physmap_batch only. */ +/* ` } */ + +/* + * Sets the GPFN at which a particular page appears in the specified guest's + * pseudophysical address space. + * arg == addr of xen_add_to_physmap_t. + */ +#define XENMEM_add_to_physmap 7 +struct xen_add_to_physmap { + /* Which domain to change the mapping for. */ + domid_t domid; + + /* Number of pages to go through for gmfn_range */ + uint16_t size; + + unsigned int space; /* => enum phys_map_space */ + +#define XENMAPIDX_grant_table_status 0x80000000 + + /* Index into space being mapped. */ + xen_ulong_t idx; + + /* GPFN in domid where the source mapping page should appear. */ + xen_pfn_t gpfn; +}; +typedef struct xen_add_to_physmap xen_add_to_physmap_t; +DEFINE_XEN_GUEST_HANDLE(xen_add_to_physmap_t); + +/* A batched version of add_to_physmap. */ +#define XENMEM_add_to_physmap_batch 23 +struct xen_add_to_physmap_batch { + /* IN */ + /* Which domain to change the mapping for. */ + domid_t domid; + uint16_t space; /* => enum phys_map_space */ + + /* Number of pages to go through */ + uint16_t size; + domid_t foreign_domid; /* IFF gmfn_foreign */ + + /* Indexes into space being mapped. */ + XEN_GUEST_HANDLE(xen_ulong_t) idxs; + + /* GPFN in domid where the source mapping page should appear. */ + XEN_GUEST_HANDLE(xen_pfn_t) gpfns; + + /* OUT */ + + /* Per index error code. */ + XEN_GUEST_HANDLE(int) errs; +}; +typedef struct xen_add_to_physmap_batch xen_add_to_physmap_batch_t; +DEFINE_XEN_GUEST_HANDLE(xen_add_to_physmap_batch_t); + +#if __XEN_INTERFACE_VERSION__ < 0x00040400 +#define XENMEM_add_to_physmap_range XENMEM_add_to_physmap_batch +#define xen_add_to_physmap_range xen_add_to_physmap_batch +typedef struct xen_add_to_physmap_batch xen_add_to_physmap_range_t; +DEFINE_XEN_GUEST_HANDLE(xen_add_to_physmap_range_t); +#endif + +/* + * Unmaps the page appearing at a particular GPFN from the specified guest's + * pseudophysical address space. + * arg == addr of xen_remove_from_physmap_t. + */ +#define XENMEM_remove_from_physmap 15 +struct xen_remove_from_physmap { + /* Which domain to change the mapping for. */ + domid_t domid; + + /* GPFN of the current mapping of the page. */ + xen_pfn_t gpfn; +}; +typedef struct xen_remove_from_physmap xen_remove_from_physmap_t; +DEFINE_XEN_GUEST_HANDLE(xen_remove_from_physmap_t); + +/*** REMOVED ***/ +/*#define XENMEM_translate_gpfn_list 8*/ + +/* + * Returns the pseudo-physical memory map as it was when the domain + * was started (specified by XENMEM_set_memory_map). + * arg == addr of xen_memory_map_t. + */ +#define XENMEM_memory_map 9 +struct xen_memory_map { + /* + * On call the number of entries which can be stored in buffer. On + * return the number of entries which have been stored in + * buffer. + */ + unsigned int nr_entries; + + /* + * Entries in the buffer are in the same format as returned by the + * BIOS INT 0x15 EAX=0xE820 call. + */ + XEN_GUEST_HANDLE(void) buffer; +}; +typedef struct xen_memory_map xen_memory_map_t; +DEFINE_XEN_GUEST_HANDLE(xen_memory_map_t); + +/* + * Returns the real physical memory map. Passes the same structure as + * XENMEM_memory_map. + * arg == addr of xen_memory_map_t. + */ +#define XENMEM_machine_memory_map 10 + +/* + * Set the pseudo-physical memory map of a domain, as returned by + * XENMEM_memory_map. + * arg == addr of xen_foreign_memory_map_t. + */ +#define XENMEM_set_memory_map 13 +struct xen_foreign_memory_map { + domid_t domid; + struct xen_memory_map map; +}; +typedef struct xen_foreign_memory_map xen_foreign_memory_map_t; +DEFINE_XEN_GUEST_HANDLE(xen_foreign_memory_map_t); + +#define XENMEM_set_pod_target 16 +#define XENMEM_get_pod_target 17 +struct xen_pod_target { + /* IN */ + uint64_t target_pages; + /* OUT */ + uint64_t tot_pages; + uint64_t pod_cache_pages; + uint64_t pod_entries; + /* IN */ + domid_t domid; +}; +typedef struct xen_pod_target xen_pod_target_t; + +#if defined(__XEN__) || defined(__XEN_TOOLS__) + +#ifndef uint64_aligned_t +#define uint64_aligned_t uint64_t +#endif + +/* + * Get the number of MFNs saved through memory sharing. + * The call never fails. + */ +#define XENMEM_get_sharing_freed_pages 18 +#define XENMEM_get_sharing_shared_pages 19 + +#define XENMEM_paging_op 20 +#define XENMEM_paging_op_nominate 0 +#define XENMEM_paging_op_evict 1 +#define XENMEM_paging_op_prep 2 + +struct xen_mem_event_op { + uint8_t op; /* XENMEM_*_op_* */ + domid_t domain; + + + /* PAGING_PREP IN: buffer to immediately fill page in */ + uint64_aligned_t buffer; + /* Other OPs */ + uint64_aligned_t gfn; /* IN: gfn of page being operated on */ +}; +typedef struct xen_mem_event_op xen_mem_event_op_t; +DEFINE_XEN_GUEST_HANDLE(xen_mem_event_op_t); + +#define XENMEM_access_op 21 +#define XENMEM_access_op_resume 0 +#define XENMEM_access_op_set_access 1 +#define XENMEM_access_op_get_access 2 + +typedef enum { + XENMEM_access_n, + XENMEM_access_r, + XENMEM_access_w, + XENMEM_access_rw, + XENMEM_access_x, + XENMEM_access_rx, + XENMEM_access_wx, + XENMEM_access_rwx, + /* + * Page starts off as r-x, but automatically + * change to r-w on a write + */ + XENMEM_access_rx2rw, + /* + * Log access: starts off as n, automatically + * goes to rwx, generating an event without + * pausing the vcpu + */ + XENMEM_access_n2rwx, + /* Take the domain default */ + XENMEM_access_default +} xenmem_access_t; + +struct xen_mem_access_op { + /* XENMEM_access_op_* */ + uint8_t op; + /* xenmem_access_t */ + uint8_t access; + domid_t domid; + /* + * Number of pages for set op + * Ignored on setting default access and other ops + */ + uint32_t nr; + /* + * First pfn for set op + * pfn for get op + * ~0ull is used to set and get the default access for pages + */ + uint64_aligned_t pfn; +}; +typedef struct xen_mem_access_op xen_mem_access_op_t; +DEFINE_XEN_GUEST_HANDLE(xen_mem_access_op_t); + +#define XENMEM_sharing_op 22 +#define XENMEM_sharing_op_nominate_gfn 0 +#define XENMEM_sharing_op_nominate_gref 1 +#define XENMEM_sharing_op_share 2 +#define XENMEM_sharing_op_resume 3 +#define XENMEM_sharing_op_debug_gfn 4 +#define XENMEM_sharing_op_debug_mfn 5 +#define XENMEM_sharing_op_debug_gref 6 +#define XENMEM_sharing_op_add_physmap 7 +#define XENMEM_sharing_op_audit 8 + +#define XENMEM_SHARING_OP_S_HANDLE_INVALID (-10) +#define XENMEM_SHARING_OP_C_HANDLE_INVALID (-9) + +/* The following allows sharing of grant refs. This is useful + * for sharing utilities sitting as "filters" in IO backends + * (e.g. memshr + blktap(2)). The IO backend is only exposed + * to grant references, and this allows sharing of the grefs */ +#define XENMEM_SHARING_OP_FIELD_IS_GREF_FLAG (1ULL << 62) + +#define XENMEM_SHARING_OP_FIELD_MAKE_GREF(field, val) \ + (field) = (XENMEM_SHARING_OP_FIELD_IS_GREF_FLAG | val) +#define XENMEM_SHARING_OP_FIELD_IS_GREF(field) \ + ((field) & XENMEM_SHARING_OP_FIELD_IS_GREF_FLAG) +#define XENMEM_SHARING_OP_FIELD_GET_GREF(field) \ + ((field) & (~XENMEM_SHARING_OP_FIELD_IS_GREF_FLAG)) + +struct xen_mem_sharing_op { + uint8_t op; /* XENMEM_sharing_op_* */ + domid_t domain; + + union { + struct mem_sharing_op_nominate { /* OP_NOMINATE_xxx */ + union { + uint64_aligned_t gfn; /* IN: gfn to nominate */ + uint32_t grant_ref; /* IN: grant ref to nominate */ + } u; + uint64_aligned_t handle; /* OUT: the handle */ + } nominate; + struct mem_sharing_op_share { /* OP_SHARE/ADD_PHYSMAP */ + uint64_aligned_t source_gfn; /* IN: the gfn of the source page */ + uint64_aligned_t source_handle; /* IN: handle to the source page */ + uint64_aligned_t client_gfn; /* IN: the client gfn */ + uint64_aligned_t client_handle; /* IN: handle to the client page */ + domid_t client_domain; /* IN: the client domain id */ + } share; + struct mem_sharing_op_debug { /* OP_DEBUG_xxx */ + union { + uint64_aligned_t gfn; /* IN: gfn to debug */ + uint64_aligned_t mfn; /* IN: mfn to debug */ + uint32_t gref; /* IN: gref to debug */ + } u; + } debug; + } u; +}; +typedef struct xen_mem_sharing_op xen_mem_sharing_op_t; +DEFINE_XEN_GUEST_HANDLE(xen_mem_sharing_op_t); + +/* + * Attempt to stake a claim for a domain on a quantity of pages + * of system RAM, but _not_ assign specific pageframes. Only + * arithmetic is performed so the hypercall is very fast and need + * not be preemptible, thus sidestepping time-of-check-time-of-use + * races for memory allocation. Returns 0 if the hypervisor page + * allocator has atomically and successfully claimed the requested + * number of pages, else non-zero. + * + * Any domain may have only one active claim. When sufficient memory + * has been allocated to resolve the claim, the claim silently expires. + * Claiming zero pages effectively resets any outstanding claim and + * is always successful. + * + * Note that a valid claim may be staked even after memory has been + * allocated for a domain. In this case, the claim is not incremental, + * i.e. if the domain's tot_pages is 3, and a claim is staked for 10, + * only 7 additional pages are claimed. + * + * Caller must be privileged or the hypercall fails. + */ +#define XENMEM_claim_pages 24 + +/* + * XENMEM_claim_pages flags - the are no flags at this time. + * The zero value is appropiate. + */ + +#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ + +/* Next available subop number is 26 */ + +#endif /* __XEN_PUBLIC_MEMORY_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/trace.h b/qemu/roms/ipxe/src/include/xen/trace.h new file mode 100644 index 000000000..bf8bf65ac --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/trace.h @@ -0,0 +1,332 @@ +/****************************************************************************** + * include/public/trace.h + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Mark Williamson, (C) 2004 Intel Research Cambridge + * Copyright (C) 2005 Bin Ren + */ + +#ifndef __XEN_PUBLIC_TRACE_H__ +#define __XEN_PUBLIC_TRACE_H__ + +FILE_LICENCE ( MIT ); + +#define TRACE_EXTRA_MAX 7 +#define TRACE_EXTRA_SHIFT 28 + +/* Trace classes */ +#define TRC_CLS_SHIFT 16 +#define TRC_GEN 0x0001f000 /* General trace */ +#define TRC_SCHED 0x0002f000 /* Xen Scheduler trace */ +#define TRC_DOM0OP 0x0004f000 /* Xen DOM0 operation trace */ +#define TRC_HVM 0x0008f000 /* Xen HVM trace */ +#define TRC_MEM 0x0010f000 /* Xen memory trace */ +#define TRC_PV 0x0020f000 /* Xen PV traces */ +#define TRC_SHADOW 0x0040f000 /* Xen shadow tracing */ +#define TRC_HW 0x0080f000 /* Xen hardware-related traces */ +#define TRC_GUEST 0x0800f000 /* Guest-generated traces */ +#define TRC_ALL 0x0ffff000 +#define TRC_HD_TO_EVENT(x) ((x)&0x0fffffff) +#define TRC_HD_CYCLE_FLAG (1UL<<31) +#define TRC_HD_INCLUDES_CYCLE_COUNT(x) ( !!( (x) & TRC_HD_CYCLE_FLAG ) ) +#define TRC_HD_EXTRA(x) (((x)>>TRACE_EXTRA_SHIFT)&TRACE_EXTRA_MAX) + +/* Trace subclasses */ +#define TRC_SUBCLS_SHIFT 12 + +/* trace subclasses for SVM */ +#define TRC_HVM_ENTRYEXIT 0x00081000 /* VMENTRY and #VMEXIT */ +#define TRC_HVM_HANDLER 0x00082000 /* various HVM handlers */ +#define TRC_HVM_EMUL 0x00084000 /* emulated devices */ + +#define TRC_SCHED_MIN 0x00021000 /* Just runstate changes */ +#define TRC_SCHED_CLASS 0x00022000 /* Scheduler-specific */ +#define TRC_SCHED_VERBOSE 0x00028000 /* More inclusive scheduling */ + +/* + * The highest 3 bits of the last 12 bits of TRC_SCHED_CLASS above are + * reserved for encoding what scheduler produced the information. The + * actual event is encoded in the last 9 bits. + * + * This means we have 8 scheduling IDs available (which means at most 8 + * schedulers generating events) and, in each scheduler, up to 512 + * different events. + */ +#define TRC_SCHED_ID_BITS 3 +#define TRC_SCHED_ID_SHIFT (TRC_SUBCLS_SHIFT - TRC_SCHED_ID_BITS) +#define TRC_SCHED_ID_MASK (((1UL<<TRC_SCHED_ID_BITS) - 1) << TRC_SCHED_ID_SHIFT) +#define TRC_SCHED_EVT_MASK (~(TRC_SCHED_ID_MASK)) + +/* Per-scheduler IDs, to identify scheduler specific events */ +#define TRC_SCHED_CSCHED 0 +#define TRC_SCHED_CSCHED2 1 +#define TRC_SCHED_SEDF 2 +#define TRC_SCHED_ARINC653 3 + +/* Per-scheduler tracing */ +#define TRC_SCHED_CLASS_EVT(_c, _e) \ + ( ( TRC_SCHED_CLASS | \ + ((TRC_SCHED_##_c << TRC_SCHED_ID_SHIFT) & TRC_SCHED_ID_MASK) ) + \ + (_e & TRC_SCHED_EVT_MASK) ) + +/* Trace classes for Hardware */ +#define TRC_HW_PM 0x00801000 /* Power management traces */ +#define TRC_HW_IRQ 0x00802000 /* Traces relating to the handling of IRQs */ + +/* Trace events per class */ +#define TRC_LOST_RECORDS (TRC_GEN + 1) +#define TRC_TRACE_WRAP_BUFFER (TRC_GEN + 2) +#define TRC_TRACE_CPU_CHANGE (TRC_GEN + 3) + +#define TRC_SCHED_RUNSTATE_CHANGE (TRC_SCHED_MIN + 1) +#define TRC_SCHED_CONTINUE_RUNNING (TRC_SCHED_MIN + 2) +#define TRC_SCHED_DOM_ADD (TRC_SCHED_VERBOSE + 1) +#define TRC_SCHED_DOM_REM (TRC_SCHED_VERBOSE + 2) +#define TRC_SCHED_SLEEP (TRC_SCHED_VERBOSE + 3) +#define TRC_SCHED_WAKE (TRC_SCHED_VERBOSE + 4) +#define TRC_SCHED_YIELD (TRC_SCHED_VERBOSE + 5) +#define TRC_SCHED_BLOCK (TRC_SCHED_VERBOSE + 6) +#define TRC_SCHED_SHUTDOWN (TRC_SCHED_VERBOSE + 7) +#define TRC_SCHED_CTL (TRC_SCHED_VERBOSE + 8) +#define TRC_SCHED_ADJDOM (TRC_SCHED_VERBOSE + 9) +#define TRC_SCHED_SWITCH (TRC_SCHED_VERBOSE + 10) +#define TRC_SCHED_S_TIMER_FN (TRC_SCHED_VERBOSE + 11) +#define TRC_SCHED_T_TIMER_FN (TRC_SCHED_VERBOSE + 12) +#define TRC_SCHED_DOM_TIMER_FN (TRC_SCHED_VERBOSE + 13) +#define TRC_SCHED_SWITCH_INFPREV (TRC_SCHED_VERBOSE + 14) +#define TRC_SCHED_SWITCH_INFNEXT (TRC_SCHED_VERBOSE + 15) +#define TRC_SCHED_SHUTDOWN_CODE (TRC_SCHED_VERBOSE + 16) + +#define TRC_MEM_PAGE_GRANT_MAP (TRC_MEM + 1) +#define TRC_MEM_PAGE_GRANT_UNMAP (TRC_MEM + 2) +#define TRC_MEM_PAGE_GRANT_TRANSFER (TRC_MEM + 3) +#define TRC_MEM_SET_P2M_ENTRY (TRC_MEM + 4) +#define TRC_MEM_DECREASE_RESERVATION (TRC_MEM + 5) +#define TRC_MEM_POD_POPULATE (TRC_MEM + 16) +#define TRC_MEM_POD_ZERO_RECLAIM (TRC_MEM + 17) +#define TRC_MEM_POD_SUPERPAGE_SPLINTER (TRC_MEM + 18) + +#define TRC_PV_ENTRY 0x00201000 /* Hypervisor entry points for PV guests. */ +#define TRC_PV_SUBCALL 0x00202000 /* Sub-call in a multicall hypercall */ + +#define TRC_PV_HYPERCALL (TRC_PV_ENTRY + 1) +#define TRC_PV_TRAP (TRC_PV_ENTRY + 3) +#define TRC_PV_PAGE_FAULT (TRC_PV_ENTRY + 4) +#define TRC_PV_FORCED_INVALID_OP (TRC_PV_ENTRY + 5) +#define TRC_PV_EMULATE_PRIVOP (TRC_PV_ENTRY + 6) +#define TRC_PV_EMULATE_4GB (TRC_PV_ENTRY + 7) +#define TRC_PV_MATH_STATE_RESTORE (TRC_PV_ENTRY + 8) +#define TRC_PV_PAGING_FIXUP (TRC_PV_ENTRY + 9) +#define TRC_PV_GDT_LDT_MAPPING_FAULT (TRC_PV_ENTRY + 10) +#define TRC_PV_PTWR_EMULATION (TRC_PV_ENTRY + 11) +#define TRC_PV_PTWR_EMULATION_PAE (TRC_PV_ENTRY + 12) +#define TRC_PV_HYPERCALL_V2 (TRC_PV_ENTRY + 13) +#define TRC_PV_HYPERCALL_SUBCALL (TRC_PV_SUBCALL + 14) + +/* + * TRC_PV_HYPERCALL_V2 format + * + * Only some of the hypercall argument are recorded. Bit fields A0 to + * A5 in the first extra word are set if the argument is present and + * the arguments themselves are packed sequentially in the following + * words. + * + * The TRC_64_FLAG bit is not set for these events (even if there are + * 64-bit arguments in the record). + * + * Word + * 0 bit 31 30|29 28|27 26|25 24|23 22|21 20|19 ... 0 + * A5 |A4 |A3 |A2 |A1 |A0 |Hypercall op + * 1 First 32 bit (or low word of first 64 bit) arg in record + * 2 Second 32 bit (or high word of first 64 bit) arg in record + * ... + * + * A0-A5 bitfield values: + * + * 00b Argument not present + * 01b 32-bit argument present + * 10b 64-bit argument present + * 11b Reserved + */ +#define TRC_PV_HYPERCALL_V2_ARG_32(i) (0x1 << (20 + 2*(i))) +#define TRC_PV_HYPERCALL_V2_ARG_64(i) (0x2 << (20 + 2*(i))) +#define TRC_PV_HYPERCALL_V2_ARG_MASK (0xfff00000) + +#define TRC_SHADOW_NOT_SHADOW (TRC_SHADOW + 1) +#define TRC_SHADOW_FAST_PROPAGATE (TRC_SHADOW + 2) +#define TRC_SHADOW_FAST_MMIO (TRC_SHADOW + 3) +#define TRC_SHADOW_FALSE_FAST_PATH (TRC_SHADOW + 4) +#define TRC_SHADOW_MMIO (TRC_SHADOW + 5) +#define TRC_SHADOW_FIXUP (TRC_SHADOW + 6) +#define TRC_SHADOW_DOMF_DYING (TRC_SHADOW + 7) +#define TRC_SHADOW_EMULATE (TRC_SHADOW + 8) +#define TRC_SHADOW_EMULATE_UNSHADOW_USER (TRC_SHADOW + 9) +#define TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ (TRC_SHADOW + 10) +#define TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED (TRC_SHADOW + 11) +#define TRC_SHADOW_WRMAP_BF (TRC_SHADOW + 12) +#define TRC_SHADOW_PREALLOC_UNPIN (TRC_SHADOW + 13) +#define TRC_SHADOW_RESYNC_FULL (TRC_SHADOW + 14) +#define TRC_SHADOW_RESYNC_ONLY (TRC_SHADOW + 15) + +/* trace events per subclass */ +#define TRC_HVM_NESTEDFLAG (0x400) +#define TRC_HVM_VMENTRY (TRC_HVM_ENTRYEXIT + 0x01) +#define TRC_HVM_VMEXIT (TRC_HVM_ENTRYEXIT + 0x02) +#define TRC_HVM_VMEXIT64 (TRC_HVM_ENTRYEXIT + TRC_64_FLAG + 0x02) +#define TRC_HVM_PF_XEN (TRC_HVM_HANDLER + 0x01) +#define TRC_HVM_PF_XEN64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x01) +#define TRC_HVM_PF_INJECT (TRC_HVM_HANDLER + 0x02) +#define TRC_HVM_PF_INJECT64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x02) +#define TRC_HVM_INJ_EXC (TRC_HVM_HANDLER + 0x03) +#define TRC_HVM_INJ_VIRQ (TRC_HVM_HANDLER + 0x04) +#define TRC_HVM_REINJ_VIRQ (TRC_HVM_HANDLER + 0x05) +#define TRC_HVM_IO_READ (TRC_HVM_HANDLER + 0x06) +#define TRC_HVM_IO_WRITE (TRC_HVM_HANDLER + 0x07) +#define TRC_HVM_CR_READ (TRC_HVM_HANDLER + 0x08) +#define TRC_HVM_CR_READ64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x08) +#define TRC_HVM_CR_WRITE (TRC_HVM_HANDLER + 0x09) +#define TRC_HVM_CR_WRITE64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x09) +#define TRC_HVM_DR_READ (TRC_HVM_HANDLER + 0x0A) +#define TRC_HVM_DR_WRITE (TRC_HVM_HANDLER + 0x0B) +#define TRC_HVM_MSR_READ (TRC_HVM_HANDLER + 0x0C) +#define TRC_HVM_MSR_WRITE (TRC_HVM_HANDLER + 0x0D) +#define TRC_HVM_CPUID (TRC_HVM_HANDLER + 0x0E) +#define TRC_HVM_INTR (TRC_HVM_HANDLER + 0x0F) +#define TRC_HVM_NMI (TRC_HVM_HANDLER + 0x10) +#define TRC_HVM_SMI (TRC_HVM_HANDLER + 0x11) +#define TRC_HVM_VMMCALL (TRC_HVM_HANDLER + 0x12) +#define TRC_HVM_HLT (TRC_HVM_HANDLER + 0x13) +#define TRC_HVM_INVLPG (TRC_HVM_HANDLER + 0x14) +#define TRC_HVM_INVLPG64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x14) +#define TRC_HVM_MCE (TRC_HVM_HANDLER + 0x15) +#define TRC_HVM_IOPORT_READ (TRC_HVM_HANDLER + 0x16) +#define TRC_HVM_IOMEM_READ (TRC_HVM_HANDLER + 0x17) +#define TRC_HVM_CLTS (TRC_HVM_HANDLER + 0x18) +#define TRC_HVM_LMSW (TRC_HVM_HANDLER + 0x19) +#define TRC_HVM_LMSW64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x19) +#define TRC_HVM_RDTSC (TRC_HVM_HANDLER + 0x1a) +#define TRC_HVM_INTR_WINDOW (TRC_HVM_HANDLER + 0x20) +#define TRC_HVM_NPF (TRC_HVM_HANDLER + 0x21) +#define TRC_HVM_REALMODE_EMULATE (TRC_HVM_HANDLER + 0x22) +#define TRC_HVM_TRAP (TRC_HVM_HANDLER + 0x23) +#define TRC_HVM_TRAP_DEBUG (TRC_HVM_HANDLER + 0x24) +#define TRC_HVM_VLAPIC (TRC_HVM_HANDLER + 0x25) + +#define TRC_HVM_IOPORT_WRITE (TRC_HVM_HANDLER + 0x216) +#define TRC_HVM_IOMEM_WRITE (TRC_HVM_HANDLER + 0x217) + +/* Trace events for emulated devices */ +#define TRC_HVM_EMUL_HPET_START_TIMER (TRC_HVM_EMUL + 0x1) +#define TRC_HVM_EMUL_PIT_START_TIMER (TRC_HVM_EMUL + 0x2) +#define TRC_HVM_EMUL_RTC_START_TIMER (TRC_HVM_EMUL + 0x3) +#define TRC_HVM_EMUL_LAPIC_START_TIMER (TRC_HVM_EMUL + 0x4) +#define TRC_HVM_EMUL_HPET_STOP_TIMER (TRC_HVM_EMUL + 0x5) +#define TRC_HVM_EMUL_PIT_STOP_TIMER (TRC_HVM_EMUL + 0x6) +#define TRC_HVM_EMUL_RTC_STOP_TIMER (TRC_HVM_EMUL + 0x7) +#define TRC_HVM_EMUL_LAPIC_STOP_TIMER (TRC_HVM_EMUL + 0x8) +#define TRC_HVM_EMUL_PIT_TIMER_CB (TRC_HVM_EMUL + 0x9) +#define TRC_HVM_EMUL_LAPIC_TIMER_CB (TRC_HVM_EMUL + 0xA) +#define TRC_HVM_EMUL_PIC_INT_OUTPUT (TRC_HVM_EMUL + 0xB) +#define TRC_HVM_EMUL_PIC_KICK (TRC_HVM_EMUL + 0xC) +#define TRC_HVM_EMUL_PIC_INTACK (TRC_HVM_EMUL + 0xD) +#define TRC_HVM_EMUL_PIC_POSEDGE (TRC_HVM_EMUL + 0xE) +#define TRC_HVM_EMUL_PIC_NEGEDGE (TRC_HVM_EMUL + 0xF) +#define TRC_HVM_EMUL_PIC_PEND_IRQ_CALL (TRC_HVM_EMUL + 0x10) +#define TRC_HVM_EMUL_LAPIC_PIC_INTR (TRC_HVM_EMUL + 0x11) + +/* trace events for per class */ +#define TRC_PM_FREQ_CHANGE (TRC_HW_PM + 0x01) +#define TRC_PM_IDLE_ENTRY (TRC_HW_PM + 0x02) +#define TRC_PM_IDLE_EXIT (TRC_HW_PM + 0x03) + +/* Trace events for IRQs */ +#define TRC_HW_IRQ_MOVE_CLEANUP_DELAY (TRC_HW_IRQ + 0x1) +#define TRC_HW_IRQ_MOVE_CLEANUP (TRC_HW_IRQ + 0x2) +#define TRC_HW_IRQ_BIND_VECTOR (TRC_HW_IRQ + 0x3) +#define TRC_HW_IRQ_CLEAR_VECTOR (TRC_HW_IRQ + 0x4) +#define TRC_HW_IRQ_MOVE_FINISH (TRC_HW_IRQ + 0x5) +#define TRC_HW_IRQ_ASSIGN_VECTOR (TRC_HW_IRQ + 0x6) +#define TRC_HW_IRQ_UNMAPPED_VECTOR (TRC_HW_IRQ + 0x7) +#define TRC_HW_IRQ_HANDLED (TRC_HW_IRQ + 0x8) + +/* + * Event Flags + * + * Some events (e.g, TRC_PV_TRAP and TRC_HVM_IOMEM_READ) have multiple + * record formats. These event flags distinguish between the + * different formats. + */ +#define TRC_64_FLAG 0x100 /* Addresses are 64 bits (instead of 32 bits) */ + +/* This structure represents a single trace buffer record. */ +struct t_rec { + uint32_t event:28; + uint32_t extra_u32:3; /* # entries in trailing extra_u32[] array */ + uint32_t cycles_included:1; /* u.cycles or u.no_cycles? */ + union { + struct { + uint32_t cycles_lo, cycles_hi; /* cycle counter timestamp */ + uint32_t extra_u32[7]; /* event data items */ + } cycles; + struct { + uint32_t extra_u32[7]; /* event data items */ + } nocycles; + } u; +}; + +/* + * This structure contains the metadata for a single trace buffer. The head + * field, indexes into an array of struct t_rec's. + */ +struct t_buf { + /* Assume the data buffer size is X. X is generally not a power of 2. + * CONS and PROD are incremented modulo (2*X): + * 0 <= cons < 2*X + * 0 <= prod < 2*X + * This is done because addition modulo X breaks at 2^32 when X is not a + * power of 2: + * (((2^32 - 1) % X) + 1) % X != (2^32) % X + */ + uint32_t cons; /* Offset of next item to be consumed by control tools. */ + uint32_t prod; /* Offset of next item to be produced by Xen. */ + /* Records follow immediately after the meta-data header. */ +}; + +/* Structure used to pass MFNs to the trace buffers back to trace consumers. + * Offset is an offset into the mapped structure where the mfn list will be held. + * MFNs will be at ((unsigned long *)(t_info))+(t_info->cpu_offset[cpu]). + */ +struct t_info { + uint16_t tbuf_size; /* Size in pages of each trace buffer */ + uint16_t mfn_offset[]; /* Offset within t_info structure of the page list per cpu */ + /* MFN lists immediately after the header */ +}; + +#endif /* __XEN_PUBLIC_TRACE_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/version.h b/qemu/roms/ipxe/src/include/xen/version.h new file mode 100644 index 000000000..4e81ca0f1 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/version.h @@ -0,0 +1,98 @@ +/****************************************************************************** + * version.h + * + * Xen version, type, and compile information. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2005, Nguyen Anh Quynh <aquynh@gmail.com> + * Copyright (c) 2005, Keir Fraser <keir@xensource.com> + */ + +#ifndef __XEN_PUBLIC_VERSION_H__ +#define __XEN_PUBLIC_VERSION_H__ + +FILE_LICENCE ( MIT ); + +#include "xen.h" + +/* NB. All ops return zero on success, except XENVER_{version,pagesize} */ + +/* arg == NULL; returns major:minor (16:16). */ +#define XENVER_version 0 + +/* arg == xen_extraversion_t. */ +#define XENVER_extraversion 1 +typedef char xen_extraversion_t[16]; +#define XEN_EXTRAVERSION_LEN (sizeof(xen_extraversion_t)) + +/* arg == xen_compile_info_t. */ +#define XENVER_compile_info 2 +struct xen_compile_info { + char compiler[64]; + char compile_by[16]; + char compile_domain[32]; + char compile_date[32]; +}; +typedef struct xen_compile_info xen_compile_info_t; + +#define XENVER_capabilities 3 +typedef char xen_capabilities_info_t[1024]; +#define XEN_CAPABILITIES_INFO_LEN (sizeof(xen_capabilities_info_t)) + +#define XENVER_changeset 4 +typedef char xen_changeset_info_t[64]; +#define XEN_CHANGESET_INFO_LEN (sizeof(xen_changeset_info_t)) + +#define XENVER_platform_parameters 5 +struct xen_platform_parameters { + xen_ulong_t virt_start; +}; +typedef struct xen_platform_parameters xen_platform_parameters_t; + +#define XENVER_get_features 6 +struct xen_feature_info { + unsigned int submap_idx; /* IN: which 32-bit submap to return */ + uint32_t submap; /* OUT: 32-bit submap */ +}; +typedef struct xen_feature_info xen_feature_info_t; + +/* Declares the features reported by XENVER_get_features. */ +#include "features.h" + +/* arg == NULL; returns host memory page size. */ +#define XENVER_pagesize 7 + +/* arg == xen_domain_handle_t. */ +#define XENVER_guest_handle 8 + +#define XENVER_commandline 9 +typedef char xen_commandline_t[1024]; + +#endif /* __XEN_PUBLIC_VERSION_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/qemu/roms/ipxe/src/include/xen/xen-compat.h b/qemu/roms/ipxe/src/include/xen/xen-compat.h new file mode 100644 index 000000000..0ba6fca66 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/xen-compat.h @@ -0,0 +1,46 @@ +/****************************************************************************** + * xen-compat.h + * + * Guest OS interface to Xen. Compatibility layer. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2006, Christian Limpach + */ + +#ifndef __XEN_PUBLIC_XEN_COMPAT_H__ +#define __XEN_PUBLIC_XEN_COMPAT_H__ + +FILE_LICENCE ( MIT ); + +#define __XEN_LATEST_INTERFACE_VERSION__ 0x00040400 + +#if defined(__XEN__) || defined(__XEN_TOOLS__) +/* Xen is built with matching headers and implements the latest interface. */ +#define __XEN_INTERFACE_VERSION__ __XEN_LATEST_INTERFACE_VERSION__ +#elif !defined(__XEN_INTERFACE_VERSION__) +/* Guests which do not specify a version get the legacy interface. */ +#define __XEN_INTERFACE_VERSION__ 0x00000000 +#endif + +#if __XEN_INTERFACE_VERSION__ > __XEN_LATEST_INTERFACE_VERSION__ +#error "These header files do not support the requested interface version." +#endif + +#endif /* __XEN_PUBLIC_XEN_COMPAT_H__ */ diff --git a/qemu/roms/ipxe/src/include/xen/xen.h b/qemu/roms/ipxe/src/include/xen/xen.h new file mode 100644 index 000000000..2da521d23 --- /dev/null +++ b/qemu/roms/ipxe/src/include/xen/xen.h @@ -0,0 +1,901 @@ +/****************************************************************************** + * xen.h + * + * Guest OS interface to Xen. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright (c) 2004, K A Fraser + */ + +#ifndef __XEN_PUBLIC_XEN_H__ +#define __XEN_PUBLIC_XEN_H__ + +FILE_LICENCE ( MIT ); + +#include "xen-compat.h" + +#if defined(__i386__) || defined(__x86_64__) +#include "arch-x86/xen.h" +#elif defined(__arm__) || defined (__aarch64__) +#include "arch-arm.h" +#else +#error "Unsupported architecture" +#endif + +#ifndef __ASSEMBLY__ +/* Guest handles for primitive C types. */ +DEFINE_XEN_GUEST_HANDLE(char); +__DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char); +DEFINE_XEN_GUEST_HANDLE(int); +__DEFINE_XEN_GUEST_HANDLE(uint, unsigned int); +#if __XEN_INTERFACE_VERSION__ < 0x00040300 +DEFINE_XEN_GUEST_HANDLE(long); +__DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long); +#endif +DEFINE_XEN_GUEST_HANDLE(void); + +DEFINE_XEN_GUEST_HANDLE(uint64_t); +DEFINE_XEN_GUEST_HANDLE(xen_pfn_t); +DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); +#endif + +/* + * HYPERCALLS + */ + +/* `incontents 100 hcalls List of hypercalls + * ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*() + */ + +#define __HYPERVISOR_set_trap_table 0 +#define __HYPERVISOR_mmu_update 1 +#define __HYPERVISOR_set_gdt 2 +#define __HYPERVISOR_stack_switch 3 +#define __HYPERVISOR_set_callbacks 4 +#define __HYPERVISOR_fpu_taskswitch 5 +#define __HYPERVISOR_sched_op_compat 6 /* compat since 0x00030101 */ +#define __HYPERVISOR_platform_op 7 +#define __HYPERVISOR_set_debugreg 8 +#define __HYPERVISOR_get_debugreg 9 +#define __HYPERVISOR_update_descriptor 10 +#define __HYPERVISOR_memory_op 12 +#define __HYPERVISOR_multicall 13 +#define __HYPERVISOR_update_va_mapping 14 +#define __HYPERVISOR_set_timer_op 15 +#define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */ +#define __HYPERVISOR_xen_version 17 +#define __HYPERVISOR_console_io 18 +#define __HYPERVISOR_physdev_op_compat 19 /* compat since 0x00030202 */ +#define __HYPERVISOR_grant_table_op 20 +#define __HYPERVISOR_vm_assist 21 +#define __HYPERVISOR_update_va_mapping_otherdomain 22 +#define __HYPERVISOR_iret 23 /* x86 only */ +#define __HYPERVISOR_vcpu_op 24 +#define __HYPERVISOR_set_segment_base 25 /* x86/64 only */ +#define __HYPERVISOR_mmuext_op 26 +#define __HYPERVISOR_xsm_op 27 +#define __HYPERVISOR_nmi_op 28 +#define __HYPERVISOR_sched_op 29 +#define __HYPERVISOR_callback_op 30 +#define __HYPERVISOR_xenoprof_op 31 +#define __HYPERVISOR_event_channel_op 32 +#define __HYPERVISOR_physdev_op 33 +#define __HYPERVISOR_hvm_op 34 +#define __HYPERVISOR_sysctl 35 +#define __HYPERVISOR_domctl 36 +#define __HYPERVISOR_kexec_op 37 +#define __HYPERVISOR_tmem_op 38 +#define __HYPERVISOR_xc_reserved_op 39 /* reserved for XenClient */ + +/* Architecture-specific hypercall definitions. */ +#define __HYPERVISOR_arch_0 48 +#define __HYPERVISOR_arch_1 49 +#define __HYPERVISOR_arch_2 50 +#define __HYPERVISOR_arch_3 51 +#define __HYPERVISOR_arch_4 52 +#define __HYPERVISOR_arch_5 53 +#define __HYPERVISOR_arch_6 54 +#define __HYPERVISOR_arch_7 55 + +/* ` } */ + +/* + * HYPERCALL COMPATIBILITY. + */ + +/* New sched_op hypercall introduced in 0x00030101. */ +#if __XEN_INTERFACE_VERSION__ < 0x00030101 +#undef __HYPERVISOR_sched_op +#define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat +#endif + +/* New event-channel and physdev hypercalls introduced in 0x00030202. */ +#if __XEN_INTERFACE_VERSION__ < 0x00030202 +#undef __HYPERVISOR_event_channel_op +#define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat +#undef __HYPERVISOR_physdev_op +#define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat +#endif + +/* New platform_op hypercall introduced in 0x00030204. */ +#if __XEN_INTERFACE_VERSION__ < 0x00030204 +#define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op +#endif + +/* + * VIRTUAL INTERRUPTS + * + * Virtual interrupts that a guest OS may receive from Xen. + * + * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a + * global VIRQ. The former can be bound once per VCPU and cannot be re-bound. + * The latter can be allocated only once per guest: they must initially be + * allocated to VCPU0 but can subsequently be re-bound. + */ +/* ` enum virq { */ +#define VIRQ_TIMER 0 /* V. Timebase update, and/or requested timeout. */ +#define VIRQ_DEBUG 1 /* V. Request guest to dump debug info. */ +#define VIRQ_CONSOLE 2 /* G. (DOM0) Bytes received on emergency console. */ +#define VIRQ_DOM_EXC 3 /* G. (DOM0) Exceptional event for some domain. */ +#define VIRQ_TBUF 4 /* G. (DOM0) Trace buffer has records available. */ +#define VIRQ_DEBUGGER 6 /* G. (DOM0) A domain has paused for debugging. */ +#define VIRQ_XENOPROF 7 /* V. XenOprofile interrupt: new sample available */ +#define VIRQ_CON_RING 8 /* G. (DOM0) Bytes received on console */ +#define VIRQ_PCPU_STATE 9 /* G. (DOM0) PCPU state changed */ +#define VIRQ_MEM_EVENT 10 /* G. (DOM0) A memory event has occured */ +#define VIRQ_XC_RESERVED 11 /* G. Reserved for XenClient */ +#define VIRQ_ENOMEM 12 /* G. (DOM0) Low on heap memory */ + +/* Architecture-specific VIRQ definitions. */ +#define VIRQ_ARCH_0 16 +#define VIRQ_ARCH_1 17 +#define VIRQ_ARCH_2 18 +#define VIRQ_ARCH_3 19 +#define VIRQ_ARCH_4 20 +#define VIRQ_ARCH_5 21 +#define VIRQ_ARCH_6 22 +#define VIRQ_ARCH_7 23 +/* ` } */ + +#define NR_VIRQS 24 + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_mmu_update(const struct mmu_update reqs[], + * ` unsigned count, unsigned *done_out, + * ` unsigned foreigndom) + * ` + * @reqs is an array of mmu_update_t structures ((ptr, val) pairs). + * @count is the length of the above array. + * @pdone is an output parameter indicating number of completed operations + * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this + * hypercall invocation. Can be DOMID_SELF. + * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced + * in this hypercall invocation. The value of this field + * (x) encodes the PFD as follows: + * x == 0 => PFD == DOMID_SELF + * x != 0 => PFD == x - 1 + * + * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command. + * ------------- + * ptr[1:0] == MMU_NORMAL_PT_UPDATE: + * Updates an entry in a page table belonging to PFD. If updating an L1 table, + * and the new table entry is valid/present, the mapped frame must belong to + * FD. If attempting to map an I/O page then the caller assumes the privilege + * of the FD. + * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller. + * FD == DOMID_XEN: Map restricted areas of Xen's heap space. + * ptr[:2] -- Machine address of the page-table entry to modify. + * val -- Value to write. + * + * There also certain implicit requirements when using this hypercall. The + * pages that make up a pagetable must be mapped read-only in the guest. + * This prevents uncontrolled guest updates to the pagetable. Xen strictly + * enforces this, and will disallow any pagetable update which will end up + * mapping pagetable page RW, and will disallow using any writable page as a + * pagetable. In practice it means that when constructing a page table for a + * process, thread, etc, we MUST be very dilligient in following these rules: + * 1). Start with top-level page (PGD or in Xen language: L4). Fill out + * the entries. + * 2). Keep on going, filling out the upper (PUD or L3), and middle (PMD + * or L2). + * 3). Start filling out the PTE table (L1) with the PTE entries. Once + * done, make sure to set each of those entries to RO (so writeable bit + * is unset). Once that has been completed, set the PMD (L2) for this + * PTE table as RO. + * 4). When completed with all of the PMD (L2) entries, and all of them have + * been set to RO, make sure to set RO the PUD (L3). Do the same + * operation on PGD (L4) pagetable entries that have a PUD (L3) entry. + * 5). Now before you can use those pages (so setting the cr3), you MUST also + * pin them so that the hypervisor can verify the entries. This is done + * via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame + * number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op( + * MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be + * issued. + * For 32-bit guests, the L4 is not used (as there is less pagetables), so + * instead use L3. + * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE + * hypercall. Also if so desired the OS can also try to write to the PTE + * and be trapped by the hypervisor (as the PTE entry is RO). + * + * To deallocate the pages, the operations are the reverse of the steps + * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the + * pagetable MUST not be in use (meaning that the cr3 is not set to it). + * + * ptr[1:0] == MMU_MACHPHYS_UPDATE: + * Updates an entry in the machine->pseudo-physical mapping table. + * ptr[:2] -- Machine address within the frame whose mapping to modify. + * The frame must belong to the FD, if one is specified. + * val -- Value to write into the mapping entry. + * + * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD: + * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed + * with those in @val. + * + * @val is usually the machine frame number along with some attributes. + * The attributes by default follow the architecture defined bits. Meaning that + * if this is a X86_64 machine and four page table layout is used, the layout + * of val is: + * - 63 if set means No execute (NX) + * - 46-13 the machine frame number + * - 12 available for guest + * - 11 available for guest + * - 10 available for guest + * - 9 available for guest + * - 8 global + * - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages) + * - 6 dirty + * - 5 accessed + * - 4 page cached disabled + * - 3 page write through + * - 2 userspace accessible + * - 1 writeable + * - 0 present + * + * The one bits that does not fit with the default layout is the PAGE_PSE + * also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the + * HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB + * (or 2MB) instead of using the PAGE_PSE bit. + * + * The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen + * using it as the Page Attribute Table (PAT) bit - for details on it please + * refer to Intel SDM 10.12. The PAT allows to set the caching attributes of + * pages instead of using MTRRs. + * + * The PAT MSR is as follows (it is a 64-bit value, each entry is 8 bits): + * PAT4 PAT0 + * +-----+-----+----+----+----+-----+----+----+ + * | UC | UC- | WC | WB | UC | UC- | WC | WB | <= Linux + * +-----+-----+----+----+----+-----+----+----+ + * | UC | UC- | WT | WB | UC | UC- | WT | WB | <= BIOS (default when machine boots) + * +-----+-----+----+----+----+-----+----+----+ + * | rsv | rsv | WP | WC | UC | UC- | WT | WB | <= Xen + * +-----+-----+----+----+----+-----+----+----+ + * + * The lookup of this index table translates to looking up + * Bit 7, Bit 4, and Bit 3 of val entry: + * + * PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3). + * + * If all bits are off, then we are using PAT0. If bit 3 turned on, + * then we are using PAT1, if bit 3 and bit 4, then PAT2.. + * + * As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means + * that if a guest that follows Linux's PAT setup and would like to set Write + * Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is + * set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the + * caching as: + * + * WB = none (so PAT0) + * WC = PWT (bit 3 on) + * UC = PWT | PCD (bit 3 and 4 are on). + * + * To make it work with Xen, it needs to translate the WC bit as so: + * + * PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3 + * + * And to translate back it would: + * + * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7. + */ +#define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */ +#define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */ +#define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */ + +/* + * MMU EXTENDED OPERATIONS + * + * ` enum neg_errnoval + * ` HYPERVISOR_mmuext_op(mmuext_op_t uops[], + * ` unsigned int count, + * ` unsigned int *pdone, + * ` unsigned int foreigndom) + */ +/* HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures. + * A foreigndom (FD) can be specified (or DOMID_SELF for none). + * Where the FD has some effect, it is described below. + * + * cmd: MMUEXT_(UN)PIN_*_TABLE + * mfn: Machine frame number to be (un)pinned as a p.t. page. + * The frame must belong to the FD, if one is specified. + * + * cmd: MMUEXT_NEW_BASEPTR + * mfn: Machine frame number of new page-table base to install in MMU. + * + * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only] + * mfn: Machine frame number of new page-table base to install in MMU + * when in user space. + * + * cmd: MMUEXT_TLB_FLUSH_LOCAL + * No additional arguments. Flushes local TLB. + * + * cmd: MMUEXT_INVLPG_LOCAL + * linear_addr: Linear address to be flushed from the local TLB. + * + * cmd: MMUEXT_TLB_FLUSH_MULTI + * vcpumask: Pointer to bitmap of VCPUs to be flushed. + * + * cmd: MMUEXT_INVLPG_MULTI + * linear_addr: Linear address to be flushed. + * vcpumask: Pointer to bitmap of VCPUs to be flushed. + * + * cmd: MMUEXT_TLB_FLUSH_ALL + * No additional arguments. Flushes all VCPUs' TLBs. + * + * cmd: MMUEXT_INVLPG_ALL + * linear_addr: Linear address to be flushed from all VCPUs' TLBs. + * + * cmd: MMUEXT_FLUSH_CACHE + * No additional arguments. Writes back and flushes cache contents. + * + * cmd: MMUEXT_FLUSH_CACHE_GLOBAL + * No additional arguments. Writes back and flushes cache contents + * on all CPUs in the system. + * + * cmd: MMUEXT_SET_LDT + * linear_addr: Linear address of LDT base (NB. must be page-aligned). + * nr_ents: Number of entries in LDT. + * + * cmd: MMUEXT_CLEAR_PAGE + * mfn: Machine frame number to be cleared. + * + * cmd: MMUEXT_COPY_PAGE + * mfn: Machine frame number of the destination page. + * src_mfn: Machine frame number of the source page. + * + * cmd: MMUEXT_[UN]MARK_SUPER + * mfn: Machine frame number of head of superpage to be [un]marked. + */ +/* ` enum mmuext_cmd { */ +#define MMUEXT_PIN_L1_TABLE 0 +#define MMUEXT_PIN_L2_TABLE 1 +#define MMUEXT_PIN_L3_TABLE 2 +#define MMUEXT_PIN_L4_TABLE 3 +#define MMUEXT_UNPIN_TABLE 4 +#define MMUEXT_NEW_BASEPTR 5 +#define MMUEXT_TLB_FLUSH_LOCAL 6 +#define MMUEXT_INVLPG_LOCAL 7 +#define MMUEXT_TLB_FLUSH_MULTI 8 +#define MMUEXT_INVLPG_MULTI 9 +#define MMUEXT_TLB_FLUSH_ALL 10 +#define MMUEXT_INVLPG_ALL 11 +#define MMUEXT_FLUSH_CACHE 12 +#define MMUEXT_SET_LDT 13 +#define MMUEXT_NEW_USER_BASEPTR 15 +#define MMUEXT_CLEAR_PAGE 16 +#define MMUEXT_COPY_PAGE 17 +#define MMUEXT_FLUSH_CACHE_GLOBAL 18 +#define MMUEXT_MARK_SUPER 19 +#define MMUEXT_UNMARK_SUPER 20 +/* ` } */ + +#ifndef __ASSEMBLY__ +struct mmuext_op { + unsigned int cmd; /* => enum mmuext_cmd */ + union { + /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR + * CLEAR_PAGE, COPY_PAGE, [UN]MARK_SUPER */ + xen_pfn_t mfn; + /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */ + unsigned long linear_addr; + } arg1; + union { + /* SET_LDT */ + unsigned int nr_ents; + /* TLB_FLUSH_MULTI, INVLPG_MULTI */ +#if __XEN_INTERFACE_VERSION__ >= 0x00030205 + XEN_GUEST_HANDLE(const_void) vcpumask; +#else + const void *vcpumask; +#endif + /* COPY_PAGE */ + xen_pfn_t src_mfn; + } arg2; +}; +typedef struct mmuext_op mmuext_op_t; +DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); +#endif + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_update_va_mapping(unsigned long va, u64 val, + * ` enum uvm_flags flags) + * ` + * ` enum neg_errnoval + * ` HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, u64 val, + * ` enum uvm_flags flags, + * ` domid_t domid) + * ` + * ` @va: The virtual address whose mapping we want to change + * ` @val: The new page table entry, must contain a machine address + * ` @flags: Control TLB flushes + */ +/* These are passed as 'flags' to update_va_mapping. They can be ORed. */ +/* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */ +/* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */ +/* ` enum uvm_flags { */ +#define UVMF_NONE (0UL<<0) /* No flushing at all. */ +#define UVMF_TLB_FLUSH (1UL<<0) /* Flush entire TLB(s). */ +#define UVMF_INVLPG (2UL<<0) /* Flush only one entry. */ +#define UVMF_FLUSHTYPE_MASK (3UL<<0) +#define UVMF_MULTI (0UL<<2) /* Flush subset of TLBs. */ +#define UVMF_LOCAL (0UL<<2) /* Flush local TLB. */ +#define UVMF_ALL (1UL<<2) /* Flush all TLBs. */ +/* ` } */ + +/* + * Commands to HYPERVISOR_console_io(). + */ +#define CONSOLEIO_write 0 +#define CONSOLEIO_read 1 + +/* + * Commands to HYPERVISOR_vm_assist(). + */ +#define VMASST_CMD_enable 0 +#define VMASST_CMD_disable 1 + +/* x86/32 guests: simulate full 4GB segment limits. */ +#define VMASST_TYPE_4gb_segments 0 + +/* x86/32 guests: trap (vector 15) whenever above vmassist is used. */ +#define VMASST_TYPE_4gb_segments_notify 1 + +/* + * x86 guests: support writes to bottom-level PTEs. + * NB1. Page-directory entries cannot be written. + * NB2. Guest must continue to remove all writable mappings of PTEs. + */ +#define VMASST_TYPE_writable_pagetables 2 + +/* x86/PAE guests: support PDPTs above 4GB. */ +#define VMASST_TYPE_pae_extended_cr3 3 + +#define MAX_VMASST_TYPE 3 + +#ifndef __ASSEMBLY__ + +typedef uint16_t domid_t; + +/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */ +#define DOMID_FIRST_RESERVED (0x7FF0U) + +/* DOMID_SELF is used in certain contexts to refer to oneself. */ +#define DOMID_SELF (0x7FF0U) + +/* + * DOMID_IO is used to restrict page-table updates to mapping I/O memory. + * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO + * is useful to ensure that no mappings to the OS's own heap are accidentally + * installed. (e.g., in Linux this could cause havoc as reference counts + * aren't adjusted on the I/O-mapping code path). + * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can + * be specified by any calling domain. + */ +#define DOMID_IO (0x7FF1U) + +/* + * DOMID_XEN is used to allow privileged domains to map restricted parts of + * Xen's heap space (e.g., the machine_to_phys table). + * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if + * the caller is privileged. + */ +#define DOMID_XEN (0x7FF2U) + +/* + * DOMID_COW is used as the owner of sharable pages */ +#define DOMID_COW (0x7FF3U) + +/* DOMID_INVALID is used to identify pages with unknown owner. */ +#define DOMID_INVALID (0x7FF4U) + +/* Idle domain. */ +#define DOMID_IDLE (0x7FFFU) + +/* + * Send an array of these to HYPERVISOR_mmu_update(). + * NB. The fields are natural pointer/address size for this architecture. + */ +struct mmu_update { + uint64_t ptr; /* Machine address of PTE. */ + uint64_t val; /* New contents of PTE. */ +}; +typedef struct mmu_update mmu_update_t; +DEFINE_XEN_GUEST_HANDLE(mmu_update_t); + +/* + * ` enum neg_errnoval + * ` HYPERVISOR_multicall(multicall_entry_t call_list[], + * ` uint32_t nr_calls); + * + * NB. The fields are logically the natural register size for this + * architecture. In cases where xen_ulong_t is larger than this then + * any unused bits in the upper portion must be zero. + */ +struct multicall_entry { + xen_ulong_t op, result; + xen_ulong_t args[6]; +}; +typedef struct multicall_entry multicall_entry_t; +DEFINE_XEN_GUEST_HANDLE(multicall_entry_t); + +#if __XEN_INTERFACE_VERSION__ < 0x00040400 +/* + * Event channel endpoints per domain (when using the 2-level ABI): + * 1024 if a long is 32 bits; 4096 if a long is 64 bits. + */ +#define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS +#endif + +struct vcpu_time_info { + /* + * Updates to the following values are preceded and followed by an + * increment of 'version'. The guest can therefore detect updates by + * looking for changes to 'version'. If the least-significant bit of + * the version number is set then an update is in progress and the guest + * must wait to read a consistent set of values. + * The correct way to interact with the version number is similar to + * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry. + */ + uint32_t version; + uint32_t pad0; + uint64_t tsc_timestamp; /* TSC at last update of time vals. */ + uint64_t system_time; /* Time, in nanosecs, since boot. */ + /* + * Current system time: + * system_time + + * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32) + * CPU frequency (Hz): + * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift + */ + uint32_t tsc_to_system_mul; + int8_t tsc_shift; + int8_t pad1[3]; +}; /* 32 bytes */ +typedef struct vcpu_time_info vcpu_time_info_t; + +struct vcpu_info { + /* + * 'evtchn_upcall_pending' is written non-zero by Xen to indicate + * a pending notification for a particular VCPU. It is then cleared + * by the guest OS /before/ checking for pending work, thus avoiding + * a set-and-check race. Note that the mask is only accessed by Xen + * on the CPU that is currently hosting the VCPU. This means that the + * pending and mask flags can be updated by the guest without special + * synchronisation (i.e., no need for the x86 LOCK prefix). + * This may seem suboptimal because if the pending flag is set by + * a different CPU then an IPI may be scheduled even when the mask + * is set. However, note: + * 1. The task of 'interrupt holdoff' is covered by the per-event- + * channel mask bits. A 'noisy' event that is continually being + * triggered can be masked at source at this very precise + * granularity. + * 2. The main purpose of the per-VCPU mask is therefore to restrict + * reentrant execution: whether for concurrency control, or to + * prevent unbounded stack usage. Whatever the purpose, we expect + * that the mask will be asserted only for short periods at a time, + * and so the likelihood of a 'spurious' IPI is suitably small. + * The mask is read before making an event upcall to the guest: a + * non-zero mask therefore guarantees that the VCPU will not receive + * an upcall activation. The mask is cleared when the VCPU requests + * to block: this avoids wakeup-waiting races. + */ + uint8_t evtchn_upcall_pending; +#ifdef XEN_HAVE_PV_UPCALL_MASK + uint8_t evtchn_upcall_mask; +#else /* XEN_HAVE_PV_UPCALL_MASK */ + uint8_t pad0; +#endif /* XEN_HAVE_PV_UPCALL_MASK */ + xen_ulong_t evtchn_pending_sel; + struct arch_vcpu_info arch; + struct vcpu_time_info time; +}; /* 64 bytes (x86) */ +#ifndef __XEN__ +typedef struct vcpu_info vcpu_info_t; +#endif + +/* + * `incontents 200 startofday_shared Start-of-day shared data structure + * Xen/kernel shared data -- pointer provided in start_info. + * + * This structure is defined to be both smaller than a page, and the + * only data on the shared page, but may vary in actual size even within + * compatible Xen versions; guests should not rely on the size + * of this structure remaining constant. + */ +struct shared_info { + struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS]; + + /* + * A domain can create "event channels" on which it can send and receive + * asynchronous event notifications. There are three classes of event that + * are delivered by this mechanism: + * 1. Bi-directional inter- and intra-domain connections. Domains must + * arrange out-of-band to set up a connection (usually by allocating + * an unbound 'listener' port and avertising that via a storage service + * such as xenstore). + * 2. Physical interrupts. A domain with suitable hardware-access + * privileges can bind an event-channel port to a physical interrupt + * source. + * 3. Virtual interrupts ('events'). A domain can bind an event-channel + * port to a virtual interrupt source, such as the virtual-timer + * device or the emergency console. + * + * Event channels are addressed by a "port index". Each channel is + * associated with two bits of information: + * 1. PENDING -- notifies the domain that there is a pending notification + * to be processed. This bit is cleared by the guest. + * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING + * will cause an asynchronous upcall to be scheduled. This bit is only + * updated by the guest. It is read-only within Xen. If a channel + * becomes pending while the channel is masked then the 'edge' is lost + * (i.e., when the channel is unmasked, the guest must manually handle + * pending notifications as no upcall will be scheduled by Xen). + * + * To expedite scanning of pending notifications, any 0->1 pending + * transition on an unmasked channel causes a corresponding bit in a + * per-vcpu selector word to be set. Each bit in the selector covers a + * 'C long' in the PENDING bitfield array. + */ + xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8]; + xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8]; + + /* + * Wallclock time: updated only by control software. Guests should base + * their gettimeofday() syscall on this wallclock-base value. + */ + uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */ + uint32_t wc_sec; /* Secs 00:00:00 UTC, Jan 1, 1970. */ + uint32_t wc_nsec; /* Nsecs 00:00:00 UTC, Jan 1, 1970. */ + + struct arch_shared_info arch; + +}; +#ifndef __XEN__ +typedef struct shared_info shared_info_t; +#endif + +/* + * `incontents 200 startofday Start-of-day memory layout + * + * 1. The domain is started within contiguous virtual-memory region. + * 2. The contiguous region ends on an aligned 4MB boundary. + * 3. This the order of bootstrap elements in the initial virtual region: + * a. relocated kernel image + * b. initial ram disk [mod_start, mod_len] + * c. list of allocated page frames [mfn_list, nr_pages] + * (unless relocated due to XEN_ELFNOTE_INIT_P2M) + * d. start_info_t structure [register ESI (x86)] + * e. bootstrap page tables [pt_base and CR3 (x86)] + * f. bootstrap stack [register ESP (x86)] + * 4. Bootstrap elements are packed together, but each is 4kB-aligned. + * 5. The initial ram disk may be omitted. + * 6. The list of page frames forms a contiguous 'pseudo-physical' memory + * layout for the domain. In particular, the bootstrap virtual-memory + * region is a 1:1 mapping to the first section of the pseudo-physical map. + * 7. All bootstrap elements are mapped read-writable for the guest OS. The + * only exception is the bootstrap page table, which is mapped read-only. + * 8. There is guaranteed to be at least 512kB padding after the final + * bootstrap element. If necessary, the bootstrap virtual region is + * extended by an extra 4MB to ensure this. + * + * Note: Prior to 25833:bb85bbccb1c9. ("x86/32-on-64 adjust Dom0 initial page + * table layout") a bug caused the pt_base (3.e above) and cr3 to not point + * to the start of the guest page tables (it was offset by two pages). + * This only manifested itself on 32-on-64 dom0 kernels and not 32-on-64 domU + * or 64-bit kernels of any colour. The page tables for a 32-on-64 dom0 got + * allocated in the order: 'first L1','first L2', 'first L3', so the offset + * to the page table base is by two pages back. The initial domain if it is + * 32-bit and runs under a 64-bit hypervisor should _NOT_ use two of the + * pages preceding pt_base and mark them as reserved/unused. + */ +#ifdef XEN_HAVE_PV_GUEST_ENTRY +struct start_info { + /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */ + char magic[32]; /* "xen-<version>-<platform>". */ + unsigned long nr_pages; /* Total pages allocated to this domain. */ + unsigned long shared_info; /* MACHINE address of shared info struct. */ + uint32_t flags; /* SIF_xxx flags. */ + xen_pfn_t store_mfn; /* MACHINE page number of shared page. */ + uint32_t store_evtchn; /* Event channel for store communication. */ + union { + struct { + xen_pfn_t mfn; /* MACHINE page number of console page. */ + uint32_t evtchn; /* Event channel for console page. */ + } domU; + struct { + uint32_t info_off; /* Offset of console_info struct. */ + uint32_t info_size; /* Size of console_info struct from start.*/ + } dom0; + } console; + /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */ + unsigned long pt_base; /* VIRTUAL address of page directory. */ + unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */ + unsigned long mfn_list; /* VIRTUAL address of page-frame list. */ + unsigned long mod_start; /* VIRTUAL address of pre-loaded module */ + /* (PFN of pre-loaded module if */ + /* SIF_MOD_START_PFN set in flags). */ + unsigned long mod_len; /* Size (bytes) of pre-loaded module. */ +#define MAX_GUEST_CMDLINE 1024 + int8_t cmd_line[MAX_GUEST_CMDLINE]; + /* The pfn range here covers both page table and p->m table frames. */ + unsigned long first_p2m_pfn;/* 1st pfn forming initial P->M table. */ + unsigned long nr_p2m_frames;/* # of pfns forming initial P->M table. */ +}; +typedef struct start_info start_info_t; + +/* New console union for dom0 introduced in 0x00030203. */ +#if __XEN_INTERFACE_VERSION__ < 0x00030203 +#define console_mfn console.domU.mfn +#define console_evtchn console.domU.evtchn +#endif +#endif /* XEN_HAVE_PV_GUEST_ENTRY */ + +/* These flags are passed in the 'flags' field of start_info_t. */ +#define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */ +#define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */ +#define SIF_MULTIBOOT_MOD (1<<2) /* Is mod_start a multiboot module? */ +#define SIF_MOD_START_PFN (1<<3) /* Is mod_start a PFN? */ +#define SIF_PM_MASK (0xFF<<8) /* reserve 1 byte for xen-pm options */ + +/* + * A multiboot module is a package containing modules very similar to a + * multiboot module array. The only differences are: + * - the array of module descriptors is by convention simply at the beginning + * of the multiboot module, + * - addresses in the module descriptors are based on the beginning of the + * multiboot module, + * - the number of modules is determined by a termination descriptor that has + * mod_start == 0. + * + * This permits to both build it statically and reference it in a configuration + * file, and let the PV guest easily rebase the addresses to virtual addresses + * and at the same time count the number of modules. + */ +struct xen_multiboot_mod_list +{ + /* Address of first byte of the module */ + uint32_t mod_start; + /* Address of last byte of the module (inclusive) */ + uint32_t mod_end; + /* Address of zero-terminated command line */ + uint32_t cmdline; + /* Unused, must be zero */ + uint32_t pad; +}; +/* + * `incontents 200 startofday_dom0_console Dom0_console + * + * The console structure in start_info.console.dom0 + * + * This structure includes a variety of information required to + * have a working VGA/VESA console. + */ +typedef struct dom0_vga_console_info { + uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */ +#define XEN_VGATYPE_TEXT_MODE_3 0x03 +#define XEN_VGATYPE_VESA_LFB 0x23 +#define XEN_VGATYPE_EFI_LFB 0x70 + + union { + struct { + /* Font height, in pixels. */ + uint16_t font_height; + /* Cursor location (column, row). */ + uint16_t cursor_x, cursor_y; + /* Number of rows and columns (dimensions in characters). */ + uint16_t rows, columns; + } text_mode_3; + + struct { + /* Width and height, in pixels. */ + uint16_t width, height; + /* Bytes per scan line. */ + uint16_t bytes_per_line; + /* Bits per pixel. */ + uint16_t bits_per_pixel; + /* LFB physical address, and size (in units of 64kB). */ + uint32_t lfb_base; + uint32_t lfb_size; + /* RGB mask offsets and sizes, as defined by VBE 1.2+ */ + uint8_t red_pos, red_size; + uint8_t green_pos, green_size; + uint8_t blue_pos, blue_size; + uint8_t rsvd_pos, rsvd_size; +#if __XEN_INTERFACE_VERSION__ >= 0x00030206 + /* VESA capabilities (offset 0xa, VESA command 0x4f00). */ + uint32_t gbl_caps; + /* Mode attributes (offset 0x0, VESA command 0x4f01). */ + uint16_t mode_attrs; +#endif + } vesa_lfb; + } u; +} dom0_vga_console_info_t; +#define xen_vga_console_info dom0_vga_console_info +#define xen_vga_console_info_t dom0_vga_console_info_t + +typedef uint8_t xen_domain_handle_t[16]; + +/* Turn a plain number into a C unsigned long constant. */ +#define __mk_unsigned_long(x) x ## UL +#define mk_unsigned_long(x) __mk_unsigned_long(x) + +__DEFINE_XEN_GUEST_HANDLE(uint8, uint8_t); +__DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t); +__DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t); +__DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t); + +#else /* __ASSEMBLY__ */ + +/* In assembly code we cannot use C numeric constant suffixes. */ +#define mk_unsigned_long(x) x + +#endif /* !__ASSEMBLY__ */ + +/* Default definitions for macros used by domctl/sysctl. */ +#if defined(__XEN__) || defined(__XEN_TOOLS__) + +#ifndef uint64_aligned_t +#define uint64_aligned_t uint64_t +#endif +#ifndef XEN_GUEST_HANDLE_64 +#define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name) +#endif + +#ifndef __ASSEMBLY__ +struct xenctl_bitmap { + XEN_GUEST_HANDLE_64(uint8) bitmap; + uint32_t nr_bits; +}; +#endif + +#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ + +#endif /* __XEN_PUBLIC_XEN_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ |