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author | 2015-08-28 09:58:54 +0800 | |
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committer | 2015-09-01 12:44:00 +0800 | |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/ipxe/src/arch/x86/core/cpuid.c | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/ipxe/src/arch/x86/core/cpuid.c')
-rw-r--r-- | qemu/roms/ipxe/src/arch/x86/core/cpuid.c | 137 |
1 files changed, 137 insertions, 0 deletions
diff --git a/qemu/roms/ipxe/src/arch/x86/core/cpuid.c b/qemu/roms/ipxe/src/arch/x86/core/cpuid.c new file mode 100644 index 000000000..5908f4419 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86/core/cpuid.c @@ -0,0 +1,137 @@ +/* + * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <string.h> +#include <ipxe/cpuid.h> + +/** @file + * + * x86 CPU feature detection + * + */ + +/** + * Check whether or not CPUID instruction is supported + * + * @ret is_supported CPUID instruction is supported + */ +int cpuid_is_supported ( void ) { + unsigned long original; + unsigned long inverted; + + __asm__ ( "pushf\n\t" + "pushf\n\t" + "pop %0\n\t" + "mov %0,%1\n\t" + "xor %2,%1\n\t" + "push %1\n\t" + "popf\n\t" + "pushf\n\t" + "pop %1\n\t" + "popf\n\t" + : "=&r" ( original ), "=&r" ( inverted ) + : "ir" ( CPUID_FLAG ) ); + return ( ( original ^ inverted ) & CPUID_FLAG ); +} + +/** + * Get Intel-defined x86 CPU features + * + * @v features x86 CPU features to fill in + */ +static void x86_intel_features ( struct x86_features *features ) { + uint32_t max_level; + uint32_t discard_a; + uint32_t discard_b; + uint32_t discard_c; + uint32_t discard_d; + + /* Check that features are available via CPUID */ + cpuid ( CPUID_VENDOR_ID, &max_level, &discard_b, &discard_c, + &discard_d ); + if ( max_level < CPUID_FEATURES ) { + DBGC ( features, "CPUID has no Intel-defined features (max " + "level %08x)\n", max_level ); + return; + } + + /* Get features */ + cpuid ( CPUID_FEATURES, &discard_a, &discard_b, + &features->intel.ecx, &features->intel.edx ); + DBGC ( features, "CPUID Intel features: %%ecx=%08x, %%edx=%08x\n", + features->intel.ecx, features->intel.edx ); + +} + +/** + * Get AMD-defined x86 CPU features + * + * @v features x86 CPU features to fill in + */ +static void x86_amd_features ( struct x86_features *features ) { + uint32_t max_level; + uint32_t discard_a; + uint32_t discard_b; + uint32_t discard_c; + uint32_t discard_d; + + /* Check that features are available via CPUID */ + cpuid ( CPUID_AMD_MAX_FN, &max_level, &discard_b, &discard_c, + &discard_d ); + if ( ( max_level & CPUID_AMD_CHECK_MASK ) != CPUID_AMD_CHECK ) { + DBGC ( features, "CPUID has no extended functions\n" ); + return; + } + if ( max_level < CPUID_AMD_FEATURES ) { + DBGC ( features, "CPUID has no AMD-defined features (max " + "level %08x)\n", max_level ); + return; + } + + /* Get features */ + cpuid ( CPUID_AMD_FEATURES, &discard_a, &discard_b, + &features->amd.ecx, &features->amd.edx ); + DBGC ( features, "CPUID AMD features: %%ecx=%08x, %%edx=%08x\n", + features->amd.ecx, features->amd.edx ); +} + +/** + * Get x86 CPU features + * + * @v features x86 CPU features to fill in + */ +void x86_features ( struct x86_features *features ) { + + /* Clear all features */ + memset ( features, 0, sizeof ( *features ) ); + + /* Check that CPUID instruction is available */ + if ( ! cpuid_is_supported() ) { + DBGC ( features, "CPUID instruction is not supported\n" ); + return; + } + + /* Get Intel-defined features */ + x86_intel_features ( features ); + + /* Get AMD-defined features */ + x86_amd_features ( features ); +} |