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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/SLOF/board-js2x/rtas/rtas_pci.c
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/SLOF/board-js2x/rtas/rtas_pci.c')
-rw-r--r--qemu/roms/SLOF/board-js2x/rtas/rtas_pci.c116
1 files changed, 116 insertions, 0 deletions
diff --git a/qemu/roms/SLOF/board-js2x/rtas/rtas_pci.c b/qemu/roms/SLOF/board-js2x/rtas/rtas_pci.c
new file mode 100644
index 000000000..55dbf5336
--- /dev/null
+++ b/qemu/roms/SLOF/board-js2x/rtas/rtas_pci.c
@@ -0,0 +1,116 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2008 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ * IBM Corporation - initial implementation
+ *****************************************************************************/
+#include <stdint.h>
+#include <rtas.h>
+#include <hw.h>
+#include "rtas_board.h"
+
+void
+rtas_ibm_read_pci_config (rtas_args_t *rtas_args)
+{
+ int retVal = 0;
+ uint64_t addr = ((uint64_t) rtas_args->args[1]) << 32; // high 32 bits of PHB UID
+ addr |= (rtas_args->args[2] & 0xFFFFFFFF); // low 32 bits of PHB UID
+ addr |= (rtas_args->args[0] & 0x00FFFFFF); // bus, devfn, offset
+ unsigned int size = rtas_args->args[3];
+
+ /* Check for bus != 0 on PCI/PCI-X (PHB UID = 0xf2000000) */
+ if (((addr & 0xf2000000) == 0xf2000000) && (addr & 0xff0000))
+ addr += 0x1000000;
+
+ if (size == 1)
+ rtas_args->args[5] = load8_ci(addr);
+ else if (size == 2)
+ rtas_args->args[5] = bswap16_load(addr);
+ else if (size == 4)
+ rtas_args->args[5] = bswap32_load(addr);
+ else
+ retVal = -3; /* Bad arguments */
+
+ rtas_args->args[4] = retVal;
+}
+
+void
+rtas_ibm_write_pci_config (rtas_args_t *rtas_args)
+{
+ int retVal = 0;
+ uint64_t addr = ((uint64_t) rtas_args->args[1]) << 32; // high 32 bits of PHB UID
+ addr |= (rtas_args->args[2] & 0xFFFFFFFF); // low 32 bits of PHB UID
+ addr |= (rtas_args->args[0] & 0x00FFFFFF); // bus, devfn, offset
+ unsigned int size = rtas_args->args[3];
+
+ addr |= 0xf2000000;
+
+ /* Check for bus != 0 on PCI/PCI-X (PHB UID = 0xf2000000) */
+ if (((addr & 0xf2000000) == 0xf2000000) && (addr & 0xff0000))
+ addr += 0x1000000;
+
+ if (size == 1)
+ store8_ci(addr, rtas_args->args[4]);
+ else if (size == 2)
+ bswap16_store(addr, rtas_args->args[4]);
+ else if (size == 4)
+ bswap32_store(addr, rtas_args->args[4]);
+ else
+ retVal = -3; /* Bad arguments */
+
+ rtas_args->args[5] = retVal;
+}
+
+void
+rtas_read_pci_config (rtas_args_t *rtas_args)
+{
+ int retVal = 0;
+ unsigned long addr = rtas_args->args[0];
+ unsigned int size = rtas_args->args[1];
+ addr |= 0xf2000000;
+
+ /* Check for bus != 0 */
+ if (addr & 0xff0000)
+ addr += 0x1000000;
+
+ if (size == 1)
+ rtas_args->args[3] = load8_ci(addr);
+ else if (size == 2)
+ rtas_args->args[3] = bswap16_load(addr);
+ else if (size == 4)
+ rtas_args->args[3] = bswap32_load(addr);
+ else
+ retVal = -3; /* Bad arguments */
+
+ rtas_args->args[2] = retVal;
+}
+
+void
+rtas_write_pci_config (rtas_args_t *rtas_args)
+{
+ int retVal = 0;
+ unsigned long addr = rtas_args->args[0];
+ unsigned int size = rtas_args->args[1];
+
+ addr |= 0xf2000000;
+
+ /* Check for bus != 0 */
+ if (addr & 0xff0000)
+ addr += 0x1000000;
+
+ if (size == 1)
+ store8_ci(addr, rtas_args->args[2]);
+ else if (size == 2)
+ bswap16_store(addr, rtas_args->args[2]);
+ else if (size == 4)
+ bswap32_store(addr, rtas_args->args[2]);
+ else
+ retVal = -3; /* Bad arguments */
+
+ rtas_args->args[3] = retVal;
+}