diff options
| author |   RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
|---|---|---|
| committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
| commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
| tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/include/hw/misc/mips_cmgcr.h | |
| parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) | |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/include/hw/misc/mips_cmgcr.h')
| -rw-r--r-- | qemu/include/hw/misc/mips_cmgcr.h | 59 |
1 files changed, 0 insertions, 59 deletions
diff --git a/qemu/include/hw/misc/mips_cmgcr.h b/qemu/include/hw/misc/mips_cmgcr.h deleted file mode 100644 index cc60eefa5..000000000 --- a/qemu/include/hw/misc/mips_cmgcr.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2015 Imagination Technologies - * - */ - -#ifndef _MIPS_GCR_H -#define _MIPS_GCR_H - -#define TYPE_MIPS_GCR "mips-gcr" -#define MIPS_GCR(obj) OBJECT_CHECK(MIPSGCRState, (obj), TYPE_MIPS_GCR) - -#define GCR_BASE_ADDR 0x1fbf8000ULL -#define GCR_ADDRSPACE_SZ 0x8000 - -/* Offsets to register blocks */ -#define MIPS_GCB_OFS 0x0000 /* Global Control Block */ -#define MIPS_CLCB_OFS 0x2000 /* Core Local Control Block */ -#define MIPS_COCB_OFS 0x4000 /* Core Other Control Block */ -#define MIPS_GDB_OFS 0x6000 /* Global Debug Block */ - -/* Global Control Block Register Map */ -#define GCR_CONFIG_OFS 0x0000 -#define GCR_BASE_OFS 0x0008 -#define GCR_REV_OFS 0x0030 -#define GCR_CPC_BASE_OFS 0x0088 -#define GCR_CPC_STATUS_OFS 0x00F0 -#define GCR_L2_CONFIG_OFS 0x0130 - -/* Core Local and Core Other Block Register Map */ -#define GCR_CL_CONFIG_OFS 0x0010 -#define GCR_CL_OTHER_OFS 0x0018 - -/* GCR_L2_CONFIG register fields */ -#define GCR_L2_CONFIG_BYPASS_SHF 20 -#define GCR_L2_CONFIG_BYPASS_MSK ((0x1ULL) << GCR_L2_CONFIG_BYPASS_SHF) - -/* GCR_CPC_BASE register fields */ -#define GCR_CPC_BASE_CPCEN_MSK 1 -#define GCR_CPC_BASE_CPCBASE_MSK 0xFFFFFFFF8000ULL -#define GCR_CPC_BASE_MSK (GCR_CPC_BASE_CPCEN_MSK | GCR_CPC_BASE_CPCBASE_MSK) - -typedef struct MIPSGCRState MIPSGCRState; -struct MIPSGCRState { - SysBusDevice parent_obj; - - int32_t gcr_rev; - int32_t num_vps; - hwaddr gcr_base; - MemoryRegion iomem; - MemoryRegion *cpc_mr; - - uint64_t cpc_base; -}; - -#endif /* _MIPS_GCR_H */ |