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authorDon Dugger <n0ano@n0ano.com>2016-06-03 03:33:22 +0000
committerGerrit Code Review <gerrit@172.30.200.206>2016-06-03 03:33:23 +0000
commitda27230f80795d0028333713f036d44c53cb0e68 (patch)
treeb3d379eaf000adf72b36cb01cdf4d79c3e3f064c /qemu/include/hw/isa/isa.h
parent0e68cb048bb8aadb14675f5d4286d8ab2fc35449 (diff)
parent437fd90c0250dee670290f9b714253671a990160 (diff)
Merge "These changes are the raw update to qemu-2.6."
Diffstat (limited to 'qemu/include/hw/isa/isa.h')
-rw-r--r--qemu/include/hw/isa/isa.h56
1 files changed, 44 insertions, 12 deletions
diff --git a/qemu/include/hw/isa/isa.h b/qemu/include/hw/isa/isa.h
index f21ceaafc..ffb2ea7cd 100644
--- a/qemu/include/hw/isa/isa.h
+++ b/qemu/include/hw/isa/isa.h
@@ -34,6 +34,44 @@ static inline uint16_t applesmc_port(void)
return 0;
}
+#define TYPE_ISADMA "isa-dma"
+
+#define ISADMA_CLASS(klass) \
+ OBJECT_CLASS_CHECK(IsaDmaClass, (klass), TYPE_ISADMA)
+#define ISADMA_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(IsaDmaClass, (obj), TYPE_ISADMA)
+#define ISADMA(obj) \
+ INTERFACE_CHECK(IsaDma, (obj), TYPE_ISADMA)
+
+struct IsaDma {
+ Object parent;
+};
+
+typedef enum {
+ ISADMA_TRANSFER_VERIFY,
+ ISADMA_TRANSFER_READ,
+ ISADMA_TRANSFER_WRITE,
+ ISADMA_TRANSFER_ILLEGAL,
+} IsaDmaTransferMode;
+
+typedef int (*IsaDmaTransferHandler)(void *opaque, int nchan, int pos,
+ int size);
+
+typedef struct IsaDmaClass {
+ InterfaceClass parent;
+
+ IsaDmaTransferMode (*get_transfer_mode)(IsaDma *obj, int nchan);
+ bool (*has_autoinitialization)(IsaDma *obj, int nchan);
+ int (*read_memory)(IsaDma *obj, int nchan, void *buf, int pos, int len);
+ int (*write_memory)(IsaDma *obj, int nchan, void *buf, int pos, int len);
+ void (*hold_DREQ)(IsaDma *obj, int nchan);
+ void (*release_DREQ)(IsaDma *obj, int nchan);
+ void (*schedule)(IsaDma *obj);
+ void (*register_channel)(IsaDma *obj, int nchan,
+ IsaDmaTransferHandler transfer_handler,
+ void *opaque);
+} IsaDmaClass;
+
typedef struct ISADeviceClass {
DeviceClass parent_class;
} ISADeviceClass;
@@ -46,6 +84,7 @@ struct ISABus {
MemoryRegion *address_space;
MemoryRegion *address_space_io;
qemu_irq *irqs;
+ IsaDma *dma[2];
};
struct ISADevice {
@@ -59,10 +98,12 @@ struct ISADevice {
};
ISABus *isa_bus_new(DeviceState *dev, MemoryRegion *address_space,
- MemoryRegion *address_space_io);
+ MemoryRegion *address_space_io, Error **errp);
void isa_bus_irqs(ISABus *bus, qemu_irq *irqs);
qemu_irq isa_get_irq(ISADevice *dev, int isairq);
void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
+void isa_bus_dma(ISABus *bus, IsaDma *dma8, IsaDma *dma16);
+IsaDma *isa_get_dma(ISABus *bus, int nchan);
MemoryRegion *isa_address_space(ISADevice *dev);
MemoryRegion *isa_address_space_io(ISADevice *dev);
ISADevice *isa_create(ISABus *bus, const char *name);
@@ -106,15 +147,6 @@ static inline ISABus *isa_bus_from_device(ISADevice *d)
return ISA_BUS(qdev_get_parent_bus(DEVICE(d)));
}
-/* dma.c */
-int DMA_get_channel_mode (int nchan);
-int DMA_read_memory (int nchan, void *buf, int pos, int size);
-int DMA_write_memory (int nchan, void *buf, int pos, int size);
-void DMA_hold_DREQ (int nchan);
-void DMA_release_DREQ (int nchan);
-void DMA_schedule(int nchan);
-void DMA_init(int high_page_enable, qemu_irq *cpu_request_exit);
-void DMA_register_channel (int nchan,
- DMA_transfer_handler transfer_handler,
- void *opaque);
+/* i8257.c */
+void DMA_init(ISABus *bus, int high_page_enable);
#endif