diff options
| author |   RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
|---|---|---|
| committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
| commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
| tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/include/hw/intc/bcm2836_control.h | |
| parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) | |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/include/hw/intc/bcm2836_control.h')
| -rw-r--r-- | qemu/include/hw/intc/bcm2836_control.h | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/qemu/include/hw/intc/bcm2836_control.h b/qemu/include/hw/intc/bcm2836_control.h deleted file mode 100644 index 613f3c418..000000000 --- a/qemu/include/hw/intc/bcm2836_control.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Raspberry Pi emulation (c) 2012 Gregory Estrade - * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous - * - * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft - * Written by Andrew Baumann - * - * This code is licensed under the GNU GPLv2 and later. - */ - -#ifndef BCM2836_CONTROL_H -#define BCM2836_CONTROL_H - -#include "hw/sysbus.h" - -/* 4 mailboxes per core, for 16 total */ -#define BCM2836_NCORES 4 -#define BCM2836_MBPERCORE 4 - -#define TYPE_BCM2836_CONTROL "bcm2836-control" -#define BCM2836_CONTROL(obj) \ - OBJECT_CHECK(BCM2836ControlState, (obj), TYPE_BCM2836_CONTROL) - -typedef struct BCM2836ControlState { - /*< private >*/ - SysBusDevice busdev; - /*< public >*/ - MemoryRegion iomem; - - /* mailbox state */ - uint32_t mailboxes[BCM2836_NCORES * BCM2836_MBPERCORE]; - - /* interrupt routing/control registers */ - uint8_t route_gpu_irq, route_gpu_fiq; - uint32_t timercontrol[BCM2836_NCORES]; - uint32_t mailboxcontrol[BCM2836_NCORES]; - - /* interrupt status regs (derived from input pins; not visible to user) */ - bool gpu_irq, gpu_fiq; - uint8_t timerirqs[BCM2836_NCORES]; - - /* interrupt source registers, post-routing (also input-derived; visible) */ - uint32_t irqsrc[BCM2836_NCORES]; - uint32_t fiqsrc[BCM2836_NCORES]; - - /* outputs to CPU cores */ - qemu_irq irq[BCM2836_NCORES]; - qemu_irq fiq[BCM2836_NCORES]; -} BCM2836ControlState; - -#endif |