Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

4 files changed, 0 insertions, 276 deletions

diff --git a/qemu/include/hw/i2c/i2c.h b/qemu/include/hw/i2c/i2c.h
deleted file mode 100644
index 4986ebc73..000000000
--- a/qemu/include/hw/i2c/i2c.h
+++ /dev/null
@@ -1,86 +0,0 @@
-#ifndef QEMU_I2C_H
-#define QEMU_I2C_H
-
-#include "hw/qdev.h"
-
-/* The QEMU I2C implementation only supports simple transfers that complete
-   immediately.  It does not support slave devices that need to be able to
-   defer their response (eg. CPU slave interfaces where the data is supplied
-   by the device driver in response to an interrupt).  */
-
-enum i2c_event {
-    I2C_START_RECV,
-    I2C_START_SEND,
-    I2C_FINISH,
-    I2C_NACK /* Masker NACKed a receive byte.  */
-};
-
-typedef struct I2CSlave I2CSlave;
-
-#define TYPE_I2C_SLAVE "i2c-slave"
-#define I2C_SLAVE(obj) \
-     OBJECT_CHECK(I2CSlave, (obj), TYPE_I2C_SLAVE)
-#define I2C_SLAVE_CLASS(klass) \
-     OBJECT_CLASS_CHECK(I2CSlaveClass, (klass), TYPE_I2C_SLAVE)
-#define I2C_SLAVE_GET_CLASS(obj) \
-     OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE)
-
-typedef struct I2CSlaveClass
-{
-    DeviceClass parent_class;
-
-    /* Callbacks provided by the device.  */
-    int (*init)(I2CSlave *dev);
-
-    /* Master to slave.  */
-    int (*send)(I2CSlave *s, uint8_t data);
-
-    /* Slave to master.  */
-    int (*recv)(I2CSlave *s);
-
-    /* Notify the slave of a bus state change.  */
-    void (*event)(I2CSlave *s, enum i2c_event event);
-} I2CSlaveClass;
-
-struct I2CSlave
-{
-    DeviceState qdev;
-
-    /* Remaining fields for internal use by the I2C code.  */
-    uint8_t address;
-};
-
-I2CBus *i2c_init_bus(DeviceState *parent, const char *name);
-void i2c_set_slave_address(I2CSlave *dev, uint8_t address);
-int i2c_bus_busy(I2CBus *bus);
-int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv);
-void i2c_end_transfer(I2CBus *bus);
-void i2c_nack(I2CBus *bus);
-int i2c_send(I2CBus *bus, uint8_t data);
-int i2c_recv(I2CBus *bus);
-
-DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr);
-
-/* wm8750.c */
-void wm8750_data_req_set(DeviceState *dev,
-                void (*data_req)(void *, int, int), void *opaque);
-void wm8750_dac_dat(void *opaque, uint32_t sample);
-uint32_t wm8750_adc_dat(void *opaque);
-void *wm8750_dac_buffer(void *opaque, int samples);
-void wm8750_dac_commit(void *opaque);
-void wm8750_set_bclk_in(void *opaque, int new_hz);
-
-/* lm832x.c */
-void lm832x_key_event(DeviceState *dev, int key, int state);
-
-extern const VMStateDescription vmstate_i2c_slave;
-
-#define VMSTATE_I2C_SLAVE(_field, _state) {                          \
-    .name       = (stringify(_field)),                               \
-    .size       = sizeof(I2CSlave),                                  \
-    .vmsd       = &vmstate_i2c_slave,                                \
-    .flags      = VMS_STRUCT,                                        \
-    .offset     = vmstate_offset_value(_state, _field, I2CSlave),    \
-}
-
-#endif
diff --git a/qemu/include/hw/i2c/imx_i2c.h b/qemu/include/hw/i2c/imx_i2c.h
deleted file mode 100644
index e2ee8eaee..000000000
--- a/qemu/include/hw/i2c/imx_i2c.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- *  i.MX I2C Bus Serial Interface registers definition
- *
- *  Copyright (C) 2013 Jean-Christophe Dubois. <jcd@tribudubois.net>
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under the terms of the GNU General Public License as published by the
- *  Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, see <http://www.gnu.org/licenses/>.
- *
- */
-
-#ifndef __IMX_I2C_H_
-#define __IMX_I2C_H_
-
-#include <hw/sysbus.h>
-
-#define TYPE_IMX_I2C "imx.i2c"
-#define IMX_I2C(obj) OBJECT_CHECK(IMXI2CState, (obj), TYPE_IMX_I2C)
-
-#define IMX_I2C_MEM_SIZE           0x14
-
-/* i.MX I2C memory map */
-#define IADR_ADDR                  0x00  /* address register */
-#define IFDR_ADDR                  0x04  /* frequency divider register */
-#define I2CR_ADDR                  0x08  /* control register */
-#define I2SR_ADDR                  0x0c  /* status register */
-#define I2DR_ADDR                  0x10  /* data register */
-
-#define IADR_MASK                  0xFE
-#define IADR_RESET                 0
-
-#define IFDR_MASK                  0x3F
-#define IFDR_RESET                 0
-
-#define I2CR_IEN                   (1 << 7)
-#define I2CR_IIEN                  (1 << 6)
-#define I2CR_MSTA                  (1 << 5)
-#define I2CR_MTX                   (1 << 4)
-#define I2CR_TXAK                  (1 << 3)
-#define I2CR_RSTA                  (1 << 2)
-#define I2CR_MASK                  0xFC
-#define I2CR_RESET                 0
-
-#define I2SR_ICF                   (1 << 7)
-#define I2SR_IAAF                  (1 << 6)
-#define I2SR_IBB                   (1 << 5)
-#define I2SR_IAL                   (1 << 4)
-#define I2SR_SRW                   (1 << 2)
-#define I2SR_IIF                   (1 << 1)
-#define I2SR_RXAK                  (1 << 0)
-#define I2SR_MASK                  0xE9
-#define I2SR_RESET                 0x81
-
-#define I2DR_MASK                  0xFF
-#define I2DR_RESET                 0
-
-#define ADDR_RESET                 0xFF00
-
-typedef struct IMXI2CState {
-    /*< private >*/
-    SysBusDevice parent_obj;
-
-    /*< public >*/
-    MemoryRegion iomem;
-    I2CBus *bus;
-    qemu_irq irq;
-
-    uint16_t  address;
-
-    uint16_t iadr;
-    uint16_t ifdr;
-    uint16_t i2cr;
-    uint16_t i2sr;
-    uint16_t i2dr_read;
-    uint16_t i2dr_write;
-} IMXI2CState;
-
-#endif /* __IMX_I2C_H_ */
diff --git a/qemu/include/hw/i2c/pm_smbus.h b/qemu/include/hw/i2c/pm_smbus.h
deleted file mode 100644
index 926603fdf..000000000
--- a/qemu/include/hw/i2c/pm_smbus.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef PM_SMBUS_H
-#define PM_SMBUS_H
-
-typedef struct PMSMBus {
-    I2CBus *smbus;
-    MemoryRegion io;
-
-    uint8_t smb_stat;
-    uint8_t smb_ctl;
-    uint8_t smb_cmd;
-    uint8_t smb_addr;
-    uint8_t smb_data0;
-    uint8_t smb_data1;
-    uint8_t smb_data[32];
-    uint8_t smb_index;
-} PMSMBus;
-
-void pm_smbus_init(DeviceState *parent, PMSMBus *smb);
-
-#endif /* !PM_SMBUS_H */
diff --git a/qemu/include/hw/i2c/smbus.h b/qemu/include/hw/i2c/smbus.h
deleted file mode 100644
index 544bbc195..000000000
--- a/qemu/include/hw/i2c/smbus.h
+++ /dev/null
@@ -1,83 +0,0 @@
-#ifndef QEMU_SMBUS_H
-#define QEMU_SMBUS_H
-
-/*
- * QEMU SMBus API
- *
- * Copyright (c) 2007 Arastra, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "hw/i2c/i2c.h"
-
-#define TYPE_SMBUS_DEVICE "smbus-device"
-#define SMBUS_DEVICE(obj) \
-     OBJECT_CHECK(SMBusDevice, (obj), TYPE_SMBUS_DEVICE)
-#define SMBUS_DEVICE_CLASS(klass) \
-     OBJECT_CLASS_CHECK(SMBusDeviceClass, (klass), TYPE_SMBUS_DEVICE)
-#define SMBUS_DEVICE_GET_CLASS(obj) \
-     OBJECT_GET_CLASS(SMBusDeviceClass, (obj), TYPE_SMBUS_DEVICE)
-
-typedef struct SMBusDeviceClass
-{
-    I2CSlaveClass parent_class;
-    int (*init)(SMBusDevice *dev);
-    void (*quick_cmd)(SMBusDevice *dev, uint8_t read);
-    void (*send_byte)(SMBusDevice *dev, uint8_t val);
-    uint8_t (*receive_byte)(SMBusDevice *dev);
-    /* We can't distinguish between a word write and a block write with
-       length 1, so pass the whole data block including the length byte
-       (if present).  The device is responsible figuring out what type of
-       command  this is.  */
-    void (*write_data)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len);
-    /* Likewise we can't distinguish between different reads, or even know
-       the length of the read until the read is complete, so read data a
-       byte at a time.  The device is responsible for adding the length
-       byte on block reads.  */
-    uint8_t (*read_data)(SMBusDevice *dev, uint8_t cmd, int n);
-} SMBusDeviceClass;
-
-struct SMBusDevice {
-    /* The SMBus protocol is implemented on top of I2C.  */
-    I2CSlave i2c;
-
-    /* Remaining fields for internal use only.  */
-    int mode;
-    int data_len;
-    uint8_t data_buf[34]; /* command + len + 32 bytes of data.  */
-    uint8_t command;
-};
-
-/* Master device commands.  */
-int smbus_quick_command(I2CBus *bus, uint8_t addr, int read);
-int smbus_receive_byte(I2CBus *bus, uint8_t addr);
-int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data);
-int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command);
-int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data);
-int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command);
-int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data);
-int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data);
-int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
-                      int len);
-
-void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom,
-                       const uint8_t *eeprom_spd, int size);
-
-#endif