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authorDon Dugger <n0ano@n0ano.com>2016-06-03 03:33:22 +0000
committerGerrit Code Review <gerrit@172.30.200.206>2016-06-03 03:33:23 +0000
commitda27230f80795d0028333713f036d44c53cb0e68 (patch)
treeb3d379eaf000adf72b36cb01cdf4d79c3e3f064c /qemu/hw/timer/hpet.c
parent0e68cb048bb8aadb14675f5d4286d8ab2fc35449 (diff)
parent437fd90c0250dee670290f9b714253671a990160 (diff)
Merge "These changes are the raw update to qemu-2.6."
Diffstat (limited to 'qemu/hw/timer/hpet.c')
-rw-r--r--qemu/hw/timer/hpet.c28
1 files changed, 10 insertions, 18 deletions
diff --git a/qemu/hw/timer/hpet.c b/qemu/hw/timer/hpet.c
index 2bb62211c..a2c18b30c 100644
--- a/qemu/hw/timer/hpet.c
+++ b/qemu/hw/timer/hpet.c
@@ -24,9 +24,11 @@
* This driver attempts to emulate an HPET device in software.
*/
+#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "ui/console.h"
+#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
#include "hw/timer/hpet.h"
@@ -116,22 +118,22 @@ static uint32_t timer_enabled(HPETTimer *t)
static uint32_t hpet_time_after(uint64_t a, uint64_t b)
{
- return ((int32_t)(b) - (int32_t)(a) < 0);
+ return ((int32_t)(b - a) < 0);
}
static uint32_t hpet_time_after64(uint64_t a, uint64_t b)
{
- return ((int64_t)(b) - (int64_t)(a) < 0);
+ return ((int64_t)(b - a) < 0);
}
static uint64_t ticks_to_ns(uint64_t value)
{
- return (muldiv64(value, HPET_CLK_PERIOD, FS_PER_NS));
+ return value * HPET_CLK_PERIOD;
}
static uint64_t ns_to_ticks(uint64_t value)
{
- return (muldiv64(value, FS_PER_NS, HPET_CLK_PERIOD));
+ return value / HPET_CLK_PERIOD;
}
static uint64_t hpet_fixup_reg(uint64_t new, uint64_t old, uint64_t mask)
@@ -199,12 +201,7 @@ static void update_irq(struct HPETTimer *timer, int set)
if (!set || !timer_enabled(timer) || !hpet_enabled(timer->state)) {
s->isr &= ~mask;
if (!timer_fsb_route(timer)) {
- /* fold the ICH PIRQ# pin's internal inversion logic into hpet */
- if (route >= ISA_NUM_IRQS) {
- qemu_irq_raise(s->irqs[route]);
- } else {
- qemu_irq_lower(s->irqs[route]);
- }
+ qemu_irq_lower(s->irqs[route]);
}
} else if (timer_fsb_route(timer)) {
address_space_stl_le(&address_space_memory, timer->fsb >> 32,
@@ -212,12 +209,7 @@ static void update_irq(struct HPETTimer *timer, int set)
NULL);
} else if (timer->config & HPET_TN_TYPE_LEVEL) {
s->isr |= mask;
- /* fold the ICH PIRQ# pin's internal inversion logic into hpet */
- if (route >= ISA_NUM_IRQS) {
- qemu_irq_lower(s->irqs[route]);
- } else {
- qemu_irq_raise(s->irqs[route]);
- }
+ qemu_irq_raise(s->irqs[route]);
} else {
s->isr &= ~mask;
qemu_irq_pulse(s->irqs[route]);
@@ -713,7 +705,7 @@ static void hpet_init(Object *obj)
HPETState *s = HPET(obj);
/* HPET Area */
- memory_region_init_io(&s->iomem, obj, &hpet_ram_ops, s, "hpet", 0x400);
+ memory_region_init_io(&s->iomem, obj, &hpet_ram_ops, s, "hpet", HPET_LEN);
sysbus_init_mmio(sbd, &s->iomem);
}
@@ -758,7 +750,7 @@ static void hpet_realize(DeviceState *dev, Error **errp)
/* 64-bit main counter; LegacyReplacementRoute. */
s->capability = 0x8086a001ULL;
s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT;
- s->capability |= ((HPET_CLK_PERIOD) << 32);
+ s->capability |= ((uint64_t)(HPET_CLK_PERIOD * FS_PER_NS) << 32);
qdev_init_gpio_in(dev, hpet_handle_legacy_irq, 2);
qdev_init_gpio_out(dev, &s->pit_enabled, 1);