diff options
author | RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
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committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/hw/openrisc | |
parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/hw/openrisc')
-rw-r--r-- | qemu/hw/openrisc/Makefile.objs | 2 | ||||
-rw-r--r-- | qemu/hw/openrisc/cputimer.c | 112 | ||||
-rw-r--r-- | qemu/hw/openrisc/openrisc_sim.c | 148 | ||||
-rw-r--r-- | qemu/hw/openrisc/pic_cpu.c | 61 |
4 files changed, 0 insertions, 323 deletions
diff --git a/qemu/hw/openrisc/Makefile.objs b/qemu/hw/openrisc/Makefile.objs deleted file mode 100644 index 61246b149..000000000 --- a/qemu/hw/openrisc/Makefile.objs +++ /dev/null @@ -1,2 +0,0 @@ -obj-y = pic_cpu.o cputimer.o -obj-y += openrisc_sim.o diff --git a/qemu/hw/openrisc/cputimer.c b/qemu/hw/openrisc/cputimer.c deleted file mode 100644 index a98c799de..000000000 --- a/qemu/hw/openrisc/cputimer.c +++ /dev/null @@ -1,112 +0,0 @@ -/* - * QEMU OpenRISC timer support - * - * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> - * Zhizhou Zhang <etouzh@gmail.com> - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ - -#include "qemu/osdep.h" -#include "cpu.h" -#include "hw/hw.h" -#include "qemu/timer.h" - -#define TIMER_PERIOD 50 /* 50 ns period for 20 MHz timer */ - -/* The time when TTCR changes */ -static uint64_t last_clk; -static int is_counting; - -void cpu_openrisc_count_update(OpenRISCCPU *cpu) -{ - uint64_t now; - - if (!is_counting) { - return; - } - now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - cpu->env.ttcr += (uint32_t)((now - last_clk) / TIMER_PERIOD); - last_clk = now; -} - -void cpu_openrisc_timer_update(OpenRISCCPU *cpu) -{ - uint32_t wait; - uint64_t now, next; - - if (!is_counting) { - return; - } - - cpu_openrisc_count_update(cpu); - now = last_clk; - - if ((cpu->env.ttmr & TTMR_TP) <= (cpu->env.ttcr & TTMR_TP)) { - wait = TTMR_TP - (cpu->env.ttcr & TTMR_TP) + 1; - wait += cpu->env.ttmr & TTMR_TP; - } else { - wait = (cpu->env.ttmr & TTMR_TP) - (cpu->env.ttcr & TTMR_TP); - } - next = now + (uint64_t)wait * TIMER_PERIOD; - timer_mod(cpu->env.timer, next); -} - -void cpu_openrisc_count_start(OpenRISCCPU *cpu) -{ - is_counting = 1; - cpu_openrisc_count_update(cpu); -} - -void cpu_openrisc_count_stop(OpenRISCCPU *cpu) -{ - timer_del(cpu->env.timer); - cpu_openrisc_count_update(cpu); - is_counting = 0; -} - -static void openrisc_timer_cb(void *opaque) -{ - OpenRISCCPU *cpu = opaque; - - if ((cpu->env.ttmr & TTMR_IE) && - timer_expired(cpu->env.timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL))) { - CPUState *cs = CPU(cpu); - - cpu->env.ttmr |= TTMR_IP; - cs->interrupt_request |= CPU_INTERRUPT_TIMER; - } - - switch (cpu->env.ttmr & TTMR_M) { - case TIMER_NONE: - break; - case TIMER_INTR: - cpu->env.ttcr = 0; - break; - case TIMER_SHOT: - cpu_openrisc_count_stop(cpu); - break; - case TIMER_CONT: - break; - } - - cpu_openrisc_timer_update(cpu); -} - -void cpu_openrisc_clock_init(OpenRISCCPU *cpu) -{ - cpu->env.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &openrisc_timer_cb, cpu); - cpu->env.ttmr = 0x00000000; - cpu->env.ttcr = 0x00000000; -} diff --git a/qemu/hw/openrisc/openrisc_sim.c b/qemu/hw/openrisc/openrisc_sim.c deleted file mode 100644 index 6d06d5be0..000000000 --- a/qemu/hw/openrisc/openrisc_sim.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * OpenRISC simulator for use as an IIS. - * - * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> - * Feng Gao <gf91597@gmail.com> - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ - -#include "qemu/osdep.h" -#include "qapi/error.h" -#include "qemu-common.h" -#include "cpu.h" -#include "hw/hw.h" -#include "hw/boards.h" -#include "elf.h" -#include "hw/char/serial.h" -#include "net/net.h" -#include "hw/loader.h" -#include "exec/address-spaces.h" -#include "sysemu/sysemu.h" -#include "hw/sysbus.h" -#include "sysemu/qtest.h" - -#define KERNEL_LOAD_ADDR 0x100 - -static void main_cpu_reset(void *opaque) -{ - OpenRISCCPU *cpu = opaque; - - cpu_reset(CPU(cpu)); -} - -static void openrisc_sim_net_init(MemoryRegion *address_space, - hwaddr base, - hwaddr descriptors, - qemu_irq irq, NICInfo *nd) -{ - DeviceState *dev; - SysBusDevice *s; - - dev = qdev_create(NULL, "open_eth"); - qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); - - s = SYS_BUS_DEVICE(dev); - sysbus_connect_irq(s, 0, irq); - memory_region_add_subregion(address_space, base, - sysbus_mmio_get_region(s, 0)); - memory_region_add_subregion(address_space, descriptors, - sysbus_mmio_get_region(s, 1)); -} - -static void cpu_openrisc_load_kernel(ram_addr_t ram_size, - const char *kernel_filename, - OpenRISCCPU *cpu) -{ - long kernel_size; - uint64_t elf_entry; - hwaddr entry; - - if (kernel_filename && !qtest_enabled()) { - kernel_size = load_elf(kernel_filename, NULL, NULL, - &elf_entry, NULL, NULL, 1, EM_OPENRISC, - 1, 0); - entry = elf_entry; - if (kernel_size < 0) { - kernel_size = load_uimage(kernel_filename, - &entry, NULL, NULL, NULL, NULL); - } - if (kernel_size < 0) { - kernel_size = load_image_targphys(kernel_filename, - KERNEL_LOAD_ADDR, - ram_size - KERNEL_LOAD_ADDR); - entry = KERNEL_LOAD_ADDR; - } - - if (kernel_size < 0) { - fprintf(stderr, "QEMU: couldn't load the kernel '%s'\n", - kernel_filename); - exit(1); - } - cpu->env.pc = entry; - } -} - -static void openrisc_sim_init(MachineState *machine) -{ - ram_addr_t ram_size = machine->ram_size; - const char *cpu_model = machine->cpu_model; - const char *kernel_filename = machine->kernel_filename; - OpenRISCCPU *cpu = NULL; - MemoryRegion *ram; - int n; - - if (!cpu_model) { - cpu_model = "or1200"; - } - - for (n = 0; n < smp_cpus; n++) { - cpu = cpu_openrisc_init(cpu_model); - if (cpu == NULL) { - fprintf(stderr, "Unable to find CPU definition!\n"); - exit(1); - } - qemu_register_reset(main_cpu_reset, cpu); - main_cpu_reset(cpu); - } - - ram = g_malloc(sizeof(*ram)); - memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size, &error_fatal); - vmstate_register_ram_global(ram); - memory_region_add_subregion(get_system_memory(), 0, ram); - - cpu_openrisc_pic_init(cpu); - cpu_openrisc_clock_init(cpu); - - serial_mm_init(get_system_memory(), 0x90000000, 0, cpu->env.irq[2], - 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); - - if (nd_table[0].used) { - openrisc_sim_net_init(get_system_memory(), 0x92000000, - 0x92000400, cpu->env.irq[4], nd_table); - } - - cpu_openrisc_load_kernel(ram_size, kernel_filename, cpu); -} - -static void openrisc_sim_machine_init(MachineClass *mc) -{ - mc->desc = "or32 simulation"; - mc->init = openrisc_sim_init; - mc->max_cpus = 1; - mc->is_default = 1; -} - -DEFINE_MACHINE("or32-sim", openrisc_sim_machine_init) diff --git a/qemu/hw/openrisc/pic_cpu.c b/qemu/hw/openrisc/pic_cpu.c deleted file mode 100644 index 569b443f5..000000000 --- a/qemu/hw/openrisc/pic_cpu.c +++ /dev/null @@ -1,61 +0,0 @@ -/* - * OpenRISC Programmable Interrupt Controller support. - * - * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> - * Feng Gao <gf91597@gmail.com> - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ - -#include "qemu/osdep.h" -#include "hw/hw.h" -#include "cpu.h" - -/* OpenRISC pic handler */ -static void openrisc_pic_cpu_handler(void *opaque, int irq, int level) -{ - OpenRISCCPU *cpu = (OpenRISCCPU *)opaque; - CPUState *cs = CPU(cpu); - uint32_t irq_bit; - - if (irq > 31 || irq < 0) { - return; - } - - irq_bit = 1U << irq; - - if (level) { - cpu->env.picsr |= irq_bit; - } else { - cpu->env.picsr &= ~irq_bit; - } - - if (cpu->env.picsr & cpu->env.picmr) { - cpu_interrupt(cs, CPU_INTERRUPT_HARD); - } else { - cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); - cpu->env.picsr = 0; - } -} - -void cpu_openrisc_pic_init(OpenRISCCPU *cpu) -{ - int i; - qemu_irq *qi; - qi = qemu_allocate_irqs(openrisc_pic_cpu_handler, cpu, NR_IRQS); - - for (i = 0; i < NR_IRQS; i++) { - cpu->env.irq[i] = qi[i]; - } -} |