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authorDon Dugger <n0ano@n0ano.com>2016-06-03 03:33:22 +0000
committerGerrit Code Review <gerrit@172.30.200.206>2016-06-03 03:33:23 +0000
commitda27230f80795d0028333713f036d44c53cb0e68 (patch)
treeb3d379eaf000adf72b36cb01cdf4d79c3e3f064c /qemu/hw/intc/openpic.c
parent0e68cb048bb8aadb14675f5d4286d8ab2fc35449 (diff)
parent437fd90c0250dee670290f9b714253671a990160 (diff)
Merge "These changes are the raw update to qemu-2.6."
Diffstat (limited to 'qemu/hw/intc/openpic.c')
-rw-r--r--qemu/hw/intc/openpic.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/qemu/hw/intc/openpic.c b/qemu/hw/intc/openpic.c
index 14ab0e31b..2d3769310 100644
--- a/qemu/hw/intc/openpic.c
+++ b/qemu/hw/intc/openpic.c
@@ -33,6 +33,7 @@
* Serial interrupts, as implemented in Raven chipset are not supported yet.
*
*/
+#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/ppc/mac.h"
#include "hw/pci/pci.h"
@@ -40,6 +41,7 @@
#include "hw/ppc/ppc_e500.h"
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
+#include "qapi/error.h"
#include "qemu/bitops.h"
#include "qapi/qmp/qerror.h"
@@ -1374,7 +1376,7 @@ static void fsl_common_init(OpenPICState *opp)
opp->irq_msi = 224;
- msi_supported = true;
+ msi_nonbroken = true;
for (i = 0; i < opp->fsl->max_ext; i++) {
opp->src[i].level = false;
}
@@ -1643,6 +1645,7 @@ static void openpic_class_init(ObjectClass *oc, void *data)
dc->props = openpic_properties;
dc->reset = openpic_reset;
dc->vmsd = &vmstate_openpic;
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
static const TypeInfo openpic_info = {