diff options
author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
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committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/dtc/tests/test01.dts | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/dtc/tests/test01.dts')
-rw-r--r-- | qemu/dtc/tests/test01.dts | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/qemu/dtc/tests/test01.dts b/qemu/dtc/tests/test01.dts new file mode 100644 index 000000000..f9fd16534 --- /dev/null +++ b/qemu/dtc/tests/test01.dts @@ -0,0 +1,57 @@ +/dts-v1/; + +/memreserve/ 0x1000000000000000 0x0000000002000000; +/memreserve/ 0x2000000000000000 0x0100000000000000; +/memreserve/ 0x0000000000000000 0x0000000000000014; + +/ { + model = "MyBoardName"; + compatible = "MyBoardName", "MyBoardFamilyName"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + linux,phandle = <0x1>; + #address-cells = <1>; + #size-cells = <0>; + PowerPC,970@0 { + name = "PowerPC,970"; + device_type = "cpu"; + reg = <0x00000000>; + clock-frequency = <1600000000>; + timebase-frequency = <33333333>; + linux,boot-cpu; + i-cache-size = <65536>; + d-cache-size = <32768>; + }; + + PowerPC,970@1 { + name = "PowerPC,970"; + device_type = "cpu"; + reg = <0x00000001>; + clock-frequency = <1600000000>; + timebase-frequency = <33333333>; + i-cache-size = <65536>; + d-cache-size = <32768>; + }; + + }; + + randomnode { + string = "\xff\0stuffstuff\t\t\t\n\n\n"; + blob = [0a 0b 0c 0d de ea ad be ef]; + ref = < &{/memory@0} >; + mixed = "abc", [1234], <0xa 0xb 0xc>; + }; + + memory@0 { + device_type = "memory"; + memreg: reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + chosen { + bootargs = "root=/dev/sda2"; + linux,platform = <0x600>; + }; + +}; |