Add qemu 2.4.0

Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>

1 files changed, 294 insertions, 0 deletions

diff --git a/qemu/dtc/tests/test01.asm b/qemu/dtc/tests/test01.asm
new file mode 100644
index 000000000..bbf66c771
--- /dev/null
+++ b/qemu/dtc/tests/test01.asm
@@ -0,0 +1,294 @@
+/* autogenerated by dtc, do not edit */
+
+#define OF_DT_HEADER 0xd00dfeed
+#define OF_DT_BEGIN_NODE 0x1
+#define OF_DT_END_NODE 0x2
+#define OF_DT_PROP 0x3
+#define OF_DT_END 0x9
+
+	.globl	dt_blob_start
+dt_blob_start:
+_dt_blob_start:
+	.globl	dt_header
+dt_header:
+_dt_header:
+	.long	OF_DT_HEADER /* magic */
+	.long	_dt_blob_end - _dt_blob_start /* totalsize */
+	.long	_dt_struct_start - _dt_blob_start /* off_dt_struct */
+	.long	_dt_strings_start - _dt_blob_start /* off_dt_strings */
+	.long	_dt_reserve_map - _dt_blob_start /* off_dt_strings */
+	.long	16 /* version */
+	.long	16 /* last_comp_version */
+	.long	0	/*boot_cpuid_phys*/
+	.long	_dt_strings_end - _dt_strings_start	/* size_dt_strings */
+	.balign	8
+	.globl	dt_reserve_map
+dt_reserve_map:
+_dt_reserve_map:
+/* Memory reserve map from source file */
+	.long	0x10000000
+	.long	0x00000000
+	.long	0x00000000
+	.long	0x02000000
+	.long	0x20000000
+	.long	0x00000000
+	.long	0x01000000
+	.long	0x00000000
+	.long	0x00000000
+	.long	0x00000000
+	.long	0x00000000
+	.long	0x00000014
+	.long	0, 0
+	.long	0, 0
+	.globl	dt_struct_start
+dt_struct_start:
+_dt_struct_start:
+	.long	OF_DT_BEGIN_NODE
+	.string	""
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0xc
+	.long	0x0
+	.long	0x4d79426f
+	.long	0x6172644e
+	.long	0x616d6500
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x1e
+	.long	0x6
+	.long	0x4d79426f
+	.long	0x6172644e
+	.long	0x616d6500
+	.long	0x4d79426f
+	.long	0x61726446
+	.long	0x616d696c
+	.long	0x794e616d
+	.short	0x6500
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x11
+	.long	0x2
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x20
+	.long	0x2
+	.balign	4
+	.long	OF_DT_BEGIN_NODE
+	.string	"cpus"
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x2c
+	.long	0x1
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x11
+	.long	0x1
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x20
+	.long	0x0
+	.balign	4
+	.long	OF_DT_BEGIN_NODE
+	.string	"PowerPC,970@0"
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0xc
+	.long	0x3a
+	.long	0x506f7765
+	.long	0x7250432c
+	.long	0x39373000
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x3f
+	.long	0x63707500
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x4b
+	.long	0x0
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x4f
+	.long	0x5f5e1000
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x5f
+	.long	0x1fca055
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x0
+	.long	0x72
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x81
+	.long	0x10000
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x8e
+	.long	0x8000
+	.balign	4
+	.long	OF_DT_END_NODE
+	.long	OF_DT_BEGIN_NODE
+	.string	"PowerPC,970@1"
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0xc
+	.long	0x3a
+	.long	0x506f7765
+	.long	0x7250432c
+	.long	0x39373000
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x3f
+	.long	0x63707500
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x4b
+	.long	0x1
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x4f
+	.long	0x5f5e1000
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x5f
+	.long	0x1fca055
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x81
+	.long	0x10000
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x8e
+	.long	0x8000
+	.balign	4
+	.long	OF_DT_END_NODE
+	.long	OF_DT_END_NODE
+	.long	OF_DT_BEGIN_NODE
+	.string	"randomnode"
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x13
+	.long	0x9b
+	.long	0xff007374
+	.long	0x75666673
+	.long	0x74756666
+	.long	0x909090a
+	.short	0xa0a
+	.byte	0x0
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x9
+	.long	0xa2
+	.long	0xa0b0c0d
+	.long	0xdeeaadbe
+	.byte	0xef
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0xa7
+	.long	0x2
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x14
+	.long	0xab
+	.long	0x61626300
+	.long	0x12340000
+	.long	0xa
+	.long	0xb
+	.long	0xc
+	.balign	4
+	.long	OF_DT_END_NODE
+	.long	OF_DT_BEGIN_NODE
+	.string	"memory@0"
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x7
+	.long	0x3f
+	.long	0x6d656d6f
+	.short	0x7279
+	.byte	0x0
+	.balign	4
+	.globl	memreg
+memreg:
+	.long	OF_DT_PROP
+	.long	0x10
+	.long	0x4b
+	.long	0x0
+	.long	0x0
+	.long	0x0
+	.long	0x20000000
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0x2c
+	.long	0x2
+	.balign	4
+	.long	OF_DT_END_NODE
+	.long	OF_DT_BEGIN_NODE
+	.string	"chosen"
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0xf
+	.long	0xb1
+	.long	0x726f6f74
+	.long	0x3d2f6465
+	.long	0x762f7364
+	.short	0x6132
+	.byte	0x0
+	.balign	4
+	.long	OF_DT_PROP
+	.long	0x4
+	.long	0xba
+	.long	0x600
+	.balign	4
+	.long	OF_DT_END_NODE
+	.long	OF_DT_END_NODE
+	.long	OF_DT_END
+	.globl	dt_struct_end
+dt_struct_end:
+_dt_struct_end:
+	.globl	dt_strings_start
+dt_strings_start:
+_dt_strings_start:
+	.string "model"
+	.string "compatible"
+	.string "#address-cells"
+	.string "#size-cells"
+	.string "linux,phandle"
+	.string "name"
+	.string "device_type"
+	.string "reg"
+	.string "clock-frequency"
+	.string "timebase-frequency"
+	.string "linux,boot-cpu"
+	.string "i-cache-size"
+	.string "d-cache-size"
+	.string "string"
+	.string "blob"
+	.string "ref"
+	.string "mixed"
+	.string "bootargs"
+	.string "linux,platform"
+	.globl	dt_strings_end
+dt_strings_end:
+_dt_strings_end:
+	.globl	dt_blob_end
+dt_blob_end:
+_dt_blob_end: