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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/dtc/tests/sized_cells.dts
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/dtc/tests/sized_cells.dts')
-rw-r--r--qemu/dtc/tests/sized_cells.dts11
1 files changed, 11 insertions, 0 deletions
diff --git a/qemu/dtc/tests/sized_cells.dts b/qemu/dtc/tests/sized_cells.dts
new file mode 100644
index 000000000..efea9f567
--- /dev/null
+++ b/qemu/dtc/tests/sized_cells.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+/ {
+ cells-8b = /bits/ 8 <'\r' 'b' '\0' '\'' '\xff' 0xde>;
+ cells-16b = /bits/ 16 <'\r' 'b' '\0' '\'' '\xff' 0xdead>;
+ cells-32b = /bits/ 32 <'\r' 'b' '\0' '\'' '\xff' 0xdeadbeef>;
+ cells-64b = /bits/ 64 <'\r' 'b' '\0' '\'' '\xff' 0xdeadbeef00000000>;
+
+ cells-one-16b = /bits/ 16 <0x1234 0x5678 0x0 0xffff>;
+ cells-one-32b = <0x12345678 0x0000ffff>;
+};