summaryrefslogtreecommitdiffstats
path: root/kernel/sound/pci/echoaudio/darla20_dsp.c
diff options
context:
space:
mode:
authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/sound/pci/echoaudio/darla20_dsp.c
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/sound/pci/echoaudio/darla20_dsp.c')
-rw-r--r--kernel/sound/pci/echoaudio/darla20_dsp.c129
1 files changed, 129 insertions, 0 deletions
diff --git a/kernel/sound/pci/echoaudio/darla20_dsp.c b/kernel/sound/pci/echoaudio/darla20_dsp.c
new file mode 100644
index 000000000..febee5bda
--- /dev/null
+++ b/kernel/sound/pci/echoaudio/darla20_dsp.c
@@ -0,0 +1,129 @@
+/***************************************************************************
+
+ Copyright Echo Digital Audio Corporation (c) 1998 - 2004
+ All rights reserved
+ www.echoaudio.com
+
+ This file is part of Echo Digital Audio's generic driver library.
+
+ Echo Digital Audio's generic driver library is free software;
+ you can redistribute it and/or modify it under the terms of
+ the GNU General Public License as published by the Free Software
+ Foundation.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+ MA 02111-1307, USA.
+
+ *************************************************************************
+
+ Translation from C++ and adaptation for use in ALSA-Driver
+ were made by Giuliano Pochini <pochini@shiny.it>
+
+****************************************************************************/
+
+
+static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
+{
+ int err;
+
+ if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20))
+ return -ENODEV;
+
+ if ((err = init_dsp_comm_page(chip))) {
+ dev_err(chip->card->dev,
+ "init_hw: could not initialize DSP comm page\n");
+ return err;
+ }
+
+ chip->device_id = device_id;
+ chip->subdevice_id = subdevice_id;
+ chip->bad_board = TRUE;
+ chip->dsp_code_to_load = FW_DARLA20_DSP;
+ chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
+ chip->clock_state = GD_CLOCK_UNDEF;
+ /* Since this card has no ASIC, mark it as loaded so everything
+ works OK */
+ chip->asic_loaded = TRUE;
+ chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
+
+ if ((err = load_firmware(chip)) < 0)
+ return err;
+ chip->bad_board = FALSE;
+
+ return err;
+}
+
+
+
+static int set_mixer_defaults(struct echoaudio *chip)
+{
+ return init_line_levels(chip);
+}
+
+
+
+/* The Darla20 has no external clock sources */
+static u32 detect_input_clocks(const struct echoaudio *chip)
+{
+ return ECHO_CLOCK_BIT_INTERNAL;
+}
+
+
+
+/* The Darla20 has no ASIC. Just do nothing */
+static int load_asic(struct echoaudio *chip)
+{
+ return 0;
+}
+
+
+
+static int set_sample_rate(struct echoaudio *chip, u32 rate)
+{
+ u8 clock_state, spdif_status;
+
+ if (wait_handshake(chip))
+ return -EIO;
+
+ switch (rate) {
+ case 44100:
+ clock_state = GD_CLOCK_44;
+ spdif_status = GD_SPDIF_STATUS_44;
+ break;
+ case 48000:
+ clock_state = GD_CLOCK_48;
+ spdif_status = GD_SPDIF_STATUS_48;
+ break;
+ default:
+ clock_state = GD_CLOCK_NOCHANGE;
+ spdif_status = GD_SPDIF_STATUS_NOCHANGE;
+ break;
+ }
+
+ if (chip->clock_state == clock_state)
+ clock_state = GD_CLOCK_NOCHANGE;
+ if (spdif_status == chip->spdif_status)
+ spdif_status = GD_SPDIF_STATUS_NOCHANGE;
+
+ chip->comm_page->sample_rate = cpu_to_le32(rate);
+ chip->comm_page->gd_clock_state = clock_state;
+ chip->comm_page->gd_spdif_status = spdif_status;
+ chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */
+
+ /* Save the new audio state if it changed */
+ if (clock_state != GD_CLOCK_NOCHANGE)
+ chip->clock_state = clock_state;
+ if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
+ chip->spdif_status = spdif_status;
+ chip->sample_rate = rate;
+
+ clear_handshake(chip);
+ return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
+}