diff options
| author |   Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
|---|---|---|
| committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
| commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
| tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/include/linux/sxgbe_platform.h | |
| parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) | |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/include/linux/sxgbe_platform.h')
| -rw-r--r-- | kernel/include/linux/sxgbe_platform.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/kernel/include/linux/sxgbe_platform.h b/kernel/include/linux/sxgbe_platform.h new file mode 100644 index 000000000..a62442cf0 --- /dev/null +++ b/kernel/include/linux/sxgbe_platform.h @@ -0,0 +1,54 @@ +/* + * 10G controller driver for Samsung EXYNOS SoCs + * + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Author: Siva Reddy Kallam <siva.kallam@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __SXGBE_PLATFORM_H__ +#define __SXGBE_PLATFORM_H__ + +/* MDC Clock Selection define*/ +#define SXGBE_CSR_100_150M 0x0 /* MDC = clk_scr_i/62 */ +#define SXGBE_CSR_150_250M 0x1 /* MDC = clk_scr_i/102 */ +#define SXGBE_CSR_250_300M 0x2 /* MDC = clk_scr_i/122 */ +#define SXGBE_CSR_300_350M 0x3 /* MDC = clk_scr_i/142 */ +#define SXGBE_CSR_350_400M 0x4 /* MDC = clk_scr_i/162 */ +#define SXGBE_CSR_400_500M 0x5 /* MDC = clk_scr_i/202 */ + +/* Platfrom data for platform device structure's + * platform_data field + */ +struct sxgbe_mdio_bus_data { + unsigned int phy_mask; + int *irqs; + int probed_phy_irq; +}; + +struct sxgbe_dma_cfg { + int pbl; + int fixed_burst; + int burst_map; + int adv_addr_mode; +}; + +struct sxgbe_plat_data { + char *phy_bus_name; + int bus_id; + int phy_addr; + int interface; + struct sxgbe_mdio_bus_data *mdio_bus_data; + struct sxgbe_dma_cfg *dma_cfg; + int clk_csr; + int pmt; + int force_sf_dma_mode; + int force_thresh_dma_mode; + int riwt_off; +}; + +#endif /* __SXGBE_PLATFORM_H__ */ |