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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/include/dt-bindings/interrupt-controller
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/include/dt-bindings/interrupt-controller')
-rw-r--r--kernel/include/dt-bindings/interrupt-controller/arm-gic.h22
-rw-r--r--kernel/include/dt-bindings/interrupt-controller/irq-st.h30
-rw-r--r--kernel/include/dt-bindings/interrupt-controller/irq.h19
-rw-r--r--kernel/include/dt-bindings/interrupt-controller/mips-gic.h9
4 files changed, 80 insertions, 0 deletions
diff --git a/kernel/include/dt-bindings/interrupt-controller/arm-gic.h b/kernel/include/dt-bindings/interrupt-controller/arm-gic.h
new file mode 100644
index 000000000..d4110d5ca
--- /dev/null
+++ b/kernel/include/dt-bindings/interrupt-controller/arm-gic.h
@@ -0,0 +1,22 @@
+/*
+ * This header provides constants for the ARM GIC.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/* interrupt specifier cell 0 */
+
+#define GIC_SPI 0
+#define GIC_PPI 1
+
+/*
+ * Interrupt specifier cell 2.
+ * The flags in irq.h are valid, plus those below.
+ */
+#define GIC_CPU_MASK_RAW(x) ((x) << 8)
+#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
+
+#endif
diff --git a/kernel/include/dt-bindings/interrupt-controller/irq-st.h b/kernel/include/dt-bindings/interrupt-controller/irq-st.h
new file mode 100644
index 000000000..4c59aceb9
--- /dev/null
+++ b/kernel/include/dt-bindings/interrupt-controller/irq-st.h
@@ -0,0 +1,30 @@
+/*
+ * include/linux/irqchip/irq-st.h
+ *
+ * Copyright (C) 2014 STMicroelectronics – All Rights Reserved
+ *
+ * Author: Lee Jones <lee.jones@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
+
+#define ST_IRQ_SYSCFG_EXT_0 0
+#define ST_IRQ_SYSCFG_EXT_1 1
+#define ST_IRQ_SYSCFG_EXT_2 2
+#define ST_IRQ_SYSCFG_CTI_0 3
+#define ST_IRQ_SYSCFG_CTI_1 4
+#define ST_IRQ_SYSCFG_PMU_0 5
+#define ST_IRQ_SYSCFG_PMU_1 6
+#define ST_IRQ_SYSCFG_pl310_L2 7
+#define ST_IRQ_SYSCFG_DISABLED 0xFFFFFFFF
+
+#define ST_IRQ_SYSCFG_EXT_1_INV 0x1
+#define ST_IRQ_SYSCFG_EXT_2_INV 0x2
+#define ST_IRQ_SYSCFG_EXT_3_INV 0x4
+
+#endif
diff --git a/kernel/include/dt-bindings/interrupt-controller/irq.h b/kernel/include/dt-bindings/interrupt-controller/irq.h
new file mode 100644
index 000000000..33a1003c5
--- /dev/null
+++ b/kernel/include/dt-bindings/interrupt-controller/irq.h
@@ -0,0 +1,19 @@
+/*
+ * This header provides constants for most IRQ bindings.
+ *
+ * Most IRQ bindings include a flags cell as part of the IRQ specifier.
+ * In most cases, the format of the flags cell uses the standard values
+ * defined in this header.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
+
+#define IRQ_TYPE_NONE 0
+#define IRQ_TYPE_EDGE_RISING 1
+#define IRQ_TYPE_EDGE_FALLING 2
+#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
+#define IRQ_TYPE_LEVEL_HIGH 4
+#define IRQ_TYPE_LEVEL_LOW 8
+
+#endif
diff --git a/kernel/include/dt-bindings/interrupt-controller/mips-gic.h b/kernel/include/dt-bindings/interrupt-controller/mips-gic.h
new file mode 100644
index 000000000..cf35a577e
--- /dev/null
+++ b/kernel/include/dt-bindings/interrupt-controller/mips-gic.h
@@ -0,0 +1,9 @@
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+#define GIC_SHARED 0
+#define GIC_LOCAL 1
+
+#endif