diff options
author | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
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committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/drivers/staging/sm750fb/ddk750_chip.h | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/drivers/staging/sm750fb/ddk750_chip.h')
-rw-r--r-- | kernel/drivers/staging/sm750fb/ddk750_chip.h | 87 |
1 files changed, 87 insertions, 0 deletions
diff --git a/kernel/drivers/staging/sm750fb/ddk750_chip.h b/kernel/drivers/staging/sm750fb/ddk750_chip.h new file mode 100644 index 000000000..04cb0d559 --- /dev/null +++ b/kernel/drivers/staging/sm750fb/ddk750_chip.h @@ -0,0 +1,87 @@ +#ifndef DDK750_CHIP_H__ +#define DDK750_CHIP_H__ +#define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */ +#ifndef SM750LE_REVISION_ID +#define SM750LE_REVISION_ID ((unsigned char)0xfe) +#endif + +#include <linux/io.h> + +/* This is all the chips recognized by this library */ +typedef enum _logical_chip_type_t +{ + SM_UNKNOWN, + SM718, + SM750, + SM750LE, +} +logical_chip_type_t; + + +typedef enum _clock_type_t +{ + MXCLK_PLL, + PRIMARY_PLL, + SECONDARY_PLL, + VGA0_PLL, + VGA1_PLL, +} +clock_type_t; + +typedef struct _pll_value_t +{ + clock_type_t clockType; + unsigned long inputFreq; /* Input clock frequency to the PLL */ + + /* Use this when clockType = PANEL_PLL */ + unsigned long M; + unsigned long N; + unsigned long OD; + unsigned long POD; +} +pll_value_t; + +/* input struct to initChipParam() function */ +typedef struct _initchip_param_t +{ + unsigned short powerMode; /* Use power mode 0 or 1 */ + unsigned short chipClock; /* Speed of main chip clock in MHz unit + 0 = keep the current clock setting + Others = the new main chip clock + */ + unsigned short memClock; /* Speed of memory clock in MHz unit + 0 = keep the current clock setting + Others = the new memory clock + */ + unsigned short masterClock; /* Speed of master clock in MHz unit + 0 = keep the current clock setting + Others = the new master clock + */ + unsigned short setAllEngOff; /* 0 = leave all engine state untouched. + 1 = make sure they are off: 2D, Overlay, + video alpha, alpha, hardware cursors + */ + unsigned char resetMemory; /* 0 = Do not reset the memory controller + 1 = Reset the memory controller + */ + + /* More initialization parameter can be added if needed */ +} +initchip_param_t; + + +logical_chip_type_t getChipType(void); +unsigned int calcPllValue(unsigned int request,pll_value_t *pll); +unsigned int calcPllValue2(unsigned int,pll_value_t *); +unsigned int formatPllReg(pll_value_t *pPLL); +void ddk750_set_mmio(void __iomem *,unsigned short,char); +unsigned int ddk750_getVMSize(void); +int ddk750_initHw(initchip_param_t *); +unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL); +unsigned int getChipClock(void); +void setChipClock(unsigned int); +void setMemoryClock(unsigned int frequency); +void setMasterClock(unsigned int frequency); + + +#endif |