diff options
author | 2015-10-29 22:15:25 +0000 | |
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committer | 2015-10-29 22:15:25 +0000 | |
commit | afc76d554ed517e38d46b6b182a7016406a1323f (patch) | |
tree | 06133cb33a43488837ea67667458e1582f2f40ce /kernel/drivers/spi/spi-dw.h | |
parent | 41f827bfbb10e03c4d228fbcc801dd51fb9983b0 (diff) | |
parent | ec0a2ed6d8a5e555edef907895c041e285fdb495 (diff) |
Merge "These changes are a raw update to a vanilla kernel 4.1.10, with the recently announced rt patch patch-4.1.10-rt10.patch. No further changes needed."
Diffstat (limited to 'kernel/drivers/spi/spi-dw.h')
-rw-r--r-- | kernel/drivers/spi/spi-dw.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/kernel/drivers/spi/spi-dw.h b/kernel/drivers/spi/spi-dw.h index 6c91391c1..b75ed327d 100644 --- a/kernel/drivers/spi/spi-dw.h +++ b/kernel/drivers/spi/spi-dw.h @@ -109,6 +109,7 @@ struct dw_spi { u32 fifo_len; /* depth of the FIFO buffer */ u32 max_freq; /* max bus freq supported */ + u32 reg_io_width; /* DR I/O width in bytes */ u16 bus_num; u16 num_cs; /* supported slave numbers */ @@ -145,11 +146,45 @@ static inline u32 dw_readl(struct dw_spi *dws, u32 offset) return __raw_readl(dws->regs + offset); } +static inline u16 dw_readw(struct dw_spi *dws, u32 offset) +{ + return __raw_readw(dws->regs + offset); +} + static inline void dw_writel(struct dw_spi *dws, u32 offset, u32 val) { __raw_writel(val, dws->regs + offset); } +static inline void dw_writew(struct dw_spi *dws, u32 offset, u16 val) +{ + __raw_writew(val, dws->regs + offset); +} + +static inline u32 dw_read_io_reg(struct dw_spi *dws, u32 offset) +{ + switch (dws->reg_io_width) { + case 2: + return dw_readw(dws, offset); + case 4: + default: + return dw_readl(dws, offset); + } +} + +static inline void dw_write_io_reg(struct dw_spi *dws, u32 offset, u32 val) +{ + switch (dws->reg_io_width) { + case 2: + dw_writew(dws, offset, val); + break; + case 4: + default: + dw_writel(dws, offset, val); + break; + } +} + static inline void spi_enable_chip(struct dw_spi *dws, int enable) { dw_writel(dws, DW_SPI_SSIENR, (enable ? 1 : 0)); |