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author | 2015-08-04 12:17:53 -0700 | |
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committer | 2015-08-04 15:44:42 -0700 | |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/drivers/scsi/dtc.h | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/drivers/scsi/dtc.h')
-rw-r--r-- | kernel/drivers/scsi/dtc.h | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/kernel/drivers/scsi/dtc.h b/kernel/drivers/scsi/dtc.h new file mode 100644 index 000000000..78a2332e9 --- /dev/null +++ b/kernel/drivers/scsi/dtc.h @@ -0,0 +1,76 @@ +/* + * DTC controller, taken from T128 driver by... + * Copyright 1993, Drew Eckhardt + * Visionary Computing + * (Unix and Linux consulting and custom programming) + * drew@colorado.edu + * +1 (303) 440-4894 + */ + +#ifndef DTC3280_H +#define DTC3280_H + +#define DTCDEBUG 0 +#define DTCDEBUG_INIT 0x1 +#define DTCDEBUG_TRANSFER 0x2 + +#ifndef CMD_PER_LUN +#define CMD_PER_LUN 2 +#endif + +#ifndef CAN_QUEUE +#define CAN_QUEUE 32 +#endif + +#define NCR5380_implementation_fields \ + void __iomem *base + +#define NCR5380_local_declare() \ + void __iomem *base + +#define NCR5380_setup(instance) \ + base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base + +#define DTC_address(reg) (base + DTC_5380_OFFSET + reg) + +#define dbNCR5380_read(reg) \ + (rval=readb(DTC_address(reg)), \ + (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\ + , (reg), DTC_address(reg), rval)), rval ) ) + +#define dbNCR5380_write(reg, value) do { \ + printk("DTC : write %02x to register %d at address %p\n", \ + (value), (reg), DTC_address(reg)); \ + writeb(value, DTC_address(reg));} while(0) + + +#if !(DTCDEBUG & DTCDEBUG_TRANSFER) +#define NCR5380_read(reg) (readb(DTC_address(reg))) +#define NCR5380_write(reg, value) (writeb(value, DTC_address(reg))) +#else +#define NCR5380_read(reg) (readb(DTC_address(reg))) +#define xNCR5380_read(reg) \ + (((unsigned char) printk("DTC : read register %d at address %p\n"\ + , (reg), DTC_address(reg))), readb(DTC_address(reg))) + +#define NCR5380_write(reg, value) do { \ + printk("DTC : write %02x to register %d at address %p\n", \ + (value), (reg), DTC_address(reg)); \ + writeb(value, DTC_address(reg));} while(0) +#endif + +#define NCR5380_intr dtc_intr +#define NCR5380_queue_command dtc_queue_command +#define NCR5380_abort dtc_abort +#define NCR5380_bus_reset dtc_bus_reset +#define NCR5380_info dtc_info +#define NCR5380_show_info dtc_show_info +#define NCR5380_write_info dtc_write_info + +/* 15 12 11 10 + 1001 1100 0000 0000 */ + +#define DTC_IRQS 0x9c00 + + +#endif /* DTC3280_H */ |