summaryrefslogtreecommitdiffstats
path: root/kernel/drivers/mfd/max77686.c
diff options
context:
space:
mode:
authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/drivers/mfd/max77686.c
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/drivers/mfd/max77686.c')
-rw-r--r--kernel/drivers/mfd/max77686.c418
1 files changed, 418 insertions, 0 deletions
diff --git a/kernel/drivers/mfd/max77686.c b/kernel/drivers/mfd/max77686.c
new file mode 100644
index 000000000..760d08d79
--- /dev/null
+++ b/kernel/drivers/mfd/max77686.c
@@ -0,0 +1,418 @@
+/*
+ * max77686.c - mfd core driver for the Maxim 77686/802
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * Chiwoong Byun <woong.byun@smasung.com>
+ * Jonghwa Lee <jonghwa3.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * This driver is based on max8997.c
+ */
+
+#include <linux/export.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/pm_runtime.h>
+#include <linux/module.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/max77686.h>
+#include <linux/mfd/max77686-private.h>
+#include <linux/err.h>
+#include <linux/of.h>
+
+#define I2C_ADDR_RTC (0x0C >> 1)
+
+static const struct mfd_cell max77686_devs[] = {
+ { .name = "max77686-pmic", },
+ { .name = "max77686-rtc", },
+ { .name = "max77686-clk", },
+};
+
+static const struct mfd_cell max77802_devs[] = {
+ { .name = "max77802-pmic", },
+ { .name = "max77802-clk", },
+ { .name = "max77802-rtc", },
+};
+
+static bool max77802_pmic_is_accessible_reg(struct device *dev,
+ unsigned int reg)
+{
+ return reg < MAX77802_REG_PMIC_END;
+}
+
+static bool max77802_rtc_is_accessible_reg(struct device *dev,
+ unsigned int reg)
+{
+ return (reg >= MAX77802_RTC_INT && reg < MAX77802_RTC_END);
+}
+
+static bool max77802_is_accessible_reg(struct device *dev, unsigned int reg)
+{
+ return (max77802_pmic_is_accessible_reg(dev, reg) ||
+ max77802_rtc_is_accessible_reg(dev, reg));
+}
+
+static bool max77802_pmic_is_precious_reg(struct device *dev, unsigned int reg)
+{
+ return (reg == MAX77802_REG_INTSRC || reg == MAX77802_REG_INT1 ||
+ reg == MAX77802_REG_INT2);
+}
+
+static bool max77802_rtc_is_precious_reg(struct device *dev, unsigned int reg)
+{
+ return (reg == MAX77802_RTC_INT ||
+ reg == MAX77802_RTC_UPDATE0 ||
+ reg == MAX77802_RTC_UPDATE1);
+}
+
+static bool max77802_is_precious_reg(struct device *dev, unsigned int reg)
+{
+ return (max77802_pmic_is_precious_reg(dev, reg) ||
+ max77802_rtc_is_precious_reg(dev, reg));
+}
+
+static bool max77802_pmic_is_volatile_reg(struct device *dev, unsigned int reg)
+{
+ return (max77802_is_precious_reg(dev, reg) ||
+ reg == MAX77802_REG_STATUS1 || reg == MAX77802_REG_STATUS2 ||
+ reg == MAX77802_REG_PWRON);
+}
+
+static bool max77802_rtc_is_volatile_reg(struct device *dev, unsigned int reg)
+{
+ return (max77802_rtc_is_precious_reg(dev, reg) ||
+ reg == MAX77802_RTC_SEC ||
+ reg == MAX77802_RTC_MIN ||
+ reg == MAX77802_RTC_HOUR ||
+ reg == MAX77802_RTC_WEEKDAY ||
+ reg == MAX77802_RTC_MONTH ||
+ reg == MAX77802_RTC_YEAR ||
+ reg == MAX77802_RTC_DATE);
+}
+
+static bool max77802_is_volatile_reg(struct device *dev, unsigned int reg)
+{
+ return (max77802_pmic_is_volatile_reg(dev, reg) ||
+ max77802_rtc_is_volatile_reg(dev, reg));
+}
+
+static const struct regmap_config max77686_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
+
+static const struct regmap_config max77686_rtc_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
+
+static const struct regmap_config max77802_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .writeable_reg = max77802_is_accessible_reg,
+ .readable_reg = max77802_is_accessible_reg,
+ .precious_reg = max77802_is_precious_reg,
+ .volatile_reg = max77802_is_volatile_reg,
+ .name = "max77802-pmic",
+ .cache_type = REGCACHE_RBTREE,
+};
+
+static const struct regmap_irq max77686_irqs[] = {
+ /* INT1 interrupts */
+ { .reg_offset = 0, .mask = MAX77686_INT1_PWRONF_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_INT1_PWRONR_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_INT1_JIGONBF_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_INT1_JIGONBR_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_INT1_ACOKBF_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_INT1_ACOKBR_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_INT1_ONKEY1S_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_INT1_MRSTB_MSK, },
+ /* INT2 interrupts */
+ { .reg_offset = 1, .mask = MAX77686_INT2_140C_MSK, },
+ { .reg_offset = 1, .mask = MAX77686_INT2_120C_MSK, },
+};
+
+static const struct regmap_irq_chip max77686_irq_chip = {
+ .name = "max77686-pmic",
+ .status_base = MAX77686_REG_INT1,
+ .mask_base = MAX77686_REG_INT1MSK,
+ .num_regs = 2,
+ .irqs = max77686_irqs,
+ .num_irqs = ARRAY_SIZE(max77686_irqs),
+};
+
+static const struct regmap_irq max77686_rtc_irqs[] = {
+ /* RTC interrupts */
+ { .reg_offset = 0, .mask = MAX77686_RTCINT_RTC60S_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_RTCINT_RTCA1_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_RTCINT_RTCA2_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_RTCINT_SMPL_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_RTCINT_RTC1S_MSK, },
+ { .reg_offset = 0, .mask = MAX77686_RTCINT_WTSR_MSK, },
+};
+
+static const struct regmap_irq_chip max77686_rtc_irq_chip = {
+ .name = "max77686-rtc",
+ .status_base = MAX77686_RTC_INT,
+ .mask_base = MAX77686_RTC_INTM,
+ .num_regs = 1,
+ .irqs = max77686_rtc_irqs,
+ .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
+};
+
+static const struct regmap_irq_chip max77802_irq_chip = {
+ .name = "max77802-pmic",
+ .status_base = MAX77802_REG_INT1,
+ .mask_base = MAX77802_REG_INT1MSK,
+ .num_regs = 2,
+ .irqs = max77686_irqs, /* same masks as 77686 */
+ .num_irqs = ARRAY_SIZE(max77686_irqs),
+};
+
+static const struct regmap_irq_chip max77802_rtc_irq_chip = {
+ .name = "max77802-rtc",
+ .status_base = MAX77802_RTC_INT,
+ .mask_base = MAX77802_RTC_INTM,
+ .num_regs = 1,
+ .irqs = max77686_rtc_irqs, /* same masks as 77686 */
+ .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
+};
+
+static const struct of_device_id max77686_pmic_dt_match[] = {
+ {
+ .compatible = "maxim,max77686",
+ .data = (void *)TYPE_MAX77686,
+ },
+ {
+ .compatible = "maxim,max77802",
+ .data = (void *)TYPE_MAX77802,
+ },
+ { },
+};
+
+static int max77686_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
+{
+ struct max77686_dev *max77686 = NULL;
+ const struct of_device_id *match;
+ unsigned int data;
+ int ret = 0;
+ const struct regmap_config *config;
+ const struct regmap_irq_chip *irq_chip;
+ const struct regmap_irq_chip *rtc_irq_chip;
+ struct regmap **rtc_regmap;
+ const struct mfd_cell *cells;
+ int n_devs;
+
+ max77686 = devm_kzalloc(&i2c->dev,
+ sizeof(struct max77686_dev), GFP_KERNEL);
+ if (!max77686)
+ return -ENOMEM;
+
+ if (i2c->dev.of_node) {
+ match = of_match_node(max77686_pmic_dt_match, i2c->dev.of_node);
+ if (!match)
+ return -EINVAL;
+
+ max77686->type = (unsigned long)match->data;
+ } else
+ max77686->type = id->driver_data;
+
+ i2c_set_clientdata(i2c, max77686);
+ max77686->dev = &i2c->dev;
+ max77686->i2c = i2c;
+
+ max77686->irq = i2c->irq;
+
+ if (max77686->type == TYPE_MAX77686) {
+ config = &max77686_regmap_config;
+ irq_chip = &max77686_irq_chip;
+ rtc_irq_chip = &max77686_rtc_irq_chip;
+ rtc_regmap = &max77686->rtc_regmap;
+ cells = max77686_devs;
+ n_devs = ARRAY_SIZE(max77686_devs);
+ } else {
+ config = &max77802_regmap_config;
+ irq_chip = &max77802_irq_chip;
+ rtc_irq_chip = &max77802_rtc_irq_chip;
+ rtc_regmap = &max77686->regmap;
+ cells = max77802_devs;
+ n_devs = ARRAY_SIZE(max77802_devs);
+ }
+
+ max77686->regmap = devm_regmap_init_i2c(i2c, config);
+ if (IS_ERR(max77686->regmap)) {
+ ret = PTR_ERR(max77686->regmap);
+ dev_err(max77686->dev, "Failed to allocate register map: %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = regmap_read(max77686->regmap, MAX77686_REG_DEVICE_ID, &data);
+ if (ret < 0) {
+ dev_err(max77686->dev,
+ "device not found on this channel (this is not an error)\n");
+ return -ENODEV;
+ }
+
+ if (max77686->type == TYPE_MAX77686) {
+ max77686->rtc = i2c_new_dummy(i2c->adapter, I2C_ADDR_RTC);
+ if (!max77686->rtc) {
+ dev_err(max77686->dev,
+ "Failed to allocate I2C device for RTC\n");
+ return -ENODEV;
+ }
+ i2c_set_clientdata(max77686->rtc, max77686);
+
+ max77686->rtc_regmap =
+ devm_regmap_init_i2c(max77686->rtc,
+ &max77686_rtc_regmap_config);
+ if (IS_ERR(max77686->rtc_regmap)) {
+ ret = PTR_ERR(max77686->rtc_regmap);
+ dev_err(max77686->dev,
+ "failed to allocate RTC regmap: %d\n",
+ ret);
+ goto err_unregister_i2c;
+ }
+ }
+
+ ret = regmap_add_irq_chip(max77686->regmap, max77686->irq,
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
+ IRQF_SHARED, 0, irq_chip,
+ &max77686->irq_data);
+ if (ret) {
+ dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret);
+ goto err_unregister_i2c;
+ }
+
+ ret = regmap_add_irq_chip(*rtc_regmap, max77686->irq,
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
+ IRQF_SHARED, 0, rtc_irq_chip,
+ &max77686->rtc_irq_data);
+ if (ret) {
+ dev_err(&i2c->dev, "failed to add RTC irq chip: %d\n", ret);
+ goto err_del_irqc;
+ }
+
+ ret = mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL, 0, NULL);
+ if (ret < 0) {
+ dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
+ goto err_del_rtc_irqc;
+ }
+
+ return 0;
+
+err_del_rtc_irqc:
+ regmap_del_irq_chip(max77686->irq, max77686->rtc_irq_data);
+err_del_irqc:
+ regmap_del_irq_chip(max77686->irq, max77686->irq_data);
+err_unregister_i2c:
+ if (max77686->type == TYPE_MAX77686)
+ i2c_unregister_device(max77686->rtc);
+
+ return ret;
+}
+
+static int max77686_i2c_remove(struct i2c_client *i2c)
+{
+ struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
+
+ mfd_remove_devices(max77686->dev);
+
+ regmap_del_irq_chip(max77686->irq, max77686->rtc_irq_data);
+ regmap_del_irq_chip(max77686->irq, max77686->irq_data);
+
+ if (max77686->type == TYPE_MAX77686)
+ i2c_unregister_device(max77686->rtc);
+
+ return 0;
+}
+
+static const struct i2c_device_id max77686_i2c_id[] = {
+ { "max77686", TYPE_MAX77686 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, max77686_i2c_id);
+
+#ifdef CONFIG_PM_SLEEP
+static int max77686_suspend(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
+
+ if (device_may_wakeup(dev))
+ enable_irq_wake(max77686->irq);
+
+ /*
+ * IRQ must be disabled during suspend because if it happens
+ * while suspended it will be handled before resuming I2C.
+ *
+ * When device is woken up from suspend (e.g. by RTC wake alarm),
+ * an interrupt occurs before resuming I2C bus controller.
+ * Interrupt handler tries to read registers but this read
+ * will fail because I2C is still suspended.
+ */
+ disable_irq(max77686->irq);
+
+ return 0;
+}
+
+static int max77686_resume(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(max77686->irq);
+
+ enable_irq(max77686->irq);
+
+ return 0;
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static SIMPLE_DEV_PM_OPS(max77686_pm, max77686_suspend, max77686_resume);
+
+static struct i2c_driver max77686_i2c_driver = {
+ .driver = {
+ .name = "max77686",
+ .owner = THIS_MODULE,
+ .pm = &max77686_pm,
+ .of_match_table = of_match_ptr(max77686_pmic_dt_match),
+ },
+ .probe = max77686_i2c_probe,
+ .remove = max77686_i2c_remove,
+ .id_table = max77686_i2c_id,
+};
+
+static int __init max77686_i2c_init(void)
+{
+ return i2c_add_driver(&max77686_i2c_driver);
+}
+/* init early so consumer devices can complete system boot */
+subsys_initcall(max77686_i2c_init);
+
+static void __exit max77686_i2c_exit(void)
+{
+ i2c_del_driver(&max77686_i2c_driver);
+}
+module_exit(max77686_i2c_exit);
+
+MODULE_DESCRIPTION("MAXIM 77686/802 multi-function core driver");
+MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>");
+MODULE_LICENSE("GPL");
"><linux/err.h> #include <linux/init.h> #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/pinctrl/machine.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> #include <linux/platform_device.h> #include <linux/slab.h> #include "../core.h" #include "pinctrl-mxs.h" #define SUFFIX_LEN 4 struct mxs_pinctrl_data { struct device *dev; struct pinctrl_dev *pctl; void __iomem *base; struct mxs_pinctrl_soc_data *soc; }; static int mxs_get_groups_count(struct pinctrl_dev *pctldev) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); return d->soc->ngroups; } static const char *mxs_get_group_name(struct pinctrl_dev *pctldev, unsigned group) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); return d->soc->groups[group].name; } static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, const unsigned **pins, unsigned *num_pins) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); *pins = d->soc->groups[group].pins; *num_pins = d->soc->groups[group].npins; return 0; } static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned offset) { seq_printf(s, " %s", dev_name(pctldev->dev)); } static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np, struct pinctrl_map **map, unsigned *num_maps) { struct pinctrl_map *new_map; char *group = NULL; unsigned new_num = 1; unsigned long config = 0; unsigned long *pconfig; int length = strlen(np->name) + SUFFIX_LEN; bool purecfg = false; u32 val, reg; int ret, i = 0; /* Check for pin config node which has no 'reg' property */ if (of_property_read_u32(np, "reg", &reg)) purecfg = true; ret = of_property_read_u32(np, "fsl,drive-strength", &val); if (!ret) config = val | MA_PRESENT; ret = of_property_read_u32(np, "fsl,voltage", &val); if (!ret) config |= val << VOL_SHIFT | VOL_PRESENT; ret = of_property_read_u32(np, "fsl,pull-up", &val); if (!ret) config |= val << PULL_SHIFT | PULL_PRESENT; /* Check for group node which has both mux and config settings */ if (!purecfg && config) new_num = 2; new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL); if (!new_map) return -ENOMEM; if (!purecfg) { new_map[i].type = PIN_MAP_TYPE_MUX_GROUP; new_map[i].data.mux.function = np->name; /* Compose group name */ group = kzalloc(length, GFP_KERNEL); if (!group) { ret = -ENOMEM; goto free; } snprintf(group, length, "%s.%d", np->name, reg); new_map[i].data.mux.group = group; i++; } if (config) { pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL); if (!pconfig) { ret = -ENOMEM; goto free_group; } new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP; new_map[i].data.configs.group_or_pin = purecfg ? np->name : group; new_map[i].data.configs.configs = pconfig; new_map[i].data.configs.num_configs = 1; } *map = new_map; *num_maps = new_num; return 0; free_group: if (!purecfg) kfree(group); free: kfree(new_map); return ret; } static void mxs_dt_free_map(struct pinctrl_dev *pctldev, struct pinctrl_map *map, unsigned num_maps) { u32 i; for (i = 0; i < num_maps; i++) { if (map[i].type == PIN_MAP_TYPE_MUX_GROUP) kfree(map[i].data.mux.group); if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) kfree(map[i].data.configs.configs); } kfree(map); } static const struct pinctrl_ops mxs_pinctrl_ops = { .get_groups_count = mxs_get_groups_count, .get_group_name = mxs_get_group_name, .get_group_pins = mxs_get_group_pins, .pin_dbg_show = mxs_pin_dbg_show, .dt_node_to_map = mxs_dt_node_to_map, .dt_free_map = mxs_dt_free_map, }; static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); return d->soc->nfunctions; } static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev, unsigned function) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); return d->soc->functions[function].name; } static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, unsigned group, const char * const **groups, unsigned * const num_groups) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); *groups = d->soc->functions[group].groups; *num_groups = d->soc->functions[group].ngroups; return 0; } static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector, unsigned group) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); struct mxs_group *g = &d->soc->groups[group]; void __iomem *reg; u8 bank, shift; u16 pin; u32 i; for (i = 0; i < g->npins; i++) { bank = PINID_TO_BANK(g->pins[i]); pin = PINID_TO_PIN(g->pins[i]); reg = d->base + d->soc->regs->muxsel; reg += bank * 0x20 + pin / 16 * 0x10; shift = pin % 16 * 2; writel(0x3 << shift, reg + CLR); writel(g->muxsel[i] << shift, reg + SET); } return 0; } static const struct pinmux_ops mxs_pinmux_ops = { .get_functions_count = mxs_pinctrl_get_funcs_count, .get_function_name = mxs_pinctrl_get_func_name, .get_function_groups = mxs_pinctrl_get_func_groups, .set_mux = mxs_pinctrl_set_mux, }; static int mxs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *config) { return -ENOTSUPP; } static int mxs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *configs, unsigned num_configs) { return -ENOTSUPP; } static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev, unsigned group, unsigned long *config) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); *config = d->soc->groups[group].config; return 0; } static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group, unsigned long *configs, unsigned num_configs) { struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); struct mxs_group *g = &d->soc->groups[group]; void __iomem *reg; u8 ma, vol, pull, bank, shift; u16 pin; u32 i; int n; unsigned long config; for (n = 0; n < num_configs; n++) { config = configs[n]; ma = CONFIG_TO_MA(config); vol = CONFIG_TO_VOL(config); pull = CONFIG_TO_PULL(config); for (i = 0; i < g->npins; i++) { bank = PINID_TO_BANK(g->pins[i]); pin = PINID_TO_PIN(g->pins[i]); /* drive */ reg = d->base + d->soc->regs->drive; reg += bank * 0x40 + pin / 8 * 0x10; /* mA */ if (config & MA_PRESENT) { shift = pin % 8 * 4; writel(0x3 << shift, reg + CLR); writel(ma << shift, reg + SET); } /* vol */ if (config & VOL_PRESENT) { shift = pin % 8 * 4 + 2; if (vol) writel(1 << shift, reg + SET); else writel(1 << shift, reg + CLR); } /* pull */ if (config & PULL_PRESENT) { reg = d->base + d->soc->regs->pull; reg += bank * 0x10; shift = pin; if (pull) writel(1 << shift, reg + SET); else writel(1 << shift, reg + CLR); } } /* cache the config value for mxs_pinconf_group_get() */ g->config = config; } /* for each config */ return 0; } static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned pin) { /* Not support */ } static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned group) { unsigned long config; if (!mxs_pinconf_group_get(pctldev, group, &config)) seq_printf(s, "0x%lx", config); } static const struct pinconf_ops mxs_pinconf_ops = { .pin_config_get = mxs_pinconf_get, .pin_config_set = mxs_pinconf_set, .pin_config_group_get = mxs_pinconf_group_get, .pin_config_group_set = mxs_pinconf_group_set, .pin_config_dbg_show = mxs_pinconf_dbg_show, .pin_config_group_dbg_show = mxs_pinconf_group_dbg_show, }; static struct pinctrl_desc mxs_pinctrl_desc = { .pctlops = &mxs_pinctrl_ops, .pmxops = &mxs_pinmux_ops, .confops = &mxs_pinconf_ops, .owner = THIS_MODULE, }; static int mxs_pinctrl_parse_group(struct platform_device *pdev, struct device_node *np, int idx, const char **out_name) { struct mxs_pinctrl_data *d = platform_get_drvdata(pdev); struct mxs_group *g = &d->soc->groups[idx]; struct property *prop; const char *propname = "fsl,pinmux-ids"; char *group; int length = strlen(np->name) + SUFFIX_LEN; u32 val, i; group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL); if (!group) return -ENOMEM; if (of_property_read_u32(np, "reg", &val)) snprintf(group, length, "%s", np->name); else snprintf(group, length, "%s.%d", np->name, val); g->name = group; prop = of_find_property(np, propname, &length); if (!prop) return -EINVAL; g->npins = length / sizeof(u32); g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins), GFP_KERNEL); if (!g->pins) return -ENOMEM; g->muxsel = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->muxsel), GFP_KERNEL); if (!g->muxsel) return -ENOMEM; of_property_read_u32_array(np, propname, g->pins, g->npins); for (i = 0; i < g->npins; i++) { g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]); g->pins[i] = MUXID_TO_PINID(g->pins[i]); } if (out_name) *out_name = g->name; return 0; } static int mxs_pinctrl_probe_dt(struct platform_device *pdev, struct mxs_pinctrl_data *d) { struct mxs_pinctrl_soc_data *soc = d->soc; struct device_node *np = pdev->dev.of_node; struct device_node *child; struct mxs_function *f; const char *gpio_compat = "fsl,mxs-gpio"; const char *fn, *fnull = ""; int i = 0, idxf = 0, idxg = 0; int ret; u32 val; child = of_get_next_child(np, NULL); if (!child) { dev_err(&pdev->dev, "no group is defined\n"); return -ENOENT; } /* Count total functions and groups */ fn = fnull; for_each_child_of_node(np, child) { if (of_device_is_compatible(child, gpio_compat)) continue; soc->ngroups++; /* Skip pure pinconf node */ if (of_property_read_u32(child, "reg", &val)) continue; if (strcmp(fn, child->name)) { fn = child->name; soc->nfunctions++; } } soc->functions = devm_kzalloc(&pdev->dev, soc->nfunctions * sizeof(*soc->functions), GFP_KERNEL); if (!soc->functions) return -ENOMEM; soc->groups = devm_kzalloc(&pdev->dev, soc->ngroups * sizeof(*soc->groups), GFP_KERNEL); if (!soc->groups) return -ENOMEM; /* Count groups for each function */ fn = fnull; f = &soc->functions[idxf]; for_each_child_of_node(np, child) { if (of_device_is_compatible(child, gpio_compat)) continue; if (of_property_read_u32(child, "reg", &val)) continue; if (strcmp(fn, child->name)) { struct device_node *child2; /* * This reference is dropped by * of_get_next_child(np, * child) */ of_node_get(child); /* * The logic parsing the functions from dt currently * doesn't handle if functions with the same name are * not grouped together. Only the first contiguous * cluster is usable for each function name. This is a * bug that is not trivial to fix, but at least warn * about it. */ for (child2 = of_get_next_child(np, child); child2 != NULL; child2 = of_get_next_child(np, child2)) { if (!strcmp(child2->name, fn)) dev_warn(&pdev->dev, "function nodes must be grouped by name (failed for: %s)", fn); } f = &soc->functions[idxf++]; f->name = fn = child->name; } f->ngroups++; } /* Get groups for each function */ idxf = 0; fn = fnull; for_each_child_of_node(np, child) { if (of_device_is_compatible(child, gpio_compat)) continue; if (of_property_read_u32(child, "reg", &val)) { ret = mxs_pinctrl_parse_group(pdev, child, idxg++, NULL); if (ret) return ret; continue; } if (strcmp(fn, child->name)) { f = &soc->functions[idxf++]; f->groups = devm_kzalloc(&pdev->dev, f->ngroups * sizeof(*f->groups), GFP_KERNEL); if (!f->groups) return -ENOMEM; fn = child->name; i = 0; } ret = mxs_pinctrl_parse_group(pdev, child, idxg++, &f->groups[i++]); if (ret) return ret; } return 0; } int mxs_pinctrl_probe(struct platform_device *pdev, struct mxs_pinctrl_soc_data *soc) { struct device_node *np = pdev->dev.of_node; struct mxs_pinctrl_data *d; int ret; d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL); if (!d) return -ENOMEM; d->dev = &pdev->dev; d->soc = soc; d->base = of_iomap(np, 0); if (!d->base) return -EADDRNOTAVAIL; mxs_pinctrl_desc.pins = d->soc->pins; mxs_pinctrl_desc.npins = d->soc->npins; mxs_pinctrl_desc.name = dev_name(&pdev->dev); platform_set_drvdata(pdev, d); ret = mxs_pinctrl_probe_dt(pdev, d); if (ret) { dev_err(&pdev->dev, "dt probe failed: %d\n", ret); goto err; } d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d); if (IS_ERR(d->pctl)) { dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n"); ret = PTR_ERR(d->pctl); goto err; } return 0; err: iounmap(d->base); return ret; } EXPORT_SYMBOL_GPL(mxs_pinctrl_probe); int mxs_pinctrl_remove(struct platform_device *pdev) { struct mxs_pinctrl_data *d = platform_get_drvdata(pdev); pinctrl_unregister(d->pctl); iounmap(d->base); return 0; } EXPORT_SYMBOL_GPL(mxs_pinctrl_remove);