diff options
author | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
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committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h')
-rw-r--r-- | kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h | 141 |
1 files changed, 141 insertions, 0 deletions
diff --git a/kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h b/kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h new file mode 100644 index 000000000..420426793 --- /dev/null +++ b/kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h @@ -0,0 +1,141 @@ +#ifndef __NVBIOS_RAMCFG_H__ +#define __NVBIOS_RAMCFG_H__ +struct nvbios_ramcfg { + unsigned rammap_ver; + unsigned rammap_hdr; + unsigned rammap_min; + unsigned rammap_max; + union { + struct { + unsigned rammap_10_04_02:1; + unsigned rammap_10_04_08:1; + }; + struct { + unsigned rammap_11_08_01:1; + unsigned rammap_11_08_0c:2; + unsigned rammap_11_08_10:1; + unsigned rammap_11_09_01ff:9; + unsigned rammap_11_0a_03fe:9; + unsigned rammap_11_0a_0400:1; + unsigned rammap_11_0a_0800:1; + unsigned rammap_11_0b_01f0:5; + unsigned rammap_11_0b_0200:1; + unsigned rammap_11_0b_0400:1; + unsigned rammap_11_0b_0800:1; + unsigned rammap_11_0d:8; + unsigned rammap_11_0e:8; + unsigned rammap_11_0f:8; + unsigned rammap_11_11_0c:2; + }; + }; + + unsigned ramcfg_ver; + unsigned ramcfg_hdr; + unsigned ramcfg_timing; + union { + struct { + unsigned ramcfg_10_02_01:1; + unsigned ramcfg_10_02_02:1; + unsigned ramcfg_10_02_04:1; + unsigned ramcfg_10_02_08:1; + unsigned ramcfg_10_02_10:1; + unsigned ramcfg_10_02_20:1; + unsigned ramcfg_10_DLLoff:1; + unsigned ramcfg_10_03_0f:4; + unsigned ramcfg_10_04_01:1; + unsigned ramcfg_10_05:8; + unsigned ramcfg_10_06:8; + unsigned ramcfg_10_07:8; + unsigned ramcfg_10_08:8; + unsigned ramcfg_10_09_0f:4; + unsigned ramcfg_10_09_f0:4; + }; + struct { + unsigned ramcfg_11_01_01:1; + unsigned ramcfg_11_01_02:1; + unsigned ramcfg_11_01_04:1; + unsigned ramcfg_11_01_08:1; + unsigned ramcfg_11_01_10:1; + unsigned ramcfg_11_01_20:1; + unsigned ramcfg_11_01_40:1; + unsigned ramcfg_11_01_80:1; + unsigned ramcfg_11_02_03:2; + unsigned ramcfg_11_02_04:1; + unsigned ramcfg_11_02_08:1; + unsigned ramcfg_11_02_10:1; + unsigned ramcfg_11_02_40:1; + unsigned ramcfg_11_02_80:1; + unsigned ramcfg_11_03_0f:4; + unsigned ramcfg_11_03_30:2; + unsigned ramcfg_11_03_c0:2; + unsigned ramcfg_11_03_f0:4; + unsigned ramcfg_11_04:8; + unsigned ramcfg_11_06:8; + unsigned ramcfg_11_07_02:1; + unsigned ramcfg_11_07_04:1; + unsigned ramcfg_11_07_08:1; + unsigned ramcfg_11_07_10:1; + unsigned ramcfg_11_07_40:1; + unsigned ramcfg_11_07_80:1; + unsigned ramcfg_11_08_01:1; + unsigned ramcfg_11_08_02:1; + unsigned ramcfg_11_08_04:1; + unsigned ramcfg_11_08_08:1; + unsigned ramcfg_11_08_10:1; + unsigned ramcfg_11_08_20:1; + unsigned ramcfg_11_09:8; + }; + }; + + unsigned timing_ver; + unsigned timing_hdr; + unsigned timing[11]; + union { + struct { + unsigned timing_10_WR:8; + unsigned timing_10_WTR:8; + unsigned timing_10_CL:8; + unsigned timing_10_RC:8; + /*empty: 4 */ + unsigned timing_10_RFC:8; /* Byte 5 */ + /*empty: 6 */ + unsigned timing_10_RAS:8; /* Byte 7 */ + /*empty: 8 */ + unsigned timing_10_RP:8; /* Byte 9 */ + unsigned timing_10_RCDRD:8; + unsigned timing_10_RCDWR:8; + unsigned timing_10_RRD:8; + unsigned timing_10_13:8; + unsigned timing_10_ODT:3; + /* empty: 15 */ + unsigned timing_10_16:8; + /* empty: 17 */ + unsigned timing_10_18:8; + unsigned timing_10_CWL:8; + unsigned timing_10_20:8; + unsigned timing_10_21:8; + /* empty: 22, 23 */ + unsigned timing_10_24:8; + }; + struct { + unsigned timing_20_2e_03:2; + unsigned timing_20_2e_30:2; + unsigned timing_20_2e_c0:2; + unsigned timing_20_2f_03:2; + unsigned timing_20_2c_003f:6; + unsigned timing_20_2c_1fc0:7; + unsigned timing_20_30_f8:5; + unsigned timing_20_30_07:3; + unsigned timing_20_31_0007:3; + unsigned timing_20_31_0078:4; + unsigned timing_20_31_0780:4; + unsigned timing_20_31_0800:1; + unsigned timing_20_31_7000:3; + unsigned timing_20_31_8000:1; + }; + }; +}; + +u8 nvbios_ramcfg_count(struct nvkm_bios *); +u8 nvbios_ramcfg_index(struct nvkm_subdev *); +#endif |