diff options
author | Jiang, Yunhong <yunhong.jiang@intel.com> | 2016-10-28 23:29:15 +0000 |
---|---|---|
committer | Gerrit Code Review <gerrit@opnfv.org> | 2016-10-28 23:29:15 +0000 |
commit | ff067418f34c3670cbab67587d8ab0dc0c8f1acc (patch) | |
tree | 5991abe90fad967bfed0638d9d979777f70f3df3 /kernel/arch/x86 | |
parent | f2e379228d244be691bee350da1cb3d820cb6dfb (diff) | |
parent | ab1366e1b48fa0b56752a3b56e7456c3c7ecb011 (diff) |
Merge "Inform TSC deadline clockevent device about recalibration"
Diffstat (limited to 'kernel/arch/x86')
-rw-r--r-- | kernel/arch/x86/include/asm/apic.h | 2 | ||||
-rw-r--r-- | kernel/arch/x86/kernel/apic/apic.c | 24 | ||||
-rw-r--r-- | kernel/arch/x86/kernel/tsc.c | 4 |
3 files changed, 30 insertions, 0 deletions
diff --git a/kernel/arch/x86/include/asm/apic.h b/kernel/arch/x86/include/asm/apic.h index a30316bf8..9686289d2 100644 --- a/kernel/arch/x86/include/asm/apic.h +++ b/kernel/arch/x86/include/asm/apic.h @@ -131,6 +131,7 @@ extern void init_apic_mappings(void); void register_lapic_address(unsigned long address); extern void setup_boot_APIC_clock(void); extern void setup_secondary_APIC_clock(void); +extern void lapic_update_tsc_freq(void); extern int APIC_init_uniprocessor(void); #ifdef CONFIG_X86_64 @@ -166,6 +167,7 @@ static inline void init_apic_mappings(void) { } static inline void disable_local_APIC(void) { } # define setup_boot_APIC_clock x86_init_noop # define setup_secondary_APIC_clock x86_init_noop +static inline void lapic_update_tsc_freq(void) { } #endif /* !CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_X2APIC diff --git a/kernel/arch/x86/kernel/apic/apic.c b/kernel/arch/x86/kernel/apic/apic.c index d2eee3e1b..58e7cdb25 100644 --- a/kernel/arch/x86/kernel/apic/apic.c +++ b/kernel/arch/x86/kernel/apic/apic.c @@ -564,6 +564,30 @@ static void setup_APIC_timer(void) } /* + * Install the updated TSC frequency from recalibration at the TSC + * deadline clockevent devices. + */ +static void __lapic_update_tsc_freq(void *info) +{ + struct clock_event_device *levt = this_cpu_ptr(&lapic_events); + + if (!this_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER)) + return; + + clockevents_update_freq(levt, tsc_khz * (1000 / TSC_DIVISOR)); +} + +void lapic_update_tsc_freq(void) +{ + /* + * The clockevent device's ->mult and ->shift can both be + * changed. In order to avoid races, schedule the frequency + * update code on each CPU. + */ + on_each_cpu(__lapic_update_tsc_freq, NULL, 0); +} + +/* * In this functions we calibrate APIC bus clocks to the external timer. * * We want to do the calibration only once since we want to have local timer diff --git a/kernel/arch/x86/kernel/tsc.c b/kernel/arch/x86/kernel/tsc.c index c7c4d9c51..eafe93888 100644 --- a/kernel/arch/x86/kernel/tsc.c +++ b/kernel/arch/x86/kernel/tsc.c @@ -22,6 +22,7 @@ #include <asm/nmi.h> #include <asm/x86_init.h> #include <asm/geode.h> +#include <asm/apic.h> unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ EXPORT_SYMBOL(cpu_khz); @@ -1141,6 +1142,9 @@ static void tsc_refine_calibration_work(struct work_struct *work) (unsigned long)tsc_khz / 1000, (unsigned long)tsc_khz % 1000); + /* Inform the TSC deadline clockevent devices about the recalibration */ + lapic_update_tsc_freq(); + out: clocksource_register_khz(&clocksource_tsc, tsc_khz); } |