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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/sh/include/mach-dreamcast/mach/dma.h
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/sh/include/mach-dreamcast/mach/dma.h')
-rw-r--r--kernel/arch/sh/include/mach-dreamcast/mach/dma.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/kernel/arch/sh/include/mach-dreamcast/mach/dma.h b/kernel/arch/sh/include/mach-dreamcast/mach/dma.h
new file mode 100644
index 000000000..1dbfdf701
--- /dev/null
+++ b/kernel/arch/sh/include/mach-dreamcast/mach/dma.h
@@ -0,0 +1,32 @@
+/*
+ * include/asm-sh/dreamcast/dma.h
+ *
+ * Copyright (C) 2003 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_DREAMCAST_DMA_H
+#define __ASM_SH_DREAMCAST_DMA_H
+
+/* Number of DMA channels */
+#define G2_NR_DMA_CHANNELS 4
+
+/* Channels for cascading */
+#define PVR2_CASCADE_CHAN 2
+#define G2_CASCADE_CHAN 3
+
+/* PVR2 DMA Registers */
+#define PVR2_DMA_BASE 0xa05f6800
+#define PVR2_DMA_ADDR (PVR2_DMA_BASE + 0)
+#define PVR2_DMA_COUNT (PVR2_DMA_BASE + 4)
+#define PVR2_DMA_MODE (PVR2_DMA_BASE + 8)
+#define PVR2_DMA_LMMODE0 (PVR2_DMA_BASE + 132)
+#define PVR2_DMA_LMMODE1 (PVR2_DMA_BASE + 136)
+
+/* G2 DMA Register */
+#define G2_DMA_BASE 0xa05f7800
+
+#endif /* __ASM_SH_DREAMCAST_DMA_H */
+