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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/sh/boot/romimage
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/sh/boot/romimage')
-rw-r--r--kernel/arch/sh/boot/romimage/Makefile30
-rw-r--r--kernel/arch/sh/boot/romimage/head.S84
-rw-r--r--kernel/arch/sh/boot/romimage/mmcif-sh7724.c72
3 files changed, 186 insertions, 0 deletions
diff --git a/kernel/arch/sh/boot/romimage/Makefile b/kernel/arch/sh/boot/romimage/Makefile
new file mode 100644
index 000000000..2216ee57f
--- /dev/null
+++ b/kernel/arch/sh/boot/romimage/Makefile
@@ -0,0 +1,30 @@
+#
+# linux/arch/sh/boot/romimage/Makefile
+#
+# create an romImage file suitable for burning to flash/mmc from zImage
+#
+
+targets := vmlinux head.o zeropage.bin piggy.o
+load-y := 0
+
+mmcif-load-$(CONFIG_CPU_SUBTYPE_SH7724) := 0xe5200000 # ILRAM
+mmcif-obj-$(CONFIG_CPU_SUBTYPE_SH7724) := $(obj)/mmcif-sh7724.o
+load-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-load-y)
+obj-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-obj-y)
+
+LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(load-y) -e romstart \
+ -T $(obj)/../../kernel/vmlinux.lds
+
+$(obj)/vmlinux: $(obj)/head.o $(obj-y) $(obj)/piggy.o FORCE
+ $(call if_changed,ld)
+ @:
+
+OBJCOPYFLAGS += -j .empty_zero_page
+
+$(obj)/zeropage.bin: vmlinux FORCE
+ $(call if_changed,objcopy)
+
+LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
+
+$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/zeropage.bin arch/sh/boot/zImage FORCE
+ $(call if_changed,ld)
diff --git a/kernel/arch/sh/boot/romimage/head.S b/kernel/arch/sh/boot/romimage/head.S
new file mode 100644
index 000000000..4671d1b82
--- /dev/null
+++ b/kernel/arch/sh/boot/romimage/head.S
@@ -0,0 +1,84 @@
+/*
+ * linux/arch/sh/boot/romimage/head.S
+ *
+ * Board specific setup code, executed before zImage loader
+ */
+
+.text
+ #include <asm/page.h>
+
+ .global romstart
+romstart:
+ /* include board specific setup code */
+#include <mach/romimage.h>
+
+#ifdef CONFIG_ROMIMAGE_MMCIF
+ /* load the romImage to above the empty zero page */
+ mov.l empty_zero_page_dst, r4
+ mov.l empty_zero_page_dst_adj, r5
+ add r5, r4
+ mov.l bytes_to_load, r5
+ mov.l loader_function, r7
+ jsr @r7
+ mov r4, r15
+
+ mov.l empty_zero_page_dst, r4
+ mov.l empty_zero_page_dst_adj, r5
+ add r5, r4
+ mov.l loaded_code_offs, r5
+ add r5, r4
+ jmp @r4
+ nop
+
+ .balign 4
+empty_zero_page_dst_adj:
+ .long PAGE_SIZE
+bytes_to_load:
+ .long end_data - romstart
+loader_function:
+ .long mmcif_loader
+loaded_code_offs:
+ .long loaded_code - romstart
+loaded_code:
+#endif /* CONFIG_ROMIMAGE_MMCIF */
+
+ /* copy the empty_zero_page contents to where vmlinux expects it */
+ mova extra_data_pos, r0
+ mov.l extra_data_size, r1
+ add r1, r0
+ mov.l empty_zero_page_dst, r1
+ mov #(PAGE_SHIFT - 4), r4
+ mov #1, r3
+ shld r4, r3 /* r3 = PAGE_SIZE / 16 */
+
+1:
+ mov.l @r0, r4
+ mov.l @(4, r0), r5
+ mov.l @(8, r0), r6
+ mov.l @(12, r0), r7
+ add #16,r0
+ mov.l r4, @r1
+ mov.l r5, @(4, r1)
+ mov.l r6, @(8, r1)
+ mov.l r7, @(12, r1)
+ dt r3
+ add #16,r1
+ bf 1b
+
+ /* jump to the zImage entry point located after the zero page data */
+ mov #PAGE_SHIFT, r4
+ mov #1, r1
+ shld r4, r1
+ mova extra_data_pos, r0
+ add r1, r0
+ mov.l extra_data_size, r1
+ add r1, r0
+ jmp @r0
+ nop
+
+ .align 2
+empty_zero_page_dst:
+ .long _text
+extra_data_pos:
+extra_data_size:
+ .long zero_page_pos - extra_data_pos
diff --git a/kernel/arch/sh/boot/romimage/mmcif-sh7724.c b/kernel/arch/sh/boot/romimage/mmcif-sh7724.c
new file mode 100644
index 000000000..16b122510
--- /dev/null
+++ b/kernel/arch/sh/boot/romimage/mmcif-sh7724.c
@@ -0,0 +1,72 @@
+/*
+ * sh7724 MMCIF loader
+ *
+ * Copyright (C) 2010 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/mmc/sh_mmcif.h>
+#include <linux/mmc/boot.h>
+#include <mach/romimage.h>
+
+#define MMCIF_BASE (void __iomem *)0xa4ca0000
+
+#define MSTPCR2 0xa4150038
+#define PTWCR 0xa4050146
+#define PTXCR 0xa4050148
+#define PSELA 0xa405014e
+#define PSELE 0xa4050156
+#define HIZCRC 0xa405015c
+#define DRVCRA 0xa405018a
+
+/* SH7724 specific MMCIF loader
+ *
+ * loads the romImage from an MMC card starting from block 512
+ * use the following line to write the romImage to an MMC card
+ * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512
+ */
+asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
+{
+ mmcif_update_progress(MMC_PROGRESS_ENTER);
+
+ /* enable clock to the MMCIF hardware block */
+ __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
+
+ /* setup pins D7-D0 */
+ __raw_writew(0x0000, PTWCR);
+
+ /* setup pins MMC_CLK, MMC_CMD */
+ __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);
+
+ /* select D3-D0 pin function */
+ __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);
+
+ /* select D7-D4 pin function */
+ __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);
+
+ /* disable Hi-Z for the MMC pins */
+ __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);
+
+ /* high drive capability for MMC pins */
+ __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
+
+ mmcif_update_progress(MMC_PROGRESS_INIT);
+
+ /* setup MMCIF hardware */
+ sh_mmcif_boot_init(MMCIF_BASE);
+
+ mmcif_update_progress(MMC_PROGRESS_LOAD);
+
+ /* load kernel via MMCIF interface */
+ sh_mmcif_boot_do_read(MMCIF_BASE, 512,
+ (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
+ buf);
+
+ /* disable clock to the MMCIF hardware block */
+ __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
+
+ mmcif_update_progress(MMC_PROGRESS_DONE);
+}