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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/sh/boards/mach-sh7763rdp/irq.c
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/sh/boards/mach-sh7763rdp/irq.c')
-rw-r--r--kernel/arch/sh/boards/mach-sh7763rdp/irq.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/kernel/arch/sh/boards/mach-sh7763rdp/irq.c b/kernel/arch/sh/boards/mach-sh7763rdp/irq.c
new file mode 100644
index 000000000..add698c8f
--- /dev/null
+++ b/kernel/arch/sh/boards/mach-sh7763rdp/irq.c
@@ -0,0 +1,45 @@
+/*
+ * linux/arch/sh/boards/renesas/sh7763rdp/irq.c
+ *
+ * Renesas Solutions SH7763RDP Support.
+ *
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <mach/sh7763rdp.h>
+
+#define INTC_BASE (0xFFD00000)
+#define INTC_INT2PRI7 (INTC_BASE+0x4001C)
+#define INTC_INT2MSKCR (INTC_BASE+0x4003C)
+#define INTC_INT2MSKCR1 (INTC_BASE+0x400D4)
+
+/*
+ * Initialize IRQ setting
+ */
+void __init init_sh7763rdp_IRQ(void)
+{
+ /* GPIO enabled */
+ __raw_writel(1 << 25, INTC_INT2MSKCR);
+
+ /* enable GPIO interrupts */
+ __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
+ INTC_INT2PRI7);
+
+ /* USBH enabled */
+ __raw_writel(1 << 17, INTC_INT2MSKCR1);
+
+ /* GETHER enabled */
+ __raw_writel(1 << 16, INTC_INT2MSKCR1);
+
+ /* DMAC enabled */
+ __raw_writel(1 << 8, INTC_INT2MSKCR);
+}